JP2023168249A - semiconductor optical device - Google Patents

Abstract

To prevent characteristic deterioration.SOLUTION: A semiconductor optical device includes: a pair of embedded layers 24 which includes a first inclined surface 30 adjacent to the upper end surface of a mesa stripe structure 12 and rises obliquely from an upper end surface, includes a first upright surface 32 standing upright from an upper end of the first inclined surface 30, and includes a top surface 34 higher than the upper end surface of the mesa stripe structure 12; an insulating film 54 which is on the upper surface 34 of the embedded layers 24 while avoiding an upside of the upper end surface of the mesa stripe structure 12; and an electrode film 58 extending over the upper end surface of the mesa stripe structure 12, the first inclined surface 30 of each embedded layer 24, and the insulating film 54. The upper end of the first upright surface 32 extends along a first direction D1, and at least one upper surface 34 of the pair of embedded layers 24 includes a plurality of recesses 42. Each recess 42 includes a second inclined surface 48 inclined obliquely from the upper surface 34. The upper end of the second inclined surface 48 extends along a second direction D2 orthogonal to the first direction D1.SELECTED DRAWING: Figure 1

Description

The present invention relates to a semiconductor optical device.

A semiconductor optical device having a buried hetero-structure (BH structure) is known (Patent Document 1). In the BH structure, both sides of a mesa stripe structure including a multiple quantum well layer are buried with semiconductor layers (buried layers). An insulating film is provided on the upper surface of the buried layer, and an electrode is arranged on the insulating film (Patent Document 2). The insulating film has a through hole that includes the upper surface of the mesa stripe structure, and the electrode is electrically connected to the mesa stripe structure inside the through hole.

Japanese Patent Application Publication No. 2011-151088 Japanese Patent Application Publication No. 2010-271667

The upper surface of the insulating film and the upper surface of the buried layer have a height difference (step). An electrode that rests on a large step will be thin compared to the thickness of an electrode on a flat surface. If the electrode is thin, resistance may increase and heat dissipation may decrease, which may lead to a decrease in the characteristics of the semiconductor optical device.

The present invention aims to prevent deterioration of characteristics.

The semiconductor optical device includes a mesa stripe structure extending in a first direction, and a first slope embedded in the mesa stripe structure on both sides, each adjacent to an upper end surface of the mesa stripe structure and rising obliquely from the upper end surface. a pair of buried layers each having a first upright surface upright from an upper end of the first inclined surface and each having an upper surface higher than the upper end surface of the mesa stripe structure; and the mesa stripe structure. an insulating film on the top surface of each of the pair of buried layers while avoiding the top surface of the structure, and spreading over the top surface of the mesa stripe structure, the first inclined surface, and the insulating film. an electrode film, an upper end of the first upright surface extends along the first direction, the upper surface of at least one of the pair of buried layers has a plurality of recesses, and each has a second inclined surface that slopes downward from the upper surface, and the upper end of the second inclined surface extends along a second direction orthogonal to the first direction.

FIG. 1 is a plan view of a semiconductor optical device according to a first embodiment. FIG. 2 is a sectional view taken along line II-II of the semiconductor optical device shown in FIG. FIG. 3 is a cross-sectional view taken along line III--III of the semiconductor optical device shown in FIG. FIG. 4 is a sectional view taken along the line IV--IV of the semiconductor optical device shown in FIG. FIG. 5 is an enlarged plan view of a region of the semiconductor optical device shown in FIG. 1, including a notch in the insulating film. FIG. 6 is a sectional view taken along the line VI-VI of the semiconductor optical device shown in FIG. FIG. 7 is a sectional view taken along line VII-VII of the semiconductor optical device shown in FIG. FIG. 8 is a cross-sectional view taken along line VIII-VIII of the semiconductor optical device shown in FIG. FIG. 9 is a plan view of a cutout of an insulating film of a semiconductor optical device according to Modification Example 1. FIG. 10 is a plan view of a cutout of an insulating film of a semiconductor optical device according to a second modification. FIG. 11 is a plan view of a semiconductor optical device according to the second embodiment. FIG. 12 is a plan view of a semiconductor optical device according to the third embodiment. FIG. 13 is a plan view of a semiconductor optical device according to the fourth embodiment. FIG. 14 is a plan view of a semiconductor optical device according to the fifth embodiment. FIG. 15 is a plan view of a semiconductor optical device according to the sixth embodiment.

Hereinafter, embodiments of the present invention will be described specifically and in detail with reference to the drawings. In all the figures, members given the same reference numerals have the same or equivalent functions, and their repeated explanations will be omitted. Note that the size of the figure does not necessarily match the magnification.

[First embodiment]
FIG. 1 is a plan view of a semiconductor optical device according to a first embodiment. FIG. 2 is a sectional view taken along line II-II of the semiconductor optical device shown in FIG. FIG. 3 is a cross-sectional view taken along line III--III of the semiconductor optical device shown in FIG. FIG. 4 is a sectional view taken along the line IV--IV of the semiconductor optical device shown in FIG.

The semiconductor optical device may be any one of a semiconductor laser, a semiconductor optical amplifier, an electroabsorption modulator (EA modulator), and a light receiving device. A buried hetero-structure (BH structure) is applied to semiconductor optical devices. The BH structure is a structure in which both sides of a mesa stripe structure including a multiple quantum well layer are embedded with semiconductors such as a semi-insulating semiconductor layer or multiple semiconductor layers with PN junctions, and it has not only high reliability but also heat dissipation. It has an excellent structure.

[Mesa stripe structure]
The semiconductor optical device has a mesa stripe structure 12 extending in the first direction D1. The semiconductor substrate 14 (for example, an n-InP substrate) has a convex portion 16. The convex portion 16 constitutes the lower end portion of the mesa stripe structure 12. The convex portion 16 (semiconductor substrate 14) functions as an n-type cladding layer. Here, the n-type is assumed to be the first conductivity type.

The semiconductor optical device has a multiple quantum well layer 18. The multiple quantum well layer 18 extends in a stripe shape in the first direction D1 on the convex portion 16. The semiconductor optical device has a p-type cladding layer 20. The p-type cladding layer 20 (for example, a p-InP layer) extends in a stripe shape in the first direction D1 on the multiple quantum well layer 18. Here, the p-type is assumed to be the second conductivity type. The semiconductor optical device has a p-type contact layer 22. The p-type contact layer 22 (for example, a p-InGaAs layer) extends in a stripe shape on the p-type cladding layer 20 in the first direction D1. The p-type contact layer 22 is the top layer of the mesa stripe structure 12.

Note that other layers (not shown) such as an optical confinement layer or a diffraction grating layer may be arranged between the multiple quantum well layer 18 and the convex portion 16 and between the multiple quantum well layer 18 and the p-type cladding layer 20. . In this embodiment, the first conductivity type is an n-type and the second conductivity type is a p-type, but the opposite may be used.

[Embedded layer]
The semiconductor optical device has a pair of buried layers 24 (for example, a semi-insulating Fe--InP layer). The pair of buried layers 24 bury the mesa stripe structure 12 on both sides in a second direction D2 perpendicular to the first direction D1. The buried layer 24 is a single crystal layer and is in contact with the mesa stripe structure 12 . The side surface of the buried layer 24 faces the side surface of the mesa stripe structure 12 while avoiding the upper end surface thereof. The pair of buried layers 24 are a first buried layer 26 and a second buried layer 28, and are equal in width in the second direction D2.

[First slope]
Each buried layer 24 has a first inclined surface 30 . The first inclined surface 30 is adjacent to the upper end surface of the mesa stripe structure 12 and rises obliquely from the upper end surface. The first inclined surface 30 is a crystal surface.

[First upright surface]
Each buried layer 24 has a first upright surface 32 . The first upright surface 32 stands upright from the upper end of the first inclined surface 30. The upper end of the first upright surface 32 extends along the first direction D1. The first upright plane 32 is a crystal plane.

[Top surface]
Each buried layer 24 has a top surface 34. The upper surface 34 is higher than the upper end surface of the mesa stripe structure 12. When the buried layer 24 is composed of multiple layers, the region from the first inclined surface 30 to the upper surface 34 is a single crystal.

The outer edge of the upper surface 34 includes a plurality of first edges 36 extending along the first direction D1. The plurality of first edges 36 are arranged in a straight line at intervals. First upright surface 32 is adjacent first edge 36 . The outer edge of the upper surface 34 includes a second edge 38 extending along the second direction D2. The second edge 38 is composed of a pair of second edges 38 that are arranged parallel to each other with an interval in the first direction D1. The mutually opposing tips of a pair of adjacent first edges 36 are connected to the tips of a pair of second edges 38, respectively. The outer edge of the upper surface 34 includes, between the pair of second edges 38, a third edge 40 (FIG. 3) along the first direction D1 that is further away from the side surface than the first edge 36 in the second direction D2.

[Concavity]
The upper surface 34 of at least one of the pair of buried layers 24 (for example, each of the first buried layer 26 and the second buried layer 28) has a plurality of recesses 42. Each recess 42 is surrounded by a second edge 38 and a third edge 40. The plurality of recesses 42 of the first buried layer 26 are a plurality of first recesses 44 lined up in the first direction D1. The plurality of recesses 42 of the second buried layer 28 are a plurality of second recesses 46 lined up in the first direction D1.

The plurality of first recesses 44 and the plurality of second recesses 46 are arranged line-symmetrically. A straight line L extending in the first direction D1 on the mesa stripe structure 12 is an axis of symmetry. Each of the plurality of first recesses 44 and a corresponding one of the plurality of second recesses 46 are adjacent to each other in the second direction D2.

[Second slope]
Each recess 42 has a second inclined surface 48 . The second inclined surface 48 slopes downward from the upper surface 34 . The second sloped surface 48 slopes down from the second edge 38 more gently than the first upright surface 32 . That is, the upper end of the second inclined surface 48 is the second edge 38, and extends along the second direction D2. The second inclined surfaces 48 are a pair of opposing second inclined surfaces 48. The second inclined surface 48 is a crystal surface.

[Second upright surface]
Each recess 42 has a second upright surface 50 . The upper end of the second upright surface 50 extends along the first direction D1. A second upright surface 50 depends from the third edge 40. That is, the upper end of the second upright surface 50 is the third edge 40. The second upright plane 50 is a crystal plane.

[Bottom]
Each recess 42 has a bottom surface 52. The bottom surface 52 extends from the lower end of the second inclined surface 48 in the first direction D1. The bottom surface 52 is flat and connects to the first inclined surface 30.

[Insulating film]
The semiconductor optical device has an insulating film 54. The insulating film 54 is on the top surface 34 of each of the pair of buried layers 24 . The insulating film 54 overhangs the first upright surface 32 . The insulating film 54 overhangs the second upright surface 50 . The buried layer 24 is single-crystalline in the portion where it is in contact with the insulating film 54 .

The insulating film 54 avoids the upper end surface of the mesa stripe structure 12, thereby separating it into a pair of parts. Alternatively, the insulating film 54 may be connected without being separated. For example, on the upper end surface of the mesa stripe structure 12, there may be a part of the insulating film 54 at the end in the first direction D1, thereby connecting the pair of parts of the insulating film 54.

The insulating film 54 includes a plurality of notches 56 recessed from the mesa stripe structure 12 in the second direction D2 along the second edge 38 in a plan view. Each of the plurality of recesses 42 is located inside the plurality of cutouts 56 . The notch 56 has a uniform width in the first direction D1 regardless of the distance from the mesa stripe structure 12. The plurality of notches 56 are arranged symmetrically about a straight line L passing through the mesa stripe structure 12.

[Electrode film]
The semiconductor optical device has an electrode film 58. The electrode film 58 extends over the upper end surface of the mesa stripe structure 12, the first inclined surface 30 of the buried layer 24, and the insulating film 54. The buried layer 24 is a single crystal in the portion where the electrode film 58 contacts. Electrode film 58 includes a first portion 60 overlying first inclined surface 30 . Electrode film 58 includes a second portion 62 overlying second inclined surface 48 .

Electrode membrane 58 includes a first connection portion 64 in front of first upright surface 32 . There is a gap between the first connecting portion 64 and the first upright surface 32 . The first connecting portion 64 is thinner than either the first portion 60 or the second portion 62. Electrode membrane 58 includes a second connection portion 66 in front of second upright surface 50 . There is a gap between the second connecting portion 66 and the second upright surface 50. The second connecting portion 66 is thinner than either the first portion 60 or the second portion 62.

The electrode film 58 may be constructed entirely of the same material and structure. Electrode film 58 includes a top electrode 68 overlying insulating film 54 . The upper surface electrode 68 functions as an electrical connection area with the outside. The entire upper surface electrode 68 is on the insulating film 54. An insulating film 54 is arranged between the buried layer 24 and the upper electrode 68. Although the upper surface electrode 68 does not reach the end of the semiconductor optical device in the second direction D2 and the end of the insulating film 54 is exposed, it may be arranged on the entire upper surface 34 of the semiconductor optical device.

The electrode film 58 includes a mesa electrode 70 on the upper end surface of the mesa stripe structure 12 . Mesa electrode 70 has a rectangular shape. Mesa electrode 70 is electrically and physically connected to p-type contact layer 22 and has the same potential. Even if another layer is interposed between the two, it is sufficient if it is a semiconductor of the same conductivity type as the p-type contact layer 22 and the p-type cladding layer 20. Mesa electrode 70 connects to top electrode 68 via first portion 60 and first connection portion 64 . The first connecting portion 64 is thinner than the upper surface electrode 68.

The electrode film 58 includes an extraction electrode 72 extending from the first portion 60 in the second direction D2. The extraction electrode 72 is located inside the cutout 56 of the insulating film 54. The buried layer 24 is also located directly below the extraction electrode 72. The extraction electrode 72 is connected to the upper surface electrode 68 via the second portion 62. Since the second portion 62 is thicker than both the first connection portion 64 and the second connection portion 66, electrical connection can be ensured.

The semiconductor optical device has a counter electrode 74. The counter electrode 74 is located on the opposite surface (back surface) of the semiconductor substrate 14 from the convex portion 16 . The counter electrode 74 is provided on the back surface of the semiconductor substrate 14 so as to cover almost the entire surface. The counter electrode 74 has the same potential as the semiconductor substrate 14, and even if another layer is interposed between the two, it suffices if it is a semiconductor of the same conductivity type as the semiconductor substrate 14. If the semiconductor optical device is a semiconductor laser, light is generated in the multiple quantum well layer 18 and oscillated by injecting a current between the electrode film 58 and the counter electrode 74.

FIG. 5 is an enlarged plan view of a region of the semiconductor optical device shown in FIG. 1 that includes the cutout 56 of the insulating film 54. FIG. 6 is a sectional view taken along the line VI-VI of the semiconductor optical device shown in FIG. FIG. 7 is a sectional view taken along line VII-VII of the semiconductor optical device shown in FIG. FIG. 8 is a cross-sectional view taken along line VIII-VIII of the semiconductor optical device shown in FIG.

The cutout 56 is formed by partially covering the insulating film 54 with a mask and partially removing it. Removal is done by etching. Even if the mask has a polygonal shape, the insulating film 54 is etched into rounded corners regardless of the sharp corners. Alternatively, a mask with rounded corners may be used.

The cutout 56 is part of the through hole 76. The through hole 76 is an opening provided in the insulating film 54 or separating the insulating film 54, and is provided to physically connect the electrode film 58 and the mesa stripe structure 12. The through hole 76 includes a mesa opening surrounding the upper end surface of the mesa stripe structure 12 and the first inclined surface 30 of the buried layer 24, and the mesa opening may have a rectangular shape.

In the steps from partially removing the insulating film 54 to forming the electrode film 58, the buried layer 24 under the insulating film 54 may also be etched. As a result, the height difference (step) between the surface of the insulating film 54 and the surface of the buried layer 24 becomes large. Moreover, when the buried layer 24 is etched, side etching occurs under the tip of the insulating film 54 along the first direction D1 (FIGS. 2 and 6). Therefore, the insulating film 54 overhangs the first edge 36 (FIG. 2) and the third edge 40 (FIG. 6). When the electrode film 58 is formed on the buried layer 24 and the insulating film 54 having this shape, the first connection part 64 and the second connection part 66 of the electrode film 58 are thinner (for example, 1/5 (below) becomes. In the worst case, it may become discontinuous (broken).

As shown in FIG. 7, side etching occurs with respect to the buried layer 24 even under the tip of the insulating film 54 that extends in a direction that intersects both the first direction D1 and the second direction D2. Furthermore, the etched surface is an overhanging surface that tilts forward upward due to the crystal plane. Therefore, also here, the electrode film 58 becomes thinner in the portion where the upper surface electrode 68 and the extraction electrode 72 are connected. Depending on the thickness of the extraction electrode 72 and the size of the step, the wire may be broken.

In contrast, as shown in FIG. 8, the insulating film 54 does not protrude from the second edge 38. This is because the buried layer 24 has the second inclined surface 48 due to the crystal plane. The second sloped surface 48 slopes down from the second edge 38 more gently than the first upright surface 32 . Therefore, the height difference (step) between the surface of the insulating film 54 and the upper end of the surface of the buried layer 24 (second inclined surface 48) is small. Thereby, the electrode film 58 smoothly extends and continues through the second inclined surface 48. The thickness of the second portion 62 overlapping the second inclined surface 48 is more than half that of the upper surface electrode 68 and the extraction electrode 72.

In the region where the notch 56 is not present, the electrode film 58 becomes thinner between the upper surface electrode 68 and the mesa electrode 70, as shown in the first connection portion 64 shown in FIG. This is a factor that increases power consumption. Furthermore, the heat generated in the mesa stripe structure 12 is transferred to the upper surface electrode 68 via the mesa electrode 70 and is dissipated, but the thin region of the electrode film 58 (for example, the first connection portion 64) has a low thermal conductivity. This will cause a decrease in the amount of water.

However, according to embodiments, the top electrode 68 is connected to the mesa electrode 70 via the second portion 62, and the second portion 62 is thicker due to the presence of the second sloped surface 48, so that the upper surface electrode 68 is electrically connection can be ensured. Furthermore, by forming the plurality of notches 56, it is possible to lower the resistance between the upper surface electrode 68 and the mesa electrode 70, and to ensure a heat dissipation path. Further, even if the first connecting portion 64 or the second connecting portion 66 becomes discontinuous, the continuity of the electrode film 58 is ensured via the second portion 62.

[Modification 1]
FIG. 9 is a plan view of a cutout of an insulating film of a semiconductor optical device according to Modification Example 1. The cutout 56A in FIG. 9 is shorter than the cutout 56 in FIG. 5 in the second direction D2. Therefore, the linear edge 78A of the notch 56A along the second direction D2 becomes shorter, and the second inclined surface 48A of the buried layer 24 becomes narrower accordingly. However, if the second inclined surface 48A has a certain width, the resistance of the electrode film 58 will not increase, and the effects of the first embodiment can be obtained. It is preferable that the notch 56A (linear edge 78A along the second direction D2) has a length of 3 μm or more in the second direction D2.

[Modification 2]
FIG. 10 is a plan view of a cutout of an insulating film of a semiconductor optical device according to a second modification. The width of the notch 56B in the first direction D1 becomes smaller as the distance from the mesa stripe structure 12 increases. The cutout 56B includes a linear edge 78B along the second direction D2 and an oblique edge 78C that intersects both the first direction D1 and the second direction D2. The buried layer 24 has a second sloped surface 48B adjacent to the straight edge 78B, but does not necessarily have a sloped surface adjacent to the diagonal edge 78C. Therefore, the electrode film may connect with a thick connection only in the portion passing through the straight edge 78B.

In FIG. 10, the pair of notches 56B are arranged asymmetrically. That is, the notch 56B on the right side has a straight edge 78B on the upper side and the diagonal edge 78C on the lower side, whereas the notch 56B on the left side has a straight edge 78B on the lower side. It has a diagonal edge 78C on the upper side. As a modification, the pair of notches 56B may be arranged line-symmetrically.

[Second embodiment]
FIG. 11 is a plan view of a semiconductor optical device according to the second embodiment. The plurality of first recesses 244 and the plurality of second recesses 246 are asymmetrical. The plurality of cutouts 256 are also not symmetrical about the straight line along the mesa stripe structure 212.

The plurality of first recesses 244 and the plurality of second recesses 246 are arranged in a staggered manner in the first direction D1. The plurality of first recesses 244 include a pair of first recesses 244 adjacent to each other in the first direction D1. A region between the pair of first recesses 244 is adjacent to a corresponding one of the plurality of second recesses 246 in the second direction D2. The plurality of second recesses 246 include a pair of second recesses 246 adjacent to each other in the first direction D1. A region between the pair of second recesses 246 is adjacent to a corresponding one of the plurality of first recesses 244 in the second direction D2. The contents described in the first embodiment can be applied to other points.

[Third embodiment]
FIG. 12 is a plan view of a semiconductor optical device according to the third embodiment. The plurality of first recesses 344 and the plurality of second recesses 346 are asymmetrical. The plurality of first recesses 344 are in a first region 388 on the top surface of the first buried layer 326 . The plurality of second recesses 346 are in a second region 390 on the top surface of the second buried layer 328 . The first region 388 and the second region 390 are not adjacent to each other in the second direction D2. The plurality of cutouts 356 are also asymmetrical.

In order to miniaturize the semiconductor optical device, the width of the buried layer in the second direction D2 is narrowed. The cutouts 356 are arranged in the upper left region and the lower right region.

A wire for connection with the outside is connected to the electrode film 358. Although the wire has a larger diameter at the tip, it is not preferable for the tip to overlap the notch 356. A step is created between the insulating film 354 and the buried layer at the notch 356, and wire bonding in a region with such a step reduces the connection strength of the wire.

In this embodiment, since the width of the buried layer is narrow in the second direction D2, the area where the wire is arranged is narrow, but since there are no notches 356 at the upper right and lower left, wire bonding is possible. Area can be secured. The contents described in the first embodiment can be applied to other points.

[Fourth embodiment]
FIG. 13 is a plan view of a semiconductor optical device according to the fourth embodiment. The pair of buried layers is a first buried layer 426 that has a plurality of recesses 442 and a second buried layer 428 that does not have a plurality of recesses 442. The first buried layer 426 is larger in width in the second direction D2 than the second buried layer 428.

The mesa stripe structure 412 is offset from the center of the semiconductor optical device in the second direction D2. Cutout 456 is placed on only one side of mesa stripe structure 412. By shifting the mesa stripe structure 412 from the center, a wide wire bonding area can be secured. Since the notch 456 is arranged on the side where wire bonding is to be performed, electrical connection is ensured, and an electrical signal input via the wire is transmitted to the mesa stripe structure 412. The contents described in the first embodiment can be applied to other points.

[Fifth embodiment]
FIG. 14 is a plan view of a semiconductor optical device according to the fifth embodiment. The pair of buried layers is a first buried layer 526 that has a plurality of recesses 542 and a second buried layer 528 that does not have a plurality of recesses. The first buried layer 526 is larger in width in the second direction D2 than the second buried layer 528. The plurality of recesses 542 in the first buried layer 526 are a pair of recesses 542 . The distance between the pair of recesses 542 is greater than half the length of the first buried layer 526 in the first direction D1.

The mesa stripe structure 512 is offset from the center of the semiconductor optical device in the second direction D2. The cutout 556 is placed on only one side of the mesa stripe structure 512. The cutout 556 is arranged near the two end faces of the semiconductor optical device and is longer in the second direction D2 than in other embodiments. A wire is bonded to the region sandwiched between the pair of notches 556. The contents described in the first embodiment can be applied to other points.

[Sixth embodiment]
FIG. 15 is a plan view of a semiconductor optical device according to the sixth embodiment. The semiconductor optical device is a modulator integrated semiconductor laser, and includes a semiconductor laser 680, an electroabsorption modulator 682, and a waveguide 684 disposed between them, each of which is integrally integrated. The semiconductor optical device has a mesa stripe structure 612 spanning a semiconductor laser 680, a waveguide 684, and an electroabsorption modulator 682.

Semiconductor laser 680 includes a portion of mesa stripe structure 612. The semiconductor laser 680 emits continuous light toward the waveguide 684. The semiconductor laser 680 may be any of a DFB (Distributed Feedback) laser, an FP (Fabry-Perot) laser, a DBR (Distributed Bragg Reflector) laser, and a DR (Distributed Reflector) laser, and has a 1.3 μm band or a 1.55 μm band. It is designed to oscillate in the band. However, the wavelength band is not limited to this, and other wavelength bands may be used.

In the semiconductor laser 680, the insulating film 654 has a through hole 676 along the direction in which the mesa stripe structure 612 extends. An electrode film 658 is on top of the insulating film 654. The electrode film 658 is in contact with the upper end surface of the mesa stripe structure 612 within the through hole 676 .

Electroabsorption modulator 682 includes another portion of mesa stripe structure 612. The electroabsorption modulator 682 is capable of converting continuous light transmitted through the waveguide 684 into modulated light. Electroabsorption modulator 682 has a modulator electrode 692. In the electroabsorption modulator 682, the insulating film 654 has a through hole 694 along the direction in which the mesa stripe structure 612 extends. Although the through hole 694 is rectangular here, the insulating film 654 may have a notch 656 similarly to the semiconductor laser 680.

Waveguide 684 includes yet another portion of mesa stripe structure 612. The waveguide 684 is capable of transmitting light emitted by the semiconductor laser 680 toward the electroabsorption modulator 682. The waveguide 684 is entirely covered with an insulating film 654.

An end of the electrode film 658 that is close to the waveguide 684 in the first direction D1 is arranged beyond the through hole 676 of the insulating film 654. Although it is possible to align the ends of the electrode film 658 and the ends of the through holes 676, due to manufacturing variations, if the ends of the electrode film 658 are arranged without reaching the outside of the through holes 676, the mesa stripe structure 612 The contact layer, which is the upper end surface of the contact layer, is exposed. Since the contact layer is a semiconductor layer, it is susceptible to deterioration due to the influence of the external environment, which may affect reliability. Therefore, the electrode film 658 is configured to reliably cover the through hole 676, taking manufacturing variations into account.

This embodiment improves the continuity of the electrode film 658 of a semiconductor optical device having a buried heterostructure. This is realized because the through hole 676 of the insulating film 654 is provided with a plurality of notches 656. Specifically, the buried layer has a second inclined surface inclined in the first direction D1 in which the mesa stripe structure 612 extends inside the notch 656. The portion of the electrode film 658 disposed on the second inclined surface has a thickness that is more than half the thickness of the portion disposed on the upper surface of the buried layer. Therefore, the portion of the electrode film 658 that passes through the second slope reliably connects the portion on the upper surface of the buried layer and the portion inside the notch 656.

A plurality of cutouts 656 are arranged along mesa stripe structure 612. The plurality of cutouts 656 may be arranged line-symmetrically or asymmetrically. Additionally, the cutout 656 may be placed only on one side of the mesa stripe structure 612. The contents described in the first embodiment can be applied to other points.

The present invention is not limited to the embodiments described above, and various modifications are possible. For example, the configuration described in the embodiment can be replaced with a configuration that is substantially the same, has the same effect, or can achieve the same purpose.

[Overview of embodiment]
(1) A mesa stripe structure 12 extending in the first direction D1 and a mesa stripe structure 12 embedded on both sides, each adjacent to the upper end surface of the mesa stripe structure 12 and extending obliquely from the upper end surface. a pair of inclined surfaces 30, each having a first upright surface 32 upright from the upper end of the first inclined surface 30, and each having an upper surface 34 higher than the upper end surface of the mesa stripe structure 12; a buried layer 24, an insulating film 54 on the upper surface of each of the pair of buried layers 24 while avoiding the upper surface of the mesa stripe structure 12, and the upper surface of the mesa stripe structure 12; an electrode film 58 extending above the first inclined surface 30 and the insulating film 54; an upper end of the first upright surface 32 extends along the first direction D1; At least one of the upper surfaces 34 has a plurality of recesses 42, and each of the plurality of recesses 42 has a second slope 48 that slopes downward from the upper surface 34, and the second slope The upper end of 48 is a semiconductor optical device extending along a second direction D2 orthogonal to the first direction D1. Even if the electrode film 58 becomes thinner in front of the first upright surface 32 of the buried layer 24, the thickness is ensured from the upper surface 34 to the second inclined surface 48, thereby suppressing an increase in resistance and a decrease in heat dissipation. , it is possible to prevent deterioration of characteristics.

(2) In the semiconductor optical device described in (1), the electrode film 58 includes a first portion 60 located above the first slope 30 and a second portion 60 located above the second slope 48. a second portion 62 and a first connection portion 64 in front of the first upright surface 32, the first connection portion 64 being thinner than either the first portion 60 or the second portion 62; optical element.

(3) The semiconductor optical device described in (2), in which there is a gap between the first connection portion 64 and the first upright surface 32.

(4) The semiconductor optical device described in (3), wherein the insulating film 54 overhangs the first upright surface 32.

(5) The semiconductor optical device according to any one of (2) to (4), wherein each of the plurality of recesses 42 further includes a second upright surface 50 that stands upright; The upper end of the upright surface 50 extends along the first direction D1, the electrode film 58 further includes a second connection part 66 in front of the second upright face 50, and the second connection part 66 is A semiconductor optical device that is thinner than both the first portion 60 and the second portion 62.

(6) The semiconductor optical device described in (5), wherein there is a gap between the second connection portion 66 and the second upright surface 50.

(7) The semiconductor optical device according to (6), wherein the insulating film 54 overhangs the second upright surface 50.

(8) In the semiconductor optical device according to any one of (1) to (7), each of the plurality of recesses 42 extends from the lower end of the second inclined surface 48 in the first direction D1. A semiconductor optical device having a bottom surface 52 that expands, the bottom surface 52 being flat and connected to the first inclined surface 30.

(9) In the semiconductor optical device according to any one of (1) to (8), the pair of buried layers 24 include a first buried layer 26 and a first buried layer 26 each having the plurality of recesses 42. 2 buried layer 28, the plurality of recesses 42 of the first buried layer 26 are a plurality of first recesses 44 lined up in the first direction D1, and the plurality of recesses 42 of the second buried layer 28 are , a semiconductor optical device having a plurality of second recesses 46 lined up in the first direction D1.

(10) The semiconductor optical device described in (9), in which the first buried layer 26 and the second buried layer 28 are equal in width in the second direction D2.

(11) In the semiconductor optical device according to (9) or (10), the plurality of first recesses 44 and the plurality of second recesses 46 are line symmetrical, and are arranged above the mesa stripe structure 12. A semiconductor optical device whose axis of symmetry is a straight line L extending in the first direction D1.

(12) In the semiconductor optical device described in (11), each of the plurality of first recesses 44 and a corresponding one of the plurality of second recesses 46 are adjacent to each other in the second direction D2. optical element.

(13) The semiconductor optical device according to (9) or (10), wherein the plurality of first recesses 244 and the plurality of second recesses 246 are axisymmetric.

(14) The semiconductor optical device according to (13), wherein the plurality of first recesses 244 and the plurality of second recesses 246 are arranged in a staggered manner in the first direction D1. .

(15) The semiconductor optical device described in (13), wherein the plurality of first recesses 244 include a pair of first recesses 244 adjacent to each other in the first direction D1, and the plurality of first recesses 244 include a pair of first recesses 244 adjacent to each other in the first direction D1. 244 is adjacent to a corresponding one of the plurality of second recesses 246 in the second direction D2, and the plurality of second recesses 246 are adjacent to each other in the first direction D1. , and a region between the pair of second recesses 246 is adjacent to a corresponding one of the plurality of first recesses 244 in the second direction D2.

(16) In the semiconductor optical device described in (13), the plurality of first recesses 344 are located in the first region 388 of the upper surface of the first buried layer 326, and the plurality of second recesses 344 are located in the first region 388 of the upper surface of the first buried layer 326. is located in a second region 390 on the upper surface of the second buried layer 328, and the first region 388 and the second region 390 are not adjacent to each other in the second direction D2.

(17) The semiconductor optical device according to any one of (1) to (8), wherein the pair of buried layers includes a first buried layer 426 having the plurality of recesses 442 and a first buried layer 426 having the plurality of recesses 442; 442, and the first buried layer 426 is larger in width in the second direction D2 than the second buried layer 428.

(18) In the semiconductor optical device described in (17), the plurality of recesses 542 of the first buried layer 526 are a pair of recesses 542, and the distance between the pair of recesses 542 is equal to the distance between the pair of recesses 542. A semiconductor optical device in which the length of the first buried layer 526 in the first direction D1 is greater than one-half.

(19) The semiconductor optical device according to any one of (1) to (18), wherein the second inclined surface 48 is a pair of opposing second inclined surfaces 48.

12 mesa stripe structure, 14 semiconductor substrate, 16 convex portion, 18 multiple quantum well layer, 20 p-type cladding layer, 22 p-type contact layer, 24 buried layer, 26 first buried layer, 28 second buried layer, 30 first Inclined surface, 32 first upright surface, 34 upper surface, 36 first edge, 38 second edge, 40 third edge, 42 recess, 44 first recess, 46 second recess, 48 second slope, 48A second slope surface, 48B second inclined surface, 50 second upright surface, 52 bottom surface, 54 insulating film, 56 notch, 56A notch, 56B notch, 58 electrode film, 60 first portion, 62 second portion, 64 first Connection portion, 66 Second connection portion, 68 Top electrode, 70 Mesa electrode, 72 Extraction electrode, 74 Counter electrode, 76 Through hole, 78A Edge, 78B Edge, 78C Edge, 212 Mesa stripe structure, 244 First recess, 246 No. 2 recess, 256 notch, 344 first recess, 346 second recess 354 insulating film, 356 notch, 358 electrode film, 388 first region, 390 second region, 412 mesa stripe structure, 426 first buried layer, 428 Second buried layer, 442 Recess, 456 Notch, 512 Mesa stripe structure, 526 First buried layer, 528 Second buried layer, 542 Recess, 556 Notch, 612 Mesa stripe structure, 654 Insulating film, 656 Notch, 658 Electrode film, 676 Through hole, 680 Semiconductor laser, 682 Electro-absorption modulator, 684 Waveguide, 692 Modulator electrode, 694 Through hole, D1 first direction, D2 second direction, L straight line.

Claims (19)

a mesa stripe structure extending in a first direction;
The mesa stripe structure is embedded on both sides, each of which has a first inclined surface adjacent to the upper end surface of the mesa stripe structure and obliquely rising from the upper end surface, and each of which has a first inclined surface that slopes obliquely upward from the upper end surface of the mesa striped structure, and a pair of buried layers each having a first upright surface, each having a top surface higher than the top surface of the mesa stripe structure;
an insulating film on the top surface of each of the pair of buried layers while avoiding the top surface of the mesa stripe structure;
an electrode film extending over the upper end surface, the first inclined surface, and the insulating film of the mesa stripe structure;
has
an upper end of the first upright surface extends along the first direction;
The upper surface of at least one of the pair of buried layers has a plurality of recesses,
Each of the plurality of recesses has a second slope that slopes downward from the top surface,
The semiconductor optical device has an upper end of the second inclined surface extending along a second direction orthogonal to the first direction. The semiconductor optical device according to claim 1,
The electrode film includes a first portion on the first slope, a second portion on the second slope, and a first connection portion in front of the first upright surface. ,
The first connection portion is thinner than either the first portion or the second portion of the semiconductor optical device. The semiconductor optical device according to claim 2,
The semiconductor optical device includes a gap between the first connection portion and the first upright surface. The semiconductor optical device according to claim 3,
In the semiconductor optical device, the insulating film overhangs the first upright surface. The semiconductor optical device according to claim 2,
Each of the plurality of recesses further has a second upright surface,
an upper end of the second upright surface extends along the first direction;
The electrode film further includes a second connection portion in front of the second upright surface,
The second connection portion is thinner than either the first portion or the second portion of the semiconductor optical device. The semiconductor optical device according to claim 5,
The semiconductor optical device includes a gap between the second connection portion and the second upright surface. The semiconductor optical device according to claim 6,
In the semiconductor optical device, the insulating film overhangs the second upright surface. The semiconductor optical device according to claim 1,
Each of the plurality of recesses has a bottom surface extending in the first direction from the lower end of the second slope,
The semiconductor optical device is such that the bottom surface is flat and connected to the first inclined surface. The semiconductor optical device according to claim 1,
The pair of buried layers are a first buried layer and a second buried layer each having the plurality of recesses,
The plurality of recesses of the first buried layer are a plurality of first recesses lined up in the first direction,
In the semiconductor optical device, the plurality of recesses of the second buried layer are a plurality of second recesses lined up in the first direction. The semiconductor optical device according to claim 9,
In the semiconductor optical device, the first buried layer and the second buried layer have equal widths in the second direction. The semiconductor optical device according to claim 9,
The plurality of first recesses and the plurality of second recesses are line symmetrical,
A semiconductor optical device, wherein a straight line extending in the first direction on the mesa stripe structure is an axis of symmetry. The semiconductor optical device according to claim 11,
Each of the plurality of first recesses and a corresponding one of the plurality of second recesses are semiconductor optical devices adjacent to each other in the second direction. The semiconductor optical device according to claim 9,
In the semiconductor optical device, the plurality of first recesses and the plurality of second recesses are asymmetrical. The semiconductor optical device according to claim 13,
The plurality of first recesses and the plurality of second recesses are arranged in a staggered manner in the first direction. The semiconductor optical device according to claim 13,
The plurality of first recesses include a pair of first recesses adjacent to each other in the first direction,
a region between the pair of first recesses is adjacent to a corresponding one of the plurality of second recesses in the second direction;
The plurality of second recesses include a pair of second recesses adjacent to each other in the first direction,
A semiconductor optical device in which a region between the pair of second recesses is adjacent to a corresponding one of the plurality of first recesses in the second direction. The semiconductor optical device according to claim 13,
The plurality of first recesses are in a first region of the upper surface of the first buried layer,
the plurality of second recesses are in a second region of the upper surface of the second buried layer;
The first region and the second region are not adjacent to each other in the second direction. The semiconductor optical device according to claim 1,
The pair of buried layers are a first buried layer having the plurality of recesses and a second buried layer not having the plurality of recesses,
In the semiconductor optical device, the first buried layer is larger in width in the second direction than the second buried layer. The semiconductor optical device according to claim 17,
The plurality of recesses of the first buried layer are a pair of recesses,
In the semiconductor optical device, the distance between the pair of recesses is greater than half the length of the first buried layer in the first direction. The semiconductor optical device according to claim 1,
In the semiconductor optical device, the second inclined surfaces are a pair of opposing second inclined surfaces.

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