JP2023164624A - Game machine - Google Patents

Abstract

To provide a game machine capable of suitably performing each kind of control.SOLUTION: Processing corresponding to specific control for progressing a game by utilizing a specific control program and specific control data stored in a main-side ROM 64 is performed by a main-side CPU 63, and processing corresponding to non-specific control for managing a game history by utilizing a non-specific control program and non-specific control data stored in the main-side ROM 64 is performed by the main-side CPU 63. The main-side RAM 65 includes: a specific control work area and a specific control stack area utilized when processing corresponding to specific control is executed; and a non-specific control work area and a non-specific control stack area utilized when processing corresponding to non-specific control is executed. When processing corresponding to non-specific control is started, a flag register in the main-side CPU 63 is cleared to "0".SELECTED DRAWING: Figure 6

Description

The present invention relates to a gaming machine.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section (for example, see Patent Document 1).

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

JP2009-261415A

Here, in gaming machines such as those exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this respect.

The present invention has been made in view of the circumstances exemplified above, and an object of the present invention is to provide a gaming machine that can suitably perform various controls.

In order to solve the above problem, the invention according to claim 1 includes a control means for executing various processes and temporarily storing information in an internal storage means when executing the processes,
The control means is
a first predetermined process execution means for executing a first predetermined process among the various processes;
a second predetermined process execution means for executing a second predetermined process among the various processes;
a flag register provided in the internal storage means when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed; a state setting means for setting the state to a specific state;
It is characterized by having the following.

According to the present invention, it is possible to suitably perform various controls.

It is a perspective view showing a pachinko machine in a first embodiment. FIG. 1 is an exploded perspective view showing the main structure of a pachinko machine. It is a front view showing the structure of a game board. It is an explanatory view for explaining the composition regarding discharge of the game ball which flowed down the game area. FIG. 3 is a front view of the main controller. It is a block diagram showing the electrical configuration of a pachinko machine. FIG. 3 is an explanatory diagram for explaining the contents of various counters used for winning/losing lottery and the like. FIG. 3 is an explanatory diagram for explaining various tables stored in the main side ROM. 3 is a flowchart showing main processing executed by a main CPU. 3 is a flowchart showing a setting value update process executed by the main CPU. 3 is a flowchart showing timer interrupt processing executed by the main CPU. It is a flowchart which shows the special figure special electric control process performed by main side CPU. It is a flowchart showing special symbol fluctuation start processing executed by the main side CPU. FIG. 3 is an explanatory diagram for explaining a configuration in which a detection result of a ball entry detection sensor is input to a main CPU. It is a flowchart which shows the ball entry detection process performed by main side CPU. It is a block diagram for explaining the electrical configuration of a payout control device and various devices that communicate with the payout control device. It is a flowchart showing timer interrupt processing executed by the payout side CPU. FIG. 2 is a block diagram for explaining the electrical configuration of a management IC. FIG. 2 is an explanatory diagram for explaining the configuration of an input port of a management side I/F. FIG. 3 is an explanatory diagram for explaining the configuration of a correspondence memory. FIG. 2 is an explanatory diagram for explaining the configuration of a history memory. It is a flowchart which shows the recognition process performed by main side CPU. 3 is a flowchart showing management processing executed by a management CPU. (a) to (d) are time charts showing how information on the correspondence between the first to fifteenth buffers and the types of signals is stored in the correspondence memory; 3 is a flowchart showing management output processing executed by the main CPU. 3 is a flowchart showing history setting processing executed by a management CPU. (a) to (e) are time charts showing how history information is stored in the history memory. 3 is a flowchart showing output processing of a setting value update signal executed by the main CPU. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. 3 is a flowchart showing display output processing executed by a management CPU. 3 is a flowchart showing display processing executed by a management CPU. (a) It is a flowchart which shows the process for data output performed by main side CPU, (b) It is a flowchart which shows the process for external output performed by management side CPU. FIG. 7 is an explanatory diagram for explaining various tables stored in the main side ROM in the second embodiment. FIG. 7 is an explanatory diagram for explaining the configuration of a separate storage memory in a third embodiment. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. 12 is a flowchart showing repeated change monitoring processing executed by the management CPU. 12 is a flowchart illustrating repeated change monitoring processing executed by the main CPU in the fourth embodiment. 12 is a flowchart illustrating a setting update recognition process executed by a management CPU in the fifth embodiment. It is an explanatory view for explaining the composition of memory for history in a 6th embodiment. 3 is a flowchart showing history setting processing executed by a management CPU. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. It is an explanatory view for explaining the composition of memory for history in a 7th embodiment. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. It is an explanatory view for explaining the composition of history memory in an 8th embodiment. 3 is a flowchart illustrating a setting update recognition process executed by a management CPU. 3 is a flowchart showing history setting processing executed by a management CPU. 3 is a flowchart showing display output processing executed by a management CPU. FIG. 12 is an explanatory diagram for explaining the configuration of an input port of a management side I/F in a ninth embodiment. It is a flowchart which shows the recognition process performed by main side CPU. 3 is a flowchart showing management processing executed by a management CPU. 5A to 5H are time charts showing how information on the correspondence between the first to twelfth buffers and signal types is stored in the correspondence memory; FIG. 12 is a block diagram for explaining the configuration of a signal path for transmitting the detection results of each ball entry detection sensor to the main CPU and management IC in the tenth embodiment. It is a front view of the main control device in an 11th embodiment. FIG. 2 is a block diagram illustrating an electrical configuration for performing various displays on the first to fourth notification display devices based on the control of the MPU. 3 is a flowchart showing display processing executed by a management CPU. 3 is a flowchart showing a setting value update process executed by the main CPU. (a) It is an explanatory diagram for explaining the display mode of the first to fourth notification display devices when the management results of game history are displayed, and (b) When the setting state of the pachinko machine is changed. FIG. 7 is an explanatory diagram for explaining the display mode of the first to fourth notification display devices. (a) to (h) are time charts showing how the first to fourth notification display devices enter the display state. (a) It is an explanatory view for explaining the composition of the 1st information display device in a 12th embodiment, and (b) is an explanatory diagram for explaining the composition of the 2nd information display device. The first notification display device when displaying the game history management results on the first to fourth notification display devices and when displaying that the setting state of the pachinko machine is in a changeable state. and FIG. 7 is an explanatory diagram for explaining the display contents of the second notification display device. 3 is a flowchart showing a setting value update process executed by the main CPU. FIG. 12 is an explanatory diagram for explaining the configuration of an abnormality display area in the thirteenth embodiment. 3 is a flowchart showing an abnormality setting process executed by the main CPU. 3 is a flowchart showing an abnormality display process executed by the main CPU. 12 is a flowchart showing management output processing executed by the main CPU in the fourteenth embodiment. It is a flowchart which shows the main processing performed by the main side CPU in another form. FIG. 12 is an explanatory diagram for explaining a program and data setting mode of the main side ROM in the fifteenth embodiment. FIG. 3 is an explanatory diagram for explaining the setting manner of each area in the main side RAM. 3 is a flowchart showing timer interrupt processing executed by the main CPU. 3 is a flowchart showing management processing executed by the main CPU. 3 is a flowchart showing management execution processing executed by the main CPU. It is an explanatory diagram for explaining various areas of a work area for non-specific control used to manage game history. 3 is a flowchart showing a check process executed by the main CPU. It is a flowchart which shows the normal ball entry management process performed by main side CPU. 3 is a flowchart showing result calculation processing executed by the main CPU. 3 is a flowchart showing display processing executed by the main CPU. 12 is a flowchart showing management processing executed by the main CPU in the sixteenth embodiment. 12 is a flowchart showing management execution processing executed by the main CPU in the seventeenth embodiment. 12 is a flowchart showing management execution processing executed by the main CPU in the eighteenth embodiment. 12 is a flowchart showing management execution processing executed by the main CPU in the nineteenth embodiment. 12 is a flowchart showing management processing executed by the main CPU in the twentieth embodiment. 3 is a flowchart showing management execution processing executed by the main CPU. FIG. 7 is an explanatory diagram for explaining the electrical configuration in the twenty-first embodiment. 12 is a flowchart showing main processing executed by a main CPU in the twenty-second embodiment. 3 is a flowchart showing a setting value update process executed by the main CPU. 3 is a flowchart showing timer interrupt processing executed by the main CPU. 3 is a flowchart showing a setting confirmation process executed by the main CPU. 3 is a flowchart showing RAM monitoring processing executed by the main CPU. It is a flowchart which shows the main processing performed by the main side CPU in another form. It is a flowchart which shows the setting value update process performed by the main side CPU in another form. 12 is a flowchart showing main processing executed by a main CPU in the twenty-third embodiment. 13 is a flowchart showing RAM monitoring processing executed by the main CPU in the twenty-fourth embodiment. 13 is a flowchart showing RAM monitoring processing executed by the main CPU in the twenty-fifth embodiment. 3 is a flowchart showing management execution processing executed by the main CPU. 12 is a flowchart showing another monitoring process executed by the main CPU. 13 is a flowchart showing management processing executed by the main CPU in the twenty-sixth embodiment. 12 is a flowchart showing management processing executed by the main CPU in the twenty-seventh embodiment. 13 is a flowchart showing management processing executed by the main CPU in the twenty-eighth embodiment. 13 is a flowchart showing management processing executed by the main CPU in the twenty-ninth embodiment. 13 is a flowchart showing main processing executed by the main CPU in the 30th embodiment. 3 is a flowchart showing a power outage information storage process executed by the main CPU. (a) It is a block diagram for explaining the configuration of the MPU, and (b) is a time chart showing how the reset signal is output by the reset signal output section. 3 is a flowchart showing timer interrupt processing executed by the main CPU. 3 is a flowchart showing a setting monitoring process executed by the main CPU. 3 is a flowchart showing management processing executed by the main CPU. 3 is a flowchart showing management execution processing executed by the main CPU. 12 is a flowchart showing another monitoring process executed by the main CPU. 12 is a flowchart showing main processing executed by the main CPU in the 31st embodiment. 3 is a flowchart illustrating a clearing process in the event of an abnormality, which is executed by the main CPU. 3 is a flowchart showing a clearing process for non-specific control executed by the main CPU. 12 is a flowchart showing a power outage information storage process executed by the main CPU in the 32nd embodiment. 3 is a flowchart showing checksum monitoring processing executed by the main CPU. 3 is a flowchart showing a clearing process for non-specific control executed by the main CPU. 13 is a flowchart showing main processing executed by the main CPU in the 33rd embodiment. 3 is a flowchart showing a setting confirmation process executed by the main CPU. 3 is a flowchart showing a setting value update process executed by the main CPU. 3 is a flowchart showing a first timer interrupt process executed by the main CPU. 3 is a flowchart showing a setting monitoring process executed by the main CPU. FIG. 2 is a block diagram illustrating a configuration for controlling display of various display circuits by a main CPU. (a) An explanatory diagram for explaining various buffers provided in a work area for specific control, and (b) an explanatory diagram for explaining various storage areas provided in a work area for non-specific control. be. FIG. 2 is an explanatory diagram for explaining the electrical configuration of a display IC. (a) to (g) Show how type data and display data are transmitted from the main CPU to the display IC, and the display data transmitted from the display IC is received by the first display circuit or the second display circuit. This is a time chart. 3 is a flowchart showing second timer interrupt processing executed by the main CPU. (a) It is an explanatory diagram for explaining the display contents of the first to fourth notification display devices in a situation where a setting value is updated, and (b) the first to fourth notifications in a situation where a setting value is confirmed. FIG. 3 is an explanatory diagram for explaining display contents of a display device for use in a computer. 12 is a flowchart showing a setting value update process executed by the main CPU in the 34th embodiment.

<First embodiment>
Hereinafter, a first embodiment of a pachinko game machine (hereinafter referred to as a "pachinko machine"), which is a type of gaming machine, will be described in detail based on the drawings. FIG. 1 is a perspective view of a pachinko machine 10, and FIG. 2 is an exploded perspective view showing the main components of the pachinko machine 10. In addition, in FIG. 2, the structure within the gaming area PA of the pachinko machine 10 is omitted for convenience.

As shown in FIG. 1, the pachinko machine 10 includes an outer frame 11 that forms the outer shell of the pachinko machine 10, and a gaming machine main body 12 that is attached to the outer frame 11 so as to be rotatable forward. have The outer frame 11 is constructed by connecting wooden boards on four sides, and has a rectangular frame shape. The pachinko machine 10 is installed in a game hall by attaching and fixing the outer frame 11 to island equipment. It should be noted that the outer frame 11 is not an essential component of the pachinko machine 10, and the outer frame 11 may be provided in an island facility of a game hall.

As shown in FIG. 2, the gaming machine main body 12 includes an inner frame 13, a front door frame 14 disposed in front of the inner frame 13, and a back pack unit 15 disposed behind the inner frame 13. ing. An inner frame 13 of the gaming machine main body 12 is rotatably supported by the outer frame 11. Specifically, when viewed from the front, the inner frame 13 is rotatable forward with the left side being the rotation base end side and the right side being the rotation tip side.

A front door frame 14 is rotatably supported by the inner frame 13, and can be rotated forward with the left side as the rotation base end and the right side as the rotation tip end when viewed from the front. Further, a back pack unit 15 is rotatably supported by the inner frame 13, and is rotatable rearward with the left side as the rotation base end and the right side as the rotation tip end when viewed from the front.

The gaming machine main body 12 is provided with a locking device at its rotating tip, and has a function of locking the gaming machine main body 12 against the outer frame 11 so that it cannot be opened. It has a function of locking the door frame 14 with respect to the inner frame 13 so that it cannot be opened. Each of these locked states is released by performing an unlocking operation using an unlocking key on the cylinder lock 17 provided in an exposed manner on the front surface of the pachinko machine 10.

Next, the configuration of the front side of the gaming machine main body 12 will be explained.

The inner frame 13 is mainly composed of a resin base 21 whose outer shape is substantially the same as that of the outer frame 11. A substantially elliptical window hole 23 is formed in the center of the resin base 21 . A game board 24 is detachably attached to the resin base 21. The game board 24 is made of plywood, and the game area PA formed on the front surface of the game board 24 is exposed to the front side of the inner frame 13 through the window hole 23 of the resin base 21.

Here, the configuration of the game board 24 will be explained based on FIG. 3. FIG. 3 is a front view of the game board 24.

An inner rail part 25 and an outer rail part 26 are attached to the game board 24 so as to partition a part of the outer edge of the game area PA, and the inner rail part 25 and the outer rail part 26 provide a guide means. The guide rail is configured as follows. A game ball fired from a game ball firing mechanism 27 (see FIG. 2) attached below the window hole 23 in the resin base 21 is guided to the upper part of the game area PA by a guide rail.

Incidentally, the game ball firing mechanism 27 includes a firing rail 27a that extends toward the guide rail, a ball feeding device 27b that supplies game balls stored in an upper tray 55a (described later) onto the firing rail 27a, and a ball feeding device 27b that supplies game balls stored in an upper tray 55a (described later) onto the firing rail 27a. The solenoid 27c is an electric actuator that fires the game balls supplied to the guide rail toward the guide rail. When the firing operation device (or operation handle) 28 provided on the front door frame 14 is rotated, the solenoid 27c is driven and controlled, and the game ball is fired.

The game board 24 is formed with a plurality of large and small openings passing through it in the front and back direction. Each opening is provided with a general winning opening 31, a special winning winning device 32, a first operating opening 33, a second operating opening 34, a through gate 35, a variable display unit 36, a special drawing unit 37, a general drawing unit 38, etc. ing. A total of four general winning holes 31 are provided, and one each is provided for the others.

Even if a ball enters the through gate 35, the payout of the game ball is not executed. On the other hand, when a ball enters the general winning hole 31, the special electric winning device 32, the first operating hole 33, and the second operating hole 34, a predetermined number of game balls are paid out. Specifically, regarding the number of prize balls, if one game ball enters the first operating port 33 or one game ball enters the second operating port 34, In this case, when one game ball is paid out and one game ball enters the general winning hole 31, ten prize balls are paid out and sent to the special electric winning device 32. When one game ball enters the ball, 15 prize balls are paid out.

Note that the number of prize balls is arbitrary, and for example, the second operating port 34 may have a smaller number of prize balls than the first operating port 33, and the second operating port 34 may have a smaller number of winning balls than the first operating port 33. It is also possible to have a configuration in which the number of prize balls is greater than 33.

In addition, an out port 24a is provided at the bottom of the game board 24, and game balls that have not entered various winning ports are discharged from the gaming area PA through the out port 24a. Further, the game board 24 has a large number of nails 24b planted therein in order to appropriately disperse and adjust the falling direction of the game balls, and various members such as a windmill are also arranged.

Here, entering the ball means that the game ball passes through a predetermined opening, and not only the manner in which the game ball is ejected from the game area PA after passing through the opening, but also the manner in which the game ball is ejected from the game area PA after passing through the opening. It also includes a mode in which the fluid continues to flow down the gaming area PA without being discharged. However, in the following explanation, in order to clearly distinguish from the entry of the game ball into the out port 24a, the general winning hole 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the through gate 35 will be used. The landing of a game ball into a ball is also expressed as winning a prize.

The first operating port 33 and the second operating port 34 are installed in the game board 24 as a unit as an operating port device. Both the first operating port 33 and the second operating port 34 are open upward. Further, both the operating ports 33 and 34 are arranged in the vertical direction with the first operating port 33 facing upward. The second actuating port 34 is provided with a general electric accessory 34a as a guide piece consisting of a pair of left and right movable pieces. When the electric utility object 34a is in the closed state, the game ball cannot enter the second operating port 34, and when the general electric accessory 34a is in the open state, it is possible to enter the second operating hole 34.

A through gate 35 is provided on the upstream side of the second operating port 34 in the downstream direction of the game ball. The through gate 35 has a through hole (not shown) that passes through the through gate 35 in the vertical direction, and the game ball that enters the through gate 35 flows down the gaming area PA after winning the prize. Thereby, the game ball that has entered the through gate 35 can enter the second operating port 34.

Based on the winning in the through gate 35, the general electric accessory 34a of the second operating port 34 is switched from the closed state to the open state. Specifically, an internal lottery is held triggered by winning in the through gate 35, and a general figure display of the normal figure unit 38 provided in the lower right corner, which is an area where the game ball does not pass through in the gaming area PA. A changing display of the picture is performed in the section 38a. Then, when the result of the internal lottery is a power open winning, a stop result corresponding to the result is displayed, and the fluctuating display of the general figure display section 38a is ended, the state shifts to the general electric power open state. In the general power open state, the general power accessory 34a is in the open state in a predetermined manner.

Note that the general figure display section 38a is constituted by a segment display in which a plurality of display segments using LEDs are arranged in a predetermined manner, but is not limited to this, and may be a liquid crystal display device, an organic EL display device, etc. It may also be constituted by a display device, CRT or other type of display device such as a dot matrix display. In addition, the patterns that are variably displayed on the general figure display section 38a include a configuration in which multiple types of characters are variably displayed, a configuration in which multiple types of symbols are variably displayed, a configuration in which multiple types of characters are variably displayed, or A configuration in which multiple types of colors are switched and displayed is conceivable.

In the general drawing unit 38, a general drawing holding display section 38b is provided at a position adjacent to the general drawing display section 38a. The number of game balls that have entered the through gate 35 is reserved up to a maximum of four, and the number of reserved balls is displayed by lighting the regular game reservation display section 38b.

A winning lottery is held using the win at the first operating port 33 or the second operating port 34 as a trigger. Then, the lottery result is clearly displayed through the display effect on the symbol display device 41 of the special symbol unit 37 and the variable display unit 36.

Specifically regarding the special figure unit 37, the special figure unit 37 is provided with a special figure display section 37a. The display area of the special figure display section 37a is narrower than the display surface 41a of the symbol display device 41. In the special figure display section 37a, a winning lottery is performed using a prize winning in the first operating port 33 or a winning in the second operating port 34 as a trigger, so that a variable display of symbols or a predetermined display is performed. Then, the results corresponding to the lottery results are displayed. Note that the special figure display section 37a is constituted by a segment display in which a plurality of display segments using LEDs are arranged in a predetermined manner, but is not limited to this, and may be a liquid crystal display device, an organic EL display device, etc. It may also be constituted by a display device, CRT or other type of display device such as a dot matrix display. In addition, the designs displayed on the special figure display section 37a include a configuration in which multiple types of characters are displayed, a configuration in which multiple types of symbols are displayed, a configuration in which multiple types of characters are displayed, or a configuration in which multiple types of colors are displayed. Possible configurations include a configuration where .

In the special figure unit 37, a special figure pending display section 37b is provided at a position adjacent to the special figure display section 37a. The number of game balls entered into the first operating port 33 or the second operating port 34 is reserved up to a maximum of four, and the number of reserved balls is displayed by lighting the special symbol reservation display section 37b.

In detail about the symbol display device 41, the symbol display device 41 is configured as a liquid crystal display device including a liquid crystal display, and the display contents are controlled by a display control device to be described later. Note that the symbol display device 41 is not limited to a liquid crystal display device, and may be another display device having a display screen such as a plasma display device, an organic EL display device, or a CRT, and may also be a dot matrix display device. It's okay.

In the symbol display device 41, when a variable display of a symbol or a predetermined display is performed on the special symbol display section 37a based on a winning at the first operating port 33 or a winning at the second operating port 34, the symbol is changed accordingly. A variable display or a predetermined display is performed. For example, on the display surface 41a of the symbol display device 41, three symbol rows of an upper row, a middle row, and a lower row are set as a plurality of display areas, and in each symbol row, a main character numbered from "1" to "9" is set. The symbols are scrolled and displayed in ascending or descending order. In this scroll display, scrolling display for all symbol rows is first started, and then the scroll display is switched to standby display in the order of upper symbol row → lower symbol row → middle symbol row, and finally a predetermined display is displayed in each symbol row. The process ends with the symbol displayed statically. In a game round in which the game result is a jackpot, a combination of predetermined symbols is stopped and displayed on the active line set in advance on the display surface 41a of the symbol display device 41. Specifically, in the case of the most profitable jackpot result, which will be described later, the same odd-numbered symbol combination will be stopped and displayed, and in the case of a low-probability jackpot result, which will be described later, the same even-numbered symbol combination will be stopped and displayed. If the result is a low win/high probability jackpot result, the combination of symbols is not the same symbol combination, but the combination of symbols that would not be stopped and displayed if the result is not a low win/high probability jackpot result is stopped and displayed.

In addition, in the symbol display device 41, not only the display effect triggered by winning to the first operating port 33 or the second operating port 34, but also the display effect during the opening/closing execution mode that shifts after winning is performed. be exposed. In addition, based on winning to either of the actuating ports 33, 34, the display starts on the special symbol display section 37a and the symbol display device 41, and the period from displaying a predetermined result to ending is one game round. equivalent to times. Further, the manner in which the symbols are displayed in a variable manner in the symbol display device 41 is not limited to the above-mentioned one, and may be arbitrary, such as the number of symbol rows, the direction of the variable display of symbols in the symbol rows, the number of symbols in each symbol row, etc. can be changed as appropriate. Further, the symbols displayed in a variable manner on the symbol display device 41 are not limited to the above-mentioned symbols, and for example, only numbers may be displayed in a variable manner as the symbols.

If a jackpot is won in the winning lottery based on winning to the first operating port 33 or winning to the second operating port 34, a transition is made to an opening/closing execution mode in which winning to the special electric winning device 32 is possible. The special electric winning device 32 is equipped with a grand prize opening (not shown) that leads to the back side of the game board 24, and is also provided with an opening/closing door 32a that opens and closes the grand prize opening. The opening/closing door 32a is placed in either a closed state or an open state. Specifically, the opening/closing door 32a is normally in a closed state in which game balls cannot win prizes, but if the transition to the opening/closing execution mode is won in the internal lottery, it can be switched to the open state in which game balls can win prizes. It has become. Incidentally, the opening/closing execution mode is a mode to which the game will transition in the event of a winning result. Note that in the closed state, it is not impossible to win a prize, but it may be configured to be in a state in which it is more difficult to win a prize than in the open state.

FIG. 4 is an explanatory diagram for explaining the configuration regarding the discharge of game balls that have flown down the game area PA.

As already explained, the game ball that enters any of the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a is ejected from the gaming area PA. In other words, the game ball ejected from the game ball launch mechanism 27 and flowing into the game area PA is either the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, or the out port 24a. By entering the ball, the ball will be ejected from the gaming area PA. A game ball that enters any of the general winning opening 31, special electric winning device 32, first operating opening 33, second operating opening 34, and out opening 24a is guided to the back side of the gaming board 24.

On the back side of the game board 24, discharge passages 42 to 48 are formed in correspondence with the general winning opening 31, the special winning winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a, respectively. . The game balls that have flowed into the discharge passages 42 to 48 flow down the discharge passages 42 to 48 into which they have flowed, and are guided to the lower end of the game board 24 on the back side of the game board 24, and then to the discharge ball collection part (not shown). will be collected. Then, the game balls collected by the discharged ball collection section are discharged to a ball circulation device of the island equipment in which the pachinko machine 10 is installed in the game hall.

Each of the discharge passages 42 to 48 is provided with various detection sensors 42a to 48a for detecting game balls. The discharge passage sections 42 to 48 and the detection sensors 42a to 48a will be explained below. As described above, there are four general winning openings 31, so there are discharge passages 42 to 44 corresponding to each of the four openings. In this case, one detection sensor 42a, 43a is provided. Specifically, the first winning a prize opening detection sensor 42a is provided so that the detection range exists in the middle of the first discharge passage part 42, and the detection range exists in the middle of the second discharge passage part 43. A second winning opening detection sensor 43a is provided so as to exist. The game ball that entered the leftmost general winning hole 31 is detected by the first winning hole detection sensor 42a while passing through the first discharge passage section 42, and the game ball that entered the general winning hole 31 on the right side The ball is detected by the second prize opening detection sensor 43a while passing through the second discharge passage section 43. In addition, a third discharge passage portion 44 is provided for the two right-side general winning ports 31 so as to merge at an intermediate position. The third discharge passage section 44 has an inlet side area corresponding to each of the two general winning ports 31, and has one outlet side area by merging the inlet side areas in the middle. are doing. The third winning a prize opening detection sensor 44a is provided so that a detection range exists in the middle of the exit side area of the third discharge passage section 44. A game ball that enters one of the two general winning holes 31 on the right side is detected by the third winning hole detection sensor 44a while passing through the third discharge passage section 44.

A fourth discharge passage section 45 is provided corresponding to the special electric prize winning device 32. A special electric detection sensor 45a is provided so that a detection range exists in the middle of the fourth discharge passage part 45, and the game ball that enters the special electric winning device 32 is on the way to pass through the fourth discharge passage part 45. It is detected by the special electric detection sensor 45a. A fifth discharge passage portion 46 is provided corresponding to the first operating port 33 . A first operation port detection sensor 46a is provided so that a detection range exists in the middle of the fifth discharge passage section 46, and the game ball that enters the first operation port 33 passes through the fifth discharge passage section 46. While passing, it is detected by the first operating port detection sensor 46a. A sixth discharge passage portion 47 is provided corresponding to the second operating port 34 . A second operating port detection sensor 47a is provided so that a detection range exists in the middle of the sixth discharge passage portion 47, and the game ball that enters the second operating port 34 passes through the sixth discharge passage portion 47. While passing, it is detected by the second operating port detection sensor 47a. A seventh discharge passage portion 48 is provided corresponding to the out port 24a. An out-port detection sensor 48a is provided so that a detection range exists in the middle of the seventh discharge passage section 48, and the game ball that enters the out-port 24a is on the way to pass through the seventh discharge passage section 48. It is detected by the outlet detection sensor 48a.

Note that a game ball that is detected by any one of the various detection sensors 42a to 48a will not be detected by any of the other detection sensors 42a to 48a. Further, a gate detection sensor 49a is also provided for the through gate 35, and a game ball passing through the through gate 35 while flowing down the gaming area PA is detected by the gate detection sensor 49a.

Although electromagnetic induction type proximity sensors are used as the various detection sensors 42a to 49a, any sensor can be used as long as the game balls can be detected individually. Further, the various detection sensors 42a to 49a are electrically connected to a main control device 60, which will be described later, and the detection results of the various detection sensors 42a to 49a are output to the main control device 60. Specifically, the various detection sensors 42a to 49a output a LOW level signal when a game ball is not detected, and output a HI level signal when a game ball is detected. Note that the present invention is not limited to this, and the relationship between HI and LOW may be reversed.

As shown in FIG. 2, a front door frame 14 is provided so as to cover the entire front side of the inner frame 13 in which the game board 24 configured as described above is attached to the resin base 21. As shown in FIG. 1, the front door frame 14 is formed with a window 51 that allows almost the entire area of the gaming area PA to be viewed from the front. The window portion 51 has a substantially elliptical shape, and a window panel 52 is fitted therein. The window panel 52 is made of glass to be colorless and transparent, but is not limited to this, and may be made of synthetic resin to be colorless and transparent. It may be colored and transparent as long as it is visible.

A display light emitting section 53 is provided above the window section 51. Further, a pair of left and right speaker sections 54 are provided to output sound effects and the like according to the gaming state. Further, below the window portion 51, an upper bulging portion 55 and a lower bulging portion 56, which bulge toward the front side, are arranged vertically in parallel. An upper plate 55a that opens upward is provided inside the upper bulging portion 55, and a lower plate 56a that similarly opens upward is provided inside the lower bulging portion 56. The upper tray 55a has a function of temporarily storing game balls put out from a payout device described later and guiding them to the game ball firing mechanism 27 side while arranging them in a line. Further, the lower tray 56a has a function of storing surplus game balls in the upper tray 55a.

Next, the configuration of the back side of the gaming machine main body 12 will be explained.

As shown in FIG. 2, a main control device 60 that controls the main control of the game is mounted on the back side of the inner frame 13 (specifically, the game board 24). FIG. 5 is a front view of the main controller 60.

As shown in FIG. 5, the main control device 60 includes a main control board 61 housed in a board box 60a. An MPU 62 is mounted on an element mounting surface, which is one board surface of the main control board 61. The board box 60a is formed transparent so that the MPU 62 housed in the board box 60a can be visually observed from the outside of the board box 60a. Note that although the board box 60a is formed to be colorless and transparent, it may be formed to be colored and transparent as long as it is possible to visually observe the MPU 62 housed in the board box 60a from outside the board box 60a. The main control device 60 is mounted on the back surface of the resin base 21 in a board box 60a such that an opposing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10. Therefore, by opening the gaming machine main body 12 forward of the pachinko machine 10 with respect to the outer frame 11 and exposing the back surface of the resin base 21, it becomes possible to visually see the opposing wall 60b of the board box 60a, and It becomes possible to visually observe the MPU 62 through the opposing wall portion 60b.

The board box 60a is formed by combining a plurality of case bodies 60c back and forth, and these plurality of case bodies 60c prevent separation of these case bodies 60c and leave traces when these case bodies 60c are separated. A connecting portion 60e is provided for leaving a . A plurality of coupling portions 60e are arranged in parallel on one side of the substantially rectangular parallelepiped substrate box 60a. As a result, even if some of the joints 60e are destroyed and the case body 60c is separated in a state in which separation of the case body 60c is prevented using some joints 60e, another joint By bringing the portion 60e into the connected state, it becomes possible to prevent the case body 60c from being separated again. Furthermore, since the joint 60e is destroyed when the case body 60c is separated and traces thereof remain, it is possible to visually check the joint 60e to determine whether or not the case body 60c has been illegally separated. It becomes possible. Furthermore, a seal 60f is pasted on one side of the board box 60a opposite to the side on which the joint portions 60e are arranged so as to straddle the boundary between the case bodies 60c. When the sealing seal 60f is peeled off, an adhesive layer remains on the case body 60c. Thereby, when the seal 60f is peeled off when the case body 60c is separated, it is possible to leave a trace of the seal 60f.

In the main control device 60 having the above configuration, the main control board 61 includes a board owned by the game hall manager in order to generate an opportunity to change the setting state of the pachinko machine 10 in the range of "setting 1" to "setting 6". A setting key insertion section 68a into which a setting key is inserted and turned ON, an update button 68b operated to sequentially change the setting state of the pachinko machine 10 after the setting key insertion section 68a is turned ON, and a main controller. A reset button 68c that is operated to clear data in a main side RAM 65, which will be described later, is provided in the MPU 62 of 60, and first to third notification display devices 69a to 69c to notify the management results of game history. , is provided. In addition, a connection terminal of an external device is connected to the MPU 62 mounted on the main control board 61 in order to read the management results of game history or the information (programs and data) stored in the main side ROM 64 with the external device. A reading terminal 68d is provided for reading. Note that the setting state of the pachinko machine 10 is not limited to the six stages of "Setting 1" to "Setting 6", but can be any number of stages.

These setting key insertion section 68a, update button 68b, reset button 68c, reading terminal 68d (that is, MPU 62), and first to third notification display devices 69a to 69c are all provided on the element mounting surface of the main control board 61. ing. Further, as already explained, the element mounting surface of the main control board 61 faces the opposing wall 60b of the board box 60a, but the setting key insertion part 68a, update button 68b, reset button 68c, and reading terminal 68d face each other. It is not covered by the wall portion 60b. That is, the opposing wall portion 60b has separate openings in areas facing each of the setting key insertion portion 68a, the update button 68b, the reset button 68c, and the reading terminal 68d. Thereby, it is possible to insert a setting key into the setting key insertion part 68a without having to open the board box 60a, it is possible to press the update button 68b, and it is possible to press the reset button 68c. It is possible to connect a connection terminal of an external device to the reading terminal 68d.

By inserting the setting key into the setting key insertion part 68a and rotating it in a predetermined direction, the setting key insertion part 68a is turned on. By starting the supply of operating power to the pachinko machine 10 in this state (that is, by starting the supply of operating power to the MPU 62 of the main controller 60), it is possible to change the setting state of the pachinko machine 10. The state becomes changeable. In this state, each time the update button 68b is pressed once, the setting state of the pachinko machine 10 is changed one step at a time in ascending order within the range of "setting 1" to "setting 6." Note that if the update button 68b is operated in the state of "Setting 6", the state is updated to "Setting 1". In addition, by rotating the setting key inserted in the setting key insertion part 68a from the ON operation position in the opposite direction to the predetermined direction and returning it to the initial position, the setting key insertion part 68a can be turned OFF. Become. When the setting key insertion section 68a is turned off, the changeable state ends, and it becomes possible to play the game with the current setting values. In other words, even if the update button 68b is operated after the changeable state ends, the set value cannot be changed.

The ON operation for the setting key insertion section 68a is valid only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main controller 60 is started). Therefore, even if the setting key insertion section 68a is turned on after the process at the start of supply of operating power is completed in the MPU 62 of the main control device 60, the setting value cannot be changed.

The setting state of the pachinko machine 10 determines the advantage per unit time of the pachinko machine 10, and the larger the value of "setting n" (n is an integer from "1" to "6") (that is, the setting The higher the value), the higher the advantage. Details will be described later, but there are two lottery modes that determine the probability of winning a jackpot: a low probability mode in which the probability of winning is relatively low, and a high probability mode in which the probability of winning is relatively high. It is set so that the higher the probability, the higher the probability of winning a jackpot result in the low probability mode. On the other hand, regardless of the setting value, the winning probability of the jackpot result in the high probability mode is constant.

The reset button 68c is operated to clear the data in the main RAM 65 as described above, but in order to clear the data, operating power must be supplied to the pachinko machine 10 while the reset button 68c is pressed. (In other words, it is necessary to start supplying operating power to the MPU 62 of the main controller 60). The ON operation on the reset button 68c is enabled only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main controller 60 is started). Therefore, even if the reset button 68c is pressed after the MPU 62 of the main controller 60 completes the processing at the start of supply of operating power, the data in the main RAM 65 cannot be cleared.

As already explained, the reading terminal 68d is connected to the connection terminal of the external device in order to read the gaming history management results or the information (programs and data) stored in the main ROM 64 with the external device. In order to perform external output to the pachinko machine 10, it is necessary to start supplying operating power to the pachinko machine 10 with the connection terminal of the external device connected to the reading terminal 68d (i.e., the operation of the main controller 60 to the MPU 62). (need to start power supply). The connection of an external device to the reading terminal 68d is enabled only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main controller 60 is started). Therefore, even if an external device is connected to the reading terminal 68d after the MPU 62 of the main control device 60 completes the processing at the start of supply of operating power, no external output is performed to the external device.

Each of the first to third notification display devices 69a to 69c is a segment display device in which seven LED display segments are arranged, but the present invention is not limited to this. It may be a light emitting body, a liquid crystal display device, or an organic EL display. The first to third notification display devices 69a to 69c are all installed so that their display surfaces face the direction in which the element mounting surface of the main control board 61 faces, and are mounted on the opposing wall 60b of the board box 60a. covered. In this case, since the board box 60a is transparent, the display surfaces of the first to third notification display devices 69a to 69c housed in the board box 60a can be visually observed from the outside of the board box 60a. becomes possible. Further, as already explained, the main control device 60 is mounted on the back surface of the resin base 21 in the board box 60a so that the opposing wall portion 60b facing the element mounting surface of the main control board 61 faces toward the rear of the pachinko machine 10. Therefore, when the gaming machine main body 12 is opened to the front of the pachinko machine 10 relative to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to third notifications are transmitted through the opposing wall portion 60b. It becomes possible to visually check the display surfaces of the display devices 69a to 69c.

On the display surface of the first notification display device 69a, not only numbers "0" to "9" but also various characters including alphabetical characters are displayed. On the other hand, numbers "0" to "9" are displayed on the second notification display device 69b and the third notification display device 69c. The game history management results are notified using the first to third notification display devices 69a to 69c, and the contents of this notification will be explained in detail later. Further, in a changeable state in which the setting state of the pachinko machine 10 can be changed, a value corresponding to the current setting value is displayed on the third notification display device 69c. Note that the value corresponding to the set value may be displayed on the first notification display device 69a, or may be displayed on the second notification display device 69b. In addition, the setting value before the changeable state is displayed on one of the first to third notification display devices 69a to 69c, and the current setting value is displayed on the first to third notification display device. The information may be displayed on another one of the notification display devices 69a to 69c.

As shown in FIG. 2, the back pack unit 15 is installed to cover the back side of the inner frame 13 including the main controller 60. The back pack unit 15 includes a back pack 72 made of transparent synthetic resin, and a payout mechanism section 73 and a control device assembly unit 74 are attached to the back pack 72.

The payout mechanism section 73 includes a tank 75 to which game balls supplied from the island equipment of the game hall are sequentially replenished, and a payout device 76 for paying out the game balls stored in the tank 75. The game balls put out by the payout device 76 are delivered to the upper tray 55a or the lower tray 56a through a payout passage provided on the downstream side of the payout device 76. The dispensing mechanism section 73 is supplied with a main power source of, for example, 24 volts AC, and is equipped with a back pack board having a power switch for turning the power on and off.

The control device assembly unit 74 includes a payout control device 77 that has a function of controlling the payout device 76, and a predetermined amount of power required by various control devices, etc., is generated and outputted, and is also used to generate and output electricity when the player operates the firing operation device 28. A power supply/launch control device 78 is provided to control the launch of the game ball. The payout control device 77 and the power supply/launch control device 78 are arranged one on top of the other so that the payout control device 77 is located at the rear of the pachinko machine 10.

<Electrical configuration of pachinko machine 10>
FIG. 6 is a block diagram showing the electrical configuration of the pachinko machine 10.

The main control device 60 includes a main control board 61 that controls the main control of the game, and a power outage monitoring board 67 that monitors the power supply. The main control board 61 is equipped with an MPU 62 . The MPU 62 includes a main CPU 63, which is an arithmetic processing device including a control section and a calculation section, as well as a main ROM 64, a main RAM 65, and a management IC 66. In addition to the above elements, the MPU 62 includes an interrupt circuit, a timer circuit, a data input/output circuit, various counter circuits as a random number generator, and the like.

The main ROM 64 is a memory such as a NOR flash memory or a NAND flash memory that does not require an external power supply to retain memory (ie, nonvolatile storage means), and is used for reading only. The main side ROM 64 stores various control programs and fixed value data executed by the main side CPU 63.

The main RAM 65 is a memory such as SRAM and DRAM (ie, volatile storage means) that requires an external power supply to maintain memory, and is used for both reading and writing. The main side RAM 65 can be randomly accessed, and when compared with the same data capacity, the time required for reading is faster than the main side ROM 64. The main RAM 65 temporarily stores various data for execution of the control program stored in the main ROM 64.

The management IC 66 is a management device that manages game history based on information supplied from the main CPU 63. Although details will be described later, the management IC 66 grasps the entry history of game balls into the general prize opening 31, the special electric prize winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a, and In accordance with the grasped ball entry history, the frequency of balls entering the general winning hole 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is grasped. In addition, the frequency of occurrence of the opening/closing execution mode and the high-frequency support mode, which will be described later, is grasped by the management IC 66.

The MPU 62 is provided with an input port and an output port, respectively. A power outage monitoring board 67 and a payout control device 77 provided in the main control device 60 are connected to the input side of the MPU 62. A power supply/launch control device 78 having a function of supplying operating power is connected to the power outage monitoring board 67, and operating power is supplied to the MPU 62 via the power outage monitoring board 67.

Various sensors such as ball entry detection sensors 42a to 49a are connected to the input side of the MPU 62. As already explained, each ball entry detection sensor 42a to 49a includes a first winning opening detection sensor 42a, a second winning opening detection sensor 43a, a third winning opening detection sensor 44a, a special electric detection sensor 45a, and a first operating opening detection sensor. A sensor 46a, a second operating port detection sensor 47a, an outlet detection sensor 48a, and a gate detection sensor 49a are included. Based on the detection results of these ball entry detection sensors 42a to 49a, the main CPU 63 determines whether the ball enters each ball entry section. Further, the main side CPU 63 executes various lottery drawings based on winnings to the first operating port 33 and various drawings based on winnings to the second operating port 34.

On the input side of the MPU 62, a setting key insertion section 68a, an update button 68b, and a reset button 68c provided on the main control board 61 are provided. The setting key insertion portion 68a is provided with a sensor (not shown), and the sensor detects whether the setting key insertion portion 68a is placed in an ON operation position or an OFF operation position. Then, the main CPU 63 specifies whether the setting key insertion portion 68a is located at the ON operation position or the OFF operation position based on the detection result from the sensor. The update button 68b is provided with a sensor (not shown), and the sensor detects whether or not the update button 68b is pressed. Then, the main CPU 63 determines whether or not the update button 68b is pressed based on the detection result from the sensor. The reset button 68c is provided with a sensor (not shown), and the sensor detects whether or not the reset button 68c is pressed. Then, the main CPU 63 determines whether or not the reset button 68c is pressed based on the detection result from the sensor.

A power outage monitoring board 67, a payout control device 77, and a sound emission control device 81 are connected to the output side of the MPU 62. For example, a prize ball command is output to the payout control device 77 based on the fact that a game ball has entered a prize ball corresponding entering part of the above-mentioned ball entering part where the occurrence of the ball entering corresponds to the payout of the game ball. Ru. Various commands such as a variation command, a type command, and an opening command are output to the audio emission control device 81.

On the output side of the MPU 62, there are a drive unit 32b for special electricity that opens and closes the opening/closing door 32a of the special electricity prize winning device 32, a drive unit 34b for general electricity that opens and closes the general electricity accessory 34a of the second operating port 34, and a drive unit 34b for general electricity that opens and closes the opening/closing door 32a of the special electricity winning device 32. A drawing unit 37 and a general drawing unit 38 are connected. Incidentally, the special figure unit 37 is provided with a special figure display section 37a and a special figure pending display section 37b, all of which are connected to the output side of the MPU 62. Similarly, the general drawing unit 38 is provided with a general drawing display section 38a and a general drawing holding display section 38b, all of which are connected to the output side of the MPU 62. The main control board 61 is provided with various driver circuits, and the MPU 62 executes drive control of various drive units and various display units through the driver circuits.

That is, in the opening/closing execution mode, drive control of the special electric drive unit 32b is executed in the main side CPU 63 so that the special electric prize winning device 32 is opened and closed. Further, when the open state of the general electric utility object 34a is won, the drive control of the general electric drive unit 34b is executed in the main CPU 63 so that the general electric utility object 34a is opened and closed. Furthermore, in each game round, display control of the special figure display section 37a is executed by the main CPU 63. In addition, when displaying the lottery result as to whether or not to open the general utility object 34a, the main side CPU 63 executes display control of the general public figure display section 38a. In addition, when a winning occurs in the first operating port 33 or the second operating port 34, or when a variable display starts in the special symbol display section 37a, the main CPU 63 controls the display of the special symbol pending display section 37b. is executed, and when a winning occurs in the through gate 35, or when variable display is started on the common picture display section 38a, display control of the common picture pending display section 38b is executed in the main CPU 63.

First to third notification display devices 69a to 69c are connected to the output side of the MPU 62. Furthermore, the management results of the gaming history in the management IC 66 are notified through the display on the first to third notification display devices 69a to 69c. Further, when changing the setting state of the pachinko machine 10, the current setting value is displayed on the third notification display device 69c. In this case, the display of the first notification display device 69a and the second notification display device 69b is controlled by the management IC 66 and not by the main CPU 63, whereas the third notification display device 69c is controlled by the main CPU 63. The display is controlled by the management IC 66. Regarding the display on the third notification display device 69c, display control by the main CPU 63 is given priority over display control by the management IC 66.

However, the present invention is not limited to this, and the third notification display device 69c may also have a configuration in which the display is controlled by the management IC 66 and the display is not controlled by the main CPU 63. In this case, if the current setting value is to be displayed on the third notification display device 69c when changing the setting state of the pachinko machine 10, the main CPU 63 instructs the management IC 66 to display the setting value. good.

The MPU 62 is provided with a reading terminal 68d. The reading terminal 68d is provided with a sensor (not shown), and the sensor detects whether or not the reading terminal 68d is connected to a connection terminal of an external device. Then, the main CPU 63 specifies whether or not a connection terminal of an external device is connected to the reading terminal 68d based on the detection result from the sensor. Further, when an external device is connected to the reading terminal 68d, the management results of the game history in the management IC 66 or the information (programs and data) stored in the main ROM 64 are outputted to the external device.

The power outage monitoring board 67 relays between the main control board 61 and the power source/launch control device 78, and monitors a stable DC voltage of 24 volts, which is the maximum voltage output from the power source/launch control device 78. The payout control device 77 controls the payout of prize balls and rental balls by the payout device 76 based on the prize ball command received from the main control device 60.

The power source/launch control device 78 is connected to a commercial power source (external power source) in, for example, an amusement hall or the like. Then, based on the external power supplied from the commercial power source, necessary operating power is generated for the main control board 61, payout control device 77, etc., and the generated operating power is supplied. Incidentally, the power supply/launch control device 78 is provided with a power supply unit for power outages such as a backup capacitor, and even if the power of the pachinko machine 10 is OFF, the power supply unit for power outages supplies power from the main power supply unit. Power for memory retention is supplied to the main side RAM 65 of the control device 60 and the payout control device 77. Further, the power supply/launch control device 78 is responsible for controlling the launch of the game ball launch mechanism 27, and the game ball launch mechanism 27 is driven when predetermined launch conditions are met. Further, as already explained, the payout mechanism section 73 is provided with a power switch, and when the power switch is turned ON, the supply of operating power to the Pachinko machine 10 is started, and when the power switch is turned OFF, operation power is started to be supplied to the Pachinko machine 10. As a result, the supply of operating power to the pachinko machine 10 is stopped.

The audio light emission control device 81 drives and controls the display light emission section 53 and the speaker section 54 provided in the front door frame 14 based on various commands received from the main control device 60, and also controls the display control device 82. It is. The display control device 82 executes display control of the symbol display device 41 based on commands received from the audio emission control device 81.

<Electrical configuration for performing various lottery drawings on the main CPU 63>
Next, the electrical configuration for performing various lottery drawings in the main CPU 63 will be explained using FIG. 7.

When playing a game, the main CPU 63 uses various types of counter information to perform jackpot occurrence lottery, settings for display on the special pattern display section 37a, settings for display on the pattern display device 41, settings for display on the general pattern display section 38a, etc. Specifically, as shown in FIG. 7, the winning random number counter C1 used in the lottery of winning occurrences, the jackpot type counter C2 used when determining the jackpot type, and the symbol display device 41 are changed when the winning occurs. Determine the reach random number counter C3 used for the reach occurrence lottery when playing, the random number initial value counter CINI used to set the initial value of the hit random number counter C1, and the display duration time on the special symbol display section 37a and the symbol display device 41. A variation type counter CS is used. Furthermore, a general electric utility object release counter C4 is used to determine whether or not the general electric utility object 34a of the second operating port 34 should be brought into the general electric power open state. The counters C1 to C3, CINI, CS, and C4 are provided in various counter areas 65b of the main RAM 65.

Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter in which 1 is added to the previous value each time the counter is updated, and returns to "0" after reaching the maximum value. Each counter is updated at short intervals. Information corresponding to the winning random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is provided in the main side RAM 65 as an acquisition information storage means when a winning occurs in the first operating port 33 or the second operating port 34. The data is stored in the reserved storage area 65a.

The reservation storage area 65a includes a reservation area RE and an execution area AE. The holding area RE includes a first holding area RE1, a second holding area RE2, a third holding area RE3, and a fourth holding area RE4. In addition, a combination of numerical information of the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is stored as pending information in any of the pending areas RE1 to RE4.

In this case, if winnings to the first operating port 33 or the second operating port 34 occur multiple times in a row, the first holding area RE1 to the fourth holding area RE4 are Each piece of numerical information is stored in chronological order in the order of reservation area RE2 → third reservation area RE3 → fourth reservation area RE4. By providing the four holding areas RE1 to RE4 in this way, the winning history of game balls entered into the first operating port 33 or the second operating port 34 can be held and stored up to a maximum of four. .

Note that the number that can be held and stored is not limited to four, but is arbitrary, and may be other plural numbers such as two, three, or five or more, or may be a single number.

The execution area AE is an area for moving each numerical information stored in the first reservation area RE1 of the reservation area RE when starting the variable display of the special figure display section 37a, and is an area for moving each numerical information stored in the first reservation area RE1 of the reservation area RE. At this time, a judgment is made based on various numerical information stored in the execution area AE.

Each of the above counters will be explained in detail.

First, the general utility goods release counter C4 will be explained. The general utility utility release counter C4 is configured such that, for example, it is incremented by 1 in sequence within the range of 0 to 250, and returns to "0" after reaching the maximum value. The general electric utility object release counter C4 is updated regularly and is stored in the general electric power holding area 65c of the main side RAM 65 at the timing when a game ball enters the through gate 35. Then, at a predetermined timing, a lottery is performed to determine whether or not to control the general electric utility object 34a to the open state based on the stored value of the general electric utility object opening counter C4.

In the present pachinko machine 10, a plurality of types of support modes are set so that the modes of support by the common electric accessory 34a are different from each other. In detail, in the support mode, when compared with the situation where the game balls continue to be launched in the same manner into the game area PA, the general electrical accessory 34a of the second operating port 34 opens per unit time. A high-frequency support mode and a low-frequency support mode are set so that the frequency of the state is relatively high or low.

In the high-frequency support mode and the low-frequency support mode, the probability of winning the general electricity release state in the general electricity release lottery using the general electricity utility item release counter C4 is the same (for example, 4/5 in both cases). , In the high-frequency support mode, the number of times that the general electric utility accessory 34a is in the open state when the general electric power open state is won is set to be greater than that in the low-frequency support mode, and the opening time for one time is also set to be longer. has been done. In this case, when the general power open state is won in the high frequency support mode and the open state of the general power accessory 34a occurs multiple times, the period from the end of one open state to the start of the next open state is The closing time is set shorter than the one-time opening time. Furthermore, in the high-frequency support mode, compared to the low-frequency support mode, the minimum secured time (i.e., The duration of one display on the display section 38a is set short.

As described above, in the high-frequency support mode, the probability of winning the second operating port 34 is higher than in the low-frequency support mode. In other words, in the low-frequency support mode, the probability of winning a prize in the first operating port 33 is higher than that in the second operating port 34, but in the high-frequency support mode, the probability of winning a prize is higher in the first operating port 33 than in the second operating port 34. The probability of winning a prize in the mouth 34 increases. When a winning occurs in the second operation port 34, a predetermined number of game balls are paid out, so in the high-frequency support mode, the player can play the game without reducing the number of balls he has too much. It can be carried out.

Note that the configuration for making the high-frequency support mode more frequently open to the power grid per unit time than the low-frequency support mode is not limited to the above, and for example, in the power grid release lottery. It may be configured to increase the probability of winning the general power open state. In addition, the secured time period that is secured between the time when one general electricity lottery is held and the next general electricity distribution lottery is held (for example, the period of time that is secured on the general electricity map display section 38a based on winnings in the through gate 35) is In configurations where multiple types of variable display times are available, it is easier to select a shorter securing time in the high-frequency support mode than in the low-frequency support mode, or the average securing time is set to be shorter. Good too. In addition, the number of times the power grid is released, the length of time it is open, the amount of time secured between one general power grid release lottery and the next power grid release lottery is shortened, and such secured time. The advantage of the high-frequency support mode over the low-frequency support mode may be increased by applying any one condition or any combination of shortening the average time and increasing the probability of winning.

Here, as already explained, the pachinko machine 10 has setting states of "Setting 1" to "Setting 6", but the opening frequency and opening mode of the general electric accessory 34a in the low frequency support mode are different from each other. The setting values are the same, and the opening frequency and opening mode of the utility power accessory 34a in the high-frequency support mode are also the same regardless of the setting values. However, the present invention is not limited to this, and at least one of the opening frequency and opening mode of the general electric accessory 34a varies depending on the setting state of the pachinko machine 10 in at least one of the low-frequency support mode and the high-frequency support mode. It may also be a configuration. For example, the higher the setting value is, the higher the frequency of opening of the general electric accessory 34a in the low frequency support mode may be configured, and the second operation when the general electric accessory 34a is opened once in the low frequency support mode. A configuration may be adopted in which the probability of a game ball entering the mouth 34 is increased. Furthermore, the higher the set value, the higher the frequency of opening of the general electric accessory 34a in the high-frequency support mode. A configuration may be adopted in which the probability of the game ball entering the operating port 34 is increased.

Next, the winning random number counter C1 will be explained. The winning random number counter C1 is configured such that it is incremented by 1 in sequence within the range of 0 to 599, for example, and returns to "0" after reaching the maximum value. In particular, when the winning random number counter C1 completes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the winning random number counter C1. Note that the random number initial value counter CINI is a loop counter similar to the winning random number counter C1 (value=0 to 599). The winning random number counter C1 is updated regularly and is stored in the holding storage area 65a of the main side RAM 65 at the timing when a game ball enters the first operating port 33 or the second operating port 34.

The random number value that results in a jackpot is stored in the main ROM 64 as a win/fail table. FIG. 8 is an explanatory diagram for explaining various tables stored in the main side ROM 64. As the success/failure tables, low probability success/failure tables 64a to 64f for low probability mode and high probability success/failure table 64g for high probability mode are stored.

The low probability accuracy tables 64a to 64f are provided in one-to-one correspondence with the setting states of "Setting 1" to "Setting 6." In other words, the low probability table 64a for setting 1 is referred to when the setting state of the pachinko machine 10 is "setting 1", and the setting is referenced when the setting state of the pachinko machine 10 is "setting 2". 2 low probability correctness table 64b, low probability correctness table 64c for setting 3 which is referred to when the setting state of the pachinko machine 10 is "setting 3", and low probability correctness table 64c for setting 3 when the setting state of the pachinko machine 10 is "setting 4". , a low probability correctness table 64d for setting 4 that is referred to when the setting state of the pachinko machine 10 is "setting 5", a low probability correctness table 64e for setting 5 that is referred to when the setting state of the pachinko machine 10 is "setting 5", and the pachinko machine 10 There exists a low certainty propriety table 64f for setting 6 that is referred to when the setting state of is "setting 6".

These low probability success/failure tables 64a to 64f are set such that the higher the set value, the higher the probability of winning a jackpot result. Specifically, when the low probability table 64a for setting 1 is referred to, the jackpot result is approximately 1/320, and when the low probability table 64b for setting 2 is referred to, the result is approximately 1/310. When the low probability table 64c for setting 3 is referred to, the result is a jackpot at approximately 1/300, and when the low probability table 64d for setting 4 is referred to, it is approximately 1/290. If the low probability success/failure table 64e for setting 5 is referred to, it will be a jackpot result at approximately 1/280, and if the low probability success/failure table 64f for setting 6 is referred to, it will be a jackpot result at approximately 1/270. This results in a jackpot. As a result, when the setting state of the pachinko machine 10 is set to a high setting value, a jackpot result is more likely to occur in the low probability mode, which is advantageous for the player.

On the other hand, only one type of high certainty validity table 64g is provided so that it is common to any setting state from "Setting 1" to "Setting 6". The high probability success/failure table 64g is set so that the probability of winning a jackpot result is higher than the low probability success/failure tables 64a to 64f in any setting state from "Setting 1" to "Setting 6". Specifically, when the high probability success/failure table 64g is referred to, the jackpot result is approximately 1/30. This makes it possible to make the high probability mode more advantageous than the low probability mode regardless of the setting state of the pachinko machine 10. In addition, even the lowest setting state "Setting 1" becomes a high probability mode, making it possible to make the probability of a jackpot result higher than the low probability mode of "Setting 6" which is the highest setting state. becomes. In addition, regarding the high probability mode, it is possible to prevent the occurrence of advantages or disadvantages depending on the setting state of the pachinko machine 10, and to suppress the storage capacity for storing the high probability probability table 64g in the main side ROM 64 in advance. becomes possible.

The jackpot type counter C2 is configured to be incremented by 1 within the range of 0 to 29, and return to "0" after reaching the maximum value. The jackpot type counter C2 is updated regularly, and is stored in the holding storage area 65a at the timing when the game ball enters the first operating port 33 or the second operating port 34.

In this pachinko machine 10, a plurality of jackpot results are set. These plurality of jackpot results include (1) the mode of opening/closing control of the special electric prize winning device 32 in the opening/closing execution mode, (2) the lottery mode in the win/fail lottery means after the opening/closing execution mode ends, and (3) the opening/closing mode after the opening/closing execution mode ends. A plurality of jackpot results are set by differentiating three conditions, namely, the support mode in the general electric accessory 34a of the second operation port 34.

The mode of opening/closing control of the special electric winning device 32 in the opening/closing execution mode is such that the frequency of winnings on the special electric winning device 32 from the start to the end of the opening/closing execution mode is relatively high or low. A frequent winning mode and a low frequency winning mode are set. Specifically, in both the high-frequency winning mode and the low-frequency winning mode, round games are executed up to a predetermined number of times.

A round game is a game that continues until either one of the following conditions is met: a predetermined upper limit duration time elapses, and a predetermined upper limit number of game balls enters the special electric winning device 32. That's true. Further, the number of round games in the opening/closing execution mode triggered by a jackpot result is a fixed number of rounds and is the same regardless of the type of jackpot result that triggered the transition. Specifically, the upper limit number of round games is set to 15 rounds, regardless of the jackpot result.

In addition, in this pachinko machine 10, a plurality of types are set for one opening mode of the special electric winning device 32, with different opening durations from when the special electric winning device 32 is opened until it is closed. Specifically, a long time mode in which the open duration is set to a long time of 29 seconds, and a short time mode in which the open duration is set to 0.06 seconds, which is a short time shorter than the above long time, is set.

In this pachinko machine 10, when the firing operation device 28 is operated by the player, the game ball firing mechanism 27 is driven so that one game ball is fired toward the gaming area PA every 0.6 seconds. controlled. Further, in the round game, the upper limit number of end conditions is set to nine. Then, in the long-time mode among the above-mentioned open modes, the open continuation time is set to be longer than the product of the game ball firing cycle and one round game. On the other hand, in the short time mode, the open duration time is set to be shorter than the product of the game ball firing cycle and one round game, more specifically, shorter than the game ball firing cycle. Therefore, if one opening is made in a long-time mode, it is expected that the special electric winning device 32 will receive a prize equal to the upper limit number in one round game, and one in a short-time mode. When the number of rounds is opened, it is expected that no winnings will be made to the special electric winning device 32, or that only one prize will be won, if any.

In the high frequency winning mode, the special electric winning device 32 is opened once in a long time mode in each round game. On the other hand, in the low frequency winning mode, the special electric winning device 32 is opened once in a short time mode in each round game.

In addition, the number of times the special electric winning device 32 is opened and closed in the high-frequency winning mode and the low-frequency winning mode, the number of round games, the opening duration time for one opening, and the upper limit number of pieces in one round game are the same as those in the high-frequency winning mode. is not limited to the above values and may be set arbitrarily if the frequency of winnings in the special electric winning device 32 from the start to the end of the opening/closing execution mode is higher than that of the low-frequency winning mode. It is.

The distribution destinations of the jackpot results for the jackpot type counter C2 are stored in the main side ROM 64 as a distribution table 64h, as shown in FIG. In the allocation table 64h, a low probability jackpot result, a low winning high probability jackpot result, and a most profitable jackpot result are set as the destinations to which the jackpot result is distributed in the case of a jackpot result.

The low-probability jackpot result is a jackpot result in which the opening/closing execution mode becomes the high-frequency winning mode, and after the opening/closing execution mode ends, the win/fail lottery mode becomes the low-probability mode and the support mode becomes the high-frequency support mode. However, this high-frequency support mode shifts to the low-frequency support mode when the number of games has reached the end standard number of times (specifically, 100 times) after the shift.

For low winning and high probability jackpot results, the opening/closing execution mode becomes the low frequency winning mode, and after the opening/closing execution mode ends, the win/fail lottery mode becomes the high probability mode and the support mode becomes the high frequency support mode. be. These high probability mode and high frequency support mode continue until the lottery result in the win/fail lottery becomes a jackpot state win and the state shifts to a jackpot state accordingly.

The most advantageous jackpot result is a jackpot result in which the opening/closing execution mode becomes a high-frequency winning mode, and furthermore, after the opening/closing execution mode ends, the win/fail lottery mode becomes a high probability mode and the support mode becomes a high-frequency support mode. These high probability mode and high frequency support mode continue until the lottery result in the win/fail lottery becomes a jackpot state win and the state shifts to a jackpot state accordingly.

In relation to each of the above gaming states, the normal gaming state refers to a state where the win/fail lottery mode is a low probability mode and the support mode is a low frequency support mode, not the opening/closing execution mode. Furthermore, a configuration may be adopted in which a low win/high probability jackpot result is not set as the game result. In addition, in the opening/closing execution mode with a low winning/high probability jackpot result, the number of round games may be smaller than in the case of a low probability jackpot result and a most advantageous jackpot result.

In the distribution table 64h, among the values of jackpot type counter C2 of "0 to 29", "0 to 9" correspond to low probability jackpot results, and "10 to 14" correspond to low probability jackpot results. "15-29" corresponds to the most profitable jackpot result.

Only one type of distribution table 64h is provided so that the distribution table 64h is common to any of the setting states "Setting 1" to "Setting 6". This makes it possible to prevent advantage or disadvantage from occurring depending on the setting state of the pachinko machine 10 regarding the distribution mode of jackpot results, and also allows the storage capacity for storing the distribution table 64h in advance in the main side ROM 64. It becomes possible to suppress the

It should be noted that a configuration may be adopted in which the manner in which the jackpot results are distributed differs depending on the setting state of the pachinko machine 10. For example, the higher the setting value, the higher the probability of being allocated to the most profitable jackpot result, or the higher the setting value, the higher the probability of being allocated to the most profitable jackpot result or the low winning, high probability jackpot result. In this case, the higher the set value, the higher the probability that the game will enter the high probability mode after a jackpot result. In addition, the higher the setting value, the lower the probability of being assigned to a low winning/high probability jackpot result.If the setting value is high, it will not be assigned to a low winning/high probability jackpot result, whereas if the setting value is low, the probability of being assigned to a low winning/high probability jackpot result will be lower. It may also be configured such that it can be distributed to jackpot results. In this case, the higher the set value, the higher the probability that the opening/closing execution mode of the high frequency winning mode will occur.

Next, the reach random number counter C3 will be explained. The reach random number counter C3 is configured to increment sequentially by 1 within the range of 0 to 238, for example, and return to "0" after reaching the maximum value. In this pachinko machine 10, an expected performance is set as a type of display performance on the symbol display device 41. Expected production is a gaming machine that is equipped with a symbol display device 41 that is capable of displaying symbols in a fluctuating manner, and in which the final stop result is the award corresponding result in a game round that results in a predetermined jackpot result. This refers to a display state that is made to make the player think that the fluctuating display state is likely to result in the award corresponding result after the start of fluctuating display of symbols and before the stop result is derived and displayed. Specifically, regarding the award correspondence result, combinations of symbols with the same number attached on any active line are stopped and displayed.

Two types of expected effects are set: a ready-to-reach display and a preview display for making users expect the occurrence of a ready-to-reach display or a grant response result at a stage before the ready-to-reach display occurs.

In the ready-to-reach display, the combination of ready-to-win symbols is displayed by stopping and displaying some of the symbol rows among the plurality of symbol rows displayed on the display surface 41a of the symbol display device 41, and in this state, the remaining symbol rows are displayed. This includes a display state in which symbols are displayed in a variable manner in a symbol row. In addition, while the combination of ready-to-reach symbols is displayed as described above, the remaining symbol rows are displayed with fluctuating symbols, and a predetermined character or the like is displayed as a moving image on the background screen to create a ready-to-reach effect. , those that perform a reach effect by displaying a predetermined character or the like as a moving image on substantially the entire display surface 41a after displaying or not displaying a combination of ready-to-reach symbols are included.

The preview display may be performed in a situation where the symbols are being displayed in a variable manner in all symbol rows after the variable display of the symbols has started on the display surface 41a of the symbol display device 41, or in a situation in which symbols are being displayed in a variable manner in all symbol rows, or in some symbol rows but in a plurality of symbol rows. In a situation where symbols are displayed in a variable manner in a symbol column, a mode is included in which a character is displayed separately from the symbols on the symbol column. Also included are those in which the background screen is set in a predetermined mode different from the previous mode, and those in which the symbols on the symbol row are set in a predetermined mode different from the previous mode. Such a notice display can occur in any game round when a reach display is displayed or when a reach display is not performed, but it is higher when a reach display is performed than when a reach display is not performed. It is set to occur with probability.

The reach display is executed regardless of the value of the reach random number counter C3 in the game round in which the same combination of symbols is finally stopped and displayed. Further, in a game round corresponding to a jackpot result in which the same combination of symbols is not stopped and displayed, the game is not executed regardless of the value of the reach random number counter C3. In addition, in the game round corresponding to the winning result, this is executed when the reach random number counter C3 obtained at a predetermined timing by referring to the reach table stored in the main side ROM 64 corresponds to the occurrence of the reach display. .

On the other hand, the decision as to whether or not to display a preview is not made by the main control device 60 but by the sound emission control device 81. In this case, the sound emission control device 81 recognizes that a preview display is more likely to occur in a game round corresponding to a jackpot result than in a game round corresponding to a losing result, and that a preview display with a low appearance rate is A lottery process for displaying a preview is executed so as to satisfy at least one condition that the occurrence is likely to occur. Incidentally, this lottery result is reflected when the symbol display device 41 performs a game repeat effect.

Here, the probability that a reach display will occur in a game round that results in a losing result is the same regardless of the setting state from "Setting 1" to "Setting 6". This makes it possible to prevent the setting state of the pachinko machine 10 from having an advantage or disadvantage with respect to the probability that a reach display will occur in a game round that results in a losing result. However, the present invention is not limited to this, and a configuration may be adopted in which the higher the setting value is, the higher the probability that the reach display will occur in a game round with a losing result.

Next, the variation type counter CS will be explained. The variation type counter CS is configured to be incremented by 1 in sequence within the range of 0 to 198, for example, and return to "0" after reaching the maximum value. The variation type counter CS is used by the main CPU 63 to determine the display duration time on the special symbol display section 37a and the display duration time of symbols on the symbol display device 41. The variation type counter CS is updated once every time a timer interrupt process, which will be described later, is executed once, and is repeatedly updated within the remaining time until the next timer interrupt process is executed. Then, the buffer value of the variation type counter CS is acquired when determining the variation pattern at the start of the variation display on the special symbol display section 37a and at the time the symbol display device 41 starts the variation of the symbol.

<About the processing configuration of the main CPU 63>
Next, each process executed by the main CPU 63 to advance the game will be explained. The processing of the main CPU 63 can be roughly divided into main processing that is started upon power-on, and timer interrupt processing that is started periodically (in this embodiment, every 4 milliseconds).

<Main processing>
First, the main processing will be explained with reference to the flowchart in FIG.

First, a power-on wait process is executed (step S101). In the power-on wait process, for example, the main process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. The operation start and initial setting of the symbol display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S102).

Thereafter, it is determined whether the setting key insertion section 68a has been turned on (step S103). If the setting key insertion section 68a has not been turned on (step S103: NO), it is determined whether the reset button 68c has been pressed (step S104). When the reset button 68c is pressed (step S104: YES), each area of the main side RAM 65 is " 0" is cleared, and initial settings are made for the area cleared to "0" (step S105). In other words, if the supply of operating power to the pachinko machine 10 is started while pressing the reset button 68c without turning on the setting key insertion part 68a, the operation to the pachinko machine 10 regarding the setting value information is Clearing of the main RAM 65 is performed while maintaining the state before the power supply was stopped, and the storage area where the clearing has been performed is initialized. This makes it possible to initialize other areas of the main RAM 65 without changing set values. In addition, in step S105, initial settings are performed after various registers of the main CPU 63 are also cleared to "0".

If the reset button 68c is not pressed (step S104: NO), it is determined whether the power outage flag is set to "1" (step S106). A power outage flag is provided in the main side RAM 65, and when the supply of operating power to the main side CPU 63 is stopped and a predetermined power outage process is normally executed, the power outage flag is set to "1". will be set. If the power outage flag is set to "1", it is determined whether the checksum calculation result matches the checksum saved when the power was cut off, that is, the validity of the stored data is determined (step S107). . When the process of step S105 is executed, or when an affirmative determination is made in step S107, it is determined whether the set values of the pachinko machine 10 are normal by checking the main side RAM 65 (step S108). Specifically, the setting value is determined to be normal if it is one of "setting 1" to "setting 6", and it is determined to be abnormal if it is "0" or 7 or more.

If a negative determination is made in any of steps S106 to S108, an operation prohibition process is executed. In the operation prohibition process, after executing an error notification process to notify the hall manager and the like of the occurrence of an error (step S109), an infinite loop occurs. The operation prohibition process is canceled by executing the all clear process (step S117), which will be described later.

If a positive determination is made in all steps S106 to S108, a power-on setting process is executed (step S110). In the power-on setting process, a predetermined area of the main side RAM 65, such as initialization of a power outage flag, is set to an initial value, and a command corresponding to the current gaming state is transmitted to the audio emission control device 81. Further, after executing the process of step S110, a recognition process (step S111) is performed to make the management IC 66 recognize various information, and various data are output to an external device connected to the reading terminal 68d of the MPU 62. Data output processing is executed for this purpose (step S112). Details of these recognition processing and data output processing will be explained later.

Although the main CPU 63 is configured to periodically execute timer interrupt processing, generation of timer interrupt processing is prohibited at the stage when main processing is started. This state in which generation of the timer interrupt process is prohibited is canceled at a timing when the process in step S112 is completed and before the process in step S113 is executed, and execution of the timer interrupt process is permitted. As a result, when the supply of operating power to the main CPU 63 is started, the data output process in step S112 is completed and the timer interrupt process is not executed until the stage before the process in step S113 is started. Therefore, the main CPU 63 will not start the process for advancing the game until the situation is reached.

Thereafter, the process proceeds to the remaining processing of steps S113 to S116. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. Although this remaining time will vary depending on the processing completion time of each timer interrupt process, the remaining process from step S113 to step S116 is repeatedly executed using such irregular time. In this respect, it can be said that the remaining processing of steps S113 to S116 is non-regular processing that is executed non-regularly.

In the remaining processing, first, in step S113, interrupt prohibition is set to prohibit generation of timer interrupt processing. In the subsequent step S114, a random number initial value update process is executed to update the random number initial value counter CINI, and in step S115, a variation counter update process is executed to update the variation type counter CS. In these update processes, the current numerical information is read from the corresponding counter in the main side RAM 65, the read numerical information is incremented by 1, and then the process of overwriting the counter from which it was read is executed. In this case, each counter value is cleared to "0" when it exceeds the maximum value. Thereafter, in step S116, interrupt permission is set to switch from a state in which generation of timer interrupt processing is prohibited to a state in which generation of timer interrupt processing is permitted. If the process of step S116 is executed, the process returns to step S113 and the processes of steps S113 to S116 are repeated.

On the other hand, if the setting key insertion part 68a is turned on (step S103: YES), the main side RAM 65 includes the area where setting value information indicating the setting state of the pachinko machine 10 is set. All areas are cleared to "0" and initial settings are made to the areas cleared to "0" (step S117). In other words, if an operation is being performed to change the setting state of the pachinko machine 10, all areas of the main RAM 65 are cleared to "0" even if the reset button 68c is not pressed. Initial settings are performed for the storage area where the process was executed. Further, in step S117, initial settings are performed after various registers of the main CPU 63 are also cleared to "0". Note that this is not limited to this, and even if an operation is being performed to change the setting state of the pachinko machine 10, if the reset button 68c is not pressed, all of the main side RAM 65 is A configuration may be adopted in which the clearing process is not executed and the all clearing process is executed when an operation for changing the setting state of the pachinko machine 10 is performed and the reset button 68c is pressed.

After that, a set value update process is executed in step S118, and a set value update signal output process is executed in step S119, and then the process moves to step S110. The setting value update process will be explained below. Note that the output process of the setting value update signal will be explained in detail later. FIG. 10 is a flowchart showing the setting value update process.

First, a set value counter provided in the main side RAM 65 is set to "1" (step S201). The setting value counter is a counter used by the main CPU 63 to specify which setting value the setting state of the pachinko machine 10 is at. By setting "1" to the setting value counter, when the setting value update process is executed, the setting value becomes "setting 1" regardless of the previous setting value.

Thereafter, a setting value display start process is executed (step S202). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number "1" corresponding to "setting 1" is displayed. When changing the setting value, the game hall manager can grasp the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

Thereafter, on the condition that the setting key insertion section 68a has not been turned off (step S203: NO), it is determined whether the update button 68b has been pressed once (step S204). Specifically, it is determined whether the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S204, the process returns to step S203, and it is determined whether or not the setting key insertion section 68a is turned off.

If the update button 68b has been pressed once (step S204: YES), the value of the set value counter in the main side RAM 65 is incremented by 1 (step S205). Further, if the value of the set value counter after adding 1 exceeds "6" (step S206: YES), the set value counter is set to "1" (step S207). As a result, each time the update button 68b is pressed once, the set value is updated to one step higher, and if the update button 68b is pressed once in the situation of "Setting 6", it is changed to "Setting 1". I will be going back.

If a negative determination is made in step S206, or if the process in step S207 is executed, a setting value display update process is executed (step S208). In the setting value display update process, the display of the third notification display device 69c is controlled so that a number corresponding to the value of the setting value counter of the main side RAM 65 is displayed. By checking the third notification display device 69c, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S208, the process returns to step S203, and it is determined whether or not the setting key insertion section 68a has been turned off. If the OFF operation has not been performed (step S203: NO), the processes from step S204 onwards are executed again. If the OFF operation has been performed (step S203: YES), a setting value display termination process is executed (step S209). In the set value display termination process, the display of the set values on the third notification display device 69c is terminated.

<Timer interrupt processing>
Next, timer interrupt processing will be explained with reference to the flowchart in FIG. The timer interrupt process is executed periodically (for example, every 4 milliseconds).

First, a power outage information storage process is executed (step S301). In the power outage information storage process, it is monitored whether or not a power outage signal corresponding to the occurrence of a power outage is received from the power outage monitoring board 67, and if the occurrence of a power outage is identified, an infinite loop is executed after executing power outage processing. Become. In the power outage process, the power outage flag in the main RAM 65 is set to "1", a checksum is calculated, and the calculated checksum is saved.

After that, random number update processing for lottery is executed (step S302). In the random number update process for lottery, the winning random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the general utility object opening counter C4 are updated. Specifically, the current numerical information was sequentially read from the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the general utility goods release counter C4, and a process was performed in which each of the read numerical information was incremented by 1. Afterwards, a process is executed to overwrite the reading source counter. In this case, each counter value is cleared to "0" when it exceeds the maximum value. Thereafter, in step S303, a random number initial value update process is executed as in step S114, and in step S304, a variation counter update process is executed as in step S115.

Thereafter, fraud detection processing is executed to monitor whether or not a predetermined event set as a monitoring target for fraud has occurred (step S305). In the fraud detection process, the occurrence of a plurality of types of events is monitored, and by confirming that a predetermined event has occurred, the game stop flag provided in the main side RAM 65 is set to "1". In the subsequent step S306, it is determined whether or not the progress of the game is stopped by determining whether or not the game stop flag is set to "1". If a negative determination is made in step S306, the processes from step S307 onwards are executed.

In step S307, port output processing is executed. In the port output processing, when the output information has been set in the previous timer interrupt processing, processing is executed to perform output corresponding to the output information to the various drive units 32b and 34b. For example, if information is set to switch the special electric winning device 32 to the open state, output of a drive signal to the special electric drive unit 32b is started, and if information is set to switch the special electric prize winning device 32 to the closed state. stops the output of the drive signal. In addition, if information is set to switch the general electric accessory 34a of the second operating port 34 to the open state, output of a drive signal to the general electric drive unit 34b should be started, and the general electric accessory 34a should be switched to the closed state. If the information is set, the output of the drive signal is stopped.

After that, reading processing is executed (step S308). In the reading process, signals other than the power outage signal and winning signal are read, and the read information is stored for use in future processing.

Thereafter, ball entry detection processing is executed (step S309). In the ball entry detection process, the signals received from each of the ball entry detection sensors 42a to 49a are read, and based on the reading results, the output port 24a, general winning port 31, special electric winning device 32, and first operating port 33 are activated. , the presence or absence of the ball entering the second operating port 34 and the through gate 35 is determined. Note that the details of the ball entry detection process will be explained later.

Thereafter, a timer update process is executed to collectively update numerical information of multiple types of timer counters provided in the main side RAM 65 (step S310). In this case, the configuration is such that the timer counters that are updated by subtracting the stored numerical information are handled collectively, but both the subtraction-type timer counter update and the addition-type timer counter update are performed collectively. It may also be a configuration.

Thereafter, a firing control process for controlling the firing of game balls is executed (step S311). In a situation where the firing operation to the firing operation device 28 is continued, one game ball is fired every 0.6 seconds, which is a predetermined firing cycle. In the following step S312, as an input state monitoring process, based on the information read in the reading process in step S308, the disconnection of each ball entry detection sensor 42a to 49a is confirmed, and the opening of the gaming machine main body 12 and the front door frame 14 is confirmed. I do.

Thereafter, a special figure special electric control process for controlling the execution of the game round and the opening/closing execution mode is executed (step S313). The special figure special electric control process will be explained in detail later.

Thereafter, general electric power control processing is executed (step S314). In the general map and general electric power control process, when a prize is won in the through gate 35, a process is executed to obtain the reservation information on the general electrician side, and when the reservation information on the general electrician side is stored. Then, a release determination is made regarding the pending information, and further, using the release determination as a trigger, a process for performing a production for a regular map is executed. Further, based on the result of the open determination, a process of opening and closing the general electric accessory 34a of the second operating port 34 is executed. In this case, if the support mode is low-frequency support mode, the corresponding process is executed, and if the support mode is high-frequency support mode, the corresponding process is executed. Furthermore, in the case of the opening/closing execution mode, even if the immediately previous support mode was the high-frequency support mode, the mode becomes the low-frequency support mode.

In the following step S315, based on the processing results of the immediately preceding step S313 and step S314, output information is set to reflect the increase or decrease in the number of pending information related to the special figure display section 37a on the special figure pending display section 37b. , Output information is set to reflect the increase/decrease in the number of hold information related to the general figure display section 38a on the ordinary figure pending display section 38b. In addition, in step S315, based on the processing results of the immediately preceding step S313 and step S314, output information for updating the display content of the special figure display section 37a is set, and the display content of the regular figure display section 38a is updated. Configure the output information for updating.

Thereafter, the content of the command and signal received from the payout control device 77 is confirmed, and a payout state reception process is executed to perform processing corresponding to the confirmation result (step S316). Further, a payout output process is executed to set the prize ball command as an output target (step S317). Further, an external information setting process is executed to control the start and end of output of an external signal according to the processing results of various processes executed in the current timer interrupt process (step S318). Thereafter, a management output process is executed to output information corresponding to the result of the game ball entering the game area PA to the management IC 66 (step S319). Details of the management output process will be explained later.

Next, the special figure special electric control process in step S313 will be explained with reference to the flowchart of FIG. 12.

First, a reservation information acquisition process is executed (step S401). In the reservation information acquisition process, it is determined whether or not a winning has occurred in the first operating port 33 or the second operating port 34, and if a winning has occurred, the number of pending in the pending storage area 65a is the upper limit. It is determined whether the value is less than the value (“4” in this embodiment). If the number of reservations is less than the upper limit value, the number of reservations is increased by 1, and each numerical information of the hit random number counter C1, jackpot type counter C2, and reach random number counter C3 updated in the previous step S302 is set for reservation. It is stored in the first reservation area among the vacant reservation areas RE1 to RE4 of area RE. In addition, if winnings to the first operating port 33 and the second operating port 34 occur at the same time, the process for acquiring the pending information is executed within the range of executing the pending information obtaining process once. Run multiple times. Furthermore, when new hold information is acquired, a corresponding acquisition command is transmitted to the audio emission control device 81. When the audio emission control device 81 receives the command, it updates the display of the image showing the number of pending information on the symbol display device 41 to the display content corresponding to the increase in the pending information.

Thereafter, the information of the special figure special electric line counter provided in the main side RAM 65 is read out (step S402), and the special figure special electric line address table provided in the main side ROM 64 is read out (step S403). Then, the start address corresponding to the information on the special figure/special electric line counter is acquired from the special figure/special electric line address table (step S404), and the process jumps to the process indicated by the acquired start address among the processes of steps S406 to S412 (step S405). ). The special figure special electric line counter is a counter for the main CPU 63 to grasp which of the various processes from step S406 to step S412 should be executed, and the special figure special electric line address table is a counter for the special figure special electric line counter. The start address of the program for executing the processes from step S406 to step S412 is set in correspondence with the numerical information.

In step S406, special figure fluctuation start processing is executed. FIG. 13 is a flowchart showing the special figure fluctuation start process.

In the special figure fluctuation start process, the data setting process is executed on the condition that the number of pieces of reservation information stored in the reservation area RE is 1 or more (step S501: YES) (step S502). In the data setting process, first, the number of reservations is subtracted by 1, and the data stored in the first reservation area RE1 of the reservation area RE is moved to the execution area AE. Thereafter, a process is executed to shift the data stored in each of the reservation areas RE1 to RE4 of the reservation area RE. This data shift process is a process of sequentially shifting the data stored in the first reservation area RE1 to the fourth reservation area RE4 to the lower area side. Specifically, the data is shifted from the second reservation area RE2 to the first reservation area RE1. , third reservation area RE3 → second reservation area RE2, fourth reservation area RE4 → third reservation area RE3, and then the fourth reservation area RE4 is cleared to "0". At this time, a shift command is sent to the audio emission control device 81 to make it recognize that the data in the reservation area has been shifted. When the audio emission control device 81 receives the command, it updates the display of the image showing the number of pending information on the symbol display device 41 to the display content corresponding to the decrease in the pending information.

After executing the data setting process, the validity table is read from the main ROM 64 (step S503). Specifically, first, information indicating the winning/losing lottery mode from the main side RAM 65 is read out to grasp the current winning/failing lottery mode. If it is the high probability mode, the high probability correctness table 64g is read from the main side ROM 64. On the other hand, when the mode is low probability mode, the setting state of the pachinko machine 10 is grasped by reading the value of the setting value counter in the main side RAM 65. Then, the low certainty propriety tables 64a to 64f corresponding to the grasped setting values are read from the main side ROM 64.

Thereafter, the validity determination process is executed with reference to the validity tables 64a to 64g read in step S503 (step S504). In the win/fail judgment process, the information for the win/fail judgment among the information stored in the execution area AE, that is, the numerical information related to the winning random number counter C1 is replaced with the jackpot numerical information set in the win/fail tables 64a to 64g read out in step S503. Determine whether it matches.

If the result of the judgment process is a jackpot winning result (step S505: YES), a distribution judgment process is executed (step S506). In the distribution determination process, information for distribution determination, that is, numerical information related to the jackpot type counter C2, is read out of the information stored in the execution area AE. Then, referring to the distribution table 64h provided in the main side ROM 64, it is specified to which jackpot result the numerical information related to the read jackpot type counter C2 corresponds. Specifically, it is specified which jackpot result corresponds to a low-probability jackpot result, a low-win high-probability jackpot result, and a most profitable jackpot result.

Thereafter, a stop result setting process for jackpot results is executed (step S507). Specifically, information on the mode of the picture to be finally stopped and displayed on the special figure display section 37a in the game round related to the start of the current variation is obtained from the stop result table for jackpot results stored in advance in the main side ROM 64. The identified information is written to the main RAM 65. In this stop result table for jackpot results, information on the mode of the picture that is stopped and displayed on the special figure display section 37a is set differently for each type of jackpot result.

Thereafter, flag setting processing corresponding to the distribution determination result is executed (step S508). Specifically, the main RAM 65 is provided with flags corresponding to the types of jackpot results, and in step S508, among the flags corresponding to the types of jackpot results, the flags used in the distribution determination process of step S506 are selected. Set "1" to the flag corresponding to the result.

On the other hand, if it is determined in step S505 that the result is not a jackpot winning result, a stop result setting process for a winning result is executed (step S509). Specifically, information on the mode of the picture to be finally stopped and displayed on the special figure display section 37a in the game round related to the start of the current variation is obtained from the stop result table for miss results stored in advance in the main side ROM 64. The identified information is written to the main RAM 65. The information on the pattern mode selected in this case is different from the information on the pattern mode selected in the case of a jackpot result.

After executing either step S508 or step S509, a process for determining the duration of a gaming session is executed (step S510). In this process, numerical information of the variation type counter CS is acquired. Furthermore, it is determined whether or not a ready-to-reach display will occur on the symbol display device 41 in the current game round. Specifically, if the game round related to the start of the current variation is a low-probability jackpot result or a most advantageous jackpot result, it is determined that the reach display will occur. Moreover, if it is not any jackpot result and the numerical information related to the reach random number counter C3 stored in the execution area AE is numerical information corresponding to the occurrence of the reach, it is determined that the reach display occurs.

When it is determined that a reach display will occur, the duration of the game round corresponding to the numerical information of the current variation type counter CS is obtained by referring to the reach occurrence duration table stored in the main side ROM 64. . On the other hand, if it is determined that the reach display does not occur, the continuation of the game round corresponding to the numerical information of the current variation type counter CS is continued by referring to the continuation period table for non-reach occurrence stored in the main side ROM 64. Get the period. Incidentally, the continuation period of a gaming session that can be obtained by referring to the continuation period table for non-reach occurrence is different from the continuation period of a gaming session that can be obtained by referring to the continuation period table for non-reach occurrence.

The duration of the game round when no reach occurs is set such that the longer the number of reservation information stored in the reservation area RE, the shorter the duration of the game round. Also, in situations where the support mode is high-frequency support mode, a shorter game duration is selected than in situations where the support mode is low-frequency support mode, compared to cases where the number of pending information is the same. A duration table for reach non-occurrence is set. However, the present invention is not limited to this, and a configuration may be adopted in which the duration of a game round does not vary depending on the number of pending information or the support mode, or the above relationship may be reversed. Furthermore, the above configuration may be applied to the duration of the game round when the reach occurs. Further, in the case of various jackpot results, separate duration tables may be set for each of the case of a losing reach and the case of a losing result in which no reach occurs. In this case, the duration of the game round will be allocated according to each game result.

Thereafter, the information on the duration of the game round acquired in step S510 is set in the special figure special electric timer counter provided in the main side RAM 65 (step S511). The numerical information set in the special figure special electric timer counter is updated in a timer update process (step S310). Incidentally, as a performance for the game round, a fluctuating display of symbols on the special symbol display section 37a and a fluctuating display of symbols on the symbol display device 41 are performed, but when each of these fluctuating displays is ended, the game cycle The final stop is displayed for a final stop period (for example, 0.5 seconds) in a state where the stop result is displayed (a state in which a predetermined combination of symbols is on standby on the active line in the symbol display device 41). In this case, the duration of the gaming session acquired in step S510 is the total time of one gaming session.

After that, the variation command and the type command are transmitted to the audio emission control device 81 (step S512). The variation command includes information about the duration of the game. Here, as mentioned above, the duration of the gaming session obtained by referring to the non-reach duration table is different from the duration of the gaming session obtained by referring to the duration table for reach occurrence. Even if the variation command does not include information on whether or not a reach has occurred, the audio emission control device 81 can identify whether or not a reach has occurred from the information on the duration of the game round. In this respect, it can be said that the variation command includes information indicating the presence or absence of reach. Note that the variation command may include information that directly indicates the presence or absence of reach. Further, the type command includes information on game results.

When the audio light emission control device 81 receives the variation command and the type command from the main CPU 63, it causes the display light emission section 53, the speaker section 54, and the symbol display device 41 to execute the performance for the game round. In this case, the effect of the game round is performed in a manner corresponding to the contents of the variation command and the type command. In addition, in the symbol display device 41, a fluctuating display of symbols is performed as a performance for the game round, and when the performance for the game round ends, a combination of symbols corresponding to the results of the win/fail judgment process and the distribution judgment process is displayed. Stop display.

Thereafter, variable display of the symbols on the special figure display section 37a is started (step S513). Then, the special figure special electric counter is incremented by 1 (step S514). In this case, since the numerical information of the special figure special electric line counter when the special figure fluctuation start process is executed is "0", the numerical information of the special figure special electric line counter becomes "1". Thereafter, the eleventh output flag provided in the main side RAM 65 is set to "1" (step S515). The eleventh output flag is a flag used by the main CPU 63 to specify that information indicating that a game round has started should be output to the management IC 66.

Returning to the explanation of the special figure special electric control process (FIG. 52), in step S407, a process during special figure variation is executed. In the special figure fluctuation processing, it is determined whether the timing is during the duration of the game round and before the final stop display, and if it is before the final stop display, the display mode of the symbols in the special figure display section 37a is set as a rule. Execute processing to change the When it is time to display the final stop, by adding 1 to the numerical information of the special figure special electric counter, the numerical information of the counter changes from the one corresponding to the process during special figure fluctuation to the one corresponding to the process during special figure confirmation. Update things. Note that in this embodiment, the final stop command is not sent from the main side CPU 63 to the audio emission control device 81.

In step S408, special figure confirmation processing is executed. In the special figure confirmation process, the display mode of the symbols in the special figure display section 37a is set to a display mode corresponding to the lottery result of the current game round. In addition, in the special figure confirmation process, it is determined whether or not the final stop period has elapsed, and if the period has elapsed, it is determined whether or not a transition to the opening/closing execution mode will occur. If the transition to the opening/closing execution mode does not occur, the numerical information of the special figure special electric counter is cleared to "0". When a transition to the opening/closing execution mode occurs, by adding 1 to the numerical information of the special figure special electric counter, the numerical information of the counter changes from the one corresponding to the process during special figure confirmation to the one corresponding to the special electric line start process. Update.

In step S409, a special call start process is executed. In the special call start process, if the process for starting the opening period in the current opening/closing execution mode has not been executed yet, the opening period setting process is executed. Further, an opening command is transmitted to the audio emission control device 81. By receiving the opening command, the audio light emission control device 81 causes the display light emission section 53, the speaker section 54, and the symbol display device 41 to execute the opening effect. If the opening period has elapsed, start processing is executed to start the first round game. In the start processing, the special electric winning device 32 is opened, and conditions for ending the round game are set. When setting this end condition, the upper limit duration time for keeping the special electric winning device 32 in the open state in the first round game of this time is set, and the upper limit duration time when the special electric winning device 32 is allowed to win in the first round game of this time is set. The upper limit number of game balls is set in a winning number counter provided in the main side RAM 65.

In step S410, a special electric line opening process is executed. In the special electricity release process, it is determined whether the end condition of the round game is satisfied or not. If the termination condition is satisfied, the special electric prize winning device 32 is brought into a closed state. If the round game that has ended this time is the round game of the last run, then by adding 1 to the numerical information of the special figure special electric counter, the numerical information of the counter will be changed from that corresponding to the special electric line open process to the special electric line closed process. If the round game that ended this time is the last round game to be played, the numerical information of the special figure special electric counter is added by 2 to make the numerical information of the counter correspond to the special electric current open process. Update from a new version to one that supports special call termination processing.

In step S411, special train closed processing is executed. In the special train closing process, it is determined whether the interval period between round games has elapsed. The interval period is set when the previous round game ends. When the interval period has elapsed, the special electric winning device 32 is opened and conditions for ending the round game are set. Then, by subtracting 1 from the numerical information of the special train special train counter, the numerical information of the counter is updated from that corresponding to the special train closed process to that corresponding to the special train open process.

In step S412, special call termination processing is executed. In the special electric signal termination process, if the process for starting the ending period in the current opening/closing execution mode has not been executed yet, the ending period (for example, 5 seconds) is set and an ending command is sent to the audio emission control device 81. . By receiving the ending command, the audio light emission control device 81 causes the display light emission section 53, the speaker section 54, and the symbol display device 41 to execute an ending effect. When the ending period has elapsed, each of the win/fail lottery mode and the support mode after the end of the opening/closing execution mode is set to a mode corresponding to the jackpot result that triggered the start of the current opening/closing execution mode.

Next, in the main side CPU 63, based on the detection results of each ball entry detection sensor 42a to 49a, the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the through A configuration for identifying whether or not a game ball has entered the gate 35 will be described. FIG. 14 is an explanatory diagram for explaining a configuration in which the detection results of the ball entry detection sensors 42a to 49a are input to the main CPU 63.

The main CPU 63 is provided with an input port 63a. The input port 63a is configured as an 8-bit parallel interface so that eight types of signals can be handled simultaneously. Areas in which information of "0" or "1" is stored in accordance with the voltage of each signal are provided in one-to-one correspondence with each terminal. In other words, the area includes the 0th bit D0 to the 7th bit D7. In addition, more than eight types of signals will be input to the input port 63a, but in order to limit the number of signals input at the same time to eight types, the signal group to be input to the input port 63a is determined by the driver IC. Switched through switching control.

In the ball entry detection process (step S309) of the timer interrupt process (FIG. 11), the signal group to be input to the input port 63a is set to the signal group from each of the ball entry detection sensors 42a to 49a. In a situation where such settings are made, the 0th bit D0 stores information corresponding to the detection signal from the first winning opening detection sensor 42a, and the 1st bit D1 corresponds to the detection signal from the second winning opening detection sensor 43a. The second bit D2 stores information corresponding to the detection signal from the third winning opening detection sensor 44a, and the third bit D3 stores information corresponding to the detection signal from the special electric detection sensor 45a. , the fourth bit D4 stores information corresponding to the detection signal from the first working port detection sensor 46a, the fifth bit D5 stores information corresponding to the detection signal from the second working port detection sensor 47a, and the fifth bit D5 stores information corresponding to the detection signal from the second working port detection sensor 47a. The 6th bit D6 stores information corresponding to the detection signal from the exit detection sensor 48a, and the 7th bit D7 stores information corresponding to the detection signal from the gate detection sensor 49a.

When the ball entry detection sensors 42a to 49a do not detect the passage of a game ball, they output a LOW level signal indicating that the ball is not being detected as a detection signal, thereby detecting the passage of a game ball. In this case, a HI level signal indicating that detection is in progress is output as a detection signal. The input port 63a stores information of "0" for the corresponding bit when receiving a LOW level signal, and stores "1" for the corresponding bit when receiving a HI level signal. Stores information about. In other words, in a situation where the passing of a game ball is not detected by the ball entry detection sensors 42a to 49a, information of "0" corresponding to the information indicating that the ball is not detected is stored for the corresponding bit, and the passing of the game ball is not detected. In a situation where detection is being performed, information of "1" corresponding to information indicating that detection is being performed is stored for the corresponding bit.

FIG. 15 is a flowchart showing the ball entry detection process executed in step S309 of the timer interrupt process (FIG. 11).

When it is confirmed that the situation has changed from the situation where the 0th bit D0 stores the information "0" to the situation where the information "1" is stored, the first winning opening detection sensor 42a detects one It is determined that a game ball has been detected (step S601: YES). In this case, the first output flag provided in the main side RAM 65 is set to "1" (step S602), and the value of the 10 prize ball counter provided in the main side RAM 65 is incremented by 1 (step S603). . The first output flag is used to specify by the main CPU 63 that information indicating that one game ball has been detected by the first winning opening detection sensor 42a should be output to the management IC 66. It's a flag. The 10 prize balls counter is a counter for the main CPU 63 to specify the number of times that 10 game balls should be paid out. If the value of the 10 prize balls counter is 1 or more, the 10 prize balls command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the 10 prize balls are outputted. When the command is output once, the value of the 10 prize ball counter is subtracted by 1. When the payout control device 77 receives the 10 prize balls command, it drives and controls the payout device 76 so that 10 game balls are paid out.

When it is confirmed that the first bit D1 has changed from the state where the information of "0" is stored to the state where the information of "1" is stored, the second winning opening detection sensor 43a detects one It is determined that a game ball has been detected (step S604: YES). In this case, the second output flag provided in the main side RAM 65 is set to "1" (step S605), and the value of the 10 prize ball counter provided in the main side RAM 65 is incremented by 1 (step S606). . The second output flag is used to specify by the main CPU 63 that information indicating that one game ball has been detected by the second winning opening detection sensor 43a should be output to the management IC 66. It's a flag.

When it is confirmed that the second bit D2 has changed from the state where the information of "0" is stored to the state where the information of "1" is stored, the third winning opening detection sensor 44a detects one It is determined that a game ball has been detected (step S607: YES). In this case, the third output flag provided in the main side RAM 65 is set to "1" (step S608), and the value of the 10 prize ball counter provided in the main side RAM 65 is incremented by 1 (step S609). . The third output flag is used to specify by the main CPU 63 that information indicating that one game ball has been detected by the third winning opening detection sensor 44a should be output to the management IC 66. It's a flag.

When it is confirmed that the third bit D3 has changed from the state in which "0" information is stored to the state in which "1" information is stored, one game ball is detected by the special electric detection sensor 45a. It is determined that it has been detected (step S610: YES). In this case, the special electric winning flag provided in the main side RAM 65 is set to "1" (step S611), the fourth output flag provided in the main side RAM 65 is set to "1" (step S612), and The value of the 15 award balls counter provided in the main side RAM 65 is incremented by 1 (step S613). The special electric winning flag is a flag used by the main CPU 63 to specify that one game ball has entered the special electric winning device 32 in the round game in the opening/closing execution mode. In the special figure special electric line control process (step S313) of the timer interrupt process (FIG. 11), by confirming that "1" is set in the special electric prize winning flag, it is possible to input one game ball into the special electric prize winning device 32. It is specified that a ball has occurred, and the remaining number of balls that can be entered into a special electric winning device 32 in a round game is subtracted by 1. When the process of subtracting 1 from the number of balls that can be entered is executed, the special electric winning flag is cleared to "0". The fourth output flag is a flag used by the main CPU 63 to specify that information indicating that one game ball has been detected by the special electric detection sensor 45a should be output to the management IC 66. . The 15 prize balls counter is a counter for the main CPU 63 to specify the number of times that 15 game balls should be paid out. If the value of the 15 prize balls counter is 1 or more, the 15 prize balls command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the 15 prize balls are output. When the command is output once, the value of the 15 prize ball counter is subtracted by 1. When the payout control device 77 receives the 15 prize balls command, it drives and controls the payout device 76 so that 15 game balls are paid out.

When it is confirmed that the fourth bit D4 has changed from the state in which "0" information is stored to the state in which "1" information is stored, the first operating port detection sensor 46a detects one It is determined that a game ball has been detected (step S614: YES). In this case, the first operation winning flag provided in the main side RAM 65 is set to "1" (step S615), and the fifth output flag provided in the main side RAM 65 is set to "1" (step S616). Furthermore, the value of the one prize ball counter provided in the main side RAM 65 is incremented by 1 (step S617). The first operation winning flag is a flag used by the main CPU 63 to specify that one game ball has entered the first operation port 33. In the special figure special electric control process (step S313) of the timer interrupt process (FIG. 11), by confirming that "1" is set in the first operation winning flag, the game is stored in the reservation area RE of the reservation storage area 65a. Processing for newly storing pending information is executed on the condition that the number of pending information that has been stored is less than the upper limit of 4 pieces. In the special electric special electric control process (step S313), it is confirmed that the first operation winning flag is set to "1", and when the process corresponding to the confirmation is executed, the first operation winning flag is cleared to "0". do. The fifth output flag is used to specify in the main CPU 63 that information indicating that one game ball has been detected by the first operating port detection sensor 46a should be output to the management IC 66. It's a flag. The one prize ball counter is a counter for the main CPU 63 to specify the number of times one game ball should be paid out. If the value of the counter for one prize ball is 1 or more, a one prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and one prize ball is output. When the command is output once, the value of the one prize ball counter is decremented by one. When the payout control device 77 receives the one prize ball command, it drives and controls the payout device 76 so that one game ball is paid out.

When it is confirmed that the fifth bit D5 has changed from the state where the information "0" is stored to the state where the information "1" is stored, the second operating port detection sensor 47a detects one It is determined that a game ball has been detected (step S618: YES). In this case, the second operation winning flag provided in the main side RAM 65 is set to "1" (step S619), and the sixth output flag provided in the main side RAM 65 is set to "1" (step S620). Furthermore, the value of the one prize ball counter provided in the main side RAM 65 is incremented by 1 (step S621). The second operation winning flag is a flag used by the main CPU 63 to specify that one game ball has entered the second operation port 34. In the special figure special electric control process (step S313) of the timer interrupt process (FIG. 11), by confirming that the second operation winning flag is set to "1", the game is stored in the reservation area RE of the reservation storage area 65a. Processing for newly storing pending information is executed on the condition that the number of pending information that has been stored is less than the upper limit of 4 pieces. In the special electric special electric control process (step S313), it is confirmed that the second operation winning flag is set to "1", and when the process corresponding to the confirmation is executed, the second operation winning flag is cleared to "0". do. The sixth output flag is used to specify in the main CPU 63 that information indicating that one game ball has been detected by the second operating port detection sensor 47a should be output to the management IC 66. It's a flag.

When it is confirmed that the sixth bit D6 has changed from the state in which the information "0" is stored to the state in which the information "1" is stored, the exit detection sensor 48a detects one game ball. is detected (step S622: YES). In this case, the seventh output flag provided in the main side RAM 65 is set to "1" (step S623). The seventh output flag is a flag used by the main CPU 63 to specify that information indicating that one game ball has been detected by the exit detection sensor 48a should be output to the management IC 66. be.

When it is confirmed that the seventh bit D7 has changed from the situation where the information "0" is stored to the situation where the information "1" is stored, the gate detection sensor 49a detects that one game ball is It is determined that it has been detected (step S624: YES). In this case, the gate winning flag provided in the main side RAM 65 is set to "1" (step S625). The gate winning flag is a flag used by the main CPU 63 to specify that one game ball has entered the through gate 35. In the timer interrupt process (FIG. 11), the general map and electric power control process (step S314) confirms that the gate winning flag is set to "1," and the general electrician that is stored in the general electric power reservation area 65c. A process of storing the numerical information of the current general utility goods release counter C4 in the general electric utility holding area 65c as the general electric utility object release counter C4 on the condition that the number of pieces of holding information on the side is less than the upper limit of 4 pieces. Execute. It is confirmed that the gate winning flag is set to "1" in the general map general electricity control process (step S314), and when the process corresponding to the confirmation is executed, the gate winning flag is cleared to "0".

Note that the timer interrupt process (FIG. 11) is activated at a 4 millisecond cycle as already explained, so when one ball entry detection sensor 42a to 49a starts detecting one game ball, the corresponding In a situation where the ball entry detection sensors 42a to 49a continue to detect that one game ball, the main CPU 63 is responsible for identifying that one game ball has been detected by the ball entry detection sensors 42a to 49a. It will be held at Therefore, it is sufficient to provide one each of the first to seventh output flags.

Next, the contents of the processing executed by the payout control device 77 will be explained. First, the electrical configuration of the payout control device 77 and various devices that communicate with the payout control device 77 will be described with reference to the block diagram of FIG. 16.

The payout control device 77 includes an MPU 91. The MPU 91 includes a payout side CPU92, which is an arithmetic processing device including a control section and a calculation section, a payout side ROM93, a payout side RAM94, an interrupt circuit, a timer circuit, a data input/output circuit, and the like.

The payout side ROM 93 is a memory such as a NOR type flash memory and a NAND type flash memory that does not require an external power supply to retain memory (ie, a nonvolatile storage means), and is used for reading only. The payout side ROM93 stores various control programs and fixed value data executed by the payout side CPU92.

The payout side RAM 94 is a memory such as SRAM and DRAM (that is, a volatile storage means) that requires an external power supply to maintain memory, and is used for both reading and writing. The payout side RAM 94 can be randomly accessed, and when compared with the same data capacity, the time required for reading is faster than the payout side ROM 93. The payout side RAM 94 temporarily stores various data for execution of the control program stored in the payout side ROM 93.

The payout side CPU 92 is capable of bidirectional communication with the main side CPU 63. When the payout side CPU 92 receives the prize ball command from the main side CPU 63, it drives and controls the payout device 76 so that the number of game balls corresponding to the prize ball command is paid out. In addition, the payout side CPU 92 monitors whether or not the state is such that it is possible to normally pay out the game balls, and when it is determined that the state is such that it is not possible to pay out the game balls normally, the payout side CPU 92 stores information in the payout side RAM 94. To stop a payout device 76 even in a situation where information on the number of unpaid prize balls is stored. Further, the payout side CPU 92 transmits a payout restriction command to the main side CPU 63 indicating that it is not possible to pay out normally. When the main CPU 63 receives the payout restriction command, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 issue a notification indicating that it is not possible to normally pay out game balls. A notification command is sent to the audio light emission control device 81 so that The states in which it is not possible to normally pay out game balls include a full state in which the lower tray 56a is filled with game balls, a no-ball state in which the tank 75 is not replenished with game balls, and a state in which the payout device 76 is not filled with game balls. There is an abnormal payout state in which the game machine does not operate normally, a main body open state in which the gaming machine main body 12 is released from the outer frame 11, and a front door open state in which the front door frame 14 is released from the inner frame 13. .

A full tank sensor (not shown) is provided in the middle of the game ball path leading from the payout device 76 to the lower tray 56a, and the detection result of the full tank sensor is input to the payout side CPU92. The payout side CPU 92 determines that the tank is full when the game ball is continuously detected by the full tank detection sensor, and the state where the game ball is continuously detected by the full tank sensor is canceled. In this case, it is determined that the full tank state has been released.

A ball non-detection sensor (not shown) is provided in the middle of the game ball path leading from the tank 75 to the payout device 76, and the detection result of the ball non-detection sensor is input to the payout side CPU92. The payout side CPU 92 identifies the no-ball state when the no-ball detection sensor continues to detect no game balls, and when the no-ball detection sensor continues to detect no game balls, the CPU 92 identifies the no-ball state. Specify that the no-ball state has been released.

The payout device 76 is provided with a payout detection sensor (not shown) for detecting game balls paid out from the payout device 76, and the detection result of the payout detection sensor is input to the payout side CPU 92. The payout side CPU 92 specifies that one game ball has been paid out from the payout device 76 when a game ball is detected by the payout detection sensor. In addition, the payout side CPU 92 identifies a payout abnormal state when the payout detection sensor does not continuously detect a game ball even though the payout device 76 is drive-controlled so that the game ball is paid out. , when the state in which the game balls are not continuously detected by the payout detection sensor is canceled, it is determined that the abnormal payout state has been canceled.

A front door open sensor 95 is provided on the front side of the inner frame 13 (see FIG. 2), and the detection result of the front door open sensor 95 is input to the payout side CPU 92. In this case, when the front door frame 14 is in the closed state with respect to the inner frame 13, the front door open sensor 95 transmits a closure detection signal to the payout side CPU 92, and the front door frame 14 is in the open state with respect to the inner frame 13. In this case, the front door open sensor 95 transmits an open detection signal to the payout side CPU 92. The payout side CPU 92 identifies that the front door frame 14 is in the closed state when receiving a closing detection signal from the front door open sensor 95, and specifies that the front door frame 14 is in the closed state when receiving an open detection signal from the front door open sensor 95. It is specified that the front door frame 14 is in an open state. Further, the payout side CPU 92 transmits a front door open command to the main side CPU 63 at the timing when it specifies that the front door frame 14 has changed from the closed state to the open state, and specifies that the front door frame 14 has changed from the open state to the closed state. At this timing, a front door closing command is sent to the main CPU 63. The main side CPU 63 specifies that the front door frame 14 is in the open state when receiving the front door open command, and specifies that the front door frame 14 is in the closed state when receiving the front door close command.

A main body opening sensor 96 is provided on the front side of the back pack unit 15 (see FIG. 2), and the detection result of the main body opening sensor 96 is input to the dispensing side CPU 92. In this case, when the gaming machine main body 12 is in a closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closure detection signal to the payout side CPU 92, and when the gaming machine main body 12 is in an open state with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the payout side CPU 92. The payout side CPU 92 specifies that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and determines that the gaming machine main body 12 is in the closed state when receiving the opening detection signal from the main body opening sensor 96. It is determined that the main body 12 is in an open state. Further, the payout side CPU 92 transmits a main body opening command to the main side CPU 63 at the timing when it specifies that the gaming machine main body 12 has changed from the closed state to the open state, and specifies that the gaming machine main body 12 has changed from the open state to the closed state. A main body closing command is sent to the main CPU 63 at the appropriate timing. The main CPU 63 specifies that the gaming machine main body 12 has entered the open state when receiving the main body opening command, and specifies that the gaming machine main body 12 has entered the closed state when receiving the main body closing command.

The timer interrupt process executed by the payout side CPU 92 will be described with reference to the flowchart in FIG. 17. The timer interrupt process is activated repeatedly at a predetermined period (for example, 2 milliseconds).

First, a full tank process is executed (step S701). As already explained, the full tank process is a process to identify whether or not the tank is full based on the detection result of the full tank sensor, and to stop the payout of game balls if the tank is full. At the same time, a command indicating that the tank is full is sent to the main CPU 63. Further, when the full tank state is released, a process for enabling the payout of game balls is executed, and a command indicating that the full tank state is released is sent to the main side CPU 63.

Thereafter, ball unnecessary processing is executed (step S702). In the no-ball process, as already explained, the process is performed to identify whether or not there is no ball based on the detection result of the no-ball detection sensor, and to stop the payout of game balls if there is no ball. At the same time, a command indicating that there is no ball is sent to the main CPU 63. Furthermore, when the no-ball state is canceled, a process for enabling the payout of game balls is executed, and a command indicating that the no-ball state is canceled is sent to the main CPU 63.

Thereafter, a payout abnormality monitoring process is executed (step S703). In the payout abnormality monitoring process, as already explained, it is determined whether or not there is an abnormal payout state based on the detection result of the payout detection sensor, and if it is in the abnormal payout state, a process is executed to stop the payout of game balls. At the same time, a command indicating that the payout is in an abnormal state is transmitted to the main CPU 63. Further, when the abnormal payout state is canceled, a process is executed to enable the payout of game balls, and a command indicating that the abnormal payout state is canceled is sent to the main CPU 63.

Thereafter, front door opening monitoring processing is executed (step S704). In the front door open monitoring process, as described above, it is determined whether or not the front door frame 14 is in the open state based on the detection result of the front door open sensor 95, and if the front door frame 14 is in the open state, It executes a process to stop the payout of game balls, and also sends a front door opening command to the main CPU 63. Further, when the front door frame 14 is closed, a process is executed to enable the payout of game balls, and a front door close command is transmitted to the main CPU 63.

Thereafter, main body opening monitoring processing is executed (step S705). In the main body open monitoring process, as described above, it is determined whether or not the gaming machine main body 12 is in the open state based on the detection result of the main body open sensor 96, and if the gaming machine main body 12 is in the open state, the game ball is At the same time, a main body release command is transmitted to the main CPU 63. Further, when the gaming machine main body 12 is closed, a process is executed to enable the payout of game balls, and a main body closing command is transmitted to the main CPU 63.

Thereafter, command reading processing is executed (step S706). In the command reading process, a process of reading the prize ball command sent by the main CPU 63 is executed, and the prize ball command is stored in the payout side RAM 94. After executing the prize ball setting process for adding the number corresponding to the received prize ball command to the unpaid prize ball number information in the payout side RAM 94 (step S707), the payout device 76 pays out the game balls. A payout control process is executed to control the execution of (step S708). In the payout control process, when the information on the number of unpaid prize balls stored in the payout side RAM 94 is a value of 1 or more, the payout device 76 is driven and controlled, and the payout detection sensor detects one game ball. In this case, the value of prize ball number information is subtracted by 1. Then, when the value of the prize ball number information becomes "0", the drive control of the payout device 76 is stopped. Thereafter, an external information setting process is executed to control the start and end of output of an external signal according to the processing results of various processes executed in the current timer interrupt process (step S709).

Next, a configuration for externally outputting information from the pachinko machine 10 to the hall computer HC provided in the game hall will be described.

As shown in FIG. 2, the back pack unit 15 is provided with an external terminal board 97. The external terminal board 97 is provided with a large number of external terminals, some of which are electrically connected to the main CPU 63, and some of which are electrically connected to the main CPU 63. A plurality of external terminals are electrically connected to the payout side CPU 92. Since the main side CPU 63 and the payout side CPU 92 are each electrically connected to the external terminal board 97 in this way, as shown in FIG. It is possible to output.

One external terminal of the external terminal board 97 is electrically connected to the front door open sensor 95, and one external terminal of the external terminal board 97 is electrically connected to the main body open sensor 96. In detail, regarding the configuration of this electrical connection, a signal relay board 98 is provided at a position in the middle of the signal path from the front door open sensor 95 to the payout side CPU 92. The signal relay board 98 is provided with a branch path SL2 branching from the signal path SL1 from the front door open sensor 95 toward the payout side CPU 92. The branch path SL2 is connected to an external terminal on the external terminal board 97 for opening the front door. Therefore, the electrical signal corresponding to the detection result by the front door opening sensor 95 is not only input to the payout side CPU 92 but also to the external terminal for opening the front door on the external terminal board 97. This makes it possible to externally output a signal indicating whether or not the front door frame 14 is in the open state to the hall computer HC without being controlled by the payout side CPU 92.

More specifically, regarding the main body open sensor 96, the signal relay board 98 is provided with a branch path SL4 branching from the signal path SL3 from the main body open sensor 96 toward the payout side CPU 92. The branch path SL4 is connected to an external terminal for opening the main body on the external terminal board 97. Therefore, the electrical signal corresponding to the detection result by the main body opening sensor 96 is not only input to the payout side CPU 92 but also to the external terminal for main body opening on the external terminal board 97. This makes it possible to externally output a signal indicating whether or not the gaming machine main body 12 is in an open state to the hall computer HC without being controlled by the payout side CPU 92.

Next, the contents of the information externally output from the main side CPU 63 and the payout side CPU 92 to the hall computer HC will be explained. First, the contents of the information externally output from the main CPU 63 to the hall computer HC will be explained.

In the external information setting process (step S318) in the timer interrupt process (FIG. 11), the main CPU 63 sets the output of information to each external terminal assigned to the main CPU 63 on the external terminal board 97. The information output from the main CPU 63 to the external terminal board 97 includes information indicating that the opening/closing execution mode is in progress, information indicating that the support mode is in the high-frequency support mode, and information indicating that the first game round has ended. information indicating that a predetermined number (for example, 100) of game balls are sent from the gaming area PA through any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. Information indicating that the game ball has been ejected, information indicating that the game ball has entered the first operating port 33, and information indicating that the game ball has entered the second operating port 34 are included. .

The payout side CPU 92 sets the output of information to each external terminal assigned to the payout side CPU 92 on the external terminal board 97 in the external information setting process (step S709) in the timer interrupt process (FIG. 17). The information output from the payout side CPU 92 to the external terminal board 97 includes information indicating that ten game balls have been paid out.

The hall computer HC is able to grasp the manner in which game balls are paid out in the pachinko machine 10 in accordance with various information received from the pachinko machine 10 through the external terminal board 97. for example,
・Ball payout rate which is the ratio of the number of game balls paid out until 100 game balls are ejected from the gaming area PA of the pachinko machine 10 ・Ball payout rate that is the ratio of the number of game balls paid out until 100 game balls are discharged from the gaming area PA of the pachinko machine 10 Ball rate (hereinafter, this ball rate will be referred to as "B")
・Ball output rate in opening/closing execution mode ・Ball output rate in high-frequency support mode ・Number of games played until 100 game balls are ejected from the gaming area PA of the pachinko machine 10 (hereinafter, this percentage is (referred to as “S”)
・BS × “Number of prize balls for winning in the first operating port 33 and second operating port 34”
- The number of game balls entering the first operating port 33 until 100 game balls are ejected from the gaming area PA of the pachinko machine 10 (hereinafter, this ratio will be referred to as "S1")
- The number of game balls entering the second operating port 34 until 100 game balls are ejected from the gaming area PA of the pachinko machine 10 (hereinafter, this ratio will be referred to as "S2")
・B-(S1 x "Number of prize balls for winning into the first operating port 33" + S2 x "Number of winning balls for winning into the second operating port 34")
- The probability of occurrence of the opening/closing execution mode per unit game play, the probability of occurrence of the high frequency support mode per unit game play, etc. are calculated. Thereby, it becomes possible to manage the manner in which game balls enter the game area PA of the pachinko machine 10 in the hall computer HC. Note that the number of prize balls is the number of game balls that are paid out when one game ball enters the corresponding ball entry section.

<Configuration for managing winning modes of game balls>
Next, a configuration for managing gaming history using the management IC 66 will be described. First, the electrical configuration of the management IC 66 will be described with reference to the block diagram of FIG.

As already explained, the MPU 62 of the main control device 60 includes a main CPU 63, a main ROM 64, a main RAM 65, and a management IC 66. In addition to these, the MPU 62 also includes an I/F 101 and the reading terminal 68d described above.

The I/F 101 is an interface for transmitting and receiving signals to and from devices external to the MPU 62. The I/F 101 is electrically connected to the main CPU 63 via an internal bus 103. Detection results from sensors such as the ball entry detection sensors 42a to 49a and commands from the payout side CPU 92 are input to the MPU 62 through the input port of the I/F 101, and based on the input detection results and the contents of the commands, As already explained, various processes are executed by the main CPU 63. Further, as a result of various processes being executed by the main side CPU 63, when a signal is output to a device such as the special electric drive unit 32b, the signal output is performed through the output port of the I/F 101, and the main side As a result of various processes being executed by the CPU 63, when a command is output to the payout side CPU 92 and the sound emission control device 81, the command output is performed through the output port of the I/F 101.

The management IC 66 includes a management side I/F 111, a management side CPU 112, a management side ROM 113, a management side RAM 114, an RTC 115, a correspondence memory 116, a history memory 117, a calculation result memory 131, It is equipped with These devices are connected through an internal bus 66a provided in the management IC 66 so as to be able to communicate in both directions.

The management side I/F 111 receives various signals from the main CPU 63 via a signal path group 118 for unidirectional communication built in the MPU 62, and also receives a signal path group 119 for unidirectional communication built in the MPU 62. This is an interface for transmitting various signals to the reading terminal 68d. Various signals from the main CPU 63 are input to the input port of the management side I/F 111, and various signals to the reading terminal 68d are output from the output port of the management side I/F 111. Note that the main CPU 63 is electrically connected to the reading terminal 68d via a signal path group 120 for bidirectional communication built in the MPU 62.

The management CPU 112 is an arithmetic processing device including a control section and an arithmetic section. The management side ROM 113 is a memory such as a NOR type flash memory and a NAND type flash memory that does not require an external power supply to maintain memory (that is, a nonvolatile storage means), and is used for reading only. The management side ROM 113 stores various control programs and fixed value data executed by the management side CPU 112. The management side RAM 114 is a memory such as SRAM and DRAM (that is, volatile storage means) that requires an external power supply to maintain memory, and is used for both reading and writing. The management side RAM 114 can be randomly accessed, and when compared with the same data capacity, the time required for reading is faster than that of the management side ROM 113. The management RAM 114 temporarily stores various data for execution of the control program stored in the management ROM 113.

The RTC 115 is a real-time clock that constantly measures date and time information and outputs the measured date and time information (hereinafter also referred to as date and time information) according to instructions from the management CPU 112. This is a configuration that allows this. Note that the RTC 115 is provided with a backup power source, so that it is possible to measure date information and time information even when the power to the pachinko machine 10 is cut off.

The correspondence memory 116 is a memory such as SRAM and DRAM (ie, volatile storage means) that requires an external power supply to maintain memory, and is used for both reading and writing. The correspondence memory 116 is for storing information on the correspondence between each of the buffers 122a to 122p provided in the input port 121 of the management side I/F 111 and the types of signals input to these buffers 122a to 122p. used for. Details of the contents of the correspondence memory 116 will be explained later.

The history memory 117 is a memory that does not require an external power supply to retain memory, such as a NOR flash memory or a NAND flash memory (that is, a nonvolatile storage means), and is used for both reading and writing purposes. The history memory 117 is used to store information regarding the game history received from the main CPU 63 through the management I/F 111. Details of the contents of the history memory 117 will be explained later.

The calculation result memory 131 is a memory that does not require an external power supply to retain memory, such as a NOR flash memory or a NAND flash memory (that is, a nonvolatile storage means), and is used for both reading and writing purposes. The calculation result memory 131 is used to sequentially store various parameters calculated by the management CPU 112 using the history information stored in the history memory 117. The contents of the various parameters stored in the calculation result memory 131 are sequentially displayed on the first to third notification display devices 69a to 69c, and are output to an external device connected to the reading terminal 68d.

Next, the configuration of the input port 121 provided in the management side I/F 111 will be explained. FIG. 19 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I/F 111.

The input port 121 is provided with a plurality of buffers 122a to 122p. Specifically, first to sixteenth buffers 122a to 122p are provided. One type of signal can be input to each of the first to 16th buffers 122a to 122p through signal paths 118a to 118p, and each of the first to 16th buffers 122a to 122p receives a signal to be input. When the input signal is at a LOW level, "0" information is stored as the first data, and when the input target signal is at a HI level, "1" information is stored as the second data. Note that the relationship between these LOW and HI and the first data and second data may be reversed.

A first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a. In this case, the main CPU 63 outputs the first signal of LOW level in a situation where no new game ball is detected by the first winning hole detection sensor 42a, and the first winning hole detection sensor 42a outputs one game ball. When a ball is detected, a first signal at HI level is output for a specific period. This specific period is sufficient for the management CPU 112 to specify that the first signal at HI level is input to the first buffer 122a.

A second signal corresponding to the detection result of the second winning opening detection sensor 43a is input to the second buffer 122b. In this case, the main CPU 63 outputs a second signal of LOW level in a situation where no new game balls are detected by the second winning hole detection sensor 43a, and the second winning hole detection sensor 43a outputs a second game ball. When a ball is detected, a second signal at HI level is output for a specific period of time. This specific period is a period sufficient for the management side CPU 112 to specify that the second signal at HI level is input to the second buffer 122b.

A third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the third buffer 122c. In this case, the main side CPU 63 outputs a third signal of LOW level in a situation where no new game ball is detected by the third winning hole detection sensor 44a, and one game ball is detected by the third winning hole detection sensor 44a. When a ball is detected, a third signal at HI level is output for a specific period. This specific period is a period sufficient for the management side CPU 112 to specify that the third signal at the HI level is being input to the third buffer 122c.

A fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. In this case, the main CPU 63 outputs the fourth signal at LOW level when no new game ball is detected by the special electric detection sensor 45a, and when one game ball is detected by the special electric detection sensor 45a. A fourth signal at HI level is output for a specific period. This specific period is a period sufficient for the management side CPU 112 to specify that the fourth signal at HI level is input to the fourth buffer 122d.

A fifth signal corresponding to the detection result of the first operating port detection sensor 46a is input to the fifth buffer 122e. In this case, the main side CPU 63 outputs the fifth signal of LOW level in a situation where no new game ball is detected by the first operating port detection sensor 46a, and the first operating port detection sensor 46a outputs the fifth signal of LOW level. When a ball is detected, a fifth signal at HI level is output for a specific period. This specific period is a period sufficient for the management CPU 112 to specify that the fifth signal at the HI level is being input to the fifth buffer 122e.

A sixth signal corresponding to the detection result of the second operating port detection sensor 47a is input to the sixth buffer 122f. In this case, the main CPU 63 outputs the sixth signal of LOW level in a situation where the second operating port detection sensor 47a does not detect a new game ball, and the second operating port detection sensor 47a outputs the sixth signal of LOW level. When a ball is detected, a sixth signal at HI level is output for a specific period. This specific period is a period sufficient for the management CPU 112 to specify that the sixth signal at the HI level is input to the sixth buffer 122f.

A seventh signal corresponding to the detection result of the outlet detection sensor 48a is input to the seventh buffer 122g. In this case, the main CPU 63 outputs the seventh signal at a LOW level when no new game ball is detected by the exit detection sensor 48a, and when one game ball is detected by the exit detection sensor 48a. In this case, a seventh signal at HI level is output for a specific period. This specific period is a period sufficient for the management side CPU 112 to specify that the seventh signal at HI level is being input to the seventh buffer 122g.

An eighth signal corresponding to whether or not the opening/closing execution mode is in progress is input to the eighth buffer 122h. In this case, the main CPU 63 continuously outputs the eighth signal at LOW level when the opening/closing execution mode is not present, and continuously outputs the eighth signal at HI level when the opening/closing execution mode is present.

A ninth signal corresponding to whether or not the high-frequency support mode is in progress is input to the ninth buffer 122i. In this case, the main CPU 63 continuously outputs the ninth signal at LOW level when the mode is not high-frequency support mode, and continuously outputs the ninth signal at HI-level when the mode is high-frequency support mode.

A tenth signal corresponding to whether or not the front door frame 14 is in the open period is input to the tenth buffer 122j. In this case, the main CPU 63 continues to output the 10th signal at LOW level when the front door frame 14 is in the closed state, and continues to output the 10th signal at HI level when the front door frame 14 is in the open state. and output it.

An eleventh signal corresponding to whether a game round has been started is input to the eleventh buffer 122k. In this case, the main CPU 63 continuously outputs the 11th signal at LOW level until the game round starts, and outputs the 11th signal at HI level for a specific period when the game round starts. do. This specific period is a period sufficient for the management side CPU 112 to specify that the HI level eleventh signal is input to the eleventh buffer 122k.

A setting value update signal for making the management CPU 112 recognize that the main CPU 63 has newly set the setting state of the pachinko machine 10 is input to the fifteenth buffer 122o. In this case, the main CPU 63 outputs a LOW level setting value update signal when the setting state of the pachinko machine 10 is not newly set, and when the setting state of the pachinko machine 10 is newly set. Then, the HI level setting value update signal outputs a pulse signal that is maintained for a specific period for a number of minutes corresponding to the newly set setting value. This specific period is a period sufficient for the management side CPU 112 to specify that the HI level setting value update signal is input to the fifteenth buffer 122o.

The 16th buffer 122p contains an output instruction signal for causing the management CPU 112 to recognize the opportunity to output the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 to the reading terminal 68d. is input. In this case, the main CPU 63 outputs a LOW level output instruction signal when there is no need to output history information, and outputs a HI level output instruction signal for a specific period when it is necessary to output history information. do. This specific period is a period sufficient for the management side CPU 112 to specify that the HI level output instruction signal is input to the 16th buffer 122p.

The 12th buffer 122l, the 13th buffer 122m, and the 14th buffer 122n can receive signals from the main CPU 63, but are blank to which normal signals are not input in the pachinko machine 10. In this way, by providing the input port 121 of the management side I/F 111 in this pachinko machine 10 with more buffers 122a to 122p than the types of signals output from the main side CPU 63 to the management IC 66, It becomes possible to use the management IC 66 for a model different from the present pachinko machine 10. This makes it possible to increase the versatility of the management IC 66. Incidentally, signal paths 118a to 118p are formed between the main CPU 63 and each of the first to sixteenth buffers 122a to 122p so as to correspond one-to-one to the first to sixteenth buffers 122a to 122p. However, the present invention is not limited to this, and a configuration may be adopted in which the signal paths 118l to 118n are not formed between the buffers 122l to 122n to be blanked.

It has been decided at the design stage of the management IC 66 that the setting value update signal will be input to the 15th buffer 122o and that the output instruction signal will be input to the 16th buffer 122p, and the instructions from the main CPU 63 can be received. Instead, the management CPU 112 can specify that the setting value update signal is input to the 15th buffer 122o and that the output instruction signal is input to the 16th buffer 122p. On the other hand, what types of signals are input to the first to fourteenth buffers 122a to 122n are not determined at the design stage of the management IC 66, and the types of these signals are determined by instructions from the main CPU 63. This is specified by the management CPU 112. Specification of the types of these signals in the management CPU 112 will be described in detail later, but when control is started in the main CPU 63 and the management CPU 112 with the start of supply of operating power to the MPU 62, the identification of the types of these signals from the main CPU 63 to the management CPU 112 This is done by sending a type identification command to. In this case, information on the types of various signals provided by the type identification command is stored in the correspondence memory 116, and when the management CPU 112 identifies the types of various signals in a situation where operating power is supplied, Information stored in the correspondence memory 116 is referred to.

FIG. 20 is an explanatory diagram for explaining the configuration of the correspondence memory 116. The correspondence memory 116 has first to fourteenth correspondence areas 123a to 123n in one-to-one correspondence to the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management side I/F 111. It is provided.

In the first correspondence area 123a, information indicating that it is a general winning hole 31 is stored as information for the management CPU 112 to specify the type of signal input to the first buffer 122a. In addition, in the first correspondence area 123a, there is information indicating that it is a general winning hole 31, as well as information on the number of game balls that will be paid out when one game ball enters the general winning hole 31 (10 balls). Stored. In the second correspondence area 123b, information indicating that it is a general winning hole 31 is stored as information for the management CPU 112 to specify the type of signal input to the second buffer 122b. In addition, in the second correspondence area 123b, along with information indicating that it is the general winning hole 31, information on the number of game balls that will be paid out when one game ball enters the general winning hole 31 (10 balls) is also included. Stored. In the third correspondence area 123c, information indicating that it is a general winning hole 31 is stored as information for the management CPU 112 to specify the type of signal input to the third buffer 122c. In addition, in the third correspondence area 123c, there is information indicating that it is a general winning hole 31, as well as information on the number of game balls that will be paid out when one game ball enters the general winning hole 31 (10 balls). Stored.

The fourth correspondence area 123d stores information indicating that it is the special electric winning device 32 as information for the management CPU 112 to specify the type of signal input to the fourth buffer 122d. In addition, in the fourth correspondence area 123d, there is information indicating that it is the special electric winning device 32, as well as information on the number of game balls that will be paid out when one game ball enters the special electric winning device 32 (15 balls). Stored. Information indicating that the signal is the first operating port 33 is stored in the fifth correspondence area 123e as information for the management CPU 112 to specify the type of signal input to the fifth buffer 122e. Further, in the fifth correspondence area 123e, information indicating that it is the first operating port 33 and information on the number of game balls that will be paid out when one game ball enters the first operating port 33 (1 ) are also stored. Information indicating that the signal is the second operating port 34 is stored in the sixth correspondence area 123f as information for the management CPU 112 to specify the type of signal input to the sixth buffer 122f. In addition, the sixth correspondence area 123f contains information indicating that the second operating port 34 is used, as well as information on the number of game balls that will be paid out when one game ball enters the second operating port 34 (1 ) are also stored. Information indicating that the signal is the output port 24a is stored in the seventh correspondence area 123g as information for the management CPU 112 to specify the type of signal input to the seventh buffer 122g.

The eighth correspondence area 123h stores information indicating that the opening/closing execution mode is used as information for the management CPU 112 to specify the type of signal input to the eighth buffer 122h. Information indicating the high frequency support mode is stored in the ninth correspondence area 123i as information for the management CPU 112 to specify the type of signal input to the ninth buffer 122i. Information indicating that it is the front door frame 14 is stored in the tenth correspondence area 123j as information for the management CPU 112 to specify the type of signal input to the tenth buffer 122j. The eleventh correspondence area 123k stores information indicating that a game round has started, as information for the management CPU 112 to specify the type of signal input to the eleventh buffer 122k.

The twelfth correspondence area 123l stores, as information for the management CPU 112 to specify the type of signal input to the twelfth buffer 122l, information indicating that the signal is blank and does not correspond to any of the types. The thirteenth correspondence area 123m stores, as information for the management CPU 112 to specify the type of signal input to the thirteenth buffer 122m, information indicating that the signal is blank and does not correspond to any of them. The fourteenth correspondence area 123n stores information indicating that the signal is blank and does not correspond to any of the types, as information for the management CPU 112 to specify the type of signal input to the fourteenth buffer 122n.

As described above, the configuration is such that the management CPU 112 specifies what kind of signals are input to the first to fourteenth buffers 122a to 122n by receiving instructions from the main CPU 63. , it becomes possible to use the management IC 66 for a model different from the present pachinko machine 10. This makes it possible to increase the versatility of the management IC 66.

Furthermore, instead of outputting information for recognizing the type of signal each time a signal corresponding to storage of history information is output to the first to fourteenth buffers 122a to 122n, the type of signal is recognized in advance. In addition, information for the management CPU 112 to specify the types of signals input to the first to fourteenth buffers 122a to 122n based on the output information is stored in the correspondence memory 116. The configuration is as follows. As a result, compared to a configuration in which information for recognizing the type of signal is output each time a signal corresponding to storage of history information is output to the first to fourteenth buffers 122a to 122n, the main It becomes possible to suppress the amount of information output from the side CPU 63 to the management side CPU 112.

Additionally, the management CPU 112 outputs information for specifying the types of signals input to the first to fourteenth buffers 122a to 122n when supply of operating power is started. As a result, when a game is started on the pachinko machine 10, the management CPU 112 can specify the types of signals input to the first to fourteenth buffers 122a to 122n.

Further, information setting that a setting value update signal is input to the fifteenth buffer 122o and information setting that an output instruction signal is input to the sixteenth buffer 122p is performed at the design stage of the management IC 66. As a result, the 15th buffer 122o and the 16th buffer 122p can reliably use the setting value update signal and the output instruction signal not only in this pachinko machine 10 but also in other pachinko machines that use the management IC 66. It becomes possible to omit the process for specifying the type of signal input to the input signal. Therefore, it is possible to reduce the processing load of processing for identifying the type of signal.

Next, the history memory 117 of the management IC 66 will be explained. FIG. 21 is an explanatory diagram for explaining the configuration of the history memory 117.

The history memory 117 is provided with a history area 124 for sequentially storing history information. In the history area 124, a plurality of pieces of pointer information are set in serial numbers, and a history information storage area 125 is set in one-to-one correspondence with each piece of pointer information. The history information storage area 125 can store combinations of RTC information and correspondence information. In this case, each history information storage area 125 has a data capacity of 2 bytes, a 1 byte data capacity is allocated as an area for storing RTC information, and an area for storing correspondence information. A data capacity of 1 byte is allocated. When it becomes necessary to store correspondence information according to the signals input to the first to fourteenth buffers 122a to 122n (actually, in the case of this pachinko machine 10, the first to eleventh buffers 122a to 122k) First, the date and time information measured by the current RTC 115 is stored in the area for storing RTC information in the history information storage area 125 corresponding to the pointer information currently being written. After that, the correspondence information corresponding to the buffers 122a to 122n that triggered the current information storage is read from the correspondence areas 123a to 123n corresponding to the buffers 122a to 122n in the correspondence memory 116, and the read correspondence information is is stored in the area for storing correspondence information of the history information storage area 125 corresponding to the pointer information currently being written.

Specifically, regarding the correspondence information stored in the history information storage area 125, the first to seventh buffers 122a to 122g receive signals corresponding to the detection results of the ball entry detection sensors 42a to 48a, as described above. Therefore, the first to seventh correspondence areas 123a to 123g in the correspondence memory 116 store information corresponding to the types of ball entry detection sensors 42a to 48a. More specifically, information corresponding to the type of ball entry portion corresponding to each of the ball entry detection sensors 42a to 48a is stored in the first to seventh correspondence areas 123a to 123g. In this pachinko machine 10, as already explained, the first to third winning hole detection sensors 42a to 44a detect game balls that have entered the general winning hole 31. Information indicating that each of the first to third correspondence areas 123a to 123c corresponding to the detection sensors 42a to 44a is a general winning hole 31 is stored. Further, the fourth correspondence area 123d stores information indicating that it is the special electric winning device 32, and the fifth correspondence area 123e stores information indicating that it is the first operating port 33. , the sixth correspondence area 123f stores information indicating that it is the second operating port 34, and the seventh correspondence area 123g stores information indicating that it is the out port 24a. If the buffer 122a to 122n that triggered the information storage this time is one of the first to seventh buffers 122a to 122g, the information on the type of ball entry part corresponding to the buffer 122a to 122g is the first to seventh buffer. The information about the type of ball entering part is read out from one of the seventh correspondence areas 123a to 123g, and the information about the type of ball entering part is stored as is in the area for storing correspondence information in the history information storage area 125.

On the other hand, the eighth buffer 122h receives a signal indicating whether it is in the open/close execution mode, the ninth buffer 122i receives a signal indicating whether it is in the high-frequency support mode, and the tenth buffer 122j receives a signal indicating whether it is in the high-frequency support mode. A signal indicating whether the front door frame 14 is open is inputted, and a signal indicating whether a game round has been started is inputted to the eleventh buffer 122k. Therefore, the eighth correspondence area 123h stores information indicating that the opening/closing execution mode is set, the ninth correspondence area 123i stores information indicating that the high frequency support mode is set, and the tenth correspondence area Information indicating that it is the front door frame 14 is stored in 123j, and information indicating that it is the game round is stored in the eleventh correspondence area 123k.

As already explained, the main CPU 63 continuously outputs the 8th signal at LOW level when the opening/closing execution mode is not in effect, and continuously outputs the 8th signal at HI level when the opening/closing execution mode is in effect. The side CPU 112 specifies that the opening/closing execution mode has started when the eighth signal changes from the LOW level to the HI level, and specifies that the opening/closing execution mode has ended when the eighth signal changes from the HI level to the LOW level. becomes possible. Then, in both cases where the eighth signal changes from the LOW level to the HI level and from the HI level to the LOW level, the management CPU 112 receives an opportunity to store the correspondence information in the history information storage area 125. Specify that That is, when the eighth signal changes from LOW level to HI level, not only the information indicating that the opening/closing execution mode is in the opening/closing execution mode read from the eighth correspondence area 123h but also the start information are transferred to the history information storage area 123h. is stored in the area for storing correspondence relationship information. Furthermore, when the eighth signal changes from the HI level to the LOW level, not only the information indicating the opening/closing execution mode read from the eighth correspondence area 123h but also the end information are transferred to the history information storage area 123h. is stored in the area for storing correspondence relationship information.

As already explained, the main CPU 63 continuously outputs the 9th signal at LOW level when it is not in high-frequency support mode, and continuously outputs the 9th signal at HI-level when it is in high-frequency support mode. , the management side CPU 112 specifies that the high-frequency support mode has started when the ninth signal changes from the LOW level to the HI level, and the high-frequency support mode ends when the ninth signal changes from the HI level to the LOW level. It is possible to identify that. Then, when the ninth signal changes from the LOW level to the HI level, and from the HI level to the LOW level, the management CPU 112 receives an opportunity to store the correspondence information in the history information storage area 125. Specify that In other words, when the ninth signal changes from LOW level to HI level, not only the information indicating that the high frequency support mode is in the high frequency support mode read from the ninth correspondence area 123i but also the start information are transferred to the history information storage area. It is stored in an area for storing 125 correspondence information. Furthermore, when the ninth signal changes from the HI level to the LOW level, not only the information indicating the high frequency support mode read from the ninth correspondence area 123i but also the termination information are transferred to the history information storage area. It is stored in an area for storing 125 correspondence information.

As already explained, the main CPU 63 continuously outputs the 10th signal at LOW level when the front door frame 14 is in the closed state, and outputs the 10th signal at HI level when the front door frame 14 is in the open state. In order to continue outputting, the management side CPU 112 identifies that the front door frame 14 is opened when the 10th signal changes from LOW level to HI level, and specifies that the front door frame 14 is opened when the 10th signal changes from HI level to LOW level. It becomes possible to specify that the front door frame 14 is closed. Then, in both cases where the tenth signal changes from LOW level to HI level and from HI level to LOW level, the management CPU 112 receives an opportunity to store correspondence information in the history information storage area 125. Specify that In other words, when the 10th signal changes from LOW level to HI level, not only the information indicating that it is the front door frame 14 read from the 10th correspondence area 123j but also the opening start information is stored in the history information. It is stored in the area for storing correspondence information in area 125. Further, when the 10th signal changes from HI level to LOW level, history information is stored together with not only the information indicating that the front door frame 14 is the front door frame 14 read from the 10th correspondence area 123j but also the opening end information. It is stored in the area for storing correspondence information in area 125.

As already explained, the main CPU 63 continuously outputs the 11th signal at LOW level until the start timing of the game round, and when the start timing of the game round comes, the 11th signal at HI level is output for a specific period. Output a signal. Therefore, the management side CPU 112 specifies that a game round has started when the eleventh signal changes from LOW level to HI level. In other words, when the 11th signal changes from LOW level to HI level, information indicating that it is a game time read from the 11th correspondence area 123k is stored in the correspondence relationship information of the history information storage area 125. Store in the area.

The history information storage area 125 is capable of storing all the history information that has occurred during that period, even if there are 10 consecutive business days in which the pachinko machine 10 continues to shoot game balls from opening to closing. It takes a few minutes. For example, if history information is generated 60,000 times in a day, more than 600,000 history information storage areas 125 are provided. This allows all history information to be stored and held in the history memory 117 for at least 10 days.

The history memory 117 is provided with a pointer area 126 in addition to the history area 124. The pointer area 126 stores information for the management CPU 112 to specify pointer information that is currently being written in the history memory 117. Specifically, at the time of shipment of the pachinko machine 10, the pointer area 126 is set with information that specifies pointer information of "0" to be written. Then, each time a piece of history information is newly stored in the history information storage area 125, the information in the pointer area 126 is updated so that the value of the pointer information to be written is incremented by 1. When the pointer information in the last order becomes the write target and the history information is stored in the history information storage area 125 corresponding to the pointer information in the last order, the pointer information is set so that the pointer information of "0" becomes the write target. The information in the area 126 is updated. As a result, if an opportunity arises to store history information that exceeds the number of pieces of history information that can be stored, the history information storage area 125 where the oldest history information is stored will be overwritten with new history information in order. Become.

In addition, when history information is read from the history memory 117 by an external device, the history information storage area 125 is cleared to all "0" and the pointer information of "0" becomes the writing target. Information in the pointer area 126 is updated. This makes it possible to prevent history information that has once been targeted for reading from becoming targeted for reading again.

Next, a specific processing configuration for managing the game history using the management IC 66 will be explained. First, a processing configuration for storing information on the correspondence between the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management side I/F 111 and signal types in the correspondence memory 116 will be described. FIG. 22 is a flowchart showing the recognition process executed by the main CPU 63. Note that the recognition process is executed in step S111 in the main process (FIG. 9).

First, a recognition output counter provided in the main RAM 65 is set to "14" (step S801). The recognition output counter is the remainder of the information output for making the management side CPU 112 recognize which type of signal the first to fourteenth buffers 122a to 122n of the input port 121 in the management side I/F 111 correspond to. This counter is used by the main CPU 63 to specify the required number of times. As already explained, since the 14 first to 14th buffers 122a to 122n are the targets of signal type recognition, "14" is set in the recognition output counter.

Thereafter, output processing of an identification start command is executed (step S802). The main CPU 63 outputs various commands to the management CPU 112 in order to make the management CPU 112 recognize which types of signals the first to fourteenth buffers 122a to 122n correspond to. When outputting this command, the first to eighth signals input to the first to eighth buffers 122a to 122h are used. That is, by using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h) used to instruct the management CPU 112 to store history information, the first to fourteenth buffers 122a A command is output to make the management CPU 112 recognize which type of signal the signals 122n to 122n correspond to. This reduces the number of signal paths compared to a configuration in which the signal path for outputting the command is provided separately from the signal paths 118a to 118p for outputting signals to the first to sixteenth buffers 122a to 122p. This makes it possible to simplify the configuration. The identification start command has a data capacity of 8 bits, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. Furthermore, in the process of outputting the identification start command, the output state of the ninth signal is switched to the HI level at the timing of starting the output of the identification start command in order to make the management side CPU 112 recognize that a new command has been transmitted. Furthermore, the output period of the identification start command and the period during which the output state of the ninth signal is maintained at the HI level are set to a period sufficient for the management CPU 112 to recognize the output state of the identification start command and the ninth signal. has been done. By receiving the identification start command, the management side CPU 112 determines that it should start processing for storing information on the correspondence between the first to fourteenth buffers 122a to 122n and the signal types in the correspondence memory 116. Identify.

Thereafter, the type identification command corresponding to the current value of the recognition output counter in the main RAM 65 is read from the main ROM 64 (step S803). In this case, the first to fourteenth buffers 122a to 122n correspond to each other so that the first buffer 122a becomes the signal type setting target first, and then the nth buffer and then the n+1th buffer become the signal type setting target. The recognition setting for the signal type to be used is performed. Therefore, if the output counter for recognition is "14" to "12", the type identification command indicating that it is a general winning hole 31 and the number of prize balls is read out, and if the output counter for recognition is "11", it is a special prize winning hole. A type identification command indicating that the device is the device 32 and the number of prize balls is read out, and if the recognition output counter is “10”, a type identification command indicating that the device is the first operating port 33 and the number of prize balls is read out, If the output counter for recognition is "9", it is the second operating port 34 and the type identification command indicating the number of prize balls is read out, and if the output counter for recognition is "8", it is the out port 24a. If the output counter for recognition is "7", read the type identification command that indicates the opening/closing execution mode, and if the output counter for recognition is "6", it is the high frequency support mode. If the output counter for recognition is "5", the type identification command is read out indicating that it is the front door frame 14, and if the output counter for recognition is "4", it is the game time. A type identification command indicating that the recognition output counter is between "3" and "1" is read out, and a type identification command indicating that the recognition output counter is blank is read out.

Thereafter, output processing of the read type identification command is executed (step S804). The type identification command has a data capacity of 8 bits like the identification start command, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In addition, in the process of outputting the identification type command, in order to make the management CPU 112 recognize that a new command has been transmitted, the output state of the ninth signal is switched to the HI level at the timing when outputting the identification type command is started. In addition, the output period of the identification type command and the period during which the output state of the ninth signal is maintained at the HI level are set to a period sufficient for the management CPU 112 to recognize the output state of the identification type command and the ninth signal. has been done. By receiving the identification type command, the management side CPU 112 sets correspondence areas 123a to 123n corresponding to the current setting target buffer among the first to fourteenth buffers 122a to 122n to correspond to the identification type command. Store information to be used.

Thereafter, the value of the recognition output counter in the main side RAM 65 is subtracted by 1 (step S805), and it is determined whether the value of the recognition output counter after the 1 subtraction is "0" (step S806). If the value of the recognition output counter is 1 or more (step S806: NO), a process for outputting a type identification command corresponding to the value of the recognition output counter after being subtracted by 1 is executed (steps S803 and Step S804).

On the other hand, if the value of the recognition output counter is "0" (step S806: YES), output processing of the identification end command is executed (step S807). The identification end command has a data capacity of 8 bits, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In addition, in the process of outputting the identification end command, the output state of the ninth signal is switched to the HI level at the timing when outputting the identification end command is started, in order to make the management side CPU 112 recognize that a new command has been transmitted. In addition, the output period of the identification end command and the period during which the output state of the ninth signal is maintained at the HI level are set to a period sufficient for the management CPU 112 to recognize the output state of the identification end command and the ninth signal. has been done. By receiving the identification end command, the management side CPU 112 specifies that the process for storing information on the correspondence between the first to fourteenth buffers 122a to 122n and the signal types in the correspondence memory 116 has been completed. do.

Next, the management processing executed by the management side CPU 112 will be explained with reference to the flowchart of FIG. 23. The management process is started when the supply of operating power to the management side CPU 112 is started. Note that the processing speed of the management side CPU 112 is faster than the processing speed of the main side CPU 63, and after one timer interrupt process (FIG. 11) is started in the main side CPU 63, the next timer interrupt process (FIG. 11) is started. The combination of processes from step S908 onward in the management process is executed 16 or more times before the process starts.

First, it is determined whether an identification start command has been received from the main CPU 63 (step S901). If the identification start command has not been received (step S901: NO), the process returns to step S901 after executing the setting update recognition process (step S902). In the setting update recognition process, the details will be described later, but when the main CPU 63 performs a new setting of the setting state of the pachinko machine 10, a corresponding process is executed.

When the identification start command is received from the main CPU 63 (step S901: YES), the value of the setting target counter provided in the management side RAM 114 is cleared to "0" (step S903). The setting target counter is a counter used by the management CPU 112 to specify the types of the buffers 122a to 122n whose signal types are to be set. The first buffer 122a is the signal type setting target first, and thereafter the signal type is set to the nth buffer and then the (n+1)th buffer.

Thereafter, on the condition that a type identification command has been received from the main CPU 63 (step S904: YES), a correspondence relationship setting process is executed (step S905). In the correspondence setting process, the currently received type identification is placed in the correspondence area corresponding to the current value of the counter to be set in the management side RAM 114 among the first to fourteenth correspondence areas 123a to 123n of the correspondence memory 116. Stores information about the signal type set in the command. Thereafter, the value of the setting target counter in the management side RAM 114 is incremented by 1 (step S906).

If a negative determination is made in step S904, or if the process in step S906 is executed, it is determined whether an identification end command has been received from the main CPU 63 (step S907). If the identification end command has not been received (step S907: NO), the process returns to step S904, and on the condition that a new type identification command is received from the main CPU 63 (step S904: YES), steps S905 and S906 are performed. Execute the process again.

If the identification end command has been received from the main CPU 63 (step S907: YES), the processes of steps S908 to S910 are repeatedly executed. In step S908, a history setting process is executed to store history information corresponding to the type of signal received from the main CPU 63 in the history memory 117, although the details will be described later. In step S909, although details will be described later, various parameters are calculated using the history information stored in the history memory 117, and the results of the calculations are reported on the first to third notification display devices 69a to 69c. Executes display output processing for. In step S910, although details will be described later, external output processing is executed to output the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 to the reading terminal 68d.

FIG. 24 is a time chart showing how information on the correspondence between the first to fourteenth buffers 122a to 122n and the types of signals input to these buffers 122a to 122n is stored in the correspondence memory 116. FIG. 24(a) shows a period during which commands are output from the main CPU 63 to the management CPU 112 using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h). b) shows the period in which the output state of the ninth signal is at HI level, and FIG. 24(d) shows the execution period of the identification state in which the process for identifying the correspondence is executed, and FIG. 24(d) shows the timing at which the correspondence setting process (step S905) is executed by the management CPU 112.

By starting the supply of operating power to the main CPU 63 and the management CPU 112, the output of the identification start command using the first to eighth signals is started at timing t1, as shown in FIG. 24(a). Ru. Further, at the timing of t1, the output state of the ninth signal is changed from LOW level to HI level as shown in FIG. 24(b). Thereafter, at timing t2 when the identification start command continues to be output, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. 24(b). By confirming that the output state of the ninth signal has changed from the HI level to the LOW level, the management side CPU 112 identifies that the command is being sent from the main side CPU 63, and outputs the first to eighth buffers 122a to 122h. By checking the information, the content of the command received from the main CPU 63 can be grasped. In this case, since the identification start command has been received, the management CPU 112 enters the identification state by making an affirmative determination in step S901 of the management process (FIG. 23). Thereafter, at timing t3, the output of the identification start command is stopped as shown in FIG. 24(a).

Thereafter, at timing t4, output of the first type identification command using the first to eighth signals is started as shown in FIG. 24(a). Further, at the timing t4, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. 24(b). Thereafter, at timing t5 when the type identification command continues to be output, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. 24(b). The management side CPU 112 identifies that the command has been sent from the main side CPU 63 by confirming that the output state of the ninth signal has changed from the HI level to the LOW level, and updates the first to eighth buffers 122a to 122h. By checking the information, the content of the command received from the main CPU 63 can be grasped. In this case, since the first type identification command has been received, the management side CPU 112 executes the correspondence setting process at timing t5 as shown in FIG. 24(d). In the correspondence setting process, information indicating that the opening is a general winning hole 31 and information on the number of prize balls are stored in the first correspondence area 123a of the correspondence memory 116. Thereafter, at timing t6, the output of the type identification command is stopped as shown in FIG. 24(a).

After that, at each of the timings from t7 to t9, from t10 to t12, from t13 to t15, and from t16 to t18, the main Correspondence setting processing corresponding to the type identification command output from the side CPU 63 is executed by the management side CPU 112. In this case, the correspondence relationship setting process corresponding to the 14th type identification command is completed from timing t16 to timing t18.

Thereafter, at timing t19, output of the identification end command using the first to eighth signals is started as shown in FIG. 24(a). Further, at the timing t19, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. 24(b). Thereafter, at timing t20 when the identification end command continues to be output, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. 24(b). The management side CPU 112 identifies that the command has been sent from the main side CPU 63 by confirming that the output state of the ninth signal has changed from the HI level to the LOW level, and updates the first to eighth buffers 122a to 122h. By checking the information, the content of the command received from the main CPU 63 can be grasped. In this case, since the identification end command has been received, the identification state of the management CPU 112 ends at timing t20 as shown in FIG. 24(c). Thereafter, at timing t21, the output of the identification end command is stopped as shown in FIG. 24(a).

As described above, by using the ninth signal to make the management CPU 112 recognize whether or not a command is being output, it is possible to instruct the management CPU 112 as to when to store history information. Even in a configuration where command output is performed using the first to eighth signals (that is, the first to eighth signal paths), it is clearly made clear to the management CPU 112 that the command is being output. It becomes possible to make it recognized.

Next, a processing configuration for storing history information in the history memory 117 will be described. FIG. 25 is a flowchart showing management output processing executed by the main CPU 63. Note that the management output process is executed in step S319 in the timer interrupt process (FIG. 11).

First, a management target counter provided in the main side RAM 65 is set to "11" (step S1001). The managed target counter allows the main CPU 63 to determine whether or not there is a managed target that is not specified as to whether or not the signal output state to the management CPU 112 should be changed in the current management output process. It is also a counter for the main CPU 63 to specify whether or not the signal output state to the management CPU 112 should be changed for which management target. The management targets for which the main CPU 63 specifies whether or not the signal output state to the management CPU 112 should be changed in one management output process are the seven ball entry detection sensors 42a to 48a, There are a total of 11 items, including whether the opening/closing execution mode is executed, whether the high-frequency support mode is executed, whether the front door frame 14 is opened or closed, and whether the game round is started. Therefore, first, the managed counter is set to "11".

Thereafter, it is determined whether the output state of the signal to the management CPU 112 for the managed object corresponding to the current managed object counter value is at the HI level (step S1002). If the level is not HI (step S1002: NO), by determining whether the value of the managed counter is 5 or more, the ball entry detection sensor 42a has seven managed targets corresponding to the value of the managed counter. to 48a is specified (step S1003).

If an affirmative determination is made in step S1003, it is determined whether the output flag of the main side RAM 65 corresponding to the value of the managed counter is set to "1" (step S1004). Specifically, when the value of the managed counter is "11" and corresponds to the first winning opening detection sensor 42a, it is determined whether the first output flag is set to "1", If the value of the counter to be managed is "10" and corresponds to the second winning opening detection sensor 43a, it is determined whether the second output flag is set to "1", and the value of the counter to be managed is determined. is "9" and corresponds to the third winning a prize opening detection sensor 44a, it is determined whether or not the third output flag is set to "1", and the value of the managed counter is "8". Yes, if it corresponds to the special electric detection sensor 45a, it is determined whether the fourth output flag is set to "1", and if the value of the managed counter is "7", the first operating port detection sensor 46a is determined. If it is compatible with the second operating port detection sensor 47a, it is determined whether the fifth output flag is set to "1" or not, and the value of the managed counter is "6", which corresponds to the second operating port detection sensor 47a. In this case, it is determined whether or not the sixth output flag is set to "1", and if the value of the managed counter is "5" and corresponds to the output port 24a, the seventh output flag is set to "1". 1" is set. As already explained, these first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

If the output flag corresponding to the value of the counter to be managed is set to "1" (step S1004: YES), the output state of the signal corresponding to the value of the counter to be managed among the first to seventh signals is set to HI level. (step S1005). Thereafter, the output flag corresponding to the value of the managed counter is cleared to "0" (step S1006).

If a negative determination is made in step S1003, it is determined whether an opportunity to switch the output state of the signal corresponding to the value of the managed counter to the HI level has occurred (step S1007). Specifically, if the value of the counter to be managed is "4", it is determined whether a transition to the opening/closing execution mode has occurred, and if the value of the counter to be managed is "3", the high It is determined whether a transition to the frequency support mode has occurred, and if the value of the managed counter is "2", it is determined whether the front door frame 14 has become open, and the managed counter is If the value is "1", it is determined whether the game round has started by determining whether or not the eleventh output flag is set to "1". If an affirmative determination is made in step S1007, the output state of the signal corresponding to the value of the managed counter is set to HI level (step S1008). Note that when the process of step S1008 is executed when the value of the managed counter is "1", the eleventh output flag is cleared to "0".

If an affirmative determination is made in step S1002, it is determined whether an opportunity has occurred to switch the output state of the signal corresponding to the value of the managed counter to the LOW level (step S1009). Specifically, if the value of the management target counter is 5 or more or "1" and the current management target is any of the ball entry detection sensors 42a to 48a or the start of a game round, the first to seventh signals and determines whether a HI output continuation period (specifically 10 milliseconds) has elapsed since the output state of the signal corresponding to the value of the managed counter among the 11th signals was switched from the LOW level to the HI level. . This HI output continuation period is set to a period longer than the longest processing interval of the history setting process (step S908) of the management process (FIG. 23) in the management side CPU 112, and the output of the signal that has switched from the LOW level to the HI level. This is a period during which the management CPU 112 can reliably identify the state. In addition, if the value of the managed target counter is "4" and the current managed target is in the open/close execution mode, it is determined whether the open/close execution mode has ended, and if the value of the managed target counter is "3" and the current managed target is in the open/close execution mode. If the current management target is the high-frequency support mode, it is determined whether the high-frequency support mode has ended or not, and the value of the management target counter is "2" and the current management target is the front door frame 14. If so, it is determined whether the front door frame 14 is in a closed state. If an opportunity to switch the output state of the signal corresponding to the value of the managed counter to the LOW level has occurred (step S1009: YES), the output state of the signal corresponding to the value of the managed counter is set to the LOW level ( Step S1010).

If a negative determination is made in step S1004, if the process of step S1006 is executed, if a negative determination is made in step S1007, if the process of step S1008 is executed, if a negative determination is made in step S1009, or if a negative determination is made in step S1009, or When the process of S1010 is executed, the value of the managed counter of the main side RAM 65 is subtracted by 1 (step S1011). Then, it is determined whether the value of the managed counter after being subtracted by 1 is "0" (step S1012). If the value of the managed target counter is 1 or more (step S1012: NO), the processes from step S1002 onwards are executed for the managed target corresponding to the new managed target counter value.

Next, the history setting process executed by the management CPU 112 will be described with reference to the flowchart of FIG. 26. The history setting process is executed in step S908 of the management process (FIG. 23).

First, the number of buffers to be checked by the management CPU 112 among the first to fourteenth buffers 122a to 122n is set in a check target counter provided in the management RAM 114 (step S1101). Specifically, among the first to fourteenth correspondence areas 123a to 123n in the correspondence memory 116, the number of correspondence areas in which information other than information indicating blankness is stored is identified, and the number of correspondence areas is identified. Set the information of the number in the confirmation target counter. In this pachinko machine 10, as already explained, information other than the information indicating blankness is stored in the first to eleventh correspondence areas 123a to 123k, so in step S1101, the counter to be checked is set to "11". do.

Thereafter, it is checked whether the numerical information stored in the buffer corresponding to the current value of the counter to be checked among the first to fourteenth buffers 122a to 122n has been changed from "0" to "1". Then, it is determined whether the output state of the input signal from the main CPU 63 to the buffer has been switched from the LOW level to the HI level (step S1102). Note that when the value of the counter to be checked is "n", the nth buffers 122a to 122n are to be checked for numerical information. For example, if the value of the counter to be checked is "11", the 11th buffer 122k will be the target for checking numerical information, and if the value of the counter to be checked is "5", the fifth buffer 122e will be the target for checking numerical information. .

If an affirmative determination is made in step S1102, RTC information, which is date information and time information, is read from the RTC 115 (step S1103). Then, writing processing to the history memory 117 is executed (step S1104). In the writing process, the pointer information of the history area 124 that is currently the writing target is identified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the writing target is specified. The RTC information read in step S1103 is written in the history information storage area 125 of the history area 124. Further, the correspondence information is read from the correspondence areas 123a to 123n corresponding to the current check target counter value, and written into the history information storage area 125 corresponding to the pointer information to be written. Furthermore, if the correspondence relationship information is any of the information indicating that the opening/closing execution mode is in effect, the information indicating that it is in high-frequency support mode, and the information indicating that it is the front door frame 14, the above-mentioned Not only correspondence information but also start information is written in the history information storage area 125 corresponding to the pointer information to be written. Note that when the value of the confirmation target counter is "n", the n-th correspondence areas 123a to 123n are the targets for reading the correspondence information. For example, if the value of the counter to be checked is "11", the 11th correspondence area 123k becomes the correspondence relation information read target, and if the value of the counter to be checked is "5", the fifth correspondence area 123e is the correspondence relation. The information is to be read.

By executing the writing process as described above, the value of the counter to be checked is set to one of the out opening 24a, the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the game round. In this case, the history information storage area 125 corresponding to the pointer information to be written contains the RTC information, the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 33. The combination of the operating port 34 and the correspondence information indicating that it is one of the game times is stored as history information. In addition, if the value of the counter to be checked is one of the opening/closing execution mode, high-frequency support mode, and front door frame 14, RTC information is stored in the history information storage area 125 corresponding to the pointer information to be written. A combination of the start information and the correspondence information indicating that the mode is one of the opening/closing execution mode, the high-frequency support mode, and the front door frame 14 is stored as history information.

Thereafter, target pointer update processing is executed (step S1105). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read out and incremented by one. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

If a negative determination is made in step S1102, or if the process in step S1105 is executed, the correspondence areas 123a to 123n corresponding to the current value of the counter to be checked indicate whether or not the signal output has been switched to the LOW level. It is determined whether correspondence information to be checked is stored (step S1106). Specifically, when the current value of the counter to be checked is "8" to "10", information indicating that the opening/closing execution mode is in effect and information indicating that the high-frequency support mode is in the corresponding correspondence area 123h to 123j are displayed. Since either the information indicating that there is a door frame 14 or the information indicating that it is the front door frame 14 is stored, an affirmative determination is made in step S1106.

If an affirmative determination is made in step S1106, the numerical information stored in the buffer corresponding to the current check target counter value among the first to fourteenth buffers 122a to 122n is changed from "1" to "0". By checking whether the input signal from the main CPU 63 has been input to the buffer, it is determined whether the output state of the input signal from the main CPU 63 to the buffer has been switched from the HI level to the LOW level (step S1107). If an affirmative determination is made in step S1107, the RTC information is read out in the same manner as in step S1103 (step S1108), and the writing process to the history memory 117 is further executed (step S1109). In the writing process, the RTC information read in step S1108 is written into the history information storage area 125 of the history area 124 corresponding to the pointer information to be written. Further, the correspondence information is read from the correspondence areas 123a to 123n corresponding to the current check target counter value, and written into the history information storage area 125 corresponding to the pointer information to be written. Furthermore, not only the correspondence information but also the termination information is written in the history information storage area 125 corresponding to the pointer information to be written. By executing the writing process in this way, if the value of the counter to be checked is in any of the opening/closing execution mode, high-frequency support mode, and front door frame 14, it corresponds to the pointer information to be written. A combination of RTC information, correspondence information indicating that the mode is one of the opening/closing execution mode, high-frequency support mode, and front door frame 14, and termination information is stored as history information in the history information storage area 125. The state will be as follows. Thereafter, the target pointer update process is executed in the same manner as step S1105 (step S1110).

If a negative determination is made in step S1106, if a negative determination is made in step S1107, or if the process of step S1110 is executed, the value of the confirmation target counter in the management side RAM 114 is subtracted by 1 (step S1111). Then, it is determined whether the value of the check target counter after subtraction by 1 is "0" (step S1112). If the value of the check target counter is 1 or more (step S1112: NO), the process from step S1102 onwards is executed for the check target corresponding to the new check target counter value.

Next, the manner in which history information is stored in the history memory 117 will be described with reference to the time chart of FIG. 27. 27(a) shows a period in which a HI level signal is input to any of the first to seventh and eleventh buffers 122a to 122g, 122k, and FIG. 27(b) shows a period when a HI level signal is input to the eighth buffer 122h. 27(c) shows a period when a HI level signal is input to the ninth buffer 122i, and FIG. 27(d) shows a period when a HI level signal is input to the tenth buffer 122j. FIG. 27E shows the timing of writing history information into the history memory 117.

At timing t1, the output state of the signal input to any of the first to seventh and eleventh buffers 122a to 122g, 122k is switched from LOW level to HI level, as shown in FIG. 27(a). Therefore, at the timing t1, history information is written into the history memory 117 as shown in FIG. 27(e). Thereafter, at timing t2, the signal that was switched to HI level at timing t1 is switched to LOW level, as shown in FIG. 27(a). However, since the signal is input to any of the first to seventh and eleventh buffers 122a to 122g, 122k, and the switching of the LOW level is not subject to storage of history information, the signal at t2 is At this timing, writing of history information is not executed as shown in FIG. 27(e).

Thereafter, at the timing of t3, the timing of t5, the timing of t6, the timing of t9, the timing of t10, the timing of t13 and the timing of t14, as shown in FIG. The output state of the signal input to any of the No. 11 buffers 122a to 122g, 122k is switched from LOW level to HI level. Therefore, history information is written at each of these timings as shown in FIG. 27(e).

As shown in FIG. 27(b), the output state of the signal input to the eighth buffer 122h is at HI level from timing t4 to timing t7. This eighth buffer 122h corresponds to whether or not the opening/closing execution mode occurs. Therefore, as shown in FIG. 27(e), the timing t4 is the timing at which the output state of the signal input to the eighth buffer 122h switches to the HI level, and the timing at which the output state of the signal changes to the LOW level. History information is written at each timing t7. In this case, the history information written at timing t4 includes start information, and the history information written at timing t7 includes end information. Thereby, by checking the history information in the history memory 117, it is possible to grasp the execution period of the opening/closing execution mode.

Furthermore, history information is written into the history memory 117 in the order of time. Therefore, whether the history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is in the opening/closing execution mode. It becomes possible to distinguish whether or not. In addition, since the history information includes RTC information, by comparing the RTC information, it is possible to determine which of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. It becomes possible to distinguish whether or not the history information indicating that the ball has entered the ball is in the opening/closing execution mode.

As shown in FIG. 27(c), the output state of the signal input to the ninth buffer 122i is at the HI level from timing t8 to timing t11. This ninth buffer 122i corresponds to whether or not the high-frequency support mode occurs. Therefore, as shown in FIG. 27(e), the timing t8 is the timing at which the output state of the signal input to the ninth buffer 122i switches to the HI level, and the timing at which the output state of the signal changes to the LOW level. History information is written at each timing t11. In this case, the history information written at timing t8 includes start information, and the history information written at timing t11 includes end information. This makes it possible to grasp the execution period of the high-frequency support mode by checking the history information in the history memory 117.

Furthermore, history information is written in the history memory 117 in the order of time. Therefore, the history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is also included in the high-frequency support mode. It becomes possible to distinguish whether or not. In addition, since the history information includes RTC information, by comparing the RTC information, it is possible to determine which of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. It becomes possible to distinguish whether or not the history information indicating that the ball has hit the field is in the high-frequency support mode.

As shown in FIG. 27(d), the output state of the signal input to the tenth buffer 122j is at HI level from timing t12 to timing t15. This tenth buffer 122j corresponds to whether or not the front door frame 14 is opened. Therefore, as shown in FIG. 27(e), the timing t12 is the timing at which the output state of the signal input to the tenth buffer 122j switches to the HI level, and the timing at which the output state of the signal changes to the LOW level. History information is written at each timing t15. In this case, the history information written at timing t12 includes start information, and the history information written at timing t15 includes end information. Thereby, by checking the history information in the history memory 117, it becomes possible to grasp the period during which the front door frame 14 is in the open state.

Furthermore, history information is written in the history memory 117 in the order of time. Therefore, while the front door frame 14 is open, history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is displayed. It becomes possible to distinguish whether it is the one or not. In addition, since the history information includes RTC information, by comparing the RTC information, it is possible to determine which of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. It becomes possible to distinguish whether or not the history information indicating that the ball has entered the front door frame 14 is when the front door frame 14 is being opened.

Next, a process for outputting a setting value update signal that is executed when the setting state of the pachinko machine 10 is set by the main CPU 63 will be described. FIG. 28 is a flowchart showing the output processing of the setting value update signal executed by the main CPU 63. Note that the output process of the set value update signal is executed in step S119 in the main process (FIG. 9).

A value corresponding to the currently set value of the pachinko machine 10 is set in the pulse number counter provided in the main side RAM 65 (step S1201). Specifically, the value of the set value counter in the main side RAM 65 is set to the pulse number counter. Thereafter, it is determined whether the setting value update signal directed to the management side CPU 112 is at the HI level (step S1202). As already explained, the setting value update signal is input to the 15th buffer 122o of the input port 121 in the management IC 66. Here, the setting value update signal output process is a process for causing the management CPU 112 to specify the types of signals input to the first to fourteenth buffers 122a to 122n of the input port 121 in the main process (FIG. 9). It is executed before a certain recognition process. On the other hand, since it is set in the management IC 66 at the design stage of the pachinko machine 10 that the set value update signal is input to the 15th buffer 122o, the set value update signal is output before the recognition process. Even if the process is executed, it becomes possible for the management CPU 112 to identify that the signal being input to the fifteenth buffer 122o is the setting value update signal.

If a negative determination is made in step S1202, the value of the LOW level counter provided in the main side RAM 65 is subtracted by 1 (step S1203), and whether the value of the LOW level counter after the 1 subtraction is "0" or not is determined. (Step S1204). The LOW level counter is a counter used by the main CPU 63 to determine whether or not the set value update signal is maintained at the LOW level for a predetermined period of time while the set value update signal outputs a plurality of pulses that make the set value update signal go to the HI level. It is. If the value of the LOW level counter is "0" (step S1204: YES), it means that it is time to set the set value update signal to the HI level, so the set value update signal is set to the HI level. settings (step S1205).

Thereafter, "20" is set in the HI level counter provided in the main side RAM 65 (step S1206). The HI level counter is a counter used by the main CPU 63 to specify the period during which the set value update signal is maintained at the HI level. Since the value set in the HI level counter is subtracted by 1 at a cycle of approximately 10 microseconds, the set value update signal is maintained at the HI level for 200 microseconds when one pulse is output. This HI level maintenance period is a period sufficient for the management CPU 112 to identify that the setting value update signal has been changed from a LOW level to a HI level.

If the set value update signal is at HI level (step S1202: YES), the value of the HI level counter in the main side RAM 65 is subtracted by 1 (step S1207), and the value of the HI level counter after the 1 subtraction is "0". It is determined whether or not (step S1208). If the value of the HI level counter is "0" (step S1208: YES), it means that it is time to set the set value update signal to the LOW level, so the set value update signal is set to the LOW level. settings (step S1209).

Thereafter, the value of the pulse number counter in the main side RAM 65 is subtracted by 1 (step S1210), and it is determined whether the value of the pulse number counter after the 1 subtraction is "0" (step S1211). If the value of the pulse number counter is not "0" (step S1211: NO), the output of pulse signals by the set value update signal for the number corresponding to the set value of the pachinko machine 10 set this time has been completed. Since this means that there is no data, "20" is set in the LOW level counter of the main side RAM 65 (step S1212). Since the value set in the LOW level counter is subtracted by 1 at a cycle of approximately 10 microseconds, the value is maintained at the LOW level for 200 microseconds between the plurality of pulse outputs caused by the set value update signal. This LOW level maintenance period is sufficient for the management CPU 112 to identify that the setting value update signal has been changed from the HI level to the LOW level.

If the value of the pulse number counter is "0" (step S1211: YES), the output of pulse signals by the set value update signal corresponding to the currently set set value of the pachinko machine 10 has been completed. Therefore, output processing of a setting value identification end command is executed (step S1213). The setting value identification end command is a command for making the management CPU 112 recognize that the output of the setting value update signal for making the management CPU 112 recognize the currently set setting value of the pachinko machine 10 has been completed. When outputting the set value identification end command, the first to eighth signals inputted to the first to eighth buffers 122a to 122h are used in the same way as the identification start command, type identification command, and identification end command. However, the signal pattern of the set value identification end command is different from the identification start command, type identification command, and identification end command.

As described above, in the process of outputting the setting value update signal, a pulse signal is output to the management IC 66 by the setting value update signal for a number of minutes corresponding to the value of the setting value of the pachinko machine 10 that was set at the start of the current supply of operating power. do. By executing the setting update recognition process, the management CPU 112 determines the number of pulse signals generated by the setting value update signal, and determines the currently set setting value of the pachinko machine 10 based on the number of pulse signals.

FIG. 29 is a flowchart showing the setting update recognition process executed by the management CPU 112. Note that the setting update recognition process is executed in step S902 of the management process (FIG. 23).

It is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level (step S1301). When an affirmative determination is made in step S1301, the value of a setting value grasping counter provided in the management side RAM 114 is set to "1" (step S1302). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6".

Thereafter, it is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S1303). When an affirmative determination is made in step S1303, the value of the setting value grasping counter of the management side RAM 114 is incremented by 1 (step S1304). As a result, the setting value of the pachinko machine 10 specified by the management CPU 112 is increased by one level.

If a negative determination is made in step S1303 or if the process in step S1304 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S1305). If a negative determination is made in step S1305, the process returns to step S1303.

If an affirmative determination is made in step S1305, RTC information, which is date information and time information, is read from the RTC 115 (step S1306). Then, writing processing to the history memory 117 is executed (step S1307). In the writing process, the pointer information of the history area 124 that is currently the writing target is identified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the writing target is specified. The RTC information read in step S1306 is written in the history information storage area 125 of the history area 124. Further, both information for identifying the set value and information on the value of the set value understanding counter are written into the history information storage area 125 corresponding to the pointer information to be written. As a result, information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made. The combination is now stored as history information.

Thereafter, target pointer update processing is executed (step S1308). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read out and incremented by one. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

When the setting state of the pachinko machine 10 is newly set by executing the setting update recognition process as described above, the information indicating that the setting was made, the date and time when the setting was made, and the A combination of setting values when settings are made is stored in the history area 124 as history information. As a result, by reading out and analyzing the information stored in the history memory 117 using an external device connected to the reading terminal 68d, the setting state of the pachinko machine 10 can be updated to the date and time when it was newly set and the relevant setting. It becomes possible to understand the contents of the setting values when the settings are made.

Here, even if the setting state of the pachinko machine 10 is newly set, the information stored in the history memory 117 is maintained as is. As a result, even if the setting state of the pachinko machine 10 is newly set, it is possible to prevent the history information in the history memory 117 from being deleted. It is calculated using historical information that exists before and after. In this case, as described above, the date and time when the setting state of the pachinko machine 10 was newly set is stored in the history memory 117, so an external device is connected to the reading terminal 68d and the date and time when the setting state of the pachinko machine 10 is newly set is stored in the history memory 117. By reading the information, it becomes possible to calculate various parameters for a period after the timing when the setting state of the pachinko machine 10 is newly set and while the setting state is maintained.

Next, the display output processing executed by the management side CPU 112 will be explained with reference to the flowchart of FIG. 30. Note that the display output process is executed in step S909 of the management process (FIG. 23).

First, it is determined whether it is calculation timing (step S1401). If 51 seconds have passed since the supply of operating power to the management side CPU 112 was started, or if 51 seconds have passed since the previous affirmative determination was made in step S1401, an affirmative determination is made in step S1401. When an affirmative determination is made in step S1401, the number of balls entering each type during normal times is calculated (step S1402). Specifically, first, in the history area 124 of the history memory 117, by counting the number of history information storage areas 125 in which correspondence information indicating that the output port 24a is stored, Calculate the number of balls entering. In addition, by counting the number of history information storage areas 125 in which correspondence information indicating that the ball enters the general winning hole 31 is stored in the history area 124 of the history memory 117, the ball enters the general winning hole 31. Calculate the number of pieces. In addition, by counting the number of history information storage areas 125 in which correspondence information indicating that the ball enters the special electric winning device 32 is stored in the history area 124 of the history memory 117, Calculate the number of pieces. In addition, by counting the number of history information storage areas 125 in which correspondence relationship information indicating that the first actuation port 33 is stored in the history area 124 of the history memory 117, information about the first actuation port 33 is stored. Calculate the number of balls entering. In addition, by counting the number of history information storage areas 125 in which correspondence relationship information indicating that the second actuation port 34 is stored in the history area 124 of the history memory 117, information on the second actuation port 34 is stored. Calculate the number of balls entering.

After that, in the history area 124 of the history memory 117, the history information storage area 125 where the correspondence information indicating that it is the front door frame 14 and the start information are stored, and the correspondence relationship indicating that it is the front door frame 14 are stored. By referring to the history information storage area 125 that exists during the period between the history information storage area 125 where the information and the end information are stored, the exit that occurred when the front door frame 14 is in an open state can be detected. 24a, the number of balls entering each of the general winning opening 31, special electric winning device 32, first operating opening 33, and second operating opening 34 is calculated (step S1403). In the history area 124 of the history memory 117, there is a history information storage area 125 in which correspondence information indicating that the front door frame is the front door frame 14 and start information are stored; The period between the history information storage area 125 in which the termination information is stored is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, there is a history information storage area 125 in which correspondence information indicating that it is the front door frame 14 and start information are stored, and a correspondence relationship that indicates that it is the front door frame 14. If there are multiple sections with the history information storage area 125 in which information and end information are stored, the total number of balls entered for each section is calculated. Although there is a history information storage area 125 in which correspondence information indicating that the front door frame 14 and start information are stored, RTC information corresponding to a time after the history information storage area 125 exists. If the correspondence relationship information indicating that it is the front door frame 14 and the end information are not stored in the history information storage area 125 where is stored, the correspondence relationship information and start information indicating that it is the front door frame 14 are stored. All history information in the history information storage area 125 in which RTC information corresponding to a time later than the history information storage area 125 in which the front door frame 14 is stored is treated as that in which the front door frame 14 is in an open state.

Thereafter, various parameters are calculated using the calculation results of steps S1402 and S1403 (step S1404). Specifically, first, the number of entering balls that occurred while the front door frame 14 was open, calculated in step S1403, is subtracted from the number of entering balls calculated in step S1402. Then, the following first to eighth parameters are calculated using each number of balls entered after the subtraction. Note that the difference between the number of balls entering the out port 24a calculated in step S1403 and the number of balls entering the out port 24a calculated in step S1402 is defined as the number of balls entering K1, and the number of balls entering the general winning hole 31 calculated in step S1402 is The difference between the number of balls entered in the general winning slot 31 calculated in step S1403 with respect to the number of balls is defined as the number of entered balls K2, and the difference between the number of balls entered in the special wire winning device 32 calculated in step S1402 and the number of balls entered in the special wire winning device 32 calculated in step S1403. The difference between the number of balls entering the first operating port 33 calculated in step S1403 is defined as the number K3 of entering balls, and the difference between the number of balls entering the first operating port 33 calculated in step S1403 with respect to the number of balls entering the first operating port 33 calculated in step S1402. The number of balls entered is K4, and the difference between the number of balls entered into the second operating port 34 calculated in step S1403 and the number of balls entered into the second operating port 34 calculated in step S1402 is set as the number K5 of balls entered.
・First parameter: Total number of game balls paid out (K2 x "Number of prize balls for winning in the general winning opening 31" + K3 x "Number of winning balls for winning in the special electric winning device 32" + K4 x "First operating opening 33 The ratio of the total number of game balls ejected from the technique area PA (K1+K2+K3+K4+K5) (hereinafter, this ratio is referred to as "Number of prize balls for winning in the second operating port 34")/"Number of prize balls for winning in the second operating port 34") D1”)
・Second parameter: Ratio of total number of game balls entering the general prize opening 31 K2/total number of game balls ejected from the game area PA (K1+K2+K3+K4+K5)・Third parameter: Game balls entering the special electric prize winning device 32 Ratio of total number of game balls entering K3/total number of game balls discharged from gaming area PA (K1+K2+K3+K4+K5) 4th parameter: Total number of game balls entering first operating port 33 K4/discharging from gaming area PA Ratio of the total number of game balls (K1+K2+K3+K4+K5) (hereinafter, this ratio will be referred to as "D2")
- Fifth parameter: ratio of total number of game balls entering the second operating port 34 K5/total number of game balls ejected from the game area PA (K1+K2+K3+K4+K5) (hereinafter, this ratio will be referred to as "D3")
・Sixth parameter: D1 - (D2 x "Number of prize balls for winning in the first operating port 33" + D3 x "Number of prize balls for winning in the second operating port 34")
- Seventh parameter: (K3 x "Number of prize balls for winning into the special electric winning device 32" + K5 x "Number of prize balls for winning into the second operating port 34") / Total number of game balls paid out (K2 x "General "Number of prize balls for winning into the winning opening 31" + K3 x "Number of winning balls for winning into the special electric winning device 32" + K4 x "Number of winning balls for winning into the first operating port 33" + K5 x "Second operating port 34 8th parameter: K3 × "Number of prize balls received in the special electric winning device 32" / Total number of game balls paid out (K2 × "Number of prize balls received in the general winning slot 31") Number of prize balls" + K3 x "Number of prize balls for winning into the special electric winning device 32" + K4 x "Number of prize balls for winning into the first actuation port 33" + K5 x "Number of prize balls for winning into the second actuation port 34 '') In step S1404, the first to eighth parameters, which are the calculation results, are stored in the normal storage area of the calculation result memory 131. The first to eighth parameters stored in the normal storage area are stored and held until the next step S1404 is executed. In other words, when step S1404 is executed next time and the first to eighth parameters are calculated, the newly calculated first to eighth parameters are stored in the normal storage area. The previous calculation results of the first to eighth parameters that were previously stored in the normal storage area are overwritten.

After that, in the history area 124 of the history memory 117, the history information storage area 125 stores correspondence information indicating that the opening/closing execution mode is in effect and start information, and the correspondence relationship information and start information indicating that the opening/closing execution mode exists. By referring to the history information storage area 125 that exists during the period between the history information storage area 125 where the end information is stored, the out exit 24a and the general winning opening 31 that have occurred in the opening/closing execution mode are , the number of balls entering each of the special electric winning device 32, the first operating port 33, and the second operating port 34 is calculated (step S1405). In the history area 124 of the history memory 117, there is a history information storage area 125 in which correspondence information indicating that the opening/closing execution mode is in effect and start information are stored, and correspondence relationship information and end information indicating that the opening/closing execution mode is being stored. is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, there is a history information storage area 125 in which correspondence information and start information indicating that the opening/closing execution mode is stored, and correspondence information and start information indicating that the opening/closing execution mode is stored. If there are multiple sections with the history information storage area 125 in which the end information is stored, the total number of balls entered for each section is calculated. Furthermore, although there is a history information storage area 125 in which correspondence information and start information indicating that the opening/closing execution mode is stored, RTC information corresponding to a time later than the history information storage area 125 is present. If correspondence relationship information and end information indicating that the opening/closing execution mode is not stored in the stored history information storage area 125, correspondence relationship information and start information indicating that the opening/closing execution mode is being stored are stored. Any history information in the history information storage area 125 in which RTC information corresponding to a time after the history information storage area 125 is stored is handled as being in the opening/closing execution mode.

After that, during the period in the opening/closing execution mode specified in step S1405, the out exit 24a, the general winning opening 31, the special winning winning device 32, the first operating opening 33, and the The number of balls entering each of the second operating ports 34 is calculated (step S1406). The method of calculating the number of entering balls is the same as that in step S1403, except that the period in the opening/closing execution mode specified in step S1405 is assumed.

Thereafter, various parameters are calculated using the calculation results of steps S1405 and S1406 (step S1407). Specifically, first, the number of entering balls that occurred while the front door frame 14 was open, calculated in step S1406, is subtracted from the number of entering balls calculated in step S1405. Then, the following 11th to 18th parameters are calculated using each number of balls entered after the subtraction. Note that the difference between the number of balls entering the out port 24a calculated in step S1406 and the number of balls entering the out port 24a calculated in step S1406 is defined as the number of balls entering K11, and the number of balls entering the general winning hole 31 calculated in step S1405 is The difference between the number of balls entered into the general winning slot 31 calculated in step S1406 with respect to the number of balls is defined as the number of entered balls K12, and the difference between the number of balls entered into the special wire winning device 32 calculated in step S1405 and the number of balls entered in the special wire winning device 32 calculated in step S1406. The difference between the number of balls entering the first operating port 33 calculated in step S1406 is defined as the number K13 of entering balls, and the difference between the number of balls entering the first operating port 33 calculated in step S1406 with respect to the number of balls entering the first operating port 33 calculated in step S1405. The number of balls entered is K14, and the difference between the number of balls entering the second operating port 34 calculated in step S1406 and the number of balls entering the second operating port 34 calculated in step S1406 is set as the number of balls entering K15.
- 11th parameter: Total number of game balls paid out (K12 x "Number of prize balls for winning into the general winning opening 31" + K13 x "Number of winning balls for winning into the special electric winning device 32" + K14 x "First operating opening 33 Ratio of the total number of game balls ejected from the gaming area PA (K11+K12+K13+K14+K15) (hereinafter, this ratio is referred to as "Number of prize balls for winning in the second operating port 34")/(Number of prize balls for winning in the second operating port 34) D11”)
- 12th parameter: Ratio of total number of game balls entering the general winning slot 31 K12/total number of game balls discharged from the gaming area PA (K11 + K12 + K13 + K14 + K15) - 13th parameter: Game balls entering the special electric winning device 32 Ratio of total number of game balls entering K13/total number of game balls ejected from gaming area PA (K11+K12+K13+K14+K15) ・14th parameter: Total number of game balls entering first operating port 33 K14/ejecting from gaming area PA The ratio of the total number of game balls (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio will be referred to as "D12")
・Fifteenth parameter: Ratio of total number of game balls entering the second operating port 34 K15/total number of game balls ejected from the game area PA (K11+K12+K13+K14+K15) (hereinafter, this ratio will be referred to as "D13")
- 16th parameter: D11 - (D12 x "Number of prize balls for winning in the first operating port 33" + D13 x "Number of prize balls for winning in the second operating port 34")
- 17th parameter: (K13 x "Number of prize balls for winning into the special electric winning device 32" + K15 x "Number of winning balls for winning into the second operating port 34") / Total number of game balls paid out (K12 x "General "Number of prize balls for winning in the winning opening 31" + K13 x "Number of prize balls for winning in the special electric winning device 32" + K14 x "Number of winning balls for winning in the first operating port 33" + K15 x "Second operating port 34 18th parameter: K13 x "Number of prize balls for winning in the special electric winning device 32" / Total number of game balls paid out (K12 x "Number of prize balls for winning in the general winning slot 31") "Number of prize balls" + K13 x "Number of prize balls for winning in the special electric winning device 32" + K14 x "Number of prize balls for winning in the first operating port 33" + K15 x "Number of prize balls for winning in the second operating port 34"'') In step S1407, the 11th to 18th parameters, which are the calculation results, are stored in the storage area for opening/closing execution mode in the calculation result memory 131. The 11th to 18th parameters stored in the storage area for the opening/closing execution mode are stored and held until the next step S1407 is executed. In other words, when step S1407 is executed next time and the 11th to 18th parameters are calculated, the newly calculated 11th to 18th parameters are stored in the storage area for opening/closing execution mode. , the previous calculation results of the 11th to 18th parameters previously stored in the storage area for opening/closing execution mode are overwritten.

After that, in the history area 124 of the history memory 117, a history information storage area 125 where correspondence information indicating that the mode is high frequency support mode and start information are stored, and a correspondence relationship indicating that the mode is high frequency support mode are stored. By referring to the history information storage area 125 that exists during the period between the history information storage area 125 where the information and termination information are stored, the output 24a, general The number of balls entering each of the winning hole 31, the special electric winning device 32, the first operating hole 33, and the second operating hole 34 is calculated (step S1408). In the history area 124 of the history memory 117, there is a history information storage area 125 in which correspondence information indicating that the mode is high frequency support mode and start information are stored, and a history information storage area 125 in which correspondence information indicating that the mode is high frequency support mode and start information are stored. The period between the history information storage area 125 in which the termination information is stored is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, there is a history information storage area 125 in which correspondence information indicating that the mode is high frequency support mode and start information are stored, and a correspondence relationship indicating that the mode is high frequency support mode. If there are multiple sections with the history information storage area 125 in which information and end information are stored, the total number of balls entered for each section is calculated. Although there is a history information storage area 125 in which correspondence information and start information indicating that the mode is high-frequency support mode is stored, RTC information corresponding to a time after the history information storage area 125 exists. If the correspondence relationship information and end information indicating that the mode is high-frequency support mode are not stored in the history information storage area 125 where , the correspondence relationship information and start information indicating that the mode is high-frequency support mode are stored. All the history information in the history information storage area 125 in which RTC information corresponding to a time later than the history information storage area 125 in which the RTC information is stored is treated as that in the high-frequency support mode.

After that, during the period in the high-frequency support mode specified in step S1408, the out exit 24a, the general winning opening 31, the special electric winning device 32, and the first operating opening 33 that occur when the front door frame 14 is in an open state. and the number of balls entering each of the second operating ports 34 (step S1409). The method for calculating the number of balls entered is the same as in step S1403, except that the period of high-frequency support mode specified in step S1408 is assumed.

Thereafter, various parameters are calculated using the calculation results of steps S1408 and S1409 (step S1410). Specifically, first, the number of entering balls that occurred while the front door frame 14 was open, calculated in step S1409, is subtracted from the number of entering balls calculated in step S1408. Then, the following 21st to 26th parameters are calculated using each number of balls entered after the subtraction. Note that the difference between the number of balls entering the out port 24a calculated in step S1409 and the number of balls entering the out port 24a calculated in step S1409 is defined as the number of balls entering K21, and the number of balls entering the general winning hole 31 calculated in step S1408 is The difference between the number of balls entered into the general winning slot 31 calculated in step S1409 with respect to the number of balls is defined as the number of entered balls K22, and the difference between the number of balls entered into the special wire winning device 32 calculated in step S1408 and the number of balls entered into the special wire winning device 32 calculated in step S1409. The difference between the number of balls entering the first operating port 33 calculated in step S1409 is defined as the number K23 of entering balls, and the difference between the number of balls entering the first operating port 33 calculated in step S1409 with respect to the number of balls entering the first operating port 33 calculated in step S1408. The number of balls entered is K24, and the difference between the number of balls entered into the second operating port 34 calculated in step S1409 and the number of balls entered into the second operating port 34 calculated in step S1409 is set as the number K25 of balls entered.
- 21st parameter: Total number of game balls paid out (K22 x "Number of prize balls for winning into the general winning opening 31" + K23 x "Number of winning balls for winning into the special electric winning device 32" + K24 x "First operating opening 33 The ratio of the total number of game balls discharged from the gaming area PA (K21+K22+K23+K24+K25) (hereinafter, this ratio is referred to as "Number of prize balls for winning in the second operating port 34")/(Number of prize balls for winning in the second operating port 34) D11”)
・22nd parameter: Ratio of total number of game balls entering the general winning slot 31 K22/total number of game balls ejected from the gaming area PA (K21+K22+K23+K24+K25) ・23rd parameter: Game balls entering the special electric winning device 32 Ratio of total number of game balls entering K23/total number of game balls discharged from gaming area PA (K21+K22+K23+K24+K25) ・24th parameter: Total number of game balls entering first operating port 33 K24/ejecting from gaming area PA The ratio of the total number of game balls (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio will be referred to as "D22")
・25th parameter: Ratio of total number of game balls entering the second operating port 34 K25/total number of game balls ejected from the game area PA (K21+K22+K23+K24+K25) (hereinafter, this ratio will be referred to as "D23")
・26th parameter: D21 - (D22 x "Number of prize balls for winning in the first operating port 33" + D23 x "Number of prize balls for winning in the second operating port 34")
In step S1410, the 21st to 26th parameters, which are the calculation results, are stored in the storage area for high frequency support mode in the calculation result memory 131. The 21st to 26th parameters stored in the high-frequency support mode storage area are stored and held until the next step S1410 is executed. In other words, when step S1410 is executed next time and the 21st to 26th parameters are calculated, the newly calculated 21st to 26th parameters are stored in the high-frequency support mode storage area. Then, the previous calculation results of the 21st to 26th parameters that were previously stored in the storage area for high frequency support mode are overwritten.

Thereafter, the frequency of occurrence of the opening/closing execution mode is calculated and stored (step S1411). Specifically, by counting the number of history information storage areas 125 in which correspondence information and start information indicating that the opening/closing execution mode is stored in the history area 124 of the history memory 117, the opening/closing execution mode is determined. Calculate the number of occurrences. In addition, the number of occurrences of a game game is calculated by counting the number of history information storage areas 125 in which correspondence information indicating the start of a game game is stored in the history area 124 of the history memory 117. . Then, the number of occurrences of the opening/closing execution mode per unit game is calculated. Note that the number of occurrences of the opening/closing execution mode is assumed to be the number of occurrences K31, and the number of occurrences of the gaming session is assumed to be the number of occurrences K32.
・31st parameter: K31/K32
In step S1411, the 31st parameter, which is the calculation result, is stored in the opening/closing execution mode frequency storage area in the calculation result memory 131. The 31st parameter stored in the opening/closing execution mode frequency storage area is stored and held until the next step S1411 is executed. In other words, when step S1411 is executed next time and the 31st parameter is calculated, the newly calculated 31st parameter is stored in the opening/closing execution mode frequency storage area, so that until then the opening/closing execution mode is The previous calculation result of the 31st parameter stored in the frequency storage area is overwritten.

Thereafter, the frequency of occurrence of the high-frequency support mode is calculated and stored (step S1412). Specifically, in the history area 124 of the history memory 117, by counting the number of history information storage areas 125 that store correspondence information and start information indicating that the high frequency support mode Calculate the number of occurrences of support mode. In addition, the number of occurrences of a game game is calculated by counting the number of history information storage areas 125 in which correspondence information indicating the start of a game game is stored in the history area 124 of the history memory 117. . Then, the number of occurrences of the high-frequency support mode per unit game and the ratio of the number of occurrences of the high-frequency support mode to the number of occurrences of the opening/closing execution mode are calculated. The number of occurrences of the high-frequency support mode is set as the number of occurrences K41, the number of occurrences of the game game is set as the number of occurrences K42, and the number of occurrences of the opening/closing execution mode calculated in step S1411 is set as the number of occurrences K43.
・41st parameter: K41/K42
・42nd parameter: K41/K43
In step S1412, the forty-first and forty-second parameters, which are the calculation results, are stored in the high-frequency support mode frequency storage area in the calculation result memory 131. The 41st and 42nd parameters stored in the high frequency support mode frequency storage area are stored and held until the next step S1412 is executed. That is, when step S1412 is executed next time and the 41st to 42nd parameters are calculated, the newly calculated 41st to 42nd parameters are stored in the high frequency support mode frequency storage area. Then, the previous calculation results of the 41st and 42nd parameters that were previously stored in the high frequency support mode frequency storage area are overwritten.

If a negative determination is made in step S1401, or if the process in step S1412 is executed, display processing is executed (step S1413). FIG. 31 is a flowchart showing display processing.

First, the value of the update timing counter provided in the management side RAM 114 is subtracted by 1 (step S1501). The update timing counter is a counter for the management side CPU 112 to specify that it is the timing to update the display content of the game history management results on the first to third notification display devices 69a to 69c. The management CPU 112 controls the display of the first to third notification display devices 69a to 69c to display the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, and the thirty-first parameter. The parameters and the calculation results of the 41st and 42nd parameters are notified. In this case, the first notification display device 69a displays information corresponding to the type of parameter to be notified. Furthermore, of the value obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the one place is displayed on the third notification display. It is displayed on the device 69c. In the first to third notification display devices 69a to 69c, the first to eighth parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameters, and the 41st to 41st parameters are used. The display corresponding to the calculation result of the 42nd parameter is sequentially switched according to a predetermined order, and after the calculation result of the 42nd parameter, which is the display target in the last order, is displayed, the display corresponding to the calculation result of the 42nd parameter, which is the display target in the first order, is displayed. The calculation result for one parameter is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 2 seconds.

Here, the calculation cycle of the various parameters described above in the management CPU 112 is 51 seconds. On the other hand, the number of various parameters is 25, and the period during which the calculation result of one parameter is continuously displayed is 2 seconds. Therefore, various parameters calculated by the management CPU 112 are displayed on the first to third notification display devices 69a to 69c at least once.

When the process of step S1501 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether the value of the update timing counter after subtraction by 1 is "0". It is determined whether the timing has come (step S1502). When an affirmative determination is made in step S1502, the value of the display target counter provided in the management side RAM 114 is incremented by 1 (step S1503). If the value of the display target counter after adding 1 exceeds the maximum value "24" (step S1504: YES), the value of the display target counter is cleared to "0" (step S1505).

The display target counter is a counter used by the management CPU 112 to specify the type of parameter to be displayed on the first to third notification display devices 69a to 69c. The 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter, the 41st to 42nd parameters, and the display target counters "0" to "24". There is a one-to-one correspondence with the possible values. For example, when the value of the display target counter is "0", the first parameter that is the first display target becomes the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is "24". In this case, the 42nd parameter, which is the last display target, becomes the display target of the first to third notification display devices 69a to 69c.

If a negative determination is made in step S1504 or if the process in step S1505 is executed, the first notification display device 69a is displayed so that information corresponding to the type of parameter corresponding to the value of the display target counter is displayed. control (step S1506). Further, the parameter corresponding to the value of the counter to be displayed is read from the calculation result memory 131, the read parameter is multiplied by 100, and the number corresponding to the tens place is displayed on the second notification display device 69b, The number corresponding to the 1's digit is displayed on the third notification display device 69c (step S1507). The content displayed on the first to third notification display devices 69a to 69c in steps S1506 and S1507 continues until the next update timing or until the supply of operating power to the management CPU 112 is stopped. Ru. Thereafter, a value corresponding to 2 seconds is set in the update timing counter of the management side RAM 114 as a value corresponding to the next update timing (step S1508).

When the supply of operating power to the management CPU 112 is started by executing the display process as described above, the game history management results are displayed on the first to third notification display devices 69a to 69c. be done. The management result of the game history is displayed regardless of whether the game is continued or not, and when the game machine main body 12 is opened with respect to the outer frame 11 and the main controller 60 is opened from the front of the pachinko machine 10. This is done regardless of whether it is visible or not. In this way, the display control of the first to third notification display devices 69a to 69c is executed regardless of the game situation or the state of the pachinko machine 10, so that the first to third notification display devices 69a It becomes possible to simplify the processing configuration for display control of .about.69c.

The display of the game history management results on the first to third notification display devices 69a to 69c starts after the supply of operating power to the management side CPU 112 is started and after the identification end command is received from the main side CPU 63. be done. In this case, the information stored in the calculation result memory 131 is retained even when the supply of operating power to the pachinko machine 10 is stopped, similar to the information stored in the history memory 117. Therefore, when the supply of operating power to the management CPU 112 is started, the gaming history management results calculated before the supply of operating power to the management CPU 112 is stopped are displayed.

When the setting state of the pachinko machine 10 is set when the supply of operating power to the main CPU 63 is started, information corresponding to the setting value that is being changed is displayed on the third notification display device 69c. However, whereas the information corresponding to the set value is displayed before the identification end command is sent from the main CPU 63, the game history on the first to third notification display devices 69a to 69c is displayed. The display of the management results starts after the identification end command is sent from the main CPU 63. As a result, even if the third notification display device 69c is configured to double as a display device for displaying information corresponding to set values and displaying gaming history management results, these displays can be It is possible to prevent periods from overlapping.

Furthermore, when information corresponding to the set value is to be displayed, the first notification display device 69a and the second notification display device 69b are not displayed. On the other hand, when the game history management results are being displayed, the first notification display device 69a and the second notification display device 69b are not hidden. This makes it possible to identify which of the information corresponding to the set value and the gaming history management result is being displayed on the third notification display device 69c.

Next, we will discuss the processing configuration for outputting the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 to an external device electrically connected to the reading terminal 68d of the MPU 62. explain. FIG. 32(a) is a flowchart showing data output processing executed by the main CPU 63. Note that the data output process is executed in step S112 in the main process (FIG. 9).

In the data output process, first, it is determined whether a connection signal indicating that an external device is electrically connected to the reading terminal 68d is received from the reading terminal 68d (step S1601). If a negative determination is made in step S1601, this data output processing is immediately terminated. In this case, in order to execute the data output process, it is necessary to restart the supply of operating power to the main CPU 63. As a result, in order to output historical information and various parameters to the outside, supply of operating power to the main CPU 63 is started while the external device is electrically connected to the reading terminal 68d. It is necessary to The power switch for stopping and starting the supply of operating power to the main CPU 63 is provided on the dispensing mechanism section 73 mounted on the back of the back pack unit 15. In order to do this, it is necessary to open the gaming machine main body 12 with respect to the outer frame 11 to expose the back side of the back pack unit 15. Under these circumstances, in order to output historical information and various parameters to the outside, supply of operating power to the main CPU 63 is started while the external device is electrically connected to the reading terminal 68d. By adopting a configuration in which it is necessary to read history information and various parameters, it is possible to make it difficult for anyone other than the administrator of the game hall to read the history information and various parameters.

If an affirmative determination is made in step S1601, by determining whether or not a control information confirmation signal is received from the reading terminal 68d, the current connection of the external device to the reading terminal 68d is confirmed to be It is determined whether the control information (program and data) confirmation is supported (step S1602). The external device is configured to be able to confirm both control information and history information and various parameters.If confirmation of control information is selected by manual operation of the external device, the external device A signal for confirming control information is transmitted, and if confirmation of history information and various parameters is selected by manual operation on the external device, a signal for confirming history is transmitted from the external device. Note that the present invention is not limited to this, and a configuration may be adopted in which the external device for checking control information and the external device for checking history are separate. In this case, if an external device for checking control information is electrically connected to the reading terminal 68d, a signal for checking the control information is transmitted from the external device, and an external device for checking the history is connected to the reading terminal 68d. If the device is electrically connected, a history confirmation signal is transmitted from the external device.

If an affirmative determination is made in step S1602, output processing for confirming control information is executed (step S1603). In the output processing, the program and data are read as control information from the main ROM 64, and the read control information is output to the reading terminal 68d. This makes it possible to read the control information with an external device electrically connected to the reading terminal 68d, and confirm whether the control information is genuine or normal. It becomes possible to do this.

If a negative determination is made in step S1602, an output instruction signal is transmitted to the management CPU 112 (step S1604). Specifically, the output state of the output instruction signal is switched from LOW level to HI level. This HI level output state continues for a specific period of time. This specific period is a period sufficient for the management side CPU 112 to specify that the HI level output instruction signal is input to the 16th buffer 122p. By switching the output state of the output instruction signal to the HI level, the management CPU 112 executes processing for outputting history information.

Specifically, as shown in the flowchart of FIG. 32(b), when the output state of the output instruction signal input to the 16th buffer 122p of the input port 121 switches from the LOW level to the HI level, the management side CPU 112 (Step S1701: YES), reads the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131, and outputs the read history information and various parameters to the reading terminal 68d. (Step S1702). This allows the external device electrically connected to the reading terminal 68d to read the history information and various parameters, and it becomes possible to analyze the information on the gaming history management results. Moreover, when the management side CPU 112 outputs the history information to the reading terminal 68d, it clears the history memory 117 to "0" (step S1703). The history information in the history memory 117 is erased only when the history information is read by an external device.

Returning to the explanation of the data output process (FIG. 32(a)), when the process of step S1603 is executed or the process of step S1604 is executed, the electrical connection of the external device to the reading terminal 68d continues. It is determined whether or not (step S1605). If it is being continued (step S1605: YES), the process remains on standby in step S1605. This makes it possible to prevent the processing set to be executed after the data output processing from being executed until the external device is disconnected from the reading terminal 68d. If the external device is disconnected from the reading terminal 68d (step S1605: NO), this data output process ends.

According to this embodiment described in detail above, the following excellent effects are achieved.

When a game ball enters any of the general winning port 31, special electric winning device 32, first operating port 33, and second operating port 34, the game ball is paid out, so the player can choose either of these ball entry ports. The player plays the game while hoping that the game ball will land in the ball. In this configuration, the game ball enters any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 (hereinafter also referred to as the history target ball entering section). If this occurs, the corresponding history information will be stored in the history memory 117 of the management IC 66. This makes it possible for the pachinko machine 10 to store and hold information for managing the number of game balls entering each history target ball entry section or the frequency of ball entry, and this managed information can be used. This makes it possible to appropriately manage the manner in which the game ball enters each history target ball entry section. Furthermore, since the history information is stored and held in the pachinko machine 10 itself, it becomes possible to prevent unauthorized access to or unauthorized modification of the history information.

All the ball entry units that eject game balls from the gaming area PA are subject to storage processing of historical information and are subject to management using historical information. This makes it possible to manage the frequency of ball entry for any history target ball entry section using history information. Furthermore, it is possible to manage the ratio of the number of game balls entering each history target ball entry section to the number of game balls discharged from the game area PA using the history information.

The history information includes RTC information that is information corresponding to the timing at which a game ball entered the history target ball entry section that triggered the storage of the history information. Thereby, by using the history information, it becomes possible to grasp in detail the history of the entry of game balls into the history target ball entry section.

The history memory 117 contains not only history information corresponding to the entry of a game ball into the history target ball entry section, but also history information indicating whether or not the opening/closing execution mode is in progress, and whether the game ball is in the high-frequency support mode. History information indicating whether the front door frame 14 is open or not, and history information indicating whether the front door frame 14 is open or not are stored. This makes it possible to distinguish between these situations and manage the manner in which the game ball enters the history target ball entry section.

It is possible to output the history information stored in the history memory 117 to an external device that is a device outside the pachinko machine 10. This makes it possible to read the history information with the external device and use the read history information to analyze how the game ball enters the history target ball entry section.

The MPU 62 is provided with a reading terminal 68d, and the program can be read from the main ROM 64 by an external device electrically connected to the reading terminal 68d. This makes it possible to check whether the program is normal or not. In this configuration, the history information stored in the history memory 117 is outputted to the outside using the reading terminal 68d for outputting the program to the outside. This makes it possible to output history information to the outside while preventing the configuration from becoming complicated.

It is specified whether the information to be outputted from the reading terminal 68d is a program or history information, and the information corresponding to the identification result is outputted to the outside through the reading terminal 68d. As a result, in a configuration in which historical information is externally output using the reading terminal 68d for externally outputting a program, the pachinko machine 10 determines whether the information to be externally output is the program or the historical information. The specified information is output externally. Therefore, even in a configuration in which the reading terminal 68d is used also, it is possible to read only necessary information.

Based on information received from an external device electrically connected to the reading terminal 68d, it is specified whether the information to be output from the reading terminal 68d is program information or history information. This makes it possible to prevent the configuration related to the selection of information to be outputted from the outside from becoming complicated.

The MPU 62, which has a main ROM 64 that stores programs in advance, has a management IC 66 and a reading terminal 68d. This makes it possible to consolidate the signal paths for the reading terminal 68d within the MPU 62. Therefore, it is possible to achieve the excellent effects already described while making it difficult to make unauthorized access to the signal path to the reading terminal 68d.

The main side CPU 63 executes processing for causing a game ball to be paid out based on the entry of a game ball into any one of the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. A management side CPU 112 is provided separately from the management side CPU 112, and a process for storing history information in the history memory 117 is executed by the management side CPU 112. This makes it possible to manage the manner in which game balls enter each history target ball entry section while preventing the processing load on the main CPU 63 from increasing excessively.

The main side CPU 63 and the management side CPU 112 are provided on the same chip as the MPU 62. This makes it possible to prevent unauthorized access to the communication path between the main CPU 63 and the management CPU 112.

The main CPU 63 transmits information corresponding to the detection results of the ball entry detection sensors 42a to 48a to each buffer of the input port 121 of the management IC 66 using the signal paths corresponding to the ball entry detection sensors 42a to 48a. 122a to 122g. As a result, the type of information transmitted from the main CPU 63 corresponds to each buffer 122a to 122g (that is, each signal path), simplifying the configuration for distinguishing each type of information in the management CPU 112. It becomes possible to do so.

The main CPU 63 includes information corresponding to whether it is in the opening/closing execution mode, information corresponding to whether it is in the high-frequency support mode, information corresponding to whether the front door frame 14 is being opened, Information corresponding to the start of the game round is transmitted to each of the buffers 122h to 122k of the input port 121 of the management IC 66 using signal paths corresponding to each of these situations. As a result, the type of information corresponding to each of these situations corresponds to each buffer 122h to 122k (that is, each signal path), simplifying the configuration for distinguishing each type of information in the management CPU 112. becomes possible.

The main CPU 63 transmits to the management CPU 112 correspondence information indicating which type of information each buffer 122a to 122k (that is, each signal path 118a to 118k) corresponds to. This eliminates the need to store the correspondence information in advance in the management IC 66. Therefore, it becomes possible to increase the versatility of the management IC 66.

When the supply of operating power to the main CPU 63 is started, correspondence information is transmitted from the main CPU 63 to the management IC 66 . This allows the management IC 66 to specify the correspondence between the information transmitted from the main CPU 63 and the history target ball entry area in a situation where a game ball may enter the history target ball entry area. It becomes possible to do so.

Correspondence information is transmitted from the main side CPU 63 to the management IC 66 using the signal paths 118a to 118g for transmitting information indicating whether or not a game ball has entered the history target ball entry section. This makes it possible to simplify the configuration related to communication compared to a configuration in which a dedicated signal path for transmitting correspondence information is provided.

The management IC 66 is provided with a correspondence memory 116, and the correspondence information transmitted from the main CPU 63 to the management IC 66 is stored in the correspondence memory 116. As a result, each time the main CPU 63 transmits information on the detection results of each of the ball entry detection sensors 42a to 48a, information that enables the management IC 66 to specify the history target ball entry portion corresponding to the information to be transmitted. There is no need to provide it. Therefore, it is possible to suppress the amount of information on the detection results of each of the ball entry detection sensors 42a to 48a transmitted from the main CPU 63.

By switching the output state of the output instruction signal output from the main side CPU 63 to the management IC 66 from the LOW level to the HI level, information is output from the management IC 66 to the reading terminal 68d. In this case, the management CPU 112 can identify that the signal path corresponding to the 16th buffer 122p corresponds to the output instruction signal without receiving correspondence information from the main CPU 63. . This makes it possible to prevent the configuration related to the transmission of correspondence information from becoming extremely complicated.

The management IC 66 is provided with buffers 122a to 122p capable of receiving information from the main CPU 63, the number of which is greater than the number of types of information that needs to be transmitted from the main CPU 63 to the management IC 66. It is being Thereby, even if the number of types of information increases or decreases depending on the model of the pachinko machine 10, it is possible to cope with this without changing the configuration regarding the buffers 122a to 122p. Therefore, it becomes possible to increase the versatility of the management IC 66.

When history information is transmitted from the management IC 66 to the reading terminal 68d, each piece of history information includes correspondence relationship information indicating the type of the history target ball entry section that corresponds to the history information. This makes it possible to specify how the game ball enters each history target ball entry section using the read history information.

In the management IC 66, by using the history information stored in the history memory 117, various parameters (1st to 8th parameters, 11th -18th parameter, 21st - 26th parameter, 31st parameter, 41st - 42nd parameter) are calculated. Various parameters resulting from these calculations are sequentially displayed on the first to third notification display devices 69a to 69c. This allows the pachinko machine 10 to notify various parameters that are the results of calculations using history information.

Various parameters are calculated while excluding history information corresponding to a situation where the front door frame 14 is open. This makes it possible to derive various parameters in a normal situation where the front door frame 14 is in a closed state. In addition, various parameters are calculated corresponding to each of the opening/closing execution mode situation and the high frequency support mode situation. This allows the manager of the game hall and the like to understand the manner in which game balls enter the game according to each situation.

When the history information in the history memory 117 is output to an external device, the history memory 117 is initialized by executing the history memory 117 clearing process. As a result, an amount of history information that exceeds the storage capacity of the history memory 117 is stored in the history memory 117, and history information that should originally be stored is erased by overwriting. It is possible to make it less likely to occur.

In a configuration in which when a game ball enters the first operating port 33 or the second operating port 34, a corresponding external output is performed through the external terminal board 97, history information is stored in the history memory 117. . As a result, by using the information outputted externally through the external terminal board 97, the number of game balls entering the first operating port 33 and the second operating port 34 and the frequency of entering the balls can be easily grasped, and the history By using the history information stored in the memory 117, it becomes possible to accurately grasp the number of game balls entering the history target ball entry section and the frequency of ball entry.

The probability of a jackpot result in the low probability mode varies depending on the setting state of the pachinko machine 10 from "setting 1" to "setting 6". Thereby, even with a single pachinko machine 10, it is possible to create a situation in which the probability of a jackpot result is advantageous or disadvantageous in the low probability mode. Therefore, it is possible to improve the interest of the game.

The probability of a jackpot result in the low probability mode varies depending on the settings of the pachinko machine 10 from "Setting 1" to "Setting 6", while the probability of a jackpot result in the high probability mode varies depending on the settings of the pachinko machine 10. It does not change depending on the state. This makes it possible to limit the influence of the setting state of the pachinko machine 10 on the probability of a jackpot result to the situation in the low probability mode. Furthermore, since it is possible to make the high probability correctness table 64g referred to in the high probability mode common regardless of the setting state of the pachinko machine 10, the accuracy tables 64a to 64g can be prepared in advance in the main ROM 64. It becomes possible to suppress an increase in storage capacity for storage.

The probability of a jackpot result in the low probability mode varies depending on the setting status of the pachinko machine 10 from "setting 1" to "setting 6", while the distribution mode of the type of jackpot result depends on the setting status of the pachinko machine 10. It does not change accordingly. This makes it possible to limit the influence of the setting state of the pachinko machine 10 to the situation in the low probability mode. In addition, since it is possible to make the distribution table 64h that is referred to when sorting the types of jackpot results the same regardless of the setting state of the pachinko machine 10, the distribution table 64h can be stored in the main side ROM 64. It becomes possible to suppress an increase in storage capacity for storing the information in advance.

Even if a new setting is made to the setting state of the pachinko machine 10, the history information stored in the history memory 117 is not deleted and is retained. As a result, even if a new setting is made for the setting state of the pachinko machine 10, the history information up to that point can be continuously stored in the history memory 117, and the history memory 117 can be stored for a long period of time. Using the history information accumulated in 117, it becomes possible to specify the gaming history management result.

In a configuration in which the history information stored in the history memory 117 is not deleted and is retained even if a new setting is made for the setting state of the pachinko machine 10, the new setting for the setting state of the pachinko machine 10 is If this is done, the corresponding history information is stored in the history memory 117. This makes it possible to distinguish between history information before a new setting of the setting state of the pachinko machine 10 is made and history information after the new setting is made.

When a new setting of the setting state of the pachinko machine 10 is performed and corresponding history information is stored in the history memory 117, information corresponding to the setting value is included in the history information. This makes it possible to specify the contents of setting values set in the past by referring to the history information.

Note that when calculating various parameters at the calculation timing, history information stored after the history information corresponding to the new setting of the pachinko machine 10 in the history memory 117 is used as a reference. It is also possible to use a configuration in which various parameters are calculated. In this case, it is possible to derive the game history management results as various parameters at a timing after a new setting of the setting state of the pachinko machine 10 is performed.

In addition, when calculating various parameters at the calculation timing, history information corresponding to a new setting of the setting state of the pachinko machine 10 in the history memory 117 and corresponding to a change in the setting value is used as a reference. The configuration may be such that various parameters are calculated using history information stored later than that. In this case, it is possible to derive the gaming history management results at the timing after the setting state of the pachinko machine 10 is changed as various parameters.

Further, although the circuit board box 60a of the main controller 60 is provided with an opening for exposing the reading terminal 68d, the opening is not provided and the reading terminal 69d is exposed on the opposing wall 60b. It may also be covered by. In this case, it is necessary to open the board box 60a in order to connect an external device to the reading terminal 68d.

<Second embodiment>
In this embodiment, the content of the validity table corresponding to the setting state of the pachinko machine 10 is different from the first embodiment. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 33 is an explanatory diagram for explaining various tables stored in the main side ROM 64 in this embodiment.

As shown in FIG. 33, the main ROM 64 includes an area 161 for setting 1, an area 162 for setting 2, an area 163 for setting 3, an area 164 for setting 4, an area 165 for setting 5, and an area for setting 6. 166 are provided. The setting 1 area 161 includes a low probability win/fail table 161a for setting 1 that is referred to when the setting state of the pachinko machine 10 is "setting 1" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 161b for setting 1 that is referred to when the setting state of is "setting 1" and the win/fail lottery mode is high probability mode is stored. The setting 2 area 162 includes a low probability win/fail table 162a for setting 2 that is referred to when the setting state of the pachinko machine 10 is "setting 2" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 162b for setting 2 that is referred to when the setting state is "setting 2" and the win/fail lottery mode is the high probability mode is stored. The setting 3 area 163 includes a low probability win/fail table 163a for setting 3 that is referred to when the setting state of the pachinko machine 10 is "setting 3" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 163b for setting 3 that is referred to when the setting state is "setting 3" and the win/fail lottery mode is the high probability mode is stored.

The setting 4 area 164 includes a low probability win/fail table 164a for setting 4 that is referred to when the setting state of the pachinko machine 10 is "setting 4" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 164b for setting 4 that is referred to when the setting state is "setting 4" and the win/fail lottery mode is the high probability mode is stored. The setting 5 area 165 includes a low probability win/fail table 165a for setting 5 that is referred to when the setting state of the pachinko machine 10 is "setting 5" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 165b for setting 5 that is referred to when the setting state is "setting 5" and the win/fail lottery mode is the high probability mode is stored. The setting 6 area 166 includes a low probability win/fail table 166a for setting 6 that is referred to when the setting state of the pachinko machine 10 is "setting 6" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 A high probability win/fail table 166b for setting 6 that is referred to when the setting state is "setting 6" and the win/fail lottery mode is the high probability mode is stored.

The winning probabilities of the jackpot results set in each of the low probability success/failure tables 161a to 166a are different from each other. Specifically, when the low probability table 161a for setting 1 is referred to, the jackpot result is approximately 1/320, and when the low probability table 162a for setting 2 is referred to, the result is approximately 1/310. If the low probability success/failure table 163a for setting 3 is referred to, the result will be a jackpot at approximately 1/300, and if the low probability success/failure table 164a for setting 4 is referred to, the result will be approximately 1/290. If the low probability success/failure table 165a for setting 5 is referred to, it will be a jackpot result at approximately 1/280, and if the low probability success/failure table 166a for setting 6 is referred to, it will be a jackpot result at approximately 1/270. This results in a jackpot. As a result, when the setting state of the pachinko machine 10 is set to a high setting value, a jackpot result is more likely to occur in the low probability mode, which is advantageous for the player.

The winning probabilities of the jackpot results set in each of the high probability success/failure tables 161b to 166b are different from each other. Specifically, when the high probability success/failure table 161b for setting 1 is referred to, the jackpot result is approximately 1/45, and when the high probability success/failure table 162b for setting 2 is referred to, the result is approximately 1/40. When the high probability success/failure table 163b for setting 3 is referred to, the result is a jackpot at approximately 1/35, and when the high probability success/failure table 164b for setting 4 is referred to, the result is approximately 1/30. If the high probability success/failure table 165b for setting 5 is referred to, the result will be a jackpot at approximately 1/25, and if the high probability success/failure table 166b for setting 6 is referred to, the result will be approximately 1/20. This results in a jackpot. As a result, when the setting state of the pachinko machine 10 is set to a high setting value, a jackpot result is more likely to occur in the high probability mode, which is advantageous for the player.

That is, in the first embodiment, the higher the setting value of the pachinko machine 10, the higher the winning probability of a jackpot result in the low probability mode, while the winning probability of a jackpot result in the high probability mode is "setting 1". ~ "Setting 6" The configuration is the same regardless of the setting state, but in this embodiment, both the winning probability of the jackpot result in the low probability mode and the winning probability of the jackpot result in the high probability mode are The configuration is such that the higher the setting value of the machine 10, the higher the setting value. This makes it possible to increase the player's advantage of having a high set value set.

In addition, even if the jackpot result in the low probability mode has a winning probability in the case of "Setting 6" which is the highest setting state, the winning probability in the jackpot result in the high probability mode in the case of "Setting 1" which is the lowest setting state. It is set lower than the probability. As a result, it is possible to prevent the player's advantage from becoming extremely low when the setting state of the pachinko machine 10 is "setting 1", and it is also possible to prevent the player's advantage from becoming extremely low when the setting state of the pachinko machine 10 is "setting 1". 6'', it is possible to prevent the player's advantage from becoming extremely high.

On the other hand, as in the first embodiment, only one type of distribution table 64h is provided so that the distribution table 64h is common to any of the setting states "Setting 1" to "Setting 6". This makes it possible to prevent advantage or disadvantage from occurring depending on the setting state of the pachinko machine 10 regarding the distribution mode of jackpot results, and also allows the storage capacity for storing the distribution table 64h in advance in the main side ROM 64. It becomes possible to suppress the

Note that the probability of winning a jackpot result in the low probability mode is higher when the setting state of the pachinko machine 10 is set to a higher value, while the probability of winning a jackpot result in the high probability mode is higher when the setting state of the pachinko machine 10 is higher. A configuration may be adopted in which the set value is lower. In this case, in the low probability mode, the higher the setting value of the pachinko machine 10, the more advantageous it is to the player, and in the high probability mode, the lower the setting value of the pachinko machine 10, the more advantageous it is to the player. becomes possible.

In addition, the probability of winning a jackpot result in the high probability mode is higher when the setting state of the pachinko machine 10 is set to a higher value, while the probability of winning a jackpot result in the low probability mode is higher from "Setting 1" to "Setting 6". '' may be configured to be constant in the setting state. In this case, in the high probability mode, the higher the setting value of the setting state of the pachinko machine 10, the more advantageous it is to the player, and in the low probability mode, it is possible to prevent the setting state of the pachinko machine 10 from giving rise to an advantage or disadvantage. Become.

<Third embodiment>
This embodiment differs from the first embodiment in how the gaming history management results are handled when the setting state of the pachinko machine 10 is newly set. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

The management IC 66 is provided with a separate storage memory 171 in addition to each memory in the first embodiment as a memory for storing information. FIG. 34 is an explanatory diagram for explaining the separate storage memory 171. The separate storage memory 171 is a memory that does not require an external power supply to retain memory, such as a NOR flash memory or a NAND flash memory (that is, a nonvolatile storage means), and is used for both reading and writing purposes.

The separate storage memory 171 is provided with a first separate storage area 172, a second separate storage area 173, a third separate storage area 174, a fourth separate storage area 175, and a fifth separate storage area 176. These first to fifth separate storage areas 172 to 176 contain information on the management results of game history calculated when the setting state of the pachinko machine 10 is newly set, more specifically, information on the management results of the game history according to the first embodiment described above. The various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter, and 41st to 42nd parameters) described in 1. In this case, when the setting state of the pachinko machine 10 is newly set, various parameters are first stored in the first separate storage area 172, and thereafter, each time the setting state of the pachinko machine 10 is newly set, the various parameters are stored in the nth separate storage area 172. The areas to be stored are switched so that the storage areas 172 to 176→n+1 separate storage areas 172 to 176. If the setting state of the pachinko machine 10 is newly set after the various parameters have been stored in the fifth separate storage area 176, the various parameters are stored again in the first separate storage area 172. At this time, various parameters already stored in the first separate storage area 172 are deleted. As a result, various parameters for the pachinko machine 10 until new settings are executed five times are stored in the separate storage memory 171, and the oldest various parameters are erased for more than five times. be remembered for that.

The various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by an external device by connecting it to the reading terminal 68d. Thereby, it becomes possible to grasp the management result of the gaming history before a new setting of the setting state is performed in the pachinko machine 10.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG. 35.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HI level (step S1801: YES), the value of the setting value grasping counter of the management side RAM 114 is set to "1". settings (step S1802). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6".

Thereafter, it is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S1803). When an affirmative determination is made in step S1803, the value of the setting value grasping counter of the management side RAM 114 is incremented by 1 (step S1804). As a result, the setting value of the pachinko machine 10 specified by the management CPU 112 is increased by one level.

If a negative determination is made in step S1803 or if the process in step S1804 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S1805). If a negative determination is made in step S1805, the process returns to step S1803.

If an affirmative determination is made in step S1805, repeat change monitoring processing is executed (step S1806). The repeated change monitoring process will be described in detail later, but when a new setting of the setting state of the pachinko machine 10 repeatedly occurs in a short period of time, a process is executed to notify the new setting. In the configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the pachinko machine 10 is made, the management results of the game history are intended to be used when games are played over a predetermined period of time. It is assumed that a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to erase the setting state. On the other hand, by repeatedly executing the change monitoring process, if such an act is performed, a corresponding notification will be issued.

After that, various calculation processes are executed (step S1807). In various arithmetic processing, steps S1402 to S1412 of the display output processing (FIG. 30) in the first embodiment are executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, and 41st parameters) are ~42nd parameter) are calculated.

Thereafter, the various parameters calculated in step S1807 are stored in the area to be stored this time among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 (step S1808). A pointer information area is set in the separate storage memory 171 to enable the management CPU 112 to specify an area to be stored among the first to fifth separate storage areas 172 to 176. The information in the pointer information area is such that when various parameters are stored in the area to be stored among the first to fifth separate storage areas 172 to 176, the storage target is changed to the area in the next order. will be updated to. By executing the process of step S1808, various parameters at that time point are stored in the separate storage memory 171 for the current new settings of the pachinko machine 10.

After that, the history memory 117 is cleared to "0" (step S1809). In other words, in this embodiment, not only when history information is read by an external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set, the history memory 117 history information is deleted.

Thereafter, RTC information, which is date information and time information, is read from the RTC 115 (step S1810). Then, writing processing to the history memory 117 is executed (step S1811). In the writing process, the pointer information of the history area 124 that is currently the writing target is identified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the writing target is specified. The RTC information read in step S1810 is written in the history information storage area 125 of the history area 124. Further, both information for identifying the set value and information on the value of the set value understanding counter are written into the history information storage area 125 corresponding to the pointer information to be written. As a result, information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made. The combination is now stored as history information.

Thereafter, target pointer update processing is executed (step S1812). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read out and incremented by one. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

Next, the repeated change monitoring process executed in step S1806 will be described with reference to the flowchart of FIG. 36.

First, it is determined whether the number of games played since the setting state of the pachinko machine 10 was last set is within a reference number (specifically, 100 times) (step S1901). Specifically, the settings of the pachinko machine 10 are determined by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 that store correspondence information indicating the start of a game round. The number of times the game has been played since the state was last set is determined, and it is further determined whether the determined number of times the game has been played is within a reference number (specifically, 100 times).

If an affirmative determination is made in step S1901, the value of the repeat change counter provided in the separate storage memory 171 is incremented by 1 (step S1902). As already explained, the separate storage memory 171 is a memory that does not require an external power supply to retain the memory, and thus does not require an external power supply to retain the value of the repeat change counter.

Thereafter, it is determined whether the value of the repeat change counter after adding 1 exceeds the notification reference value "5" (step S1903). The notification reference value corresponds to the number of first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S1903, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without intervening the execution of game times exceeding the reference number of times is determined to be the number of the first to fifth separate storage areas 172 to 176. It is determined whether or not the limit has been exceeded.

If an affirmative determination is made in step S1903, display processing for repeated changes is executed (step S1904). In the repeated change display process, the display contents of the first to third notification display devices 69a to 69c are changed to correspond to the number of times that the new setting of the setting state of the pachinko machine 10 exceeds the notification reference value in a short period of time. The display content is subject to repeated changes. The display content of this repeated change is the display content of displaying "E" on all of the first to third notification display devices 69a to 69c, and this display content does not occur in other situations. In addition, the state in which the display contents of repeated changes are displayed on the first to third notification display devices 69a to 69c continues until the repeated change flag provided in the separate storage memory 171 is cleared to "0". . The repeat change flag is a flag used by the management CPU 112 to specify that the display contents of the repeat change should be displayed on the first to third notification display devices 69a to 69c. Further, when the repeat change flag is set to "1" and the display contents of the repeat change are displayed on the first to third notification display devices 69a to 69c, the display processing in the first embodiment is performed. (FIG. 31) is not executed. Thereafter, the repeat change flag in the separate storage memory 171 is set to "1" (step S1905).

If a negative determination is made in step S1901, the value of the repeat change counter in the separate storage memory 171 is cleared to "0" (step S1906). Thereafter, on the condition that the repeat change flag in the separate storage memory 171 is set to "1" (step S1907: YES), the display contents of the repeat change on the first to third notification display devices 69a to 69c are The display is ended (step S1908), and the repeat change flag is cleared to "0" (step S1909).

According to this embodiment described in detail above, the following excellent effects are achieved.

When a new setting of the setting state of the pachinko machine 10 is performed, the history information stored in the history memory 117 is deleted. Thereby, it becomes possible to leave in the history memory 117 the history information of the games executed after the new settings of the pachinko machine 10 have been made.

When a new setting of the setting state of the pachinko machine 10 is performed, various parameters are calculated as a gaming history management result using the history information in the history memory 117 at that time. This makes it possible to grasp the management results of the game history in the situation before a new setting is made in the pachinko machine 10. Furthermore, even if the history information in the history memory 117 is deleted when a new setting is made to the setting state of the pachinko machine 10, it is not possible to grasp the management results of the gaming history based on the history information to be deleted. It becomes possible.

In a configuration in which various parameters are calculated using the history information in the history memory 117 at that time when a new setting state is set in the pachinko machine 10, the various calculated parameters are stored in a separate storage memory. 171. As a result, even if a new setting is made in the pachinko machine 10, it is possible to grasp the management result of the gaming history in the situation before the setting is made at any subsequent timing.

By providing a plurality of separate storage areas 172 to 176 in the separate storage memory 171, it is possible to store various parameters corresponding to the setting timing of a plurality of setting states. This makes it possible to grasp the management results of game history over a plurality of periods based on the timing when a new setting state is set. Furthermore, even if new settings for the pachinko machine 10 are repeated under conditions in which no games are being played, various parameters calculated using historical information of the conditions in which games are actually being played will remain unchanged. It is possible to increase the possibility that the data remains in the separate storage memory 171.

The various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by an external device by connecting it to the reading terminal 68d. Thereby, it becomes possible to grasp the management result of the gaming history before a new setting of the setting state is performed in the pachinko machine 10.

In the configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the pachinko machine 10 is made, the management results of the game history are intended to be used when games are played over a predetermined period of time. It is assumed that a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to erase the setting state. On the other hand, by repeatedly executing the change monitoring process, if such an act is performed, a corresponding notification will be issued. This makes it possible to notify the administrator and the like that new settings for the setting state of the pachinko machine 10 have been repeatedly made in a short period of time.

Notification that a new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time is performed on the first to third notification display devices 69a to 69c. This makes it possible to detect whether a new setting of the setting state of the pachinko machine 10 has been repeatedly made in a short period of time by using the first to third notification display devices 69a to 69c for notifying the management results of the game history. It becomes possible to make notifications.

In a situation where it is necessary to notify that a new setting of the setting state of the pachinko machine 10 has been repeatedly made in a short period of time, the display contents of the repeated change will continue to be displayed on the first to third notification display devices 69a to 69c. , the notification of the game history management results during normal times is not performed on the first to third notification display devices 69a to 69c. This makes it possible to emphasize the notification that a new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time.

In addition, if the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times, and the event in which the new setting is performed exceeds the notification standard value and continues. Although the configuration is such that the notification corresponding to the notification is executed, the notification is not limited to this, and the total discharge of game balls discharged from the gaming area PA after the new setting of the pachinko machine 10 is set. A configuration may also be adopted in which when the number of events for which the new setting is performed exceeds the notification reference value and the number of events continues to exceed the notification reference value, the corresponding notification is executed. In addition, after a new setting of the setting state of the pachinko machine 10 is performed, a predetermined ball entrance part (for example, any one of the out port 24a, the general winning port 31, the first operating port 33, and the second operating port 34, or a predetermined ball entry port) If the event for which the new setting is made exceeds the notification standard value and the event for which the new setting is made continues in a situation where the total number of game balls that have entered the game balls (combination) and are ejected is within the standard number, the corresponding notification is executed. good. In addition, an event in which a new setting is made in a situation where the total number of pieces of history information newly stored in the history memory 117 after a new setting of the setting state of the pachinko machine 10 is made is within the reference number is notified. It may be configured such that when the reference value is exceeded continuously, a corresponding notification is executed.

Furthermore, when a new setting of the setting state of the pachinko machine 10 is executed exceeding the notification reference value within the monitoring reference period (for example, 600 seconds), a corresponding notification may be executed.

In addition, if the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times, and the event in which the new setting is performed exceeds the notification standard value and continues. However, the setting value was changed in a situation where the number of games played after the new setting of the pachinko machine 10 was set was within the standard number of times. It may also be configured such that when an event continues to exceed a notification reference value, a corresponding notification is executed.

In addition, if the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times, and the event in which the new setting is performed exceeds the notification standard value and continues. Although the configuration is such that a corresponding notification is executed at the same time, the new setting is triggered in a situation where the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times. A configuration may also be adopted in which, when events for which various parameters are calculated exceed the notification reference value and continue, a corresponding notification is executed.

In addition, if the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times, and the event in which the new setting is performed exceeds the notification standard value and continues. Although the configuration has been described in which a corresponding notification is executed, in addition to or in place of this, a configuration may also be adopted in which the progress of the game is restricted for a predetermined period (for example, one hour).

<Fourth embodiment>
This embodiment differs from the third embodiment in that the repeat change monitoring process is executed by the main CPU 63. Hereinafter, configurations that are different from the third embodiment described above will be explained. Note that descriptions of the same configurations as in the third embodiment will be basically omitted.

FIG. 37 is a flowchart showing repeated change monitoring processing executed by the main CPU 63. Note that the repeated change monitoring process is executed when the setting value update process (step S118) is executed in the main process (FIG. 9). That is, when the setting state of the pachinko machine 10 is newly set, the repeated change monitoring process is executed. However, the present invention is not limited to this, and a configuration may be adopted in which repeated change monitoring processing is executed when a setting value is changed.

First, it is determined whether the number of games played since the setting state of the pachinko machine 10 was last set is within a reference number (specifically, 100 times) (step S2001). The main side RAM 65 is provided with a game counter for counting the number of games played after the setting state of the pachinko machine 10 is newly set. Each time the number of games is played, the value of the number of games counter is incremented by one. The game count counter is excluded from being cleared to "0" even when the main side RAM 65 clearing process (steps S105 and S117) is executed.

When an affirmative determination is made in step S2001, the value of the repetition change counter provided in the main side RAM 65 is incremented by 1 (step S2002). The repeated change counter is excluded from being cleared to "0" even when the main side RAM 65 clearing process (step S105, step S117) is executed.

Thereafter, it is determined whether the value of the repeat change counter after being incremented by 1 exceeds the notification reference value "5" (step S2003). The notification reference value corresponds to the number of first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S2003, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without intervening the execution of game times exceeding the reference number of times is determined to be the number of the first to fifth separate storage areas 172 to 176. It is determined whether or not the limit has been exceeded.

If an affirmative determination is made in step S2003, a repeat change flag provided in the main side RAM 65 is set to "1" (step S2004). The repeated change flag is a flag used by the main CPU 63 to specify that the situation is such that notification of repeated changes should be made. The repeated change flag is excluded from being cleared to "0" even when the main side RAM 65 clearing process (steps S105 and S117) is executed.

If a negative determination is made in step S2001, the value of the repeat change counter in the main side RAM 65 is cleared to "0" (step S2005). Thereafter, on the condition that the repeat change flag in the main side RAM 65 is set to "1" (step S2006: YES), the repeat change flag is cleared to "0" (step S2007).

In the repeat change monitoring process, if the repeat change flag in the main side RAM 65 is set to "1" (step S2008: YES), a repeat change notification command is sent to the audio emission control device 81 (step S2009). When the audio light emission control device 81 receives a repeat change notification command, it causes the symbol display device 41, the display light emitting section 53, and the speaker section 54 to notify the repeat change. The notification of the repeated change continues until the supply of operating power to the audio emission control device 81 is stopped.

According to the above configuration, it is possible to notify that a new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time based on the control by the main CPU 63. In addition, since the notification is performed by the symbol display device 41, the display light emitting unit 53, and the speaker unit 54, the setting state of the pachinko machine 10 can be changed without opening the gaming machine main body 12 forward with respect to the outer frame 11. This makes it possible for the administrator to recognize that new settings have been repeatedly made in a short period of time.

Note that in addition to or in place of the configuration in which, when new settings of the setting state of the pachinko machine 10 are repeatedly performed in a short period of time, a notification command of the repeated change is sent from the main side CPU 63 to the sound emission control device 81. A configuration may also be adopted in which external output corresponding to this is performed.

Further, a configuration may be adopted in which the main side CPU 63 executes the repeated change monitoring process in this embodiment, and the management side CPU 112 executes the repeated change monitoring process in the third embodiment. This makes it possible to strictly monitor whether new settings of the setting state of the pachinko machine 10 are repeatedly performed in a short period of time.

<Fifth embodiment>
In this embodiment, the processing configuration of the setting update recognition process in the management side CPU 112 is different from the third embodiment. Hereinafter, configurations that are different from the third embodiment described above will be explained. Note that descriptions of the same configurations as in the third embodiment will be basically omitted.

FIG. 38 is a flowchart showing the setting update recognition process in this embodiment executed by the management CPU 112.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HI level (step S2101: YES), the value of the setting value grasping counter of the management side RAM 114 is set to "1". settings (step S2102). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6".

Thereafter, it is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2103). When an affirmative determination is made in step S2103, the value of the setting value grasping counter of the management side RAM 114 is incremented by 1 (step S2104). As a result, the setting value of the pachinko machine 10 specified by the management CPU 112 is increased by one level.

If a negative determination is made in step S2103 or if the process in step S2104 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S2105). If a negative determination is made in step S2105, the process returns to step S2103.

If an affirmative determination is made in step S2105, it is determined whether a predetermined number or more of predetermined history information exists in the history memory 117 (step S2106). Specifically, the settings of the pachinko machine 10 are determined by counting the number of history information storage areas 125 in the history area 124 of the history memory 117 that store correspondence information indicating the start of a game round. The number of times the game has been played since the state was last set is determined, and it is further determined whether the determined number of times the game has been played exceeds a reference number (specifically, 100 times). However, it is not limited to this, and the number of history information storage areas 125 in which correspondence information indicating that game balls have been ejected from the game area PA is stored is the standard number (specifically, 1000 pieces). A configuration may be adopted in which it is determined in step S2106 whether or not the value exceeds . In addition, correspondence relationship information indicating that the game ball has entered a predetermined ball entry portion (for example, any one of the out port 24a, the general winning port 31, the first operating port 33, and the second operating port 34, or a predetermined combination) The configuration may be such that it is determined in step S2106 whether or not the number of history information storage areas 125 in which are stored exceeds a reference number (specifically, 1000). Alternatively, a configuration may be adopted in which it is determined in step S2106 whether or not the total number of history information stored in the history memory 117 exceeds a reference number (specifically, 1000 pieces).

In addition, if the number of games played after the new setting of the pachinko machine 10 is set is within the standard number of times, and the event in which the new setting is performed exceeds the notification standard value and continues. Although the configuration is such that the notification corresponding to the notification is executed, the notification is not limited to this, and the total discharge of game balls discharged from the gaming area PA after the new setting of the pachinko machine 10 is set. A configuration may also be adopted in which when the number of events for which the new setting is performed exceeds the notification reference value and the number of events continues to exceed the notification reference value, the corresponding notification is executed. In addition, after a new setting of the setting state of the pachinko machine 10 is performed, a predetermined ball entrance part (for example, any one of the out port 24a, the general winning port 31, the first operating port 33, and the second operating port 34, or a predetermined ball entry port) If the event for which the new setting is made exceeds the notification standard value and the event for which the new setting is made continues in a situation where the total number of game balls that have entered the game balls (combination) and are ejected is within the standard number, the corresponding notification is executed. good. In addition, an event in which a new setting is made in a situation where the total number of pieces of history information newly stored in the history memory 117 after a new setting of the setting state of the pachinko machine 10 is made is within the reference number is notified. It may be configured such that when the reference value is exceeded continuously, a corresponding notification is executed.

If an affirmative determination is made in step S2106, various calculation processes are executed (step S2107). In various arithmetic processing, steps S1402 to S1412 of the display output processing (FIG. 30) in the first embodiment are executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, and 41st parameters) are ~42nd parameter) are calculated.

Thereafter, the various parameters calculated in step S2107 are stored in the area to be stored this time among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 (step S2108). A pointer information area is set in the separate storage memory 171 to enable the management CPU 112 to specify an area to be stored among the first to fifth separate storage areas 172 to 176. The information in the pointer information area is such that when various parameters are stored in the area to be stored among the first to fifth separate storage areas 172 to 176, the storage target is changed to the area in the next order. will be updated to. By executing the process of step S2108, various parameters at that time point will be stored in the separate storage memory 171 for the new setting of the current setting state of the pachinko machine 10.

If a negative determination is made in step S2106, or if the process in step S2108 is executed, the history memory 117 is cleared to "0" (step S2109). In other words, in this embodiment, not only when history information is read by an external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set, the history memory 117 history information is deleted.

After that, RTC information, which is date information and time information, is read from the RTC 115 (step S2110). Then, writing processing to the history memory 117 is executed (step S2111). In the writing process, the pointer information of the history area 124 that is currently the writing target is identified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the writing target is specified. The RTC information read in step S2110 is written in the history information storage area 125 of the history area 124. Further, both information for identifying the set value and information on the value of the set value understanding counter are written into the history information storage area 125 corresponding to the pointer information to be written. As a result, information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made. The combination is now stored as history information.

Thereafter, update processing of the target pointer is executed (step S2112). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read out and incremented by one. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

According to the above configuration, when the setting state of the pachinko machine 10 is newly set, on the condition that a predetermined number or more of history information is stored in the history memory 117, the history information is stored in the history memory 117. Various parameters are calculated using the history information and are stored in the separate storage memory 171. As a result, even if new settings for the pachinko machine 10 are repeatedly made in a short period of time, the separate storage memory 171 will essentially retain information on the management results of game history as a result of games being played. It becomes possible to store the information.

Note that the process in step S2109 may be executed on the condition that the processes in step S2107 and step S2108 have been executed. That is, the history information stored in the history memory 117 is erased on condition that a predetermined number or more of history information is stored in the history memory 117. This makes it possible to prevent the history information in the history memory 117 from being erased even if new settings for the setting state of the pachinko machine 10 are repeatedly made in a short period of time.

<Sixth embodiment>
This embodiment is different from the first embodiment in the configuration of the history memory 117. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 39 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

The history memory 117 is provided with a total area 141, a first state area 142, a second state area 143, and a third state area 144. First to fourteenth counters 141a to 141n, 142a to 142n, 143a to 143n, and 144a to 144n are provided in each of these areas 141 to 144, respectively. The first counters 141a to 144a of each area 141 to 144 store information on the number of times the output state of the first signal input to the first buffer 122a is changed from LOW level to HI level. The second counters 141b to 144b of each of the areas 141 to 144 store information on the number of times the output state of the second signal input to the second buffer 122b is changed from LOW level to HI level. The third counters 141c to 144c of each area 141 to 144 store information on the number of times the output state of the third signal input to the third buffer 122c is changed from LOW level to HI level. The fourth counters 141d to 144d of each of the areas 141 to 144 store information on the number of times the output state of the fourth signal input to the fourth buffer 122d is changed from LOW level to HI level. The fifth counters 141e to 144e of each area 141 to 144 store information on the number of times the output state of the fifth signal input to the fifth buffer 122e is changed from LOW level to HI level. The sixth counters 141f to 144f of each area 141 to 144 store information on the number of times the output state of the sixth signal input to the sixth buffer 122f has changed from LOW level to HI level. The seventh counters 141g to 144g of each area 141 to 144 store information on the number of times the output state of the seventh signal input to the seventh buffer 122g is changed from LOW level to HI level. The eighth counters 141h to 144h of each area 141 to 144 store information on the number of times the output state of the eighth signal input to the eighth buffer 122h is changed from LOW level to HI level. The ninth counters 141i to 144i of each area 141 to 144 store information on the number of times the output state of the ninth signal input to the ninth buffer 122i is changed from LOW level to HI level. The tenth counters 141j to 144j of each of the areas 141 to 144 store information on the number of times the output state of the tenth signal input to the tenth buffer 122j is changed from LOW level to HI level. The eleventh counters 141k to 144k of each area 141 to 144 store information on the number of times the output state of the eleventh signal input to the eleventh buffer 122k has changed from LOW level to HI level. The twelfth counters 141l to 144l of each area 141 to 144 store information on the number of times the output state of the twelfth signal input to the twelfth buffer 122l is changed from LOW level to HI level. The thirteenth counters 141m to 144m of the respective areas 141 to 144 store information on the number of times the output state of the thirteenth signal input to the thirteenth buffer 122m is changed from the LOW level to the HI level. The fourteenth counters 141n to 144n of each of the areas 141 to 144 store information on the number of times the output state of the fourteenth signal input to the fourteenth buffer 122n is changed from LOW level to HI level.

FIG. 40 is a flowchart showing the history setting process in this embodiment executed by the management CPU 112.

First, the number of buffers to be checked by the management CPU 112 among the first to fourteenth buffers 122a to 122n is set in the check target counter of the management side RAM 114 (step S2201). Specifically, among the first to fourteenth correspondence areas 123a to 123n in the correspondence memory 116, the number of correspondence areas in which information other than information indicating blankness is stored is identified, and the number of correspondence areas is identified. Set the information of the number in the confirmation target counter. In this pachinko machine 10, since information other than information indicating blankness is stored in the first to eleventh correspondence areas 123a to 123k, "11" is set in the check target counter in step S2201.

Thereafter, it is determined whether the buffers 122a to 122n corresponding to the current counters to be checked are buffers to which the status information signal is input (step S2202). Specifically, in the correspondence areas 123a to 123n corresponding to the current value of the counter to be checked, information indicating that the opening/closing execution mode is in effect, information indicating that it is in the high-frequency support mode, and It is determined whether any of the information indicating that it is the front door frame 14 is stored.

If an affirmative determination is made in step S2202, a state information setting process is executed (step S2203). In this setting process, when the output state of the eighth signal indicating whether or not the opening/closing execution mode is in progress switches from the LOW level to the HI level, information on the first state indicating that the opening/closing execution mode is in progress is sent to the management side. The information on the first state is stored in the RAM 114, and when the output state of the eighth signal changes from the HI level to the LOW level, the information on the first state is erased from the management side RAM 114. In addition, when the output state of the ninth signal indicating whether or not the high frequency support mode is in progress is switched from the LOW level to the HI level, information on the second state indicating that the high frequency support mode is in progress is stored in the management side RAM 114. When the output state of the ninth signal changes from the HI level to the LOW level, the information on the second state is erased from the management side RAM 114. Further, when the output state of the 10th signal indicating whether or not the front door frame 14 is open is switched from the LOW level to the HI level, information on the third state indicating that the front door frame 14 is open. is stored in the management side RAM 114, and when the output state of the tenth signal changes from the HI level to the LOW level, the information on the third state is erased from the management side RAM 114.

If a negative determination is made in step S2202 or if the process in step S2203 is executed, the numerical information stored in the buffer corresponding to the current check target counter value among the first to fourteenth buffers 122a to 122n is , it is determined whether the output state of the input signal from the main CPU 63 to the buffer has been switched from LOW level to HI level by checking whether it has been changed from "0" to "1" ( Step S2204). Note that if the numerical information stored in the eighth buffer 122h is changed from "0" to "1" in a situation where the current value of the counter to be checked is the value corresponding to the eighth buffer 122h, the process proceeds to step S2203. The first state information is stored in the management side RAM 114, and an affirmative determination is made in step S2204. Further, if the numerical information stored in the ninth buffer 122i is changed from "0" to "1" in a situation where the current value of the counter to be checked is a value corresponding to the ninth buffer 122i, the process proceeds to step S2203. The second state information is stored in the management side RAM 114, and an affirmative determination is made in step S2204. Furthermore, if the numerical information stored in the tenth buffer 122j is changed from "0" to "1" in a situation where the current value of the counter to be checked is the value corresponding to the tenth buffer 122j, the process proceeds to step S2203. Information on the third state is stored in the management side RAM 114, and an affirmative determination is made in step S2204.

When an affirmative determination is made in step S2204, addition processing of the corresponding total counter is executed (step S2205). In this addition process, one is added to the value of the counter corresponding to the current check target counter value among the first to fourteenth total counters 141a to 141n in the total area 141 of the history memory 117. For example, if the value of the counter to be checked is "11", the eleventh counter 141k for totaling is the target of addition, and if the value of the counter to be checked is "5", the fifth counter 141e for totaling is the target of addition, If the value of the check target counter is "1", the first total counter 141a becomes the addition target.

Thereafter, by referring to the state information of the management side RAM 114, it is determined whether or not it is in the first state, that is, whether it is in the opening/closing execution mode (step S2206). If the state is the first state (step S2206: YES), addition processing of the counter for the corresponding first state is executed (step S2207). In this addition process, one is added to the value of the counter corresponding to the current check target counter value among the first to fourteenth counters 142a to 142n for the first state in the first state area 142 of the history memory 117. . For example, if the value of the counter to be checked is "11", the 11th counter 142k for the first state becomes the addition target, and if the value of the counter to be checked is "5", the fifth counter 142e for the first state becomes the addition target. If the value of the check target counter is "1", the first counter 142a for the first state becomes the target of addition.

Thereafter, by referring to the state information of the management side RAM 114, it is determined whether or not it is in the second state, that is, whether it is in the high-frequency support mode (step S2208). In the case of the second state (step S2208: YES), addition processing of the counter for the corresponding second state is executed (step S2209). In this addition process, one is added to the value of the counter corresponding to the current check target counter value among the first to fourteenth counters 143a to 143n for the second state in the second state area 143 of the history memory 117. . For example, if the value of the counter to be checked is "11", the 11th counter 143k for the second state becomes the addition target, and if the value of the counter to be checked is "5", the fifth counter 143e for the second state becomes the addition target. If the value of the check target counter is "1", the first counter 143a for the second state becomes the target of addition.

Thereafter, by referring to the state information in the management side RAM 114, it is determined whether the third state is reached, that is, whether the front door frame 14 is open (step S2210). In the case of the third state (step S2210: YES), addition processing of the counter for the corresponding third state is executed (step S2211). In the addition process, one is added to the value of the counter corresponding to the current check target counter value among the first to fourteenth counters 144a to 144n for the third state in the third state area 144 of the history memory 117. . For example, if the value of the counter to be checked is "11", the 11th counter 144k for the third state is to be added, and if the value of the counter to be checked is "5", the fifth counter 144e for the third state is to be added. If the value of the check target counter is "1", the first counter 144a for the third state becomes the target of addition.

If a negative determination is made in step S2204, if a negative determination is made in step S2210, or if the process in step S2211 is executed, the value of the confirmation target counter in the management side RAM 114 is subtracted by 1 (step S2212). Then, it is determined whether the value of the check target counter after subtraction by 1 is "0" (step S2213). If the value of the confirmation target counter is 1 or more (step S2213: NO), the processes from step S2202 onwards are executed for the confirmation target corresponding to the new value of the confirmation target counter.

By executing the history setting process as described above, the number of times a game ball enters the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34, and the opening/closing execution The number of times a mode has occurred, the number of times a high-frequency support mode has occurred, and the number of times a game has occurred are not stored as history information as in the first embodiment, but are stored as frequency information. This makes it possible to reduce the storage capacity required in the history memory 117 compared to a configuration in which each piece of history information is stored individually.

With this configuration in which the number of times information is stored instead of the history information, there is no need to perform a process of deriving the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG. 41.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from the LOW level to the HI level (step S2301: YES), the value of the setting value grasping counter of the management side RAM 114 is set to "1". settings (step S2302). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6".

Thereafter, it is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2303). When an affirmative determination is made in step S2303, the value of the setting value grasping counter of the management side RAM 114 is incremented by 1 (step S2304). As a result, the setting value of the pachinko machine 10 specified by the management CPU 112 is increased by one level.

If a negative determination is made in step S2303 or if the process in step S2304 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S2305). If a negative determination is made in step S2305, the process returns to step S2303.

If an affirmative determination is made in step S2305, the eleventh counter 141k for totaling, which measures the number of times the game has been executed, is opened and closed in the totaling area 141 in the history memory 117. The eighth totaling counter 141h that measures the number of occurrences of the mode, and the ninth totaling counter 141i that measures the number of occurrences of the high-frequency support mode in the totaling area 141 in the history memory 117. Clear to "0" (steps S2306 to S2308). As a result, the information on the number of times the game is executed, the number of times the opening/closing execution mode occurs, and the number of times the high-frequency support mode occurs is cleared to "0" with the new setting of the pachinko machine 10 being set. be done. Therefore, the 31st parameter indicates the number of occurrences of the opening/closing execution mode per unit game, the 41st parameter indicates the number of occurrences of the high frequency support mode per unit game, and the number of occurrences of the high frequency support mode with respect to the number of occurrences of the opening/closing execution mode. The calculation result of the 42nd parameter indicating the ratio of the number of occurrences corresponds to the game content after the setting state of the pachinko machine 10 is newly set. In a configuration in which the probability of winning a jackpot result is changed when the setting value of the pachinko machine 10 is changed, as described above, the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are the setting state of the pachinko machine 10. The calculation results of the 31st parameter, 41st parameter, and 42nd parameter are appropriate based on the current setting values by making them correspond to the game content after the new settings are made. It becomes possible to judge whether or not.

On the other hand, even if a new setting is made for the setting state of the pachinko machine 10, the counters other than the eighth total counter 141h, the ninth total counter 141i, and the eleventh counter 141k in the history memory 117 will be " 0” is not cleared. As a result, the number of game balls entering each history target ball entry section or the frequency of ball entry is managed based on long-term gaming history without being affected by new settings of the pachinko machine 10. becomes possible.

According to the above configuration, the number of times game balls enter the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34, the number of times the opening/closing execution mode occurs, and the high frequency support The number of times a mode has occurred and the number of times a game has occurred are not stored as history information as in the first embodiment, but are stored as number information. This makes it possible to reduce the storage capacity required in the history memory 117 compared to a configuration in which each piece of history information is stored individually.

Furthermore, with this configuration in which the number of times information is stored instead of the history information, there is no need to perform a process of deriving the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

Each number information of the number of times the game is executed, the number of times the open/close execution mode occurs, and the number of times the high-frequency support mode occurs is cleared to "0" when the setting state of the pachinko machine 10 is newly set. Therefore, the 31st parameter indicates the number of occurrences of the opening/closing execution mode per unit game, the 41st parameter indicates the number of occurrences of the high frequency support mode per unit game, and the number of occurrences of the high frequency support mode with respect to the number of occurrences of the opening/closing execution mode. The calculation result of the 42nd parameter indicating the ratio of the number of occurrences corresponds to the game content after the setting state of the pachinko machine 10 is newly set. In a configuration in which the probability of winning a jackpot result is changed when the setting value of the pachinko machine 10 is changed, as described above, the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are the setting state of the pachinko machine 10. The calculation results of the 31st parameter, 41st parameter, and 42nd parameter are appropriate based on the current setting values by making them correspond to the game content after the new settings are made. It becomes possible to judge whether or not.

On the other hand, even if a new setting is made for the setting state of the pachinko machine 10, the counters other than the eighth total counter 141h, the ninth total counter 141i, and the eleventh counter 141k in the history memory 117 will be " 0” is not cleared. As a result, the number of game balls entering each history target ball entry section or the frequency of ball entry is managed based on long-term gaming history without being affected by new settings of the pachinko machine 10. becomes possible.

Note that the configuration of the history memory 117 as in this embodiment may be applied to the first to fifth embodiments and the embodiments described after this embodiment. For example, when applied to the first embodiment described above, even if a new setting is made to the setting state of the pachinko machine 10, the information in the history memory 117 is maintained as is. Further, when applied to the third embodiment, when a new setting of the setting state of the pachinko machine 10 is performed, the entire history memory 117 is cleared to "0".

Furthermore, a configuration may be adopted in which the processes of steps S2306 to S2308 are executed in the setting update recognition process (FIG. 41) when the setting values of the pachinko machine 10 are changed. As a result, even if a new setting is made for the setting state of the pachinko machine 10, if the setting value is not changed before or after, information on the number of times the game has been executed, information on the number of times the opening/closing execution mode has occurred, and high-frequency support The information on the number of times the mode has occurred is never cleared to "0", and when the setting value of the pachinko machine 10 is changed, information on the number of times the game has been executed, information on the number of times the open/close execution mode has occurred, and the high-frequency support mode It becomes possible to clear the information of the number of occurrences to "0".

In addition, in the setting update recognition process (FIG. 41), various parameters are calculated using the counters 141 to 144 of the history memory 117 before the processes of steps S2306 to S2308 are executed. Various parameters may be stored in the calculation result memory 131.

<Seventh embodiment>
This embodiment is different from the first embodiment in the configuration of the history memory 117. Hereinafter, configurations that are different from the first embodiment will be explained. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 42 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

As the history memory 117, history memories 181 to 186 are provided that correspond to the setting states of the pachinko machine 10, "Setting 1" to "Setting 6", respectively. Specifically, a history memory 181 for setting 1 is provided corresponding to "setting 1", a history memory 182 for setting 2 is provided corresponding to "setting 2", and " A history memory 183 for setting 3 is provided corresponding to "setting 3", a history memory 184 for setting 4 is provided corresponding to "setting 4", and a history memory 184 for setting 4 is provided corresponding to "setting 5". A history memory 185 for setting 5 is provided, and a history memory 186 for setting 6 is provided corresponding to "setting 6."

Each of the history memories 181 to 186 for settings 1 to 6 is provided with a combination of the history area 124 and the pointer area 126 of the history memory 117 in the first embodiment. This makes it possible to store history information in correspondence with each of the setting states of the pachinko machine 10 from "setting 1" to "setting 6." In this case, when a new setting is made for the setting state of the pachinko machine 10, the history memories 181 to 186 corresponding to the setting value for which the new setting is made are stored as history information. , it becomes possible to store history information separately for each setting value without erasing the history information when setting a new setting state of the pachinko machine 10. Further, since various parameters are calculated using history information corresponding to the currently set setting state of the pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each set value.

Note that each of the history memories 181 to 186 for settings 1 to 6 includes a total area 141, a first state area 142, a second state area 143, and a third state area 144 in the sixth embodiment. It is also possible to have a configuration in which a combination of the following is set.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG. 43.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HI level (step S2401: YES), the value of the setting value grasping counter provided in the calculation result memory 131 is set to "1" (step S2402). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6". In addition, in this embodiment, since the calculation result memory 131, which is a memory that does not require an external power supply for memory retention, is provided with a set value grasping counter, it is assumed that the supply of operating power to the management IC 66 is stopped. The value stored in the set value grasping counter is also memorized and held.

Thereafter, it is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2403). If an affirmative determination is made in step S2403, 1 is added to the value of the setting value grasping counter in the calculation result memory 131 (step S2404). As a result, the setting value of the pachinko machine 10 specified by the management CPU 112 is increased by one level.

If a negative determination is made in step S2403 or if the process in step S2404 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S2405). If a negative determination is made in step S2405, the process returns to step S2403.

If an affirmative determination is made in step S2405, the history memories 181 to 186 corresponding to the value of the set value grasping counter of the calculation result memory 131 are set as the storage target of history information and the reference target when calculating various parameters ( Step S2406). Specifically, if the value of the setting value grasp counter is "1", it means that "setting 1" has been set, so the history memory 181 for setting 1 is used as the storage target for history information and for various parameters. Set as a reference target during calculation. In addition, if the value of the setting value understanding counter is "2", it means that "setting 2" has been set, so the history memory 182 for setting 2 is used as a storage target for history information and when calculating various parameters. Set as a reference target. In addition, if the value of the setting value grasp counter is "3", it means that "setting 3" has been set, so the history memory 183 for setting 3 is used as a storage target for history information and when calculating various parameters. Set as a reference target. In addition, if the value of the setting value understanding counter is "4", it means that "setting 4" has been set. Set as a reference target. Also, if the value of the setting value grasp counter is "5", it means that "setting 5" has been set, so the history memory 185 for setting 5 is used as a storage target for history information and when calculating various parameters. Set as a reference target. In addition, if the value of the setting value understanding counter is "6", it means that "setting 6" has been set, so the history memory 186 for setting 6 is used as a storage target for history information and when calculating various parameters. Set as a reference target.

Thereafter, RTC information, which is date information and time information, is read from the RTC 115 (step S2407). Then, writing processing to the history memory 117 is executed (step S2408). In the writing process, the history memories 181 to 186 set as the storage target of history information in step S2406 are selected from among the history memories 181 to 186 for settings 1 to 6. Then, by referring to the pointer area 126 in the history memory 181 to 186 that is the storage target, the pointer information of the history area 124 that is currently the writing target is identified, and the pointer information that is the current writing target is identified. The RTC information read in step S2407 is written in the history information storage area 125 of the history area 124 corresponding to the pointer information located therein. Further, information for identifying the set value is written in the history information storage area 125 corresponding to the pointer information to be written. As a result, a combination of information indicating that the setting state of the pachinko machine 10 has been newly set and RTC information corresponding to the date and time when the setting was made is stored as history information.

Thereafter, target pointer update processing is executed (step S2409). In the update process, among the history memories 181 to 186 for settings 1 to 6, the history memories 181 to 186 that were set to store history information in step S2406 are selected, and the history memories 181 to 186 are The numerical information stored in the pointer area 126 is read out and added by 1. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

According to the above configuration, as the history memory 117, history memories 181 to 186 for settings 1 to 6 are provided so as to correspond to "settings 1" to "setting 6", respectively. This makes it possible to store game history in correspondence with each of the setting states of the pachinko machine 10 from "setting 1" to "setting 6." In this case, when a new setting is made for the setting state of the pachinko machine 10, the history memories 181 to 186 corresponding to the setting value for which the new setting is made are stored as history information. , it becomes possible to store history information separately for each setting value without erasing the history information when setting a new setting state of the pachinko machine 10. Further, since various parameters are calculated using history information corresponding to the currently set setting state of the pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each set value.

Note that the history memory 117 is not limited to the configuration in which six memories 181 to 186 for settings 1 to 6 are provided; An area corresponding to history memory 181 for setting 2, an area corresponding to history memory 182 for setting 2, an area corresponding to history memory 183 for setting 3, and an area corresponding to history memory 184 for setting 4. An area corresponding to the history memory 185 for setting 5, and an area corresponding to the history memory 186 for setting 6 may be set.

<Eighth embodiment>
This embodiment is different from the first embodiment in the configuration of the history memory 117. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 44 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

As the history memory 117, a first history memory 191 and a second history memory 192 are provided. Each of the first history memory 191 and the second history memory 192 is provided with a combination of the history area 124 and pointer area 126 of the history memory 117 in the first embodiment. In this case, in a situation where history information is stored using one of the first history memory 191 and the second history memory 192, a new setting of the setting state of the pachinko machine 10 is made. is performed, the history information in one of the history memories 191, 192 is left without being erased until a predetermined number or more of history information is stored in the other history memory 191, 192. In addition, new history information can be stored in both history memories 191 and 192 until a predetermined number or more of history information is stored in the other history memory 191 and 192. Become.

Next, the setting update recognition process in this embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG. 45.

When the setting value update signal input to the 15th buffer 122o of the input port 121 switches from LOW level to HI level (step S2501: YES), the value of the setting value grasping counter provided in the management side RAM 114 is changed to " 1" (step S2502). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means that the setting is "setting 6".

Thereafter, it is determined whether the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from the LOW level to the HI level again (step S2503). When an affirmative determination is made in step S2503, the value of the setting value grasping counter of the management side RAM 114 is incremented by 1 (step S2504). As a result, the setting value of the pachinko machine 10 specified by the management CPU 112 is increased by one level.

If a negative determination is made in step S2503 or if the process in step S2504 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , it is determined whether a setting value identification end command has been received from the main CPU 63 (step S2505). If a negative determination is made in step S2505, the process returns to step S2503.

If an affirmative determination is made in step S2505, the setting change occurrence flag provided in the calculation result memory 131 is set to "1" (step S2506). The setting change occurrence flag is set to the first history memory 191 and the second history memory 192 that were previously set to store history information after the pachinko machine 10 is newly set. This flag is used by the management CPU 112 to specify whether or not not only the history memories 191 and 192 but also the other history memory 191 and 192 are to be stored as history information. In addition, since a setting change occurrence flag is provided in the calculation result memory 131, which is a memory that does not require an external power supply for memory retention, a setting change will occur even if the supply of operating power to the management IC 66 is stopped. The value stored in the flag is retained.

Thereafter, RTC information, which is date information and time information, is read from the RTC 115 (step S2507). Then, writing processing to each history memory 191, 192 is executed (step S2508). In the writing process, first, the pointer information of the history area 124 that is currently the write target is identified by referring to the pointer area 126 of the first history memory 191, and the pointer information that is the write target is identified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to the history area 124. Further, both information for identifying the set value and information on the value of the set value understanding counter are written into the history information storage area 125 corresponding to the pointer information to be written. As a result, information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made. The combination is now stored in the first history memory 191 as history information. In addition, in the writing process, by referring to the pointer area 126 of the second history memory 192, the pointer information of the history area 124 that is currently the writing target is specified, and the pointer information that is the writing target is identified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to the information. Further, both information for identifying the set value and information on the value of the set value understanding counter are written into the history information storage area 125 corresponding to the pointer information to be written. As a result, information indicating that the setting state of the pachinko machine 10 has been newly set, RTC information corresponding to the date and time when the setting was made, and information on the setting value when the setting was made. The combination is now stored in the second history memory 192 as history information.

Thereafter, update processing for each target pointer is executed (step S2509). In the update process, first, the numerical information stored in the pointer area 126 of the first history memory 191 is read out and incremented by one. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information. In addition, in the update process, the numerical information stored in the pointer area 126 of the second history memory 192 is read out and incremented by one. It is determined whether the pointer information after the addition of 1 exceeds the maximum value of pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

Next, the history setting process in this embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG. 46.

If the setting change occurrence flag of the calculation result memory 131 is not set to "1" (step S2601: NO), the side that is the storage target of the first history memory 191 and the second history memory 192 is This means that only historical information should be stored. In this case, first, the history memories 191 and 192 that are current storage targets are determined (step S2602). A storage target flag is provided in the calculation result memory 131, and when the value of the storage target flag is "0", the first history memory 191 becomes the storage target, and the value of the storage target flag is "1". In this case, the second history memory 192 becomes the storage target. Note that since the storage target flag is provided in the calculation result memory 131, which is a memory that does not require external power supply for memory retention, even if the supply of operating power to the management IC 66 is stopped, the storage target flag will remain unchanged. The value of is stored and retained.

Thereafter, a history setting execution process is executed for the history memories 191 and 192 to be stored (step S2603). Specifically, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed for one of the history memories 191 and 192 that is the storage target. As a result, the history information is stored in one of the history memories 191 and 192 that is the storage target.

On the other hand, if the setting change occurrence flag of the calculation result memory 131 is set to "1" (step S2601: YES), the storage target is selected from among the first history memory 191 and the second history memory 192. This means that the situation is such that history information should be stored not only on one side but also on the other side. In this case, history setting execution processing is executed for both history memories 191 and 192 (step S2604). Specifically, first, steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed for the first history memory 191. As a result, the history information is stored in the first history memory 191. Thereafter, steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed on the second history memory 192. As a result, the history information is stored in the second history memory 192.

When the process of step S2603 or the process of step S2604 is executed, it is determined whether the setting change occurrence flag in the calculation result memory 131 is set to "1" (step S2605). When an affirmative determination is made in step S2605, it is determined whether or not a predetermined number or more of ball discharge histories exist in the history memories 191 and 192 that are not to be stored (step S2606). Specifically, when the value of the storage target flag of the calculation result memory 131 is "0", the first history memory 191 is the storage target, so the gaming area PA is stored in the second history memory 192. It is determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that game balls have been ejected are stored. In addition, when the value of the storage target flag of the calculation result memory 131 is "1", the second history memory 192 is the storage target, so the game ball is transferred from the game area PA to the first history memory 191. It is determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that a has been discharged is stored. Note that rather than determining whether or not a predetermined number (specifically, "1000") or more of history information indicating that a game ball has been ejected from the gaming area PA is stored, the determination is made based on whether a game round has been executed. It may be configured to determine whether or not a predetermined number (specifically, "100") or more of history information indicating .

If an affirmative determination is made in step S2606, processing for changing the storage target is executed (step S2607). In the process of changing the storage target, the value of the storage target flag of the calculation result memory 131 is set to a value different from the current value between two values, thereby changing the memory for the first history 191 and the second memory 192. Change the side that is to be stored. Specifically, if the value of the storage target flag is "0", the storage target is changed from the first history memory 191 to the second history memory 192 by setting the storage target flag to "1". Further, if the value of the storage target flag is "1", the storage target is changed from the second history memory 192 to the first history memory 191 by clearing the storage target flag to "0". As a result, the history memories 191 and 192, which store only history information from games executed after the new settings of the pachinko machine 10 are set, are set as storage targets. Then, various parameters are calculated using the history information of the history memories 191 and 192 that are newly stored, so that the parameters are executed after the new settings of the pachinko machine 10 are set. It becomes possible to derive various parameters depending on the game.

Thereafter, clearing processing is performed for the first history memory 191 and the second history memory 192 that have been the storage targets up to that point (step S2608). Specifically, if the value of the storage target flag is "0", the second history memory 192 is cleared to "0", and if the value of the storage target flag is "1", the first history memory 191 is cleared to "0". 0" Clear. Thereafter, the setting change occurrence flag in the calculation result memory 131 is cleared to "0" (step S2609).

Next, the display output processing in this embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. 47.

If it is the calculation timing (step S2701: YES), which side of the first history memory 191 and second history memory 192 is to be stored is determined (step S2702). Specifically, if the value of the storage target flag of the calculation result memory 131 is "0", the first history memory 191 is recognized as the storage target, and if the value of the storage target flag is "1", the second history memory 191 is determined as the storage target. The history memory 192 is grasped as a storage target. Thereafter, steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed using the history information stored in the storage target history memories 191 and 192 ascertained in step S2702. By doing this, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, 41st to 42nd parameters) are calculated, and the various calculated parameters are calculated. The results are stored in the result memory 131 (step S2703). In this case, the history information is stored in both the first history memory 191 and the second history memory 192 because the setting change occurrence flag of the calculation result memory 131 is set to "1". Even if there is, various parameters are calculated using one of the history memories 191 and 192 to be stored.

If a negative determination is made in step S2701, or if the process in step S2703 is executed, display processing is executed (step S2704). The contents of the display process are the same as the display process (FIG. 31) in the first embodiment.

According to the above configuration, the first history memory 191 and the second history memory 192 are provided as the history memory 117, and when a new setting of the pachinko machine 10 is made, While the history memories 191 and 192 that were to be stored remain as storage targets, history information is also stored in the history memories 191 and 192 that are not to be stored. If a predetermined number or more of history information corresponding to the ejection of game balls from the gaming area PA is stored in the history memory 191, 192 on the side that is not the storage target, the history information is not the storage target. The history memories 191 and 192 on the side are used as storage targets as they are, and the history memories 191 and 192 on the side that were previously storage targets are cleared to "0". As a result, when a new setting is made for the setting state of the pachinko machine 10, it is possible to calculate various parameters using only the history information of games played with the newly set setting value. Become.

On the other hand, according to the above configuration, even if new settings of the setting state of the pachinko machine 10 are repeatedly made in a short period of time in order to prevent various parameters from being calculated appropriately, Memories 191 and 192 are maintained unchanged. Thereby, even if new settings of the setting state of the pachinko machine 10 are repeatedly made in a short period of time, it is possible to appropriately derive the management results of the game history up to that point.

Note that the history memory 117 is not limited to a configuration in which two memories, the first history memory 191 and the second history memory 192, are provided; A configuration may be adopted in which a first history area corresponding to the memory 191 and a second history area corresponding to the second history memory 192 are set.

Alternatively, a configuration may be adopted in which only one history memory 117 is provided. In this case, if the total number of game balls discharged from the gaming area PA exceeds a predetermined number after a new setting of the setting state of the pachinko machine 10 is performed, a new setting of the setting state of the pachinko machine 10 is performed. The configuration may be such that the history information before the timing when the setting is made is deleted, and the history information after the timing when the setting is made is stored and held without being deleted. As a result, at the timing when a predetermined number or more of history information has been accumulated after a new setting of the setting state of the pachinko machine 10 is performed, the history information before the timing when the new setting of the setting state of the pachinko machine 10 is set It becomes possible to erase information. In addition, by storing the corresponding history information in the history memory 117 at the timing when a new setting of the pachinko machine 10 is made, new settings of the setting state of the pachinko machine 10 can be stored in the history memory 117. It becomes possible to distinguish between history information before and after the timing at which the process was performed.

Furthermore, the timing of erasing the history information is limited to when the total number of game balls ejected from the gaming area PA exceeds a predetermined number after a new setting of the setting state of the pachinko machine 10 is performed. Instead, it may be the case that the number of games played after a new setting of the setting state of the pachinko machine 10 is performed is equal to or more than a predetermined number of times.

Furthermore, even if a new setting is made for the setting state of the pachinko machine 10, if the setting value has not been changed before or after, the changes in the history memories 191 and 192 to be stored as described above and the history information The history memory 191, 192 to be stored is configured so that deletion is not performed, and when a new setting is made for the setting state of the pachinko machine 10 and the setting value is changed before or after that. It is also possible to adopt a configuration in which changes are made and history information is deleted.

<Ninth embodiment>
In this embodiment, among the first to sixteenth buffers 122a to 122p of the input port 121 in the management side I/F 111, the type of the input signal is determined at the design stage of the management IC 66. This is different from the first embodiment. Furthermore, the processing configuration executed by the main CPU 63 in order to cause the management CPU 112 to specify the type of input signal is different from the first embodiment. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 48 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I/F 111 in this embodiment.

The same types of signals as in the first embodiment are input to the first to seventh buffers 122a to 122g and the sixteenth buffer 122p. Specifically, the first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a, and the first signal corresponding to the detection result of the second winning opening detection sensor 43a is input to the second buffer 122b. 2 signals are input to the third buffer 122c, a third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the fourth buffer 122d, and a fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. A signal is input, a fifth signal corresponding to the detection result of the first operating port detection sensor 46a is input to the fifth buffer 122e, and a fifth signal corresponding to the detection result of the second operating port detection sensor 47a is input to the sixth buffer 122f. The sixth signal is inputted, the seventh signal corresponding to the detection result of the outlet detection sensor 48a is inputted to the seventh buffer 122g, and the output instruction signal is inputted to the sixteenth buffer 122p.

On the other hand, in the first embodiment, the signal corresponding to the opening/closing execution mode is inputted as the eighth signal to the eighth buffer 122h, the signal corresponding to the high frequency support mode is inputted as the ninth signal to the ninth buffer 122i, The signal corresponding to the front door frame 14 is inputted as the 10th signal to the 10th buffer 122j, the signal corresponding to the start of a game round is inputted as the 11th signal to the 11th buffer 122k, and the setting value update signal is inputted to the 15th buffer 122j. However, in this embodiment, the buffers to which these signals are input are different. Specifically, a signal corresponding to the start of a game round is input to the 11th buffer 122k as a game round signal, a set value update signal is input to the 12th buffer 122l, and a signal corresponding to the opening/closing execution mode is input during the opening/closing execution mode. The signal corresponding to the high-frequency support mode is input to the 13th buffer 122m as a signal, and the signal corresponding to the front door frame 14 is input to the 15th buffer 122n as a high-frequency support mode signal. It is input to buffer 122o.

The game time signal is input to the 11th buffer 122k, the setting value update signal is input to the 12th buffer 122l, the opening/closing execution mode signal is input to the 13th buffer 122m, and the 14th buffer 122n is inputted to the 14th buffer 122n. It is determined at the design stage of the management IC 66 that the high-frequency support mode signal is input, the door open signal is input to the 15th buffer 122o, and the output instruction signal is input to the 16th buffer 122p. The management side CPU 112 can specify that the corresponding signals are input to the eleventh to sixteenth buffers 122k to 122p without receiving an instruction from the main side CPU 63. On the other hand, what types of signals are input to the first to tenth buffers 122a to 122j are not determined at the design stage of the management IC 66, and the types of these signals are determined by receiving instructions from the main CPU 63. This is specified by the management CPU 112. Similar to the first embodiment, the process for identifying the type of signal is executed when the supply of operating power to the main CPU 63 and the management CPU 112 is started.

FIG. 49 is a flowchart showing the recognition process of this embodiment executed by the main CPU 63. Note that the recognition process is executed in step S111 in the main process (FIG. 9) as in the first embodiment.

First, the recognition output counter of the main side RAM 65 is set to "10", which is the number of the first to tenth buffers 122a to 122j whose signal types are to be recognized (step S2801). After that, output processing of an identification start signal is executed (step S2802). In the output processing, the respective output states of the first signal input to the first buffer 122a, the opening/closing execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n are determined. By setting the signal to HI level, the output of the identification start signal is started. The period during which these signals are maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of these signals.

Thereafter, information on the number of outputs corresponding to the current value of the output counter for recognition in the main side RAM 65 is read from the main side ROM 64, and the read information on the number of outputs is set in the output number counter provided in the main side RAM 65 ( Step S2803). The output number counter is a counter used by the main CPU 63 to specify the number of times the type identification signal is output.

In this embodiment, when the management side CPU 112 is made to recognize the type of signal input to the first buffer 122a to the tenth buffer 122j, the number of prize balls set for the ball entering section corresponding to the type of signal is determined. The type identification signal is output the same number of times as . The management CPU 112 stores information corresponding to the number of times the type identification signal has been received for each of the first buffer 122a to tenth buffer 122j in the first to tenth correspondence areas 123a to 123j of the correspondence memory 116. . In other words, the types of signals input to the first buffer 122a to the tenth buffer 122j are understood as the number of prize balls set for the ball entering portion corresponding to the signal type.

In step S2803, if the value of the recognition output counter is one of "10", "9", and "8", "10" corresponding to the number of prize balls in the general winning hole 31 is set in the output number counter. . Further, when the value of the output counter for recognition is "7", "15" corresponding to the number of prize balls of the special electric winning device 32 is set in the output number counter. Further, when the value of the recognition output counter is "6", "1" corresponding to the number of prize balls of the first operating port 33 is set in the output number counter. Further, when the value of the output counter for recognition is "5", "1" corresponding to the number of prize balls of the second operating port 34 is set in the output number counter. In addition, when the value of the output counter for recognition is "4", even if the game ball enters the out port 24a although it corresponds to the out port 24a, the payout of the game ball is not executed, so the output number counter Set "0" to "0". Further, when the value of the recognition output counter is one of "3" to "1", the corresponding ball entry part does not exist and is blank, so the output number counter is set to "0".

Thereafter, output processing of a start trigger signal is executed (step S2804). In the output processing, output of the start trigger signal is started by setting the output state of the first signal input to the first buffer 122a to HI level. The period during which the first signal is maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the first signal.

Thereafter, on the condition that the value of the output number counter of the main side RAM 65 is not "0" (step S2805: YES), that is, on the condition that a value of 1 or more is set in the output number counter in step S2803, The process advances to step S2806. In step S2806, output processing of the type identification signal is executed. In the output process, output of the type identification signal is started by setting the output state of the second signal input to the second buffer 122b to HI level. The period during which the second signal is maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the second signal.

After that, the value of the output number counter of the main side RAM 65 is subtracted by 1 (step S2807), and it is determined whether the value of the output number counter after the 1 subtraction is "0" (step S2808). If the value of the output count counter is 1 or more (step S2808: NO), the process returns to step S2806.

If an affirmative determination is made in step S2805 or if an affirmative determination is made in step S2808, output processing of an end trigger signal is executed (step S2809). In the output process, output of the termination trigger signal is started by setting the output state of the third signal input to the third buffer 122c to HI level. The period during which the third signal is maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the third signal.

Thereafter, the value of the recognition output counter in the main side RAM 65 is subtracted by 1 (step S2810), and it is determined whether the value of the recognition output counter after the 1 subtraction is "0" (step S2811). If the value of the recognition output counter is 1 or more (step S2811: NO), the process returns to step S2803 and executes processing for recognizing the type of signal corresponding to the value of the recognition output counter after subtraction by 1. do.

On the other hand, if the value of the recognition output counter is "0" (step S2811: YES), output processing of an identification end signal is executed (step S2812). In the output processing, the respective output states of the third signal input to the third buffer 122c, the open/close execution mode signal input to the 13th buffer 122m, and the high frequency support mode signal input to the 14th buffer 122n are determined. By setting the signal to HI level, the output of the identification end signal is started. The period during which these signals are maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of these signals.

Next, the management processing in this embodiment executed by the management side CPU 112 will be described with reference to the flowchart in FIG. 50. The management process is started when the supply of operating power to the management side CPU 112 is started, as in the first embodiment.

First, it is determined whether the reception of the identification start signal from the main side CPU 63 has been completed (step S2901). If the identification start signal has not been received, the setting update recognition process is executed in step S2902, and then the process in step S2901 is executed again. The contents of the setting update recognition process are the same as those in the first embodiment.

When the reception of the identification start signal from the main side CPU 63 is completed (step S2901: YES), the value of the setting target counter in the management side RAM 114 is cleared to "0" (step S2903). Thereafter, on condition that a start trigger signal has been received from the main CPU 63 (step S2904: YES), the process advances to step S2905. In step S2905, it is determined whether a type identification signal has been received from the main CPU 63. If the type identification signal is being received (step S2905: YES), the value of the reception frequency counter provided in the management side RAM 114 is incremented by 1 (step S2906). The reception count counter is a counter for the management CPU 112 to specify the number of times the type identification signal has been received from the main CPU 63. Note that the value of the reception number counter is cleared to "0" when an affirmative determination is made in step S2904.

If a negative determination is made in step S2905, or if the process in step S2906 is executed, it is determined whether a termination trigger signal has been received from the main CPU 63 (step S2907). If the termination trigger signal has not been received (step S2907: NO), the process returns to step S2905, and if the termination trigger signal has been received (step S2907: YES), the correspondence relationship setting process is executed (step S2908). In the correspondence relationship setting process, among the first to tenth correspondence areas 123a to 123j of the correspondence memory 116, the correspondence area corresponding to the current value of the counter to be set in the management side RAM 114 is set in the reception frequency counter. Store the value that has been set. In this case, "10" corresponding to the number of prize balls in the general winning hole 31 is set in the first correspondence area 123a, second correspondence area 123b, and third correspondence area 123c, and "10" corresponding to the number of prize balls in the general winning hole 31 is set, and in the fourth correspondence area 123d. is set to "15" corresponding to the number of prize balls of the special electric winning device 32, "1" corresponding to the number of prize balls of the first operating port 33 is set to the fifth correspondence area 123e, and the sixth correspondence relationship “1” corresponding to the number of prize balls in the second operating port 34 is set in the area 123f. Further, "0" is set in the seventh to twelfth correspondence areas 123g to 123l. Thereafter, the value of the setting target counter in the management side RAM 114 is incremented by 1 (step S2909).

If a negative determination is made in step S2904, or if the process in step S2909 is executed, it is determined whether or not the reception of the identification end signal from the main CPU 63 has been completed (step S2910). If the reception of the identification end signal has not been completed (step S2910: NO), the process returns to step S2904, and on the condition that the start trigger signal is received from the main CPU 63 (step S2904: YES), the process from step S2905 onward is executed. Execute. If the reception of the identification end signal from the main CPU 63 has been completed (step S2910: YES), the history setting process of step S2911, the display output process of step S2912, and the external output process of step S2913 are repeatedly executed.

FIG. 51 is a time chart showing how information on the correspondence between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j is stored in the correspondence memory 116. 51(a) shows a period when the output state of the first signal is at HI level, FIG. 51(b) shows a period when the output state of the second signal is at HI level, and FIG. 51(c) shows a period when the output state of the second signal is at HI level. ) shows the period when the output state of the third signal is at HI level, FIG. 51(d) shows the period when the output state of the signal during opening/closing execution mode is at HI level, and FIG. 51(e) shows the period when the output state of the signal is at HI level. FIG. 51(f) shows the period in which the output state of the signal is at HI level during the high frequency support mode, and FIG. 51(g) shows the timing when the value of the reception counter of the management side RAM 114 is incremented by 1, and FIG. 51(h) shows the execution period of the identification state in which the process for identifying the correspondence relationship is executed. The timing at which the correspondence setting process (step S2908) is executed by the management CPU 112 is shown.

By starting the supply of operating power to the main CPU 63 and the management CPU 112, at timing t1, the first signal , the output states of the opening/closing execution mode signal and the high frequency support mode signal are changed from LOW level to HI level. As a result, output of the identification start signal from the main side CPU 63 to the management side CPU 112 is started. Thereafter, at timing t2, the output states of the first signal, the opening/closing execution mode signal, and the high frequency support mode signal are changed from the HI level to the LOW bell. As a result, the output of the identification start signal from the main CPU 63 to the management CPU 112 is stopped. At the timing t2, the management side CPU 112 makes an affirmative determination in step S2901 of the management process (FIG. 50), thereby entering the identification state as shown in FIG. 51(f).

Thereafter, the output state of the first signal is maintained at the HI level from timing t3 to timing t4 as shown in FIG. 51(a). As a result, a start trigger signal is output to the management CPU 112. Then, as shown in FIG. 51(b), the output state of the second signal is maintained at the HI level from the timing t5 to the timing t7. As a result, the type identification signal is output to the management CPU 112 once. In this case, at timing t6, the value of the reception count counter in the management side RAM 114 is incremented by 1, as shown in FIG. 51(g).

Thereafter, the output state of the third signal is maintained at the HI level from timing t8 to timing t10, as shown in FIG. 51(c). As a result, the end trigger signal is output to the management CPU 112. In this case, at timing t9, the management CPU 112 executes the correspondence setting process as shown in FIG. 51(h). Since the value of the reception count counter is "1" at the timing when the corresponding relationship setting process is executed, "1" is written as the correspondence relationship information in the correspondence areas 123a to 123j of the current setting target in the correspondence relationship memory 116. ” information is stored.

Thereafter, the output state of the first signal is maintained at the HI level from timing t11 to timing t12, as shown in FIG. 51(a). As a result, a start trigger signal is output to the management CPU 112. Then, as shown in FIG. 51(b), the second The output state of the signal is maintained at HI level. As a result, each type identification signal is output once to the management CPU 112. In this case, at each of timing t14, timing t17, timing t20, and timing t23, the value of the reception number counter in the management side RAM 114 is incremented by 1 as shown in FIG. 51(g).

Thereafter, the output state of the third signal is maintained at the HI level from timing t25 to timing t27, as shown in FIG. 51(c). As a result, a state is reached in which a termination trigger signal is output to the management side CPU 112. In this case, at timing t26, the management CPU 112 executes the correspondence setting process as shown in FIG. 51(h). Since the value of the reception count counter is "10" at the timing when the corresponding relationship setting process is executed, "10" is written as the correspondence relationship information in the correspondence areas 123a to 123j of the current setting target in the correspondence relationship memory 116. ” information is stored.

After that, at timing t28, as shown in FIGS. 51(c), 51(d), and 51(e), the output state of the third signal, the opening/closing execution mode signal, and the high-frequency support mode signal becomes LOW. level is changed to HI level. As a result, output of an identification end signal from the main CPU 63 to the management CPU 112 is started. Thereafter, at timing t29, the output states of the third signal, the opening/closing execution mode signal, and the high frequency support mode signal are changed from the HI level to the LOW bell. As a result, the output of the identification end signal from the main CPU 63 to the management CPU 112 is stopped. At the timing t29, the management CPU 112 makes an affirmative determination in step S2910 of the management process (FIG. 50), thereby canceling the identification state as shown in FIG. 51(f).

In addition, in this embodiment, since information on the number of prize balls is stored as correspondence information, the history information stored in the history memory 117 includes the prize ball corresponding to the entered ball part that triggered the storage of the history information. Information on the number of objects is included as correspondence information. In this configuration, if there are multiple types of ball entry parts with the same number of prize balls, it is not possible to distinguish between the ball entry parts in the history information. Specifically, since both the first operating port 33 and the second operating port 34 have one prize ball, it is difficult to distinguish between the first operating port 33 and the second operating port 34 in the history information. Can not. Under such circumstances, the number of prize balls for the first operating port 33 and the second operating port 34 may be made different. This makes it possible to distinguish between the first operating port 33 and the second operating port 34 in the historical information even in a configuration in which historical information is stored as in this embodiment.

According to the present embodiment described in detail above, not only the setting value update signal and the output instruction signal, but also information corresponding to whether a game round has started, information corresponding to whether the opening/closing execution mode is in progress, Regarding the information corresponding to whether the high-frequency support mode is in effect and the information corresponding to whether the front door frame 14 is open, the main CPU 63 confirms that the signal path corresponds to these information. The management CPU 112 can specify the correspondence relationship information without receiving the correspondence information. In this case, only the information corresponding to the detection results of each ball entry detection sensor 42a to 48a is information that requires the main CPU 63 to recognize the correspondence relationship between each information and each signal path 118a to 118j from the management CPU 112. Become. When the correspondence relationship information is to be recognized by the management side CPU 112, pulse signals of the same number as the number of prize balls corresponding to each ball entry detection sensor 42a to 48a are sent from the main side CPU 63 to the management side CPU 112 using the second signal. is output to. This makes it possible to simplify the configuration regarding transmission of correspondence information.

<Tenth embodiment>
This embodiment is different from the first embodiment in the configuration for providing information on each ball entry result to the management IC 66. Hereinafter, configurations that are different from the first embodiment will be explained. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 52 is an explanatory diagram for explaining the configuration of a signal path for inputting the detection results of each of the ball entry detection sensors 42a to 48a to the main CPU 63 and the management IC 66.

The detection result of the first winning opening detection sensor 42a is input to the main CPU 63 through the first signal path SL11. In addition, the detection result of the second winning opening detection sensor 43a is input to the main CPU 63 through the second signal path SL12. In addition, the detection result of the third winning opening detection sensor 44a is input to the main CPU 63 through the third signal path SL13. Further, the detection result of the special electric detection sensor 45a is input to the main CPU 63 through the fourth signal path SL14. Further, the detection result of the first operating port detection sensor 46a is input to the main CPU 63 through the fifth signal path SL15. Further, the detection result of the second operating port detection sensor 47a is input to the main CPU 63 through the sixth signal path SL16. Furthermore, the detection result of the outlet detection sensor 48a is input to the main CPU 63 through the seventh signal path SL17.

A first branch route SL21 is formed so as to branch from a midway position of the first signal route SL11, and the first branch route SL21 is electrically connected to the management IC 66. Further, a second branch route SL22 is formed so as to branch from a midway position of the second signal route SL12, and the second branch route SL22 is electrically connected to the management IC 66. Further, a third branch route SL23 is formed so as to branch from an intermediate position of the third signal route SL13, and the third branch route SL23 is electrically connected to the management IC 66. Further, a fourth branch route SL24 is formed so as to branch from an intermediate position of the fourth signal route SL14, and the fourth branch route SL24 is electrically connected to the management IC 66. Further, a fifth branch route SL25 is formed so as to branch from an intermediate position of the fifth signal route SL15, and the fifth branch route SL25 is electrically connected to the management IC 66. Further, a sixth branch route SL26 is formed so as to branch from a midway position of the sixth signal route SL16, and the sixth branch route SL26 is electrically connected to the management IC 66. Further, a seventh branch route SL27 is formed so as to branch from a midway position of the seventh signal route SL17, and the seventh branch route SL27 is electrically connected to the management IC 66.

With the above configuration, the detection results of each of the ball entry detection sensors 42a to 48a are input to the management IC 66 without intervening processing by the main CPU 63. As a result, the main side CPU 63 executes a process for making the management side CPU 112 recognize the ball entry results of the out hole 24a, the general winning hole 31, the special electric winning device 32, the first operating hole 33, and the second operating hole 34. Since there is no need to do this, it is possible to reduce the processing load on the main CPU 63.

Furthermore, the branch points of each of the branch paths SL21 to SL27 from each of the signal paths SL11 to SL17 exist within the MPU 62. This makes it difficult to access the branch point and each branch route SL21 to SL27 from the outside, and it is possible to prevent fraudulent activity in which an abnormal ball entry result is input only to the management IC 66. .

<Eleventh embodiment>
The present embodiment is different from the first embodiment in the configuration of a display device for displaying game history management results. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 53 is a front view of the main control device 60 in this embodiment.

In the first embodiment, the main control device 60 was provided with a first notification display device 69a, a second notification display device 69b, and a third notification display device 69c, but in this embodiment, the first notification display device 69a, the second notification display device 69b, and the third notification display device 69c were provided. A display device 201, a second notification display device 202, a third notification display device 203, and a fourth notification display device 204 are provided. These first to fourth notification display devices 201 to 204 are arranged side by side on the element mounting surface of the main control board 61.

Each of the first to fourth notification display devices 201 to 204 is a segment display device in which seven LED display segments are arranged, but the present invention is not limited to this. It may be a light emitting body, a liquid crystal display device, or an organic EL display. The first to fourth notification display devices 201 to 204 are all installed so that their display surfaces face the direction in which the element mounting surface of the main control board 61 faces, and are mounted on the opposite wall 60b of the board box 60a. covered. In this case, since the board box 60a is transparent, the display surfaces of the first to fourth notification display devices 201 to 204 housed in the board box 60a can be visually observed from outside the board box 60a. becomes possible. Furthermore, the main control device 60 is mounted on the back surface of the resin base 21 in such a manner that the opposing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10 in the board box 60a. When the main body 12 is opened to the front of the pachinko machine 10 relative to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to fourth notification display devices 201 are exposed through the opposing wall portion 60b. It becomes possible to visually check the display screen of 204 to 204.

On the display surface of the first notification display device 201, alphabets such as "A", "E", "H", "L", and "O" are displayed. On the other hand, numbers in the range of "0" to "9" are displayed on the second notification display device 202, the third notification display device 203, and the fourth notification display device 204. The game history management results are notified using the first to fourth notification display devices 201 to 204. In this case, the first notification display device 201 and the second notification display device 202 display the management result of the game history that is the target of notification (the first to eighth parameters in the first embodiment, the eleventh to 18th parameters, Displays corresponding to the types of parameters (21st to 26th parameters, 31st parameters, 41st to 42nd parameters) are performed, and the third notification display device 203 and the fourth notification display device 204 display the notification target. A display corresponding to the content of the management result of the game history of the type being played is displayed.

Specifically, the types of game history management results are the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters in the first embodiment. exists. The first notification display device 201 displays a display corresponding to the type of parameter group to be notified. Specifically, when any of the 1st to 8th parameters is targeted for notification, "A" is displayed on the first notification display device 201, and when any of the 11th to 18th parameters is targeted for notification. When the notification target is set, "E" is displayed on the first notification display device 201, and when any of the 21st to 26th parameters is the notification target, the first notification display device 201 displays 201, if any of the 31st parameters are to be notified, "L" is displayed on the first notification display device 201, and the 41st to 42nd parameters are to be notified. If it is a target, "O" is displayed on the first notification display device 201.

The second notification display device 202 displays an order corresponding to the type of game history management results to be notified among the arrangement order of the gaming history management results in the parameter group to be notified. To explain the parameter group of the first to eighth parameters as an example, when the first parameter is the target of notification, "1" is displayed on the second notification display device 202, and the second parameter is If the third parameter is targeted for notification, “2” is displayed on the second notification display device 202, and “3” is displayed on the second notification display device 202 when the third parameter is targeted for notification. is displayed, and if the fourth parameter is to be notified, "4" is displayed on the second notification display device 202, and if the fifth parameter is to be notified, "4" is displayed on the second notification display device 202. If "5" is displayed on the display device 202 and the sixth parameter is the target of notification, "6" is displayed on the second notification display device 202 and the seventh parameter is the target of notification. If there is, "7" is displayed on the second notification display device 202, and "8" is displayed on the second notification display device 202 if the eighth parameter is the notification target. Further, to explain the parameter group of the 21st to 26th parameters as an example, when the 21st parameter is the notification target, “1” is displayed on the second notification display device 202, and the 22nd When the parameter is targeted for notification, “2” is displayed on the second notification display device 202, and when the 23rd parameter is targeted for notification, “2” is displayed on the second notification display device 202. 3" is displayed, and when the 24th parameter is the target of notification, "4" is displayed on the second notification display device 202, and when the 25th parameter is the target of notification, the second “5” is displayed on the notification display device 202, and “6” is displayed on the second notification display device 202 when the 26th parameter is the notification target.

In detail, regarding the display contents of the third notification display device 203 and the fourth notification display device 204, the number corresponding to the tens place of the value obtained by multiplying the parameter to be notified by 100 is the third notification display device 203. It is displayed on the display device 203, and the number corresponding to the ones place is displayed on the fourth notification display device 204.

In the first to fourth notification display devices 201 to 204, the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters Displays corresponding to the calculation results of the parameters are sequentially switched according to a predetermined order, and after the calculation result of the 42nd parameter, which is the display target in the last order, is displayed, the first parameter, which is the display target in the first order, is displayed. The calculation result will be displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 2 seconds. On the other hand, the calculation cycle of the various parameters mentioned above in the management side CPU 112 is 51 seconds, and the number of various parameters is 25. Therefore, various parameters calculated by the management CPU 112 are to be reported on the first to fourth notification display devices 201 to 202 at least once.

In the first to fourth notification display devices 201 to 204, as in the first embodiment, not only the game history management results are notified, but also a changeable state in which the setting state of the pachinko machine 10 can be changed. , the value corresponding to the current setting value is displayed. Specifically, in the changeable state, the first to third notification display devices 201 to 203 are turned off, whereas the first to fourth notification display devices 204 arranged horizontally are located at the right end. The value corresponding to the current setting value is displayed on the fourth notification display device 204. In other words, when "Setting 1" is selected in the changeable state, "1" is displayed on the fourth notification display device 204, and when "Setting 2" is selected in the changeable state, "1" is displayed on the fourth notification display device 204. "2" is displayed on the fourth notification display device 204, and if "Setting 3" is selected in the changeable state, "3" is displayed on the fourth notification display device 204, and the change is possible. When “Setting 4” is selected in the state, “4” is displayed on the fourth notification display device 204, and when “Setting 5” is selected in the changeable state, the fourth notification display device 204 displays “4”. "5" is displayed on the display device 204, and when "setting 6" is selected in the changeable state, "6" is displayed on the fourth notification display device 204.

Next, the electrical configuration for performing various displays on the first to fourth notification display devices 201 to 204 under the control of the MPU 62 will be described. FIG. 54 is a block diagram for explaining the electrical configuration for performing various displays on the first to fourth notification display devices 201 to 204 under the control of the MPU 62.

As already explained, the main control board 61 is provided with the MPU 62 and the first to fourth notification display devices 201 to 204. Further, the main control board 61 is provided with a first display IC 205, a second display IC 206, a third display IC 207, and a fourth display IC 208.

The first display IC 205 is provided corresponding to the first notification display device 201, and is electrically connected to the MPU 62 via a signal path SL31 and electrically connected to the first notification display device 201 via a signal path SL32. It is connected. The first display IC 205 is provided with a storage buffer for storing display data received from the MPU 62, and the display control of the first notification display device 201 is performed according to the display data stored in the storage buffer, that is, each display Controls the light emission of the segment. When operating power is supplied to the first display IC 205, the display data stored in the memory buffer can be stored and held, and the display content corresponding to the stored display data is displayed on the first notification display device. 201 to continue displaying. Then, when the display data is changed by the MPU 62, the display on the first notification display device 201 is changed to the display content corresponding to the changed display data. In addition, in a situation where the display data has not been set by the MPU 62 after the supply of operating power to the first display IC 205 has started, the display data becomes all "0" data, but in this case, In this case, the first notification display device 201 is in a non-display state, that is, a light-off state.

However, the configuration is not limited to this, and by supplying backup power to the first display IC 205, the display can be performed on the first display IC 205 even when the supply of operating power to the pachinko machine 10 is stopped. It may also be configured to be able to store and retain data. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was displayed on the first notification display device 201 immediately before the supply of operating power to the pachinko machine 10 was stopped is It will be started on the first notification display device 201.

The second display IC 206 is provided corresponding to the second notification display device 202, and is electrically connected to the MPU 62 through a signal path SL33 and electrically connected to the second notification display device 202 through a signal path SL34. It is connected. The second display IC 206 is provided with a storage buffer for storing display data received from the MPU 62, and the display control of the second notification display device 202 is performed according to the display data stored in the storage buffer, that is, each display Controls the light emission of the segment. When operating power is supplied to the second display IC 206, the display data stored in the memory buffer can be stored and retained, and the display content corresponding to the stored display data is displayed on the second notification display device. 202 to continue displaying. Then, when the display data is changed by the MPU 62, the display on the second notification display device 202 is changed to the display content corresponding to the changed display data. In addition, in a situation where the display data has not been set by the MPU 62 after the supply of operating power to the second display IC 206 has started, the display data becomes all "0" data, but in this case, Then, the second notification display device 202 is in a non-display state, that is, in a light-off state.

However, the configuration is not limited to this, and by supplying backup power to the second display IC 206, the display can be displayed on the second display IC 206 even when the supply of operating power to the pachinko machine 10 is stopped. It may also be configured to be able to store and retain data. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was displayed on the second notification display device 202 immediately before the supply of operating power to the pachinko machine 10 was stopped is It will be started on the second notification display device 202.

The third display IC 207 is provided corresponding to the third notification display device 203, and is electrically connected to the MPU 62 through a signal path SL35 and electrically connected to the third notification display device 203 through a signal path SL36. It is connected. The third display IC 207 is provided with a storage buffer for storing display data received from the MPU 62, and the display control of the third notification display device 203 is performed according to the display data stored in the storage buffer, that is, each display Controls the light emission of the segment. When operating power is supplied to the third display IC 207, the display data stored in the storage buffer can be stored and held, and the display content corresponding to the stored display data is displayed on the third notification display device. 203 to continue displaying. Then, when the display data is changed by the MPU 62, the display on the third notification display device 203 is changed to the display content corresponding to the changed display data. In addition, in a situation where the display data has not been set by the MPU 62 after the supply of operating power to the third display IC 207 has started, the display data becomes all "0" data, but in this case, In this case, the third notification display device 203 is in a non-display state, that is, a light-off state.

However, the configuration is not limited to this, and by supplying backup power to the third display IC 207, the display can be displayed on the third display IC 207 even when the supply of operating power to the pachinko machine 10 is stopped. It may also be configured to be able to store and retain data. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was displayed on the third notification display device 203 immediately before the supply of operating power to the pachinko machine 10 was stopped is It will be started on the third notification display device 203.

The fourth display IC 208 is provided corresponding to the fourth notification display device 204, and is electrically connected to the MPU 62 via a signal path SL37 and electrically connected to the fourth notification display device 204 via a signal path SL38. It is connected. The fourth display IC 208 is provided with a storage buffer for storing display data received from the MPU 62, and the display control of the fourth notification display device 204 is performed according to the display data stored in the storage buffer, that is, each display Controls the light emission of the segment. When operating power is supplied to the fourth display IC 208, the display data stored in the memory buffer can be stored and retained, and the display content corresponding to the stored display data is displayed on the fourth notification display. 204 to continue displaying. Then, when the display data is changed by the MPU 62, the display on the fourth notification display device 204 is changed to the display content corresponding to the changed display data. In addition, in a situation where the display data has not been set by the MPU 62 after the supply of operating power to the fourth display IC 208 has started, the display data becomes all "0" data, but in this case, In this case, the fourth notification display device 204 is in a non-display state, that is, a light-off state.

However, the configuration is not limited to this, and by supplying backup power to the fourth display IC 208, the fourth display IC 208 can display information even when the supply of operating power to the pachinko machine 10 is stopped. It may also be configured to be able to store and retain data. In this case, when the supply of operating power to the pachinko machine 10 is started, the display that was displayed on the fourth notification display device 204 immediately before the supply of operating power to the pachinko machine 10 was stopped is It will be started on the fourth notification display device 204.

The output of display data to the first to fourth display ICs 205 to 208 is performed by the MPU 62, but output settings for the display data are performed by the main CPU 63 and the management CPU 112, respectively. That is, the main side CPU 63 executes display control of the first to fourth notification display devices 201 to 204, and the management side CPU 112 executes display control of the first to fourth notification display devices 201 to 204. In this case, the period during which the display data output setting is performed in each of the main side CPU 63 and the management side CPU 112 is adjusted so that the display data output setting is not performed at the same time. Specifically, in a changeable state in which the setting state of the pachinko machine 10 can be changed after the supply of operating power to the MPU 62 is started, the output setting of display data by the main CPU 63 is performed. In contrast, the management side CPU 112 does not perform display data output settings. On the other hand, in a state where the set value is not changeable, the management CPU 112 sets the display data to be output, but the main CPU 63 does not set the display data to output.

Note that, if the display data output setting by the main CPU 63 and the display data output setting by the management CPU 112 are performed at the same time, the display data output setting by the main CPU 63 takes priority. However, the configuration is not limited to this, and a configuration may be adopted in which the display data output settings by the management CPU 112 are prioritized.

Next, the display processing in this embodiment executed by the management CPU 112 will be described with reference to the flowchart in FIG. 55.

First, the value of the update timing counter in the management side RAM 114 is subtracted by 1 (step S3001). The update timing counter is a counter used by the management side CPU 112 to specify that it is the timing to update the display content of the game history management results on the first to fourth notification display devices 201 to 204. Thereafter, by determining whether the value of the update timing counter after subtraction by 1 is "0", it is determined whether or not it is time to update the display contents of the first to fourth notification display devices 201 to 204. is determined (step S3002).

When an affirmative determination is made in step S3002, the value of the display target counter in the management side RAM 114 is incremented by 1 (step S3003). If the value of the display target counter after adding 1 exceeds the maximum value "24" (step S3004: YES), the value of the display target counter is cleared to "0" (step S3005). The display target counter is a counter used by the management CPU 112 to specify the type of parameter to be displayed on the first to fourth notification display devices 201 to 204. The 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter, the 41st to 42nd parameters, and the display target counters "0" to "24". There is a one-to-one correspondence with the possible values. For example, when the value of the display target counter is "0", the first parameter that is the first display target becomes the display target of the first to fourth notification display devices 201 to 204, and the value of the display target counter is "24". In this case, the 42nd parameter, which is the last display target, becomes the display target of the first to fourth notification display devices 201 to 204.

If a negative determination is made in step S3004 or if the process in step S3005 is executed, display data corresponding to the type of parameter corresponding to the value of the display target counter is read from the management side ROM 113 (step S3006). Then, a setting process for display data corresponding to the first notification display device 201 is executed (step S3007), and a process for setting display data corresponding to the second notification display device 202 is executed (step S3008). For example, if the value of the display target counter is "0" and the first parameter is the display target, display data for displaying "A" on the first notification display device 201 is sent to the first display IC 205. At the same time, display data for displaying "1" on the second notification display device 202 is output to the second display IC 206. For example, if the value of the display target counter is "24" and the 42nd parameter is the display target, display data for displaying "O" on the first notification display device 201 is displayed in the first display. At the same time as being output to the IC 205, display data for displaying "2" on the second notification display device 202 is output to the second display IC 206.

Thereafter, the parameter corresponding to the value of the counter to be displayed is read from the calculation result memory 131, and the display data corresponding to the tens digit and the display data corresponding to the ones digit of the result of multiplying the read parameter by 100 are displayed. It is read from the management side ROM 113 (step S3009). Then, the display of the third notification display device 203 is controlled so that the number corresponding to the tens digit of the result is displayed (step S3010), and the fourth notification display device 203 is controlled so that the number corresponding to the ones digit is displayed. Display control is performed on the notification display device 204 (step S3011). For example, when the result of multiplying by 100 is "53", display data for displaying "5" on the third notification display device 203 is output to the third display IC 207, and at the same time, it is output to the fourth notification display device 204. Display data for displaying "3" is output to the fourth display IC 208.

Thereafter, a value corresponding to 2 seconds is set in the update timing counter of the management side RAM 114 as a value corresponding to the next update timing (step S3012).

By executing the display processing as described above, the game history management results are displayed on the first to fourth notification display devices 201 to 204. The management result of the game history is displayed regardless of whether the game is continued or not, and when the game machine main body 12 is opened with respect to the outer frame 11 and the main controller 60 is opened from the front of the pachinko machine 10. This is done regardless of whether it is visible or not. By performing the display control of the first to fourth notification display devices 201 to 204 regardless of the game situation or the state of the pachinko machine 10 in this way, the first to fourth notification display devices 201 204 can be simplified.

The display of the game history management results on the first to fourth notification display devices 201 to 204 starts after the supply of operating power to the management side CPU 112 is started and after the identification end command is received from the main side CPU 63. be done. In this case, the information stored in the calculation result memory 131 is retained even when the supply of operating power to the pachinko machine 10 is stopped, similar to the information stored in the history memory 117. Therefore, when the supply of operating power to the management CPU 112 is started, the gaming history management results calculated before the supply of operating power to the management CPU 112 is stopped are displayed.

The first to fourth display ICs 205 to 208 store and hold the display data output from the MPU 62 while operating power is supplied, and the corresponding first to fourth notification display devices 201 to 204 according to the display data control the display. Therefore, after the display of the gaming history management results has started, the first to fourth notification display devices 201 to 204 will not be turned off (that is, non-displayed), but will be turned on corresponding to some display ( In other words, the display state).

Next, the setting value update process in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 56.

First, the first to third notification display devices 201 to 203 are turned off (step S3101). Specifically, display data that is all "0" is output to the first to third display ICs 205 to 207. As a result, the display segments of the first to third notification display devices 201 to 203 are all turned off, and the first to third notification display devices 201 to 203 are placed in a non-display state. Immediately after the supply of operating power to the pachinko machine 10 is started, all the display segments of the first to fourth notification display devices 201 to 204 are off, and the first to fourth notification display devices 201 204 are in a non-display state. Therefore, step S3101 is a process for maintaining the first to third notification display devices 201 to 203 in a non-display state, and if any of the first to third notification display devices 201 to 203 are If it is in a display state, it is a process of turning it into a non-display state.

Thereafter, the setting value counter of the main side RAM 65 is set to "1" (step S3102). The setting value counter is a counter for the main CPU 63 to specify which setting value the setting state of the pachinko machine 10 is at. By setting "1" in the setting value counter, when the setting value update process is executed, the setting value becomes "setting 1" regardless of the previous setting value.

Thereafter, a process to start displaying the set value in the fourth display notification device 204 is executed (step S3103). In the setting value display start process, display data for displaying "1" is output to the fourth display IC 208. As a result, the number "1" corresponding to "Setting 1" is displayed on the fourth notification display device 204.

Thereafter, on the condition that the setting key insertion section 68a has not been turned off (step S3104: NO), it is determined whether the update button 68b has been pressed once (step S3105). Specifically, it is determined whether the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3105, the process returns to step S3104, and it is determined whether or not the setting key insertion section 68a is turned off.

If the update button 68b has been pressed once (step S3105: YES), the value of the set value counter in the main side RAM 65 is incremented by 1 (step S3106). Further, if the value of the set value counter after adding 1 exceeds "6" (step S3107: YES), the set value counter is set to "1" (step S3108). As a result, each time the update button 68b is pressed once, the set value is updated to one step higher, and if the update button 68b is pressed once in the situation of "Setting 6", it is changed to "Setting 1". I will be going back.

If a negative determination is made in step S3107, or if the process in step S3108 is executed, a process for updating the display of the set value on the fourth notification display device 204 is executed (step S3109). In the setting value display update process, display data for displaying a number corresponding to the value of the setting value counter in the main side RAM 65 is output to the fourth display IC 208. Thereby, the number corresponding to the current setting value is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process in step S3109, the process returns to step S3104, and it is determined whether or not the setting key insertion section 68a has been turned off. If the OFF operation has not been performed (step S3104: NO), the processes from step S3105 onward are executed again. If the OFF operation has been performed (step S3104: YES), a process to start displaying the management results on the first to fourth notification display devices 201 to 204 is executed (step S3110).

In the display start processing, a management result display start command is sent from the main CPU 63 to the management CPU 112. The management side CPU 112, which has received the management result display start command, executes processing for displaying the first parameter among the various parameters stored in the calculation result memory 131. The processing contents in this case are the same as steps S3006 to S3012 in the display processing (FIG. 55). As a result, a display corresponding to the first parameter calculated immediately before the operating power of the pachinko machine 10 was stopped last time is displayed on the first to fourth notification display devices 201 to 204.

Next, the display modes of the first to fourth notification display devices 201 to 204 in the case where the game history management results are displayed and the setting state of the pachinko machine 10 are updated will be explained. FIG. 57(a) is an explanatory diagram for explaining the display mode of the first to fourth notification display devices 201 to 204 when the game history management results are displayed, and FIG. 10 is an explanatory diagram for explaining the display mode of the first to fourth notification display devices 201 to 204 when the setting state of the notification device 10 is changed. FIG.

When the game history management results are displayed, at least one display segment in each of the first to fourth notification display devices 201 to 204 is in a light-emitting state, as shown in FIG. 57(a). In other words, each of the first to fourth notification display devices 201 to 204 is in a display state. This is the same regardless of which of the 1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, and 41st to 42nd parameters are to be notified. . As a result, the manager of the game hall can visually check that all of the first to fourth notification display devices 201 to 204 are in the display state, and the first to fourth notification display devices 201 to 204. It becomes possible to grasp that the game history management results are displayed.

On the other hand, when the setting state of the pachinko machine 10 is changed, all the display segments in each of the first to third notification display devices 201 to 203 are turned off, as shown in FIG. 57(b). In other words, each of the first to third notification display devices 201 to 203 is in a non-display state. Further, any one of "1" to "6" is displayed on the fourth notification display device 204. In this way, any one of "1" to "6" is displayed on the fourth notification display device 204, and each of the first to third notification display devices 201 to 203 goes into a non-display state. The manager of the game hall can understand that the display corresponding to the set value is being displayed on the first to fourth notification display devices 201 to 204, and can clearly understand the current set value. becomes possible.

Next, the manner in which the first to fourth notification display devices 201 to 204 enter the display state will be described with reference to the time charts of FIGS. 58(a) to 58(h). FIG. 58(a) shows the period of the changeable state in which the setting state of the pachinko machine 10 can be changed, and FIG. 58(b) shows the update of the setting display on the first to fourth notification display devices 201 to 204. 58(c) shows the period for displaying the game history management results on the first to fourth notification display devices 201 to 204, and FIG. 58(d) shows the period for displaying the management results of the game history on the first to fourth notification display devices 58(e) shows the period during which the first notification display device 201 is in the display state, and FIG. 58(g) shows a period in which the second notification display device 202 is in the display state, FIG. 58(h) shows a period in which the third notification display device 203 is in the display state, and FIG. This indicates the period during which the display device 204 is in the display state.

The setting state of the pachinko machine 10 is changed at timing t1 as shown in FIG. 58(a) by starting supply of operating power to the pachinko machine 10 with the setting key insertion part 68a turned on. It becomes a changeable state where it can be changed. At the timing t1, the setting display is updated as shown in FIG. 58(b), and the fourth notification display device 204 enters the display state and continues the display state as shown in FIG. 58(h). In this case, since "Setting 1" is selected, "1" is displayed on the fourth notification display device 204. On the other hand, at timing t1, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are in a non-display state, that is, all display segments are turned off. maintained.

Thereafter, by operating the update button 68b to change the set value at each of timing t2, timing t3, timing t4, and timing t5, each of these timings is changed as shown in FIG. 58(b). This is the timing to update the setting value display. In this case, as shown in FIG. 58(h), the display content of the fourth notification display device 204 is switched to the number corresponding to the changed setting value at each of these timings, but this display content switching The fourth notification display device 204 is maintained in the display state including each timing when the notification is performed. On the other hand, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are in the non-display state at each of these setting value display update timings, that is, all display devices are in the non-display state. The segment remains unlit.

Thereafter, the setting key insertion section 68a is turned off at timing t6, thereby ending the changeable state as shown in FIG. 58(a). In this case, at the timing t6, the display period of the gaming history management results starts as shown in FIG. 58(c). Specifically, display of the first parameter stored in the calculation result memory 131 is started. Therefore, at the timing t6, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are switched from the non-display state to the display state, and the fourth notification display is Although the display contents of the device 204 are changed, the display state is maintained.

Thereafter, the display of the game history management results is updated at timing t7, timing t8, timing t9, timing t10, timing t11, and timing t12, respectively, as shown in FIG. 58(d). In this case, as shown in FIGS. 58(e) to 58(h), the first to fourth notification display devices 201 to 204 change the display content corresponding to the management result of the gaming history after the update at each timing. However, all of the first to fourth notification display devices 201 to 204 are maintained in the display state, including the timing at which the display contents are switched.

According to this embodiment described in detail above, the following excellent effects are achieved.

In a configuration in which game history management results are displayed on the first to fourth notification display devices 201 to 204, in a changeable state in which the setting state of the pachinko machine 10 can be changed, a corresponding display is displayed. This is performed on the first to fourth notification display devices 201 to 204. This allows the first to fourth notification display devices 201 to 204 to be used not only as display devices for displaying game history management results, but also for displaying the corresponding display in the changeable state. .

This corresponds to the period during which game history management results are displayed on the first to fourth notification display devices 201 to 204 and the state in which setting values can be changed in the first to fourth notification display devices 201 to 204. It is distinguished from the period in which the display is made. As a result, by understanding the situation in which display is being performed on the first to fourth notification display devices 201 to 204, which display is being performed in the first to fourth notification display devices 201 to 204. It becomes possible to identify whether there is a

The first to fourth notification display devices 201 to 204 are arranged so that when a display corresponding to a setting value changeable state is displayed, the display mode is different from the display mode when the game history management result is displayed. Display controlled. Thereby, by understanding the display mode of the first to fourth notification display devices 201 to 204, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204. becomes possible.

A plurality of notification display devices 201 to 204 are provided. This makes it possible to perform a wide variety of displays corresponding to the management results of the game history. In addition, due to the presence of multiple notification display devices 201 to 204, the display format is increased depending on whether the gaming history management results are displayed or when the display corresponding to the changeable state of the setting value is displayed. It becomes possible to make the difference.

When the display corresponding to the setting value changeable state is performed, the first to third notification display devices 201 to 203, which are not in the non-display state when displaying the game history management results, are in the non-display state. As a result, by simply checking whether or not the first to third notification display devices 201 to 203 are in the non-display state, you can display the game history management results and the display corresponding to the changeable setting value state. It becomes possible to clearly specify which of these is being performed on the first to fourth notification display devices 201 to 204.

When the display corresponding to the setting value changeable state is displayed, the fourth notification display device 204 enters the display state, and the display content is the same as that of the fourth notification display device 204 when displaying the game history management results. This is the display content that can be displayed in . By making it possible for the display contents on the fourth notification display device 204 to overlap in this way, it is possible to overlap each case when the game history management results are displayed and when the display corresponding to the changeable state of the setting value is performed. This makes it possible to avoid placing restrictions on the displayed content. Furthermore, even if the display contents on the fourth notification display device 204 can overlap in this way, when the display corresponding to the setting value changeable state is performed, the display contents on the first to third notification display devices 204 may overlap. Since 201 to 203 are in a non-display state, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204.

When the game history management results are displayed, each of the first to fourth notification display devices 201 to 204 is in a display state. As a result, the display modes of the first to fourth notification display devices 201 to 204 are clearly different between when the gaming history management results are displayed and when the display corresponding to the changeable state of the setting value is displayed. becomes possible.

When the gaming history management results are displayed, the first to fourth notification display devices 201 to 204 are not maintained in a hidden state even if the type of gaming history management results to be displayed is changed. . This makes it possible to specify the gaming history management results regardless of the timing at which the first to fourth notification display devices 201 to 204 are checked in a situation where the gaming history management results are displayed. In addition, regardless of the timing at which the first to fourth notification display devices 201 to 204 are checked, the game history management results can be displayed and the setting values can be changed on the first to fourth notification display devices 201 to 204. It becomes possible to specify which of the corresponding displays is being performed.

When a display corresponding to the setting value changeable state is performed, only one of the fourth notification display devices 204 is in the display state. This makes it easier to understand whether or not a display corresponding to a setting value changeable state is being displayed.

In a configuration in which the first to fourth notification display devices 201 to 204 are arranged horizontally, a display corresponding to the changeable state of the setting value is displayed using only the fourth notification display device 204 located at the right end. It will be done. This makes it easier to understand whether or not a display corresponding to a setting value changeable state is being displayed.

When the game history management results are displayed, the first notification display device 201 and the second notification display device 202 are used to display a display corresponding to the type of game history management results to be displayed. Using the third notification display device 203 and the fourth notification display device 204, a display corresponding to the content of the game history management result is performed. This makes it easier to understand the gaming history management results. In this case, in the setting value changeable state, both the first notification display device 201 and the second notification display device 202, which display the type of game history management result, are in a non-display state. As a result, the state in which the first and second notification display devices 201 and 202 for displaying the type are not displayed corresponds to the state in which the setting value can be changed, and corresponds to the state in which the setting value can be changed. It becomes easier to understand what is being displayed.

In addition, when a display corresponding to the setting value changeable state is displayed, not only the first notification display device 201 and the second notification display device 202 that display the type of management result of the game history, but also the game The third notification display device 203 on which the contents of the history management results are displayed also goes into a non-display state. This makes it easier to understand that the display corresponding to the setting value changeable state is being displayed.

Display data is output from the MPU 62 to the first to fourth display ICs 205 to 208, and the first to fourth display ICs 205 to 208 perform predetermined displays on the first to fourth notification display devices 201 to 204 according to the display data. In this configuration, display data is stored and held in the first to fourth display ICs 205 to 208. As a result, even if execution of the process for advancing the game is stopped in the main CPU 63 due to the occurrence of a radio wave detection abnormality or a vibration detection abnormality, for example (if an affirmative determination is made in step S306), It becomes possible to maintain the display of the game history management results on the first to fourth notification display devices 201 to 204.

Note that among the first to fourth notification display devices 201 to 204, the objects that are in a non-display state (all lights out) in a changeable state in which the setting state of the pachinko machine 10 can be changed are the first to fourth notification display devices 201 to 204. The present invention is not limited to the third notification display devices 201 to 203, and may be the first and second notification display devices 201 and 202. In this case, the third notification display device 203 displays a predetermined display (for example, “5”) that is different from the current setting value, and the fourth notification display device 204 displays the current setting value. The configuration may be such that a number corresponding to the number is displayed, and the fourth notification display device 204 displays a predetermined display (for example, "5") that is different from the contents of the current setting value, and the third notification The configuration may be such that the display device 203 displays numbers corresponding to the current setting values. In addition, the first notification display device 201 and the third notification display device 203 are in a non-display state (all lights out), and the second notification display device 202 and the fourth notification display device 204 are in a display state. Alternatively, the first notification display device 201 and the fourth notification display device 204 may be in a non-display state (all lights out), and the second notification display device 202 and third notification display device 203 may be in a display state. It may be configured such that the second notification display device 202 and the third notification display device 203 are in a non-display state (all lights out), and the first notification display device 201 and the fourth notification display device 204 are displayed. The second notification display device 202 and the fourth notification display device 204 may be in a non-display state (all lights out), and the first notification display device 201 and the third notification display device 203 It may be configured such that the is displayed.

Further, in a changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be in a non-display state (all lights out), and the second notification A configuration may be adopted in which only the display device 202 is in a non-display state (all lights out), a configuration in which only the third notification display device 203 is in a non-display state (all lights out), and the fourth notification display device may be in a non-display state (all lights out). A configuration may also be adopted in which only the light 204 is in a non-display state (all lights out).

Furthermore, in the changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be in the display state, and only the second notification display device 202 may be in the display state. It is good also as a structure where only the third notification display device 203 is in the display state.

<Twelfth embodiment>
In this embodiment, the display contents of the first notification display device 201 and the second notification display device 202 in the setting value changeable state are different from the above-described eleventh embodiment. Hereinafter, configurations that are different from the eleventh embodiment described above will be explained. Note that descriptions of the same configurations as those of the eleventh embodiment will be basically omitted.

FIG. 59(a) is an explanatory diagram for explaining the configuration of the first notification display device 201, and FIG. 59(b) is an explanatory diagram for explaining the configuration of the second notification display device 202.

As shown in FIG. 59(a), the first notification display device 201 includes seven first to seventh display segments 201a to 201g. Each of the first to seventh display segments 201a to 201g is formed into a rod shape and has a light emitting body such as an LED inside. These seven first to seventh display segments 201a to 201g are arranged so that the first notification display device 201 becomes a so-called 7 segment display.

As shown in FIG. 59(b), the second notification display device 202 includes seven first to seventh display segments 202a to 202g. Each of the first to seventh display segments 202a to 202g is formed into a rod shape and has a light emitting body such as an LED inside. These seven first to seventh display segments 202a to 202g are arranged so that the second notification display device 202 becomes a so-called seven segment display.

FIG. 60 shows a case where the management results of the game history are displayed on the first to fourth notification display devices 201 to 204 and a case where the setting state of the pachinko machine 10 is displayed in a changeable state where the setting state can be changed. FIG. 2 is an explanatory diagram for explaining the display contents of the first notification display device 201 and the second notification display device 202 in FIG.

The display contents of the first notification display device 201 and the second notification display device 202 when displaying the game history management results are the same as those in the eleventh embodiment. Therefore, the first notification display device 201 displays “A”, “E”, “H”, “L”, or “O”, and the second notification display device 202 displays “1” to “8”. ” will be displayed.

In this case, each of the first to seventh display segments 201a to 201g of the first notification display device 201 is “A”, “E”, “H”, “L”, It becomes a light emitting target in at least one type of display of "O". In other words, regardless of whether "A", "E", "H", "L", or "O" is displayed on the first notification display device 201, the display segments 201a to 201g that are not subject to light emission are Doesn't exist.

Similarly, regarding the second notification display device 202, each of the first to seventh display segments 202a to 202g of the second notification display device 202 corresponds to “1” to “8” in the second notification display device 202. The light is emitted in at least one type of display among the displays. In other words, even when displaying any of "1" to "8" on the second notification display device 202, there are no display segments 202a to 202g that are not subject to light emission.

In the changeable state in which the setting state of the pachinko machine 10 can be changed, the second display segment 201b and the fifth display segment 201e of the first notification display device 201 are in a light emitting state. As already explained, the second display segment 201b and the fifth display segment 201e can be in a light-emitting state when the first notification display device 201 displays the game history management results. Furthermore, in any case where the game history management results are displayed on the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in a light emitting state. On the other hand, among the first to seventh display segments 201a to 201g, only the second display segment 201b and the fifth display segment 201e are in a light emitting state.The display content of the first notification display device 201 is the management of game history. Does not exist when displaying results. As a result, in the setting value changeable state, display segments 201b and 201e that can be in a light emitting state when displaying the management results of the gaming history are used, but the display is not displayed when displaying the management results of the gaming history. It becomes possible to display the mode on the first notification display device 201. Therefore, it is possible to cause the first notification display device 201 to display a display corresponding to the changeable state of the setting value while also using the display segments 201a to 201g used when displaying the management results of the game history. It becomes possible.

In the setting value changeable state, the third display segment 202c of the second notification display device 202 is in a light emitting state. As already explained, the third display segment 202c can be in a light emitting state when the second notification display device 202 displays the game history management results. On the other hand, the display content of the second notification display device 202 in which only the third display segment 202c among the first to seventh display segments 202a to 202g is in a light emitting state exists when displaying the management results of game history. I haven't. As a result, while the display segment 202c that can be in a light emitting state when displaying the management results of gaming history in the setting value changeable state is used, a display mode that is not displayed when displaying the management results of gaming history can be used. It becomes possible to display it on the second notification display device 202. Therefore, it is possible to cause the second notification display device 202 to display a display corresponding to the changeable state of the setting value while also using the display segments 202a to 202g used when displaying the management results of the game history. It becomes possible.

Next, the setting value update process in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 61.

First, a process to start displaying set values on the first and second notification display devices 201 and 202 is executed (step S3201). Specifically, in the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in a light emitting state, and the other display segments 201a, 201c, 201d, 201f, and 201g are in a light-off state. This display data is output to the first display IC 205. Further, regarding the second notification display device 202, display data is outputted to the second display IC 206 such that the third display segment 202c is in a light-emitting state and the other display segments 202a, 202b, 202d to 202g are in a light-off state. As a result, a display is started on the first notification display device 201 and the second notification display device 202 to notify that the pachinko machine 10 is in a changeable state in which the setting state can be changed.

Thereafter, a process of turning off the third notification display device 203 is executed (step S3202). Specifically, display data that is all "0" is output to the third display IC 207. As a result, all the display segments of the third notification display device 203 are turned off, and the third notification display device 203 is in a non-display state.

Thereafter, the set value counter of the main side RAM 65 is set to "1" (step S3203). The setting value counter is a counter used by the main CPU 63 to specify which setting value the setting state of the pachinko machine 10 is at. By setting "1" to the setting value counter, when the setting value update process is executed, the setting value becomes "setting 1" regardless of the previous setting value.

Thereafter, a process to start displaying the set value on the fourth notification display device 204 is executed (step S3204). In the setting value display start process, display data for displaying "1" is output to the fourth display IC 208. As a result, the number "1" corresponding to "Setting 1" is displayed on the fourth notification display device 204.

Thereafter, on the condition that the setting key insertion section 68a has not been turned off (step S3205: NO), it is determined whether the update button 68b has been pressed once (step S3206). Specifically, it is determined whether the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3206, the process returns to step S3205, and it is determined whether or not the setting key insertion section 68a is turned off.

If the update button 68b has been pressed once (step S3206: YES), the value of the set value counter in the main side RAM 65 is incremented by 1 (step S3207). Further, if the value of the set value counter after adding 1 exceeds "6" (step S3208: YES), the set value counter is set to "1" (step S3209). As a result, each time the update button 68b is pressed once, the set value is updated to one step higher, and if the update button 68b is pressed once in the situation of "Setting 6", it is changed to "Setting 1". I will be going back.

When a negative determination is made in step S3208, or when the process in step S3209 is executed, a process for updating the display of the set value on the fourth notification display device 204 is executed (step S3210). In the setting value display update process, display data for displaying a number corresponding to the value of the setting value counter in the main side RAM 65 is output to the fourth display IC 208. Thereby, the number corresponding to the current setting value is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process in step S3210, the process returns to step S3205, and it is determined whether or not the setting key insertion section 68a has been turned off. If the OFF operation has not been performed (step S3205: NO), the processes from step S3206 onwards are executed again. If the OFF operation has been performed (step S3205: YES), a process to start displaying the management results on the first to fourth notification display devices 201 to 204 is executed (step S3211).

In the display start processing, a management result display start command is sent from the main CPU 63 to the management CPU 112. The management side CPU 112, which has received the management result display start command, executes processing for displaying the first parameter among the various parameters stored in the calculation result memory 131. The processing contents in this case are the same as steps S3006 to S3012 in the display processing (FIG. 55). As a result, a display corresponding to the first parameter calculated immediately before the operating power of the pachinko machine 10 was stopped last time is displayed on the first to fourth notification display devices 201 to 204.

According to this embodiment described in detail above, the following excellent effects are achieved.

Setting values can be changed by setting the display segments 201a to 201g, 202a to 202g of the first and second notification display devices 201 and 202, which can be in a light emitting state when the game history management results are displayed, to a light emitting state. A display corresponding to the status is displayed. As a result, in order to diversify the display of the gaming history management results, it is possible to minimize restrictions on the content of the display corresponding to the gaming history management results. On the other hand, for each of the first notification display device 201 and the second notification display device 202, display segments 201a to 201g, 202a to 202a, which are in a light emitting state when a display corresponding to a setting value changeable state is performed. The combination 202g does not exist when the game history management results are displayed. As a result, by understanding the combinations of the display segments 201a to 201g and 202a to 202g that are in a light emitting state for each of the first notification display device 201 and the second notification display device 202, the game history management results are displayed. It becomes possible to grasp which display is being performed among the display corresponding to the changeable state of the setting value.

Regarding each of the first notification display device 201 and the second notification display device 202, there are display segments 201a to 201g and 202a to 202g that do not emit light even if all patterns of game history management results are displayed. I haven't. This makes it possible to minimize restrictions on the display contents of the gaming history management results in order to diversify the display corresponding to the gaming history management results.

When the display corresponding to the setting value changeable state is performed, the third notification display device 203, which does not go into the non-display state when displaying the game history management result, becomes the non-display state. As a result, by checking not only the display contents of the first notification display device 201 and the second notification display device 202, but also whether or not the third notification display device 203 is in a non-display state, the game history It becomes possible to clearly specify which of the display of the management result and the display corresponding to the changeable state of the set value is being performed on the first to fourth notification display devices 201 to 204.

Note that this configuration is limited to a configuration in which only one type of display content corresponding to a changeable state in which the setting state of the pachinko machine 10 can be changed on the first and second notification display devices 201 and 202 is set. The configuration may be such that multiple types are set. In this case, the display order of the plurality of types of display contents is determined in advance, and each time the changeable state is newly executed, the display contents to be displayed may be changed according to the display order. Even if there are multiple types of display contents corresponding to the changeable state of the setting value in this way, these display contents are displayed in the display segment 201a which becomes a light emitting state when displaying the management results of the game history. 201g, 202a to 202g, and the display content is not displayed when the game history management results are displayed.

In addition, in one of the cases where the management results of the game history are displayed and the display corresponding to the changeable state in which the setting state of the pachinko machine 10 can be changed, the first and second notification display devices are used. A configuration may be adopted in which a blinking display is performed in 201 and 202, and a display that remains lit is performed in the other. In this case, the administrator of the game hall can specify whether the game history management result display or the display corresponding to the changeable state is displayed depending on whether the display is blinking or lit. The combination of the display segments 201a to 201g and 202a to 202g that are in the light emitting state in the display corresponding to the possible state may be a combination used when displaying the management results of the gaming history. It may be a combination that is not used when displaying the results. Further, the lighting period and the lights-out period in the blinking display may be the same in the first notification display device 201 and the second notification display device 202, or may be completely different from each other. , it is also possible to have a configuration in which only some parts overlap.

<Thirteenth embodiment>
This embodiment differs from the eleventh embodiment in that when an abnormal state occurs in the pachinko machine 10, a corresponding display is made using the first to fourth notification display devices 201 to 204. There is. Hereinafter, configurations that are different from the eleventh embodiment described above will be explained. Note that descriptions of the same configurations as those of the eleventh embodiment will be basically omitted.

FIG. 62 is an explanatory diagram for explaining the configuration of the abnormality display area 211 provided in the main side RAM 65.

The abnormality display area 211 is an area for storing abnormal state information to be displayed on the first to fourth notification display devices 201 to 204. The abnormality display area 211 is provided with a plurality of unit areas 211a to 211d. Specifically, a first unit area 211a, a second unit area 211b, a third unit area 211c, and a fourth unit area 211d are provided. It is possible to store one piece of information about the abnormal state of the pachinko machine 10 in each of the first to fourth unit areas 211a to 211d. In other words, the abnormality display area 211 can store and hold up to four pieces of information about abnormal states of the pachinko machine 10.

Here, in this embodiment, all information regarding abnormal conditions occurring in the pachinko machine 10 is specified by the main CPU 63. For example, if an abnormality regarding the payout of game balls (for example, the lower tray 56a is full, there are no balls in the tank 75, or an abnormality in the payout device 76) occurs, a command corresponding to the abnormality that has occurred is sent to the payout side CPU 92. The information is transmitted from the host CPU 63 to the main CPU 63. In addition, the pachinko machine 10 is provided with a radio wave detection sensor and a vibration detection sensor (not shown), and when the radio wave detection sensor detects an unauthorized radio wave, a corresponding abnormality signal is sent to the main CPU 63, and an abnormality signal is sent to the main CPU 63. When the vibration detection sensor detects vibration, a corresponding abnormality signal is transmitted to the main CPU 63. Further, based on identifying that the ball entry detection sensors 42a to 49a no longer transmit normal signals, the occurrence of a disconnection abnormality in the ball entry detection sensors 42a to 49a is determined.

The number of types of abnormal states specified by the main CPU 63 is greater than the maximum number of abnormal state information that can be stored in the abnormal display area 211. Then, when a large number of abnormal states occur simultaneously, it is assumed that new abnormal information will be generated even though the maximum number of abnormal state information has already been stored in the abnormality display area 211. On the other hand, storage priority is set for abnormal state information at the setting stage of the pachinko machine 10, and in a situation where the maximum number of abnormal state information is already stored in the abnormality display area 211, a new If an abnormal state occurs in the abnormal state, information on the abnormal state with a high storage priority is left in the abnormal display area 211. This makes it possible to give priority to notification of an abnormal state with a high storage priority.

Next, the abnormality setting process executed by the main CPU 63 will be described with reference to the flowchart of FIG. 63. Note that the abnormality setting process is executed as the first process of the timer interrupt process (FIG. 11).

First, it is determined whether an abnormal display target has occurred (step S3301). The types of abnormalities to be displayed include fullness of the lower tray 56a, no balls in the tank 75, abnormality in dispensing by the dispensing device 76, abnormality in radio wave detection, abnormality in vibration detection, and disconnection abnormality in each ball entry detection sensor 42a to 49a. The number of types of abnormality display targets is greater than the number of first to fourth unit areas 211a to 211d provided in the abnormality display area 211.

If an affirmative determination is made in step S3301, whether information on the abnormal state corresponding to the abnormality display target that has occurred this time has already been stored in any of the first to fourth unit areas 211a to 211d of the abnormality display area 211. is determined (step S3302). If it has already been stored, the abnormal state information corresponding to the currently occurring abnormality display target is not stored in the abnormality display area 211. This makes it possible to prevent information on the same type of abnormal state from being stored redundantly in the abnormality display area 211.

If a negative determination is made in step S3302, it is determined whether the value of the abnormality target counter provided in the main side RAM 65 is the maximum value (specifically, "4") (step S3303). The abnormality target counter is a counter used by the main CPU 63 to specify the number of areas in which abnormal state information is stored among the first to fourth unit areas 211a to 211d in the abnormality display area 211.

If the value of the abnormality target counter is the maximum value (step S3303: YES), a priority comparison process is executed (step S3304). In the priority comparison process, first of all the abnormal state information stored in the first to fourth unit areas 211a to 211d of the abnormality display area 211, the abnormal state information having the lowest storage priority is identified. The memory priority is predetermined at the design stage of the pachinko machine 10, and specifically, the lower tray 56a is full → there are no balls in the tank 75 → abnormality in vibration detection → abnormality in dispensing by the dispensing device 76 → entering ball detection sensor 42a The storage priority increases in the order of ~49a disconnection abnormality → radio wave detection abnormality. In the priority comparison process, which of the abnormal state information with the lowest storage priority stored in the first to fourth unit areas 211a to 211d and the abnormality display target that has occurred this time has a higher storage priority. Compare and judge whether

If the storage priority of the abnormality display target that has occurred this time is lower (step S3305: NO), information on the abnormal state corresponding to the abnormality display target that has occurred this time is not stored in the abnormality display area 211. As a result, in a configuration in which the number of types of abnormality display targets is greater than the number of first to fourth unit areas 211a to 211d provided in the abnormality display area 211, information on abnormal conditions with a high storage priority can be stored. It becomes possible to leave it in the abnormality display area 211.

If the storage priority of the abnormality display target that has occurred this time is higher (step S3305: YES), a setting process for the abnormality display area 211 is executed (step S3306). In the abnormality display area 211 setting process executed when an affirmative determination is made in step S3305, the current occurrence Overwrites the abnormal state information corresponding to the abnormality display target.

On the other hand, if the value of the abnormality target counter in the main side RAM 65 has not reached the maximum value (step S3303: NO), after adding 1 to the value of the abnormality target counter (step S3307), the setting process of the abnormality display area 211 is performed. (Step S3306). In this setting process, one area is selected from among the unit areas 211a to 211d in which abnormal state information is not stored in the abnormal display area 211, and the abnormal state corresponding to the abnormality display target that has occurred this time is displayed in the selected area. Stores information about.

Note that in step S3306, if there is only one abnormal state information stored in the abnormal display area 211, the abnormal state information is stored in the first unit area 211a, and the abnormal state information stored in the abnormal display area 211 is stored in the first unit area 211a. If there is a plurality of pieces of abnormal state information stored in , the abnormal state information is stored in order from the area with the smallest value of "n" in the n-th unit areas 211a to 211b.

In the abnormality setting process, it is determined whether a cancellation event of the abnormality display target has occurred (step S3308). For example, it is determined whether a command indicating that the lower tray 56a is no longer full, that the tank 75 is no longer filled with balls, or that the dispensing abnormality caused by the dispensing device 76 has been received from the dispensing side CPU 92. judge. In addition, whether or not an abnormality release operation was performed in response to the occurrence of a radio wave detection abnormality, whether or not an abnormality release operation was performed in response to the occurrence of a vibration detection abnormality, or whether an abnormality release operation was performed in response to the occurrence of a disconnection abnormality. judge.

If an affirmative determination is made in step S3308, a process of erasing the abnormality display area 211 is executed (step S3309). In this erasing process, it is determined whether or not information on the abnormal state corresponding to the abnormality display target that has been canceled this time is stored in any of the first to fourth unit areas 211a to 211d of the abnormality display area 211. , if it is stored, clear the area where it is stored to "0" to erase the information on the abnormal state. In this case, if there is only one piece of abnormal state information stored in the abnormality display area 211 after erasing, that abnormal state information is stored in the first unit area 211a, and after erasing, the abnormal state information is stored in the first unit area 211a. If there is a plurality of pieces of abnormal state information stored in the display area 211, the abnormal state information is stored in order from the area with the smallest value of "n" in the nth unit areas 211a to 211b. Further, the value of the abnormality target counter in the main side RAM 65 is subtracted by 1 (step S3310).

In the abnormality setting process, it is determined whether an operation to start abnormality display has occurred (step S3311). The operation to start displaying the abnormality is performed by pressing the update button 68b while opening the game machine main body 12 forward with respect to the outer frame 11 in a situation where the pachinko machine 10 is not in a changeable state in which the setting state can be changed. This is done through manipulation.

When an affirmative determination is made in step S3311, it is determined whether information on one or more abnormal conditions is stored in the abnormality display area 211 (step S3312). If abnormal state information is not stored, abnormality display on the first to fourth notification display devices 201 to 204 is not started. This makes it possible to prevent abnormality display from starting even though there is no abnormality information to be reported.

When an affirmative determination is made in step S3312, the abnormality displaying flag provided in the main side RAM 65 is set to "1" (step S3313). The abnormality displaying flag stops the display corresponding to the management result of the game history and starts the display corresponding to the abnormal state information stored in the abnormality display area 211 on the first to fourth notification display devices 201 to 204. This is a flag used by the main CPU 63 to specify that the current situation is such that it should be carried out in the next step. Note that even if the abnormality display start operation is performed in a situation where the abnormality display flag has already been set to "1", a negative determination is made in step S3311.

Thereafter, a setting process for canceling the display of management results is executed (step S3314). In the cancellation setting process, a display cancellation command is sent to the management CPU 112 to temporarily stop updating the display of the game history management results on the first to fourth notification display devices 201 to 204. Upon receiving the display stop command, the management side CPU 112 stops execution of the display process (FIG. 55). However, even if the management CPU 112 receives the display stop command, it does not set display data that is all "0" data in the first to fourth display ICs 205 to 208. Therefore, until the display data is sent from the main side CPU 63 to the first to fourth display ICs 205 to 208, the display of the game history management results at that point will continue on the first to fourth notification display devices 201 to 204. Ru.

In the abnormality setting process, it is determined whether an operation to end abnormality display has occurred (step S3315). To terminate the abnormality display, press the reset button 68c with the gaming machine main body 12 opened forward relative to the outer frame 11 in a situation where the pachinko machine 10 is not in a changeable state where the setting state can be changed. This is done through manipulation. When an affirmative determination is made in step S3315, the abnormality display flag in the main side RAM 65 is cleared to "0" (step S3316). Note that even if the abnormal display termination operation is performed in a situation where the value of the abnormal display flag is already "0", a negative determination is made in step S3315.

Thereafter, a process for canceling the display of management results is executed (step S3317). In the cancellation cancellation process, by transmitting a cancellation cancellation command to the management CPU 112, it is possible to confirm that the update of the display of the game history management results on the first to fourth notification display devices 201 to 204 has been canceled. unlock. Upon receiving the cancellation cancellation command, the management CPU 112 resumes execution of the display process (FIG. 55). However, even if the management side CPU 112 receives the cancellation cancellation command, it does not set display data that is all "0" data in the first to fourth display ICs 205 to 208. Therefore, until the display data is transmitted from the management CPU 112 to the first to fourth display ICs 205 to 208, the abnormality display at that point continues on the first to fourth notification display devices 201 to 204. In addition, the management CPU 112 continues to store history information and calculate various parameters even when updating of the display of game history management results is stopped, and the results of calculating various parameters are It is stored in the result memory 131. Therefore, when the state in which the update of the display of the gaming history management results is canceled is canceled, the display of the most recent gaming history management results will be immediately displayed on the first to fourth notification display devices 201 to 204. It will be restarted.

In the abnormality setting process, if the abnormality display flag in the main side RAM 65 is set to "1" (step S3318: YES), an abnormality display process is executed (step S3319). FIG. 64 is a flowchart showing abnormality display processing.

First, a process of turning off the first and second notification display devices 201 and 202 is executed (step S3401). Specifically, display data that is all "0" is output to the first and second display ICs 205 and 206. As a result, all display segments of the first and second notification display devices 201 and 202 are turned off, and the first and second notification display devices 201 and 202 are in a non-display state.

Thereafter, the value of the update timing counter provided in the main side RAM 65 is subtracted by 1 (step S3402). The update timing counter is a counter for the main CPU 63 to specify that it is the timing to update the display contents of the abnormal display on the first to fourth notification display devices 201 to 204. Note that if the value of the update timing counter is already "0", that state is maintained. Thereafter, by determining whether the value of the update timing counter is "0", it is determined whether it is time to update the display contents of the first to fourth notification display devices 201 to 204 ( Step S3403).

When an affirmative determination is made in step S3403, updating processing of a display target counter provided in the main side RAM 65 is executed (step S3404). In the update process, if this is the first abnormality display process after the abnormality display flag in the main RAM 65 is set to "1", the display target counter is set to "0". The value of the display target counter corresponds to the first to fourth unit areas 211a to 211d of the abnormality display area 211. Specifically, the value of "0" of the display target counter corresponds to the first unit area 211a. The value "1" of the display target counter corresponds to the second unit area 211b, the value "2" of the display target counter corresponds to the third unit area 211c, and the value "3" of the display target counter corresponds to the second unit area 211b. ” corresponds to the fourth unit area 211d. In the update process, if this is not the first abnormality display process after the abnormality display flag in the main side RAM 65 is set to "1", the value of the display target counter is incremented by one.

Thereafter, it is determined whether abnormal state information is stored in the area corresponding to the current value of the display target counter among the first to fourth unit areas 211a to 211d (step S3405). Here, as already explained, when only one piece of abnormal state information is stored, that abnormal state information is stored in the first unit area 211a, and a plurality of pieces of abnormal state information are stored. In this case, abnormal state information is stored in order from the area with the smallest value of "n" in the n-th unit areas 211a to 211b. Therefore, if abnormal state information is not stored in the area corresponding to the current value of the display target counter, abnormal state information is also stored in the area corresponding to a value larger than the value of the display target counter. There will be no. In addition, if the value of the display target counter after adding 1 exceeds the maximum value of "3", the corresponding area does not exist in the first place, so the abnormal state information is treated as not being stored. .

If an affirmative determination is made in step S3405, the value of the display target counter in the main side RAM 65 is cleared to "0" (step S3406). Here, in a situation where an abnormality display is being performed, it is assumed that all the abnormal conditions that are the target of the abnormality display are canceled. In this case, even in a situation where the abnormality display process is executed, no abnormal state information is stored in the abnormality display area 211. In such a situation, the third and fourth notification display devices 203 and 204 display a message indicating that no abnormal state information is stored.

If a negative determination is made in step S3405, or if the process in step S3406 is executed, display data to be displayed corresponding to the value of the display target counter in the main RAM 65 is read from the main ROM 64 (step S3407). Specifically, the information stored in the area corresponding to the value of the display target counter of the main side RAM 65 among the first to fourth unit areas 211a to 211d of the abnormality display area 211 is read out. Then, display data corresponding to the information is read from the main ROM 64. The display data is set in one-to-one correspondence with the abnormal state information, and the display contents of the third and fourth notification display devices 203 and 204 based on the display data are set for each type of abnormal state information. They are different. Further, there is also display data corresponding to the absence of abnormal state information, and this display data is different from display data corresponding to abnormal state information. Therefore, when abnormal state information does not exist, the display content of the third and fourth notification display devices 203 and 204 becomes different from the display content when abnormal state information exists.

On the other hand, the display contents of the display corresponding to the abnormal state information and the display contents of the display corresponding to the absence of abnormal state information on the third and fourth notification display devices 203 and 204 are This overlaps with the display content when the game history management results are displayed on the fourth notification display devices 203 and 204 and the display content of the setting value on the fourth notification display device 204. On the other hand, when displaying the game history management results, all of the first to fourth notification display devices 201 to 204 are in the display state, and the setting state of the pachinko machine 10 can be changed. In this state, the first to third notification display devices 201 to 203 are in a non-display state, and the fourth notification display device 204 is in a display state, and when an abnormality is displayed, the first and second notification display devices are in a non-display state. 201 and 202 go into a non-display state, and the third and fourth notification display devices 203 and 204 go into a display state, so even if the display contents overlap as described above, it corresponds to either situation. It becomes possible for the manager of the game hall to understand whether the information is displayed or not.

Thereafter, the display of the third notification display device 203 is controlled according to the display data read out in step S3407 (step S3408), and the display of the fourth notification display device 204 is controlled (step S3409). In this case, whether the display corresponding to the abnormal state information or the case where the display corresponding to the absence of abnormal state information is performed, the third notification display device 203 and the fourth notification display device 203 None of the display devices 204 are in a non-display state (that is, they are not in a completely off state), but are in some display state.

Thereafter, a value corresponding to 2 seconds is set in the update timing counter of the main side RAM 65 as a value corresponding to the next update timing (step S3410).

According to this embodiment described in detail above, the following excellent effects are achieved.

In a configuration in which game history management results are displayed on the first to fourth notification display devices 201 to 204, a display corresponding to an abnormal state of the pachinko machine 10 is displayed on the first to fourth notification display devices 201 to 204. will be carried out. This allows the first to fourth notification display devices 201 to 204 to be used not only as display devices for displaying game history management results but also as display devices for displaying abnormal conditions.

When causing the first to fourth notification display devices 201 to 204 to display a display corresponding to the abnormal condition when no abnormal condition has occurred in the pachinko machine 10, the first to fourth notification display devices 201 to 204 A display corresponding to the fact that no abnormal condition has occurred is displayed. This makes it possible to clearly identify whether or not an abnormal state has occurred in the pachinko machine 10 by checking the first to fourth notification display devices 201 to 204.

The period during which game history management results are displayed on the first to fourth notification display devices 201 to 204, and the display corresponding to the abnormal state of the pachinko machine 10 is displayed on the first to fourth notification display devices 201 to 204. It is distinguished from the period in which As a result, by understanding the situation in which display is being performed on the first to fourth notification display devices 201 to 204, which display is being performed in the first to fourth notification display devices 201 to 204. It becomes possible to identify whether there is a

The first to fourth notification display devices 201 to 204 are arranged so that when a display corresponding to an abnormal state of the pachinko machine 10 is displayed, the display mode is different from the display mode when the game history management results are displayed. Display controlled. Thereby, by understanding the display modes of the first to fourth notification display devices 201 to 204, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204. becomes possible.

A plurality of notification display devices 201 to 204 are provided. This makes it possible to perform a wide variety of displays corresponding to the management results of the game history. In addition, due to the presence of multiple notification display devices 201 to 204, the display mode can be made larger depending on whether the game history management results are displayed or when a display corresponding to an abnormal state of the pachinko machine 10 is displayed. It becomes possible to make the difference.

When a display corresponding to an abnormal state of the pachinko machine 10 is performed, the first and second notification display devices 201 and 202, which are not in a non-display state when displaying the game history management results, become a non-display state. As a result, by simply checking whether the first and second notification display devices 201 and 202 are in the non-display state, the management results of the game history and the display corresponding to the abnormal state of the pachinko machine 10 can be displayed. It becomes possible to clearly specify which of these is being performed on the first to fourth notification display devices 201 to 204.

When a display corresponding to an abnormal state of the pachinko machine 10 is displayed, the third and fourth notification display devices 203 and 204 are in a display state, and the display content is , the display contents that can be displayed on the fourth notification display devices 203 and 204. By making it possible for the display contents on the third and fourth notification display devices 203 and 204 to overlap in this way, when the game history management results are displayed, the display corresponding to the abnormal state of the pachinko machine 10 is It becomes possible to avoid imposing restrictions on the display contents when the display is performed. Furthermore, even if the display contents on the third and fourth notification display devices 203 and 204 can overlap in this way, when a display corresponding to an abnormal state of the pachinko machine 10 is displayed, the first and fourth notification display devices 203 and 204 Since the second notification display devices 201 and 202 are in a non-display state, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204.

Note that if the abnormality display start operation is performed in a situation where no abnormality information is stored in the abnormality display area 211, the abnormality information will be displayed on the first to fourth notification display devices 201 to 204 at that point. The configuration may be such that a display corresponding to the fact that the information is not stored is displayed.

<Fourteenth embodiment>
This embodiment is different from the first embodiment in the processing configuration of the management output processing executed by the main CPU 63. Hereinafter, configurations that are different from the first embodiment will be explained. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

FIG. 65 is a flowchart showing the management output process in this embodiment executed by the main CPU 63.

First, it is determined whether the management start flag provided in the main side RAM 65 is set to "1" (step S3501). The management start flag is a flag for the main CPU 63 to specify whether or not history information should be stored in the history memory 117. In this embodiment, the total number of game balls ejected from the gaming area PA after the supply of operating power to the pachinko machine 10 is started (that is, after the supply of operating power to the MPU 62 is started) is the management start standard. The history information is not stored in the history memory 117 until the number corresponds to the value or more, and when the total number of game balls ejected from the game area PA exceeds the number corresponding to the management start reference value. The storage of history information in the history memory 117 is started. At the stage of shipping the Pachinko machine 10, the operation of the Pachinko machine 10 may be checked before shipping, and at that time, game balls are placed in each ball entry section and subsequent operations are checked. In contrast, the history information is not stored in the history memory 117 until the total number of game balls ejected from the game area PA after the start of supply of operating power to the pachinko machine 10 reaches or exceeds the management start reference value. By doing so, it is possible to prevent the ball entering results and the like during the operation check as described above from being stored as history information.

If a negative determination is made in step S3501, a start management counter provided in the main side RAM 65 is set to "7" (step S3502). The start management counter indicates which of the seven ball entry detection sensors 42a to 48a is used to specify the detection state of a game ball in a situation where the management start flag is not set to "1". This is a counter for identification by the main CPU 63.

Thereafter, it is determined whether the output flag of the main side RAM 65 corresponding to the value of the start management counter is set to "1" (step S3503). Specifically, if the value of the starting management counter is "7" and corresponds to the first winning opening detection sensor 42a, it is determined whether the first output flag is set to "1". , If the value of the start time management counter is "6" and corresponds to the second winning opening detection sensor 43a, it is determined whether the second output flag is set to "1", and the start time management is performed. If the value of the counter is "5" and corresponds to the third winning opening detection sensor 44a, it is determined whether the third output flag is set to "1", and the value of the starting management counter is If it is "4" and corresponds to the special electric detection sensor 45a, it is determined whether the fourth output flag is set to "1", and if the value of the starting management counter is "3" and the first If it corresponds to the operating port detection sensor 46a, it is determined whether the fifth output flag is set to "1", and if the value of the starting management counter is "2", the second operating port detection sensor 47a, it is determined whether the sixth output flag is set to "1", and if the value of the start management counter is "1" and it corresponds to the output port 24a, determines whether the seventh output flag is set to "1". As already explained, these first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

When an affirmative determination is made in step S3503, the output flag corresponding to the value of the start management counter is cleared to "0" (step S3504). Thereafter, the value of the discharge number counter provided in the main side RAM 65 is incremented by 1 (step S3505). The ejected number counter is a counter for the main CPU 63 to specify the total number of game balls ejected from the gaming area PA in a situation where the management start flag of the main RAM 65 is not set to "1".

Thereafter, it is determined whether the value of the discharge number counter is equal to or greater than the management start reference value (step S3506). Although the management start reference value is set to "300", it is not limited to this and may be configured to have a number less than "300" or may be configured to have a number greater than "300". .

If a negative determination is made in step S3503 or if a negative determination is made in step S3506, the value of the start management counter of the main side RAM 65 is subtracted by 1 (step S3507). Then, it is determined whether or not the value of the start management counter after being subtracted by 1 is "0" (step S3508). If a negative determination is made in step S3508, the process returns to step S3503, and if an affirmative determination is made in step S3508, the main management output process is directly terminated.

On the other hand, if the value of the discharge number counter of the main side RAM 65 is equal to or greater than the management start reference value (step S3506: YES), the management start flag of the main side RAM 65 is set to "1" (step S3509). After that, management processing is executed (step S3510). Furthermore, if the management start flag is set to "1" and an affirmative determination is made in step S3501, the management process is also executed (step S3510). The processing contents of the management process are the same as steps S1001 to S1012 of the management output process (FIG. 25) in the first embodiment.

According to the above configuration, the total number of game balls ejected from the gaming area PA after the supply of operating power to the pachinko machine 10 is started (that is, after the supply of operating power to the MPU 62 is started) is managed. History information is not stored in the history memory 117 until the total number of game balls discharged from the gaming area PA reaches or exceeds the number corresponding to the management start reference value. storage of history information in the history memory 117 is started. At the stage of shipping the Pachinko machine 10, the operation of the Pachinko machine 10 may be checked before shipping, and at that time, game balls are placed in each ball entry section and subsequent operations are checked. In contrast, the history information is not stored in the history memory 117 until the total number of game balls ejected from the game area PA after the start of supply of operating power to the pachinko machine 10 reaches or exceeds the management start reference value. By doing so, it is possible to prevent the ball entering results and the like during the operation check as described above from being stored as history information.

Here, after the supply of operating power to the pachinko machine 10 is started as described above, until the total number of game balls ejected from the gaming area PA reaches or exceeds the number corresponding to the management start reference value, the history is used. In a configuration in which history information is not stored in the memory 117, it is not possible to calculate the management results of the gaming history during that time. Therefore, in such a situation, a configuration may be adopted in which the first to fourth notification display devices 201 to 204 display a display corresponding to the situation. For example, all the display segments in each of the first to fourth notification display devices 201 to 204 may be configured to be in a light emitting state. This display content is not displayed either when displaying the management results of the game history or when displaying the changeable state in which the setting state of the pachinko machine 10 can be changed. By checking the first to fourth notification display devices 201 to 204, it is possible to specify whether or not history information is not stored as described above.

Furthermore, after the supply of operating power to the pachinko machine 10 is started, the setting mode of the information of the management start flag in the main side RAM 65 differs depending on whether the setting state of the pachinko machine 10 has become changeable or not. It is also possible to have a configuration in which FIG. 66 is a flowchart showing the main processing in the other embodiment executed by the main CPU 63. Steps S3601 to S3609 execute the same processes as steps S101 to S109 of the main process (FIG. 9) in the first embodiment, and steps S3611 to S3620 execute the main process (FIG. 9) in the first embodiment. The same processing as step S110 to step S119 of 9) is executed. On the other hand, in this alternative embodiment, when an affirmative determination is made in step S3608, the management start flag of the main side RAM 65 is cleared to "0" (step S3610), and after the process of step S3620 is executed, the management start flag of the main side RAM 65 is cleared. is set to "1" (step S3621). According to this configuration, if the process for newly setting the setting state of the pachinko machine 10 is not executed, the total number of game balls ejected from the gaming area PA after the supply of operating power to the pachinko machine 10 is started. The history information is not stored in the history memory 117 until the value exceeds the management start reference value, and when a process for newly setting the setting state of the pachinko machine 10 is executed, the history information is not stored in the history memory 117 until the History information is stored in the history memory 117 regardless of the number of game balls ejected after the supply of operating power is started. This makes it possible to manage the game history immediately after the start of supply of operating power to the Pachinko machine 10 in a situation where there is a high possibility that the operation check at the time of shipping the Pachinko machine 10 does not apply.

Further, history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA reaches or exceeds the management start reference value after the supply of operating power to the pachinko machine 10 is started. Instead of a configuration in which there is no history memory 117, an area may be provided for storing history information until the total number of game balls reaches a management start reference value or more. This makes it possible to specify the gaming history management result in the situation.

Further, history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA reaches or exceeds the management start reference value after the supply of operating power to the pachinko machine 10 is started. A configuration may be adopted in which a condition in which the supply of operating power to the pachinko machine 10 is started in a situation where no history information is stored in the history memory 117 may be added as a condition for a situation where no history information is stored. In this case, if the supply of operating power to the pachinko machine 10 is started in a situation where history information has already been stored in the history memory 117, the total number of game balls ejected from the game area PA is the management start criterion. The history information will be stored in the history memory 117 from the beginning regardless of whether the value is greater than or equal to the value.

Further, history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA reaches or exceeds the management start reference value after the supply of operating power to the pachinko machine 10 is started. In addition to or in place of the configuration, if an abnormal state such as a radio wave detection abnormality or a vibration detection abnormality occurs, the history information may not be stored in the history memory 117 until the abnormal state is canceled. This makes it possible to prevent history information from being stored for events that occur in abnormal situations.

Further, history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA reaches or exceeds the management start reference value after the supply of operating power to the pachinko machine 10 is started. In addition to or in place of the configuration in which the game machine main body 12 or the front door frame 14 is open, the history information may not be stored in the history memory 117. This makes it possible to prevent history information from being stored for events that occur when the gaming machine main body 12 or the front door frame 14 is open.

<Fifteenth embodiment>
This embodiment is different from the first embodiment described above in terms of the entity that executes the processing for managing game history. Hereinafter, configurations that are different from the first embodiment will be described. Note that descriptions of the same configurations as in the first embodiment will be basically omitted.

In the first embodiment, the MPU 62 is provided with the management IC 66, but in this embodiment, the MPU 62 is not provided with the management IC 66. Although the management IC 66 is not provided, in this embodiment, the processing for managing the game history is executed by the main CPU 63. Further, in this embodiment, the main CPU 63 executes various types of control by distinguishing between specific control and non-specific control. Specifically, control related to the management of game history is defined as non-specific control, and control other than non-specific control, including control for advancing the game based on the game operation by the player, is defined as specific control.

In detail, regarding the specific control, all controls by the main process (FIG. 9) that are executed when the supply of operating power to the main CPU 63 is started are included in the specific control. Note that in this embodiment, among the main processes (FIG. 9) in the first embodiment, the recognition process (step S111), the data output process (step S112), and the setting value update signal output process (step S119) are Not executed. Further, even in this embodiment, the timer interrupt processing is periodically executed by interrupting the processing of steps S113 to S116 in the main processing (FIG. 9), and various processing of the timer interrupt processing is performed. All of the processes other than the management process described later are included in the specific control. Further, some of the management processing is also included in the specific control.

FIG. 67 is an explanatory diagram for explaining how programs and data are set in the main ROM 64. As shown in FIG. Corresponding to the fact that the control executed by the main CPU 63 is divided into specific control and non-specific control, the main ROM 64 also has a program for specific control and a program for specific control, as shown in FIG. Addresses of areas where data, non-specific control programs, and non-specific control data are stored are clearly distinguished.

Specifically, specific control programs are collectively stored in areas of consecutive addresses within the range of addresses X(1) to X(k+2). Furthermore, the addresses X(k+3) to X(k+5) that follow addresses X(1) to X(k+2) are addresses of unused areas where no data is stored, and the addresses X(k+5) that follow addresses X(1) to X(k+2) are addresses of unused areas where no data is stored. Specific control data is collectively stored in areas of consecutive addresses within the range from k+6) to X(m+2). Furthermore, the addresses X(m+3) to X(m+5) that follow addresses X(k+6) to X(m+2) are addresses of unused areas where no data is stored, and the addresses following address X( Non-specific control programs are collectively stored in areas of consecutive addresses within the range from m+6) to X(n+2). Furthermore, the addresses X(n+3) to X(n+5) that follow addresses X(m+6) to X(n+2) are addresses of unused areas where no data is stored, and the addresses X(m+6) to X(n+2) are addresses of unused areas where no data is stored. Non-specific control data is collectively stored in areas of consecutive addresses within the range from n+6) to X(p+2). Note that the relationship between the programs and data and addresses as described above is set in both the physical address in the main side ROM 64 and the logical address on the memory map recognized by the main side CPU 63.

As mentioned above, the program for specific control and the data for specific control, the program for non-specific control and the data for non-specific control, regardless of the execution order of the processing for executing the corresponding control, Because they are stored in areas with addresses in different ranges, for example, when checking only a specific control program and specific control data, the address where these specific control programs and specific control data are stored. It is only necessary to check the area within the range. For example, when checking only non-specific control programs and non-specific control data, the address where these non-specific control programs and non-specific control data are stored. You only need to check the area within the range. Therefore, it is possible to efficiently check programs and data by distinguishing between specific control and non-specific control. Additionally, it becomes possible to efficiently perform work when modifying programs and data by distinguishing between specific control and non-specific control.

No data is stored between the address range of the area where specific control programs and specific control data are stored and the address range of the area where non-specific control programs and non-specific control data are stored. By setting the address range of an unused area that has not been used, it becomes easier to grasp the boundary between the address range for specific control and the address range for non-specific control during checking work.

In each of the address range for specific control and the address range for non-specific control, programs and data are stored in areas of different ranges of addresses, regardless of the order of execution of processes for executing the corresponding control. By doing so, it becomes possible to perform the work efficiently when checking programs and data separately. Additionally, by setting the address range of an unused area where no data is stored between the address range of the area where the program is stored and the address range of the area where the data is stored, the program This makes it easier to grasp the boundary between the address range and the data address range during checking work.

FIG. 68 is an explanatory diagram for explaining the setting manner of each area in the main side RAM 65. As shown in FIG. Corresponding to the fact that the control executed by the main CPU 63 is divided into specific control and non-specific control, the main RAM 65 also has a work area 221 for specific control and a work area 221 for specific control, as shown in FIG. The address range of the stack area 222 for non-specific control and the address range of the work area 223 for non-specific control and the stack area 224 for non-specific control are clearly distinguished.

Specifically, the area of each consecutive address within the range of addresses Y(1) to Y(r+2) is set as the work area 221 for specific control. Further, addresses Y(r+3) to Y(r+5) that follow addresses Y(1) to Y(r+2) are addresses of unused areas, and addresses Y(r+6) to Y(s+2) that follow addresses Y(r+6) to Y(s+2) are addresses of unused areas. ) is set as a stack area 222 for specific control. Further, addresses Y(s+3) to Y(s+5) that follow addresses Y(r+6) to Y(s+2) are addresses of unused areas, and subsequent addresses Y(s+6) to Y(t+2) are addresses of unused areas. ) is set as a work area 223 for non-specific control. Further, addresses Y(t+3) to Y(t+5) that follow addresses Y(s+6) to Y(t+2) are addresses of unused areas, and subsequent addresses Y(t+6) to Y(u+2) are addresses of unused areas. ) is set as a stack area 224 for non-specific control. The relationship between each area and address as described above is set in both the physical address in the main side RAM 65 and the logical address on the memory map recognized by the main side CPU 63.

As described above, the work area 221 for specific control and the work area 223 for non-specific control are set separately, so that when the main CPU 63 executes specific control and when executing non-specific control, Therefore, different areas of the main RAM 65 are used when various calculations are executed. Thereby, when performing one of the specific control and non-specific control, it is possible to make it difficult for the event that information in the main side RAM 65 necessary for the other control to be erased to occur. Incidentally, when writing information to each work area 221, 223 and reading information from each work area 221, 223, the main CPU 63 issues a load command.

Since the stack area 222 for specific control and the stack area 224 for non-specific control are set separately, it is possible to Different areas of the main side RAM 65 are used when saving information stored in the register of the side CPU 63 and when storing information on a return address on the program. As a result, when one of the specific control and non-specific control is being executed, when saving information stored in the register of the main CPU 63 and when storing information on the return address on the program, it can be used in the other. This makes it possible to make it difficult for events such as information being deleted to occur. Incidentally, when writing information to each stack area 222, 224, the main CPU 63 performs a push command, and when reading information from each stack area 222, 224, the main CPU 63 performs a pop command. Furthermore, when reading information from each stack area 222, 224, the information that is written to the stack area 222, 224 later in the order of writing is read out first.

Here, when the main CPU 63 executes processing corresponding to specific control, the main CPU 63 can write information to the work area 221 for specific control and the stack area 222 for specific control, and Information can be read from the work area 221 for specific control and the stack area 222 for specific control. On the other hand, when the main CPU 63 executes processing corresponding to specific control, the main CPU 63 can read information from the work area 223 for non-specific control and the stack area 224 for non-specific control; , information cannot be written to the work area 223 for non-specific control and the stack area 224 for non-specific control. This makes it possible to prevent information used in processing corresponding to non-specific control from being accidentally deleted in a situation where processing corresponding to specific control is being executed.

Furthermore, when the main CPU 63 executes processing corresponding to non-specific control, the main CPU 63 can write information to the work area 223 for non-specific control and the stack area 224 for non-specific control. At the same time, information can be read from the work area 223 for non-specific control and the stack area 224 for non-specific control. On the other hand, when the main CPU 63 executes processing corresponding to non-specific control, although the main CPU 63 can read information from the work area 221 for specific control and the stack area 222 for specific control, Information cannot be written to the work area 221 for specific control and the stack area 222 for specific control. Thereby, in a situation where processing corresponding to non-specific control is being executed, it is possible to prevent information used in processing corresponding to specific control from being accidentally deleted.

Note that backup power will be supplied to the main side RAM 65 even after the pachinko machine 10 is powered off, but the backup power will be supplied to the work area 221 for specific control, the stack area 222 for specific control, and the non-specific control. It is supplied to all of the work area 223 for use and the stack area 224 for non-specific control. As a result, the information stored in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control is stored when the power of the pachinko machine 10 is shut off. Even afterward, the data will be retained as long as backup power is supplied.

Next, timer interrupt processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 69. As in the first embodiment, the timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes in steps S113 to S116 are being executed in the main process (FIG. 9). Note that the program corresponding to timer interrupt processing is set as a specific control program.

In steps S3701 to S3718, the same processes as steps S301 to S318 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a specific control program and specific control data. In step S3719 in the timer interrupt processing, management processing is executed. When executing management processing, the subroutine program corresponding to the management processing set in the specific control program will be executed. Information for specifying the return address of the timer interrupt processing in is written to the stack area 222 for specific control by a push instruction. When the management process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process indicated by the return address.

FIG. 70 is a flowchart showing management processing. Note that the processes from step S3801 to step S3805 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S3801). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and started in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Thereafter, the information in the flag register of the main CPU 63 is saved to the specific control stack area 222 by a push command as "PUSH PSW" (step S3802). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the subroutine program corresponding to management execution processing is started, the flag register information in the state before it changes after the subroutine is called or the relevant subroutine starts. It becomes possible to save it to the stack area 222 for specific control. Note that the amount of information in the flag register is 1 byte.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S3803). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

When returning to the management processing program after executing the management execution processing, the information in the flag register saved in the stack area 222 for specific control in step S3802 is transferred to the main CPU 63 by a pop instruction as "POP PSW". flag register (step S3804). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S3802 was executed. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which generation is permitted (step S3805). This enables new execution of timer interrupt processing.

FIG. 71 is a flowchart showing management execution processing. Note that the processes from step S3901 to step S3915 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as "LD SP, Y(u+2)", Y(u+2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S3901). The stack pointer is an area in which address information is set for the main CPU 63 to specify a storage area in the stack areas 222 and 224 to which information is to be written by a push command. Each time a push instruction is executed, the stack pointer information is updated to the address of the storage area to be written in the next order, and each time a pop instruction is executed, the stack pointer information is updated to the address of the storage area to be written in the previous order. The address information of the storage area is updated. Furthermore, when using the stack area 224 for non-specific control, the information to be stored is stored starting from the storage area at the last address in the stack area 224 for non-specific control, and each time information to be stored is added. Then, the storage area of the storage destination is changed toward the first address side in the stack area 224 for non-specific control. Therefore, in step S3901, information on the last address in the stack area 224 for non-specific control is set in the stack pointer. The same holds true for the specific control stack area 222, where information is stored from the storage area at the last address to the storage area at the first address.

By the way, if an additional push command is executed even though information has been set in all storage areas for both the stack area 222 for specific control and the stack area 224 for non-specific control, All areas of the main side RAM 65 are cleared to "0", assuming that an abnormality has occurred in the storage process. This makes it possible to prevent the game from continuing even though an abnormality has occurred in the storage process.

Thereafter, the information in the WA register of the main CPU 63 is saved to the WA buffer set in the work area 223 for non-specific control by a load instruction as "LD (_WABUF), WA" (step S3902). Further, as "LD (_BCBUF), BC", the information in the BC register of the main CPU 63 is saved to the BC buffer set in the work area 223 for non-specific control by a load instruction (step S3903). Also, “LD
(_DEBUF), DE", the information in the DE register of the main CPU 63 is saved to the DE buffer set in the work area 223 for non-specific control by a load instruction (step S3904). Further, as "LD (_HLBUF), HL", information in the HL register of the main CPU 63 is saved to the HL buffer set in the work area 223 for non-specific control by a load instruction (step S3905). Further, as "LD (_IXBUF), IX", information in the IX register of the main CPU 63 is saved to the IX buffer set in the work area 223 for non-specific control by a load instruction (step S3906). Further, as "LD (_IYBUF), IY", the information in the IY register of the main CPU 63 is saved to the IY buffer set in the work area 223 for non-specific control by a load instruction (step S3907).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag register described above. In this case, in steps S3902 to S3907, each information of the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, is is saved in a corresponding buffer in the work area 223 for non-specific control. Note that the information amount of the WA register, BC register, DE register, HL register, IX register, and IY register is all 2 bytes.

These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in the check process (step S3908), which is a process corresponding to non-specific control. By saving the information set in such registers to the work area 223 for non-specific control before executing the check process (step S3908), the information in these registers that was used for specific control can be used for non-specific control. This makes it possible to evacuate the area before it starts. Therefore, even if these registers are overwritten during non-specific control, the status of these registers can be changed by restoring the information saved in the work area 223 for non-specific control to these registers when terminating non-specific control. It becomes possible to restore the state to the state corresponding to the specific control before the non-specific control was executed.

In addition, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers to the work area 223 for non-specific control, WA Register information is saved in the work area 223 for non-specific control by selectively saving the information of the registers, BC register, DE register, HL register, IX register, and IY register to the work area 223 for non-specific control. This makes it possible to reduce the amount of capacity secured for this purpose. Therefore, it is possible to save the register information as described above while ensuring a large capacity of the work area 223 for non-specific control that can be used during the check process. Of course, among the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63, registers other than the WA register, BC register, DE register, HL register, IX register, and IY register support non-specific control. The information set before the start of the process is stored and held until the process corresponding to the non-specific control is finished and the process corresponding to the specific control is restarted.

Furthermore, by saving register information to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be kept small. It becomes possible. Furthermore, when using the stack area 224 for non-specific control, as described above, the information is written in the order in which the later information is read out first, so if the order in which the information is read is shifted due to some kind of noise, etc. If this happens, all subsequent reading order information will be restored to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. In contrast, by saving register information to the work area 223 for non-specific control, it is possible to prevent the above-mentioned phenomenon from occurring even when there is a large amount of information to be saved. .

After executing the processes of steps S3902 to S3907, a check process is executed (step S3908). When executing a check process, a subroutine program corresponding to the check process set in the non-specific control program will be executed, but when executing the subroutine program, management after execution of the check process will be executed. Information for specifying the return address of the execution process is written to the stack area 224 for non-specific control by a push instruction. When the check process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management execution process indicated by the return address. Details of the check process will be explained later.

After executing the check process, Y(r+α) is set as a fixed address at the time of returning to the specific control in the stack pointer of the main CPU 63 by a load instruction as "LD SP, Y(r+α)" (step S3909 ). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

The amount of information stored in the specific control stack area 222 immediately before the management execution processing subroutine is executed in step S3803 of the management processing (FIG. 70) is always constant, and accordingly, the amount of information stored in the specific control stack area 222 is always constant. Information on the stack pointer of the side CPU 63 (that is, the value of the stack pointer) is constant. In this case, the information stored in the stack area 222 for specific control includes, for example, information on the return address of the management process (FIG. 70) after the management execution process (FIG. 71) is completed, and information on the return address of the management process (FIG. 70), and For example, the return address information of the timer interrupt processing (FIG. 69) after the completion of FIG. 70) is included. The above-mentioned constant information of the stack pointer is Y(r+α). Therefore, when the check process, which is the process corresponding to non-specific control, ends and the process returns to the process corresponding to specific control, the constant information Y(r+α) is set in the stack pointer of the main CPU 63. This makes it possible to restore the information of the stack pointer to the information immediately before the process corresponding to non-specific control was started. By setting fixed information in the stack pointer in this way, the information of the stack pointer is restored to the information immediately before the process corresponding to non-specific control was started, so that the process corresponding to non-specific control can be performed. There is no need to save information on the stack pointer of the main CPU 63 corresponding to the specific control to the main RAM 65 before starting the specific control. Therefore, it is possible to reduce the processing load, and there is no need to secure an area for the evacuation in the main RAM 65.

Thereafter, the information saved in the WA buffer of the work area 223 for non-specific control is overwritten in the WA register of the main CPU 63 by a load instruction as "LD WA, (_WABUF)" (step S3910). Also, as "LD BC, (_BCBUF)", the information saved in the BC buffer of the non-specific control work area 223 is overwritten in the BC register of the main CPU 63 by the load instruction (step S3911). Furthermore, as "LD DE, (_DEBUF)", the information saved in the DE buffer of the work area 223 for non-specific control is overwritten in the DE register of the main CPU 63 by the load instruction (step S3912). Further, as "LD HL, (_HLBUF)", the information saved in the HL buffer of the work area 223 for non-specific control is overwritten in the HL register of the main CPU 63 by the load instruction (step S3913). Further, as "LD IX, (_IXBUF)", the information saved in the IX buffer of the work area 223 for non-specific control is overwritten in the IX register of the main CPU 63 by the load instruction (step S3914). Furthermore, as "LD IY, (_IYBUF)", the information saved in the IY buffer of the work area 223 for non-specific control is overwritten in the IY register of the main CPU 63 by the load instruction (step S3915). By executing the processing from step S3910 to step S3915, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. It is possible to restore the information to the information corresponding to the specific control immediately before the control.

Here, the information stored in the flag register and various registers of the main CPU 63 when the process corresponding to non-specific control is executed is not saved to the main side RAM 65 when the process corresponding to the specific control is restarted. . Thereby, there is no need to secure a storage area for saving the above information in the work area 221 for specific control and the stack area 222 for specific control.

In addition, the information stored in the flag register and various registers of the main CPU 63 when the process corresponding to non-specific control is executed is the same as the information stored in the flag register and various registers of the main CPU 63 when the process corresponding to non-specific control is executed after returning to the process corresponding to specific control. This information is not used when restarted. In other words, the information necessary for multiple processing times of processing corresponding to non-specific control that is executed with processing corresponding to specific control in between is the work area 223 for non-specific control or the stack area for non-specific control. 224, and is not stored in the flag register and various registers of the main CPU 63. Therefore, even if the information stored in the flag register and various registers of the main CPU 63 is not saved to the main RAM 65 when processing corresponding to non-specific control is executed, the No problem occurs.

Next, a description will be given of the check processing executed when the subroutine program is called in step S3908. In the checking process, a process for collecting game history information, a process for deriving a game history management result, and a process for notifying the management result are executed. That is, the processing for collecting information on gaming history, the processing for deriving management results of gaming history, and the processing for notifying the management results are executed as processing corresponding to non-specific control.

Prior to explaining the check process, the contents of various areas 231 to 234 of the work area 223 for non-specific control used to manage the game history will be explained. FIG. 72 is an explanatory diagram for explaining various areas 231 to 234 of the work area 223 for non-specific control used to manage game history.

The work area 223 for non-specific control is provided with a normal counter area 231, an opening/closing execution mode counter area 232, and a high frequency support mode counter area 233. Each of these areas 231 to 233 includes general winning counters 231a, 232a, 233a, special electric winning counters 231b, 232b, 233b, first operating counters 231c, 232c, 233c, second operating counters 231d, 232d, 233d, and Out counters 231e, 232e, and 233e are provided. The general prize winning counters 231a, 232a, 233a are counters for counting the number of game balls entering the general prize winning hole 31 from a predetermined measurement start timing. The special electric winning counters 231b, 232b, and 233b are counters for counting the number of game balls entering the special electric winning device 32 from a predetermined measurement start timing. The first operation counters 231c, 232c, and 233c are counters for counting the number of game balls entering the first operation port 33 from a predetermined measurement start timing. The second operation counters 231d, 232d, and 233d are counters for counting the number of game balls entering the second operation port 34 from a predetermined measurement start timing. The out counters 231e, 232e, and 233e are counters for counting the number of game balls entering the out port 24a from a predetermined measurement start timing.

Each of the counters 231a to 231e in the normal counter area 231 corresponds to the ball entry section 24a, which is the target in a situation where the front door frame 14 is in a closed state and neither the opening/closing execution mode nor the high frequency support mode is in effect. It is used to count the number of game balls that have entered balls 31 to 34. Each of the counters 232a to 232e in the counter area 232 for the opening/closing execution mode is set to each counter 232a to 232e when the front door frame 14 is in the closed state and the opening/closing execution mode is set. It is used to count the number of game balls hit. Each of the counters 233a to 233e in the high frequency support mode counter area 233 corresponds to the target ball entry portions 24a, 31 to 34 in the high frequency support mode when the front door frame 14 is in a closed state. It is used to count the number of game balls that have entered the game.

Note that the situation where the front door frame 14 is open is not included in the measurement because a game ball enters the ball entry section 24a, 31 to 34 due to maintenance while the front door frame 14 is open. This is to exclude from the measurement object the number of balls that enter the ball when the ball is thrown. However, the present invention is not limited to this, and a configuration may be adopted in which a situation where the front door frame 14 is in an open state is also subject to measurement in the same way as a situation where the front door frame 14 is in a closed state.

The work area 223 for non-specific control is provided with a calculation result storage area 234 in addition to a normal counter area 231, an open/close execution mode counter area 232, and a high frequency support mode counter area 233. The calculation result storage area 234 is an area for storing information on game history management results calculated using the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233. . The information on the game history management results stored in the calculation result storage area 234 is stored and held until the newly calculated information is overwritten by the new calculation of the information on the game history management results.

FIG. 73 is a flowchart showing the check process executed when the subroutine program is called in step S3908. Note that the processing from step S4001 to step S4008 in the check processing, including the subroutine processing, is executed by the main CPU 63 using a non-specific control program and non-specific control data. In addition, when executing subroutine processing, information on the return address after execution of the subroutine processing is written in the storage area corresponding to the current stack pointer value of the main CPU 63 in the stack area 224 for non-specific control. At the same time, the value of the stack pointer is updated to the address information of the storage area to be stored in the next order. Furthermore, when the processing of the subroutine is completed, the information on the return address is read from the storage area corresponding to the value in the previous order with respect to the current value of the stack pointer of the main CPU 63, and corresponds to the information on the return address. Upon returning to the program, the value of the stack pointer is updated to the address of the storage area from which the information at the return address was read.

In the check process, if the front door frame 14 is in an open state (step S4001: YES), normal ball entry management processing (step S4004), ball entry management processing in opening/closing execution mode (step S4005), and high frequency ball entry management processing are performed. The result calculation process (step S4007) and the display process (step S4008), which will be described later, are executed without executing any of the ball entry management processes (step S4006) in the support mode. Since the gaming area PA is formed by a space divided into the front and back by the back side of the window panel 52 provided on the front door frame 14 and the front side of the game board 24, when the front door frame 14 is in an open state, Even if the game area PA is opened forward and a game ball is fired toward the game area PA in that situation, the game ball cannot normally flow down the game area PA. In addition, if a game ball enters the ball entry portions 24a, 31 to 34 when the front door frame 14 is open, the game hall manager may This is a case where the front door frame 14 is left open and game balls enter the game ball due to maintenance or the like. Since such entering of a game ball is not an entering of a game ball in the execution situation of a regular game, it is not necessary to manage such entering of a game ball. Therefore, in the check process, if the front door frame 14 is in the open state as described above, none of the processes from step S4004 to step S4006 is executed.

If the front door frame 14 is in the closed state and neither the opening/closing execution mode nor the high-frequency support mode is in effect (steps S4001 to S4003: NO), normal ball entry management processing is executed (step S4004). Further, when the front door frame 14 is in the closed state and the opening/closing execution mode is in effect (step S4001: NO, step S4002: YES), ball entry management processing in the opening/closing execution mode is executed (step S4005). Further, when the front door frame 14 is in the closed state and the high-frequency support mode is in effect (step S4001: NO, step S4003: YES), ball entry management processing in the high-frequency support mode is executed (step S4006).

FIG. 74 is a flowchart showing normal ball entry management processing in step S4004.

If it is determined that one game ball is detected by the first winning opening detection sensor 42a (step S4101: YES), that is, the signal received from the first winning opening detection sensor 42a is switched from LOW level to HI level. If it is determined that one game ball has been detected by the second winning hole detection sensor 43a (step S4103: YES), that is, the signal received from the second winning hole detection sensor 43a When it is confirmed that has switched from LOW level to HI level, or when it is determined that one game ball has been detected by the third winning hole detection sensor 44a (step S4105: YES), that is, the third winning hole When it is confirmed that the signal received from the detection sensor 44a has switched from the LOW level to the HI level, the value of the normal general winning counter 231a is incremented by 1 (step S4102, step S4104, step S4106).

In addition, if it is the entry management process during the opening/closing execution mode, the value of the general winning counter 232a for the opening/closing execution mode is incremented by 1 as a process corresponding to step S4102, step S4104, and step S4106, and the entry management process during the high-frequency support mode is If it is a ball management process, the value of the general winning counter 233a for the high-frequency support mode is incremented by 1 as a process corresponding to steps S4102, S4104, and S4106. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) that is executed as a process corresponding to the specific control, the detection results of the first to third winning opening detection sensors 42a to 44a are monitored, When it is determined that one game ball is detected by any of the first to third winning hole detection sensors 42a to 44a, a process for paying out the number of game balls corresponding to the general winning hole 31. Execute.

If it is determined that one game ball is detected by the special electric detection sensor 45a (step S4107: YES), that is, it is confirmed that the signal received from the special electric detection sensor 45a has switched from the LOW level to the HI level. If so, 1 is added to the value of the normal special electric prize winning counter 231b (step S4108).

Note that if the ball entry management process is in the opening/closing execution mode, the value of the special electric winning counter 232b for the opening/closing execution mode is incremented by 1 as a process corresponding to step S4108, and if the ball entry management process is in the high-frequency support mode, As a process corresponding to step S4108, 1 is added to the value of the special electric prize winning counter 233b for the high frequency support mode. In addition, the detection result of the special electric detection sensor 45a is also monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) that is executed as a process corresponding to the specific control, and the detection result of the special electric detection sensor 45a is When it is determined that game balls are detected, processing is executed to make the number of game balls corresponding to the special electric prize winning device 32 paid out, and processing is executed to specify the trigger for ending the round game.

If it is determined that one game ball is detected by the first operating port detection sensor 46a (step S4109: YES), that is, the signal received from the first operating port detection sensor 46a is switched from LOW level to HI level. If it is confirmed that the change has been made, the value of the first normal operation counter 231c is incremented by 1 (step S4110).

Note that if the ball entry management process is in the opening/closing execution mode, the value of the first operation counter 232c for the opening/closing execution mode is incremented by 1 as a process corresponding to step S4110, and if the ball entry management process is in the high frequency support mode, For example, as a process corresponding to step S4110, the value of the first operation counter 233c for high-frequency support mode is incremented by 1. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) that is executed as a process corresponding to the specific control, the detection result of the first operating port detection sensor 46a is monitored, and the detection result of the first operating port detection sensor 46a is monitored. If it is determined in step 46a that one game ball has been detected, a process is executed so that the number of game balls corresponding to the first operation port 33 is paid out, and at the same time, reservation information for special symbols is obtained. Execute processing to identify the trigger.

If it is determined that one game ball is detected by the second operating port detection sensor 47a (step S4111: YES), that is, the signal received from the second operating port detection sensor 47a is switched from LOW level to HI level. If it is confirmed that the change has been made, the value of the second normal operation counter 231d is incremented by 1 (step S4112).

Note that if the ball entry management process is in the opening/closing execution mode, the value of the second operation counter 232d for the opening/closing execution mode is incremented by 1 as a process corresponding to step S4112; For example, as a process corresponding to step S4112, the value of the second operation counter 233d for high-frequency support mode is incremented by 1. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) that is executed as a process corresponding to the specific control, the detection result of the second operating port detection sensor 47a is monitored, and the second operating port detection sensor If it is determined in step 47a that one game ball has been detected, a process is executed so that the number of game balls corresponding to the second operation port 34 is paid out, and at the same time, reservation information for special symbols is obtained. Execute processing to identify the trigger.

If it is determined that one game ball has been detected by the exit detection sensor 48a (step S4113: YES), that is, the signal received from the exit detection sensor 48a has switched from the LOW level to the HI level. If confirmed, 1 is added to the value of the normal out counter 231e (step S4114).

Note that if the ball entry management process is in the opening/closing execution mode, the value of the out counter 232e for the opening/closing execution mode is incremented by 1 as a process corresponding to step S4114, and if the ball entry management process is in the high-frequency support mode, step S4114 is performed. As a process corresponding to S4114, the value of the out counter 233e for high frequency support mode is incremented by 1. Furthermore, the detection result of the exit detection sensor 48a is not monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) that is executed as a process corresponding to the specific control.

By executing the processes from step S4004 to step S4006 as described above, the number of game balls entering the general winning hole 31 is measured using the general winning counters 231a, 232a, and 233a, and the special electric winning device 32 The number of game balls entering the first operating port 33 is measured using the special electric winning counters 231b, 232b, 233b, and the number of gaming balls entering the first operating port 33 is measured using the first operating counters 231c, 232c, 233c. The number of game balls entering the second operating port 34 is measured using the second operating counters 231d, 232d, 233d, and the number of game balls entering the out port 24a is measured using the out counters 231e, 233d. It is measured using 232e and 233e. This allows the main CPU 63 to grasp the history of ball entry into each ball entry section 24a, 31-34. In addition, since the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 are each provided separately, it is possible to avoid a situation in which neither the opening/closing execution mode nor the high-frequency support mode exists. It becomes possible for the main CPU 63 to grasp the history of ball entry into each of the ball entry sections 24a, 31 to 34 by distinguishing between the opening/closing execution mode and the high frequency support mode.

Returning to the explanation of the check process (FIG. 73), if an affirmative determination is made in step S4001, if the process of step S4004 is executed, if the process of step S4005 is executed, or if the process of step S4006 is executed, step Result calculation processing is executed in S4007, and display processing is executed in step S4008.

FIG. 75 is a flowchart showing the result calculation process in step S4007.

First, it is determined whether the management start flag provided in the work area 223 for non-specific control is set to "1" (step S4201). The management start flag is a flag used by the main CPU 63 to specify whether or not the situation is such that collection of game history for calculating the game history management results is in order. In this embodiment, when the supply of operating power to the Pachinko machine 10 is started for the first time after the Pachinko machine 10 is manufactured (that is, when the supply of operating power to the MPU 62 is started), the game ejected from the gaming area PA is Until the total number of balls reaches or exceeds the number corresponding to the management start reference value, the total number of game balls ejected from the gaming area PA is not collected to calculate the game history management results. When the number of pieces exceeds the number corresponding to the management start reference value, collection of game history is executed for calculating a game history management result. At the stage of shipping the Pachinko machine 10, the operation of the Pachinko machine 10 may be checked before shipping, and at that time, game balls are placed in each ball entry section and subsequent operations are checked. On the other hand, after the supply of operating power to the pachinko machine 10 starts, until the total number of game balls ejected from the game area PA reaches or exceeds the management start reference value, the game for calculating the management results of the game history By disabling the history collection, it is possible to prevent the ball entry results during the operation check as described above from being collected as the gaming history for calculating the gaming history management results. Become.

Here, when the supply of operating power to the Pachinko machine 10 is started for the first time after the Pachinko machine 10 is manufactured (that is, when the supply of operating power to the MPU 62 is started), the value of the management start flag is "0". It becomes. In this case, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open/close execution mode counter area 232, and the values of the counters 233a to 233e in the counter area 233 for high frequency support mode. is also "0". On the other hand, in a situation where the value of the management start flag is "1", the supply of operating power to the pachinko machine 10 is stopped, and then in a situation where backup power is supplied to the main RAM 65, the operating power to the pachinko machine 10 is stopped. When the supply of the data is started, the value of the management start flag remains at "1". In this case, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open/close execution mode counter area 232, and the values of the counters 233a to 233e in the counter area 233 for high frequency support mode. The pachinko machine 10 is also maintained in the state before the supply of operating power to the pachinko machine 10 was stopped. With the above configuration, when the value of the management start flag is "0", the values of each counter 231a to 231e in the normal counter area 231, the values of each counter 232a to 232e in the open/close execution mode counter area 232, The values of each of the counters 233a to 233e in the high frequency support mode counter area 233 also become "0".

Incidentally, when clearing the main RAM 65 is executed in step S105 or step S117 in the main processing (FIG. 9), the targets of the clearing are the work area 221 for specific control and the stack for specific control. The area 222, the work area 223 for non-specific control, and the stack area 224 for non-specific control are excluded from the targets of the clearing process. As a result, the game hall manager is configured to be unable to intentionally clear the work area 223 for non-specific control and the stack area 224 for non-specific control to "0".

In addition, the main CPU 63 checks whether an abnormality has occurred in the work area 223 for non-specific control and the stack area 224 for non-specific control in the timer interrupt processing (FIG. 69) to be described later. If it is confirmed, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". Thereby, if an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, it becomes possible to initialize them. In addition, if an abnormality occurs in the work area 223 for non-specific control in this configuration, the work area 223 for non-specific control is cleared to "0" without clearing the stack area 224 for non-specific control to "0". However, when an abnormality occurs in the stack area 224 for non-specific control, the stack area 224 for non-specific control is cleared to "0" without clearing the work area 223 for non-specific control to "0". Good too. Furthermore, even if an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, the calculation result storage area 234 may be excluded from being cleared to "0".

If a negative determination is made in step S4201, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the opening/closing execution mode counter area 232, and the values of the counters 232a to 232e in the counter area 233 for high frequency support mode. The total number is calculated by summing all the values of each counter 233a to 233e (step S4202). Then, it is determined whether the calculated total number is greater than the management start reference value "300" (step S4203).

If an affirmative determination is made in step S4203, the management start flag of the work area 223 for non-specific control is set to "1" (step S4204). Also, each counter 231a to 231e in the normal counter area 231, each counter 232a to 232e in the open/close execution mode counter area 232, and each counter 233a to 233e in the high frequency support mode counter area 233 are all cleared to "0". (Step S4205). As a result, the total number of game balls ejected from the gaming area PA after the supply of operating power to the pachinko machine 10 has started (that is, after the supply of operating power to the MPU 62 has started) is set to the management start reference value. All game history information collected until the number corresponds to or more will be deleted. Therefore, after the supply of operating power to the pachinko machine 10 starts, until the total number of game balls ejected from the game area PA reaches or exceeds the management start reference value, the game history cannot be collected for calculating the game history management results. It is possible to prevent this from being executed.

If an affirmative determination is made in step S4201, calculation processing for the total number is executed in the same manner as in step S4202 (step S4206). That is, the values of the counters 231a to 231e in the normal counter area 231, the values of the counters 232a to 232e in the open/close execution mode counter area 232, and the values of the counters 233a to 233e in the counter area 233 for high frequency support mode. Calculate the total number by adding them all up. Then, it is determined whether the calculated total number is equal to or greater than the calculation reference number "6000" (step S4207).

When an affirmative determination is made in step S4207, calculation processing of various parameters is executed (step S4208). Specifically, the values of the various counters 231a to 231e in the normal counter area 231 are set to K61 to K65, the values of the various counters 232a to 232e in the counter area 232 for the open/close execution mode are set to K71 to K75, and the values of the various counters 232a to 232e are set to K71 to K75 in the counter area 232 for the open/close execution mode. When the values of the various counters 233a to 233e in the counter area 233 are K81 to K85, the following 61st to 68th parameters are calculated.
・61st parameter: Total number of game balls paid out ("K61 + K71 + K81" x "Number of prize balls for winning in the general winning slot 31" + "K62 + K72 + K82" x "Number of prize balls for winning in the special electric winning device 32" + "K63 + K73 + K83 ”דNumber of prize balls for winning into the first operating port 33” + “K64+K74+K84”דNumber of winning balls for winning into the second operating port 34”)/Total number of game balls ejected from the technique area PA ( K61+K62+K63+K64+K65+K71+K72+K73+K74+K75+K81+K82+K83+K84+K85) 62nd parameter: Total number of game balls paid out in normal time (K61 x "Number of prize balls for winning in the general winning slot 31" + K62 x "Prize for winning in the special electric winning device 32" Number of balls”+K63 x “Number of prize balls for winning into the first operating port 33” + K64 ) ratio/63rd parameter: Total number of game balls paid out during opening/closing execution mode (K71 x "Number of prize balls for winning in the general winning slot 31" + K72 x "Number of prize balls for winning in the special electric winning device 32") +K73 x "Number of prize balls for winning in the first operating port 33" + K74 x "Number of prize balls for winning in the second operating port 34")/Total of game balls ejected from the technique area PA during the opening/closing execution mode Ratio of the number (K71+K72+K73+K74+K75)/64th parameter: Total number of game balls paid out in high-frequency support mode (K81 x "Number of prize balls for winning in the general winning slot 31" + K82 x "Number of winning balls for winning in the special electric winning device 32""Number of prize balls" + K83 x "Number of prize balls for winning in the first operating port 33" + K84 x "Number of prize balls for winning in the second operating port 34")/Ejected from the technique area PA during high-frequency support mode Ratio of the total number of game balls (K81 + K82 + K83 + K84 + K85) / 65th parameter: Total number of game balls entered into the general prize opening 31 (K61 + K71 + K81) / Total number of game balls discharged from the game area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75+K81+K82+K83+K84+K85) ratio・66th parameter: Ratio of total number of game balls entering the first operating port 33 (K63+K73+K83)/total number of game balls ejected from gaming area PA (K61+K62+K63+K64+K65+K71+K72+K73+K74+K75+K81+K82+K83+K84+K85)・67th parameter :("K62+K72+K82"× "Number of prize balls for winning in the special electric winning device 32" + "K64 + K74 + K84" x "Number of prize balls for winning in the second operating port 34") / Total number of game balls paid out ("K61 + K71 + K81" x "General winning port 31") "Number of prize balls for winning in the special electric winning device 32" + "Number of prize balls for winning in the special electric prize winning device 32" + "K63 + K73 + K83" × "Number of prize balls for winning in the first operating port 33" + "K64 + K74 + K84" Ratio of "Number of prize balls for winning into the second operating port 34") 68th parameter: "K62 + K72 + K82" x "Number of prize balls for winning into the special electric winning device 32" / Total number of game balls paid out ("K61 + K71 + K81" × “Number of prize balls for winning into the general winning opening 31” + “K62 + K72 + K82” × “Number of prize balls for winning into the special electric winning device 32” + “K63 + K73 + K83” × “Number of prize balls for winning into the first operating opening 33” ”+“K64+K74+K84”דNumber of prize balls that hit the second operating port 34”) After that, the 61st to 68th parameters calculated in step S4208 are overwritten in the calculation result storage area 234 (step S4209). . In this case, the 61st to 68th parameters of the calculation results from the previous processing time, which were already stored in the calculation result storage area 234, are deleted. Note that even if the supply of operating power to the pachinko machine 10 is stopped, backup power is supplied to the main RAM 65, so if the backup power is being supplied, the power to the pachinko machine 10 is Even immediately after the start of supply of operating power to the pachinko machine 10, information on the 61st to 68th parameters calculated before the supply of operating power to the pachinko machine 10 is stopped is stored in the calculation result storage area 234.

After that, each counter 231a to 231e in the normal counter area 231, each counter 232a to 232e in the open/close execution mode counter area 232, and each counter 233a to 233e in the high frequency support mode counter area 233 are all cleared to "0". (Step S4210). As a result, once the 61st to 68th parameters have been calculated, it is possible to temporarily erase the information on the game history at that point.

Immediately after the management start flag is set to "1", if the total number of game balls ejected from the gaming area PA is equal to or greater than the value obtained by subtracting the management start reference value from the calculation reference number, the process starts from step S4208. It may be configured to execute the process of step S4210, and thereafter execute the processes of steps S4208 to S4210 when the total number of game balls discharged from the gaming area PA becomes equal to or more than the calculation reference number.

FIG. 76 is a flowchart showing the display processing of step S4008 in the check processing (FIG. 73).

First, the value of the update timing counter provided in the work area 223 for non-specific control is subtracted by 1 (step S4301). The update timing counter is a counter for the main CPU 63 to specify that it is the timing to update the display contents of the game history management results on the first to third notification display devices 69a to 69c. The main CPU 63 notifies the calculation results of the 61st to 68th parameters by controlling the display of the first to third notification display devices 69a to 69c. In this case, the first notification display device 69a displays information corresponding to the type of parameter to be notified. Furthermore, of the value obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the one place is displayed on the third notification display. It is displayed on the device 69c. In the first to third notification display devices 69a to 69c, the displays corresponding to the calculation results of the 61st to 68th parameters are sequentially switched according to a predetermined order, and the display target in the last order is the one to be displayed. After the calculation result of the 68th parameter is displayed, the calculation result of the 61st parameter, which is the first display target, is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 10 seconds.

Here, the calculation cycle of the 61st to 68th parameters in the main CPU 63 is 60 minutes at the shortest. On the other hand, the number of the 61st to 68th parameters is eight, and the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Therefore, the 61st to 68th parameters calculated by the main CPU 63 are displayed at least once on the first to third notification display devices 69a to 69c.

When the process of step S4301 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether the value of the update timing counter after subtraction by 1 is "0". It is determined whether the timing has come to do so (step S4302). When an affirmative determination is made in step S4302, the value of the display target counter provided in the work area 223 for non-specific control is incremented by 1 (step S4303). If the value of the display target counter after adding 1 exceeds the maximum value "7" (step S4304: YES), the value of the display target counter is cleared to "0" (step S4305).

The display target counter is a counter used by the main CPU 63 to specify the type of parameter to be displayed on the first to third notification display devices 69a to 69c. There is a one-to-one correspondence between the 61st to 68th parameters and the possible values of the display target counter "0" to "7". For example, when the value of the display target counter is "0", the 61st parameter that is the first display target becomes the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is "7". In this case, the last display target, the 68th parameter, becomes the display target of the first to third notification display devices 69a to 69c.

If a negative determination is made in step S4304 or if the process in step S4305 is executed, the first notification display device 69a is displayed so that information corresponding to the type of parameter corresponding to the value of the display target counter is displayed. control (step S4306). Further, the parameter corresponding to the value of the display target counter is read from the calculation result storage area 234, and the read parameter is multiplied by 100, and the number corresponding to the tens place is displayed on the second notification display device 69b, The number corresponding to the ones digit is displayed on the third notification display device 69c (step S4307).

Here, a display IC is provided corresponding to each of the first to third notification display devices 69a to 69c. In step S4306, the main CPU 63 outputs display data to the display IC corresponding to the first notification display device 69a, and in step S4307, the main CPU 63 outputs display data to the display IC corresponding to the second notification display device 69b, and the third notification display device 69b. Display data is output to each of the display ICs corresponding to the display device 69c. These display ICs are capable of storing and retaining display data when operating power is supplied, and continue to display display contents corresponding to the stored display data on the corresponding notification display devices 69a to 69c. Display. Then, when the display data is changed by the main CPU 63, the display on the notification display devices 69a to 69c is changed to display content corresponding to the changed display data. As a result, even after the management execution process (Fig. 71), which is the process corresponding to non-specific control, has ended and the process corresponding to specific control has returned, the settings in the execution status of the process corresponding to non-specific control can be changed. The display corresponding to the display data continues on the first to third notification display devices 69a to 69c.

Thereafter, a value corresponding to 10 seconds is set in the update timing counter of the work area 223 for non-specific control as a value corresponding to the next update timing (step S4308).

When the supply of operating power to the main CPU 63 is started by executing the display process as described above, the game history management results are displayed on the first to third notification display devices 69a to 69c. be done. The management result of the game history is displayed regardless of whether the game is continued or not, and when the game machine main body 12 is opened with respect to the outer frame 11 and the main controller 60 is opened from the front of the pachinko machine 10. This is done regardless of whether it is visible or not. In this way, the display control of the first to third notification display devices 69a to 69c is executed regardless of the game situation or the state of the pachinko machine 10, so that the first to third notification display devices 69a It becomes possible to simplify the processing configuration for controlling the display of 69c to 69c.

According to this embodiment described in detail above, the following excellent effects are achieved.

The main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, a work area 223 for non-specific control, and a stack area 224 for non-specific control. A work area 221 for specific control and a stack area 222 for specific control are used when processing corresponding to specific control is executed by the main CPU 63 using a program for specific control and data for specific control. While it is possible to store and read information, the main CPU 63 executes processing corresponding to non-specific control using a program for non-specific control and data for non-specific control. In some cases, it is possible to read information, but it is not possible to store information. Further, the work area 223 for non-specific control and the stack area 224 for non-specific control are capable of storing and reading information when processing corresponding to non-specific control is executed by the main CPU 63. On the other hand, when the process corresponding to the specific control is executed by the main CPU 63, it is possible to read the information, but it is not possible to store the information. As a result, the work area 221 for specific control and the stack area 222 for specific control are treated as storage areas dedicated to processing corresponding to specific control, and the work area 223 for non-specific control and the stack area for non-specific control 224 can be treated as a dedicated storage area for processing corresponding to non-specific control. Therefore, it is possible to clearly differentiate the storage location of information in the main RAM 65 between processing corresponding to specific control and processing corresponding to non-specific control. Therefore, when executing one of the processing corresponding to specific control and the processing corresponding to non-specific control, it is possible to prevent information used in the other processing from being deleted.

Processing corresponding to specific control includes processing for controlling the progress of the game, and processing corresponding to non-specific control includes processing for managing game history. As described above, the work area 221 for specific control and the stack area 222 for specific control are treated as storage areas dedicated to processing corresponding to specific control, and the work area 223 for non-specific control and the stack area 222 for non-specific control are treated as storage areas dedicated to processing corresponding to specific control. The stack area 224 is treated as a dedicated storage area for processing corresponding to non-specific control. As a result, when executing the process for controlling the progress of the game, information used in the process for managing the game history, such as the normal counter area 231, the counter area 232 for the opening/closing execution mode, and the high-frequency support mode. It is possible to prevent the information stored in the counter area 233 and the calculation result storage area 234 from being rewritten.

A normal counter area 231 in which information for managing game history is stored, an open/close execution mode counter area 232, a high frequency support mode counter area 233, and a calculation result storage area 234 are provided in the main RAM 65. This allows the main CPU 63 to complete the processing for managing the game history. Further, it is possible to prevent unauthorized access to and unauthorized modification of information on gaming history and information on various parameters calculated using the information on gaming history.

When a situation changes from a situation in which a process corresponding to specific control is being executed to a situation in which a process corresponding to non-specific control is executed, or a situation in which a process corresponding to non-specific control is executed, various types of the main CPU 63 Register information is saved to the main RAM 65. As a result, when processing corresponding to non-specific control is executed, it is possible to prevent information stored in various registers of the main CPU 63 from being rewritten when executing processing corresponding to specific control. Become. Further, when or after the processing corresponding to non-specific control is ended, the information saved in the main side RAM 65 is returned to the various registers of the main side CPU 63. As a result, when processing corresponding to non-specific control is completed, it is possible to execute processing corresponding to specific control based on the states of various registers of the main CPU 63 before execution of the processing corresponding to non-specific control. Become.

When the situation changes from executing processing corresponding to specific control to executing processing corresponding to non-specific control, or when the situation changes to executing processing corresponding to non-specific control, various registers of the main CPU 63 Information in some of the registers is saved to the main RAM 65. This makes it possible to reduce the storage capacity required for saving the information in the registers of the main CPU 63 in the main RAM 65.

When the situation changes from executing processing corresponding to specific control to executing processing corresponding to non-specific control, or when the situation changes to executing processing corresponding to non-specific control, various registers of the main CPU 63 Among them, information of registers to be stored in information in processing corresponding to non-specific control is saved to the main side RAM 65. As a result, when the process corresponding to non-specific control is completed, it is possible to restart the process corresponding to specific control from the state of the register of the main CPU 63 before the execution of the process corresponding to the non-specific control. , it becomes possible to suppress the storage capacity required for saving the information in the register of the main CPU 63 in the main RAM 65.

When processing corresponding to non-specific control is started, the information in the flag register of the main CPU 63 is saved to the stack area 222 for specific control in the processing corresponding to specific control, and the information in the flag register of the main CPU 63 is saved to the WA register, BC register, Each information of the DE register, HL register, IX register, and IY register is saved in the work area 223 for non-specific control in the process corresponding to non-specific control. This makes it possible to save the information stored in the various registers of the main CPU 63 at a timing that is preferable, and also to make the process for saving information compatible with specific control and non-specific control. It becomes possible to perform the processing in a distributed manner.

The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. In this case, the information in the flag register is saved in the stack area 222 for specific control in the process corresponding to specific control before the process corresponding to non-specific control is started. This makes it possible to save information in the flag register in the state before it changes after calling a subroutine corresponding to non-specific control or starting the subroutine in the stack area 222 for specific control.

By saving the information of the WA register, BC register, DE register, HL register, IX register, and IY register to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, It becomes possible to keep the capacity of the stack area 224 for specific control small. Furthermore, when using the stack area 224 for non-specific control, the information is written in the order in which later information is read first, so if the order in which the information is read is shifted due to some kind of noise, All subsequent readout order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. In contrast, by saving register information to the work area 223 for non-specific control, it is possible to prevent the above-mentioned phenomenon from occurring even when there is a large amount of information to be saved. .

The stack pointer of the main CPU 63 changes from a situation in which a process corresponding to specific control is being executed to a situation in which a process corresponding to non-specific control is executed, or when a situation changes to a situation in which a process corresponding to non-specific control is executed. The information is configured to be fixed information, and the information of the stack pointer is not saved in the main side RAM 65 at the start of processing corresponding to non-specific control. Thereby, there is no need to secure a capacity for saving the stack pointer information in the main side RAM 65, so that the storage capacity of the main side RAM 65 can be reduced accordingly. Furthermore, even in a configuration where stack pointer information is not saved, if the situation changes from executing processing corresponding to specific control to executing processing corresponding to non-specific control, or when non-specific control When the corresponding process is executed, the stack pointer information of the main CPU 63 becomes fixed information, so the process corresponding to non-specific control can be executed without saving the stack pointer information as described above. When the process is finished, it is possible to restore the stack pointer information to the information before the process corresponding to the non-specific control was started.

Although the configuration has been described in which the information in the flag register of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the specific control when the process corresponding to the non-specific control is executed, the present invention is not limited to this. Instead, the information in the flag register may be saved in the main RAM 65 in a process corresponding to non-specific control. Furthermore, although the configuration has been described in which the information is returned to the flag register of the main CPU 63 in the process corresponding to specific control after the process corresponding to non-specific control is completed, the present invention is not limited to this. A configuration may be adopted in which information is returned to the flag register in a process corresponding to non-specific control.

In addition, after the information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is started, the main CPU 63 is used in the process corresponding to the non-specific control. Although the configuration is such that the information is saved in the side RAM 65, the configuration is not limited to this, and the information in these registers may be saved in the main side RAM 65 in a process corresponding to specific control. In addition, when the process corresponding to non-specific control ends, information is returned to each of the above registers in the process corresponding to non-specific control. However, this is not limited to this, and each of the above The information may be returned to the register in a process corresponding to specific control after the process corresponding to non-specific control is completed.

<Sixteenth embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 77 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S4401 to step S4405 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S4401). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Thereafter, the information in the flag register of the main CPU 63 is saved to the PSW buffer set in the work area 221 for specific control by a load instruction as "LD (_PSWBUF), PSW" (step S4402). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the start of the subroutine program corresponding to management execution processing, the flag register's state before it changes after the subroutine is called or the subroutine starts. It becomes possible to save information to the work area 221 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the program for non-specific control, the management execution process is started (step S4403). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

When returning to the management processing program after executing the management execution processing, the program is saved as "LD PSW, (_PSWBUF)" to the PSW buffer in the specific control work area 221 in step S4402 by a load instruction. The information in the flag register is returned to the flag register of the main CPU 63 (step S4404). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S4402 was executed last time. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which generation is permitted (step S4405). This enables new execution of timer interrupt processing.

According to the above configuration, the information in the flag register of the main CPU 63 immediately before switching from specific control to non-specific control is saved to the work area 221 for specific control instead of the stack area 222 for specific control. This makes it possible to save the information in the flag register while suppressing the capacity of the stack area 222 for specific control.

Note that although the PSW buffer in the work area 221 for specific control is secured as a dedicated area, it is not limited to this, and may be configured as a shared area in which other information can also be written. In other words, in a situation where management processing is not executed, there is no need to save information in the flag register of the main CPU 63 that corresponds to specific control. A configuration may also be adopted in which a dual-purpose area is also used as a PSW buffer when performing arithmetic processing. In this case, the dual-purpose area will definitely be used to save the information in the flag register when executing the management process, so it will be used as information other than the flag register information before the management process is executed. It is necessary to have a configuration in which unnecessary information is written to a shared area.

<Seventeenth embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management execution processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 78 is a flowchart showing management execution processing in this embodiment executed by the main CPU 63. Note that the processes from step S4501 to step S4515 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (u+2)" at the start of non-specific control. Y(u+2) is set as a fixed address at (step S4501).

Thereafter, the information in the WA register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH WA" (step S4502). In this case, the information in the WA register is saved to the storage area corresponding to the fixed address set in the stack pointer of the main CPU 63 in step S4501. Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

Thereafter, the information in the BC register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH BC" (step S4503). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

Thereafter, the information in the DE register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH DE" (step S4504). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

Thereafter, the information in the HL register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH HL" (step S4505). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

Thereafter, the information in the IX register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH IX" (step S4506). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

Thereafter, the information in the IY register of the main CPU 63 is saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control using a push command as "PUSH IY" (step S4507). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After executing the processes in steps S4502 to S4507, a check process is executed (step S4508). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is transferred using a push command to specify the return address of the management execution process after the check process has been executed. Write to the storage area corresponding to the information. When the check process is completed, information for specifying the return address is read out using a pop instruction, and the program returns to the management execution process indicated by the return address. The contents of the check process are the same as in the fifteenth embodiment.

Thereafter, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (r+α)" when returning to the specific control. Y(r+α) is set as a fixed address at (step S4509). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, as "POP IY", the information saved in the storage area corresponding to the information in the previous order is transferred to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by the pop instruction. The IY register of the main CPU 63 is overwritten (step S4510). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP IX", the information saved in the storage area corresponding to the previous order information is transferred to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by the pop instruction. The IX register of the main CPU 63 is overwritten (step S4511). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP HL", the information saved in the storage area corresponding to the previous order information is sent to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by the pop instruction. The HL register of the main CPU 63 is overwritten (step S4512). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP DE", the information saved in the storage area corresponding to the previous order information is sent to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by the pop instruction. The DE register of the main CPU 63 is overwritten (step S4513). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP BC", the information saved in the storage area corresponding to the information in the previous order is transferred to the current stack pointer information of the main CPU 63 in the non-specific control stack area 224 by the pop instruction. The BC register of the main CPU 63 is overwritten (step S4514). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP WA", the information saved in the storage area corresponding to the previous order information is sent to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control by the pop instruction. The WA register of the main CPU 63 is overwritten (step S4515). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

By executing the processing from step S4510 to step S4515, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. It becomes possible to restore the information corresponding to the specific control immediately before the control.

In addition to the flag register, the registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S4502 to S4507, each information of the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, is is saved in the stack area 224 for non-specific control. These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in check processing (step S4508), which is processing corresponding to non-specific control. By saving the information set in such registers to the stack area 224 for non-specific control before executing the check process (step S4508), the information in these registers that was used for specific control can be used for non-specific control. This makes it possible to evacuate the area before it starts. Therefore, even if these registers are overwritten during non-specific control, the status of these registers can be changed by restoring the information saved in the stack area 224 for non-specific control to these registers when terminating the non-specific control. It becomes possible to restore the state to the state corresponding to the specific control before the non-specific control was executed.

In addition, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers to the stack area 224 for non-specific control, WA Register information is saved in the stack area 224 for non-specific control by selectively saving the information of the registers, BC register, DE register, HL register, IX register, and IY register to the stack area 224 for non-specific control. This makes it possible to reduce the amount of capacity secured for this purpose. Therefore, it is possible to save the register information as described above while ensuring a large capacity of the stack area 224 for non-specific control that can be used during the check process.

<Eighteenth embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management execution processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 79 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the processes from step S4601 to step S4605 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (u+2)" at the start of non-specific control. Y(u+2) is set as a fixed address at (step S4601).

Thereafter, information in all registers of the main CPU 63 is saved to the ALL buffer set in the work area 223 for non-specific control using a load instruction as "LD (_ALLBUF), ALL" (step S4602). This allows all registers to be used, including not only the WA register, BC register, DE register, HL register, IX register, and IY register used in check processing, which is a process corresponding to non-specific control, but also other registers. The information in the registers is collectively saved in the ALL buffer of the work area 223 for non-specific control. By saving all the registers of the main CPU 63 to the work area 223 for non-specific control in this way, there is no need to selectively save information in the registers of the main CPU 63.

Here, the registers to be saved include flag registers. The information in the flag register is saved in the stack area 222 for specific control in step S3802 of the management process (FIG. 70), but the information in the flag register is saved in the work area 223 for non-specific control in step S4602. be done. This eliminates the need to selectively save the information in the registers of the main CPU 63, including the information in the flag registers. Furthermore, even if the information in the flag registers is saved in duplicate in this way, after the management execution process ends, in step S3804 of the management process (FIG. 70), the information is transferred from the special control stack area 222 to the main CPU 63. Since the information is restored to the flag register of the main CPU 63, when returning to the process corresponding to the specific control, it is possible to restore the information of the flag register of the main CPU 63 to the state immediately before the management execution process was executed. becomes.

After that, a check process is executed (step S4603). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is transferred using a push command to specify the return address of the management execution process after the check process has been executed. Write to the storage area corresponding to the information. When the check process is completed, information for specifying the return address is read out using a pop instruction, and the program returns to the management execution process indicated by the return address. The contents of the check process are the same as in the fifteenth embodiment.

Thereafter, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (r+α)" when returning to the specific control. Y(r+α) is set as a fixed address at (step S4604). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, as "LD ALL, (_ALLBUF)", the information saved in the ALL buffer of the work area 223 for non-specific control is overwritten in the registers corresponding to each of the main side CPUs 63 by a load instruction (step S4605). This makes it possible to restore each information in all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

According to the above configuration, by saving the information in the register of the main CPU 63 to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the stack area for non-specific control is 224 capacity can be kept small. Furthermore, when using the stack area 224 for non-specific control, the information is written in the order in which later information is read first, so if the order in which the information is read is shifted due to some kind of noise, All subsequent readout order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. In contrast, by saving register information to the work area 223 for non-specific control, it is possible to prevent the above-mentioned phenomenon from occurring even when there is a large amount of information to be saved. .

In addition, when saving the information of the registers of the main CPU 63 to the work area 223 for non-specific control, the WA register, BC register, DE register, and HL register used in the check process, which is the process corresponding to the non-specific control. , IX register, and IY register, as well as other registers, the information of all registers is collectively saved in the ALL buffer of the work area 223 for non-specific control. By saving all the registers of the main CPU 63 to the work area 223 for non-specific control in this way, there is no need to selectively save information in the registers of the main CPU 63.

Although the configuration is such that the information in all registers of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the non-specific control after the process corresponding to the non-specific control is started, the present invention is not limited to this. Instead, the information in all registers may be saved in the main RAM 65 in the process corresponding to the specific control. In addition, when the process corresponding to non-specific control ends, the information is returned to all registers in the process corresponding to non-specific control. However, this is not limited to this; The information may be returned in a process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<Nineteenth embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management execution processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that descriptions of the same configurations as in the fifteenth embodiment will be basically omitted.

FIG. 80 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the processes from step S4701 to step S4706 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as "LD (_SPBUF), SP", information on the stack pointer of the main CPU 63 is saved to the SP buffer set in the work area 223 for non-specific control by a load instruction (step S4701). As a result, information on the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started is saved in the work area 223 for non-specific control.

Thereafter, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 at the start of non-specific control as "LD SP, Y (u+2)". Y(u+2) is set as a fixed address at (step S4702).

After that, as "PUSH ALL", the information of all the registers of the main CPU 63 is transferred from the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control and the corresponding storage area by a push command. It is saved to a continuous storage area (step S4703). In this case, since the information of all the registers of the main CPU 63 cannot be stored in one storage area in the stack area 224 for non-specific control, the current state of the main CPU 63 in the stack area 224 for non-specific control as described above. The storage area corresponding to the information of the stack pointer and the storage area continuous from the storage area are set as the save destination of the information of the register. Further, the information of the stack pointer of the main CPU 63 is updated to the address information of the storage area to be written in the next order with respect to the storage area where the last information was stored when saving the information of all the registers.

After that, a check process is executed (step S4704). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is transferred using a push command to specify the return address of the management execution process after the check process has been executed. Write to the storage area corresponding to the information. When the check process is completed, information for specifying the return address is read out using a pop instruction, and the program returns to the management execution process indicated by the return address. The contents of the check process are the same as in the fifteenth embodiment.

Thereafter, as "POP ALL", the information saved to the storage area corresponding to the current stack pointer information of the main CPU 63 in the stack area 224 for non-specific control and the storage area continuous from the storage area by the pop instruction is sent as "POP ALL". are overwritten in the registers corresponding to each of the main CPUs 63 (step S4705). This makes it possible to restore the information in all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

Thereafter, the stack pointer of the main CPU 63 is overwritten with the information saved in the SP buffer of the work area 223 for non-specific control by a load instruction as "LD SP, (_SPBUF)" (step S4706). As a result, the information on the stack pointer of the main CPU 63 returns to the information corresponding to the specific control immediately before the process corresponding to the non-specific control was started.

According to the above configuration, when saving the information of the registers of the main CPU 63 to the stack area 224 for non-specific control, the WA register, BC register, and DE register used in the check process, which is the process corresponding to the non-specific control, Information on all registers, including not only the registers, HL register, IX register, and IY register, but also other registers, is saved in the stack area 224 for non-specific control. By saving all the registers of the main CPU 63 to the stack area 224 for non-specific control in this way, there is no need to selectively save information in the registers of the main CPU 63.

Information on the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started is saved in the work area 223 for non-specific control. As a result, even if the stack pointer information corresponding to the specific control immediately before the process corresponding to the non-specific control is started may change, the process corresponding to the non-specific control ends and the specific control returns. When returning to the corresponding process, it is possible to return the information of the stack pointer of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control was started.

Although the configuration is such that the information in all registers of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the non-specific control after the process corresponding to the non-specific control is started, the present invention is not limited to this. Instead, the information in all registers may be saved in the main RAM 65 in the process corresponding to the specific control. In addition, when the process corresponding to non-specific control ends, the information is returned to all registers in the process corresponding to non-specific control. However, this is not limited to this; The information may be returned in a process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<Twentieth embodiment>
This embodiment is different from the fifteenth embodiment in the processing configurations of management processing and management execution processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 81 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S4801 to step S4811 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S4801). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Thereafter, the information in the flag register of the main CPU 63 is saved to the specific control stack area 222 by a push command as "PUSH PSW" (step S4802). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the start of the subroutine program corresponding to management execution processing, the flag register's state before it changes after the subroutine is called or the subroutine starts. It becomes possible to save information to the stack area 222 for specific control.

Thereafter, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S4803). Further, as "LD BC, 0", the BC register of the main CPU 63 is cleared to "0" by a load instruction (step S4804). Further, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by a load instruction (step S4805). Furthermore, the HL register of the main CPU 63 is cleared to "0" by a load instruction as "LD HL,0" (step S4806). Further, as "LD IX,0", the IX register of the main CPU 63 is cleared to "0" by a load instruction (step S4807). Further, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by a load instruction (step S4808).

In addition to the flag register, the registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S4803 to S4808, the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, are Clear “0”. These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in check processing (step S4902), which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of the management execution process (step S4809), which is the process corresponding to non-specific control, the state of these registers can be changed before the process corresponding to non-specific control is started. In addition, it is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

In addition, each information of the WA register, BC register, DE register, HL register, IX register, and IY register before the process corresponding to non-specific control is started will be changed after the process corresponding to the non-specific control is finished. This information is unnecessary in the process corresponding to specific control. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem will occur in the process corresponding to the specific control that is returned after the process corresponding to the non-specific control is completed.

After executing the processes from step S4803 to step S4808, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S4809). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

When returning to the management processing program after execution of the management execution processing, the main CPU 63 uses a pop instruction to send the information of the flag register saved to the stack area 222 for specific control in step S4802 as "POP PSW". flag register (step S4810). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S4802 was executed last time. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S4811). This enables new execution of timer interrupt processing.

FIG. 82 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the processes from step S4901 to step S4909 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (u+2)" at the time of starting non-specific control. Y(u+2) is set as a fixed address (step S4901).

After that, a check process is executed (step S4902). When executing a check process, a subroutine program corresponding to the check process set in the non-specific control program will be executed, but when executing the subroutine program, management after execution of the check process will be executed. Information for specifying the return address of the execution process is written to the stack area 224 for non-specific control by a push instruction. When the check process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the management execution process indicated by the return address. The contents of the check process are the same as in the fifteenth embodiment.

Thereafter, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S4903). Further, as "LD BC, 0", the BC register of the main CPU 63 is cleared to "0" by a load instruction (step S4904). Further, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by a load instruction (step S4905). Further, as "LD HL, 0", the HL register of the main CPU 63 is cleared to "0" by a load instruction (step S4906). Further, as "LD IX,0", the IX register of the main CPU 63 is cleared to "0" by a load instruction (step S4907). Further, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by a load instruction (step S4908).

These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in the check process (step S4902), which is a process corresponding to non-specific control, as described above. By clearing such registers to 0 before returning from processing corresponding to non-specific control to processing corresponding to specific control, the state of these registers can be changed to the main state before returning to processing corresponding to specific control. It is possible to create a state immediately after the supply of operating power to the side CPU 63 is started.

In addition, each information of the WA register, BC register, DE register, HL register, IX register, and IY register before the process corresponding to the specific control is started is non-specific after the process corresponding to the specific control is finished. This information is unnecessary in the process corresponding to control. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem will occur in the process corresponding to the non-specific control that is returned after the process corresponding to the specific control is completed.

Thereafter, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, a load instruction is used to set the stack pointer of the main CPU 63 as "LD SP, Y (r+α)" when returning to the specific control. Y(r+α) is set as a fixed address at (step S4909). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

According to the above configuration, when processing corresponding to non-specific control is started from a situation where processing corresponding to specific control is being executed, the WA register, BC register, DE register, HL register, and IX register of the main CPU 63 The configuration also clears the IY register to "0". This eliminates the need to save the information in these registers to the main RAM 65. Therefore, there is no need to secure capacity for saving each piece of information.

Also, when returning to processing corresponding to specific control from a situation where processing corresponding to non-specific control is being executed, the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are The configuration is to clear "0". Thereby, when returning to processing corresponding to specific control, it is possible to return the states of these registers to the states immediately before the processing corresponding to non-specific control was started.

The state in which each of the above registers is cleared to "0" is the state when the supply of operating power to the MPU 62 is started. This makes it possible to simplify the processing configuration for setting the above registers to predetermined states when starting processing corresponding to non-specific control and when returning to processing corresponding to specific control. .

When starting the process corresponding to non-specific control and when returning to the process corresponding to specific control, the registers to be cleared to "0" are some of the various registers of the main CPU 63. This makes it possible to reduce the processing load for setting each register to a predetermined state when starting processing corresponding to non-specific control and when returning to processing corresponding to specific control.

In a configuration where the WA register, BC register, DE register, HL register, IX register, and IY register are cleared to "0" when starting the process corresponding to non-specific control and when returning to the process corresponding to specific control, Other registers are not cleared to 0. This makes it possible to prevent information necessary for processing corresponding to specific control from being deleted when starting processing corresponding to non-specific control.

Furthermore, information in registers other than the WA register, BC register, DE register, HL register, IX register, and IY register is not saved in the main side RAM 65 at the start of processing corresponding to non-specific control. This eliminates the need to secure an area in the main RAM 65 for saving this information.

The information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 before the process corresponding to non-specific control is started is the same as that after the process corresponding to non-specific control is finished. This is information that is not used in processing that corresponds to specific control. As a result, even if the above registers are cleared to "0" when the process corresponding to non-specific control is started, it is possible to respond to specific control after the process corresponding to non-specific control is completed. This makes it possible to avoid affecting the processing.

Note that instead of the configuration in which the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are cleared to "0" in steps S4803 to S4808 in the management process (FIG. 81), these It may also be configured to initialize registers. In other words, when the supply of operating power to the MPU 62 is started, each register of the main CPU 63 is once cleared to "0", and then the information of each register is set to the initial state. ~In step S4808, each register may be set so as to be in this initial state. In this case, by configuring each register to be set to the above-mentioned initial state in steps S4903 to S4908, the state of each of these registers can be changed to a non-specific state when returning to the process corresponding to the specific control. It becomes possible to return to the state immediately before the processing corresponding to the control was started.

Also, instead of the configuration in which the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are cleared to "0" in steps S4803 to S4808 in the management process (FIG. 81), A configuration may be adopted in which all registers are set to "1". In this case, by setting all of the above registers to "1" in steps S4903 to S4908, when returning to the process corresponding to specific control, the state of each of these registers is changed to the process corresponding to non-specific control. It becomes possible to return to the state immediately before the start of the process.

Furthermore, the information in the flag register of the main CPU 63 is saved to the main RAM 65 in the process corresponding to the specific control when the process corresponding to the non-specific control is executed, but this is not limited to this. Instead, the information in the flag register may be saved in the main RAM 65 in a process corresponding to non-specific control. Furthermore, although the configuration is such that information is returned to the flag register of the main CPU 63 in the process corresponding to the specific control after the process corresponding to the non-specific control is completed, the present invention is not limited to this. A configuration may be adopted in which information is returned to the flag register in a process corresponding to non-specific control.

Additionally, the process of clearing the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 to "0" is performed before the process corresponding to the non-specific control starts. However, the present invention is not limited to this, and the process of clearing these registers to "0" may be executed as a process corresponding to non-specific control. In addition, although the configuration is such that when the process corresponding to non-specific control ends, the process of clearing each of the registers to "0" is performed in the process corresponding to non-specific control, the invention is not limited to this. The configuration may be such that the process of clearing each register to "0" is performed in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

Furthermore, in the management process (FIG. 81), the "PUSH PSW" process in step S4802 was configured to be executed before each register is set to "0" in steps S4803 to S4808, but instead of this, , the "PUSH PSW" process in step S4802 is executed after each register is set to "0" in steps S4803 to S4808 and before the subroutine program corresponding to the management execution process is read in step S4809. It is also possible to have a configuration in which This makes it possible to save the information in the flag register after it has been changed by the load instructions in steps S4803 to S4808 to the stack area 222 for specific control.

<21st embodiment>
The present embodiment differs from the fifteenth embodiment in the configuration for collecting game history information. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that descriptions of the same configurations as in the fifteenth embodiment will be basically omitted.

FIG. 83 is an explanatory diagram for explaining the electrical configuration in this embodiment.

The MPU 62 is provided with a main CPU 63, a main ROM 64, and a main RAM 65 as in the fifteenth embodiment. Furthermore, unlike the fifteenth embodiment described above, a management RAM 241 is electrically connected to the MPU 62. That is, a management RAM 241 is provided separately from the main RAM 65 built into the MPU 62, and the management RAM 241 is externally attached to the MPU 62.

The main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, a work area 223 for non-specific control, and a stack area 224 for non-specific control, as in the fifteenth embodiment. ing. Therefore, when the main CPU 63 executes a process corresponding to specific control using the specific control program and data for specific control in the main ROM 64, the work area 221 for specific control in the main RAM 65 and When using the stack area 222 for specific control and using the program for non-specific control and data for non-specific control in the main ROM 64 in the main CPU 63 to execute processing corresponding to non-specific control, A work area 223 for non-specific control and a stack area 224 for non-specific control in the main side RAM 65 are used.

The management RAM 241 is provided with a normal counter area 231, an open/close execution mode counter area 232, a high frequency support mode counter area 233, and a calculation result storage area 234. The contents of each of these areas 231 to 234 are the same as in the fifteenth embodiment. Also in this embodiment, management execution processing including check processing is executed as processing corresponding to non-specific control in the main CPU 63. In the checking process, game history is collected by updating the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233, as in the fifteenth embodiment. The 61st to 68th parameters calculated using the collected game history are written into the calculation result storage area 234. That is, since the management RAM 241 is used when the main CPU 63 executes processing corresponding to non-specific control, the management RAM 241 is used as a work area for non-specific control.

In addition, when collecting gaming history and calculating the 61st to 68th parameters using the collected history information, the work area 223 for non-specific control and the stack area 224 for non-specific control of the main side RAM 65 are used. Used as appropriate.

According to the above configuration, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are provided in the management RAM 241 externally attached to the MPU 62. This makes it possible to store collected game history information without increasing the required storage capacity in the work area 223 for non-specific control in the main side RAM 65, and to use the game history to It becomes possible to store the calculated 61st to 68th parameters. Further, while using the general-purpose MPU 62, it is possible to increase the storage capacity for storing game history information.

When collecting gaming history and calculating the 61st to 68th parameters using the collected history information, the work area 223 for non-specific control and the stack area 224 for non-specific control of the main side RAM 65 are used as appropriate. be done. This makes it possible to prevent the processing speed from decreasing excessively when processing related to history information is executed.

In addition to or in place of the configuration in which the management RAM 241 is provided with a normal counter area 231, an open/close execution mode counter area 232, a high-frequency support mode counter area 233, and a calculation result storage area 234, the first embodiment described above may be used. A configuration may also be adopted in which a storage area corresponding to the history memory 117 in the form, etc. is set. In this case, it is necessary to increase the storage capacity required to store the history information, but the configuration is such that the management RAM 241 externally attached to the MPU 62 is used as a storage means for storing the history information. Therefore, it becomes possible to flexibly respond to increases in storage capacity.

<Twenty-second embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration executed by the main CPU 63. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 84 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processes from step S5001 to step S5019 in the main process are executed by the main CPU 63 using a specific control program and specific control data.

First, power-on wait processing is executed (step S5001). In the power-on wait process, for example, the main process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. The operation start and initial setting of the symbol display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S5002).

Thereafter, it is determined whether the reset button 68c is pressed (step S5003), the setting key insertion part 68a is determined to be turned on using the setting key (step S5004), and the inner frame It is determined whether the front door frame 14 is in an open state with respect to 13 (step S5005), and it is determined whether the gaming machine main body 12 is in an open state with respect to the outer frame 11 (step S5006).

In this embodiment, a front door open sensor 95 for detecting whether or not the front door frame 14 is in an open state with respect to the inner frame 13 is electrically connected to the main CPU 63. The detection result of 95 is input to the main CPU 63. In this case, when the front door frame 14 is in the closed state with respect to the inner frame 13, the front door open sensor 95 transmits a closure detection signal to the main CPU 63, and the front door frame 14 is in the open state with respect to the inner frame 13. In this case, the front door open sensor 95 transmits an open detection signal to the main CPU 63. The main side CPU 63 identifies that the front door frame 14 is in the closed state when receiving a closing detection signal from the front door opening sensor 95, and when receiving an opening detection signal from the front door opening sensor 95. It is specified that the front door frame 14 is in an open state.

Further, in this embodiment, a main body open sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main side CPU 63. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closure detection signal to the main side CPU 63, and when the gaming machine main body 12 is in the open state with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the main CPU 63. The main CPU 63 specifies that the gaming machine main body 12 is in a closed state when it receives a closing detection signal from the main body opening sensor 96, and specifies that the gaming machine main body 12 is in a closed state when it receives an opening detection signal from the main body opening sensor 96. It is determined that the main body 12 is in an open state.

If the reset button 68c is pressed (step S5003: YES) and a negative determination is made in any of steps S5004 to S5006, clear processing for non-setting update is executed (step S5007). . In the clearing process at the time of non-setting update, in the work area 221 for specific control, excluding the area where setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting value counter), the specific control Clear the work area 221 to "0" and initialize the area cleared to "0". As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Further, in the clearing process when updating the settings without setting, the stack area 222 for specific control is cleared to "0". Furthermore, in the clearing process at the time of non-setting update, initial settings are performed after various registers of the main CPU 63 are also cleared to "0".

In the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if the supply of operating power to the pachinko machine 10 is started while the reset button 68c is pressed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

If the reset button 68c is not pressed (step S5003: NO), it is determined whether the power outage flag is set to "1" (step S5008). A power outage flag is provided in the work area 221 for specific control, and when the supply of operating power to the main CPU 63 is stopped and a predetermined power outage process is normally executed, the power outage flag is set in the work area 221 for specific control. will be set to "1". If the power outage flag is set to "1", it is determined whether the checksum calculation result matches the checksum saved when the power was cut off, that is, the validity of the stored data is determined (step S5009). . If the clearing process for non-setting update is executed in step S5007, or if an affirmative determination is made in step S5009, the settings of the pachinko machine 10 are set by checking the value of the setting value counter in the work area 221 for specific control. It is determined whether the value is normal (step S5010). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is.

If a negative determination is made in any of steps S5008 to S5010, operation prohibition processing is executed. In the operation prohibition process, after executing an error notification process to notify the hall manager and the like of the occurrence of an error (step S5011), an infinite loop occurs. The operation prohibition process is canceled by executing a clear process (step S5018) when updating settings, which will be described later.

If a positive determination is made in all steps S5008 to S5010, power-on setting processing is executed (step S5012). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of a power outage flag is set to an initial value, and a command corresponding to the current gaming state is transmitted to the audio emission control device 81.

Although the main CPU 63 is configured to periodically execute timer interrupt processing, generation of timer interrupt processing is prohibited at the stage when main processing is started. This state in which generation of the timer interrupt process is prohibited is canceled at a timing when the process in step S5012 is completed and before the process in step S5013 is executed, and execution of the timer interrupt process is permitted. As a result, when the supply of operating power to the main CPU 63 is started, the power-on setting process in step S5012 is completed and the timer interrupt process is not executed until the stage before the process in step S5013 is started. Therefore, the main CPU 63 will not start the process for advancing the game until the situation is reached.

Thereafter, the process proceeds to the remaining processing of steps S5013 to S5016. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. Although this remaining time will vary depending on the processing completion time of each timer interrupt process, the remaining process from step S5013 to step S5016 is repeatedly executed using such irregular time. In this respect, it can be said that the remaining processing of steps S5013 to S5016 is non-regular processing that is executed non-regularly. In steps S5013 to S5016, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

On the other hand, if the reset button 68c is pressed (step S5003: YES) and all of steps S5004 to S5006 are answered in the affirmative, processing for updating the set value is executed. Specifically, first, a setting value copying process is executed (step S5017). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the setting value counter information is cleared to "0" in the setting value update clearing process (step S5018) to be executed subsequently, the information in the setting value counter before the setting value updating clearing process is executed. It becomes possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of operating power to the pachinko machine 10 is stopped).

Thereafter, a clearing process when updating settings is executed (step S5018). In the clearing process when updating the settings, the work area 221 for specific control is set to "0", except for the area indicating whether the win/fail lottery mode in the work area 221 for specific control is the high probability mode and the above-mentioned copy area. ” is cleared and initial settings are made for the area cleared to “0”. As a result, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in the closed state. A certain situation arises. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Furthermore, in the clearing process when updating the settings, the stack area 222 for specific control is cleared to "0" and initial settings are performed for the area cleared to "0". Furthermore, in the clearing process when updating the settings, a setting value counter used to specify the setting value of the pachinko machine 10 is cleared to "0". Further, in the clearing process when updating settings, initial settings are performed after various registers of the main CPU 63 are also cleared to "0".

On the other hand, in the clearing process when updating the settings, the area indicating whether the winning lottery mode is the high probability mode is not cleared to "0", so even if the setting value updating process (step S5019) is executed, the winning lottery mode will not be cleared. It becomes possible to maintain the pachinko machine 10 in the mode it was in before the supply of operating power to the pachinko machine 10 was stopped. Furthermore, since the copy area is not cleared to "0" in the clearing process when updating the settings, it becomes possible to specify the setting value that was set before the clearing process when updating the settings.

In the clearing process when updating settings, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if a setting value update process that can change the setting values of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

Thereafter, after executing setting value update processing in step S5019, the process moves to step S5012. The setting value update process will be explained below. FIG. 85 is a flowchart showing the setting value update process. Note that the processes from step S5101 to step S5114 in the setting value update process are executed by the main CPU 63 using a specific control program and specific control data.

First, a set value counter provided in the work area 221 for specific control is set to "1" (step S5101). The setting value counter is a counter used by the main CPU 63 to specify which setting value the setting state of the pachinko machine 10 is at. By setting "1" to the setting value counter, when the setting value update process is executed, the setting value becomes "setting 1" regardless of the previous setting value.

Thereafter, a setting value display start process is executed (step S5102). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number "1" corresponding to "setting 1" is displayed. When changing the setting value, the game hall manager can grasp the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

After that, it is determined whether one game ball is detected by the exit detection sensor 48a (step S5103). Specifically, it is determined whether the signal received from the outlet detection sensor 48a has switched from a LOW level to a HI level. If a negative determination is made in step S5103, it is determined whether the update button 68b has been pressed once (step S5104). Specifically, it is determined whether the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S5104, the process returns to step S5103, and it is determined whether one game ball has been detected by the exit detection sensor 48a.

If the update button 68b has been pressed once (step S5104: YES), the value of the set value counter in the specific control work area 221 is incremented by 1 (step S5105). Further, if the value of the set value counter after adding 1 exceeds "6" (step S5106: YES), the set value counter is set to "1" (step S5107). As a result, each time the update button 68b is pressed once, the set value is updated to one step higher, and if the update button 68b is pressed once in the situation of "Setting 6", it is changed to "Setting 1". I will be going back.

If a negative determination is made in step S5106, or if the process in step S5107 is executed, a setting value display update process is executed (step S5108). In the setting value display update process, the display of the third notification display device 69c is controlled so that a number corresponding to the value of the setting value counter in the work area 221 for specific control is displayed. By checking the third notification display device 69c, the game hall manager can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S5108, the process returns to step S5103, and it is determined whether one game ball is detected by the exit detection sensor 48a. If one game ball is not detected by the exit detection sensor 48a (step S5103: NO), the process from step S5104 onward is executed again. When one game ball is detected by the exit detection sensor 48a (step S5103: YES), it is determined whether the setting key insertion section 68a has been switched from the ON state to the OFF state (step S5109). In this case, instead of specifying whether or not the setting key insertion section 68a is in the OFF state, it is specified whether or not a switch has occurred from the ON state to the OFF state, and it is determined that the switch has occurred. If specified, an affirmative determination is made in step S5109.

If it has not been switched to the OFF state (step S5109: NO), the process of step S5109 is executed again. As a result, the process waits until the setting key insertion section 68a is turned off. If it is switched to the OFF state (step S5109: YES), a setting value display end process is executed (step S5110). In the set value display termination process, the display of the set values on the third notification display device 69c is terminated. In this case, the first to third notification display devices 69a to 69c start displaying information on various parameters stored in the calculation result storage area 234 provided in the work area 223 for non-specific control.

Thereafter, a setting value comparison process is executed (step S5111). In the setting value comparison process, it is determined whether the information on the setting value counter in the work area 221 for specific control matches the information stored in the copy area in the work area 221 for specific control. That is, it is determined whether or not the set value that was set before the supply of operating power to the pachinko machine 10 was stopped is the same as the set value that was set in the current set value update process.

If the setting value that was set before the supply of operating power to the pachinko machine 10 was stopped is the same as the setting value that was set in the current setting value update process (step S5112: NO), the A notification process at the time of change is executed (step S5113). In the non-change notification processing, a setting maintenance command indicating that the setting value has not been changed is transmitted to the audio emission control device 81. Upon receiving the setting maintenance command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the setting maintenance, and causes the speaker unit 54 to output a voice saying "Setting maintenance is maintained." Further, the character image "Settings are maintained" is displayed on the symbol display device 41.

These notifications are maintained until a notification execution period (for example, 10 seconds) has elapsed after the setting maintenance command is sent, and are terminated when the notification execution period has elapsed. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the administrator of the game hall can understand that the set value has been maintained. In addition, in the notification process when no change is made, the setting value is maintained by changing the display content on at least one of the first to third notification display devices 69a to 69c to the display content corresponding to setting maintenance. It may be configured to notify that the setting value has been maintained, or it may be configured to provide an external output indicating that the set value has been maintained.

If the setting value that was set before the supply of operating power to the pachinko machine 10 was stopped and the setting value that was set in the current setting value update process are not the same (step S5112: YES), the change is made. The time notification process is executed (step S5114). In the notification process at the time of change, a setting change command indicating that the setting value has been changed is transmitted to the audio emission control device 81. Upon receiving the setting change command, the audio light emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to the setting change, and causes the speaker section 54 to output a voice saying "Settings have been changed." Further, the character image "Settings are changed" is displayed on the symbol display device 41.

These notifications are maintained until a notification execution period (for example, 10 seconds) has elapsed after the setting change command is sent, and are terminated when the notification execution period has elapsed. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By checking the above-mentioned notification, the administrator of the game hall can understand that the set value has been changed. In addition, in the notification processing at the time of change, it is determined that the setting value has been changed by changing the display content on at least one of the first to third notification display devices 69a to 69c to the display content corresponding to the setting change. The configuration may be configured to notify the user of the changes, or the configuration may be configured to provide an external output indicating that the set value has been changed.

As described above, in order to execute the setting value update process in this embodiment, not only the setting key insertion part 68a is turned on, but also the reset button 68c is pressed, and the front door frame 14 is in the open state. Therefore, the gaming machine main body 12 must be in an open state. Thereby, even if an attempt is made to illegally execute the setting value update process, it becomes difficult to do so.

Further, in order to execute the setting value update process, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to fraudulently execute the setting value update process, the fraudulent act will be noticeable because the front door frame 14 and the gaming machine main body 12 are open, and the gaming hall manager will It becomes easier to detect fraudulent activity.

In particular, in order to execute the setting value update process, it is necessary not only to open the gaming machine main body 12 to expose the main controller 60, but also to open the front door frame 14. It is possible to make the work of the above-mentioned fraudulent act complicated, and it is also possible to make the above-mentioned fraudulent act noticeable.

In addition, in a configuration in which the process for proceeding with the game does not return if the setting value update process is not completed, in order to finalize the setting value selected in the setting value update process and end the setting value update process, It is necessary to enter the game ball into the out port 24a and have the out port detection sensor 48a detect the game ball, and then turn off the setting key insertion part 68a. This makes it possible to make it difficult to perform an operation to terminate the setting value update process and return to the process for proceeding with the game, even if the setting value update process is executed fraudulently.

Also, the setting value that was set before the supply of operating power to the pachinko machine 10 was stopped and the setting value selected in the setting value update process are compared, and whether or not the two setting values are the same is determined. A corresponding notification is executed. Thereby, the administrator of the game hall can easily understand whether or not the setting value has been changed by the setting value update process.

FIG. 86 is a flowchart showing timer interrupt processing in this embodiment executed by the main CPU 63. The timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes in steps S5013 to S5016 are being executed in the main process (FIG. 84). Note that the program corresponding to timer interrupt processing is set as a specific control program.

In steps S5201 to S5205, the same processes as steps S301 to S305 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a specific control program and specific control data.

Thereafter, a setting confirmation process is executed (step S5206). When executing the settings confirmation process, a subroutine program corresponding to the settings confirmation process set in the specific control program will be executed; Information for specifying the return address of the timer interrupt process after execution of is written to the stack area 222 for specific control by a push instruction. When the setting confirmation process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process indicated by the return address.

FIG. 87 is a flowchart showing the setting confirmation process. Note that the processing from step S5301 to step S5312 in the setting confirmation processing is executed by the main CPU 63 using a specific control program and specific control data.

First, it is determined whether the third notification display device 69c is displaying a setting value corresponding to the information of the setting value counter in the specific control work area 221 (step S5301). If a negative determination is made in step S5301, it is determined whether the mode is neither the game time nor the opening/closing execution mode (step S5302), and the symbol change display time in the general figure display section 38a and the general electric accessory 34a are opened. It is determined whether the state is in any of the normal power open states that can occur (step S5303), it is determined whether the front door frame 14 is in the open state with respect to the inner frame 13 (step S5304), and the outer frame 11, it is determined whether the gaming machine main body 12 is in an open state (step S5305), and it is determined whether the setting key insertion section 68a is turned on (step S5306). The determination as to whether the front door frame 14 is in the open state is made based on the detection result of the front door open sensor 95 similarly to step S5005 in the main process (FIG. 84), and the determination as to whether the gaming machine main body 12 is in the open state is made based on the detection result of the front door open sensor 95. This determination is made based on the detection result of the main body open sensor 96, similar to step S5006 in the main process (FIG. 84).

If a negative determination is made in any of steps S5302 to S5306, this setting confirmation process ends without executing the processes in steps S5307 to S5309. If a positive determination is made in all of steps S5302 to S5306, a process to start displaying set values is executed (step S5307). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number of the setting value corresponding to the information of the setting value counter in the work area 221 for specific control is displayed. When checking the setting values, the game hall manager can grasp the current setting state of the pachinko machine 10 by visually checking the third notification display device 69c.

Thereafter, the game stop flag provided in the work area 221 for specific control is set to "1" (step S5308). The game stop flag is set in a situation where an affirmative determination is made in step S5207 in the timer interrupt process (FIG. 86) and the processes in steps S5208 to S5221 are not executed, that is, in a situation where execution of the process for advancing the game should be stopped. This flag is used by the main CPU 63 to specify whether or not there is a flag. By setting the game stop flag to "1", an affirmative determination is made in step S5207 of the timer interrupt process (FIG. 86), resulting in a situation in which the processes in steps S5208 to S5221 are not executed. As a result, the setting value is confirmed in a situation where the execution of the process for advancing the game is stopped. However, even in a situation where the game stop flag is set to "1", steps S5201 to S5205 in the timer interrupt process (FIG. 86) are executed, so the setting value is checked. Even if it is, power outage monitoring is executed, and the winning random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI are updated, and further fraud detection is executed.

Thereafter, a confirmation notification start command is transmitted to the audio emission control device 81 (step S5309). By receiving the confirmation notification start command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the setting confirmation, and causes the speaker unit 54 to output a voice saying “Setting confirmation is in progress.” . In addition, the symbol display device 41 displays a text image saying "Settings are being confirmed." These notifications are continued until a confirmation notification end command is received from the main CPU 63. Note that a configuration may be adopted in which an external output indicating that the set value is being checked is provided.

As mentioned above, on the condition that it is not in either the game cycle or the opening/closing execution mode, and furthermore, it is not in either the cycle of displaying the fluctuation of the symbol in the ordinary figure display section 38a or the ordinary electricity open state in which the ordinary electric accessory 34a can be in the open state. By displaying the display for checking the set value on the third notification display device 69c, it is possible to prevent the work of checking the set value from being performed while a game is being played. It becomes possible.

In addition, in order to display the setting value on the third notification display device 69c, it is necessary not only to turn on the setting key insertion part 68a but also to make the front door frame 14 open. Therefore, the gaming machine main body 12 must be in an open state. Thereby, even if an attempt is made to fraudulently display a setting value confirmation display, it becomes difficult to do so.

Further, in order to display a display for confirming the set value on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to fraudulently display a setting value confirmation display, the front door frame 14 and the gaming machine main body 12 are in an open state, so the fraudulent act will be noticeable, and the gaming hall management This makes it easier for those involved to discover the fraudulent activity.

In particular, in order to display the setting value on the third notification display device 69c, it is necessary to perform not only the opening operation of the game machine main body 12 necessary to expose the main control device 60 but also By also requiring an opening operation of the front door frame 14, it becomes possible to make the work of the above-mentioned fraudulent act complicated, and it becomes possible to make the above-mentioned fraudulent act conspicuous.

If an affirmative determination is made in step S5301, it is determined whether the setting key insertion section 68a is turned off (step S5310). If the OFF operation has been performed (step S5310: YES), the game stop flag in the work area 221 for specific control is cleared to "0" (step S5311). As a result, a negative determination is made in step S5207 of the timer interrupt process (FIG. 86), resulting in a situation in which the processes in steps S5208 to S5221 are executed. As a result, the state in which execution of the process for advancing the game is stopped is released.

Thereafter, a confirmation notification end command is transmitted to the audio emission control device 81 (step S5312). By receiving the confirmation notification end command, the audio light emission control device 81 ends the notification indicating that the setting values in the symbol display device 41, the display light emitting section 53, and the speaker section 54 are being confirmed.

Returning to the explanation of the timer interrupt process (FIG. 86), after finishing the setting confirmation process in step S5206, it is determined whether the game is stopped (step S5207). In this case, if the game stop flag in the work area 221 for specific control is set to "1" in the setting confirmation process in step S5206, an affirmative determination is made in step S5207, and steps S5208 to S5221 are performed. No processing is performed. Furthermore, even if the occurrence of fraud is detected in the fraud detection process in step S5205, an affirmative determination is made in step S5207 and the processes in steps S5208 to S5221 are not executed.

In steps S5208 to S5219, the same processes as steps S307 to S318 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a specific control program and specific control data. Further, in step S5221, the same process as step S3719 of the timer interrupt process (FIG. 69) in the fifteenth embodiment is executed.

On the other hand, in step S5220, RAM monitoring processing is executed. When executing the RAM monitoring process, a subroutine program corresponding to the RAM monitoring process set in the specific control program will be executed. Information for specifying the return address of the timer interrupt processing in is written to the stack area 222 for specific control by a push instruction. Then, when the RAM monitoring process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process indicated by the return address.

FIG. 88 is a flowchart showing RAM monitoring processing. Note that the processing from step S5401 to step S5412 in the RAM monitoring process is executed by the main CPU 63 using a specific control program and specific control data.

First, monitoring processing of the work area 221 for specific control is executed (step S5401). In this monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the specific control work area 221 due to noise or the like. This monitoring method is arbitrary, but for example, in the work area 221 for specific control, check whether the state of the storage area to which information is not written due to various controls in the main CPU 63 is different from the initial state. One method is to monitor the system and determine that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is set to the value "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is set to "1". ”, it is determined that an abnormality has occurred if the storage area has a value of “0”. Furthermore, in addition to the monitoring method described above, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined in step S5401 that there is an abnormality (step S5402: YES), the processes of steps S5409 to S5412 are executed. If it is determined in step S5401 that there is no abnormality (step S5402: NO), the process advances to step S5403.

In step S5403, monitoring processing of the stack area 222 for specific control is executed. In this monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the stack area 222 for specific control due to noise or the like. This monitoring method is arbitrary, but for example, in the stack area 222 for specific control, check whether the state of the storage area to which information is not written due to various controls in the main CPU 63 is different from the initial state. One method is to monitor the system and determine that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is set to the value "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is set to "1". ”, it is determined that an abnormality has occurred if the storage area has a value of “0”. Furthermore, in addition to the monitoring method described above, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined in step S5403 that there is an abnormality (step S5404: YES), the processes of steps S5409 to S5412 are executed. If it is determined in step S5403 that there is no abnormality (step S5404: NO), the process advances to step S5405.

In step S5405, monitoring processing of the work area 223 for non-specific control is executed. In this monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the non-specific control work area 223 due to noise or the like. This monitoring method is arbitrary, but for example, in the work area 223 for non-specific control, check whether the state of the storage area to which information is not written due to various controls in the main CPU 63 is different from the initial state. One method is to monitor this and determine that an abnormality has occurred if the state is different from the initial state. In this case, if the initial state of the storage area is set to the value "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is set to "1". ”, it is determined that an abnormality has occurred if the storage area has a value of “0”. Furthermore, in addition to the monitoring method described above, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined in step S5405 that there is an abnormality (step S5406: YES), the processes of steps S5409 to S5412 are executed. If it is determined in step S5405 that there is no abnormality (step S5406: NO), the process advances to step S5407.

In step S5407, monitoring processing of the stack area 224 for non-specific control is executed. In this monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the stack area 224 for non-specific control due to noise or the like. This monitoring method is arbitrary, but for example, in the stack area 224 for non-specific control, check whether the state of the storage area to which information is not written due to various controls in the main CPU 63 is different from the initial state. One method is to monitor this and determine that an abnormality has occurred if the state is different from the initial state. In this case, if the initial state of the storage area is set to the value "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is set to "1". ”, it is determined that an abnormality has occurred if the storage area has a value of “0”. Furthermore, in addition to the monitoring method described above, a configuration may be adopted in which it is determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined in step S5407 that there is an abnormality (step S5408: YES), the processes in steps S5409 to S5412 are executed. Specifically, first, a setting value copy process is executed (step S5409). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the information of the set value counter is cleared to "0" in the abnormality clearing process (step S5410) to be executed subsequently, this pachinko machine 10 before the abnormality clearing process is executed. It becomes possible to grasp the setting value of.

Thereafter, a clearing process in the event of an abnormality is executed (step S5410). In the clearing process at the time of abnormality, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control, the work area 223 for non-specific control, and the stack for non-specific control are cleared to "0". Clear area 224 to "0". Initial settings are also performed after clearing to "0". In other words, in the RAM monitoring process, an abnormality occurs in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. If it is determined that the work area 221 for specific control is cleared to "0" excluding the copy area, the stack area 222 for specific control, the work area 223 for non-specific control, and the work area 223 for non-specific control are cleared to "0". The stack area 224 of is cleared to "0". As a result, if there is a possibility that some kind of information abnormality has occurred in the main RAM 65, neither the process corresponding to specific control nor the process corresponding to non-specific control will be executed in the same state. It becomes possible to do so.

Note that if the stack area 222 for specific control is cleared to "0", the information on the return address after execution of the RAM monitoring process will also be erased. Therefore, when the stack area 222 for specific control is cleared to "0", after the process of step S5412 is completed, the program is uniquely returned to the predetermined program. Specifically, the configuration is such that the process returns uniquely to the process of step S5013 in the main process (FIG. 22). However, the program that uniquely returns is not limited to step S5013, but may be step S5221 in the timer interrupt process (FIG. 86). Further, when the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 222 for specific control.

Thereafter, an abnormality command indicating that abnormality clear processing has occurred is transmitted to the audio emission control device 81 (step S5411). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to forced clearing, and causes the speaker section 54 to output a voice saying "Forcibly cleared." Further, the character image "Forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above-mentioned notification, the administrator of the game hall can understand that the main side RAM 65 has been forcibly cleared.

Thereafter, setting value update processing is executed (step S5412). In other words, if clearing processing occurs in the event of an abnormality, the setting value counter in the work area 221 for specific control will be cleared to "0", so the setting value of the pachinko machine 10 must be reset. To do this, execute setting value update processing. The contents of the setting value update process are the same as step S5019 of the main process (FIG. 84). Therefore, each time the update button 68b is pressed once, the set value is updated by one step, and the currently selected set value is determined by detecting a game ball with the exit detection sensor 48a. The setting values that are being updated and the set values that have been finalized are displayed on the third notification display device 69c. Thereafter, when the setting key insertion section 68a is switched from the ON state to the OFF state, it is determined that the termination condition for the setting value update process is satisfied.

Here, it is not determined that the end condition is met just by the setting key insertion section 68a being in the OFF state, but when the setting key insertion section 68a is switched from the ON state to the OFF state, the end condition is satisfied. It is determined that it has been established. When the setting value update process is executed in the RAM monitoring process (FIG. 88), the setting key insertion section 68a is in the OFF state at the start of the setting value update process, so the termination conditions for the setting value update process are not set. In order to establish this, it is necessary to insert a setting key into the setting key insertion section 68a, perform an ON operation once, and then perform an OFF operation. This makes it possible to prevent the setting value update process from ending even though the administrator of the gaming hall has not performed a proper operation.

When the setting key insertion section 68a is switched from the ON state to the OFF state and the termination condition for the setting value update process is satisfied, step S5111 in the setting value update process (FIG. 85) is executed. It is compared whether the set value stored in the copy area in the work area 221 for specific control and the set value currently set in the set value counter in the work area 221 for specific control are the same. That is, it is determined whether the setting value set before the abnormality clearing process (step S5410) is executed and the setting value set in the current setting value update process are the same. If both setting values are the same (step S5112: NO), the setting maintenance notification described above is performed by executing the process for notification when no change is made (step S5113). On the other hand, if the two setting values are different (step S5112: YES), the setting change notification described above is performed by executing the process for notification at the time of change (step S5114).

According to this embodiment described in detail above, the following excellent effects are achieved.

In order to execute the setting value update process when the supply of operating power to the pachinko machine 10 is started, not only the setting key insertion part 68a is turned on, but also the reset button 68c is pressed. , the front door frame 14 must be in an open state, and the gaming machine main body 12 must be in an open state. Thereby, even if an attempt is made to illegally execute the setting value update process, it becomes difficult to do so.

In order to execute the setting value update process, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to fraudulently execute the setting value update process, the fraudulent act will be noticeable because the front door frame 14 and the gaming machine main body 12 are open, and the gaming hall manager will It becomes easier to detect fraudulent activities.

In particular, in order to execute the setting value update process, it is necessary not only to open the gaming machine main body 12 to expose the main controller 60, but also to open the front door frame 14. It is possible to make the work of the above-mentioned fraudulent act complicated, and it is also possible to make the above-mentioned fraudulent act noticeable.

In a configuration that does not return to the process for advancing the game if the setting value update process is not completed, in order to finalize the setting value selected in the setting value update process and end the setting value update process, it is necessary to It is necessary to insert a game ball into the ball 24a, cause the out-port detection sensor 48a to detect the game ball, and then turn off the setting key insertion part 68a. This makes it possible to make it difficult to perform an operation to terminate the setting value update process and return to the process for proceeding with the game, even if the setting value update process is executed fraudulently.

The setting value that was set before the supply of operating power to the pachinko machine 10 was stopped is compared with the setting value selected in the setting value update process, and it is determined whether the two setting values are the same. A corresponding notification is executed. Thereby, the administrator of the game hall can easily understand whether or not the setting value has been changed by the setting value update process.

The setting value is set on the condition that it is neither the game time nor the opening/closing execution mode, nor is the symbol change display time in the general figure display section 38a nor the general electric open state in which the general electric accessory 34a can be in an open state. By displaying the display for confirmation on the third notification display device 69c, it is possible to prevent the setting value confirmation work from being performed while a game is being played. .

In order to display a display for confirming the set value on the third notification display device 69c, not only the setting key insertion section 68a is turned on, but also the front door frame 14 is opened. The game machine main body 12 must be in an open state. Thereby, even if an attempt is made to fraudulently display a setting value confirmation display, it becomes difficult to do so.

In order to display the setting value on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to fraudulently display a setting value confirmation display, the front door frame 14 and gaming machine main body 12 are in an open state, so the fraudulent act will be noticeable, and the gaming hall management This makes it easier for those involved to discover the fraudulent activity.

In particular, in order to display the setting value on the third notification display device 69c, it is necessary to perform not only the opening operation of the gaming machine main body 12 necessary to expose the main control device 60 but also By also requiring an operation to open the front door frame 14, it becomes possible to make the work of the above-mentioned fraudulent act complicated, and it becomes possible to make the above-mentioned fraudulent act noticeable.

When it is determined that an abnormality has occurred in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. clears the work area 221 for specific control to "0" except for the copy area, and also clears the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control to "0". "clear. As a result, if there is a possibility that some kind of information abnormality has occurred in the main RAM 65, both the processing corresponding to specific control and the processing corresponding to non-specific control are executed in the same state. This makes it possible to prevent this from happening.

In the process corresponding to specific control, an information error occurs not only in the work area 221 for specific control and the stack area 222 for specific control, but also in the work area 223 for non-specific control and the stack area 224 for non-specific control. It will be monitored whether or not they are doing so. This makes it possible to simplify the processing configuration compared to a configuration in which processing corresponding to specific control and processing corresponding to non-specific control are separated to monitor whether or not an information abnormality has occurred.

When it is determined that an abnormality has occurred in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. In the process corresponding to specific control, not only the work area 221 for specific control and the stack area 222 for specific control, but also the work area 223 for non-specific control and the stack area 224 for non-specific control are set to "0". ” will be cleared. This makes it possible to simplify the processing configuration compared to a configuration in which "0" clearing is performed separately for processing corresponding to specific control and processing corresponding to non-specific control.

When an abnormality clearing process is executed due to an information abnormality occurring, a setting value update process is executed. This makes it possible to prevent the game from proceeding even though the set value has not been set. In this case, if the setting value that was set before the abnormality clearing process was executed is the same as the setting value that was set in the setting value update process after the abnormality clearing process was executed. Setting maintenance notification is performed. As a result, even if clear processing is executed in the event of an abnormality, setting maintenance notification will be performed by resetting the setting value that was set in the previous situation. It is also possible to clearly indicate to the player that the set value has not changed. By the way, since it is common in gaming halls to record the setting values of each pachinko machine 10 installed, the setting value update process is performed after executing the clearing process in the event of an abnormality so that the recorded setting values become the same. It is possible to execute

Note that the conditions for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started may be different from those in the above embodiment. FIG. 89 is a flowchart showing another form of main processing. In the main processing, steps S5501 to S5506 and steps S5508 to S5520 are the same as steps S5001 to S5019 of the main processing (FIG. 84) in the above embodiment. On the other hand, in the main processing, it is determined in step S5507 whether the operating handle of the firing operation device 28 operated to launch the game ball into the gaming area PA has been rotated from the initial rotation position. Then, the reset button 68c is pressed (step S5503: YES), the setting key insertion part 68a is turned on (step S5504: YES), and the front door frame 14 is in an open state with respect to the inner frame 13. (Step S5505: YES), the game machine main body 12 is in an open state with respect to the outer frame 11 (Step S5506: YES), and the operation handle of the firing operation device 28 is rotated from the initial rotation position. If so (step S5507: YES), setting value update processing (step S5520) is executed. As a result, in order to execute the setting value update process when the supply of operating power to the pachinko machine 10 is started, it is necessary not only to insert the setting key into the setting key insertion section 68a and perform the ON operation, but also to perform the ON operation. It is necessary to start supplying operating power to the pachinko machine 10 while the operating handle of the operating device 28 is being rotated. Therefore, it is possible to make it difficult to illegally change the setting value. Note that in step S5507, instead of determining whether or not the operating handle of the firing operating device 28 has been rotated from the initial rotation position, it is determined whether the firing operating device 28 is being touched by the player. It may also be a configuration.

In addition, the conditions for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started are that the front door frame 14 is in an open state with respect to the inner frame 13 and that the outer door frame 14 is in an open state with respect to the inner frame 13. Although the configuration is such that both conditions are set, that the gaming machine main body 12 is in an open state with respect to the frame 11, a configuration may be adopted in which only one of these conditions is set.

In addition, the configuration is such that the reset button 68c is pressed as a condition for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started. However, a configuration may be adopted in which this condition is not set.

In addition, as a condition for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started, the operation to the pachinko machine 10 is performed in a situation where a game ball is detected by the gate detection sensor 49a. The configuration may be such that a condition is set that power supply has started. As a result, in order to execute the setting value update process when the supply of operating power to the pachinko machine 10 is started, it is necessary not only to insert the setting key into the setting key insertion section 68a and perform the ON operation, but also to perform the ON operation. It becomes necessary to start supplying operating power to the pachinko machine 10 while the game balls are retained at the gate 35. Therefore, it is possible to make it difficult to illegally change the setting value.

Further, the content of the operation for finalizing the setting value in the setting value update process may be different from that in the above embodiment. FIG. 90 is a flowchart showing another example of setting value update processing. In the setting value update process, steps S5601 to S5602 and steps S5604 to S5614 execute the same processes as steps S5101 to S5102 and steps S5104 to S5114 of the setting value update process (FIG. 85) in the above embodiment. . On the other hand, in step S5603, in the setting value update process, instead of determining whether or not the exit detection sensor 48a has detected a game ball, the ON signal is continuously output from the gate detection sensor 49a. It is determined whether the ON duration period is equal to or longer than the end reference period (specifically, 5 seconds). If an affirmative determination is made in step S5603, the currently selected setting value is determined and the process advances to step S5609. According to this configuration, in order to confirm the selected setting value, it is necessary to intentionally keep the game ball in the through gate 35 for a period longer than the end reference period. Game balls staying in the through gate 35 for longer than the end reference period does not occur in a situation where a normal game is being played. Thereby, it is possible to make the conditions for determining the currently selected setting value not satisfied or difficult to be satisfied in a situation where a normal game is being played. Further, even if the setting value update process is started by fraud, it is possible to make it difficult to perform an operation to confirm the selected setting value in the setting value update process.

Furthermore, in the setting value update process, the selected setting value may be determined when the operating handle of the firing operating device 28 is rotated from the initial rotation position, and the firing operating device 28 may be touched by the player. The configuration may be such that the currently selected setting value is finalized when the selected setting value is selected.

In addition, in the setting value update process, when the special electric detection sensor 45a detects that a game ball enters the special electric winning device 32 provided with an opening/closing member, the selected setting value is determined. Often, the setting value being selected may be configured to be determined when the second operating port detection sensor 47a detects that a game ball enters the second operating port 34 provided with the opening/closing member. In this case, in order to confirm the selected setting value, it is necessary to manually open the target ball entry part and then clean the game ball, making it difficult to illegally change the setting value. becomes possible.

In addition, in the setting value update process, selection is made based on the fact that it is detected that a game ball enters the second ball entry section after it is detected that the game ball enters the first ball entry section. It is also possible to adopt a configuration in which the set values inside are fixed. In this case, in order to confirm the selected setting value, it is necessary to enter the game balls into multiple ball entry sections in a predetermined order, making it difficult to illegally change the setting value. becomes possible. In this case, the first ball entry section and the second ball entry section are both ball entry sections that are not provided with an opening/closing member, so that the workability of regular work will not be extremely reduced. It becomes possible to do so.

Furthermore, in the setting value updating process, the setting key insertion section 68a may be switched from the ON state to the OFF state, thereby confirming the selected setting value and satisfying the termination condition for the setting value updating process.

Further, in the setting value update process, the operation for updating the setting value by one step is not limited to the configuration in which the update button 68b is pressed, and the setting value is changed by one step by pressing the reset button 68c. The configuration may be updated.

Further, when the supply of operating power to the pachinko machine 10 is started in a situation where the reset button 68c is pressed and the setting key insertion part 68a is turned on by the setting key, If the front door frame 14 is not in an open state with respect to the frame 13 or if the gaming machine main body 12 is not in an open state with respect to the outer frame 11, the clearing process at the time of non-setting update (step S5007) is configured to be executed. The present invention is not limited to this, and a configuration may be adopted in which the clearing process is not executed at the time of non-setting update. This makes it possible to prevent the clearing process at the time of non-setting update from being executed against the will of the manager of the gaming hall.

In addition, when the supply of operating power to the pachinko machine 10 is started in a situation where the reset button 68c is pressed and the setting key insertion part 68a is not turned on by the setting key, If the front door frame 14 is not in an open state with respect to the frame 13 or if the gaming machine main body 12 is not in an open state with respect to the outer frame 11, the clearing process at the time of non-setting update (step S5007) is configured to be executed. The present invention is not limited to this, and a configuration may be adopted in which the clearing process is not executed at the time of non-setting update. As a result, even if an unauthorized person tries to execute the clearing process at the time of non-setting update, it becomes difficult to do so.

<23rd embodiment>
This embodiment is different from the twenty-second embodiment described above in the processing configuration of the main process. Hereinafter, the configuration that is different from the twenty-second embodiment described above will be explained. Note that descriptions of the same configurations as those in the twenty-second embodiment will be basically omitted.

FIG. 91 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S5701 to step S5720 in the main processing is executed by the main CPU 63 using a specific control program and specific control data.

First, power-on wait processing is executed (step S5701). In the power-on wait process, for example, the main process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. The operation start and initial setting of the symbol display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S5702).

Thereafter, it is determined whether the front door frame 14 is in an open state with respect to the inner frame 13 based on the detection result of the front door open sensor 95 (step S5703), and the outer frame 14 is determined based on the detection result of the main body open sensor 96. It is determined whether or not the game machine main body 12 is in an open state (step S5704), and it is determined whether or not the reset button 68c is pressed (step S5705). If a negative determination is made in any of steps S5703 to S5705, the processes of steps S5706 to S5714 are executed. These steps S5706 to S5714 are the same as steps S5008 to S5016 of the main process (FIG. 84) in the twenty-second embodiment.

If a positive determination is made in all of steps S5703 to S5705, selection processing is executed (step S5715). In the selection process, either a situation where clear processing is executed during non-setting update and setting value update processing is not executed, or a situation where clear processing is executed when setting update is executed and setting value update processing is executed. A process is executed to determine whether the game hall is a game hall manager based on a selection operation by the game hall manager. Specifically, each time the update button 68b is pressed once, the state in which one of the above situations is selected is switched to the state in which the other situation is selected. Note that the selection operation may be performed by operating the reset button 68c, or may be performed by operating another operating section. In addition, if a situation is selected in which the clear process is executed during non-setting update and the setting value update process is not executed, "O" is displayed on the first notification display device 69a, and the second notification display device 69b is displayed. And when the third notification display device 69c is turned off and the setting value update process is selected, the second notification display device 69b is set to “O”. is displayed, and the first notification display device 69a and the third notification display device 69c are turned off. In addition, if the reset button 68c is continuously pressed for more than the confirmation selection period (specifically 10 seconds), the selected situation among the above situations is confirmed as the current selection target. do.

In addition, if the update button 68b is pressed continuously for more than the confirmation selection period (specifically, 10 seconds), the selected situation among the above situations is confirmed as the current selection target. It may also be configured such that if the other operation part is pressed continuously for more than a fixed selection period (specifically 10 seconds), the selected situation among the above situations is selected as the current selection. It may also be configured to be determined as a target. Alternatively, a configuration may be adopted in which the selected situation among the above-mentioned situations is determined as the current selection target by rotating the operating handle of the firing operating device 28.

In the selection processing, if a situation in which the clearing process is executed during non-setting update and the setting value updating process is not executed is confirmed as the current selection target (step S5716: NO), the clearing process during non-setting updating is executed. (Step S5717). The contents of the clearing process at the time of non-setting update are the same as step S5007 of the main process (FIG. 84) in the twenty-second embodiment.

In the selection process, if the situation in which the clear process at the time of setting update is executed and the setting value update process is confirmed as the current selection target (step S5716: YES), the setting value copy process is executed (step S5718), clear processing at the time of setting update is executed (step S5719), and setting value update processing is executed (step S5720). The processing contents of steps S5718 to S5720 are the same as steps S5017 to S5019 of the main processing (FIG. 84) in the twenty-second embodiment.

According to the above configuration, even in a configuration where the setting key insertion section 68a is not provided, the clearing process is executed when the setting is not updated and the setting value updating process is not executed, and the clearing process is executed when the setting is updated. At the same time, it becomes possible for the game hall manager to select which of the situations the setting value update process is to be executed.

Furthermore, not only when executing the setting value update process but also when executing the clear process when the setting is not updated, operating power is not supplied to the pachinko machine 10 in a situation where the reset button 68c is pressed. In addition to starting the game, it is necessary to open the front door frame 14 to the inner frame 13 and to open the gaming machine main body 12 to the outer frame 11. As a result, even if an unauthorized person attempts to execute the clearing process at the time of non-setting update, it becomes difficult to do so.

Note that the conditions for the selection process to be executed when the supply of operating power to the pachinko machine 10 is started are that the front door frame 14 is in an open state with respect to the inner frame 13 and that the outer frame is in an open state. Although the configuration has been described in which both the conditions that the game machine main body 12 is in an open state for the game machine 11 are set, a configuration may be adopted in which only one of these conditions is set.

Furthermore, as a condition for executing the selection process when the supply of operating power to the pachinko machine 10 is started, a condition is added that the firing handle of the firing operation device 28 is rotated. It may be a configuration in which a condition is added that the firing operation device 28 is touched, or a configuration in which a condition is added that the game ball is detected by the gate detection sensor 49a. Good too.

<24th embodiment>
This embodiment is different from the twenty-second embodiment described above in the processing configuration of the RAM monitoring process. Hereinafter, the configuration that is different from the twenty-second embodiment described above will be explained. Note that descriptions of the same configurations as those in the twenty-second embodiment will be basically omitted.

FIG. 92 is a flowchart showing the RAM monitoring process in this embodiment executed by the main CPU 63. Note that the processes from step S5801 to step S5814 in the RAM monitoring process are executed by the main CPU 63 using a specific control program and specific control data.

First, monitoring processing of the work area 221 for specific control is executed (step S5801). The contents of the monitoring process are the same as step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5801 that there is an abnormality (step S5802: YES), the processes of steps S5805 to S5808 are executed.

If it is determined in step S5801 that there is no abnormality (step S5802: NO), monitoring processing of the stack area 222 for specific control is executed (step S5803). The contents of the monitoring process are the same as step S5403 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5803 that there is an abnormality (step S5804: YES), the processes of steps S5805 to S5808 are executed.

More specifically, regarding the processing in steps S5805 to S5808, first, a setting value copying process is executed (step S5805). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the information of the set value counter is cleared to "0" in the abnormality clearing process (step S5806) to be executed subsequently, this pachinko machine 10 before the abnormality clearing process is executed. It becomes possible to understand the setting value of.

Thereafter, a clearing process in the event of an abnormality is executed (step S5806). In the clearing process at the time of abnormality, the work area 221 for specific control except for the copy area is cleared to "0", and the stack area 222 for specific control is cleared to "0". Initial settings are also performed after clearing to "0". On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". In other words, in the RAM monitoring process in this embodiment, if it is determined that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the specific control is performed except for the copy area. The work area 221 for specific control is cleared to "0", and the stack area 222 for specific control is cleared to "0". As a result, if there is a possibility that some kind of information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control will be executed in the same state. This makes it possible to prevent this from happening. Furthermore, even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". As a result, the work area 223 for non-specific control and the stack area 224 for non-specific control will be cleared to "0" when an information error occurs in the work area 221 for specific control or the stack area 222 for specific control. It is possible to prevent this from occurring.

Note that if the stack area 222 for specific control is cleared to "0", the information on the return address after execution of the RAM monitoring process will also be erased. Therefore, when the stack area 222 for specific control is cleared to "0", after the process in step S5808 is finished, the process returns to the predetermined program. Specifically, the configuration is such that the process returns uniquely to the process of step S5013 in the main process (FIG. 22). However, the program that uniquely returns is not limited to step S5013, but may be step S5221 in the timer interrupt process (FIG. 86). Further, when the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 222 for specific control.

Thereafter, an abnormality command indicating that abnormality clear processing has occurred is transmitted to the audio emission control device 81 (step S5807). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to forced clearing, and causes the speaker section 54 to output a voice saying "Forcibly cleared." Further, the character image "Forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the gaming hall can understand that the work area 221 for specific control and the stack area 222 for specific control have been forcibly cleared.

Thereafter, setting value update processing is executed (step S5808). The contents of the setting value update process are the same as step S5412 in the RAM monitoring process (FIG. 88) in the twenty-second embodiment.

If it is determined that there is no abnormality in both step S5801 and step S5803 (step S5802 and step S5804: NO), monitoring processing of the work area 223 for non-specific control is executed (step S5809). The contents of the monitoring process are the same as step S5405 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5809 that there is an abnormality (step S5810: YES), the work area 223 for non-specific control is cleared to "0" and initial settings are performed (step S5811). In this case, the normal counter area 231, the opening/closing execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control.

On the other hand, in step S5811, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are 0” can be prevented from being cleared.

Note that in step S5811, although the normal counter area 231, the open/close execution mode counter area 232, the high-frequency support mode counter area 233, and the calculation result storage area 234 are cleared to "0", the management start flag is not cleared to "0". It may also be a configuration. In addition, in step S5811, although the normal counter area 231, the open/close execution mode counter area 232, the high-frequency support mode counter area 233, and the management start flag are cleared to "0", the calculation result storage area 234 is not cleared to "0". It may also be a configuration. In addition, in step S5811, although the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233 are cleared to "0", the calculation result storage area 234 and the management start flag are not cleared to "0". It may also be a configuration.

If a negative determination is made in step S5810 or if the process in step S5811 is executed, a process for monitoring the stack area 224 for non-specific control is executed (step S5812). The contents of the monitoring process are the same as step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5812 that there is an abnormality (step S5813: YES), the stack area 224 for non-specific control is cleared to "0" and initial settings are performed (step S5814). This makes it possible to eliminate information abnormalities in the stack area 224 for non-specific control.

On the other hand, in step S5814, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are 0” can be prevented from being cleared.

According to the above configuration, when it is determined that an abnormality has occurred in either the specific control work area 221 or the specific control stack area 222, the specific control work area 221 excluding the copy area is cleared to "0" and the stack area 222 for specific control is cleared to "0". As a result, if there is a possibility that some kind of information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control will be executed in the same state. This makes it possible to prevent this from happening.

Even if an information abnormality occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". This prevents the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" due to an information error in the work area 221 for specific control or the stack area 222 for specific control. It becomes possible to do so.

Even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". This prevents the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control from being cleared to "0" due to an information abnormality in the work area 223 for non-specific control. becomes possible.

Even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". This prevents the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control from being cleared to "0" due to an information abnormality in the stack area 224 for non-specific control. becomes possible.

Note that if an information abnormality has occurred in the work area 221 for specific control, the work area 221 for specific control is cleared to "0" except for the copy area, while the stack area 222 for specific control is cleared to "0". 0" may not be cleared.

In addition, when an information abnormality occurs in the stack area 222 for specific control, the stack area 222 for specific control is cleared to "0", but the work area 221 for specific control is not cleared to "0". You can also use it as In this case, even if the stack area 222 for specific control is cleared to "0", the process of steps S5805 to S5808 may not be executed.

<25th embodiment>
This embodiment differs from the twenty-second embodiment in the processing configuration for monitoring whether an information abnormality has occurred in each of the areas 221 to 224 of the main side RAM 65. Hereinafter, the configuration that is different from the twenty-second embodiment described above will be explained. Note that descriptions of the same configurations as those in the twenty-second embodiment will be basically omitted.

FIG. 93 is a flowchart showing the RAM monitoring process in this embodiment executed by the main CPU 63. Note that the processes from step S5901 to step S5908 in the RAM monitoring process are executed by the main CPU 63 using a specific control program and specific control data.

First, monitoring processing of the work area 221 for specific control is executed (step S5901). The contents of the monitoring process are the same as step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5901 that there is an abnormality (step S5902: YES), the processes of steps S5905 to S5908 are executed.

If it is determined in step S5901 that there is no abnormality (step S5902: NO), monitoring processing of the stack area 222 for specific control is executed (step S5903). The contents of the monitoring process are the same as step S5403 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S5903 that there is an abnormality (step S5904: YES), the processes in steps S5905 to S5908 are executed.

More specifically, regarding the processing in steps S5905 to S5908, first, a setting value copying process is executed (step S5905). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the information of the setting value counter is cleared to "0" in the abnormality clearing process (step S5906) to be executed subsequently, the present pachinko machine 10 before the abnormality clearing process is executed. It becomes possible to understand the setting value of.

Thereafter, a clearing process in the event of an abnormality is executed (step S5906). In the clearing process at the time of abnormality, the work area 221 for specific control except for the copy area is cleared to "0", and the stack area 222 for specific control is cleared to "0". Initial settings are also performed after clearing to "0". On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". In other words, in the RAM monitoring process in this embodiment, if it is determined that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the specific control is performed except for the copy area. The work area 221 for specific control is cleared to "0", and the stack area 222 for specific control is cleared to "0". As a result, if there is a possibility that some kind of information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control will be executed in the same state. This makes it possible to prevent this from happening. Furthermore, even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". As a result, the work area 223 for non-specific control and the stack area 224 for non-specific control will be cleared to "0" when an information error occurs in the work area 221 for specific control or the stack area 222 for specific control. It is possible to prevent this from occurring.

Thereafter, an abnormality command indicating that abnormality clear processing has occurred is transmitted to the audio emission control device 81 (step S5907). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emission section 53 to emit light in a manner corresponding to forced clearing of the work area 221 for specific control and the stack area 222 for specific control, and also causes the speaker section 54 to output a voice saying ``Forcible clear has been executed for specific control.'' Further, the symbol display device 41 is made to display a text image saying "Forcible clearing has been executed for specific control." These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the gaming hall can understand that the work area 221 for specific control and the stack area 222 for specific control have been forcibly cleared.

Thereafter, setting value update processing is executed (step S5908). The contents of the setting value update process are the same as step S5412 in the RAM monitoring process (FIG. 88) in the twenty-second embodiment.

In the RAM monitoring process executed using the specific control program and specific control data as described above, information abnormality monitoring is executed for the specific control work area 221 and the specific control stack area 222. However, information abnormality monitoring is not executed for the work area 223 for non-specific control and the stack area 224 for non-specific control. Monitoring of information abnormalities in the work area 223 for non-specific control and the stack area 224 for non-specific control is performed by processing corresponding to non-specific control in which programs for non-specific control and data for non-specific control are used. is executed.

FIG. 94 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the management execution process is executed by reading a subroutine program in the management process (FIG. 70), as in the fifteenth embodiment. Furthermore, the processes from step S6001 to step S6016 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

In steps S6001 to S6008 and steps S6010 to S6016, the same processes as steps S3901 to S3915 of the management execution process (FIG. 71) in the fifteenth embodiment are executed. Further, in step S6009, another monitoring process is executed. When executing the separate monitoring process, the subroutine program corresponding to the separate monitoring process set in the non-specific control program will be executed. Information for specifying a return address for later management execution processing is written to the stack area 224 for non-specific control by a push command. When the separate monitoring process ends, information for specifying the return address is read out by the pop command, and the program returns to the management execution process indicated by the return address.

FIG. 95 is a flowchart showing separate monitoring processing. Note that the processes from step S6101 to step S6108 in the separate monitoring process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, a process for monitoring the work area 223 for non-specific control is executed (step S6101). The contents of the monitoring process are the same as step S5405 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S6101 that there is an abnormality (step S6102: YES), the work area 223 for non-specific control is cleared to "0" and initial settings are performed (step S6103). In this case, the normal counter area 231, the opening/closing execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control.

On the other hand, in step S6103, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are 0” can be prevented from being cleared.

In addition, in step S6103, although the normal counter area 231, the open/close execution mode counter area 232, the high-frequency support mode counter area 233, and the calculation result storage area 234 are cleared to "0", the management start flag is not cleared to "0". It may also be a configuration. Further, in step S6103, although the normal counter area 231, the open/close execution mode counter area 232, the high-frequency support mode counter area 233, and the management start flag are cleared to "0", the calculation result storage area 234 is not cleared to "0". It may also be a configuration. Further, in step S6103, although the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233 are cleared to "0", the calculation result storage area 234 and the management start flag are not cleared to "0". It may also be a configuration.

Thereafter, clear notification processing is executed (step S6104). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to "0" is transmitted to the audio emission control device 81. By receiving the command, the audio light emission control device 81 causes the display light emission section 53 to emit light in a manner corresponding to the forced clearing of the work area 223 for non-specific control, and also issues a message from the speaker section 54 saying "History information has been forcibly cleared." Outputs a voice saying “I have done this.” Further, a character image "History information has been forcibly cleared." is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can understand that the work area 223 for non-specific control has been forcibly cleared.

If a negative determination is made in step S6102 or if the process in step S6104 is executed, a process for monitoring the stack area 224 for non-specific control is executed (step S6105). The contents of the monitoring process are the same as step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined in step S6105 that there is an abnormality (step S6106: YES), the stack area 224 for non-specific control is cleared to "0" and initial settings are performed (step S6107). This makes it possible to eliminate information abnormalities in the stack area 224 for non-specific control.

On the other hand, in step S6107, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are 0” can be prevented from being cleared.

Thereafter, clear notification processing is executed (step S6108). In the clear notification process, a command indicating that the stack area 224 for non-specific control has been cleared to "0" is transmitted to the audio emission control device 81. By receiving the command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the forced clearing of the stack area 224 for non-specific control, and also causes the speaker unit 54 to emit light in a manner that corresponds to the forced clearing of the stack area 224 for non-specific control. "Forcibly cleared." will be output. In addition, a character image is displayed on the symbol display device 41 saying "The stack of non-specific control has been forcibly cleared." These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the administrator of the gaming hall can understand that the stack area 224 for non-specific control has been forcibly cleared.

Note that when the stack area 224 for non-specific control is forcibly cleared, the address of the program in step S6010 in the management execution process (FIG. 94) is uniquely set as return address information after execution of another monitoring process. . Thereby, even if the stack area 224 for non-specific control is forcibly cleared, it is possible to return to the program that should originally be returned in the management execution process. Further, when the stack area 224 for non-specific control is forcibly cleared, the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 224 for non-specific control.

According to the above configuration, monitoring of whether an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control is executed by the process corresponding to specific control in the main CPU 63, Monitoring of whether an information abnormality has occurred in the work area 223 for specific control and the stack area 224 for non-specific control is executed in a process corresponding to non-specific control in the main CPU 63. As a result, not only the areas 221 to 224 of the main RAM 65 to be used are clearly distinguished between the processing corresponding to specific control and the processing corresponding to non-specific control, but also the areas of the main RAM 65 to be monitored 221 to 224 can also be clearly distinguished.

Note that when the work area 223 for non-specific control is cleared to "0", information of various registers of the main CPU 63 used in processing corresponding to specific control is stored in the work area 223 for non-specific control. The saved information is also cleared to "0". In this case, even if the process corresponding to the non-specific control ends and the process corresponding to the specific control returns, there is a possibility that the state before the process corresponding to the non-specific control is started cannot be restored. Therefore, when the work area 2223 for non-specific control is cleared to "0", the work area 221 for specific control and the stack area 222 for specific control may also be cleared to "0". In addition, in this configuration, the setting value counter in the work area 221 for specific control is also cleared to "0", so when returning from the process corresponding to non-specific control to the process corresponding to specific control, the setting value counter in the work area 221 for specific control is A configuration may be adopted in which a setting value update process is executed first as a corresponding process.

<26th embodiment>
This embodiment is different from the above-mentioned 20th embodiment in the processing configuration of management processing. Hereinafter, the configuration that is different from the above-mentioned 20th embodiment will be explained. Note that descriptions of the same configurations as those of the 20th embodiment will be basically omitted.

FIG. 96 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S6201 to step S6219 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6201). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Thereafter, the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by a load instruction as "LD HL, SP" (step S6202). In this case, the amount of information in the stack pointer is 16 bits, and the amount of information in each of the H register and L register is 8 bits, so 8 bits of information from the upper side of the stack pointer are stored in the H register. The L register is overwritten with consecutive 8 bits of information from the lower side of the stack pointer.

After that, a 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control is set to "0" by a load instruction as "LD (HL), 0". Clear (step S6203). Note that the HL register of the main CPU 63 has been overwritten with the information of the stack pointer of the main CPU 63 in step S6202, and the information of the stack pointer of the main CPU 63 has not been updated by the time the process of step S6203 is executed. Since this has not been carried out, in step S6203, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

Thereafter, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the address information of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6204). When using the stack area 222 for specific control, information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and each time information to be stored is added, information for specific control is stored. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6204, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the process in step S6204, the storage area in the next order for the storage area cleared to "0" in step S6203 is set as the information storage target for the next push command, and the storage area in step S6203 is The storage area cleared to "0" is set as the information read target by the next pop command.

Thereafter, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S6205). Further, as "LD BC, 0", the BC register of the main CPU 63 is cleared to "0" by a load instruction (step S6206). Further, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by a load instruction (step S6207). Furthermore, the HL register of the main CPU 63 is cleared to "0" by a load instruction as "LD HL,0" (step S6208). Further, as "LD IX,0", the IX register of the main CPU 63 is cleared to "0" by a load instruction (step S6209). Further, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by a load instruction (step S6210).

In addition to the flag register, the registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S6205 to S6210, the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, are Clear “0”. These WA register, BC register, DE register, HL register, IX register, and IY register are registers used in management execution processing (step S6212), which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of the management execution process (step S6212), which is the process corresponding to non-specific control, the state of these registers can be changed before the process corresponding to non-specific control is started. In addition, it is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

In addition, each information of the WA register, BC register, DE register, HL register, IX register, and IY register before the process corresponding to non-specific control is started will be changed after the process corresponding to the non-specific control is finished. This information is unnecessary in the process corresponding to specific control. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem will occur in the process corresponding to the specific control that is returned after the process corresponding to the non-specific control is completed.

Thereafter, as "POP PSW", information is read from the storage area in the previous writing order with respect to the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop instruction, The read information is overwritten in the flag register of the main CPU 63 (step S6211). The information on the stack pointer of the main CPU 63 immediately before the pop instruction in step S6211 is executed is the storage area in the next writing order with respect to the storage area in the specific control stack area 222 cleared to "0" in step S6203. The information corresponds to Therefore, the storage area in the write order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control becomes the storage area cleared to "0" in step S6203. . Then, by overwriting the flag register of the main CPU 63 with the information read from this storage area, the flag register is cleared to "0". Note that one storage area in the stack area 222 for specific control has an information amount of 8 bits (1 byte), and the flag register of the main CPU 63 also has an information amount of 8 bits (1 byte). . By clearing the flag register to "0" prior to execution of the management execution process (step S6212), which is the process corresponding to non-specific control, the state of the flag register can be changed before the process corresponding to non-specific control is started. It is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the program for non-specific control, the management execution process is started (step S6212). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

Note that the processing contents of the management execution process are the same as the management execution process (FIG. 82) in the 20th embodiment. Therefore, after the check process is completed in the management execution process, the WA register, BC register, DE register, HL register, IX register, and IY register are cleared to "0". As a result, these registers will be cleared to "0" before returning from processing corresponding to non-specific control to processing corresponding to specific control, and the state of these registers will be cleared before returning to processing corresponding to specific control. It is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

When returning to the program for management processing after execution of the management execution processing, processing for clearing the flag register of the main CPU 63 to "0" is executed. Specifically, first, the information in the HL register of the main CPU 63 is saved to the stack area 222 for specific control using a push command as "PUSH HL" (step S6213). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the HL register has been saved in the stack area 222 for specific control. Become.

Thereafter, the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by a load instruction as "LD HL, SP" (step S6214). In this case, the amount of information in the stack pointer is 16 bits, and the amount of information in each of the H register and L register is 8 bits, so 8 bits of information from the upper side of the stack pointer are stored in the H register. The L register is overwritten with consecutive 8-bit information from the lower side of the stack pointer.

After that, a 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control is set to "0" by a load instruction as "LD (HL), 0". Clear (step S6215). Note that the HL register of the main CPU 63 has been overwritten with the information of the stack pointer of the main CPU 63 in step S6214, and the information of the stack pointer of the main CPU 63 has not been updated by the time the process of step S6215 is executed. Since this has not been carried out, in step S6215, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

Thereafter, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the address information of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6216). When using the stack area 222 for specific control, information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and each time information to be stored is added, information for specific control is stored. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6216, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the process in step S6216, the storage area in the next order with respect to the storage area cleared to "0" in step S6215 is set as the storage target of information by the next push command, and in addition, in step S6215 The storage area cleared to "0" is set as the information read target by the next pop command.

Thereafter, as "POP PSW", information is read from the storage area in the previous writing order with respect to the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop instruction, The read information is overwritten in the flag register of the main CPU 63 (step S6217). The information on the stack pointer of the main CPU 63 immediately before the pop instruction in step S6217 is executed is the storage area in the next writing order with respect to the storage area in the specific control stack area 222 cleared to "0" in step S6215. The information corresponds to Therefore, in the stack area 222 for specific control, the storage area in the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 is the memory area for specific control cleared to "0" in step S6215. This is a storage area in the stack area 222. Then, by overwriting the flag register of the main CPU 63 with the information read from this storage area, the flag register is cleared to "0". Note that one storage area in the stack area 222 for specific control has an information amount of 8 bits (1 byte), and the flag register of the main CPU 63 also has an information amount of 8 bits (1 byte). . By clearing the flag register to "0" after executing the management execution process (step S6212), which is the process corresponding to non-specific control, the state of the flag register is changed to "0" by the main CPU 63 after the process corresponding to non-specific control is completed. It is possible to set the state immediately after the supply of operating power to has started. Furthermore, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area whose write order in the stack area 222 for specific control is one previous.

Thereafter, the information in the HL register saved in the stack area 222 for specific control in step S6213 is returned to the HL register of the main CPU 63 by a pop instruction as "POP HL" (step S6218). Note that since the HL register is cleared to "0" immediately before the end of the management execution process (step S6212), the information cleared to "0" is saved in the stack area 222 for specific control in step S6213. At the same time, in step S6218, the information cleared to "0" is returned to the HL register of the main CPU 63, resulting in the HL register of the main CPU 63 being cleared to "0". Furthermore, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S6219). This enables new execution of timer interrupt processing.

According to the above configuration, in addition to the effects described in the 20th embodiment, the following effects can be achieved.

The flag register of the main CPU 63 is cleared to "0" when processing corresponding to non-specific control is started from a situation where processing corresponding to specific control is being executed. This eliminates the need to save information in the flag register used in the process corresponding to specific control to the main RAM 65 in a situation where the process corresponding to non-specific control is being executed. Therefore, there is no need to secure capacity for saving the information.

Furthermore, the flag register of the main CPU 63 is cleared to "0" even when the process corresponding to the specific control is returned from the state in which the process corresponding to the non-specific control is being executed. Thereby, when returning to processing corresponding to specific control, it is possible to return the state of the flag register to the state immediately before the processing corresponding to non-specific control was started.

A state in which the flag register is cleared to "0" is a state when supply of operating power to the MPU 62 is started. This makes it possible to simplify the processing configuration for setting the flag register to a predetermined state when starting processing corresponding to non-specific control and when returning to processing corresponding to specific control.

The information in the flag register of the main CPU 63 before the process corresponding to non-specific control is started is information that is not used in the process corresponding to specific control after the process corresponding to non-specific control is finished. As a result, even if the flag register is cleared to "0" when the process corresponding to non-specific control is started, the process corresponding to specific control after the process corresponding to non-specific control is completed. It is possible to avoid any influence.

A predetermined storage area of the stack area 222 for specific control is cleared to "0", and the flag register is cleared to "0" by overwriting the information in the cleared storage area to "0" using a pop instruction. It is the composition. This makes it possible to clear the flag register to "0" even in a configuration where it is prohibited to directly clear the flag register to "0" by a load instruction.

Note that instead of the configuration in which the flag register is cleared to "0", a configuration in which the flag register is initialized may be used. In other words, when the supply of operating power to the MPU 62 is started, the flag register of the main CPU 63 is once cleared to "0" and then information is set so that it is in the initial state. In step S6211, the flag register may be set so as to be in this initial state. In this case, by configuring the flag register to be set to the above-mentioned initial state in steps S6213 to S6218, the state of the flag register can be changed to non-specific control when returning to the process corresponding to specific control. It becomes possible to return to the state immediately before the processing corresponding to the start.

Further, instead of clearing the flag register of the main CPU 63 to "0" in steps S6202 to S6204 and step S6211, a structure may be adopted in which all flag registers are set to "1". In this case, all flag registers are set to "1" in steps S6213 to S6218, so that when returning to the process corresponding to specific control, the state of the flag register is changed to start the process corresponding to non-specific control. It is possible to restore the state to the state immediately before it occurred.

Further, instead of the processing in steps S6202 to S6204 and step S6211, the flag register of the main CPU 63 may be directly cleared to "0" by a load instruction as "LD PSW, 0". Further, instead of the processing in steps S6213 to S6218, the flag register of the main CPU 63 may be directly cleared to "0" by a load instruction as "LD PSW, 0".

Further, instead of the configuration in which the processes of steps S6213 and S6218 are executed, a configuration may be adopted in which the HL register is cleared to "0" by a load instruction as "LD HL,0". Even in this case, it is possible to restore the state of the HL register to the state immediately before the management execution process, which is a process corresponding to non-specific control, was executed.

Further, instead of the configuration in which the process of clearing the flag register to "0" is executed in the process corresponding to specific control, a configuration may be adopted in which the process to clear the flag register to "0" is executed in the process corresponding to non-specific control.

<27th embodiment>
This embodiment is different from the above-mentioned 20th embodiment in the processing configuration of management processing. Hereinafter, the configuration that is different from the above-mentioned 20th embodiment will be explained. Note that descriptions of the same configurations as those of the 20th embodiment will be basically omitted.

FIG. 97 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S6301 to step S6323 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6301). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Thereafter, as "PUSH AF", a push instruction is used to store the information in the A register and the information in the flag register of the main CPU 63 in the stack area 222 for specific control, which corresponds to the current stack pointer information of the main CPU 63. The data is saved in each of the areas and the storage area in the next writing order for the storage area (step S6302). Since the A register and flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information in the A register and the information in the flag register are separately stored for two storage areas with consecutive addresses. will be evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the HL register of the main CPU 63 is overwritten with the information of the A register and the information of the flag register, which were saved in the stack area 222 for specific control in step S6302, by a pop instruction (step S6303). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is overwritten in the L register of the main CPU 63. The register will be overwritten. The H register and L register of the main CPU 63 each have an information amount of 8 bits (1 byte). Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, the A register of the main CPU 63 is cleared to "0" by a load instruction as "LD A,0" (step S6304). Then, as "LD L, A", the information in the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by the load instruction (step S6305), and as "LD H, A", by the load instruction, The information in the A register of the main CPU 63 is overwritten in the H register of the main CPU 63 (step S6306). Since the A register was cleared to "0" in step S6304, by overwriting the information in the A register to each of the L and H registers, each of the L and H registers is cleared to "0". becomes.

After that, as "PUSH HL", the information in the HL register (i.e., H register and L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6307). Since the H register and L register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information in the H register and the information in the L register are separately stored for two storage areas with consecutive addresses. Evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, the BC register of the main CPU 63 is cleared to "0" by a load instruction as "LD BC, 0" (step S6308). Further, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by a load instruction (step S6309). Further, as "LD IX, 0", the IX register of the main CPU 63 is cleared to "0" by a load instruction (step S6310). Further, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by a load instruction (step S6311).

In addition to the flag register, the registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers. In this case, in steps S6308 to S6311, the BC register, DE register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, are cleared to "0". Furthermore, the HL register is cleared to "0" in steps S6305 and S6306. These BC register, DE register, HL register, IX register, and IY register are registers used in management execution processing (step S6313), which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of the management execution process (step S6313), which is the process corresponding to non-specific control, the state of these registers can be changed before the process corresponding to non-specific control is started. In addition, it is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

In addition, each information of the BC register, DE register, HL register, IX register, and IY register before the process corresponding to non-specific control is started is used for specific control after the process corresponding to the non-specific control is finished. This information is unnecessary in the corresponding process. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem will occur in the process corresponding to the specific control that is returned after the process corresponding to the non-specific control is completed.

Thereafter, as "POP AF", the information in the H register and the information in the L register, which were saved in the stack area 222 for specific control in step S6307, are overwritten in the A register and flag register of the main CPU 63 by a pop instruction ( Step S6312). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control is used as the flag of the main CPU 63. The register will be overwritten. Since the information in the H register and the information in the L register saved in the stack area 222 for specific control are all "0" information, the A register of the main CPU 63 is At the same time, the flag register of the main CPU 63 is cleared to "0". This makes it possible to set the state of the flag register to the state immediately after the supply of operating power to the main CPU 63 is started, before the process corresponding to non-specific control is started. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S6313). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

Note that after the check process is completed in the management execution process, the BC register, DE register, HL register, IX register, and IY register are cleared to "0". As a result, these registers will be cleared to "0" before returning from processing corresponding to non-specific control to processing corresponding to specific control, and the state of these registers will be cleared before returning to processing corresponding to specific control. It is possible to create a state immediately after the supply of operating power to the main CPU 63 is started.

When returning to the program for management processing after execution of the management execution processing, processing for clearing the flag register of the main CPU 63 to "0" is executed. Specifically, first, the information in the HL register of the main CPU 63 is saved to the stack area 222 for specific control using a push command as "PUSH HL" (step S6314). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the HL register has been saved in the stack area 222 for specific control. Become.

Thereafter, as "PUSH AF", a push instruction is used to store the information in the A register and the information in the flag register of the main CPU 63 in the stack area 222 for specific control, which corresponds to the current stack pointer information of the main CPU 63. The storage area and the storage area are saved to each storage area in the next writing order (step S6315). Since the A register and flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information in the A register and the information in the flag register are separately stored for two storage areas with consecutive addresses. will be evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the HL register of the main CPU 63 is overwritten with the information of the A register and the information of the flag register, which were saved in the stack area 222 for specific control in step S6315, by a pop instruction (step S6316). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is overwritten in the L register of the main CPU 63. The register will be overwritten. The H register and L register of the main CPU 63 each have an information amount of 8 bits (1 byte). Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, the A register of the main CPU 63 is cleared to "0" by a load instruction as "LD A,0" (step S6317). Then, as "LD L, A", the information in the A register of the main side CPU 63 is overwritten in the L register of the main side CPU 63 by a load instruction (step S6318), and as "LD H, A", by the load instruction, The information in the A register of the main CPU 63 is overwritten in the H register of the main CPU 63 (step S6319). Since the A register was cleared to "0" in step S6317, by overwriting the information in the A register to each of the L and H registers, each of the L and H registers is cleared to "0". becomes.

After that, as "PUSH HL", the information in the HL register (i.e., H register and L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6320). Since the H register and L register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information in the H register and the information in the L register are separately stored for two storage areas with consecutive addresses. Evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, as "POP AF", the information in the H register and the information in the L register, which were saved in the stack area 222 for specific control in step S6320, are overwritten on the A register and flag register of the main CPU 63 by a pop instruction ( Step S6321). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control is used as the flag of the main CPU 63. The register will be overwritten. Since the information in the H register and the information in the L register saved in the stack area 222 for specific control are all "0" information, the A register of the main CPU 63 is At the same time, the flag register of the main CPU 63 is cleared to "0". By clearing the flag register to "0" after executing the management execution process (step S6313), which is the process corresponding to non-specific control, the state of the flag register is changed to "0" by the main CPU 63 after the process corresponding to non-specific control is completed. It is possible to set the state immediately after the supply of operating power to has started. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, the information in the HL register saved in the stack area 222 for specific control in step S6314 is returned to the HL register of the main CPU 63 by a pop instruction as "POP HL" (step S6322). Note that since the HL register is cleared to "0" immediately before the end of the management execution process (step S6313), the information cleared to "0" is saved in the stack area 222 for specific control in step S6314. At the same time, in step S6322, the information cleared to "0" is returned to the HL register of the main CPU 63, resulting in the HL register of the main CPU 63 being cleared to "0". Furthermore, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S6323). This enables new execution of timer interrupt processing.

According to the above configuration, it is possible to clear the flag register of the main CPU 63 to "0" without executing the process of clearing a predetermined storage area in the stack area 222 for specific control to "0" by a load instruction. becomes. This makes it possible to clear the flag register of the main CPU 63 to "0" even in a configuration where it is restricted to clear "0" to a predetermined storage area in the stack area 222 for specific control using a load command. becomes possible.

Note that instead of the configuration in which the flag register is cleared to "0", a configuration in which the flag register is initialized may be used. In other words, when the supply of operating power to the MPU 62 is started, the flag register of the main CPU 63 is once cleared to "0" and then information is set so that it is in the initial state. In step S6312, the flag register may be set so as to be in this initial state. In this case, by configuring the flag register to be set to the above-mentioned initial state in steps S6314 to S6322, the state of the flag register can be changed to non-specific control when returning to the process corresponding to specific control. It becomes possible to return to the state immediately before the processing corresponding to the start.

Furthermore, instead of clearing the flag register of the main CPU 63 to "0" in steps S6302 to S6307 and step S6312, a structure may be adopted in which all flag registers are set to "1". In this case, by setting "1" in all flag registers in steps S6314 to S6322, when returning to the process corresponding to specific control, the state of the flag register is changed to start the process corresponding to non-specific control. It is possible to restore the state to the state immediately before it occurred.

Alternatively, a configuration may be adopted in which the processes in steps S6302 and S6303 are not executed. In this case, it becomes possible to simplify the processing configuration.

Alternatively, a configuration may be adopted in which the processes in step S6315 and step S6316 are not executed. In this case, it becomes possible to simplify the processing configuration.

Also, instead of the configuration that executes the processing of steps S6302 to S6306, the HL register is cleared to "0" by a load instruction as "LD HL, 0", and then the HL register cleared to "0" is cleared to "0" by a push instruction. The flag register of the main CPU 63 may be cleared to "0" by saving the information to the stack area 222 for specific control and then returning the saved information to the AF register using a pop instruction.

Further, instead of the configuration in which the process of clearing the flag register to "0" is executed in the process corresponding to specific control, a configuration may be adopted in which the process to clear the flag register to "0" is executed in the process corresponding to non-specific control.

<28th embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 98 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S6401 to step S6416 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6401). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and started in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

After that, as "PUSH WA", the information in the WA register (i.e., W register and A register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6402). Since the W register and A register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information in the W register and A register is saved individually to two storage areas with consecutive addresses. Ru. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, the information in the flag register of the main CPU 63 is overwritten in the A register of the main CPU 63 by a load instruction as "LD A, PSW" (step S6403). In this case, the information amount of both the flag register and the A register is 8 bits (1 byte). Then, as "LD (_FGBUF), A", the information in the A register of the main CPU 63 is saved to the FG buffer set in the work area 221 for specific control by a load instruction (step S6404). Since the A register has been overwritten with the information of the flag register in step S6403, the information of the flag register is saved in the work area 221 for specific control by executing step S6404.

Thereafter, as "POP WA", the information in the WA register saved in the stack area 222 for specific control in step S6402 is restored to the WA register of the main CPU 63 by a pop instruction (step S6405). As a result, even if the A register is used to save flag register information to the specific control work area 221, it is possible to restore the state of the A register to the state before the save was performed. Become. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S6406). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

Note that the processing contents of the management execution process are the same as the management execution process (FIG. 71) in the fifteenth embodiment. Therefore, before the check process is started in the management execution process, the information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is saved to the work area 223 for non-specific control. At the same time, after the check process is completed in the management execution process, each piece of information saved in the work area 223 for non-specific control is stored in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. will be reinstated. This makes it possible to keep the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 in the same state before and after the check process.

However, the present invention is not limited to this, and the processing content of the management execution process may be the same as the management execution process (FIG. 78) in the seventeenth embodiment, and may be the same as the management execution process in the eighteenth embodiment. (FIG. 79), or may be the same configuration as the management execution process (FIG. 80) in the nineteenth embodiment.

When returning to the management processing program after execution of the management execution processing, processing is executed to return the information in the flag register of the main CPU 63 to the state before the management execution processing was executed. In detail, first, the information in the HL register of the main CPU 63 is saved to the stack area 222 for specific control by a push command as "PUSH HL" (step S6407). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the HL register has been saved in the stack area 222 for specific control. Become.

Thereafter, the information in the WA register of the main CPU 63 is saved to the specific control stack area 222 by a push command as "PUSH WA" (step S6408). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the WA register has been saved in the stack area 222 for specific control. Become.

Thereafter, the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by a load instruction as "LD HL, SP" (step S6409). In this case, the amount of information in the stack pointer is 16 bits, and the amount of information in each of the H register and L register is 8 bits, so 8 bits of information from the upper side of the stack pointer are stored in the H register. The L register is overwritten with consecutive 8 bits of information from the lower side of the stack pointer.

Thereafter, as "LD A, (_FGBUF)", the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6406 is overwritten in the A register of the main CPU 63 by a load instruction (step S6410). Then, as "LD (HL), A", a 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control is stored on the main side by a load instruction. The information in the A register of the CPU 63 is stored (step S6411). As a result, the information in the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is saved in the stack area 222 for specific control.

Thereafter, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the address information of the storage area to be written in the next order in the stack area 222 for specific control by a load instruction. (Step S6412). When using the stack area 222 for specific control, information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and each time information to be stored is added, information for specific control is stored. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6412, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the process in step S6412, the next storage area in the storage area where the information in the A register was saved in step S6411 is set as the storage target for information by the next push command, and The storage area in which the information in the A register is saved in S6411 is set as the information read target by the next pop instruction.

Thereafter, as "POP PSW", information is read from the storage area in the previous writing order with respect to the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by a pop instruction, The read information is overwritten in the flag register of the main CPU 63 (step S6413). The information on the stack pointer of the main CPU 63 immediately before the pop instruction in step S6413 is executed is the information corresponding to the storage area in the next writing order for the storage area where the information in the A register was saved in step S6411. It has become. Therefore, the storage area in the write order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is the storage area in which the information of the A register was saved in step S6411. area. Then, by overwriting the flag register of the main CPU 63 with the information read from this storage area, the information in the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 becomes the flag of the main CPU 63. It will be returned to the register. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area whose write order in the stack area 222 for specific control is one previous.

Thereafter, as "POP WA", the information in the WA register saved in the stack area 222 for specific control in step S6408 is restored to the WA register of the main CPU 63 by a pop instruction (step S6414). Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control. Furthermore, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6407 is restored to the HL register of the main CPU 63 by a pop instruction (step S6415). Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which generation is permitted (step S6416). This enables new execution of timer interrupt processing.

According to the above configuration, when processing corresponding to non-specific control is started from a situation where processing corresponding to specific control is being executed, information in the flag register of the main CPU 63 is stored in the stack area 222 for specific control instead of in the stack area 222 for specific control. It becomes possible to save it to the work area 221 for specific control. When the process corresponding to the specific control is returned from the situation where the process corresponding to the non-specific control is being executed, the information in the flag register saved in the work area 221 for specific control is used as the flag of the main CPU 63. Returned to register. As a result, information can be restored from the storage area of the work area 221 for specific control designated on the program to the flag register of the main CPU 63 without referring to the information of the stack pointer of the main CPU 63. Even if the information in the stack pointer of the side CPU 63 is rewritten due to noise or the like, it is possible to restore the information to the flag register of the main side CPU 63.

Further, instead of the configuration in which the process of saving the information in the flag register to the main side RAM 65 is executed in the process corresponding to specific control, a configuration may be adopted in which the process is executed in the process corresponding to non-specific control. Also, instead of the configuration in which the process of restoring the information of the flag register saved in the main side RAM 65 to the flag register of the main side CPU 63 is executed in the process corresponding to specific control, it is executed in the process corresponding to non-specific control. It may also be configured to be executed.

<29th embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration of management processing. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that descriptions of the same configurations as in the fifteenth embodiment will be basically omitted.

FIG. 99 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S6501 to step S6519 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6501). This prevents the timer interrupt process (FIG. 69), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

After that, as "PUSH HL", the information in the HL register (i.e., H register and L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6502). Since the H register and L register of the main CPU 63 each have an information amount of 8 bits (1 byte), the information in the H register and L register is saved individually to two storage areas with consecutive addresses. Ru. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, as "PUSH AF", a push instruction is used to store the information in the A register and the information in the flag register of the main CPU 63 in the stack area 222 for specific control, which corresponds to the current stack pointer information of the main CPU 63. The area and the storage area in the next writing order are saved (step S6503). Since the A register and flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information in the A register and the information in the flag register are separately stored for two storage areas with consecutive addresses. Evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the HL register of the main CPU 63 is overwritten with the information of the A register and the information of the flag register, which were saved in the stack area 222 for specific control in step S6503, by a pop instruction (step S6504). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is overwritten in the L register of the main CPU 63. The register will be overwritten. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, the information in the L register of the main CPU 63 is overwritten in the A register of the main CPU 63 by a load instruction as "LD A,L" (step S6505). Since the information in the flag register of the main CPU 63 is overwritten in the L register in step S6504, by overwriting the information in the L register in the A register, the information in the flag register is overwritten in the A register. Become. Then, as "LD (_FGBUF), A", the information in the A register of the main CPU 63 is saved to the FG buffer set in the work area 221 for specific control by a load instruction (step S6506). Since the A register has been overwritten with the information of the flag register in step S6505, the information of the flag register is saved in the work area 221 for specific control by executing step S6506.

After that, as "PUSH HL", the information in the HL register (i.e., H register and L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push command. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6507). In this case, since the HL register has been overwritten with the information of the A register and the information of the flag register in step S6504, the information of the A register and the information of the flag register are saved to the stack area 222 for specific control in step S6507. It means that I let him do it. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, as "POP AF", the information in the H register and the information in the L register, which were saved in the stack area 222 for specific control in step S6507, are overwritten in the A register and flag register of the main CPU 63 by a pop instruction ( Step S6508). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control is used as the flag of the main CPU 63. The register will be overwritten. The information in the H register saved in the stack area 222 for specific control is the information in the A register at the time of step S6503, and the information in the L register saved in the stack area 222 for specific control is the flag at the time in step S6503. This is register information. Therefore, by executing the process of step S6508, the states of the A register and flag register of the main CPU 63 are returned to the states at the time of step S6503. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6502 is returned to the HL register of the main CPU 63 by a pop instruction (step S6509). As a result, the state of the HL register of the main CPU 63 returns to the state at step S6502. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the non-specific control program, the management execution process is started (step S6510). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

In addition, in the management execution process, before the check process is started, each information of the BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is saved to the work area 223 for non-specific control, and After the check process is completed in the management execution process, the information saved in the non-specific control work area 223 is returned to the BC register, DE register, HL register, IX register, and IY register of the main CPU 63. This makes it possible to keep the BC register, DE register, HL register, IX register, and IY register of the main CPU 63 in the same state before and after the check process.

However, the present invention is not limited to this, and the content of the management execution process may be the same as the management execution process (FIG. 78) in the seventeenth embodiment, and may be the same as the management execution process in the eighteenth embodiment. (FIG. 79), or may be the same configuration as the management execution process (FIG. 80) in the nineteenth embodiment.

When returning to the management processing program after execution of the management execution processing, processing is executed to return the information in the flag register of the main CPU 63 to the state before the management execution processing was executed. Specifically, first, the information in the HL register of the main CPU 63 is saved to the specific control stack area 222 by a push command as "PUSH HL" (step S6511). After execution of the push instruction, the information of the stack pointer of the main CPU 63 is changed to the information corresponding to the storage area of the next write order in the storage area where the information of the HL register was saved in the stack area 222 for specific control. Become.

Thereafter, as "PUSH AF", a push instruction is used to store the information in the A register and the information in the flag register of the main CPU 63 in the stack area 222 for specific control, which corresponds to the current stack pointer information of the main CPU 63. The data is saved to each of the storage areas and the storage areas in the next writing order for the storage area (step S6512). Since the A register and flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information in the A register and the information in the flag register are separately stored for two storage areas with consecutive addresses. will be evacuated. Note that when the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to information corresponding to the storage area that is two storage areas later in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the HL register of the main CPU 63 is overwritten with the information of the A register and the information of the flag register, which were saved in the stack area 222 for specific control in step S6512, by a pop instruction (step S6513). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is overwritten in the L register of the main CPU 63. The register will be overwritten. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "LD A, (_FGBUF)", the information in the flag register at the time of step S6503, which was saved in the FG buffer in the work area 221 for specific control in step S6506, is transferred to the A register of the main CPU 63 by a load instruction. (step S6514). Then, as "LDL, A", the information in the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by a load instruction (step S6515). Since the information of the flag register of the main CPU 63 at the time of step S6503 has been restored to the A register in step S6514, by overwriting the information of the A register to the L register, the information of the flag register of the main CPU 63 at the time of step S6503 is restored to the L register. The information in the flag register will be overwritten.

After that, as "PUSH HL", the information in the HL register (i.e., H register and L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push command. The data is saved in each of the storage areas and the storage areas in the next writing order for the storage area (step S6516). In this case, since the information in the A register at the time of step S6512 is overwritten in the H register in step S6513, the information in the A register is saved in the stack area 222 for specific control in step S6516. Become. Furthermore, since the information in the flag register at the time of step S6503 is overwritten in the L register in step S6515, the information in the flag register is saved in the stack area 222 for specific control in step S6516.

Thereafter, as "POP AF", the information in the H register and the information in the L register, which were saved in the stack area 222 for specific control in step S6516, are overwritten in the A register and flag register of the main CPU 63 by a pop instruction ( Step S6517). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control is used as the flag of the main CPU 63. The register will be overwritten. The information in the H register saved in the stack area 222 for specific control is the information in the A register at the time of step S6512, and the information in the L register saved in the stack area 222 for specific control is the flag at the time in step S6503. This is register information. Therefore, by executing the process in step S6517, the state of the A register of the main CPU 63 returns to the state in step S6512, and the state of the flag register returns to the state at step S6503.

Incidentally, the A register of the main CPU 63 is not used in the management execution process. Therefore, the state of the A register at the time of step S6512 is the state of the A register at the time of step S6508, and the state of the A register at the time of step S6508 is the state of the A register at the time of step S6503. Therefore, by executing the process of step S6517, the states of the A register and flag register of the main CPU 63 are returned to the states at the time of step S6503. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6511 is returned to the HL register of the main CPU 63 by a pop instruction (step S6518). As a result, the state of the HL register of the main CPU 63 returns to the state at step S6511. Note that when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 69) is prohibited to a state in which it is permitted (step S6519). This enables new execution of timer interrupt processing.

According to the above configuration, information in the flag register of the main CPU 63 can be stored without directly overwriting the information of the flag register from the flag register of the main CPU 63 onto other registers of the main CPU 63 by the load instruction. can be saved to the work area 221 for specific control.

Note that the information in the flag register is overwritten by the load instruction as "LD (_FGBUF), L" after executing the process in step S6504 instead of executing the processes in steps S6505 to S6508. By saving the information in the L register to the FG buffer, the information in the flag register may be saved in the work area 221 for specific control.

In addition, without executing the processing in steps S6514 and S6515, instead, after executing the processing in step S6513, a work area for specific control is created as "LDL, (_FGBUF)" by a load command. The configuration may be such that the information in the flag register saved in 221 is overwritten in the L register.

Further, instead of the configuration in which the process of saving the information in the flag register to the main side RAM 65 is executed in the process corresponding to specific control, a configuration may be adopted in which it is executed in the process corresponding to non-specific control. Also, instead of the configuration in which the process of restoring the information in the flag register saved in the main side RAM 65 to the flag register of the main side CPU 63 is executed in the process corresponding to specific control, it is executed in the process corresponding to non-specific control. It may also be configured to be executed.

<Thirtieth embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration executed by the main CPU 63. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that descriptions of the same configurations as in the fifteenth embodiment will be basically omitted.

FIG. 100 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S6601 to step S6621 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

First, power-on wait processing is executed (step S6601). In the power-on wait process, for example, the main process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. The operation start and initial setting of the symbol display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S6602).

Thereafter, it is determined whether the power outage flag provided in the work area 221 for specific control in the main side RAM 65 is set to "1" (step S6603). If the power outage flag is set to "1" (step S6603: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S6604).

The checksum can be calculated in any way, but for example, a calculation method that adds all the numerical values in the storage area that is the target of the checksum calculation is exemplified. The method for calculating this checksum is the same as the method for calculating the checksum in power outage processing, which will be described later. The checksum calculated in the power outage process described later will be stored in the work area 221 for specific control. It is excluded from the storage area subject to calculation.

That is, when calculating the checksum, some storage areas in the work area 221 for specific control and the stack area 222 for specific control are subject to calculation. In the storage area to be calculated, a checksum is calculated in the power outage processing when the supply of operating power to the MPU 62 is stopped, and then the supply of operating power to the MPU 62 is resumed and the process of step S6604 is executed. This storage area is basically a storage area where information is not rewritten if power supply such as backup power is continued to the work area 221 for specific control and the stack area 222 for specific control until the specific control work area 221 and the stack area 222 for specific control are continued. Therefore, the information in the work area 221 for specific control and the stack area 222 for specific control is not changed after the supply of operating power to the MPU 62 is stopped until the supply of operating power to the MPU 62 is restarted. In this case, the checksums for the work area 221 for specific control and the stack area 222 for specific control are the same as those immediately before the supply of operating power to the MPU 62 is stopped. Note that the storage area to be calculated when calculating this checksum includes an area where setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (specifically, a setting value counter )It is included.

Thereafter, the work area 221 for specific control and the stack area for specific control that were calculated in the power outage process executed immediately before the supply of operating power to the MPU 62 was stopped and saved in the work area 221 for specific control. The checksum for 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S6604 (step S6605). Then, it is determined whether these checksums match (step S6606).

Here, the power outage information storage process executed by the main CPU 63 will be described with reference to the flowchart in FIG. 101. Note that the power outage information storage process is executed in step S6801 in the timer interrupt process (FIG. 103), which will be described later.

In the power outage information storage process, first, the repetition counter provided in the work area 221 for specific control is set to "10", which is information on the number of repetitions for the power outage signal (step S6701), and the work area 221 for specific control is 221 is cleared to "0" (step S6702).

Thereafter, a process of reading information on the power outage signal received at the input port of the MPU 62 is executed (step S6703). In this case, if a power outage signal (LOW level power outage signal) corresponding to the fact that a power outage has not occurred is received, information of "0" is stored in the input port as non-power outage information. When a power outage signal (HI level power outage signal) corresponding to the occurrence of a power outage is being received, information of "1" is stored in the input port as power outage occurrence information. In step S6703, a process is executed to read information on the power outage signal into the register of the main CPU 63.

If the information on the power outage signal read in step S6703 corresponds to the occurrence of a power outage (occurrence of power outage) (step S6704: YES), 1 is added to the numerical information of the power outage detection counter (step S6705). If a negative determination is made in step S6704 or if the process in step S6705 is executed, the numerical information of the repetition counter is subtracted by 1 (step S6706). Then, it is determined whether the numerical information of the repetition counter after the 1 subtraction is "0" (step S6707). If a negative determination is made in step S6707, the process returns to step S6703 and repeats the processing of steps S6703 to S6706. On the other hand, if an affirmative determination is made in step S6707, the process advances to step S6708.

In step S6708, it is determined whether the current numerical information of the power outage detection counter is greater than or equal to the trigger reference number of times corresponding to the occurrence of a power outage. If it is less than the trigger reference number of times, the main power outage information storage process is ended. On the other hand, if the number of times is equal to or greater than the trigger reference number, the power outage processing in steps S6709 to S6712 is executed.

Specifically, first, a power outage flag provided in the work area 221 for specific control is set to "1" (step S6709). As a result, if power outage processing is executed normally and information is stored and retained in the main side RAM 65 normally, when the supply of operating power to the main side CPU 63 is restarted, the specific control This means that the power outage flag of the work area 221 is set to "1".

After that, a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S6710). In this case, the storage areas in the work area 221 for specific control and the stack area 222 for specific control, which are the targets of calculation when calculating the checksum, become the targets of checksum calculation in step S6604 of the main process (FIG. 100). This is the same storage area as the work area 221 for specific control and the stack area 222 for specific control. In addition, the storage area to be calculated when calculating this checksum is an area in which setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (specifically, a setting value counter )It is included. Then, the calculated checksum is stored in a storage area for storing the checksum in the specific control work area 221, which is excluded from the checksum calculation target.

Thereafter, all output port information in the register of the main CPU 63 is set to "0" (step S6711), and access to the main RAM 65 is prohibited (step S6712). Then, the infinite loop continues until the power is completely cut off and processing can no longer be executed.

Note that by executing the power outage information storage process as the first process of the timer interrupt process, it is no longer necessary to execute the timer interrupt process from the middle after power is restored. This eliminates the need to store the address of the process being executed at the time of a power outage in the main RAM 65 as stack information, making it possible to reduce the processing load of the process at the time of a power outage.

Returning to the explanation of the main processing (FIG. 100), if a negative determination is made in step S6603 or step S6606, clear processing at the time of non-setting update is executed (step S6607). In the clearing process at the time of non-setting update, in the work area 221 for specific control, excluding the area where setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting value counter), the specific control Clears the work area 221 to "0" and executes initial settings. As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Further, in the clearing process at the time of non-setting update, the stack area 222 for specific control is cleared to "0" and initial setting is executed. Furthermore, in the clearing process at the time of non-setting update, initial settings are executed after various registers of the main CPU 63 are also cleared to "0".

On the other hand, in the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, the work area 223 for non-specific control and the stack area 224 for non-specific control will be set to "0" even if the power outage flag is not set to "1" because the power outage processing was not executed normally. It is possible to prevent it from being cleared. In addition, even if an abnormality occurs regarding the checksum of the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". It is possible to prevent this from happening.

If a negative determination is made in step S6603 or step S6606, after executing the clearing process at the time of non-setting update in step S6607, the pachinko machine can be updated by checking the value of the setting value counter in the work area 221 for specific control. It is determined whether the set value of 10 is normal (step S6608). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is. If the set value is abnormal (step S6608: NO), processing for newly setting the set value (steps S6619 to S6621), which will be described later, is executed. This makes it possible to monitor whether the set value is normal even if a negative determination is made in step S6603 or step S6606 and the clearing process (step S6607) is executed when the setting is not updated. At the same time, if the set value is abnormal, it becomes possible to reset the set value.

If the set value is normal (step S6608: YES), power-on setting processing is executed (step S6609). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of a power outage flag is set to an initial value, and a command corresponding to the current gaming state is transmitted to the audio emission control device 81.

Although the main CPU 63 is configured to periodically execute timer interrupt processing, generation of timer interrupt processing is prohibited at the stage when main processing is started. This state in which generation of the timer interrupt process is prohibited is canceled at a timing when the process in step S6609 is completed and before the process in step S6610 is executed, and execution of the timer interrupt process is permitted. As a result, when the supply of operating power to the main CPU 63 is started, the power-on setting process in step S6609 is completed and the timer interrupt process is not executed until the stage before the process in step S6610 is started. Therefore, the main CPU 63 will not start the process for advancing the game until the situation is reached.

Thereafter, the process proceeds to the remaining processing of steps S6610 to S6613. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. Although this remaining time will vary depending on the processing completion time of each timer interrupt process, the remaining process of steps S6610 to S6613 is repeatedly executed using such irregular time. In this respect, the remaining processing in steps S6610 to S6613 can be said to be non-regular processing that is executed non-regularly. In steps S6610 to S6613, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

As described above, in this embodiment, when the supply of operating power to the main CPU 63 is started, if the power outage flag in the work area 221 for specific control is not set to "1" or the checksums do not match. In this case, after executing the clearing process at the time of non-setting update, if the set value is normal (step S6608: YES), the process moves to a process for advancing the game. As a result, even if the power outage flag is not set to "1" because the power outage processing was not executed normally, the power can be turned on again after the supply of operating power to the main CPU 63 has started. There is no need to perform an OFF operation. Furthermore, even if an abnormality occurs regarding the checksum for the work area 221 for specific control and the stack area 222 for specific control, the power can be turned on and off again after the supply of operating power to the main CPU 63 is started. No operation required.

If an affirmative determination is made in both step S6603 and step S6606, it is determined whether the setting value of the pachinko machine 10 is normal by checking the value of the setting value counter in the work area 221 for specific control (step S6614 ). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is. If the set value is abnormal (step S6614: NO), processing for newly setting the set value (steps S6619 to S6621), which will be described later, is executed.

If the set value is normal (step S6614: YES), it is determined whether the reset button 68c is pressed (step S6615), and whether the setting key insertion part 68a is turned on using the setting key. It is determined whether or not the front door frame 14 is in an open state with respect to the inner frame 13 (step S6617), and it is determined whether the gaming machine main body 12 is in an open state with respect to the outer frame 11. It is determined whether there is one (step S6618).

In this embodiment, a front door open sensor 95 for detecting whether or not the front door frame 14 is in an open state with respect to the inner frame 13 is electrically connected to the main CPU 63. The detection result of 95 is input to the main CPU 63. In this case, when the front door frame 14 is in the closed state with respect to the inner frame 13, the front door open sensor 95 transmits a closure detection signal to the main CPU 63, and the front door frame 14 is in the open state with respect to the inner frame 13. In this case, the front door open sensor 95 transmits an open detection signal to the main CPU 63. The main side CPU 63 identifies that the front door frame 14 is in the closed state when receiving a closing detection signal from the front door opening sensor 95, and when receiving an opening detection signal from the front door opening sensor 95. It is specified that the front door frame 14 is in an open state.

Further, in this embodiment, a main body open sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main side CPU 63. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closure detection signal to the main side CPU 63, and when the gaming machine main body 12 is in the open state with respect to the outer frame 11, In some cases, the main body open sensor 96 transmits an open detection signal to the main CPU 63. The main CPU 63 specifies that the gaming machine main body 12 is in the closed state when it receives a closing detection signal from the main body opening sensor 96, and specifies that the gaming machine main body 12 is in a closed state when it receives an opening detection signal from the main body opening sensor 96. It is determined that the main body 12 is in an open state.

If the reset button 68c is not pressed (step S6615: NO), the power-on setting process is executed in step S6609, and then the remaining processes in steps S6610 to S6613 are repeated. In other words, if the reset button 68c is not pressed, the process shifts to the process for controlling the progress of the game without executing the process of clearing the work area 221 for specific control and the stack area 222 for specific control. .

If the reset button 68c is pressed (step S6615: YES) and a negative determination is made in any of steps S6616 to S6618, after executing the clearing process at the time of non-setting update (step S6607 ), and on the condition that the set value is normal (step S6608: YES), the process moves to the processing for controlling the progress of the game from step S6609 onwards. The contents of the clearing process at the time of non-setting update are as already described.

If the reset button 68c is pressed (step S6615: YES) and all of steps S6616 to S6618 are answered in the affirmative, processing for updating the set value is executed. Further, even if it is determined in step S6608 or step S6614 that the set value is abnormal, processing for updating the set value is executed.

Specifically, first, a setting value copying process is executed (step S6619). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . As a result, even if the setting value counter information is cleared to "0" in the setting value update clearing process (step S6620) to be executed subsequently, the information in the setting value counter before the setting value updating clearing process is executed. It becomes possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of operating power to the pachinko machine 10 is stopped).

Thereafter, a clearing process when updating settings is executed (step S6620). In the clearing process when updating the settings, the work area 221 for specific control is set to "0", except for the area indicating whether the win/fail lottery mode in the work area 221 for specific control is the high probability mode and the above-mentioned copy area. ” and perform the initial settings. As a result, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in the closed state. A certain situation arises. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Further, in the clearing process when updating settings, the stack area 222 for specific control is cleared to "0" and initial settings are executed. Furthermore, in the clearing process when updating the settings, a setting value counter used to specify the setting value of the pachinko machine 10 is cleared to "0". Furthermore, in the clearing process when updating settings, initial settings are executed after various registers of the main CPU 63 are also cleared to "0".

On the other hand, in the clearing process when updating the settings, the area indicating whether the winning lottery mode is the high probability mode is not cleared to "0", so even if the setting value updating process (step S6621) is executed, the winning lottery mode It becomes possible to maintain the pachinko machine 10 in the mode it was in before the supply of operating power to the pachinko machine 10 was stopped. Furthermore, since the copy area is not cleared to "0" in the clearing process when updating the settings, it becomes possible to specify the setting value that was set before the clearing process when updating the settings. Note that the configuration is not limited to the above configuration, and a configuration may be adopted in which the setting value counter used to specify the setting value of the pachinko machine 10 is not cleared to "0" in the clearing process when updating the settings, and In the clearing process, an area indicating whether the win/fail lottery mode is a high probability mode may be cleared to "0".

In the clearing process when updating settings, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if a setting value update process that can change the setting values of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

Thereafter, setting value update processing is executed in step S6621. The contents of the setting value update process are the same as the setting value update process (FIG. 85) in the twenty-second embodiment. After executing the setting value update process, the process moves to the process for controlling the progress of the game starting from step S6609.

According to the above configuration, when the set value is abnormal, the set value update process is started without requiring any special operation by the administrator of the gaming hall. Then, when the setting value update process is completed, the process shifts to a process for controlling the progress of the game. This allows the game to be played in a situation where the settings are set to normal values. On the other hand, in order to complete the setting value update process, it is necessary to perform an OFF operation using the setting key on the setting key insertion section 68a, so the setting value may be set without permission by someone other than the administrator of the game hall and the game may be started. This makes it possible to prevent the occurrence of such events.

Next, a configuration for forcibly stopping the progress of the game when the main CPU 63 is unable to perform various processes normally will be described. FIG. 102(a) is a block diagram for explaining the configuration of the MPU 62.

As shown in FIG. 102(a), the MPU 62 is provided with a main CPU 63, a main ROM 64, and a main RAM 65, as well as a reset signal output section 251 and a program monitoring section 252. The reset signal output section 251 has a function of outputting a reset signal to the main CPU 63. Specifically, the reset signal output unit 251 outputs the reset signal to the main side as a HI level signal when operating power is supplied from the power supply/launch control device 78 and the output disabling condition is not satisfied. A reset signal is output to the CPU 63, and a reset signal is output to the main CPU 63 when operating power is not supplied from the power supply/launch control device 78, or when an output disable condition is satisfied even when operating power is supplied. Do not output to . The main CPU 63 executes various processes when operating power is supplied from the power source/launch control device 78 and receives a reset signal from the reset signal output section 251, and Even if operating power is being supplied, various processes are not executed if a reset signal is not received from the reset signal output section 251. Furthermore, when the main CPU 63 is supplied with operating power from the power supply/launch control device 78 and switches from not receiving a reset signal from the reset signal output unit 251 to receiving a reset signal, The main process (FIG. 100) is started.

The program monitoring unit 252 has a function of monitoring whether or not the main CPU 63 is in a state where various processes can be performed normally. Specifically, the program monitoring unit 252 monitors whether the value of the program counter provided in the main CPU 63 is an abnormal value. The program counter is for storing an address where an instruction to be executed by the main CPU 63 is stored. The possible values of the program counter are determined, and the program monitoring unit 252 monitors whether the value of the program counter is a value other than the possible values. Furthermore, when writing information to the specific control work area 221 by a load command, the program monitoring unit 252 monitors whether the address specified as the write destination area is an abnormal address. Note that the program monitoring unit 252 may be configured to monitor whether or not the address specified as the area to be read is an abnormal address when information is read from the specific control work area 221 by a load command.

When the program monitoring section 252 determines that the value of the program counter is an abnormal value or when determining that the address specified when writing information by a load instruction is an abnormal address, the reset signal output section 251 Outputs a monitoring abnormality signal. When the reset signal output unit 251 receives a monitoring abnormality signal from the program monitoring unit 252, it temporarily stops outputting the reset signal and continues the stop even if operating power is supplied from the power supply/launch control device 78. After stopping the output of the reset signal for a period of time, the output of the reset signal is restarted. The stop duration period is a period sufficient for the main CPU 63 to identify that the output of the reset signal is stopped. As a result, if the value of the program counter becomes an abnormal value, or if the address specified when writing information by a load instruction becomes an abnormal address, the main CPU 63 The main processing will be executed.

FIG. 102(b) is a time chart showing how the reset signal output section 251 outputs the reset signal. 102(b1) shows a period during which operating power is supplied from the power source/launch control device 78, FIG. 102(b2) shows a period during which a reset signal is output from the reset signal output section 251, and FIG. b3) indicates the timing at which a monitoring abnormality signal is output from the program monitoring section 252.

First, to explain the case where a monitoring abnormality signal is not output from the program monitoring unit 252, the supply of operating power from the power source/launch control device 78 to the MPU 62 is started at timing t1 as shown in FIG. , t2, the reset signal output section 251 starts outputting the reset signal as shown in FIG. 102(b). Thereafter, the supply of operating power from the power source/launch control device 78 to the MPU 62 is stopped as shown in FIG. 102(b1) at timing t3, and reset is performed as shown in FIG. 102(b2) at timing t4. The output of the reset signal from the signal output section 251 is stopped.

Next, to explain the case where a monitoring abnormality signal is output from the program monitoring unit 252, the supply of operating power from the power supply/launch control device 78 to the MPU 62 is started at timing t5 as shown in FIG. 102 (b1). As a result, output of the reset signal from the reset signal output section 251 is started at timing t6 as shown in FIG. 102(b). After that, at timing t7, the value of the program counter becomes an abnormal value or the address specified when writing information by a load instruction becomes an abnormal address, so that the program is monitored as shown in FIG. 102 (b3). A monitoring abnormality signal is output from the section 252 to the reset signal output section 251. As a result, as shown in FIG. 102(b2), the output of the reset signal from the reset signal output section 251 is temporarily stopped at the timing t7, and resumed at the subsequent timing t8.

In this case, the main CPU 63 stops executing various processes at timing t7, and starts main processing (FIG. 100) at timing t8, which is the timing at which the rise of the reset signal is confirmed. However, since the power outage process is not executed when the execution of various processes of the main CPU 63 is stopped, the main process (FIG. 100) is executed in a situation where the power outage flag in the work area 221 for specific control is not set to "1". At the same time, the main processing (FIG. 100) is started without saving the checksums for the work area 221 for specific control and the stack area 222 for specific control. Therefore, in the main processing (FIG. 100), a negative determination is made in step S6603 or step S6606, and a clearing process (step S6607) at the time of non-setting update is executed. As a result, when a monitoring abnormality signal is output from the program monitoring unit 252 because the value of the program counter becomes an abnormal value or the address specified when writing information by a load command becomes an abnormal address, It becomes possible to perform a clearing process at the time of non-setting update, in which a predetermined storage area of the work area 221 for specific control and the stack area 222 for specific control is cleared to "0". .

However, in the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if a monitoring abnormality signal is output from the program monitoring unit 252 because the value of the program counter becomes an abnormal value or the address specified when writing information by a load instruction becomes an abnormal address, it will not occur. It is possible to prevent the work area 223 for specific control and the stack area 224 for non-specific control from being cleared to "0".

Returning to the explanation of FIG. 102(b), thereafter, as shown in FIG. 102(b1) at timing t9, the supply of operating power from the power source/launch control device 78 to the MPU 62 is stopped, and at timing t10. As shown in FIG. 102(b2), output of the reset signal from the reset signal output section 251 is stopped.

Next, the timer interrupt processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart in FIG. 103. The timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes of steps S6610 to S6613 are being executed in the main process (FIG. 100). Note that the program corresponding to timer interrupt processing is set as a specific control program.

Steps S6801 to S6819 execute the same processes as steps S5201 to S5219 of the timer interrupt process (FIG. 86) in the twenty-second embodiment. These processes are executed by the main CPU 63 using a specific control program and specific control data. Thereafter, setting monitoring processing is executed (step S6820). FIG. 104 is a flowchart showing the setting monitoring process.

By checking the value of the setting value counter in the work area 221 for specific control, it is determined whether the setting value of the pachinko machine 10 is normal (step S6901). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is.

If the set value is abnormal (step S6901: NO), a copy process of the set value is executed (step S6902). In the copy process, information of a setting value counter used to specify the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in a copy area provided in the work area 221 for specific control. . Thereby, it becomes possible to grasp the setting value of the pachinko machine 10 before execution of the setting value update process to be executed thereafter.

Thereafter, an abnormality command indicating that a setting value abnormality has occurred is transmitted to the audio emission control device 81 (step S6903). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the set value abnormality, and also causes the speaker unit 54 to emit a voice saying "An abnormality in the set value has been detected." Output. Further, the symbol display device 41 displays a text image saying "An abnormality in the set value has been detected." These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By checking the above-mentioned notification, the manager of the game hall can understand that a set value abnormality has occurred.

Thereafter, setting value update processing is executed (step S6904). In other words, each time the timer interrupt process (FIG. 103) is executed, it is monitored whether or not an abnormality has occurred in the set value, and if a set value abnormality is identified, the set value of the pachinko machine 10 is reset. Execute setting value update processing to do this. The contents of the setting value update process are the same as the setting value update process (FIG. 85) in the twenty-second embodiment. Therefore, each time the update button 68b is pressed once, the set value is updated by one step, and the currently selected set value is determined by detecting a game ball with the exit detection sensor 48a. The setting values that are being updated and the set values that have been finalized are displayed on the third notification display device 69c. Thereafter, when the setting key insertion section 68a is switched from the ON state to the OFF state, it is determined that the termination condition for the setting value update process is satisfied. After executing the setting value update process, the process returns to the timer interrupt process (FIG. 103).

Here, in the setting value update process, it is not determined that the termination condition is satisfied just because the setting key insertion section 68a is in the OFF state, but when the setting key insertion section 68a is switched from the ON state to the OFF state. If this happens, it is determined that the termination condition has been met. When the setting value update process is executed in the setting monitoring process, since the setting key insertion section 68a is in the OFF state at the start of the setting value update process, in order to satisfy the termination condition of the setting value update process, It is necessary to insert a setting key into the setting key insertion section 68a, turn it on once, and then turn it off. This makes it possible to prevent the setting value update process from ending even though the administrator of the gaming hall has not performed a proper operation.

When the setting key insertion section 68a is switched from the ON state to the OFF state and the termination condition for the setting value update process is satisfied, step S5111 in the setting value update process (FIG. 85) is executed. It is compared whether the set value stored in the copy area in the work area 221 for specific control and the set value currently set in the set value counter in the work area 221 for specific control are the same. That is, it is determined whether or not the setting value that was set before the setting value update process (step S6904) was executed is the same as the setting value that was set in the current setting value update process. If both setting values are the same (step S5112: NO), the setting maintenance notification described above is performed by executing the process for notification when no change is made (step S5113). On the other hand, if the two setting values are different (step S5112: YES), the setting change notification described above is performed by executing the process for notification at the time of change (step S5114).

In a configuration where a setting value update process is executed when a setting value abnormality has occurred, the setting value that was set before the setting value update process was executed, and the setting value that was set in the setting value update process. If the set values are the same, setting maintenance notification is performed. As a result, even if setting value update processing is executed due to a setting value error, setting maintenance notification will be performed by resetting the setting value that was set in the previous situation, and setting value update due to setting value error. It becomes possible to clearly indicate to the player that the set value has not changed even if the process is executed. By the way, since it is common in gaming halls to record the setting values of each pachinko machine 10 installed, it is possible to perform a setting value update process due to a setting value abnormality so that the set value becomes the recorded setting value. It is possible.

Returning to the explanation of the timer interrupt process (FIG. 103), after the setting monitoring process is executed in step S6820, the management process is executed in step S6821. When executing management processing, the subroutine program corresponding to the management processing set in the specific control program will be executed. Information for specifying the return address of the timer interrupt processing in is written to the stack area 222 for specific control by a push instruction. When the management process is completed, information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process indicated by the return address.

FIG. 105 is a flowchart showing management processing in this embodiment executed by the main CPU 63. Note that the processes from step S7001 to step S7005 in the management process are executed by the main CPU 63 using a specific control program and specific control data.

First, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing (FIG. 103) (step S7001). This prevents the timer interrupt process (FIG. 103), which is a process that corresponds to specific control, from being interrupted and activated in the middle of the management execution process, which will be described later, which is a process that corresponds to non-specific control. becomes possible.

Thereafter, the information in the flag register of the main CPU 63 is saved to the PSW buffer set in the work area 221 for specific control by a load instruction as "LD (_PSWBUF), PSW" (step S7002). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the start of the subroutine program corresponding to management execution processing, the flag register's state before it changes after the subroutine is called or the subroutine starts. It becomes possible to save information to the work area 221 for specific control.

Thereafter, by reading the subroutine program corresponding to the management execution process set in the program for non-specific control, the management execution process is started (step S7003). In this case, information for specifying the return address of the management process after execution of the management execution process is written to the specific control stack area 222 by a push command. When the management execution process is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the management process indicated by the return address.

When returning to the management processing program after execution of the management execution processing, the program is saved as "LD PSW, (_PSWBUF)" to the PSW buffer in the specific control work area 221 in step S7002 by a load command. The information in the flag register is returned to the flag register of the main CPU 63 (step S7004). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S7002 was executed last time. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

Thereafter, interrupt permission is set to switch from a state in which generation of timer interrupt processing (FIG. 103) is prohibited to a state in which generation is permitted (step S7005). This enables new execution of timer interrupt processing.

FIG. 106 is a flowchart showing the management execution process in this embodiment executed by the main CPU 63. Note that the processes from step S7101 to step S7116 in the management execution process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

In steps S7101 to S7108 and steps S7110 to S7116, the same processes as steps S4501 to S4515 of the management execution process (FIG. 78) in the seventeenth embodiment are executed. Further, in step S7109, another monitoring process is executed. When executing the separate monitoring process, the subroutine program corresponding to the separate monitoring process set in the program for non-specific control will be executed, but when the program of the subroutine is executed, after the separate monitoring process is executed. Information for specifying the return address of the management execution process in is written to the stack area 224 for non-specific control by a push command. When the separate monitoring process ends, information for specifying the return address is read out by the pop command, and the program returns to the management execution process indicated by the return address.

FIG. 107 is a flowchart showing another monitoring process. Note that the processes from step S7201 to step S7206 in the separate monitoring process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

In the separate monitoring process, it is determined whether the value of the pointer indicating the processing position of the process being executed in the non-specific control program exceeds the normal numerical range (step S7201). In addition, the information stored in the normal counter area 231, opening/closing execution mode counter area 232, and high-frequency support mode counter area 233 provided in the work area 223 for non-specific control has clearly become abnormal information. It is determined whether or not (step S7202). For example, if the value of the normal out counter 231e in the normal counter area 231 is "0" but the value of the normal general win counter 231a is 1000 or more, it is determined that there is an abnormality. Furthermore, it is determined whether the information stored in the calculation result storage area 234 provided in the work area 223 for non-specific control is clearly abnormal information (step S7203). For example, if the 61st parameter is "0" but any of the 62nd to 64th parameters are not "0", it is determined to be abnormal.

If an affirmative determination is made in any of steps S7201 to S7203, it is assumed that an information abnormality has occurred in the work area 223 for non-specific control, and a partial clearing process for the work area 223 for non-specific control is executed. (Step S7204). In the partial clearing process, storage areas other than the management start flag in the work area 223 for non-specific control are cleared to "0". In this case, the normal counter area 231, the opening/closing execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control.

In addition, by not clearing the management start flag to "0", it is possible to maintain the state in which the management start flag is already set to "1", and the pachinko machine 10 has already been continuously used in the game hall. It is possible to prevent restrictions on collection of historical information from occurring at the shipping stage of the pachinko machine 10 even though the pachinko machine 10 is in use. However, the present invention is not limited to this, and the entire non-specific control work area 223 including the management start flag may be cleared to "0" in step S7204.

Furthermore, in step S7204, the stack area 224 for non-specific control is not cleared to "0". In the stack area 224 for non-specific control, information of various registers used in the process corresponding to specific control in steps S7102 to S7107 in the management execution process (FIG. 106) is saved. In this case, by not clearing the stack area 224 for non-specific control to "0", information on various registers used in processing corresponding to this specific control can be stored in the stack area 224 for non-specific control. This makes it possible to prevent the information saved in H.224 from being deleted. In addition, the stack area 224 for non-specific control stores information on the return address of the management execution process (FIG. 106) after the end of another monitoring process, but the stack area 224 for non-specific control is stored as "0". ” By not clearing the return address information, it is possible to prevent the return address information from being erased.

Thereafter, initial setting processing is executed (step S7205). In the initial setting process, initial setting is performed for the storage area that was cleared to "0" in step S7204 in the work area 223 for non-specific control.

After that, clear notification processing is executed (step S7206). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to "0" is transmitted to the audio emission control device 81. By receiving the command, the audio light emission control device 81 causes the display light emission section 53 to emit light in a manner corresponding to the forced clearing of the work area 223 for non-specific control, and also issues a message from the speaker section 54 saying "History information has been forcibly cleared." Outputs a voice saying “I have done this.” Further, a character image "History information has been forcibly cleared." is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, the present invention is not limited to this, and the above-mentioned notification may be terminated when the notification termination operation is performed by the administrator of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can understand that the work area 223 for non-specific control has been forcibly cleared.

If a negative determination is made in all steps S7201 to S7203, or if the process in step S7206 is executed, the separate monitoring process is ended and the process returns to the monitoring execution process (FIG. 106).

According to this embodiment described in detail above, the following excellent effects are achieved.

If the program monitoring unit 252 identifies that the address specified when writing information by a load instruction is an abnormal address, the reset signal output unit 251 turns the reset signal from OFF to ON, thereby causing the main CPU 63 to Then, the main process (FIG. 100) is executed in the same way as when the supply of operating power is newly started. If the reset signal is turned from OFF to ON, the power outage flag in the work area 221 for specific control is not set to "1" and the checksum at the time of power outage is stored in the work area 221 for specific control. Since the setting has not been updated, the clearing process for non-setting update (step S6607) is forcibly executed. In the clearing process at the time of non-setting update, the storage areas other than the storage area where the setting values of the pachinko machine 10 are stored in the work area 221 for specific control are cleared to "0", and the stack area 222 for specific control is cleared to "0". 0'' is cleared, and initialization processing for these areas is further executed. As a result, if there is a possibility that an information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control and the stack area 222 for specific control On the other hand, by executing the "0" clearing process and the initial setting process, it is possible to eliminate the information abnormality.

When the program monitoring unit 252 identifies that the value of the program counter of the main CPU 63 is an abnormal value, the reset signal output unit 251 turns the reset signal from OFF to ON, so that the main CPU 63 reduces the operating power. The main process (FIG. 100) is executed in the same way as when supply is newly started. If the reset signal is turned from OFF to ON, the power outage flag in the work area 221 for specific control is not set to "1" and the checksum at the time of power outage is stored in the work area 221 for specific control. Since the setting has not been updated, the clearing process for non-setting update (step S6607) is forcibly executed. In the clearing process at the time of non-setting update, the internal storage area of the main CPU 63 including various registers is cleared to "0" and the initial setting process is executed. As a result, if there is a possibility that an information abnormality has occurred in the internal storage area of the main CPU 63, the internal storage area of the main CPU 63 is cleared to "0" and the initial setting process is executed. It becomes possible to eliminate information abnormalities.

On the other hand, in the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, the information abnormality is identified in the program monitoring unit 252 as described above, and the internal storage area of the main CPU 63, the work area 221 for specific control, and the stack area 222 for specific control are cleared to "0". Even when the initial setting process is executed, it is possible to prevent the information on the gaming history from being deleted, and it is also possible to prevent the information on the management results of the gaming history from being deleted. It becomes possible to do so.

If the power failure flag is not set to "1" in the main process (Fig. 100) when the supply of operating power to the main CPU 63 is started, or if the checksums do not match, clear when updating non-settings. In the configuration in which the process (step S6607) is executed, if the program monitoring unit 252 identifies the occurrence of an information abnormality, the reset signal is turned from OFF to ON to ensure that the power outage flag is not set to "1". At the same time, the main processing (FIG. 100) is executed in a situation where no checksum is stored. This makes it possible to eliminate the information abnormality identified by the program monitoring unit 252 by using the configuration for resolving the information abnormality at the time of starting supply of operating power.

In a configuration in which whether or not the checksum is normal is monitored in the main processing (FIG. 100) when the supply of operating power to the main CPU 63 is started, the target for calculating the checksum is A work area 221 for specific control and a stack area 222 for specific control are included, and a work area 223 for non-specific control and a stack area 224 for non-specific control are not included. This makes it possible to specify whether or not an information abnormality has occurred only in the storage area corresponding to the specific control in the main side RAM 65.

If it is identified that the checksum is abnormal in the main process (FIG. 100) when the supply of operating power to the main CPU 63 is started, the clear process at the time of non-setting update (step S6607) is executed. However, in the clearing process at the time of non-setting update, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0" and initial setting processing is executed. On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". This prevents the process corresponding to the specific control from continuing to be executed in the same state even though an information error has occurred in the specific control work area 221 and the specific control stack area 222. At the same time, when an information error occurs in the work area 221 for specific control and the stack area 222 for specific control, even the storage area corresponding to non-specific control in the main side RAM 65 is cleared to "0". It is possible to prevent this from happening.

In the power outage process (steps S6709 to S6712) of the power outage information storage process (FIG. 101), checksums are calculated for the work area 221 for specific control and the stack area 222 for specific control; A checksum is not calculated for a storage area corresponding to non-specific control. This makes it possible to prevent the processing period required to complete the power outage processing from becoming excessively long.

If the occurrence of an abnormality is identified in the information stored in the work area 223 for non-specific control in a separate monitoring process (Fig. 107) executed in the process corresponding to non-specific control, non-specific control is supported. In the separate monitoring process (FIG. 107), which is the process to perform this process, the work area 223 for non-specific control is cleared to "0" and the initial setting process is executed. As a result, even if some abnormality has occurred in the work area 223 for non-specific control, the processing corresponding to the non-specific control is executed while the information in the work area 223 for non-specific control is maintained as it is. This makes it possible to prevent this from happening. In addition, since the process of clearing the work area 223 for non-specific control to "0" and the process of initializing it are executed in the process corresponding to non-specific control, regarding updating the information of the work area 223 for non-specific control, It becomes possible to prevent intervening processing corresponding to specific control.

In the separate monitoring process (FIG. 107), which is the process corresponding to non-specific control, monitoring is executed to determine whether an abnormality has occurred in the work area 223 for non-specific control, and if an abnormality has occurred, Then, processing for clearing the non-specific control work area 223 to "0" and initialization processing are executed. As a result, monitoring whether an abnormality has occurred in the work area 223 for non-specific control and executing initialization of the work area 223 for non-specific control can be performed as a series of processes in the process corresponding to non-specific control. It can be executed as

If the occurrence of an abnormality is identified in the information stored in the work area 223 for non-specific control in the separate monitoring process (FIG. 107) executed in the process corresponding to non-specific control, the Although the work area 223 is cleared to "0" and initialized, the stack area 224 for non-specific control is not cleared to "0" and initialized. This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control, while also managing the information of various registers used in processes corresponding to specific control saved in the stack area 224 for non-specific control, and separately managing the information. It is possible to prevent the return address information from being deleted after the processing is completed.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and initializing it is executed in the process corresponding to specific control, and the work area 223 for non-specific control is cleared to "0". The process of clearing and initializing is executed in a process corresponding to non-specific control. As a result, regarding such initialization processing, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to specific control, and the It becomes possible to treat the work area 223 as a dedicated storage area for processing corresponding to non-specific control.

Note that the main process (FIG. 100) is configured to monitor whether or not the set values are normal in steps S6608 and S6614, but the process of monitoring whether or not these set values are normal is not necessary. It may be configured so that it is not executed. This makes it possible to reduce the processing load of the processing at the time of starting the supply of operating power, which is executed when the supply of operating power to the main CPU 63 is started. In addition, even if the set value is not monitored to see if it is normal in the processing at the start of the supply of operating power, the timer interrupt executed after the processing at the start of the supply of operating power is completed. Since the setting monitoring process (step S6820) of the process (FIG. 103) monitors whether the set value is normal or not, it is possible to deal with it if the set value is abnormal.

Furthermore, the configuration monitoring process (step S6820) is not limited to a configuration in which the timer interrupt process (FIG. 103) is executed every time the timer interrupt process (FIG. 103) is started. A configuration may be adopted in which the setting monitoring process (step S6820) is executed every time the process is executed a number of times (for example, 10,000 times). In this case, it is possible to periodically monitor whether or not the set value is normal, while reducing the frequency with which the monitoring is performed.

Further, a configuration may be adopted in which the setting monitoring process (step S6820) is executed in the remaining process (steps S6610 to S6613) in the main process (FIG. 100). In this case, it becomes possible to monitor whether or not the set value is normal using the idle time when the timer interrupt process is not being executed.

Furthermore, a configuration may be adopted in which the setting monitoring process (step S6820) is executed when a new gaming session is started. More specifically, when a game round is newly started, the setting monitoring process (step S6820) may be executed before the validity determination process is executed. This makes it possible to prevent the validity determination process from being executed in a situation where the set value is abnormal.

In addition, if it is specified that the setting value is abnormal in the setting monitoring process (step S6820), instead of the configuration that moves to the setting value updating process (step S6904), a It is also possible to set the game stop flag to "1". In this case, if an affirmative determination is made in step S6807 in the timer interrupt process (FIG. 103), the processes in steps S6808 to S6821 will not be executed, so if the set value is abnormal, the progress of the game will be stopped. becomes. However, since the processing from step S6801 to step S6806 is executed, power outage monitoring is executed, and the hit random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI are updated, and Fraud detection is performed. Further, when the game stop flag is set to "1", a notification indicating that the setting value should be updated may be executed to prompt execution of the setting value updating process. In this case, the gaming hall manager who has confirmed the notification turns off the power and then turns on the power in such a way that the setting value update process is executed, thereby clearing the game stop flag to "0". As a result, the state in which the progress of the game is stopped is released, and the setting value update process is executed to set the normal setting value.

In addition, if it is specified that the setting value is abnormal in the setting monitoring process (step S6820), the setting abnormality flag provided in the work area 221 for specific control is set to "1" and the main processing (step S6820) is performed. Fig. 100) may be configured to start, and the progress of the game is stopped with the setting abnormality flag set to "1", and in order to release the stopped state of the game, turn off the power → A configuration may be adopted in which it is necessary to turn ON. In this case, even if no operation is performed to execute the setting value update process in the main process (Fig. 100), if the setting abnormality flag is set to "1", the setting value will be forcibly set. By executing the value update process, it becomes possible to forcibly set a new setting value using the setting value update process set in the main process (FIG. 100).

Furthermore, when the program monitoring unit 252 identifies the occurrence of an information abnormality and the reset signal is forcibly turned from OFF to ON, initialization processing is executed for the work area 221 for specific control. , the setting value of the pachinko machine 10 may be configured to be "setting 1". In addition, if the program monitoring unit 252 identifies the occurrence of an information abnormality and the reset signal is forcibly turned from OFF to ON, the settings are made after initialization processing is executed for the work area 221 for specific control. A configuration may also be adopted in which value update processing is executed.

In addition, if the program monitoring unit 252 identifies the occurrence of an information abnormality, the reset signal is not forcibly turned OFF → ON, and the clearing process (step S6607) at the time of non-setting update is executed. Alternatively, a configuration may be adopted in which clear processing (step S6620) and setting value update processing (step S6621) are executed when updating settings.

In addition, in the clearing process at the time of non-setting update (step S6607), the setting value of the pachinko machine 10 becomes "setting 1" by initializing the storage area that stores setting value information in the work area 221 for specific control. It is also possible to adopt a configuration in which the setting value is a predetermined setting value other than "setting 1." Thereby, when the clearing process at the time of non-setting update is executed, it becomes possible to set the setting value to a predetermined value.

In addition, in the clearing process at the time of non-setting update (step S6607), the work area 223 for non-specific control and the stack area 224 for non-specific control were configured not to be cleared to "0", but it may also be configured that they are cleared to "0". good.

Further, although the management start flag is not cleared to "0" in step S7204 in the separate monitoring process (FIG. 107), the management start flag may be cleared to "0". Further, in step S7204 in the separate monitoring process (FIG. 107), the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 may be configured not to be cleared to "0", and the calculation result storage area 234 may be configured not to be cleared to "0".

Furthermore, in step S7204 in the separate monitoring process (FIG. 107), "0" clearing processing and initial setting processing are executed not only for the work area 223 for non-specific control but also for the stack area 224 for non-specific control. It may also be a configuration. In this case, in the stack area 224 for non-specific control, the return address information of the management execution process after the end of another monitoring process and the process corresponding to the specific control saved in the stack area 224 for non-specific control are used. It is preferable not to erase the information in the various registers.

In addition, in the separate monitoring process (FIG. 107), it is monitored whether or not an abnormality has occurred in the stack area 224 for non-specific control, and if it is identified that an abnormality has occurred, the stack area 224 for non-specific control is monitored. A configuration may also be adopted in which the process of clearing the stack area 224 to "0" and the initial setting process are executed. In this case, it is preferable not to erase information on the return address of the management execution process after the separate monitoring process ends in the stack area 224 for non-specific control.

Furthermore, the configuration is not limited to a configuration in which both the work area 221 for specific control and the stack area 222 for specific control are subject to checksum calculation, and only the work area 221 for specific control is subject to checksum calculation. Alternatively, only the stack area 222 for specific control may be subject to checksum calculation.

<31st embodiment>
This embodiment is different from the above-mentioned 30th embodiment in the processing configuration of the main processing executed by the main CPU 63. Hereinafter, the configuration that is different from the above-mentioned 30th embodiment will be explained. Note that descriptions of the same configurations as those of the 30th embodiment will be basically omitted.

FIG. 108 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S7301 to step S7322 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

First, power-on wait processing is executed (step S7301). In the power-on wait process, for example, the main process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. The operation start and initial setting of the symbol display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S7302).

Thereafter, it is determined whether the power outage flag provided in the work area 221 for specific control in the main side RAM 65 is set to "1" (step S7303). If the power outage flag is set to "1" (step S7303: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7304). The checksum calculation method is the same as step S6604 of the main processing (FIG. 100) in the thirtieth embodiment.

Thereafter, the work area 221 for specific control and the stack area for specific control that were calculated in the power outage process executed immediately before the supply of operating power to the MPU 62 was stopped and saved in the work area 221 for specific control. The checksum for 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S7304 (step S7305). Then, it is determined whether these checksums match (step S7306).

If an affirmative determination is made in step S7306, the processes of steps S7307 to S7320 are executed. In this case, the processing contents of steps S7307 to S7314 are the same as steps S6614 to S6621 of the main processing (FIG. 100) in the thirtieth embodiment, and steps S7316 to S7320 are the same as the main processing in the thirtieth embodiment. This is the same as steps S6609 to S6613 in the process (FIG. 100).

Furthermore, if the reset button 68c is being pressed (step S7308: YES) and a negative determination is made in any of steps S7309 to S7311, clearing processing for non-setting update is executed (step S7308: YES). S7315). The contents of the clearing process at the time of non-setting update are the same as step S6607 of the main process (FIG. 100) in the thirtieth embodiment. However, in this embodiment, after executing the clearing process at the time of non-setting update, the process proceeds to steps S7316 to S7320 without determining whether the set value is normal. Only if a negative determination is made in any of steps S7309 to S7311, the clearing process at the time of non-setting update (step S7315) will be executed, but before the processes in steps S7309 to S7311 are executed. Since it is determined in step S7307 whether the set value is normal, there is no need to determine whether the set value is normal after executing the clearing process at the time of non-setting update.

If a negative determination is made in step S7303 or step S7306, that is, if the power outage flag in the work area 221 for specific control is not set to "1" or if a checksum abnormality occurs, clear processing at the time of abnormality is executed. (Step S7321). FIG. 109 is a flowchart showing the clearing process in the event of an abnormality. Note that the processing in steps S7401 to S7405 in the abnormality clearing process is executed by the main CPU 63 using a specific control program and specific control data.

First, clearing processing of the work area 221 for specific control is executed (step S7401). In the clearing process, in the work area 221 for specific control, excluding the area in which setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting value counter), the work area for the specific control is 221 is cleared to "0" and initial settings are made to the area cleared to "0". As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted.

Thereafter, clearing processing of the stack area 222 for specific control is executed (step S7402). In the clearing process, the stack area 222 for specific control is cleared to "0" and initial settings are performed.

Thereafter, the information in the flag register of the main CPU 63 is saved to the specific control stack area 222 by a push command as "PUSH PSW" (step S7403). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the start of the subroutine program that corresponds to the clear processing for non-specific control, the flag in its state before it changes after the subroutine is called or the subroutine starts. Register information can be saved in the stack area 222 for specific control. Note that the amount of information in the flag register is 1 byte.

Thereafter, by reading the subroutine program corresponding to the clearing process for non-specific control set in the program for non-specific control, the clearing process for the non-specific control is started (step S7404). In this case, information for specifying the return address of the clearing process in the event of an abnormality after the execution of the clearing process for non-specific control is written to the stack area 222 for specific control by a push command. Then, when the clearing process for non-specific control is completed, information for specifying the return address is read out by the pop instruction, and the program returns to the abnormality clearing process indicated by the return address.

When returning to the abnormality clear processing program after executing the clear processing for non-specific control, the flag register saved to the stack area 222 for specific control in step S7402 by the pop instruction as "POP PSW" information is returned to the flag register of the main CPU 63 (step S7405). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S7402 was executed. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

FIG. 110 is a flowchart showing clear processing for non-specific control. Note that the processing from step S7501 to step S7516 in the clearing process for non-specific control is executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as "LD SP, Y(u+2)", Y(u+2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S7501). In this case, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, information on the last address in the stack area 224 for non-specific control is set in the stack pointer.

Thereafter, the information in the WA register of the main CPU 63 is saved to the WA buffer set in the work area 223 for non-specific control by a load instruction as "LD (_WABUF), WA" (step S7502). Further, as "LD (_BCBUF), BC", information in the BC register of the main CPU 63 is saved to the BC buffer set in the work area 223 for non-specific control by a load instruction (step S7503). Also, “LD
(_DEBUF), DE", the information in the DE register of the main CPU 63 is saved to the DE buffer set in the work area 223 for non-specific control by a load instruction (step S7504). Further, as "LD (_HLBUF), HL", information in the HL register of the main CPU 63 is saved to the HL buffer set in the work area 223 for non-specific control by a load instruction (step S7505). Further, as "LD (_IXBUF), IX", information in the IX register of the main CPU 63 is saved to the IX buffer set in the work area 223 for non-specific control by a load instruction (step S7506). Further, as "LD (_IYBUF), IY", information in the IY register of the main CPU 63 is saved to the IY buffer set in the work area 223 for non-specific control by a load instruction (step S7507).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag register described above. In this case, in steps S7502 to S7507, each information of the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, is is saved in a corresponding buffer in the work area 223 for non-specific control. Note that the information amount of the WA register, BC register, DE register, HL register, IX register, and IY register is all 2 bytes.

These WA registers, BC registers, DE registers, HL registers, IX registers, and IY registers are used for processing corresponding to non-specific control, such as partial clearing processing of the work area 223 for non-specific control (step S7508) and initial setting processing ( This is a register used in step S7509). The information set in such registers is saved to the work area 223 for non-specific control before executing the partial clearing process (step S7508) and the initial setting process (step S7509) of the work area 223 for non-specific control. By doing so, it becomes possible to save the information in these registers used for specific control before non-specific control is started. Therefore, even if these registers are overwritten during non-specific control, the status of these registers can be changed by restoring the information saved in the work area 223 for non-specific control to these registers when terminating non-specific control. It becomes possible to restore the state to the state corresponding to the specific control before the non-specific control was executed.

In addition, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers to the work area 223 for non-specific control, the work area 223 for non-specific control, which is a process corresponding to non-specific control, is In the partial clearing process (step S7508) and the initial setting process (step S7509), information on the WA register, BC register, DE register, HL register, IX register, and IY register to be used is selectively set for non-specific control. By saving the information to the work area 223, it is possible to suppress the capacity secured for saving register information in the work area 223 for non-specific control. Therefore, while ensuring a large capacity of the work area 223 for non-specific control that can be used during the partial clearing process (step S7508) and the initial setting process (step S7509) of the work area 223 for non-specific control, the above-mentioned procedure is performed. It becomes possible to save information in such registers. Of course, among the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63, registers other than the WA register, BC register, DE register, HL register, IX register, and IY register support non-specific control. The information set before the start of the process is stored and held until the process corresponding to the non-specific control is finished and the process corresponding to the specific control is restarted.

Furthermore, by saving register information to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be kept small. It becomes possible. In addition, when using the stack area 224 for non-specific control, as described above, the information is written in the order in which the later information is read out first, so if the order in which the information is read out is shifted due to some kind of noise or the like. If this happens, all subsequent reading order information will be restored to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. In contrast, by saving register information to the work area 223 for non-specific control, it is possible to prevent the above-mentioned phenomenon from occurring even when there is a large amount of information to be saved. .

After executing the processes of steps S7502 to S7507, a process of partially clearing the work area 223 for non-specific control is executed (step S7508). In the partial clearing process, among the storage areas of the work area 223 for non-specific control, storage areas other than the storage area where information of various registers of the main CPU 63 used in processing corresponding to specific control are saved Clear to "0". Specifically, among the storage areas of the work area 223 for non-specific control, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer, and IY buffer are not cleared to "0", while the memory other than these various buffers is Clear the area to "0".

In this case, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control. In addition, by not clearing to "0" the storage area where the information of various registers of the main CPU 63 used in the process corresponding to specific control is saved, the process corresponding to non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to restore information used in the process corresponding to the specific control to various registers of the main CPU 63.

Furthermore, in step S7508, the stack area 224 for non-specific control is not cleared to "0". The stack area 224 for non-specific control stores information on the return address of the clearing process in the event of an abnormality (FIG. 109) after the clearing process for non-specific control is completed, but the stack area 224 for non-specific control By not clearing 224 to "0", it is possible to prevent the information of this return address from being erased.

Thereafter, initial setting processing is executed (step S7509). In the initial setting process, initial setting is performed for the storage area that was cleared to "0" in step S7508 in the work area 223 for non-specific control.

Thereafter, as "LD SP, Y(r+α)", a load instruction is used to return to specific control in the stack pointer of the main CPU 63, similar to step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment. Y(r+α) is set as a fixed address at the time (step S7510). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, the information saved in the WA buffer of the work area 223 for non-specific control is overwritten in the WA register of the main CPU 63 by a load instruction as "LD WA, (_WABUF)" (step S7511). Also, as "LD BC, (_BCBUF)", the information saved in the BC buffer of the non-specific control work area 223 is overwritten in the BC register of the main CPU 63 by the load instruction (step S7512). Further, as "LD DE, (_DEBUF)", the information saved in the DE buffer of the work area 223 for non-specific control is overwritten in the DE register of the main CPU 63 by the load instruction (step S7513). Also, as "LD HL, (_HLBUF)", the information saved in the HL buffer of the work area 223 for non-specific control is overwritten in the HL register of the main CPU 63 by the load instruction (step S7514). Further, as "LD IX, (_IXBUF)", the information saved in the IX buffer of the work area 223 for non-specific control is overwritten in the IX register of the main CPU 63 by the load instruction (step S7515). Also, as "LD IY, (_IYBUF)", the information saved in the IY buffer of the work area 223 for non-specific control is overwritten in the IY register of the main CPU 63 by the load instruction (step S7516). By executing the processing from step S7511 to step S7516, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63. It is possible to restore the information to the information corresponding to the specific control immediately before the control.

According to the above configuration, in the main process (FIG. 108) that is executed when the supply of operating power to the main CPU 63 is started, if the power outage flag is not set to "1" or the checksum is abnormal. In some cases, the abnormality clearing process (step S7321) is executed, so that not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control is set to "0". ” is cleared and initialized. If an information abnormality has occurred in the work area 221 for specific control, there is a possibility that an information abnormality has also occurred in the work area 223 for non-specific control. The work area 223 for non-specific control is also initialized to prevent processing corresponding to non-specific control from being executed in the same state even though an information abnormality has occurred in the work area 223 for non-specific control. It becomes possible to do so.

Even if the process of clearing the work area 223 for non-specific control to "0" and the process of initializing it are executed in the clear process at the time of abnormality (step S7321), the work area for non-specific control The information in various registers used in the process corresponding to the specific control saved in 223 is not cleared to "0". As a result, the process of clearing the work area 223 for non-specific control to "0" while not erasing the information used in the process corresponding to specific control after the process corresponding to non-specific control is completed. And it becomes possible to execute the initial setting process.

Even if the process of clearing the work area 223 for non-specific control to "0" and the process of initializing it are executed in the clearing process at the time of abnormality (step S7321), the stack area 224 for non-specific control The process of clearing it to "0" and the process of initializing it are not executed. This makes it possible to prevent the return address information from being deleted after the non-specific control clearing process (FIG. 110) is completed.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed in the process corresponding to specific control, and the work area 223 for non-specific control is cleared to "0". 0'' clearing process and initializing process are executed in the process corresponding to non-specific control. As a result, regarding the process of clearing to "0" and the process of initializing, the work area 221 for specific control and the stack area 222 for specific control are treated as storage areas dedicated to the process corresponding to the specific control, and the The work area 223 for specific control can be treated as a dedicated storage area for processing corresponding to non-specific control.

Note that the configuration is not limited to a configuration in which both the work area 221 for specific control and the stack area 222 for specific control are subject to checksum calculation, and only the work area 221 for specific control is subject to checksum calculation. Alternatively, only the stack area 222 for specific control may be subject to checksum calculation.

Further, a configuration may be adopted in which the work area 223 for non-specific control is the target of checksum calculation. In this case, the work area 221 for specific control and the work area 223 for non-specific control may be configured to be checksum calculation targets, and the stack area 222 for specific control and the work area 223 for non-specific control may be checked. The configuration may be such that the check sum is calculated, or the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control may be subject to check sum calculation.

Further, a configuration may be adopted in which the stack area 224 for non-specific control is the target of checksum calculation. In this case, the work area 221 for specific control and the stack area 224 for non-specific control may be configured as checksum calculation targets, and the stack area 222 for specific control and the stack area 224 for non-specific control may be checked. The configuration may be such that the check sum is calculated, or the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control may be subject to check sum calculation.

Further, a configuration may be adopted in which the work area 223 for non-specific control and the stack area 224 for non-specific control are the targets of checksum calculation. In this case, the work area 221 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control may be configured to be checksum calculation targets, and the stack area 222 for specific control, the stack area 224 for non-specific control, and the stack area 224 for non-specific control may be configured. The work area 223 for specific control and the stack area 224 for non-specific control may be configured as checksum calculation targets. The work area 223 and the stack area 224 for non-specific control may be configured to be checksum calculation targets.

Furthermore, in steps S7508 and S7509 in the clearing process for non-specific control (FIG. 110), not only the work area 223 for non-specific control but also the stack area 224 for non-specific control is cleared to "0". It may also be configured to execute initial setting processing. In this case, it is preferable not to erase the return address information of the abnormality clearing process after the non-specific control clearing process is completed.

Further, in step S7508 in the clearing process for non-specific control (FIG. 110), the management start flag is cleared to "0", but the management start flag may not be cleared to "0". Further, in step S7508 in the clearing process for non-specific control (FIG. 110), the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 may be configured not to be cleared to "0". A configuration may also be adopted in which the calculation result storage area 234 is not cleared to "0".

<Thirty-second embodiment>
This embodiment is different from the above-mentioned 30th embodiment in the processing configuration regarding monitoring of information abnormalities in the main side RAM 65 using a checksum. Hereinafter, the configuration that is different from the above-mentioned 30th embodiment will be explained. Note that descriptions of the same configurations as those of the 30th embodiment will be basically omitted.

FIG. 111 is a flowchart showing power outage information storage processing in this embodiment executed by the main CPU 63. Note that the power outage information storage process is executed in step S6801 in the timer interrupt process (FIG. 103). Further, the processing from step S7601 to step S7613 in the power outage information storage process is executed by the main CPU 63 using a specific control program and specific control data.

Steps S7601 to S7608 in the power outage information storage process are the same as steps S6701 to S6708 in the power outage information storage process (FIG. 101) in the thirtieth embodiment. If the occurrence of a power outage is identified, an affirmative determination is made in step S7608, and the power outage processing in steps S7609 to S7613 is executed.

Specifically, first, a power outage flag provided in the work area 221 for specific control is set to "1" (step S7609). As a result, if power outage processing is executed normally and information is stored and retained in the main side RAM 65 normally, when the supply of operating power to the main side CPU 63 is restarted, the specific control This means that the power outage flag of the work area 221 is set to "1".

Thereafter, checksums are calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7610). In this case, the storage areas in the work area 221 for specific control and the stack area 222 for specific control, which are the targets of calculation when calculating the checksum for specific control, are stored in step S7701 of the checksum monitoring process (FIG. 112), which will be described later. This area is the same as the storage area in the specific control work area 221 and specific control stack area 222 on which the specific control checksum is calculated. In addition, the storage area to be calculated when calculating the checksum for specific control includes an area (specifically, is a set value counter). Then, the calculated checksum for specific control is stored in a storage area for storing the checksum for specific control in the work area 221 for specific control, which is excluded from the calculation target of the checksum for specific control. Store it in the storage area where it is located.

Thereafter, checksums are calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7611). In this case, the storage areas in the work area 223 for non-specific control and the stack area 224 for non-specific control, which are the targets of calculation when calculating the checksum for non-specific control, are used for checksum monitoring processing (FIG. 112), which will be described later. This is the same storage area as the work area 223 for non-specific control and the stack area 224 for non-specific control, which are the targets of the calculation of the checksum for non-specific control in step S7706. Then, the calculated checksum for non-specific control is stored in a storage area for storing the checksum for non-specific control in the work area 221 for specific control, and is excluded from the calculation target of the checksum for specific control. The data is stored in the storage area where the data is stored.

Thereafter, all output port information in the register of the main CPU 63 is set to "0" (step S7612), and access to the main RAM 65 is prohibited (step S7613). Then, the infinite loop continues until the power is completely cut off and processing can no longer be executed.

Next, the checksum monitoring process executed by the main CPU 63 will be described with reference to the flowchart in FIG. 112. Note that the checksum monitoring process is executed in place of steps S6604 to S6606 in the main process (FIG. 100). Further, the processes from step S7701 to step S7711 in the checksum monitoring process are executed by the main CPU 63 using a specific control program and specific control data.

First, a checksum for specific control is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7701). The method of calculating the checksum for the specific control is the same as step S7610 in the power outage information storage process (FIG. 111). Thereafter, the checksum for specific control calculated in step S7610 of the power outage processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control is used for specific control. At the same time, the read checksum for specific control is compared with the checksum for specific control calculated in step S7701 (step S7702). Then, it is determined whether the checksums for specific control match (step S7703).

If the checksums for specific control do not match (step S7703: NO). Clear processing of the work area 221 for specific control is executed (step S7704). In the clearing process, in the work area 221 for specific control, excluding the area in which setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting value counter), the work area for the specific control is 221 is cleared to "0" and the initial settings are executed. As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. In addition, in the clearing process, initial settings are executed after various registers of the main CPU 63 are also cleared to "0". Further, the stack area 222 for specific control is cleared to "0" and initial settings are executed (step S7705).

If an affirmative determination is made in step S7703 or if the process in step S7705 is executed, a checksum for non-specific control is calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7706). The method of calculating the checksum for non-specific control is the same as step S7611 in the power outage information storage process (FIG. 111). Thereafter, the checksum for non-specific control that was calculated in step S7611 of the power outage process executed immediately before the supply of operating power to the MPU 62 was stopped and stored in the work area 221 for specific control is used for specific control. At the same time, the read checksum for non-specific control is compared with the checksum for non-specific control calculated in step S7706 (step S7707). Then, it is determined whether the checksums for non-specific control match (step S7708).

If the checksums for non-specific control do not match (step S7708: NO), the information in the flag register of the main CPU 63 is saved to the stack area 222 for specific control by a push command as "PUSH PSW" ( Step S7709). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half-carry flag, and the like, and the information in the flag register changes depending on the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the start of the subroutine program that corresponds to the clear processing for non-specific control, the flag in its state before it changes after the subroutine is called or the subroutine starts. Register information can be saved in the stack area 222 for specific control. Note that the amount of information in the flag register is 1 byte.

Thereafter, by reading the subroutine program corresponding to the clearing process for non-specific control set in the program for non-specific control, the clearing process for the non-specific control is started (step S7710). In this case, information for specifying the return address of the checksum monitoring process after execution of the non-specific control clearing process is written to the specific control stack area 222 by a push command. When the clearing process for non-specific control is completed, information for specifying the return address is read out by a pop instruction, and the program returns to the checksum monitoring process indicated by the return address.

When returning to the abnormality clearing program after executing the clearing process for non-specific control, the flag register saved to the stack area 222 for specific control in step S7709 by the pop instruction as "POP PSW" information is returned to the flag register of the main CPU 63 (step S7711). As a result, the information in the flag register of the main CPU 63 returns to the information at the time when step S7709 was executed. In other words, the information in the flag register of the main CPU 63 returns to information for executing specific control.

FIG. 113 is a flowchart showing clear processing for non-specific control. Note that the processing from step S7801 to step S7818 in the clearing process for non-specific control is executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

Steps S7801 to S7807 in the clearing process for non-specific control are the same as steps S7501 to S7507 in the clearing process for non-specific control (FIG. 110) in the 31st embodiment.

Thereafter, a partial clearing process of the work area 223 for non-specific control is executed (step S7808). In the partial clearing process, among the storage areas of the work area 223 for non-specific control, storage areas other than the storage area where information of various registers of the main CPU 63 used in processing corresponding to specific control are saved Clear to "0". Specifically, among the storage areas of the work area 223 for non-specific control, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer, and IY buffer are not cleared to "0", while the memory other than these various buffers is Clear the area to "0".

In this case, the normal counter area 231, the opening/closing execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate information abnormalities in the work area 223 for non-specific control. In addition, by not clearing to "0" the storage area where the information of various registers of the main CPU 63 used in the process corresponding to specific control is saved, the process corresponding to non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to restore information used in the process corresponding to the specific control to various registers of the main CPU 63.

Thereafter, initial setting processing is executed (step S7809). In the initial setting process, initial setting is performed for the storage area that was cleared to "0" in step S7808 in the work area 223 for non-specific control.

Thereafter, a process of partially clearing the stack area 224 for non-specific control is executed (step S7810). In the partial clearing process, information on the return address of the checksum monitoring process (FIG. 112) after the clearing process for non-specific control is completed is stored in each storage area of the stack area 224 for non-specific control. Clear all memory areas other than the memory area to "0". This prevents the return address information of the checksum monitoring process (FIG. 112) from being erased after the clearing process for non-specific control is completed, while also preventing information errors in the stack area 224 for non-specific control from being erased. It becomes possible to eliminate the problem.

Thereafter, initial setting processing is executed (step S7811). In the initial setting process, initial setting is performed for the storage area that was cleared to "0" in step S7810 in the stack area 224 for non-specific control.

Thereafter, the processes of steps S7812 to S7818 are executed. These steps S7812 to S7818 are the same as steps S7510 to S7516 in the non-specific control clearing process (FIG. 110) in the thirty-first embodiment.

According to the above configuration, the checksum for the work area 221 for specific control and the stack area 222 for specific control and the checksum for the work area 223 for non-specific control and the stack area 224 for non-specific control are Calculated separately. This makes it possible to individually identify information abnormalities for each of the storage area corresponding to specific control in the main side RAM 65 and the storage area corresponding to non-specific control in the main side RAM 65.

If there is an abnormality in the checksum for specific control, the work area 221 for specific control and the stack area 222 for specific control are cleared to 0 and the initial setting process is performed, and the checksum for non-specific control is If there is an abnormality in the checksum, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" and initialized. This makes it possible to narrow down the targets for executing the "0" clearing process and the initial setting process to the area where the checksum abnormality has been identified.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed in the process corresponding to specific control, and the work area 223 for non-specific control is cleared to "0". 0'' clearing process and initializing process are executed in the process corresponding to non-specific control. As a result, regarding the "0" clearing process and the initial setting process, the work area 221 for specific control and the stack area 222 for specific control are treated as storage areas dedicated to the process corresponding to specific control, and non-specific It becomes possible to treat the control work area 223 as a dedicated storage area for processing corresponding to non-specific control.

Although the management start flag is cleared to "0" in step S7808 in the clearing process for non-specific control (FIG. 113), the management start flag may not be cleared to "0". Further, in step S7808 in the clearing process for non-specific control (FIG. 113), the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 may not be cleared to "0". A configuration may also be adopted in which the calculation result storage area 234 is not cleared to "0".

<33rd embodiment>
This embodiment is different from the fifteenth embodiment described above in the processing configuration executed by the main CPU 63. Hereinafter, configurations that are different from the fifteenth embodiment described above will be explained. Note that the description of the same configuration as in the fifteenth embodiment is basically omitted.

FIG. 114 is a flowchart showing the main processing in this embodiment executed by the main CPU 63. Note that the processing from step S7901 to step S7924 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63.

First, power-on initial setting processing is executed (step S7901). In the power-on initial setting process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, 1 second) has elapsed after the main process is started. During this predetermined wait period, the start of operation and initial setting of the symbol display device 41 are completed. Also, access to the main RAM 65 is permitted.

Thereafter, internal function register setting processing is executed (step S7902). In the internal function register setting process, the interrupt cycle of the first timer interrupt process (Figure 117), which is a process that is started by periodically interrupting the main process, is set to the first interrupt cycle (specifically, 4 milliseconds). At the same time, the interrupt cycle of the second timer interrupt process (Figure 123), which is a process that is started by periodically interrupting the main process, is set to a second interrupt cycle that is shorter than the first interrupt cycle. (Specifically, set to 2 milliseconds).

That is, in this embodiment, the first timer interrupt process and the second timer interrupt process exist so that the interrupt period is relatively long and short as the timer interrupt process. Both the first timer interrupt process and the second timer interrupt process are started by interrupting the main process. Further, the second timer interrupt process is started by interrupting the first timer interrupt process. On the other hand, the first timer interrupt process interrupts the second timer interrupt process and is not activated. In addition, if both the first and second interrupt cycles have elapsed in a situation where both the first timer interrupt process and the second timer interrupt process are not being executed, the second timer interrupt process The timer interrupt processing is activated first. In this respect, it can be said that the second timer interrupt process is a process that is activated with priority over the first timer interrupt process.

In the internal function register setting process, the first interrupt cycle of the first timer interrupt process is set in a predetermined register of the main CPU 63, and the second interrupt cycle of the second timer interrupt process is set in a specific register of the main CPU 63. do. Further, in the internal function register setting process, in addition to setting the first and second interrupt cycles, for example, setting process of the numerical range of various counters such as the numerical range of the jackpot random number counter C1 is executed.

Thereafter, the start-up processing flag provided in the work area 221 for specific control is set to "1" (step S7903). The start-up processing flag indicates that even if the first timer interrupt processing is started, the first timer interrupt processing should be terminated without executing the various processes set for the first timer interrupt processing. This is a flag for specifying by the main CPU 63. By setting the start-up process flag to "1", even if the first timer interrupt process is started, various processes set for the first timer interrupt process will not be executed, and the first timer interrupt process will not be executed. The timer interrupt processing will be ended.

Thereafter, interrupt permission is set (step S7904). As a result, the first timer interrupt process (FIG. 117) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 123) is interrupted and activated in the second interrupt cycle. However, since the start-up processing flag is set to "1" in step S7903, even if the first timer interrupt processing is started, various processes set for the first timer interrupt processing are executed. The first timer interrupt process is ended without any interruption.

Thereafter, it is determined whether or not the reset button 68c has been pressed (step S7905). That is, it is determined whether or not the pachinko machine 10 is powered on while the reset button 68c is pressed and the supply of operating power to the MPU 62 is started. Here, in this embodiment, the main controller 60 is provided with a setting key insertion section 68a and a reset button 68c, but is not provided with an update button 68b. Furthermore, the main control device 60 is provided with first to fourth notification display devices 201 to 204, as in the eleventh embodiment, instead of the first to third notification display devices 69a to 69c.

If the reset button 68c is not pressed (step S7905: NO), it is determined whether the power outage flag provided in the work area 221 for specific control is set to "1" (step S7906). When a power outage process is executed in the power outage information storage process (step S8202) of the first timer interrupt process (FIG. 117), which will be described later, the power outage flag is set to "1". The power outage flag is a flag used by the main CPU 63 to specify whether or not the power outage processing was appropriately performed during the previous power cutoff.

If the power outage flag is set to "1" (step S7906: YES), a checksum is calculated for the specific control work area 221 and the specific control stack area 222 (step S7907). The checksum calculation method is arbitrary, but the calculation method is the same as the calculation method when the checksum is calculated in the power outage process in the power outage information storage process (step S8202) of the first timer interrupt process (FIG. 117), which will be described later. That's the method. The checksum calculated in the power outage processing will be stored in the work area 221 for specific control, but the storage area of the work area 221 for specific control in which this checksum is stored is Excluded from the storage area subject to calculation.

That is, when calculating the checksum, a storage area that is a part of the storage area in the work area 221 for specific control and the stack area 222 for specific control is the storage area to be calculated. In the storage area to be calculated, a checksum is calculated in the power outage processing when the supply of operating power to the MPU 62 is stopped, and then the supply of operating power to the MPU 62 is resumed and the process of step S7907 is executed. This storage area is basically a storage area where information is not rewritten if power supply such as backup power is continued to the work area 221 for specific control and the stack area 222 for specific control until the specific control work area 221 and the stack area 222 for specific control are continued. Therefore, the information in the work area 221 for specific control and the stack area 222 for specific control is not changed after the supply of operating power to the MPU 62 is stopped until the supply of operating power to the MPU 62 is restarted. In this case, the checksums for the work area 221 for specific control and the stack area 222 for specific control are the same as those immediately before the supply of operating power to the MPU 62 is stopped. In addition, the storage area to be calculated when calculating this checksum is an area in which setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (specifically, a setting value counter )It is included. Note that the object of the checksum calculation does not include the work area 223 for non-specific control and the stack area 224 for non-specific control.

After that, the work area 221 for specific control and the stack area for specific control that were calculated in the power outage process executed immediately before the supply of operating power to the MPU 62 was stopped and saved in the work area 221 for specific control. The checksum for 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S7907 (step S7908). Then, it is determined whether these checksums match (step S7909).

If a negative determination is made in step S7906 or step S7909, that is, if the power outage flag is not set to "1" or if the checksums do not match, the game stop flag provided in the work area 221 for specific control is set to "1" (step S7910). The game stop flag is used in a situation where an affirmative determination is made in step S8207 in the first timer interrupt process (FIG. 117) described later and the processes in steps S8208 to S8221 are not executed, that is, the execution of the process for advancing the game is stopped. This flag is used by the main CPU 63 to specify whether or not the situation is such that it should be used. By setting the game stop flag to "1", an affirmative determination is made in step S8207 of the first timer interrupt process (FIG. 117), which will be described later, resulting in a situation in which the processes in steps S8208 to S8221 are not executed. As a result, if the power outage flag was not set to "1" because the power outage processing was not performed properly during the previous power outage, the progress of the game will be stopped, and the specific control If the checksums do not match due to a change in the storage state of information in at least one of the work area 221 and the stack area 222 for specific control since the last time the power was cut off, the progress of the game will be stopped. The state will be as follows.

In this case, the storage area to be calculated when calculating the checksum is an area where information on setting values indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control as described above (specifically, Contains a set value counter). Therefore, if a set value abnormality has occurred after the previous power shutdown, the checksums will not match, and the game will be in a stopped state.

On the other hand, even in a situation where the game stop flag is set to "1", the processes of steps S8202 to S8206 in the first timer interrupt process (FIG. 117) are executed. Therefore, even in a situation where the progress of the game is stopped, power outage monitoring is executed, and the hit random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI are updated, and further Fraud detection is performed.

Thereafter, an abnormality command indicating that an abnormality has occurred regarding the power failure flag or checksum is transmitted to the audio emission control device 81 at the time of starting supply of operating power (step S7911). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to the information abnormality at the time of starting supply of operating power, and also issues a message from the speaker section 54 saying, ``Please change the settings.'' ” will be output. Further, a character image "Please change the settings" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is once stopped, the above notification will not be sent when the supply of operating power to the pachinko machine 10 is resumed until the setting value update process (step S7918) is executed. The configuration may be continued.

When the game hall manager confirms the above-mentioned notification while the progress of the game is stopped, he temporarily stops the supply of operating power to the pachinko machine 10, and then resumes the supply of operating power to the pachinko machine 10. In this case, an operation is performed to execute the setting value update process (step S7918). As a result, if an abnormality occurs regarding the power outage flag or checksum at the start of supply of operating power, it is possible to perform a new setting of the setting value in the setting value update process (step S7918). .

In particular, the storage area that is subject to calculation when calculating the checksum is an area in which setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control as described above (specifically, the setting value counter), so if an abnormality occurs in the checksum, there is a possibility that an abnormality has occurred in the set value. On the other hand, if an abnormality occurs regarding the checksum as described above, execution of the setting value update process (step S7918) is prompted to prevent the game from being played with the abnormal setting value. It becomes possible to do so.

If the power outage flag is set to "1" and the checksum is normal (steps S7906 and S7909: YES), it is determined whether the setting key insertion section 68a is turned on using the setting key. Then, it is determined whether the front door frame 14 is open to the inner frame 13 and the gaming machine main body 12 is open to the outer frame 11 (step S7913). The front door open sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13, as in the thirtieth embodiment. The main body open sensor 96 is used to detect whether or not it is in the open state, as in the thirtieth embodiment. The setting key insertion part 68a is turned on using the setting key (step S7912: YES), and the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body is opened with respect to the outer frame 11. 12 is in the open state (step S7913: YES), a setting confirmation process is executed (step S7914). In the setting confirmation process, the current setting values of the pachinko machine 10 are checked on the first to fourth notification display devices 201 to 204, which are used to display various parameters that are the management results of the game history. A process is executed to display a display indicating the current situation and a display indicating the current setting values of the pachinko machine 10.

FIG. 115 is a flowchart showing the setting confirmation process. Note that the processing in steps S8001 to S8003 in the setting confirmation processing is executed using a specific control program and specific control data in the main CPU 63.

First, a setting confirmation display flag provided in the work area 221 for specific control is set to "1" (step S8001). The setting confirmation display flag is a flag for the main CPU 63 to specify that the current setting values of the pachinko machine 10 are being confirmed. By setting the setting confirmation display flag to "1", the corresponding display control is performed on the first to fourth notification display devices 201 to 204 in the second timer interrupt process (FIG. 123), which will be described later. be exposed. As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the current setting values of the pachinko machine 10 are being checked, and a display indicating the current setting values of the pachinko machine 10. will be held.

Thereafter, it is determined whether the setting key insertion section 68a has been turned off using the setting key (step S8002). In this case, a configuration may be adopted in which it is determined whether the setting key insertion section 68a has been switched from an ON state to an OFF state, or a configuration may be adopted in which it is determined whether or not the setting key insertion section 68a is in an OFF state. If the setting key insertion section 68a has not been turned off (step S8002: NO), the process of step S8002 is repeated.

If the setting key insertion section 68a is turned off (step S8002: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (step S8003). As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the current setting values of the pachinko machine 10 are being checked, and a display indicating the current setting values of the pachinko machine 10. The state in which this occurs is canceled. In this case, the first to fourth notification display devices 201 to 204 will start displaying the gaming history management results.

As described above, in this embodiment, the operating power to the main CPU 63 is reduced by turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key without pressing the reset button 68c. In the situation where the supply of the key is started and the main process is started, the reset button 68c is not pressed and the setting key insertion part 68a is turned on, and the process that allows the game to proceed is performed in the main process. The setting confirmation process is executed in a situation where the process at the start of supply of operating power is being executed, which is the situation before the process is executed. This makes it possible to check the set values even when no games are being played.

Assuming that the setting values are checked while the game continues to progress, for example, if the setting values are checked in the middle of a game round, There is a risk that a transition to the open/close execution mode may occur. In this case, there is a possibility that the game ball cannot be fired toward the special electric winning device 32 even though the opening/closing execution mode has been started. In addition, if the setting value is confirmed during the execution of the opening/closing execution mode, the opening/closing execution mode will proceed under the situation where the setting value is being confirmed. There is a possibility that the game ball will not be able to be fired towards the player.

Assuming that the progress of the game is stopped when checking the set value, if the check of the set value is started while a game is being played, the progress of the game is stopped midway. There is a risk that the processing for this may become complicated. For example, if confirmation of the set value is started in the middle of a game round and the progress of the game is to be stopped midway, a process for stopping the game round midway is required. In this case, when confirmation of the set value is started, the fluctuating display of the symbol on the symbol display device 41 is stopped midway, and when the confirmation of the set value is completed, the fluctuating display of the symbol on the symbol display device 41 is restarted. If you try to do so, it will require more complicated processing. Further, for example, if confirmation of the set value is started in the middle of execution of the opening/closing execution mode and it is attempted to stop the progress of the game midway, processing for stopping the opening/closing execution mode midway is required. Furthermore, if confirmation of the set value is started during the execution of the fluctuating display of the symbol on the ordinary figure display section 38a and an attempt is made to stop the progress of the game, the process for stopping the fluctuating display of the symbol midway is performed. It becomes necessary. In addition, if confirmation of the set value is started in the middle of execution of the open execution state of the general electric accessory 34a and you try to stop the progress of the game halfway, it is necessary to perform a process to stop the opening execution state in the middle. Become. On the other hand, a configuration in which the set values are confirmed after waiting until all games are finished may be considered, but in this case, the game time, opening/closing execution mode, fluctuating display of symbols in the general figure display section 38a, and general electric winnings It becomes necessary to wait until a situation in which none of the open execution states of the object 34a is executed, and there is a possibility that the waiting time until starting confirmation of the set value becomes long.

On the other hand, when the supply of operating power is started, which is the situation before the processing that allows the game to proceed in the main processing that is executed when the supply of operating power to the main CPU 63 is started, Since the setting confirmation process is executed in a situation where the process is being executed, the setting value is confirmed in a situation where the progress of the game has already been stopped. This makes it possible to prevent setting values from being checked while the game is in progress, as well as to stop the game progress midway when checking the setting values, or to stop the game progress. There is no need to wait until the settings are confirmed. Therefore, it becomes possible to appropriately confirm the setting values.

Returning to the explanation of the main processing (FIG. 114), if the reset button 68c is pressed (step S7905: YES), RAM clear processing is executed (step S7915). In the RAM clearing process, in the work area 221 for specific control, excluding the area where setting value information indicating the setting state of the pachinko machine 10 is set (specifically, the setting value counter), the work area for the specific control is 221 is cleared to "0" and initial settings are executed. As a result, the area indicating whether the win/fail lottery mode is the high probability mode is cleared to "0", so the win/fail lottery is performed regardless of the win/fail lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game cycle is not being executed, the opening/closing execution mode is not being executed, and the general figure display section 38a is not being displayed in a variable manner, and the general electric accessory 34a is in a closed state. situation. In addition, since the reservation storage area 65a and the general power reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display section 37a is erased and the general figure display section The pending information for 38a is deleted. Further, in the RAM clearing process, the stack area 222 for specific control is cleared to "0" and initial settings are executed. Furthermore, in the RAM clearing process, initial settings are executed after various registers of the main CPU 63 are also cleared to "0". In this initial setting, processing similar to the internal function register setting processing (step S7902) is executed.

On the other hand, in the RAM clearing process, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". This makes it possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" by a clearing operation by the administrator of the gaming hall.

After that, it is determined whether or not the setting key insertion part 68a is turned on using the setting key (step S7916), and the front door frame 14 is in an open state with respect to the inner frame 13, and the front door frame 14 is in an open state with respect to the inner frame 13. Then, it is determined whether the gaming machine main body 12 is in an open state (step S7917). The front door open sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13, as in the thirtieth embodiment. The main body open sensor 96 is used to detect whether or not it is in the open state, as in the thirtieth embodiment. The setting key insertion part 68a is turned on using the setting key (step S7916: YES), and the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body is opened with respect to the outer frame 11. 12 is in the open state (step S7917: YES), a setting value update process is executed (step S7918).

FIG. 116 is a flowchart showing the setting value update process. Note that the processes from step S8101 to step S8107 in the setting value update process are executed using a specific control program and specific control data in the main CPU 63.

First, a setting update display flag provided in the work area 221 for specific control is set to "1" (step S8101). The setting update display flag is a flag for the main CPU 63 to specify that the setting values of the pachinko machine 10 are being updated. By setting the setting update display flag to "1", the corresponding display control is performed on the first to fourth notification display devices 201 to 204 in the second timer interrupt process (FIG. 123), which will be described later. be exposed. As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10. be exposed.

After that, it is determined whether the value of the setting value counter provided in the work area 221 for specific control is 1 or more corresponding to "setting 1" and 6 or less corresponding to "setting 6" (step S8102). If the value of the set value counter is "0" or 7 or more, a negative determination is made in step S8102, and the set value counter is set to "1" (step S8103). As a result, the setting value of the pachinko machine 10 becomes "setting 1."

If an affirmative determination is made in step S8102 or if the process in step S8103 is executed, it is determined whether the setting key insertion section 68a is turned off using a setting key (step S8104). In this case, a configuration may be adopted in which it is determined whether the setting key insertion section 68a has been switched from an ON state to an OFF state, or a configuration may be adopted in which it is determined whether or not the setting key insertion section 68a is in an OFF state.

If the setting key insertion section 68a is not turned off (step S8104: NO), and on the condition that the reset button 68c is pressed (step S8105: YES), the setting value counter in the work area 221 for specific control is 1 is added to the value of (step S8106). Thereby, each time the reset button 68c is pressed once, the setting value is updated to one level higher. Further, if the reset button 68c is not pressed (step S8105: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8102, but in step S8102 the value of the set value counter is If it is determined that the value is 7 or more, "1" is set in the set value counter in step S8103. As a result, when the reset button 68c is pressed once in the situation of "Setting 6", the state returns to "Setting 1".

If the setting key insertion section 68a is turned off (step S8104: YES), the setting update display flag in the specific control work area 221 is cleared to "0" (step S8107). As a result, the first to fourth notification display devices 201 to 204 display a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10. The condition that occurs is canceled. In this case, the first to fourth notification display devices 201 to 204 will start displaying the gaming history management results.

As described above, in this embodiment, the power is turned on to the pachinko machine 10 while pressing the reset button 68c, and the reset is performed in a situation where the supply of operating power to the main CPU 63 is started and the main processing is started. The button 68c is pressed, and the RAM clearing process (step S7915) is executed regardless of whether or not the setting key insertion section 68a is turned on. As a result, the operation of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clearing process (step S7915), and the RAM clearing process (step S7915) is It becomes possible to make the operation details for generating the game easy to understand for the manager of the game hall.

Even if the RAM clearing process (step S7915) is executed, the setting value counter in the specific control work area 221 is not cleared to "0" and the information on the setting value counter is not changed. This makes it possible to prevent the setting value from being changed even if the RAM clearing process (step S7915) is executed.

RAM clear processing is performed based on not only turning on the power of the pachinko machine 10 while pressing the reset button 68c, but also turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key. Not only (step S7915) but also setting value update processing (step S7918) is executed. Further, as already explained, the setting confirmation process (step S7914) is performed based on the fact that the power of the pachinko machine 10 is turned on while turning on the setting key insertion part 68a with the setting key without pressing the reset button 68c. executed. This makes it possible to use the ON operation for the setting key insertion section 68a in common as an operation for executing processing related to setting values. Therefore, it is possible to make the details of the operation for generating the process related to the set value easy for the game hall manager to understand.

In addition, when turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key, and when pressing the reset button 68c is not added, a setting confirmation process is executed and the reset is performed. When adding a press operation to the button 68c, a setting value update process is executed. Thereby, it becomes possible to change the process to be executed among the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make it easy for the game hall manager to understand the operation details for executing a desired process among the setting confirmation process and the setting value update process. Furthermore, by increasing the number of operations required to execute the setting value update process than the setting confirmation process, it is possible to make it particularly difficult to perform the setting value update process illegally.

Returning to the explanation of the main process (FIG. 114), if the process of step S7911 is executed, if a negative determination is made in step S7912 or step S7913, if the process of step S7914 is executed, a negative determination is made in step S7916 or step S7917. If the determination is made or if the process of step S7918 is executed, the start-up process flag in the specific control work area 221 is cleared to "0" (step S7919). By clearing the start-up process flag to "0," the state in which various processes set for the first timer interrupt process are not executed even if the first timer interrupt process is started is canceled. Note that in step S7919, the power outage flag in the work area 221 for specific control is also cleared to "0".

Thereafter, a return command is sent to the audio emission control device 81 (step S7920). The return command includes information indicating the number of pending information for the special figure display section 37a, information indicating the current win/fail lottery mode, information indicating the current support mode, and information indicating whether the opening/closing execution mode is in the middle of execution. information, and information indicating whether or not a game round is in progress. These pieces of information are set based on information stored in the work area 221 for specific control. By receiving the return command, the audio light emission control device 81 adjusts the display contents of the symbol display device 41, the light emission contents of the display light emitting section 53, and the sound output contents of the speaker section 54 in accordance with the various information set in the return command. The content shall be as follows.

Here, when checking the setting values of the pachinko machine 10, it is necessary to turn on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key. Then, for example, if it is necessary to check the setting value during the execution of a game round, the power supply operation of the pachinko machine 10 is performed during the execution of the game round, and then the setting key insertion part 68a is pressed by the setting key. While performing the ON operation, the power ON operation of the Pachinko machine 10 will be performed. In this case, since backup power is not supplied to the RAM provided in the audio emission control device 81, when the pachinko machine 10 is powered off, the game replay in the RAM of the audio emission control device 81 is The information used to control it will be erased. On the other hand, since backup power is supplied to the main RAM 65 and the clearing process of the main RAM 65 is not executed when checking the set values, the power OFF operation of the Pachinko machine 10 is performed in the middle of playing a game. , If the pachinko machine 10 is then turned on while turning on the setting key insertion part 68a with the setting key, after the setting confirmation process is executed, the special figure display part 37a will display a changing pattern. will be restarted. In this case, a situation arises in which the symbol display device 41 does not display the symbols in a variable manner even though the special symbol display section 37a displays the symbols in a variable manner.

On the other hand, after the setting confirmation process is completed, a return command is sent to the audio emission control device 81, and the return command includes information indicating whether or not a game round is in the middle of execution. Then, when the sound emission control device 81 receives the return command, it causes the symbol display device 41 to start variable display of symbols. As a result, it is possible to prevent a situation from occurring in which the symbol display device 41 does not display a variable symbol even though the symbol is displayed in a variable manner in the special symbol display section 37a. . This fluctuating display of symbols is performed at a relatively fast speed so that each symbol being fluctuatedly displayed becomes indiscernible or difficult for the player to identify. Further, the return command does not include the result of the propriety determination process and the result of the distribution determination process for the game session to be restarted, and also does not include information indicating the end timing of the game session to be restarted. Therefore, when the sound emission control device 81 starts the fluctuating display of symbols on the symbol display device 41 based on the return command, if the game round to be restarted corresponds to a loss result, it will not start the next game round. When the symbol display device 41 receives a command to start a demonstration display or a command to start a demonstration display, the symbol display device 41 terminates the fluctuating display of symbols based on the return command, starts the display corresponding to the newly received command, and If the game round corresponds to the jackpot result, when an opening command indicating the start of the opening/closing execution mode is received, the fluctuating display of symbols based on the return command is ended and the opening performance is started.

In addition, if the return command includes information indicating that the opening/closing execution mode is in progress, the sound emission control device 81 starts a display effect on the symbol display device 41 indicating that the opening/closing execution mode is in progress. to be done. This makes it possible for the player to recognize that the opening/closing execution mode is being executed.

Thereafter, the process proceeds to the remaining processing of steps S7921 to S7924. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123), but between the first timer interrupt process and the next timer interrupt process, There will be a remaining time. Although this remaining time will vary depending on the processing completion time of each timer interrupt process, the remaining process of steps S7921 to S7924 is repeatedly executed using such irregular time. In this respect, the remaining processing in steps S7921 to S7924 can be said to be non-regular processing that is executed non-regularly. In steps S7921 to S7924, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

Next, the first timer interrupt process executed by the main CPU 63 will be described with reference to the flowchart in FIG. 117. Note that, as already explained, the first timer interrupt process is activated periodically at a 4-millisecond cycle, which is the first interrupt cycle. Further, the program corresponding to the first timer interrupt processing is set as a specific control program.

First, it is determined whether the start-up process flag in the specific control work area 221 is set to "1" (step S8201). As already explained, the start-up processing flag is set to "1" in step S7903 of the main processing (FIG. 114). If the start-up process flag is set to "1" (step S8201: YES), the first timer interrupt process is ended without executing the various processes in steps S8202 to S8221. As a result, when the supply of operating power to the pachinko machine 10 is started and the main processing (FIG. 114) is started, the first timer interrupt processing and the second timer interrupt processing are allowed to be executed early. Even if there is, various processes for controlling the progress of the game are executed in the first timer interrupt process until the process for starting the supply of operating power is completed and execution of the process for controlling the progress of the game is permitted. It is possible to prevent it from being executed.

As already explained, the start-up process flag is cleared to "0" in step S7919 when the process at the start of supply of operating power is completed in the main process (FIG. 114). In the first timer interrupt processing, if the start-up processing flag is not set to "1" (step S8201: NO), the processing from step S8202 onward is executed.

Steps S8202 to S8219 and S8221 execute the same processes as steps S3701 to S3719 of the timer interrupt process (FIG. 69) in the fifteenth embodiment. These processes are executed by the main CPU 63 using a specific control program and specific control data. In this case, as already explained, if it is determined in the main process (FIG. 114) that the power outage flag is not set to "1" (step S7906: NO) or if it is determined that the checksums do not match (step S7909: NO), the game stop flag in the work area 221 for specific control is set to "1" (step S7910). If the game stop flag is set to "1", the first timer interrupt process executes steps S8201 to S8206, but if an affirmative determination is made in step S8207, steps S8208 to S8221 are executed. Not executed. As a result, if the power outage flag was not set to "1" because the power outage processing was not performed properly during the previous power outage, the progress of the game will be stopped, and the specific control If the checksums do not match due to a change in the storage state of information in at least one of the work area 221 and the stack area 222 for specific control since the last time the power was cut off, the progress of the game will be stopped. The state will be as follows. For example, firing of game balls is prohibited by not executing the process of step S8212. Further, since the process of step S8214 is not executed, execution of the game round and opening/closing execution mode is prohibited. Further, since the process of step S8218 is not executed, the payout of game balls is prohibited.

On the other hand, even in such a situation where the progress of the game is stopped, power outage monitoring is executed in step S8202, and the winning random number counter C1, jackpot type counter C2, and reach random number counter C3 are executed in steps S8203 and S8204. The random number initial value counter CINI is updated, and fraud detection in step S8206 is performed.

In the first timer interrupt process, a setting monitoring process is executed in step S8220. FIG. 118 is a flowchart showing the setting monitoring process. Note that the processing in steps S8301 to S8303 in the setting monitoring process is executed using a specific control program and specific control data in the main CPU 63.

By checking the value of the setting value counter in the work area 221 for specific control, it is determined whether the setting value of the pachinko machine 10 is normal (step S8301). Specifically, if the setting value set in the setting value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal. It is determined that there is.

If the set value is abnormal (step S8301: NO), similarly to step S7910 in the main process (FIG. 114), the game stop flag in the work area 221 for specific control is set to "1" (step S8302). By setting the game stop flag to "1", an affirmative determination is made in step S8207 of the first timer interrupt process (FIG. 117), resulting in a situation in which the processes in steps S8208 to S8221 are not executed. As a result, if it is determined that the set value is abnormal, the progress of the game is stopped. On the other hand, even if the game stop flag is set to "1", the processing of steps S8202 to S8206 in the first timer interrupt process (FIG. 117) is executed, so the progress of the game is stopped. Even in such a situation, power outage monitoring is executed, and the winning random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI are updated, and further fraud detection is executed.

Thereafter, an abnormality command indicating that the set value is abnormal is transmitted to the audio emission control device 81 (step S8303). Upon receiving the abnormality command, the audio light emission control device 81 causes the display light emission section 53 to emit light in a manner corresponding to the setting value abnormality, and causes the speaker section 54 to output a voice saying "Please change the settings." . Further, a character image "Please change the settings" is displayed on the symbol display device 41. These notifications are maintained until the supply of operating power to the Pachinko machine 10 is stopped, and are terminated when the supply of operating power to the Pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is once stopped, the supply of operating power to the pachinko machine 10 will resume until the setting value update process (step S7918) of the main process (FIG. 114) is executed. The above-mentioned notification may be continued if the notification is made.

When the game hall manager confirms the above notification while the game progress is stopped, he temporarily stops the supply of operating power to the pachinko machine 10, and then resumes the supply of operating power to the pachinko machine 10. In this case, an operation is performed to execute the setting value update process (step S7918). Thereby, when a setting value abnormality occurs, it is possible to perform a new setting of the setting value in the setting value update process (step S7918).

Here, a process for monitoring whether or not the set value is abnormal is executed in the first timer interrupt process (FIG. 117) that is activated periodically. This makes it possible to monitor whether or not the set value is abnormal even when a game is being played. Therefore, it is possible to prevent the game from being continued even though the set value is abnormal. Furthermore, monitoring to determine whether or not the set value is abnormal is performed every time a monitoring opportunity occurs. This makes it possible to increase the frequency of monitoring whether or not the set value is abnormal.

The main process (FIG. 114) does not include a process for monitoring whether or not the set value is normal. If a process for monitoring whether the set value is normal is set in the process at the start of supply of operating power in the main process (Fig. 114), the power failure flag and check sum are set at the start of supply of operating power. In addition to monitoring the settings, it is also necessary to monitor whether the set values are normal or not, which increases the monitoring load. Furthermore, if an attempt is made to execute the RAM clearing process (step S7915) and the setting value update process (step S7918) when it is specified that the set value is abnormal at the start of the supply of operating power, the processing configuration becomes complicated. On the other hand, since the main process (FIG. 114) does not have a process for monitoring whether the set value is normal or not, the process configuration for the process at the start of the supply of operating power is not suitable. It becomes possible to make it a thing. In addition, even if the process to monitor whether the set value is normal is not set in the process at the start of the supply of operating power, the first timer interrupt process (Figure 117) as described above Since the configuration is such that the setting monitoring process (step S8220) is executed by the setting value, it is possible to deal with the abnormal setting value.

In the configuration in which the first timer interrupt processing is executed as described above, in this embodiment, as timer interrupt processing, the second timer interrupt processing (FIG. 123) is performed separately from the first timer interrupt processing (FIG. 117). In addition, the second timer interrupt process is activated by interrupting the first timer interrupt process even when the first timer interrupt process is in the middle of execution. In this case, although not shown in the drawings, in the first timer interrupt processing, the timer interrupt processing is prohibited and the timer interrupt processing is enabled before and after each processing from step S8201 to step S8221. For example, the timer interrupt process is prohibited before the random number update process for lottery (step S8203) is executed, and the timer interrupt process is enabled after the random number update process for the lottery (step S8203) is executed. This makes it possible to prevent the second timer interrupt process from being interrupted and started while the lottery random number update process is being executed. Further, the timer interrupt process is prohibited before executing the special figure special electric line control process (step S8214), and the timer interrupt process is permitted after executing the special figure special electric line control process (step S8214). This makes it possible to prevent the second timer interrupt process from being interrupted and activated while the special figure special electric control process is being executed.

Next, a configuration for controlling the display of various display units by the main CPU 63 will be described. FIG. 119 is a block diagram illustrating a configuration for controlling the display of various display units by the main CPU 63.

The objects whose display is controlled by the main CPU 63 are the special symbol display section 37a, the special symbol reservation display section 37b, the regular symbol display section 38a, the ordinary symbol reservation display section 38b, and the first to fourth notification display devices 201 to 204 exists. Each of these is provided as a segment display section in which a plurality of display segments using LEDs are arranged. These segment display sections enter the light emitting state by setting data corresponding to the light emitting state (for example, data of "1" which is one of the binary data), and enter the light emitting state by setting data corresponding to the light emitting state (for example, data of "1" which is one of the binary data) When the other one (data "0") is set, the light is turned off.

The main control board 61 is provided with a first display circuit 261 in correspondence with the special figure display section 37a, a second display circuit 262 in correspondence with the special figure reservation display section 37b, and a second display circuit 262 in correspondence with the special figure reservation display section 37b. A third display circuit 263 is provided to correspond to the display section 38a, a fourth display circuit 264 is provided to correspond to the general figure reservation display section 38b, and the first to fourth notification display devices 201 to A fifth display circuit 265 is provided corresponding to 204 . In the eleventh embodiment, the main control board 61 is provided with the first to fourth display ICs 205 to 208 in one-to-one correspondence with the first to fourth notification display devices 201 to 204. However, in this embodiment, these first to fourth display ICs 205 to 208 are not provided.

The first display circuit 261 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure display section 37a. As a result, each display segment of the special figure display section 37a enters a light-emitting state or a light-off state in a manner corresponding to the display data provided to the first display circuit 261. In this case, although the first display circuit 261 is able to store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the special figure display section 37a that is in a light emitting state due to the display data provided to the first display circuit 261 has passed a predetermined period without new display data being provided to the first display circuit 261. This will gradually turn off the light. Moreover, with such a configuration, not only when the display content of the special figure display section 37a is changed, but also when the display content of the special figure display section 37a is not changed, the output processing of the previous display data The same display data as the first display circuit 261 is supplied to the first display circuit 261.

The number of display segments provided in the special figure display section 37a is eight. Therefore, 8-bit data is provided to the first display circuit 261 as display data for controlling the display of the special figure display section 37a.

The second display circuit 262 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure reservation display section 37b. As a result, each display segment of the special figure pending display section 37b enters a light emitting state or a light extinguishing state in a manner corresponding to the display data provided to the second display circuit 262. In this case, the second display circuit 262 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the special figure pending display unit 37b that is in a light emitting state due to the display data provided to the second display circuit 262 will remain in the predetermined period without new display data being provided to the second display circuit 262. As time passes, the light will gradually turn off. In addition, with this configuration, not only when the display content of the special figure reservation display section 37b is changed, but also when the display content of the special figure reservation display section 37b is not changed, the previous display data is The same display data as in the output processing time is supplied to the second display circuit 262.

The number of display segments provided in the special figure reservation display section 37b is four. Therefore, 4-bit data is provided to the second display circuit 262 as display data for controlling the display of the special figure pending display section 37b. However, since the display data is provided in 8-bit units, 8-bit data is provided even when display data is provided to the second display circuit 262, but 4 bits of that are provided to the special figure pending display section. 37b is used as display data for display control.

The third display circuit 263 provides data corresponding to the supplied display data to each of the plurality of display segments of the general figure display section 38a. As a result, each display segment of the ordinary figure display section 38a is brought into a light-emitting state or a light-out state in a manner corresponding to the display data provided to the third display circuit 263. In this case, although the third display circuit 263 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the general figure display section 38a that is in a light emitting state due to the display data provided to the third display circuit 263 has passed a predetermined period without new display data being provided to the third display circuit 263. This will gradually turn off the light. Moreover, with such a configuration, not only when the display contents of the general figure display section 38a are changed, but also when the display contents of the ordinary figure display section 38a are not changed, the output processing of the previous display data The same display data as the third display circuit 263 is supplied to the third display circuit 263.

The number of display segments provided in the ordinary figure display section 38a is eight. Therefore, 8-bit data is provided to the third display circuit 263 as display data for controlling the display of the general figure display section 38a.

The fourth display circuit 264 provides data corresponding to the supplied display data to each of the plurality of display segments of the general figure reservation display section 38b. As a result, each display segment of the ordinary figure reservation display section 38b enters a light-emitting state or a light-out state in a manner corresponding to the display data provided to the fourth display circuit 264. In this case, although the fourth display circuit 264 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, the display segment of the regular figure reservation display section 38b that is in a light-emitting state due to the display data provided to the fourth display circuit 264 remains for a predetermined period without new display data being provided to the fourth display circuit 264. As time passes, the light will gradually turn off. Moreover, with such a configuration, not only when the display contents of the general figure reservation display section 38b are changed, but also when the display contents of the ordinary figure reservation display section 38b are not changed, the previous display data is The same display data as in the output processing time is supplied to the fourth display circuit 264.

The number of display segments provided in the general figure reservation display section 38b is four. Therefore, 4-bit data is provided to the fourth display circuit 264 as display data for controlling the display of the ordinary figure reservation display section 38b. However, since display data is provided in 8-bit units, 8-bit data is provided even when display data is provided to the fourth display circuit 264, but 4 bits of that data are provided to the general figure reservation display section. 38b is used as display data for display control.

The fifth display circuit 265 provides data corresponding to the supplied display data to each of the plurality of display segments provided in each of the first to fourth notification display devices 201 to 204. As a result, each display segment of the first to fourth notification display devices 201 to 204 enters a light-emitting state or a light-off state in a manner corresponding to the display data provided to the fifth display circuit 265. In this case, although the fifth display circuit 265 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), after the predetermined period elapses, the display data gradually becomes all "0". This will bring us closer to the state of Therefore, for the display segments of the first to fourth notification display devices 201 to 204 that are in a light emitting state due to the display data provided to the fifth display circuit 265, new display data is provided to the fifth display circuit 265. As a predetermined period of time passes without any interruption, the light gradually turns off. Moreover, with such a configuration, not only the display contents of the first to fourth notification display devices 201 to 204 are changed, but also the display contents of the first to fourth notification display devices 201 to 204 are changed. Even if not, the same display data as the previous display data output processing time is supplied to the fifth display circuit 265.

Each of the first to fourth notification display devices 201 to 204 is provided with seven display segments. In contrast, display data is provided in 8-bit units. When the display data of the first to fourth notification display devices 201 to 204 is provided to the fifth display circuit 265, the 7-bit display data corresponding to the first notification display device 201 is provided as data in 8-bit units. After that, 7-bit display data corresponding to the second notification display device 202 is provided in 8-bit units, and then 7-bit display data corresponding to the third notification display device 203 is provided in 8-bit units. Finally, 7-bit display data corresponding to the fourth notification display device 204 is provided as 8-bit data.

In the configuration in which the first to fifth display circuits 261 to 265 are provided as described above, the main CPU 63 supplies display data to the display IC 266. In other words, the display ICs 266 are not provided one to one for the first to fifth display circuits 261 to 265, but one display IC 266 is provided in common to all of the first to fifth display circuits 261 to 265. A display IC 266 is provided. When the main CPU 63 supplies display data to the display IC 266, it also supplies type data indicating which of the first to fifth display circuits 261 to 265 the display data corresponds to.

In detail, regarding the electrical connection between the main CPU 63 and the display IC 266, the main CPU 63 and the display IC 266 are connected to a type data signal line LN1, a type clock signal line LN2, a display data signal line LN3, and a display clock signal. It is electrically connected using line LN4. These signal lines LN1 to LN4 are all signal lines for transmitting signals from the main CPU 63 to the display IC 266 by one-way communication.

Type data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the type data signal line LN1. In this case, the delimitation of each bit of type data by serial communication is indicated by the type clock signal transmitted from the main side CPU 63 to the display IC 266 using the type clock signal line LN2. The type data is data indicating which of the first to fifth display circuits 261 to 265 the display data to be transmitted corresponds to. The type data is transmitted as 5-bit data consisting of the first bit to the fifth bit. When the display data corresponds to the first display circuit 261, the first bit becomes HI level and the other bits become LOW level. When the display data corresponds to the second display circuit 262, the second bit becomes HI level and the other bits become LOW level. When the display data corresponds to the third display circuit 263, the third bit becomes HI level and the other bits become LOW level. When the display data corresponds to the fourth display circuit 264, the fourth bit becomes HI level and the other bits become LOW level. When the display data corresponds to the fifth display circuit 265, the fifth bit becomes HI level and the other bits become LOW level.

Display data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the display data signal line LN3. In this case, the delimitation of each bit of display data by serial communication is indicated by a display clock signal transmitted from the main CPU 63 to the display IC 266 using the display clock signal line LN4. The display data is transmitted in 8-bit units consisting of the first to eighth bits.

The main CPU 63 transmits display data corresponding to each of the first to fifth display circuits 261 to 265 to the display IC 266 in a second timer interrupt process (FIG. 123) to be described later. In this case, in one processing cycle of the second timer interrupt processing, display data is transmitted to one display circuit among the first to fifth display circuits 261 to 265, and the display data is transmitted from the nth display circuit to the n+1th display circuit. The display circuits 261 to 265 to which display data is to be transmitted are changed one by one each time a new processing cycle of the second timer interrupt processing occurs according to the order in which the circuits are arranged. Furthermore, in the second timer interrupt processing in the processing cycle following the processing cycle in which the display data corresponding to the fifth display circuit 265, which is the last in the order, is transmitted, the first display circuit 265, which is the first in the above order, Send the display data corresponding to. Note that only one piece of display data in 8-bit units is transmitted in the processing time of the second timer interrupt processing in which display data is transmitted to any of the first to fourth display circuits 261 to 264; In the processing cycle of the second timer interrupt process for transmitting display data, four pieces of display data in 8-bit units are transmitted corresponding to the number of the first to fourth notification display devices 201 to 204.

In the configuration in which the main CPU 63 transmits display data as described above, the work area 221 for specific control and the work area 223 for non-specific control include various storage areas that are referenced by the main CPU 63 to transmit display data. is set. FIG. 120(a) is an explanatory diagram for explaining various buffers 271 to 275 provided in the work area 221 for specific control, and FIG. 120(b) is an explanatory diagram for explaining the various buffers 271 to 275 provided in the work area 223 for non-specific control. FIG. 3 is an explanatory diagram for explaining various storage areas 234 and 276.

As shown in FIG. 120(a), the work area 221 for specific control includes a first display data buffer 271, a second display data buffer 272, a third display data buffer 273, a fourth display data buffer 274, A fifth display data buffer 275 is provided.

The first display data buffer 271 stores display data to be supplied to the first display circuit 261. As already explained, the first display circuit 261 is provided corresponding to the special figure display section 37a, so the first display data buffer 271 contains display data for causing the special figure display section 37a to perform a predetermined display. It will be stored. In this case, storage of the display data in the first display data buffer 271 is performed in the display control process (step S8216) based on the contents of the special figure special electric train control process (step S8214) in the first timer interrupt process (FIG. 117). . Furthermore, when it comes to the second timer interrupt process (FIG. 123) for transmitting display data to the first display circuit 261, only when the display data stored in the first display data buffer 271 has been changed. Instead, even if the display data has not been changed, the display data stored in the first display data buffer 271 is sent to the display IC 266.

Display data to be supplied to the second display circuit 262 is stored in the second display data buffer 272 . As already explained, the second display circuit 262 is provided corresponding to the special figure pending display section 37b, so the second display data buffer 272 has a display for causing the special figure pending display section 37b to perform a predetermined display. The data will be stored. In this case, storage of the display data in the second display data buffer 272 is performed in the display control process (step S8216) based on the contents of the special figure special electric line control process (step S8214) in the first timer interrupt process (FIG. 117). . Furthermore, when it comes to the second timer interrupt process (FIG. 123) for transmitting display data to the second display circuit 262, only when the display data stored in the second display data buffer 272 has been changed. Instead, even if the display data has not been changed, the display data stored in the second display data buffer 272 is sent to the display IC 266.

The third display data buffer 273 stores display data to be supplied to the third display circuit 263. As already explained, the third display circuit 263 is provided corresponding to the general figure display section 38a, so the third display data buffer 273 contains display data for causing the ordinary figure display section 38a to perform a predetermined display. It will be stored. In this case, storage of the display data in the third display data buffer 273 is performed in the display control process (step S8216) based on the contents of the general electric power control process (step S8215) in the first timer interrupt process (FIG. 117). be exposed. Furthermore, when it comes to the second timer interrupt process (FIG. 123) for transmitting display data to the third display circuit 263, only when the display data stored in the third display data buffer 273 has been changed. Instead, even if the display data has not been changed, the display data stored in the third display data buffer 273 is transmitted to the display IC 266.

The fourth display data buffer 274 stores display data to be supplied to the fourth display circuit 264. As described above, the fourth display circuit 264 is provided in correspondence with the ordinary figure pending display section 38b, so the fourth display data buffer 274 contains a display for causing the ordinary figure pending display section 38b to perform a predetermined display. The data will be stored. In this case, storage of the display data in the fourth display data buffer 274 is performed in the display control process (step S8216) based on the contents of the general electric power control process (step S8215) in the first timer interrupt process (FIG. 117). be exposed. Furthermore, when it comes to the second timer interrupt process (FIG. 123) for transmitting display data to the fourth display circuit 264, only when the display data stored in the fourth display data buffer 274 has been changed. Instead, even if the display data has not been changed, the display data stored in the fourth display data buffer 274 is sent to the display IC 266.

The fifth display data buffer 275 stores display data to be supplied to the fifth display circuit 265. As described above, the fifth display circuit 265 is provided corresponding to the first to fourth notification display devices 201 to 204, so that the fifth display data buffer 275 includes the first to fourth notification display devices 201 to 204 .about.204 store display data for performing a predetermined display. When it is time to process the second timer interrupt process for transmitting display data to the fifth display circuit 265, not only when the display data stored in the fifth display data buffer 275 is changed, but also when the display data Even if the display data stored in the fifth display data buffer 275 is not changed, the display data stored in the fifth display data buffer 275 is transmitted to the display IC 266.

Here, the first to fourth notification display devices 201 to 204 display a display corresponding to the management result of the game history, and also execute a setting confirmation process (FIG. 115) or a setting value update process (FIG. 116). If so, a display corresponding to the current setting value is displayed. In this case, since the fifth display data buffer 275 is provided in the work area 221 for specific control, the process of storing display data in the fifth display data buffer 275 is performed as a process corresponding to the specific control. On the other hand, the process for deriving the game history management result is performed as a process corresponding to non-specific control, and the 61st to 68th parameters, which are the game history management results, are displayed on the first to fourth notification display devices. 201 to 204 are sequentially displayed.

Therefore, as shown in FIG. 120(b), the work area 223 for non-specific control includes not only the calculation result storage area 234 for storing the 61st to 68th parameters, but also the 61st to 68th parameters. A display target setting area 276 is provided for storing parameters to be displayed on the first to fourth notification display devices 201 to 204. Even in this embodiment, as in the fifteenth embodiment, the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Every second, the calculation results of the parameters to be displayed are read out from the calculation result storage area 234 in accordance with a predetermined display order, and the calculation results of the read parameters are stored in the display target setting area 276. Ru. If the game history management results are to be displayed on the first to fourth notification display devices 201 to 204, a second timer interrupt process (FIG. 123), which is a process corresponding to specific control, is performed. , the display data stored in the display target setting area 276 is read, and the read display data is stored in the fifth display data buffer 275.

On the other hand, when the setting confirmation process (Fig. 115) is being executed, the first to fourth notification displays are Display data for causing a display indicating that the current setting values of the pachinko machine 10 are being checked and a display indicating the current setting values of the pachinko machine 10 to be performed in the devices 201 to 204 is fifth. The data is stored in the display data buffer 275. In addition, when the setting value update process (Fig. 116) is being executed, the first to fourth notification displays are The fifth display data is display data for displaying in the devices 201 to 204 a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10. It is stored in buffer 275.

In the configuration in which the first to fifth display data buffers 271 to 275 are provided as described above, at each processing time of the second timer interrupt processing (FIG. 123), the main CPU 63 stores the display data corresponding to that processing time. Reads the display data from the buffers 271 to 275, transmits the read display data to the display IC 266, and also sends type data indicating which of the first to fifth display circuits 261 to 265 the display data corresponds to. It is sent to the display IC 266. FIG. 121 is an explanatory diagram for explaining the electrical configuration of the display IC 266.

As shown in FIG. 121, the display IC 266 includes a type data buffer 281, a selection signal output section 282, a display data buffer 283, and a display data output section 284. The display data buffer 283 stores display data received from the main CPU 63. The display data output unit 284 transmits the display data stored in the display data buffer 283 to the first to fifth display circuits 261 to 265. The type data buffer 281 stores type data received from the main CPU 63. The selection signal output unit 282 outputs a selection signal for specifying the display circuits 261 to 265 corresponding to the type data stored in the type data buffer 281 among the first to fifth display circuits 261 to 265 as display data reception destinations. Output.

Specifically, as shown in FIG. 119, the display IC 266 and the first display circuit 261 are electrically connected using a display signal group 291. The display signal group 291 is provided to make it possible to transmit 8-bit display data at once, and the display data in 8-bit units is transmitted from the display IC 266 through parallel communication. Further, a branch signal group 292 is provided branching off from the display signal group 291, and the branch signal group 292 includes a second display circuit 262, a third display circuit 263, a fourth display circuit 264, and a fifth display circuit 265. electrically connected to each of the Like the display signal group 291, the branch signal group 292 is provided to make it possible to transmit 8-bit display data at once, and the display data in 8-bit units is transmitted from the display IC 266 through parallel communication. Ru.

Since the display signal group 291 and the branch signal group 292 are provided as described above, when the display data stored in the display data buffer 283 is transmitted by the display data output unit 284, the display data is transmitted to the first - Supplied to all of the fifth display circuits 261 to 265. In this case, first to fifth selection signal lines 301 to 305 are provided to designate display circuits 261 to 265 to receive and use the supplied display data.

The first selection signal line 301 is provided to electrically connect the display IC 266 and the first display circuit 261. When type data corresponding to the first display circuit 261 is stored in the type data buffer 281, in order to cause the first display circuit 261 to receive and use the display data supplied from the display data output section 284. , the selection signal output section 282 of the display IC 266 transmits a first selection signal to the first display circuit 261 through the first selection signal line 301. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the first display circuit 261.

The second selection signal line 302 is provided to electrically connect the display IC 266 and the second display circuit 262. When type data corresponding to the second display circuit 262 is stored in the type data buffer 281, in order to cause the second display circuit 262 to receive and use the display data supplied from the display data output section 284. , the selection signal output section 282 of the display IC 266 transmits a second selection signal to the second display circuit 262 through the second selection signal line 302. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and branch signal group 292 is received and used only by the second display circuit 262.

The third selection signal line 303 is provided to electrically connect the display IC 266 and the third display circuit 263. When type data corresponding to the third display circuit 263 is stored in the type data buffer 281, in order to cause the third display circuit 263 to receive and use the display data supplied from the display data output section 284. , the selection signal output section 282 of the display IC 266 transmits a third selection signal to the third display circuit 263 through the third selection signal line 303. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the third display circuit 263.

The fourth selection signal line 304 is provided to electrically connect the display IC 266 and the fourth display circuit 264. When type data corresponding to the fourth display circuit 264 is stored in the type data buffer 281, in order to cause the fourth display circuit 264 to receive and use the display data supplied from the display data output section 284. , the selection signal output section 282 of the display IC 266 transmits a fourth selection signal to the fourth display circuit 264 through the fourth selection signal line 304. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and branch signal group 292 is received and used only by the fourth display circuit 264.

The fifth selection signal line 305 is provided to electrically connect the display IC 266 and the fifth display circuit 265. When type data corresponding to the fifth display circuit 265 is stored in the type data buffer 281, in order to cause the fifth display circuit 265 to receive and use the display data supplied from the display data output section 284. , the selection signal output section 282 of the display IC 266 transmits a fifth selection signal to the fifth display circuit 265 through the fifth selection signal line 305. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only by the fifth display circuit 265.

FIG. 122 shows how type data and display data are transmitted from the main CPU 63 to the display IC 266, and the display data transmitted from the display IC 266 is received by the first display circuit 261 or the second display circuit 262. This is a time chart. 122(a) shows the transmission period of the type data signal from the main CPU 63 to the display IC 266, FIG. 122(b) shows the transmission period of the type clock signal from the main CPU 63 to the display IC 266, and FIG. ) shows the transmission period of the display data signal from the main CPU 63 to the display IC 266, FIG. 122(d) shows the transmission period of the display clock signal from the main CPU 63 to the display IC 266, and FIG. 122(f) shows the transmission period of the second selection signal from the display IC 266 to the second display circuit 262, and FIG. It shows the transmission period of display data from the display IC 266 to the first to fifth display circuits 261 to 265. The same applies to the case where display data is received by the third to fifth display circuits 263 to 265.

Type data is transferred from the main CPU 63 to the display IC 266 at timing t1 after the supply of operating power to the pachinko machine 10 including the main CPU 63, display IC 266, and first to fifth display circuits 261 to 265 is started. And transmission of display data is started. Specifically, as shown in FIG. 122(b), a pulse type clock signal is transmitted at each of timing t1, timing t2, timing t3, timing t4, and timing t5. As shown in (a), a pulsed type data signal is transmitted in correspondence with the transmission of the pulsed type clock signal at timing t1. As a result, information corresponding to the first display circuit 261 is stored in the type data buffer 281 of the display IC 266.

In addition, as shown in FIG. 122(d), a pulsed display clock is generated at each of the timings of t1, t2, t3, t4, t5, t6, t7, and t8. As the signal is transmitted, as shown in FIG. 122(c), a pulsed display data signal is transmitted in response to the transmission of the pulsed display clock signal at timing t2, timing t3, timing t5, and timing t7. is sent. As a result, display data corresponding to the above information format is stored in the display data buffer 283 of the display IC 266.

Then, by completing the transmission of the 8th bit display clock signal as shown in FIG. 122(d) at the timing t9, the data is stored in the type data buffer 281 at the timing t9 as shown in FIG. The selection signal output unit 282 of the display IC 266 starts transmitting the first selection signal to the first display circuit 261 corresponding to the stored type data, and at the timing of t9, as shown in FIG. 122(g). The display data output section 284 of the display IC 266 starts transmitting the display data stored in the display data buffer 283. Thereby, the display data is received and used by the first display circuit 261.

Thereafter, at timing t10, as shown in FIGS. 122(a) to 122(d), transmission of type data and display data from the main CPU 63 to the display IC 266 is newly started. In this case, at the timing of t10, as shown in FIGS. 122(e) and 122(g), the transmission of the first selection signal from the display IC 266 to the first display circuit 261 is stopped, and Transmission of display data to the first to fifth display circuits 261 to 265 is stopped.

In detail, regarding the new transmission of type data and display data, as shown in FIG. At the same time as the signal is transmitted, as shown in FIG. 122(a), a pulsed type data signal is transmitted in response to the transmission of the pulsed type clock signal at timing t11. As a result, information corresponding to the second display circuit 262 is stored in the type data buffer 281 of the display IC 266.

Further, as shown in FIG. 122(d), a pulsed display clock is generated at each of the timing of t10, timing of t11, timing of t12, timing of t13, timing of t14, timing of t15, timing of t16, and timing of t17. Along with the signal being transmitted, as shown in FIG. 122(c), it corresponds to the transmission of pulsed display clock signals at timing t10, timing t11, timing t12, timing t15, timing t16, and timing t17. A pulsed display data signal is then transmitted. As a result, display data corresponding to the above information format is stored in the display data buffer 283 of the display IC 266.

Then, by completing the transmission of the 8th bit display clock signal as shown in FIG. 122(d) at timing t18, data is stored in the type data buffer 281 as shown in FIG. 122(f) at timing t18. The selection signal output unit 282 of the display IC 266 starts transmitting the second selection signal to the second display circuit 262 corresponding to the type data that has been selected, and at the timing t18, as shown in FIG. 122(g), The display data output unit 284 of the display IC 266 starts transmitting the display data stored in the display data buffer 283. Thereby, the display data is received and used by the second display circuit 262.

Note that for the first to fourth display circuits 261 to 264, only one piece of display data is transmitted in the second timer interrupt processing (FIG. 123) to which display data is transmitted, but for the fifth display circuit 265, only one piece of display data is transmitted. In the second timer interrupt process (FIG. 123) to which display data is to be transmitted, four pieces of display data are transmitted corresponding to the number of first to fourth notification display devices 201 to 204. As already explained, the second timer interrupt process (Fig. 123) is activated at the second interrupt cycle (specifically, 2 milliseconds), but even if it is a process for transmitting four pieces of display data, Each processing time is set so that one processing cycle is completed in less than the second interrupt period.

With the above configuration, it is possible to transmit display data to a plurality of display circuits 261 to 265 using one display IC 266. Here, as already explained, each of the first to fifth display circuits 261 to 265 is capable of storing and retaining the provided display data for a predetermined period (for example, 16 milliseconds); Then, the display data gradually approaches a state of all "0"s. In this case, if the reception of display data in each of the display circuits 261 to 265 exceeds the predetermined period, the special symbol display section 37a, the special symbol reservation display section 37b, the regular symbol display section 38a, the regular symbol reservation display section 38b, and the Even if the display contents are not changed in the first to fourth notification display devices 201 to 204, the display segments that are in the light emitting state will temporarily approach the light-off state, and as a result, the light in the display segments will be reduced. There is a risk that flashing may occur. On the other hand, in this embodiment, in addition to the first timer interrupt process (FIG. 117) that is started at the first interrupt cycle (specifically, 4 milliseconds), a second interrupt process that is shorter than the first interrupt cycle is executed. A second timer interrupt process (FIG. 123) that is activated at a cycle (specifically, 2 milliseconds) is set, and display data is collectively transmitted to the display IC 266 in the second timer interrupt process. .

The second timer interrupt process will be described below with reference to the flowchart of FIG. 123. Note that the processes from step S8401 to step S8413 in the second timer interrupt process are executed using a specific control program and specific control data in the main CPU 63.

First, interrupt prohibition is set to prohibit the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8401). By disabling the generation of the first timer interrupt process (Figure 117), the first timer interrupt process (Figure 117) will interrupt the second timer interrupt process (Figure 123) even if the first interrupt cycle has elapsed. It is possible to prevent it from being started. Furthermore, by disabling the second timer interrupt processing (Fig. 123), even if the second interrupt period has elapsed during the execution of the second timer interrupt processing (Fig. 123), the second timer interrupt processing (Fig. 123) is prohibited. It is possible to prevent the process (FIG. 123) from being activated redundantly.

Thereafter, it is determined whether the setting update display flag in the specific control work area 221 is set to "1" (step S8402). The setting update display flag is a flag for the main CPU 63 to specify whether or not the main CPU 63 is executing the setting value update process (FIG. 116). As already explained, the setting value update process (FIG. 116) is performed in the main process (FIG. 114) when the supply of operating power to the main CPU 63 is started, when the process at the time of starting the supply of operating power is being executed. However, since the second timer interrupt process (FIG. 123) is started by interrupting even when the process at the start of the supply of operating power is being executed, it is necessary to set the second timer interrupt process in the main CPU 63. Even if the value update process (FIG. 116) is being executed, the second timer interrupt process (FIG. 123) is activated by interruption.

The situation where the setting update display flag is set to "1" means that the main CPU 63 is executing the setting value update process (FIG. 116) in the current processing time of the second timer interrupt process (FIG. 123). This means that the process was started by interrupting the situation. If an affirmative determination is made in step S8402, setting processing for the fifth display data buffer 275 during setting update is executed (step S8403). In the setting process, a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. Display data for the display is stored in the fifth display data buffer 275.

When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 are explained in FIG. 124(a). The display shown in the figure is displayed. Specifically, when a display indicating that the setting value is being updated is displayed on the first to fourth notification display devices 201 to 204, the first to fourth notification display devices 201 to 204 At least one display segment in each is illuminated. In other words, each of the first to fourth notification display devices 201 to 204 is in a display state. As a result, even if a display indicating that the setting value is being updated is displayed, the game hall can be informed that the first to fourth notification display devices 201 to 204 are not malfunctioning. This makes it possible for the administrator to understand the information. Note that even when the gaming history management results are displayed, at least one display segment in each of the first to fourth notification display devices 201 to 204 is in a light emitting state, and the first to fourth notification display devices 201 to 204 are in a light emitting state Each of the display devices 201 to 204 enters a display state.

In detail, regarding the display contents of each of the first to fourth notification display devices 201 to 204, in the first notification display device 201, one display segment in the center is in a light emitting state and the remaining display segments are in a non-lighting state. becomes. Even if the game history management results are displayed on the first to fourth notification display devices 201 to 204, one display segment in the center of the first notification display device 201 may be in a light emitting state. When the game history management results are displayed, the display content of the first notification display device 201 does not include display content in which one display segment in the center is in a light-emitting state and the remaining display segments are in a light-out state. Not yet. As a result, the display contents of the first notification display device 201 in the situation where the setting value is updated can be changed to the gaming history while using display segments that can be in a light emitting state even when the management results of the gaming history are displayed. This makes it possible to display content that is not displayed in the management results.

In the second notification display device 202, like the first notification display device 201, one display segment in the center is in a light emitting state and the remaining display segments are in a non-lighting state. Even if the game history management results are displayed on the first to fourth notification display devices 201 to 204, one display segment in the center of the second notification display device 202 may be in a light emitting state. The display content of the second notification display device 202 when the game history management results are displayed does not include display content in which one display segment in the center is in a light emitting state and the remaining display segments are in a light-off state. Not yet. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the second notification display device 202 in the situation where the setting value is updated can be changed to the game history. This makes it possible to display content that is not displayed in the management results.

In the third notification display device 203, some of the display segments are in a light-emitting state and the remaining display segments are in a light-out state so that the letter "H" is displayed. In this case, the display segments that are in a light-emitting state can be in a light-emitting state even when the game history management results are displayed on the first to fourth notification display devices 201 to 204; The display contents of the third notification display device 203 when displayed do not include the display contents in which the character "H" is displayed. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the third notification display device 203 in the situation where the setting value is updated can be changed to the game history. This makes it possible to display content that is not displayed in the management results. Moreover, the display content of the third notification display device 203 in the situation where the set value is being checked does not include the display content in which the character "H" is displayed. Thereby, by displaying "H" on the third notification display device 203, it is possible to notify the game hall manager that the setting value is being updated.

In the fourth notification display device 204, some display segments are in a light-emitting state and the remaining display segments are in a light-out state so that a display corresponding to the current set value is performed. In the case of FIG. 124(a), the current setting value is "Setting 2", so "2" corresponding to "Setting 2" is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the game hall manager can grasp the current setting values. Note that the display contents of the fourth notification display device 204 in a situation where setting values are being updated can be displayed both in a situation in which game history management results are displayed and in a situation in which setting values are being confirmed.

Returning to the explanation of the second timer interrupt process (FIG. 123), if a negative determination is made in step S8402, it is determined whether the setting confirmation display flag in the work area 221 for specific control is set to "1". (Step S8404). The setting confirmation display flag is a flag used by the main CPU 63 to specify whether or not the main CPU 63 is executing the setting confirmation process (FIG. 115). As already explained, the setting confirmation process (FIG. 115) is executed in the main process (FIG. 114) when the supply of operating power to the main CPU 63 is started, when the process at the time of starting the supply of operating power is being executed. However, since the second timer interrupt process (FIG. 123) is started by interrupting even when the process at the start of the supply of operating power is being executed, it is necessary to set the second timer interrupt process in the main CPU 63. Even if the confirmation process (FIG. 115) is being executed, the second timer interrupt process (FIG. 123) is started as an interrupt.

The situation in which the setting confirmation display flag is set to "1" means that the main CPU 63 is executing the setting confirmation process (FIG. 115) in the current processing time of the second timer interrupt process (FIG. 123). This means that the process was started by interrupting the situation. If an affirmative determination is made in step S8404, a setting process for the fifth display data buffer 275 during setting confirmation is executed (step S8405). In the setting process, a display indicating that the setting values of the pachinko machine 10 are being checked and a display indicating the current setting values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. Display data for the display is stored in the fifth display data buffer 275.

When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 are explained in FIG. 124(b). The display shown in the figure is displayed. Specifically, when a display indicating that the setting value is being updated is displayed on the first to fourth notification display devices 201 to 204, the first to fourth notification display devices 201 to 204 At least one display segment in each is illuminated. In other words, each of the first to fourth notification display devices 201 to 204 is in a display state. As a result, even if a display indicating that the set value is being checked is displayed, the game hall can be informed that the first to fourth notification display devices 201 to 204 are not malfunctioning. This makes it possible for the administrator to understand the information.

In detail, regarding the display contents of each of the first to fourth notification display devices 201 to 204, in the first notification display device 201, one display segment in the center is in a light emitting state and the remaining display segments are in a non-lighting state. becomes. Even when the game history management results are displayed on the first to fourth notification display devices 201 to 204, one display segment in the center of the first notification display device 201 may be in a light emitting state. When the game history management results are displayed, the display content of the first notification display device 201 does not include display content in which one display segment in the center is in a light-emitting state and the remaining display segments are in a light-out state. Not yet. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the first notification display device 201 in the situation where the setting value is being checked can be changed to the game history. This makes it possible to display content that is not displayed in the management results.

In the second notification display device 202, similarly to the first notification display device 201, one display segment at the center is in a light emitting state and the remaining display segments are in a non-lighting state. Even when the game history management results are displayed on the first to fourth notification display devices 201 to 204, one display segment in the center of the second notification display device 202 may be in a light emitting state. The display content of the second notification display device 202 when the game history management results are displayed does not include display content in which one display segment in the center is in a light emitting state and the remaining display segments are in a light-off state. Not yet. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the second notification display device 202 in the situation where the setting value is being checked can be changed to the game history. This makes it possible to display content that is not displayed in the management results.

Here, the display contents on the first notification display device 201 and the second notification display device 202 are the same regardless of whether the setting value is being updated or the setting value is being confirmed. This allows the first notification display device 201 and the second notification display device 202 to indicate that the display target on the first to fourth notification display devices 201 to 204 is related to setting values rather than game history management results. This display makes it possible to clearly notify the game hall manager.

In the third notification display device 203, some of the display segments are in a light-emitting state and the remaining display segments are in a light-out state so that the letter "k" is displayed. In this case, the display segments that are in a light-emitting state can be in a light-emitting state even when the game history management results are displayed on the first to fourth notification display devices 201 to 204; The display contents of the third notification display device 203 when displayed do not include the display contents in which the letter "k" is displayed. As a result, while using the display segment that can be in a light emitting state even when the management results of the game history are displayed, the display contents of the third notification display device 203 in the situation where the setting value is confirmed can be changed to the game history. This makes it possible to display content that is not displayed in the management results. Furthermore, while the setting value is being updated, “H” is displayed on the third notification display device 203, while the setting value is being checked, “k” is displayed on the third notification display device 203. " is displayed. As a result, by checking the display contents of the third notification display device 203, the administrator of the game hall is notified whether the setting value is being updated or the setting value is being confirmed. becomes possible.

In the fourth notification display device 204, some display segments are in a light-emitting state and the remaining display segments are in a light-out state so that a display corresponding to the current set value is performed. In the case of FIG. 124(b), the current setting value is "Setting 2", so "2" corresponding to "Setting 2" is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the game hall manager can grasp the current setting values. Note that the display contents of the fourth notification display device 204 in the situation where the setting values are being checked can be displayed in both the situation where the game history management results are displayed and the situation where the setting values are being updated.

Returning to the explanation of the second timer interrupt process (FIG. 123), if a negative determination is made in step S8404, a setting process for the fifth display data buffer 275 in normal times is executed (step S8406). In this case, information is read from the display target setting area 276 in the work area 223 for non-specific control, and the first to fourth notification display devices 201 to 204 display parameters corresponding to the read information. Display data is stored in the fifth display data buffer 275. By transmitting the display data to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 calculate the current display target parameter among the 61st to 68th parameters. The results will be displayed.

When the processing in step S8403, step S8405, or step S8406 is executed, the transmission state of the signal through the type data signal line LN1 and the type clock signal line LN2 is turned OFF (step S8407), and the display data signal line LN3 and the display The transmission state of the signal through the clock signal line LN4 is set to the OFF state (step S8408). Thereafter, the type counter provided in the work area 221 for specific control is updated (step S8409).

The type counter is a counter for the main CPU 63 to specify the display data transmission target among the first to fifth display data buffers 271 to 275 in the current processing round of the second timer interrupt processing. When the value of the type counter is "1", the display data of the first display data buffer 271 is the target of transmission, and when the value of the type counter is "2", the display data of the second display data buffer 272 is the target of transmission. When the value of the type counter is "3", the display data of the third display data buffer 273 becomes the transmission target, and when the value of the type counter is "4", the display data of the fourth display data buffer 274 becomes the transmission target. If the data is to be transmitted and the value of the type counter is "5", the display data in the fifth display data buffer 275 is to be transmitted. In the type counter update process, the value of the type counter is incremented by 1, and if the value of the type counter after adding 1 exceeds the upper limit value of "5", the value of the type counter is set to "1". . As a result, the display data transmission targets are sequentially changed in the first to fifth display data buffers 271 to 275 each time the second timer interrupt process is performed.

Thereafter, type data corresponding to the value of the type counter is read from the main ROM 64 (step S8410). Specifically, when the value of the type counter is "1", the type data corresponding to the first display circuit 261 is read from the main side ROM 64, and when the value of the type counter is "2", the type data corresponding to the first display circuit 261 is read from the main side ROM 64; The type data corresponding to the display circuit 262 is read from the main side ROM 64, and when the value of the type counter is "3", the type data corresponding to the third display circuit 263 is read from the main side ROM 64, and the value of the type counter is When the value of the type counter is "4", the type data corresponding to the fourth display circuit 264 is read from the main side ROM 64, and when the value of the type counter is "5", the type data corresponding to the fifth display circuit 265 is read from the main side ROM 64. Read from the side ROM 64.

Thereafter, display data is read from the display data buffers 271 to 275 corresponding to the value of the type counter (step S8411). Specifically, when the value of the type counter is "1", display data is read from the first display data buffer 271, and when the value of the type counter is "2", the display data is read from the second display data buffer 272. The display data is read, and if the value of the type counter is "3", the display data is read from the third display data buffer 273, and if the value of the type counter is "4", the display data is read from the fourth display data buffer 274. The display data is read out, and if the value of the type counter is "5", the display data is read out from the fifth display data buffer 275.

Thereafter, various signal transmission processing is executed (step S8412). In the transmission process, signals are output to the type data signal line LN1 and type clock signal line LN2 so that the type data read in step S8410 is transmitted to the display IC 266. In addition, in the transmission process, signals are output to the display data signal line LN3 and the display clock signal line LN4 so that the display data read in step S8411 is transmitted to the display IC 266.

Thereafter, interrupt permission is set to permit the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8413).

According to this embodiment described in detail above, the following excellent effects are achieved.

By turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key without pressing the reset button 68c, the supply of operating power to the main CPU 63 is started. In the situation where the main process (FIG. 114) is started, the reset button 68c is not pressed and the setting key insertion part 68a is turned on, and the process that allows the game to proceed is executed in the main process. The setting confirmation process is executed in a situation where the process at the start of supply of operating power is being executed, which is the situation before the operation. This makes it difficult to illegally check the setting values.

Assuming that the setting values are checked while the game continues to progress, for example, if the setting values are checked in the middle of a game round, There is a risk that a transition to the open/close execution mode may occur. In this case, there is a possibility that the game ball cannot be fired toward the special electric winning device 32 even though the opening/closing execution mode has been started. In addition, if the setting value is confirmed during the execution of the opening/closing execution mode, the opening/closing execution mode will proceed under the situation where the setting value is being confirmed. There is a possibility that the game ball will not be able to be fired towards the player.

Assuming that the progress of the game is stopped when checking the set value, if the check of the set value is started while a game is being played, the progress of the game is stopped midway. There is a risk that the processing for this may become complicated. For example, if confirmation of the set value is started in the middle of a game round and the progress of the game is to be stopped midway, a process for stopping the game round midway is required. In this case, when confirmation of the set value is started, the fluctuating display of the symbol on the symbol display device 41 is stopped midway, and when the confirmation of the set value is completed, the fluctuating display of the symbol on the symbol display device 41 is restarted. If you try to do so, it will require more complicated processing. Further, for example, if confirmation of the set value is started in the middle of execution of the opening/closing execution mode and it is attempted to stop the progress of the game midway, processing for stopping the opening/closing execution mode midway is required. Furthermore, if confirmation of the set value is started during the execution of the fluctuating display of the symbol on the ordinary figure display section 38a and an attempt is made to stop the progress of the game, the process for stopping the fluctuating display of the symbol midway is performed. It becomes necessary. In addition, if confirmation of the set value is started in the middle of execution of the open execution state of the general electric accessory 34a and you try to stop the progress of the game halfway, it is necessary to take a process to stop the opening execution state in the middle. Become. On the other hand, a configuration in which the set values are confirmed after waiting until all games are finished may also be considered, but in this case, the game time, opening/closing execution mode, fluctuating display of symbols in the general figure display section 38a, and general electric combination It becomes necessary to wait until a situation in which none of the open execution states of the object 34a is executed, and there is a possibility that the waiting time until starting confirmation of the set value becomes long.

On the other hand, when the supply of operating power is started, which is the situation before the processing that allows the game to proceed in the main processing that is executed when the supply of operating power to the main CPU 63 is started, Since the setting confirmation process is executed in a situation where the process is being executed, the setting value is confirmed in a situation where the progress of the game has already been stopped. This makes it possible to prevent setting values from being checked while the game is in progress, as well as to stop the game progress midway when checking the setting values, or to stop the game progress. There is no need to wait until the settings are confirmed. Therefore, it becomes possible to appropriately confirm the setting values.

The reset button 68c is pressed in a situation where the power supply of the pachinko machine 10 is turned on while pressing the reset button 68c, thereby starting the supply of operating power to the main CPU 63 and starting the main processing (FIG. 114). is pressed, and the RAM clearing process (step S7915) is executed regardless of whether or not the setting key insertion section 68a is turned on. As a result, the operation of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clearing process (step S7915), and the RAM clearing process (step S7915) It becomes possible to make the operation details for generating the event easy to understand for the manager of the game hall.

Even if the RAM clearing process (step S7915) is executed, the setting value counter in the specific control work area 221 is not cleared to "0" and the information on the setting value counter is not changed. This makes it possible to prevent the setting value from being changed even if the RAM clearing process (step S7915) is executed.

RAM Not only the clearing process (step S7915) but also the setting value updating process (step S7918) is executed. Furthermore, as described above, the setting confirmation process (step S7914) is performed based on the fact that the power of the pachinko machine 10 is turned on while turning on the setting key insertion part 68a with the setting key without pressing the reset button 68c. is executed. This makes it possible to use the ON operation for the setting key insertion section 68a in common as an operation for executing processing related to setting values. Therefore, it is possible to make the operation details for generating the process related to the set value easy for the game hall manager to understand.

When turning on the power of the pachinko machine 10 while turning on the setting key insertion part 68a with the setting key, and when pressing the reset button 68c is not added, a setting confirmation process is executed and the reset button is turned on. When adding the pressing operation 68c, a setting value update process is executed. Thereby, it becomes possible to change the process to be executed among the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make it easy for the game hall manager to understand the operation details for executing a desired process among the setting confirmation process and the setting value update process. Furthermore, by increasing the number of operations required to execute the setting value update process than the setting confirmation process, it is possible to make it particularly difficult to perform the setting value update process illegally.

A process for monitoring whether or not the set value is abnormal is executed in the first timer interrupt process (FIG. 117) that is activated periodically. This makes it possible to monitor whether or not the set value is abnormal even when a game is being played. Therefore, it is possible to prevent the game from being continued even though the set value is abnormal.

Monitoring to determine whether or not the set value is abnormal is performed every time a monitoring opportunity occurs. More specifically, the first timer interrupt process (FIG. 117) is executed every time it is activated. This makes it possible to increase the frequency of monitoring whether or not the set value is abnormal.

The main process (FIG. 114) does not include a process for monitoring whether or not the set value is normal. If a process for monitoring whether the set value is normal is set in the process at the start of supply of operating power in the main process (Fig. 114), the power failure flag and check sum are set at the start of supply of operating power. In addition to monitoring the settings, it is also necessary to monitor whether the set values are normal or not, which increases the monitoring load. Furthermore, if an attempt is made to execute the RAM clearing process (step S7915) and the setting value update process (step S7918) when it is specified that the set value is abnormal at the start of the supply of operating power, the processing configuration becomes complicated. On the other hand, since the main process (FIG. 114) does not have a process for monitoring whether the set value is normal or not, the process configuration for the process at the start of the supply of operating power is not suitable. It becomes possible to make it a thing. In addition, even if the process to monitor whether the set value is normal or not is not set in the process at the start of supply of operating power, the setting can be monitored in the first timer interrupt process (Figure 117). Since the configuration executes the process (step S8220), if the set value is abnormal, it is possible to deal with it.

Note that an update button 68b is provided as in the first embodiment, and in the setting value update process (FIG. 116), the setting value is updated by one step each time the reset button 68c is pressed. The setting value may be updated by one step each time the update button 68b is pressed. Further, when a setting key is inserted into the setting key insertion portion 68a and a turning operation is performed, positions corresponding to "Setting 1" to "Setting 6" are set as the rotation operation positions, and the setting key is inserted. A configuration may be adopted in which a setting value corresponding to the rotation operation position of the portion 68a is set. In addition, the setting key insertion part 68a is configured to be able to be rotated further than the ON position, and each time a rotation operation beyond the ON position is performed, the setting value in the middle of updating is changed to the setting value in the next order. The configuration may be updated.

In the setting value update process (FIG. 116), the currently selected setting value is determined by turning off the setting key insertion section 68a, and the setting value update process is completed by further pressing the reset button 68c. It is also possible to have a configuration in which In addition, in a configuration in which an update button 68b is provided, in the setting value update process (FIG. 116), the currently selected setting value is determined by turning off the setting key insertion section 68a, and the update button 68b is further pressed. A configuration may also be adopted in which the setting value update process is terminated upon operation.

Further, as a condition for executing the setting value update process (FIG. 116), the condition that the game machine main body 12 is in an open state may not be set, and the front door frame 14 is in an open state. The configuration may be such that the condition that the gaming machine main body 12 is in the open state and the condition that the front door frame 14 is in the open state are not set.

Further, as a condition for executing the setting confirmation process (FIG. 115), a configuration may be adopted in which the condition that the game machine main body 12 is in an open state is not set, and the front door frame 14 is in an open state. The configuration may be such that the condition that the gaming machine main body 12 is in the open state and the condition that the front door frame 14 is in the open state are not set.

In addition, in the main process (FIG. 114) that is executed when the supply of operating power to the main CPU 63 is started, it is identified that the power outage flag is not set to "1" or that the checksum is abnormal. In this case, a configuration may be adopted in which RAM clear processing (step S7915) is executed. In this case, after the RAM clearing process (step S7915) is executed, the setting value updating process (step S7918) may be executed, and the notification indicating that the setting value updating process (step S7918) should be executed. The configuration may be such that the game is executed and the progress of the game is stopped, or the process for controlling the progress of the game is started.

Also, in place of the configuration in which the setting confirmation process (step S7914) in the main process (FIG. 114) is executed after the process of determining whether the power outage flag is set to "1" and the process of comparing the checksum. , may be configured to be executed before these processes. In this case, it is possible to give priority to the process for confirming the set value.

Furthermore, the setting monitoring process (step S8220) is not limited to a configuration in which the first timer interrupt process (FIG. 117) is executed every time the first timer interrupt process (FIG. 117) is started; for example, the first timer interrupt process (FIG. 117) is The configuration may be such that the setting monitoring process (step S8220) is executed every time it is executed a predetermined number of times (for example, 10,000 times). In this case, it is possible to periodically monitor whether or not the set value is normal, while reducing the frequency with which the monitoring is performed.

Further, a configuration may be adopted in which the setting monitoring process (step S8220) is executed in the remaining process (steps S7921 to S7924) in the main process (FIG. 114). In this case, it is possible to monitor whether the set value is normal or not using the free time when the first timer interrupt processing (Figure 117) and the second timer interrupt processing (Figure 123) are not being executed. It becomes possible.

Furthermore, a configuration may be adopted in which the setting monitoring process (step S8220) is executed when a new gaming session is started. More specifically, when a game round is newly started, the setting monitoring process (step S8220) may be executed before the validity determination process is executed. This makes it possible to prevent the validity determination process from being executed in a situation where the set value is abnormal.

Furthermore, if it is identified in the setting monitoring process (step S8220) that the setting value is abnormal, the configuration may be such that the process moves to the setting value updating process (step S7918).

In addition, if it is specified that the setting value is abnormal in the setting monitoring process (step S8220), the setting abnormality flag provided in the work area 221 for specific control is set to "1" and the main processing Fig. 114) may be configured to start the game, and the progress of the game is stopped with the setting abnormality flag set to "1", and in order to release the stopped state of the game, the power must be turned OFF → A configuration may be adopted in which it is necessary to turn ON. In this case, even if no operation is performed to execute the setting value update process in the main process (Fig. 114), if the setting abnormality flag is set to "1", the setting value is forcibly set. By executing the value update process, it becomes possible to forcibly set a new setting value using the setting value update process set in the main process (FIG. 114).

In addition, the holding information obtained when a game ball enters the first operating port 33 and the holding information obtained when a game ball enters the second operating port 34 are stored separately, and The special figure display section 37a may have a configuration in which a first special figure display section and a second special figure display section are provided in correspondence with the reservation information. In this case, the fluctuating display of the symbols in the first special symbol display section and the fluctuating display of the symbols in the second special symbol display section may be executed simultaneously, and when a predetermined gaming state is reached, either one It is also possible to adopt a configuration in which the duration of the variable display of the symbols on the special figure display section is extremely long. In this configuration, if the player tries to wait to confirm the set value until a situation where no game is being played, the waiting time becomes long. In contrast, by executing the setting confirmation process (step S7914) in the process when the main CPU 63 starts supplying operating power, the setting value can be changed without causing the above-described standby time. It becomes possible to confirm.

Further, in the low-frequency support mode, the period of continuous display of the fluctuating pattern on the common figure display section 38a may be configured to be extremely long. In this configuration, if the player tries to wait to confirm the set value until a situation where no game is being played, the waiting time becomes long. In contrast, by executing the setting confirmation process (step S7914) in the process when the main CPU 63 starts supplying operating power, the setting value can be changed without causing the above-described standby time. It becomes possible to confirm.

Further, the display contents of the first to fourth notification display devices 201 to 204 when the setting confirmation process (FIG. 115) is executed are not limited to the display contents in the above embodiments, and for example, the third notification Instead of displaying the letter "k" on the display device 203, it may be configured such that only the central display segment is in a light emitting state, similar to the first notification display device 201 and the second notification display device 202. . Alternatively, the first to third notification display devices 201 to 203 may be turned off, and the fourth notification display device 204 may display a display corresponding to the current setting value.

Further, the display contents of the first to fourth notification display devices 201 to 204 when the setting value update process (FIG. 116) is executed are not limited to the display contents in the above embodiments, and for example, the third notification Instead of displaying the letter "H" on the display device 203, it may be configured such that only the central display segment is in a light emitting state, similar to the first notification display device 201 and the second notification display device 202. . Alternatively, the first to third notification display devices 201 to 203 may be turned off, and the fourth notification display device 204 may display a display corresponding to the current setting value.

Further, instead of the configuration in which the main CPU 63 simultaneously transmits the type data and display data to the display IC 266, the main CPU 63 may be configured to start transmitting the display data after starting to transmit the type data. In this case, a configuration may be adopted in which the display data transmission is started during the transmission of the type data, or a configuration in which the display data transmission is started after the type data transmission is completed. Alternatively, the configuration may be such that the transmission of the type data is started after the transmission of the display data is started. In this case, the configuration may be such that the transmission of the type data is started during the transmission of the display data, or the transmission of the type data may be started after the transmission of the display data is completed.

Further, the display IC 266 is not limited to a configuration in which only one display IC 266 is provided in common to the first to fifth display circuits 261 to 265; It is also possible to have a configuration in which they are provided in one-to-one correspondence. In this configuration, if the period for storing display data in each display IC provided in one-to-one correspondence with the first to fifth display circuits 261 to 265 is short, the display data to each display IC is Depending on the provision period, there is a risk that unintended blinking may occur on each display section. In contrast, by consolidating the process for transmitting display data into the second timer interrupt process (FIG. 123), which has a relatively short interrupt cycle, as in the above embodiment, display data can be sent to each display IC. It becomes possible to shorten the provision cycle, and it becomes possible to prevent unintended blinking from occurring in each display section.

Further, instead of the configuration in which the winning random number counter C1 is provided in the main side RAM 65, a configuration may be provided in which a random number circuit for updating the random number obtained in the win/fail determination process is provided. In this case, in the internal function register setting process in the main process (FIG. 114), settings are made to associate the random number of the random number circuit with the random number obtained in the validity determination process.

<Thirty-fourth embodiment>
This embodiment is different from the thirty-third embodiment described above in the processing configuration of the setting value update process executed by the main CPU 63. Hereinafter, configurations that are different from the thirty-third embodiment described above will be explained. Note that descriptions of the same configurations as those in the thirty-third embodiment described above will be basically omitted. Further, in this embodiment, the main control board 61 is provided with an update button 68b as in the first embodiment.

FIG. 125 is a flowchart showing the setting value update process in this embodiment executed by the main CPU 63. Note that the processes from step S8501 to step S8508 in the setting value update process are executed using a specific control program and specific control data in the main CPU 63.

First, a setting update display flag provided in the work area 221 for specific control is set to "1" (step S8501). After that, it is determined whether the value of the setting value counter provided in the work area 221 for specific control is greater than or equal to 1, which corresponds to "setting 1", and less than or equal to 6, which corresponds to "setting 6" (step S8502). If the value of the set value counter is "0" or 7 or more, a negative determination is made in step S8502, and the set value counter is set to "1" (step S8503). As a result, the setting value of the pachinko machine 10 becomes "setting 1."

If an affirmative determination is made in step S8502 or if the process in step S8503 is executed, it is determined whether or not the reset button 68c is pressed (step S8504). If the reset button 68c is not pressed (step S8504: NO), and the update button 68b is pressed (step S8505: YES), the value of the set value counter in the work area 221 for specific control is changed. is added by 1 (step S8506). Thereby, each time the update button 68b is pressed once, the setting value is updated to one level higher. Further, if the update button 68b is not pressed (step S8505: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8502, but in step S8502 the value of the set value counter is If it is determined that the value is 7 or more, "1" is set in the set value counter in step S8503. As a result, when the update button 68b is pressed once in the situation of "Setting 6", the state returns to "Setting 1".

If the reset button 68c is pressed (step S8504: YES), the current set value is determined and the process advances to step S8507. In step S8507, it is determined whether the setting key insertion section 68a is turned off using a setting key. In this case, a configuration may be adopted in which it is determined whether the setting key insertion section 68a has been switched from an ON state to an OFF state, or a configuration may be adopted in which it is determined whether or not the setting key insertion section 68a is in an OFF state. If the setting key insertion section 68a has not been turned off (step S8507: NO), the process of step S8507 is executed again.

If the setting key insertion section 68a is turned off (step S8507: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8508).

According to the above configuration, in a configuration where the setting value is updated by pressing the update button 68b, the setting value is determined by pressing the reset button 68c, and the setting key insertion part 68a is turned OFF. This completes the setting value update process. That is, in order to end the setting value updating process after updating the setting value in the setting value updating process, it is necessary not only to turn off the setting key insertion part 68a but also to press the reset button 68c. This makes it possible to make it difficult for the player to attempt to play a game using the set values after the set values have been updated illegally.

<Other embodiments>
Note that the present invention is not limited to the contents described in the embodiments described above, and various modifications and improvements can be made without departing from the spirit of the present invention. For example, the following changes may be made. Incidentally, the configurations of the following alternative forms may be applied individually to the configuration of the above embodiment, or may be applied in combination.

(1) In the first to fourteenth embodiments, the number of occurrences of the opening/closing execution mode per unit game is calculated as a parameter indicating the frequency of occurrence of the opening/closing execution mode. In addition, it may be configured to calculate the result of dividing the number of occurrences of the opening/closing execution mode by the total number of game balls discharged from the game area PA. In addition to or in place of this, there is also a configuration that calculates the result of dividing the number of times the opening/closing execution mode occurs by the total number of balls entering the first operating port 33 and the number of balls entering the second operating port 34. You can also use it as Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(2) In the first to fourteenth embodiments, the parameters indicating the frequency of occurrence of the high-frequency support mode are the number of occurrences of the high-frequency support mode per unit game and the number of occurrences of the opening/closing execution mode. In addition to or instead of this, the configuration may be configured to calculate the result of dividing the number of occurrences of the high-frequency support mode by the total number of game balls ejected from the gaming area PA. good. In addition to or in place of this, the result is calculated by dividing the number of occurrences of the high-frequency support mode by the total number of balls entering the first operating port 33 and the number of balls entering the second operating port 34. It may also be a configuration. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(3) A configuration may be adopted in which not only the jackpot result but also the small win result exists as the game result that triggers the occurrence of the opening/closing execution mode. If the result is a small win, the open/close execution mode occurs, but the win/fail lottery mode and support mode are not changed before and after the open/close execution mode. Furthermore, the opening/closing execution mode that results in a small win may be configured to become a low-frequency winning mode. In this case, when a jackpot result occurs, history information corresponding to the occurrence of the jackpot result is stored in the history memory 117, and when a small win result occurs, history information corresponding to the occurrence of the small win result is stored in the history memory 117. The configuration may be such that the information is stored in the memory 117 for use. Further, in this configuration, a parameter indicating the frequency of occurrence of a jackpot result and a parameter indicating a frequency of occurrence of a small win result may be calculated by using history information stored in the history memory 117. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

Further, the probability of winning a small winning result may be configured to change depending on the setting state of the pachinko machine 10, or may be configured not to change. In the case of a configuration in which the probability of winning a small winning result changes depending on the setting state of the pachinko machine 10, it may be configured such that the higher the setting value is, the higher the probability of winning the small winning result, and the higher the setting value, the higher the probability of winning the small winning result. It is also possible to adopt a configuration in which the probability of such occurrence is low.

In addition, in a configuration in which there is a small hit result, reservation information is obtained when a game ball enters the first operating port 33 and retention information is obtained when a game ball enters the second operating port 34. The distribution ratio of the type of jackpot result in the case of a jackpot result is different depending on the pending information, and when aiming to enter the first operation port 33, the variable display unit 36 in the gaming area PA The firing operation is performed so that the game ball flows down the area on the left side, and when aiming the ball to enter the second operating port 34, the game ball flows down the area on the right side of the variable display unit 36 in the game area PA. The configuration may be such that the firing operation is performed as shown in FIG.

In this configuration, the following 51st parameter may exist as a management result of the game history. Note that the normal period is the sum of the execution period of the opening/closing execution mode triggered by a small hit result based on the ball entering the first operating port 33 and the execution period of the low frequency support mode instead of the opening/closing execution mode. do. In addition, the number of balls entering the out port 24a during the normal period is the number of balls entering K51, the number of balls entering the general winning hole 31 during the normal period is the number K52 of entering balls, and the number of balls entering the special electric winning device 32 during the normal period. The number of balls entering the first operating port 33 during the normal period is K54, and the number of balls entering the second operating port 34 during the normal period is the number K55 of entering balls.
-51st parameter: Total number of game balls paid out during the normal period (K52 x "Number of prize balls for winning in the general winning slot 31" + K53 x "Number of prize balls for winning in the special electric winning device 32" + K54 x "1st Ratio of "Number of prize balls for winning in the operating port 33" + K55 x "Number of prize balls for winning in the second operating port 34") / Total number of game balls ejected from the technique area PA during the normal period (K51 + K52 + K53 + K54 + K55) Above In a configuration in which the 51st parameter is calculated, if the probability of winning a small win varies depending on the setting state of the pachinko machine 10, the normal value of the 51st parameter may vary depending on the setting state of the pachinko machine 10. becomes. Therefore, it is preferable that the history information used to calculate the 51st parameter be deleted when the setting state of the pachinko machine 10 is changed. On the other hand, if the winning probability of the small winning result does not vary depending on the setting state of the pachinko machine 10, the normal value of the 51st parameter does not vary depending on the setting state of the pachinko machine 10. Therefore, it is preferable that the history information used to calculate the 51st parameter is not deleted even if the setting state of the pachinko machine 10 is changed.

(4) In the first to fourteenth embodiments, the history information corresponding to the occurrence of the opening/closing execution mode is stored in the history memory 117 regardless of which type of jackpot result occurs. Therefore, history information corresponding to the type of jackpot result may be stored in the history memory 117. In this case, a configuration may be adopted in which a parameter indicating the frequency of occurrence is calculated for each type of jackpot result. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(5) In the first to fourteenth embodiments, various parameters (the first to the eighth parameters, the eleventh to the eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the forty-first to forty-second parameters) Although the configuration is such that the parameters) are calculated, the configuration is not limited to this, and for example, when the total number of game balls discharged from the game area PA reaches the calculation trigger number (for example, 10,000 balls), various parameters are calculated. The configuration may be such that various parameters are calculated when the supply of operating power to the pachinko machine 10 is stopped, and the number of execution times of the game is the number of calculation triggers (for example, 1000 times). A configuration may also be adopted in which various parameters are calculated depending on the case. In this case, the history memory 117 may be cleared to "0" at the timing when various parameters are calculated. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(6) In the first to fourteenth embodiments, each time it is time to calculate various parameters, the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameter, and the Although the configuration is such that all of the 41st and 42nd parameters are calculated, the configuration is not limited to this, and only some of the various parameters mentioned above are subject to calculation at one calculation timing, and each time the calculation timing comes A configuration may also be adopted in which the parameter groups to be calculated are sequentially changed. For example, at one calculation timing, the 1st to 8th parameters are calculated, at the next calculation timing, the 11th to 18th parameters are calculated, at the next calculation timing, the 21st to 26th parameters are calculated, and then A configuration may be adopted in which the 31st parameter and the 41st to 42nd parameters are calculated at the timing, and thereafter, the change of the calculation target in the above order is repeated every time the calculation timing comes. This makes it possible to reduce the processing load for calculating parameters when one calculation timing is reached. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(7) In the first to fourteenth embodiments described above, calculations of various parameters using history information in the history memory 117 may be executed on the condition that a game is being played. For example, the configuration may be such that calculations of various parameters are executed on the condition that game balls are supplied to the game area PA. This makes it possible to prevent calculations of various parameters from being needlessly repeated even though no game is being played. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(8) In the first to fourteenth embodiments described above, the configuration is not limited to the configuration in which the management IC 66 is provided separately from the main CPU 63, and the function of the management IC 66 is performed by the main CPU 63. It may also be a configuration. In this case, the correspondence information will be stored in the main ROM 64 in advance. Furthermore, a configuration may be adopted in which a history memory 117, a calculation result memory 131, and a separate storage memory 171 are provided separately from the main RAM 65. A configuration may be adopted in which the function of the storage memory 171 is fulfilled. In a configuration where the main side RAM 65 functions as the history memory 117, the calculation result memory 131, and the separate storage memory 171, when the main side RAM 65 clearing process (step S105, step S117) is executed, the history memory 117, the calculation result memory 131, and the separate storage memory 171 are It may be configured such that part or all of the areas corresponding to each of the memory 117, the calculation result memory 131, and the separate storage memory 171 are cleared to "0." The area corresponding to each of the memory 171 may be excluded from the target of "0" clearing, and may be configured to be cleared to "0" when the corresponding clearing conditions in each of the above embodiments are satisfied. Furthermore, it is also possible to configure the main RAM 65 to have different manual operations for executing clear processing in areas corresponding to the history memory 117, calculation result memory 131, and separate storage memory 171 and other areas. good. Alternatively, the function of the management IC 66 may be performed by the sound emission control device 81.

(9) In the first to fourteenth embodiments described above, when a new setting is made to the setting state of the pachinko machine 10, the history information in the history memory 117 is stored and retained without being deleted; A configuration may also be adopted in which various parameters stored in the result memory 131 are deleted. This makes it possible to prevent notification of various parameters calculated before a new setting is made after a new setting is made. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(10) In the third to fifth embodiments described above, even if a new setting of the setting state of the pachinko machine 10 is performed (that is, even if the setting value update process is executed by the main CPU 63), the corresponding If the setting value is not changed before and after the setting, the clearing process of the history memory 117 may not be executed. This makes it possible to prevent the history information in the history memory 117 from being deleted even though the setting value has not been changed.

In this configuration, the area for storing setting values in the main side RAM 65 is configured so that it is not cleared to "0" even if the entire clearing process (step S117) is executed, so that the setting value update process ( It becomes possible for the main CPU 63 to specify whether the set value has been changed before or after step S118). In this case, if the main CPU 63 identifies that the setting value has not been changed, a signal is output to the management CPU 112 so that the setting update recognition process is not executed in the management CPU 112, and the main CPU 63 If it is determined that a setting value has been changed, a signal may be output to the management CPU 112 so that the management CPU 112 executes a setting update recognition process.

Further, when a signal indicating that a new setting of the setting state of the pachinko machine 10 has been made is received from the main side CPU 63, the management side CPU 112 can refer to the history information stored in the history memory 117. It may be configured to specify whether or not the setting value has been changed. In this case, if the management CPU 112 determines that the setting value has not been changed, the history memory 117 is not cleared, and the management CPU 112 determines that the setting value has been changed. In this case, the history memory 117 can be cleared.

(11) In the third to fifth embodiments described above, even if a new setting of the setting state of the pachinko machine 10 is performed (that is, even if the setting value update process is executed by the main CPU 63), the corresponding If the set value is not changed before and after the setting, the configuration may be such that calculation processing of various parameters is not executed based on the new setting of the setting state. This makes it possible to prevent various parameters from being calculated based on a new setting of the setting state even though the setting value has not been changed.

In this configuration, the area for storing setting values in the main side RAM 65 is configured so that it is not cleared to "0" even if the entire clearing process (step S117) is executed, so that the setting value update process ( It becomes possible for the main CPU 63 to specify whether the set value has been changed before or after step S118). In this case, if the main CPU 63 identifies that the setting value has not been changed, a signal is output to the management CPU 112 so that the setting update recognition process is not executed in the management CPU 112, and the main CPU 63 If it is determined that a setting value has been changed, a signal may be output to the management CPU 112 so that the management CPU 112 executes a setting update recognition process.

Further, when a signal indicating that a new setting of the setting state of the pachinko machine 10 has been made is received from the main side CPU 63, the management side CPU 112 can refer to the history information stored in the history memory 117. It may be configured to specify whether or not the setting value has been changed. In this case, if the management CPU 112 determines that the setting values have not been changed, calculations of various parameters triggered by new settings in the current setting state are not executed, and the management CPU 112 When it is determined that a value has been changed, calculations of various parameters can be executed using the new setting of the current setting state as an opportunity.

(12) In the third to fifth embodiments, when a new setting is made for the setting state of the pachinko machine 10, various parameters are calculated in various calculation processes (step S1807) at that point. The various parameters stored in the calculation result memory 131 at that time are stored in the area to be stored among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171, and the calculation The information stored in the result memory 131 may be cleared to "0". In this case, since there is no need to calculate various parameters under the situation where a new setting of the pachinko machine 10 is made, it is possible to quickly complete the storage of various parameters in the separate storage memory 171. Become.

(13) In the third to fifth embodiments, the contents of various parameters stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 are changed by performing a predetermined display start operation. It may be configured to be displayed on the first to third notification display devices 69a to 69c or other display devices. The predetermined display start operation may be performed by operating a dedicated operation section, or may be performed by performing a predetermined dedicated operation on an operation section for performing other operations. This makes it possible to easily check various parameters stored in the separate storage memory 171.

(14) The out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 are all configured to store history information (or ball entry history), but this The structure is not limited to, and only a part of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 are subject to storage of history information. You can also use it as For example, a configuration may be adopted in which only the general winning opening 31, the special electric winning device 32, and the second operating opening 34 are subject to storing history information, or a configuration in which only the general winning opening 31 is subject to storing historical information may be adopted. It's good. Even in this case, it is possible to grasp the ball entry mode of the game ball during a predetermined period with respect to the ball entry part for which the history information is stored.

(15) A signal path for transmitting information corresponding to the ball entry result of the game ball in correspondence with each of the first winning hole detection sensor 42a, the second winning hole detection sensor 43a, and the third winning hole detection sensor 44a. 118a to 118c have been set, but the configuration is not limited to this, and the information corresponding to the ball entry results for the same type of ball entry part may be used if there are multiple ball entry parts of the same type. Even if the configuration includes a plurality of ball entry detection sensors, the configuration may be such that the information is transmitted as one type of information. This makes it possible to suppress the number of types of information transmitted from the main CPU 63 to the management IC 66.

(16) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information sent from the main CPU 63 to the management IC 66 and each buffer 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Although the configuration is such that the information is transmitted to the IC 66, the present invention is not limited to this, and the correspondence relationship information may be stored in advance in the management IC 66. In this case, there is no need to execute a process for making the management IC 66 recognize the correspondence relationship information, so it is possible to reduce the processing load on the main CPU 63.

(17) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information sent from the main CPU 63 to the management IC 66 and each buffer 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Although the configuration is such that the transmission to the main CPU 63 is performed at the start of supply of operating power to the main CPU 63, the present invention is not limited to this. For example, the main CPU 63 and the management IC 66 may be able to communicate bidirectionally, The configuration may be such that when a signal requesting transmission of the correspondence information is received from the IC 66, the main CPU 63 transmits the correspondence information to the management IC 66. In this case, the correspondence memory 116 is provided as a nonvolatile memory and is configured to be used for both reading and writing, and the correspondence information provided from the main CPU 63 to the management IC 66 after the pachinko machine 10 is shipped is transferred to the main CPU 63. The configuration is such that even if the supply of operating power is stopped, the information is stored and retained in the correspondence memory 116. This makes it possible to reduce the frequency with which correspondence information is transmitted.

(18) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the type of information sent from the main CPU 63 to the management IC 66 and each buffer 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Although the configuration is such that transmission is performed using the signal paths 118a to 118g for transmitting information on the detection results of the respective ball entry detection sensors 42a to 48a, the present invention is not limited to this, and the correspondence relationship A configuration may be adopted in which a dedicated signal path for transmitting information from the main CPU 63 to the management IC 66 is provided. This allows the management IC 66 to know which type of information it is receiving from the main CPU 63 based on the type of the buffers 122a to 122o that receive the information.

(19) In the first to fourteenth embodiments described above, information is transmitted from the main side CPU 63 to the management IC 66, but information is not transmitted from the management IC 66 to the main side CPU 63, but the configuration is not limited to this. Instead, the configuration may be such that information is transmitted from the management IC 66 to the main CPU 63. For example, a configuration may be adopted in which various parameters calculated by the management CPU 112 based on history information are transmitted to the main CPU 63. In this case, the main CPU 63 may be configured to directly execute notification control of the notification means so that notifications corresponding to the contents of the received various parameters are performed, and the main CPU 63 By sending commands corresponding to the contents of the parameters to the audio light emission control device 81, notifications corresponding to the contents of various parameters are executed using the symbol display device 41, the display light emission section 53, and the speaker section 54. It is also possible to have a configuration in which

(20) In the first to fourteenth embodiments, when the supply of operating power to the main CPU 63 is started, the main CPU 63 or the management CPU 112 is activated based on the history information stored in the history memory 117. Various parameters may be calculated, and the contents of the calculated various parameters may be notified using the symbol display device 41, the display light emitting section 53, the speaker section 54, etc. In this case, when the gaming hall starts business, it is possible to confirm whether or not the entry state of game balls in the gaming area PA on the previous business day was normal. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(21) If the various parameters calculated based on the history information stored in the history memory 117 in the first to fourteenth embodiments are abnormal results, the pachinko machine 1 It is also possible to adopt a configuration in which the game cannot be started at . As a configuration for preventing the game from starting, for example, a configuration may be adopted in which the firing of game balls is prohibited, a configuration in which each ball entry detection sensor 42a to 49a is disabled, and a configuration in which the first operating port 33 or the second operating port 34, the win/fail determination process may not be executed. Further, the prohibition release operation may be an operation of turning on the power of the pachinko machine 10 again while the reset button 68c is pressed, and can be operated when the gaming machine main body 12 is opened with respect to the outer frame 11. It is also possible to operate the operating means. This makes it possible to prevent the game from being played in a situation where the game ball enters the game area PA in an abnormal manner. Further, it is possible to prevent the game from being played in a situation where the frequency of occurrence of the opening/closing execution mode is abnormal. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(22) Although the history information corresponding to the detection results of the ball entry detection sensors 42a to 48a is stored in the history memory 117 in the first to fourteenth embodiments, the calculation of various parameters using the history information is A configuration may be adopted in which neither the main side CPU 63 nor the management side CPU 112 executes. In this case, the history information may be read by an external device electrically connected to the reading terminal 68d, and various parameter calculations may be performed using the read history information by the reading worker. Often, the configuration may be such that an external device executes calculations of various parameters using the read history information. In this case, it becomes possible to reduce the processing load on the main side CPU 63 and the management side CPU 112. Further, the configuration may be applied to the fifteenth to thirty-fourth embodiments described above.

(23) In the first to fourteenth embodiments, the management IC 66 is provided with a separate power supply from the main CPU 63, and even if the supply of operating power to the main CPU 63 is stopped, the management IC 66 The configuration may be such that it is possible to calculate various parameters using history information and to output information on history information or various parameters. Thereby, even in a situation where the supply of operating power to the main CPU 63 is stopped, it becomes possible to read history information and various parameters with an external device.

(24) In the first to fourteenth embodiments, the reading terminal 68d used to read programs from the main ROM 64 is also used as a terminal used to read history information or various parameters with an external device. However, the configuration is not limited to this, and the terminal used for reading historical information or various parameters with an external device is the reading terminal 68d for reading the program from the main ROM 64. It may also be configured separately. In this case, the terminals used to read the history information or various parameters may be provided in the MPU 62 or may be provided in a location other than the MPU 62 on the main control board 61.

(25) In the first to fourteenth embodiments, the correspondence memory 116, the history memory 117, and the calculation result memory 131 are not limited to the configuration in which they are provided as nonvolatile storage means such as flash memory. For example, one of these memories 116, 117, and 131 is provided as a volatile storage means that requires power supply to store and retain information, and by supplying backup power to that memory, the main side The information may be stored and retained even if the supply of operating power to the CPU 63 is stopped. In this case, a configuration may be adopted in which a dedicated backup power device is provided for the memory, or a configuration in which backup power is supplied to the memory from the power supply/launch control device 78 that supplies backup power to the main side RAM 65. Good too.

(26) In the first to fourteenth embodiments, the management IC 66 includes the management CPU 112 as a general-purpose CPU, and performs storage processing of history information and calculation processing of various parameters based on programs and data stored in the management ROM 113. The execution configuration is not limited to this, and the management IC 66 may have a configuration in which a hardware circuit designed to have these functions is formed. Specifically, regarding the configuration, for example, in the first embodiment, when the hardware circuit receives a signal from the main CPU 63 indicating that a game ball has been detected by any of the detection sensors 42a to 48a. , the correspondence information corresponding to the buffer that received the signal is stored from the correspondence memory 116 to the history memory 117, and the information of the RTC 115 at that time is stored in the history memory 117. do. Further, for example, in the sixth embodiment, when the hardware circuit receives a signal from the main CPU 63 indicating that one of the detection sensors 42a to 48a has detected a game ball, the hardware circuit receives the signal. The value of the counter corresponding to the buffer is incremented by 1. Furthermore, when a calculation trigger occurs in the first embodiment or the like, the hardware circuit calculates various parameters using history information at that time. Further, when an external output trigger to the reading terminal 68d occurs, the hardware circuit externally outputs various parameters that are calculation results and also outputs history information to the outside.

(27) In the first to fourteenth embodiments described above, the main CPU 63 and the management IC 66 may be provided as separate chips, may be provided as separate boards, or may be provided as separate control devices. It is also possible to have a configuration provided as .

(28) Regarding the entry of game balls into the out port 24a, the number of balls entered is counted, while the number of game balls entering the general winning hole 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 A configuration may be adopted in which history information including RTC information is stored regarding the entry of balls into the bonus opportunity entry section that triggers the payout of prize balls and the judgment process. As a result, while making it possible to extract the history of game balls entering the bonus opportunity ball entry section, it is also possible to calculate the frequency of game balls entering each bonus opportunity ball entry section with respect to the total number of game balls discharged. Become.

(29) A configuration may be adopted in which the predetermined event that triggers the storage of history information includes events other than those in the above embodiments. For example, a configuration may be adopted in which at least one of the fact that the lower tray 56a is in a full state, the timing at which the full state is started, and the timing at which the full state is canceled is stored as history information. It may be configured such that at least one of the fact that there is no ball state, the timing at which the no ball state is started, and the timing at which the no ball state is canceled is stored as history information, and the dispensing device 76 is in an abnormal state. In particular, at least one of the timing at which the abnormal state of the dispensing device 76 started and the timing when the abnormal state of the dispensing device 76 was released may be stored as history information. In this case, it becomes possible to grasp the frequency of occurrence of these events.

(30) In the first embodiment, it is set in advance at the design stage of the management IC 66 that the 16th buffer 122p of the input port 121 in the management side I/F 111 corresponds to the output instruction signal. However, the configuration is not limited to this, and the management IC 66 can recognize that the 16th buffer 122p corresponds to the output instruction signal by transmitting a type identification command from the main CPU 63. You can also use it as Furthermore, in the first embodiment, it is set in advance at the design stage of the management IC 66 that the 15th buffer 122o of the input port 121 in the management side I/F 111 corresponds to the setting value update signal. However, the present invention is not limited to this, and the management IC 66 recognizes that the fifteenth buffer 122o corresponds to the setting value update signal by transmitting a type identification command from the main CPU 63. It may also be a configuration. In this case, there is no need to previously set in the management IC 66 the correspondence between each of the buffers 122a to 122p and the types of signals input to those buffers 122a to 122p.

(31) In the first to fourteenth embodiments described above, the management IC 66 may be configured to send a normal operation signal to the main CPU 63 when it is operating normally. In this case, it becomes possible for the main CPU 63 to monitor whether the management IC 66 is operating normally.

(32) The display device that displays the setting value that is being updated in the setting value update process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41, It may also be a dedicated display device. Further, the display device that displays the setting value in the setting confirmation process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41, or a dedicated display device. It may be.

(33) The operation unit operated to update the setting value in the setting value update process is not limited to the update button 68b, and may be the reset button 68c. Further, when a setting key is inserted into the setting key insertion portion 68a and a turning operation is performed, positions corresponding to "Setting 1" to "Setting 6" are set as the rotation operation positions, and the setting key is inserted. A configuration may be adopted in which a setting value corresponding to the rotation operation position of the portion 68a is set. In addition, the setting key insertion part 68a is configured to be able to be rotated further than the ON position, and each time a rotation operation beyond the ON position is performed, the setting value in the middle of updating is changed to the setting value in the next order. The configuration may be updated.

(34) In the first to tenth and fifteenth to twenty-first embodiments, the first to third notification display devices 69a to 69c are arranged horizontally, but they are not arranged vertically. It may be possible to have a structure in which there are two layers, a structure in which they are arranged diagonally in parallel, or a structure in which they are arranged in two rows, one above the other. Further, in the eleventh to fourteenth embodiments, the first to fourth notification display devices 201 to 204 are arranged horizontally, but they may also be arranged vertically, or diagonally. They may be arranged in parallel, or they may be arranged in two rows, one above the other. Further, in the fifteenth to twenty-first embodiments, the first to fourth notification display devices 201 to 204 may be used as display devices for displaying the management results of game history.

(35) In the first to fourteenth embodiments, history information (hereinafter referred to as history information subject to fluctuation) used to calculate parameters whose normal values will fluctuate depending on the setting state of the pachinko machine 10. ) and history information used to calculate parameters whose normal values do not change depending on the setting state of the pachinko machine 10 (hereinafter referred to as non-variable history information) are located in different areas in the history memory 117. The configuration may be such that the information is stored in . In this case, when the setting state of the pachinko machine 10 is newly set or when the setting state of the pachinko machine 10 is changed, the area in the history memory 117 where the history information to be changed is stored is "0". On the other hand, the area in the history memory 117 where history information that does not change is stored may be cleared to "0" and may not be cleared. This makes it possible to accurately calculate parameters whose normal values vary depending on the setting state of the pachinko machine 10 even after changing the setting values, and also prevent the normal values from varying depending on the setting state of the pachinko machine 10. The accuracy of parameter calculation can be improved. Further, the configuration may be applied to the fifteenth to twenty-first embodiments described above.

(36) In the fifteenth to twenty-first embodiments, the stack area 222 for specific control and the stack area 224 for non-specific control may not be specified in advance in the main RAM 65. Even in this case, areas corresponding to these stack areas 222 and 224 will be designated as the main side RAM 65 at the design stage of the pachinko machine 10, but if the area is designated in excess of its storage capacity. When the information storage process is executed, information that is not originally planned will be written in an area that is not originally planned, so the configuration may be such that the main RAM 65 is cleared to "0".

(37) In the fifteenth to twenty-first embodiments described above, when the main side RAM 65 clearing process (step S105, step S117) is executed, the work area 221 for specific control and the stack area 222 for specific control are The work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to 0, but the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to 0. In step S117), not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". . In addition, in the clearing process of the main side RAM 65 (step S105, step S117), not only the work area 221 for specific control and the stack area 222 for specific control, but also the normal counter area 231, the counter area 232 for opening/closing execution mode, and the high frequency Although the support mode counter area 233 is cleared to "0", the calculation result storage area 234 may not be cleared to "0". In this case, it becomes possible to protect the information stored in the calculation result storage area 234.

(38) In the fifteenth to twenty-fifth embodiments described above, the operation for clearing the work area 221 for specific control and the stack area 222 for specific control to “0” and the work area 223 for non-specific control and the The configuration may be such that the operation for clearing the specific control stack area 224 to "0" is a different operation. For example, when the supply of operating power to the pachinko machine 10 is started while operating the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0", and the update button 68b is pressed. When the supply of operating power to the pachinko machine 10 is started while the pachinko machine 10 is being operated, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". This makes it possible to selectively erase each piece of information. In addition, in this configuration, when the supply of operating power to the pachinko machine 10 is started while operating both the update button 68b and the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control , the work area 223 for non-specific control, and the stack area 224 for non-specific control may all be cleared to "0". This makes it possible to improve work efficiency when erasing information in each area 221 to 224 all at once in the configuration that allows selective erasure as described above.

(39) In the 15th to 18th and 20th embodiments, as in the 19th embodiment, when starting the process corresponding to non-specific control, the information of the stack pointer of the main CPU 63 is set to the workpiece for non-specific control. The information may be saved to the area 223 and the saved information may be returned to the stack pointer of the main CPU 63 when returning to the process corresponding to the specific control. As a result, even if the stack pointer information of the main CPU 63 is configured to fluctuate when processing corresponding to non-specific control is started, when processing corresponding to non-specific control ends, the main CPU 63 It becomes possible to restore the state of the stack pointer of the CPU 63 to the state before the processing corresponding to the non-specific control was started.

(40) In the fifteenth to twenty-fifth embodiments, processing for collecting gaming history information as processing corresponding to non-specific control, processing for calculating various parameters using the collected history information, and The configuration is such that processing for notifying calculation results is executed, but only part of these processes is executed as processing corresponding to non-specific control, and the rest is executed as processing corresponding to specific control. You can also use it as Additionally, in addition to or in place of the processing for collecting game history information, the processing for calculating various parameters using the collected history information, and the processing for notifying the calculation results, processing other than these processing may be performed. The configuration may be such that the process is executed as a process corresponding to non-specific control. For example, a configuration may be adopted in which at least one of fraud monitoring and notification of monitoring results is executed as a process corresponding to non-specific control.

(41) In the fifteenth to twenty-fifth embodiments, when the main CPU 63 returns to the process corresponding to specific control from the situation where the process corresponding to non-specific control is being executed, the flag register of the main CPU 63, Although the configuration is such that neither the stack pointer nor the various registers are saved to the main RAM 65, instead of this, the processing corresponding to specific control can be changed from the situation where the main CPU 63 is executing processing corresponding to non-specific control. When returning, at least some information among the flag register, stack pointer, and various registers of the main CPU 63 is saved to the main RAM 65, and the process corresponding to the non-specific control is started again using the saved information. In such a case, the configuration may be such that the data is returned to the corresponding storage area of the main CPU 63. This makes it possible to carry over and use the information of the main CPU 63 used in processing corresponding to non-specific control.

(42) In the fifteenth to twenty-fifth embodiments described above, various parameters are calculated when the total number of game balls ejected from the gaming area reaches 6000. The total number of game balls may be more or less than 6000. For example, various parameters may be calculated when the total number of game balls ejected from the game area reaches 60,000. In this case, the storage capacity required to store the game history information will increase, but as in the twenty-first embodiment, the game history information is stored in the management RAM 241 externally attached to the MPU 62. By having a storage configuration, it becomes possible to flexibly respond to an increase in the storage capacity.

(43) In the fifteenth to twenty-fifth embodiments, the 61st to 68th parameters are calculated as the gaming history management results, but in addition to or in place of this, the 31st to 68th parameters in the first embodiment are The configuration may be such that at least some of the parameters, the 41st parameter, and the 42nd parameter are calculated.

(44) In the fifteenth to twenty-fifth embodiments, when the process of newly setting the setting state of the pachinko machine 10 is executed, or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control In addition, not only the stack area 222 for specific control, but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". In this case, when the process of newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the normal counter area 231, the opening/closing execution mode counter area 232, the high frequency The support mode counter area 233 and the calculation result storage area 234 are cleared to "0".

In addition, when processing to newly set the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, not only the work area 221 for specific control and the stack area 222 for specific control Although the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233 are cleared to "0", the calculation result storage area 234 may not be cleared to "0". In this case, it becomes possible to protect the information stored in the calculation result storage area 234.

In addition, when a process to newly set the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control and the stack area 222 for specific control are set to "0". ''Although the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to ``0'', the configuration may be such that they are not cleared. In this case, it becomes possible to protect the information stored in the work area 223 for non-specific control and the stack area 224 for non-specific control.

In addition, when the above configuration (43) is provided, when the process of newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the above-mentioned first Although the history information for calculating the 31st parameter, 41st parameter, and 42nd parameter in the embodiment is deleted, the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 And the calculation result storage area 234 may be configured not to be cleared to "0".

(45) In the first to twenty-fifth embodiments, instead of the configuration in which the total number of game balls discharged from the game area PA is used to calculate various parameters, the total number of game balls supplied to the game area PA is used. A configuration may be adopted in which the total number of game balls supplied is used. In this case, for example, a detection sensor is provided to detect a game ball that has been fired from the game ball launch mechanism 27 and has reached the game area PA, and based on the detection result of the detection sensor, the number of game balls supplied to the game area PA is It may also be configured to count the number of pieces. In this configuration, since it is not necessary to measure the number of game balls discharged from the outlet 24a, a configuration may be adopted in which the outlet detection sensor 48a is not provided.

(46) In the fifteenth to twenty-fifth embodiments, at least part of the information of various registers and stack pointers of the main CPU 63 is stored in the stack area 222 for specific control or the stack area 224 for non-specific control. It may also be configured to be saved by a load command. In this case, when saving information to the stack areas 222 and 224, it is necessary to update the information of the stack pointer of the main CPU 63. Alternatively, the information saved in the stack areas 222 and 224 may be returned to the corresponding storage area of the main CPU 63 by a load command. In this case as well, when information is returned from the stack areas 222 and 224, it is necessary to update the information in the stack pointer of the main CPU 63.

(47) In each of the above embodiments, when the setting value update process is being executed, a corresponding notification may be provided to any of the symbol display device 41, the display light emitting unit 53, and the speaker unit 54. This makes it possible for the game hall manager to clearly understand that the setting value update process is being executed.

(48) In each of the embodiments described above, a history of new setting values may be stored in the main RAM 65. Further, a configuration may be adopted in which a history of new setting values is stored in a RAM provided in the audio emission control device 81. In this case, each time the setting value update process is completed, a command including information on the setting value set in the setting value update process is sent from the main side CPU 63 to the audio emission control device 81, and the audio emission control device 81 is configured to cumulatively store information indicating that a setting value has been newly set and information indicating the setting value at that time in the RAM of the audio emission control device 81 each time the command is received. In this configuration, when a predetermined operation is performed, the setting history of the setting values cumulatively stored in the RAM of the sound emission control device 81 may be displayed on the symbol display device 41.

(49) In each of the above embodiments, when the setting value is newly set in the setting value update process, the information indicating the number of game balls to be put out stored in the payout control device 77 is not deleted. However, instead of this, the information indicating the number of game balls to be paid out may be deleted. In addition, if the setting value update process is executed but the setting value is not changed, the information indicating the number of game balls scheduled to be paid out will not be deleted, and if the setting value is changed, the information indicating the number of game balls scheduled to be paid out will not be deleted. The information indicating the number of game balls may be deleted.

(50) In each of the above embodiments, if the setting value update process is executed but the setting value is not changed, each area 221 to 224 of the main side RAM 65 will not be cleared to "0" and the setting value will be changed. When changed, at least a portion of each area 221 to 224 of the main side RAM 65 may be cleared to "0". For example, when a setting value is changed, areas other than the setting value counter in the specific control work area 221 may be cleared to "0".

(51) In the twenty-second to twenty-fifth embodiments, even if the main CPU 63 is executing the process for confirming the setting value in the setting confirmation process (FIG. 87), it will not affect the profit of the game. A configuration may also be adopted in which the motion of the movable object involved continues. For example, in the opening/closing execution mode, the ball entering means that can enter the ball is provided with a V zone and a non-V zone, and the game ball that enters the ball entering means is distributed to either the V zone or the non-V zone. In a configuration including a distribution member, the operation of the distribution member may be continued even when a process for confirming a setting value is being executed in a setting confirmation process. In this case, even if an attempt is made to stop the operation of the distributing member by illegally causing a situation in which a process for confirming the setting value is executed in the setting confirmation process, it becomes impossible. In addition to the above-mentioned distribution member, movable objects that continue to operate even when the process for confirming the set value is executed in the setting confirmation process include the ball entering means. A game ball is provided in either an advantageous hole that causes a round game after the game ball enters, and a discharge port that discharges the game ball that has entered the ball entry means without allowing it to enter the advantageous hole. A distribution member that distributes the information can be considered.

(52) In the twenty-second to twenty-fifth embodiments, at least one of the work area 223 for non-specific control and the stack area 224 for non-specific control may be configured not to be monitored for information abnormality. In this case, even if it is identified that an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area for non-specific control 224 is not cleared to "0" to prevent a situation in which the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" based on the occurrence of an information error. It becomes possible to do so.

(53) In the twenty-second to twenty-fifth embodiments, an information abnormality occurs in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. A configuration may be adopted in which all monitoring to determine whether or not the occurrence of such occurrence is performed in a process corresponding to non-specific control. Further, a configuration may be adopted in which the processing for clearing each of the areas 221 to 224 to "0" when an information abnormality occurs is all performed by processing corresponding to non-specific control.

(54) In each of the above embodiments, the main side RAM 65 requires power supply to store and retain information, and backup power is not supplied to the main side RAM 65 even when the power of the pachinko machine 10 is OFF. However, the main RAM 65 may be a nonvolatile memory that does not require power supply to store and retain information.

(55) In each of the above embodiments, in the various clearing processes of the main side RAM 65, the target area of the main side RAM 65 is initialized by executing a process of clearing it to "0" and a process of initializing it. Alternatively, the target area may be initialized by performing an initial setting process without performing a "0" clearing process.

(56) In each of the above embodiments, if the setting key insertion section 68a is turned on when the supply of operating power to the main CPU 63 is started, the setting value update process is executed without requiring any other operation. It is also possible to have a configuration in which Furthermore, instead of the setting key insertion section 68a that is turned on and off by a setting key, a setting switch that can be turned on and off directly by hand may be provided. Further, if the setting key insertion part 68a is not provided and the reset button 68c is pressed when the supply of operating power to the main CPU 63 is started, the setting value is reset without requiring any other operation. A configuration may also be used in which update processing is executed. In this case, a structure may be provided in which a cover member is provided so that the reset button 68c can be switched between a closed state that covers it and an open state that does not cover it, and a locking device that locks this cover member in the closed state position. It is also possible to have a configuration in which

(57) A configuration in which the currently selected setting value is determined and the setting value updating process ends when the setting key insertion section 68a is maintained in the OFF position for a predetermined period in the setting value updating process. You can also use it as Furthermore, if a termination reference period (for example, 5 minutes) has elapsed since the setting value update process was started, the currently selected setting value is automatically determined and the setting value update process is ended. Furthermore, in the setting value update process, if the update button 68b or the reset button 68c is held down for longer than the termination reference period (for example, 10 seconds), the selected setting value is confirmed and the setting value update process is ended. It may also be a configuration.

(58) The setting key insertion part 68a is configured to be able to be rotated further than the ON position, and each time the rotation operation beyond the ON position is performed, the setting value in the middle of updating is changed to the setting value in the next order. In the configuration updated to , when the supply of operating power to the main CPU 63 is started in a situation where the setting key insertion part 68a is operated to the ON position, a setting confirmation process that enables confirmation of the setting value is started. The setting confirmation process may be terminated when the setting key insertion section 68a is operated to the OFF position. In addition, when the supply of operating power to the main CPU 63 is started in a situation where the update button 68b or the reset button 68c is pressed, a setting confirmation process that allows confirmation of the setting value is started, and the button is pressed. The setting confirmation process may be configured to end when the pressing operation is released. In addition, in a configuration in which a setting switch that is directly operated on and off by hand is provided instead of the setting key insertion part 68a that is operated on and off by the setting key, when the setting switch is turned on and off, the main When the supply of operating power to the side CPU 63 is started, a setting confirmation process that enables confirmation of the setting value is started, and when the setting switch is turned OFF or turned ON after the OFF operation. A configuration may be adopted in which the setting confirmation process is ended. In addition, in a configuration in which a setting switch that is directly operated on and off by hand is provided instead of the setting key insertion part 68a that is operated on and off by the setting key, when the setting switch is turned on and off, the main The configuration is such that when the supply of operating power to the side CPU 63 is started, a setting confirmation process that enables confirmation of the setting value is started, and when the reset button 68c is pressed, the setting confirmation process is ended. Good too.

(59) Instead of the configuration in which the display control device 82 is controlled by the audio emission control device 81 based on the command sent from the main control device 60, the display control device 82 is controlled based on the command sent from the main control device 60. A configuration may be adopted in which the device 82 controls the audio emission control device 81. Further, instead of the configuration in which the audio emission control device 81 and the display control device 82 are provided separately, a configuration in which both control devices are provided as one control device may be used, and the function of one of the two control devices may be may be integrated into the main control device 60, or both functions of these two control devices may be integrated into the main control device 60. Furthermore, the configuration of the commands sent from the main control device 60 to the audio emission control device 81 and the configuration of the commands sent from the audio emission control device 81 to the display control device 82 are also arbitrary.

(60) Other types of pachinko machines different from the above embodiments, such as pachinko machines in which an electric accessory is released a predetermined number of times when a game ball enters a specific area of a special device, or a game ball that opens a game ball in a specific area of a special device. The present invention can also be applied to game machines such as a pachinko machine in which a jackpot is generated when a ball is entered, a pachinko machine equipped with other accessories, an arranged ball machine, and a mahjong ball machine.

In addition, non-pinball type game machines, for example, are equipped with multiple reels with multiple types of symbols attached in the circumferential direction, and rotation of the reels is started by inserting a medal and operating a start lever, and a stop switch is operated. After the reels have stopped after a predetermined period of time has elapsed, if a specific symbol or a specific symbol combination is established on the active line that can be seen from the display window, the player is given benefits such as a payout of medals, etc. The present invention can also be applied to slot machines.

In addition, the game machine main body, which is supported by the outer frame in an openable and closable manner, is equipped with a storage section and a retrieval device, and the start lever is operated after a predetermined number of game balls stored in the storage section are retrieved by the retrieval device. The present invention can also be applied to a gaming machine that is a combination of a pachinko machine and a slot machine, which starts the rotation of the reels by doing so.

When the present invention is applied to a slot machine or a gaming machine that is a combination of a pachinko machine and a slot machine, for example, when a game is started based on the operation of a start lever, the results of the lottery processing of the winning combinations executed are recorded as history information. It may also be configured to store it as history information and use that history information to calculate the actual winning probability for each role.When a transition to a special game state such as a bonus game occurs, it is stored as history information and the history information is stored as history information. The configuration may be such that the actual transition probability to the special gaming state is calculated using the information, or the ratio of the number of games staying in the special gaming state to the total number of games played may be calculated. The history information and various parameters may be readable by an external device, or the gaming machine itself may provide notifications corresponding to the calculation results of the various parameters. Furthermore, a configuration may be adopted in which there are multiple setting states such as "Setting 1" to "Setting 6", and the probability of winning in the winning combination processing is varied depending on the setting state. In this case, the configurations in each of the above embodiments may be applied regarding handling of history information, calculation of various parameters, and handling of repeated changes when a setting state setting is newly set or a setting value is changed. .

(61) The characteristic configurations of the first to thirty-fourth embodiments may be mutually applied in any combination. For example, the characteristic configuration of the first embodiment, the characteristic configuration of the sixth embodiment, the characteristic configuration of the tenth embodiment, and the characteristic configuration of the thirtieth embodiment. The characteristic configuration of the second embodiment, the characteristic configuration of the fourth embodiment, the characteristic configuration of the eighth embodiment, and the eleventh embodiment may be combined. The characteristic configuration of the embodiment described above and the characteristic configuration of the thirty-third embodiment described above may be combined, and the characteristic configuration of the first embodiment described above and the characteristic configuration of the fifteenth embodiment described above may be combined. The characteristic configuration of the twenty-first embodiment, the characteristic configuration of the twenty-ninth embodiment, and the characteristic configuration of the thirty-fourth embodiment may be combined. The characteristic configuration of the second embodiment, the characteristic configuration of the sixteenth embodiment, and the characteristic configuration of the twenty-second embodiment may be combined. Further, to the configuration in which the characteristic configurations of the first to 34th embodiments are applied in a predetermined combination, the configurations of the other embodiments described above may be applied in any combination.

<About the invention group extracted from each of the above embodiments>
Hereinafter, the features of the invention group extracted from each of the embodiments described above will be explained, showing effects etc. as necessary. In the following, for ease of understanding, structures corresponding to each of the above embodiments are indicated in parentheses as appropriate, but the present invention is not limited to the specific structures shown in parentheses.

<Characteristics Group A>
Feature A1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
information erasing means (third In the embodiment, the function of executing the process of step S1809 in the management CPU 112, in the fifth embodiment, the function of executing the process of step S2109 in the management CPU 112, and in the sixth embodiment, the function of executing the process of step S2109 in the management CPU 112. (a function to execute the process in step S2308, in the eighth embodiment, a function to execute the process in step S2608 in the management CPU 112);
A gaming machine characterized by comprising:

According to feature A1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, at least a portion of the history information stored in the history storage means is erased on at least one condition that a setting value to be used has been newly set. This makes it possible to adjust the contents of the history storage means so that the frequency of occurrence of predetermined events can be appropriately managed in the situation after a new setting of the setting value to be used is performed. .

Feature A2. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The gaming machine according to feature A1, wherein the probability of obtaining the award corresponding result in the award determination varies depending on the set value.

According to feature A2, in a so-called pachinko machine, it is possible to vary the probability of a grant corresponding result depending on a set value. In this case, by having the configuration of feature A1 above, the history storage means can be used to appropriately manage the frequency of occurrence of a predetermined event in a situation after the probability of the assignment response result is changed. It becomes possible to adjust the content.

Feature A3. The information erasing means erases all of the history information stored in the history storage means on at least one condition that the setting value to be used has been set by the setting means. The gaming machine according to feature A1 or A2.

According to feature A3, when a setting value to be used is newly set, all the history information stored in the history storage means is deleted, so that the setting value to be used is changed. It becomes possible to specify the frequency of occurrence of a predetermined event based on the timing when the event is newly performed.

Feature A4. The information erasing means erases some of the history information stored in the history storage means, with at least one condition being that the setting value to be used has been set by the setting means, The gaming machine according to feature A1 or A2, characterized in that part of the history information stored in the history storage means is retained.

According to feature A4, when a setting value to be used is newly set, history information that is unnecessary for the subsequent management of the occurrence frequency of a predetermined event is deleted, and the history information that is unnecessary for the subsequent management of the occurrence frequency of the predetermined event is It becomes possible to leave necessary history information. This makes it possible to suitably manage the frequency of occurrence of a predetermined event after the setting value to be used is newly set.

Feature A5. The history information stored in the history storage means includes first history information (history indicating that the opening/closing execution mode has occurred) in which the probability of occurrence of the predetermined event corresponding to the history information varies according to the set value; information) and second history information (history information indicating that a game ball has been ejected from the game area PA) that does not change according to the setting value,
The information erasing means erases the first history information stored in the history storage means on at least one condition that the setting value to be used has been set by the setting means, and The gaming machine according to feature A4, characterized in that the second history information stored in the history storage means is left.

According to feature A5, when a new set value is set to be used, the first history information corresponding to a predetermined event whose occurrence probability changes according to the set value is deleted, and the occurrence probability is changed to the set value. The second history information corresponding to a predetermined event that does not change depending on the event is not deleted. As a result, when the first history information before the setting value to be used is newly set is carried over after the setting value is newly set, a predetermined event corresponding to the first history information occurs. The first history information that is undesirable for specifying the frequency can be deleted when the setting value is newly set. On the other hand, the second history information is not deleted even if the setting value to be used is newly set, so that it can be referred to when specifying the frequency of occurrence of a predetermined event corresponding to the second history information. Since it is possible to secure a large amount of second history information, it is possible to accurately identify the frequency of occurrence of a predetermined event corresponding to the second history information.

Feature A6. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The configuration is such that the probability that the granting result will be the granting result in the granting determination varies depending on the set value,
The first history information includes information corresponding to the award of the benefit,
The gaming machine according to feature A5, wherein the second history information includes information corresponding to game balls being ejected from the gaming area in a predetermined manner.

According to feature A6, since the probability of granting a benefit varies depending on the setting value, the first history information should be deleted when the setting value to be used is newly set. This makes it possible to specify the frequency of granting benefits under the newly set setting value. On the other hand, since the frequency at which game balls are ejected from the gaming area does not change depending on the setting value, the second history information is not deleted even if the setting value to be used is newly set. It becomes possible to accurately specify the frequency at which game balls are ejected from the game area in a predetermined manner.

Feature A7. The information erasing means deletes at least one of the history information when the setting value to be used is set by the setting means and a predetermined amount or more of the history information is stored in the history storage means. The gaming machine according to any one of features A1 to A6, wherein a part of the gaming machine is erased.

According to feature A7, if a predetermined amount or more of predetermined history information is not stored in the history storage means, the history information is not deleted even if a new set value to be used is set. This makes it possible to prevent history information from being repeatedly erased from the history storage means even if new setting values are repeatedly set in a situation where no game is played.

Feature A8. With at least one condition that the setting value to be used is set by the setting means, the history information stored in the history storage means is used to respond to the gaming results in a predetermined period. information derivation means (in the third embodiment, the function of executing the process of step S1807 in the management side CPU 112; in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112). The gaming machine according to any one of features A1 to A7.

According to feature A8, having the configuration of feature A1 above, at least a part of the history information stored in the history storage means is stored on at least one condition that a new setting value to be used has been set. In the configuration to be deleted, a mode in which the history information stored in the history storage means is used to correspond to the gaming results in a predetermined period when a new setting value to be used is set. Information is derived. As a result, even if at least part of the history information is erased when the setting value is changed, it is possible to grasp the management results of gaming history such as the frequency of occurrence of specified events in the situation before the setting value was changed. It becomes possible to do so.

Feature A9. The gaming machine according to feature A8, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to feature A9, when a new set value to be used is set, the history information stored in the history storage means is used to generate mode information corresponding to the result of a game in a predetermined period. When the form information is derived, the form information is stored in the form information storage means. Thereby, even if the setting value is changed, it becomes possible to grasp the management result of the gaming history in the situation before the setting value was changed at any subsequent timing.

Feature A10. The gaming machine according to feature A9, wherein the aspect information storage means is capable of storing a plurality of pieces of the aspect information.

According to feature A10, since it is possible to store a plurality of pieces of mode information in the mode information storage means, it is possible to grasp the management results of gaming history over a plurality of periods based on the timing when a new setting value is set. It becomes possible to do so. Furthermore, even if new setting values are repeatedly set in a situation where no game is being played, the mode information derived using the history information of the situation where a game is actually being played is retained in the mode information storage means. This makes it possible to increase the possibility that the

Feature A11. The mode information storage means is capable of storing a predetermined number of the mode information,
This gaming machine includes a means (in the third embodiment, a means for executing special processing in the management side CPU 112) when the setting value to be used is set by the setting means more than the predetermined number of times under predetermined conditions. The gaming machine according to feature A9 or A10, characterized in that the gaming machine is equipped with a function of executing repeated change monitoring processing (in the fourth embodiment, a function of executing repeated change monitoring processing in the main CPU 63).

According to feature A11, in order to prevent the mode information derived using the history information of the situation where the game is actually being played from remaining in the mode information storage means, the set value is set in a situation where no game is played. If a new setting is repeated, special processing is performed for it. This makes it possible to deal with the act.

Feature A12. The gaming machine according to any one of features A8 to A11, wherein the information derivation means derives the mode information when a predetermined amount or more of the history information is stored in the history storage means. .

According to feature A12, mode information is derived when a predetermined amount or more of predetermined history information is stored in the history storage means, so it is possible to prevent mode information from being derived in vain. .

Feature A13. The information erasing means erases the history information from when the setting value to be used is set by the setting means until a predetermined amount of the history information is stored in the history storage means. If a specified amount or more of the history information is stored in the history storage means after the setting value to be used is set by the setting means, before the setting value is set. The gaming machine according to any one of features A1 to A12, characterized in that the history information stored in the history storage means is deleted.

According to feature A13, until a specific amount of predetermined history information is newly stored in the history storage means, even if a new setting is made for the setting value to be used, the setting is not stored before the setting is made. The history information that was previously saved will not be deleted. This makes it possible to specify the gaming history management results for a predetermined period even if new settings are made.

Feature A14. The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192),
The history storage execution means includes:
If the predetermined event occurs during a predetermined period from when the setting value to be used is set by the setting means until the cancellation condition is satisfied, the corresponding history information is stored in the first history storage means and A means for storing in both the second history storage means (a function for executing the process of step S2604 in the management CPU 112);
When the predetermined event occurs during a period other than the predetermined period, means for storing the corresponding history information in the side of the first history storage means and the second history storage means that is set as a storage target. (Function to execute the process of step S2603 in the management CPU 112);
Equipped with
The information erasing means erases the history information stored in the side of the first history storage means and the second history storage means that was previously set as the storage target when the cancellation condition is satisfied. The gaming machine according to any one of features A1 to A13.

According to feature A14, until a specific amount of history information is newly stored in the history storage means, even if a new setting value for use is made, the setting value is not stored before the new setting is made. History information will not be deleted. This makes it possible to specify the gaming history management results for a predetermined period even if new settings are made. Furthermore, this effect can be produced simply by appropriately changing the history storage means for storing history information between the first history storage means and the second history storage means.

Feature A15. Deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the side of the first history storage means and the second history storage means that is set as the storage target. The gaming machine according to feature A14, further comprising information deriving means (a function of executing the process of step S2703 in the management CPU 112).

According to feature A15, even if the history information is stored in both the first history storage means and the second history storage means due to a new setting of the setting value, the mode in which the history information is used is It becomes possible to derive information appropriately.

Note that for the configuration of features A1 to A15, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics Group B>
Feature B1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
Equipped with
The predetermined history information stored in the history storage means before the setting value to be used is set by the setting means is set as the setting value to be used by the setting means. A game machine characterized in that the history is stored and retained in the history storage means even after the game is played.

According to feature B1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, even if the setting value to be used is newly set, the history information stored in the history storage means is not deleted but is stored and retained. As a result, even if the setting value to be used is set, the history information up to that point can be continuously stored in the history storage means, and the history information will not be accumulated in the history storage means over a long period of time. It becomes possible to specify the management results of the game history using the history information obtained.

Feature B2. When the setting value to be used is set by the setting means, the history storage execution means stores the corresponding history information in the history storage means (first storage execution means at the time of setting). In the embodiment, the game according to feature B1 is provided with a function of executing the process of step S1307 in the management side CPU 112, and a function of executing the process of step S2408 in the management side CPU 112 in the seventh embodiment. Machine.

According to feature B2, in a configuration in which history information is not deleted and is stored and retained even if a setting value to be used is newly set, the setting value to be used is newly set. History information corresponding to this is stored in the history storage means. This makes it possible to distinguish between history information before a new setting of the setting value to be used and history information after the setting is made.

Feature B3. When the setting value to be used is set by the setting means, the storage execution means at the time of setting causes the history storage means to store information corresponding to the set value as the history information. The gaming machine according to feature B2.

According to feature B3, by referring to history information, it is possible to specify the contents of setting values set in the past.

Feature B4. The history storage means includes a plurality of correspondence history storage means (history memories 181 to 186 for settings 1 to 6) corresponding to each of the plurality of types of setting values that can be set by the setting means. The gaming machine according to any one of features B1 to B3.

According to feature B4, since the correspondence history storage means is provided corresponding to each setting value, it is possible to store history information separately for each setting value.

Feature B5. When the setting value to be used is set by the setting means, means for making the correspondence history storage means corresponding to the setting value for which the setting is to be stored for the subsequent history information (management side The gaming machine according to feature B4, further comprising a function of executing the process of step S2406 in the CPU 112.

According to feature B5, when a setting value to be used is newly set, the correspondence history storage means corresponding to that setting value is to be stored for subsequent history information, so that It becomes possible to distinguish and store history information.

Feature B6. Information derivation means (display output processing in the management side CPU 112 The gaming machine according to feature B5, characterized in that the gaming machine is equipped with a function of executing the following functions.

According to feature B6, in a configuration where history information is stored separately for each setting value, it is possible to derive mode information corresponding to the currently set setting value.

Feature B7. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The gaming machine according to any one of features B1 to B6, wherein the probability of the award corresponding result in the award determination varies depending on the set value.

According to feature B7, in a so-called pachinko machine, it is possible to vary the probability of a grant corresponding result depending on a set value.

Note that for the configuration of features B1 to B7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature C group>
Feature C1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
post-setting response means for not erasing the history information until at least a predetermined amount of the history information is stored in the history storage means after the setting value to be used is set by the setting means; (Function to execute the processing of step S2506 and steps S2605 to S2609 in the management CPU 112),
A game machine characterized by comprising:

According to feature C1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, until a specific amount of predetermined history information is newly stored in the history storage means, even if a new setting is made for the setting value to be used, it will not be stored before the setting is made. History information will not be deleted. This makes it possible to specify the gaming history management results for a predetermined period even if new settings are made.

Feature C2. The post-setting response means sets the setting value when a predetermined amount of the history information is stored in the history storage means in excess of the specified amount after the setting value to be used is set by the setting means. The gaming machine according to feature C1, characterized in that the history information stored in the history storage means is deleted before the above is performed.

According to feature C2, when a specific amount of history information is stored in the history storage means that makes it possible to specify the gaming history management results for a predetermined period after a new setting value is set. In this case, the history information stored in the history storage means is erased before the new settings are made. This makes it possible to prevent useless history information from being continuously stored in the history storage means.

Feature C3. The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192),
The history storage execution means includes:
When the predetermined event occurs, means for storing the corresponding history information in the first history storage means and the second history storage means that are set to be stored (step S2603 in the management CPU 112) function) and
After the setting value to be used is set by the setting means, the predetermined history information is stored in the side of the first history storage means and the second history storage means that is not set as the storage target. Means for storing the history information corresponding to the occurrence of the predetermined event in both the first history storage means and the second history storage means (management CPU 112) until the specified amount or more is stored. function of executing the process of step S2604);
Equipped with
The post-setting response means are:
After the setting value to be used is set by the setting means, the predetermined history information is stored in the side of the first history storage means and the second history storage means that is not set as the storage target. means for changing the storage target between the first history storage means and the second history storage means (a function of executing the process of step S2607 in the management CPU 112) when the specified amount or more is stored;
After the setting value to be used is set by the setting means, the predetermined history information is stored in the side of the first history storage means and the second history storage means that is not set as the storage target. When the specified amount or more is stored, means for erasing the history information of the side that has been set as the storage target among the first history storage means and the second history storage means (step S2608 in the management CPU 112) function) and
The gaming machine according to feature C1 or C2, characterized by comprising:

According to feature C3, until a specific amount of history information is newly stored in the history storage means, even if a new setting of the setting value to be used is made, the setting value is not stored before the setting is made. History information will not be deleted. This makes it possible to specify the gaming history management results for a predetermined period even if new settings are made. Furthermore, this effect can be produced simply by appropriately changing the history storage means for storing history information between the first history storage means and the second history storage means.

Feature C4. Deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the side of the first history storage means and the second history storage means that is set as the storage target. The gaming machine according to feature C3, further comprising information deriving means (a function of executing the process of step S2703 in the management CPU 112).

According to feature C4, even if the history information is stored in both the first history storage means and the second history storage means due to a new setting of the setting value, the manner in which the history information is used is It becomes possible to derive information appropriately.

Feature C5. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The gaming machine according to any one of features C1 to C4, characterized in that the probability of obtaining the award corresponding result in the award determination varies depending on the set value.

According to feature C5, it is possible to vary the probability of a grant corresponding result in a so-called pachinko machine according to a set value.

Note that for the configuration of features C1 to C5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic group D>
Feature D1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Special execution means (in the third embodiment, monitoring of repeated changes in the management CPU 112 (a function to execute a process, a function to execute a repeated change monitoring process in the main CPU 63 in the fourth embodiment, a function to make a negative determination in step S2106 in the management CPU 112 in the fifth embodiment),
A gaming machine characterized by comprising:

According to feature D1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, the special process is executed with at least one condition that the new setting of the setting value to be used is executed in a special situation. This makes it possible to deal with a case where a new set value is set under an unfavorable situation.

Feature D2. Feature D1 characterized in that the special execution means executes the special processing on the condition that at least one condition is that setting of the setting value to be used by the setting means has been executed a specified number of times or more in the special situation. The gaming machine described in .

According to feature D2, even if a new setting of a setting value to be used is executed in a special situation, the special process is not executed if the number of executions is less than a specific number of times. This makes it possible to prevent special processing from being executed even when a regular worker sets a new set value less than a specific number of times in a special situation.

Feature D3. The special execution means is configured to determine, as the special situation, a situation in which no game is played after the setting value to be used is set by the setting means, or a setting of the setting value to be used by the setting means. In a situation where a game exceeding a predetermined standard has not been played since the execution of the special processing, the special processing is executed with at least one condition that the setting value to be used is set by the setting means. The gaming machine according to feature D1 or D2.

According to feature D3, special processing is executed when a new setting value to be used is made in a situation where a game is not being played or a game is not actually being played. If such an act occurs, it will be possible to deal with it.

Feature D4. The gaming machine according to any one of features D1 to D3, wherein the special execution means executes a notification process as the special process.

According to feature D4, the notification process is executed with at least one condition that a new setting of the setting value to be used is executed in a special situation. This makes it possible to prompt the user to take action when a new set value is set under an unfavorable situation.

Feature D5. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of a game. )and,
Responding to gaming results in a predetermined period using the history information stored in the history storage means, with at least one condition that the setting value to be used is set by the setting means. information deriving means (in the third embodiment, the function of executing the process of step S1807 in the management side CPU 112; in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112);
The gaming machine according to any one of features D1 to D4, characterized by comprising:

According to feature D5, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, when a new set value is set to be used, the history information stored in the history storage means is used to generate mode information corresponding to the gaming results in a predetermined period. derived. This makes it possible to grasp the management results of the game history, such as the frequency of occurrence of predetermined events in the situation before the setting value is changed.

Feature D6. The special execution means causes the information derivation means to derive the aspect information as the special processing, with at least one condition that the setting value to be used by the setting means is set in the special situation. The gaming machine according to feature D5, characterized in that the gaming machine does not allow users to perform.

According to feature D6, even if a new setting of a setting value to be used is made, if the setting is made in an unfavorable situation, mode information is not derived. This makes it possible to prevent aspect information from being derived in vain.

Feature D7. The gaming machine according to feature D5 or D6, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to feature D7, when a new setting value to be used is set, the history information stored in the history storage means is used to generate mode information corresponding to the result of a game in a predetermined period. When the form information is derived, the form information is stored in the form information storage means. Thereby, even if the setting value is changed, it becomes possible to grasp the management result of the gaming history in the situation before the setting value was changed at any subsequent timing.

Feature D8. The gaming machine according to feature D7, wherein the aspect information storage means is capable of storing a plurality of pieces of the aspect information.

According to feature D8, since it is possible to store a plurality of pieces of mode information in the mode information storage means, it is possible to grasp the management results of gaming history in a plurality of periods based on the timing when a new setting value is set. It becomes possible to do so. Furthermore, even if new setting values are repeatedly set in a situation where no game is being played, the mode information derived using the history information of the situation where a game is actually being played is retained in the mode information storage means. This makes it possible to increase the possibility that the

Feature D9. The mode information storage means is capable of storing a predetermined number of the mode information,
Feature D7 characterized in that the special execution means executes the special processing when the setting value to be used is set by the setting means more than the predetermined number of times in the special situation. Or the gaming machine described in D8.

According to feature D9, in order to prevent the mode information derived using the history information of the situation where the game is actually being played from remaining in the mode information storage means, the set value is set in a situation where no game is played. If a new setting is repeated, special processing is performed for it. This makes it possible to deal with the act.

Feature D10. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The gaming machine according to any one of features D1 to D9, wherein the probability of obtaining the award corresponding result in the award determination varies depending on the set value.

According to the feature D10, it is possible to vary the probability of a grant corresponding result in a so-called pachinko machine according to a set value.

Note that for the configuration of features D1 to D10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic group E>
Feature E1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
With at least one condition that the setting value to be used is set by the setting means, the history information stored in the history storage means is used to respond to the gaming results in a predetermined period. information derivation means (in the third embodiment, the function of executing the process of step S1807 in the management side CPU 112; in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112);
A gaming machine characterized by comprising:

According to feature E1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information.

In this case, when a new set value is set to be used, the history information stored in the history storage means is used to generate mode information corresponding to the gaming results in a predetermined period. derived. This makes it possible to grasp the management results of the game history, such as the frequency of occurrence of predetermined events in the situation before the setting value is changed.

Feature E2. The gaming machine according to feature E1, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to feature E2, when a new setting value to be used is set, the history information stored in the history storage means is used to generate mode information corresponding to the result of a game in a predetermined period. When the form information is derived, the form information is stored in the form information storage means. Thereby, even if the setting value is changed, it becomes possible to grasp the management result of the gaming history in the situation before the setting value was changed at any subsequent timing.

Feature E3. The gaming machine according to feature E2, wherein the aspect information storage means is capable of storing a plurality of pieces of the aspect information.

According to feature E3, since it is possible to store a plurality of pieces of mode information in the mode information storage means, it is possible to grasp the management results of gaming history over a plurality of periods based on the timing when a new setting value is set. It becomes possible to do so. Furthermore, even if new setting values are repeatedly set in a situation where no game is being played, the mode information derived using the history information of the situation where a game is actually being played is retained in the mode information storage means. This makes it possible to increase the possibility that the

Feature E4. The mode information storage means is capable of storing a predetermined number of the mode information,
This gaming machine includes a means (in the third embodiment, a means for executing special processing in the management side CPU 112) when the setting value to be used is set by the setting means more than the predetermined number of times under predetermined conditions. The gaming machine according to feature E2 or E3, characterized in that the gaming machine is equipped with a function of executing repeated change monitoring processing (in the fourth embodiment, a function of executing repeated change monitoring processing in the main CPU 63).

According to feature E4, in order to prevent the mode information derived using the history information of the situation where the game is actually being played from remaining in the mode information storage means, the set value is set in a situation where no game is played. If a new setting is repeated, special processing is performed for it. This makes it possible to deal with the act.

Feature E5. The gaming machine according to any one of features E1 to E4, wherein the information derivation means derives the mode information when a predetermined amount or more of the history information is stored in the history storage means. .

According to feature E5, mode information is derived when a predetermined amount or more of predetermined history information is stored in the history storage means, so it is possible to prevent mode information from being derived in vain. Become.

Feature E6. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. a function of executing the processing from S409 to S412);
The gaming machine according to any one of features E1 to E5, characterized in that the probability of obtaining the award corresponding result in the award determination varies depending on the set value.

According to feature E6, it is possible to vary the probability of a grant corresponding result in a so-called pachinko machine according to a set value.

Note that for the configuration of features E1 to E6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the inventions related to the above feature A group, the above feature B group, the above feature C group, the above feature D group, and the above feature E group, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this respect.

<Characteristic group F>
Feature F1. Ball entry means (first operating port 33, second operating port 34) into which game balls flowing down the gaming area can enter;
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) that acquires special information based on the game ball entering the ball entrance means;
an attachment determination means (a function of executing the processing of step S503 and step S504 in the main CPU 63) for determining whether or not the special information corresponds to the attachment information;
Based on the awarding result that the special information corresponds to the awarding information in the awarding determination, a privilege awarding means (steps in the main CPU 63) that awards a privilege (opening/closing execution mode) to the player. (a function to execute the processing from S409 to S412);
a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Equipped with
The grant determination means has a high probability mode and a low probability mode as the grant determination modes such that the probability of the grant corresponding result is relatively high or low,
A gaming machine characterized in that the probability of the award corresponding result changes at least in the low probability mode depending on the set value.

According to feature F1, it is possible to vary the probability of a grant corresponding result at least in the low probability mode in a so-called pachinko machine according to a set value. Thereby, even in a single gaming machine, it is possible to create an advantageous or disadvantageous situation with respect to the probability of a grant corresponding result in the low probability mode. Therefore, it is possible to improve the interest of the game.

Feature F2. The gaming machine according to feature F1, wherein the probability of the award corresponding result in the high probability mode does not vary depending on the set value.

According to feature F2, the probability of a grant-compatible result in low probability mode is changed according to the setting value, while the probability of a grant-compatible result in high probability mode is not changed according to the setting value. By doing so, it becomes possible to limit the influence of the setting value to the situation in the low probability mode.

Feature F3. There are multiple types of benefits,
The gaming machine according to feature F1 or F2, wherein the selection mode of the benefit does not vary depending on the setting value.

According to feature F3, the probability of receiving a corresponding result in low probability mode is changed according to the setting value, while the selection mode of benefits is not changed according to the setting value, thereby reducing the influence of the setting value. can be restricted to situations in low probability mode.

Note that for the configuration of features F1 to F3, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the above feature group F, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to improve the interest of the game, and there is still room for improvement in this respect.

<Feature G group>
Feature G1. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
Information deriving means (in the first embodiment, step S1402 to step S1412 in the management CPU 112 (in the third embodiment, the function to execute the process of step S1807 in the management CPU 112; in the fifth embodiment, the function to execute the process in step S2107 in the management CPU 112),
The information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to In the fourteenth embodiment, a first information display control means (a function for executing display processing in the management CPU 112) that controls the display of the first to fourth notification display devices 201 to 204);
A second information display control means (step S202 and step S208 in the main CPU 63 in the first to tenth embodiments) that controls the display of the information display means so that a display corresponding to another information different from the mode information is displayed In the 11th embodiment, the main CPU 63 performs steps S3101, S3103, and S3109. In the 12th embodiment, the main CPU 63 performs steps S3201, S3202, and S3204. and a function of executing the process of step S3210, a function of executing the abnormality display process in the main CPU 63 in the thirteenth embodiment),
A gaming machine characterized by comprising:

According to feature G1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, mode information corresponding to the results of the game in a predetermined period is derived using the history information stored in the history storage means. Then, a display corresponding to the aspect information is performed on the information display means. This makes it possible to grasp the gaming history management results, such as the frequency of occurrence of predetermined events. Further, in the information display means, not only a display corresponding to the mode information but also a display corresponding to other information is performed. This makes it possible to effectively utilize the information display means.

Feature G2. The feature G1 according to feature G1, characterized in that a period in which a display corresponding to the aspect information is displayed on the information display means and a period in which a display corresponding to the separate information is displayed on the information display means Game machine.

According to feature G2, by understanding the situation in which display is being performed on the information display means, it is possible to determine which of the display corresponding to mode information and the display corresponding to other information is being performed on the information display means. It becomes possible to specify.

Feature G3. The second information display control means displays the information corresponding to the separate information by controlling the display of the information display means so that the display mode is different from the display mode when the display corresponding to the mode information is displayed. The gaming machine according to feature G1 or G2, wherein

According to feature G3, by understanding the display mode of the information display means, it is possible to specify which of the display corresponding to the mode information and the display corresponding to different information is being performed on the information display means. It becomes possible.

Feature G4. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth In the embodiment, the gaming machine according to any one of features G1 to G3, characterized in that it includes a plurality of first to fourth notification display devices 201 to 204).

According to feature G4, by using a plurality of individual information display means to display a display corresponding to the mode information, it is possible to display a wide variety of mode information. In addition, the presence of multiple individual information display means makes it possible to make the display mode significantly different between when a display corresponding to mode information is displayed and when a display corresponding to different information is displayed. .

Feature G5. When causing a display corresponding to the separate information to be displayed, the second information display control means selects a predetermined individual information display means from among the plurality of individual information display means that does not go into a non-display state when a display corresponding to the aspect information is displayed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments; first notification display device 201 and second notification device in the eleventh and twelfth embodiments) Feature G4 characterized in that the display device 202 and the third notification display device 203 (in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are in a non-display state. The gaming machine described in .

According to feature G5, a predetermined individual information display means that does not go into a non-display state when a display corresponding to aspect information is performed becomes a non-display state when a display corresponding to another information is performed. As a result, simply by understanding the type of individual information display means that is in a hidden state, it is possible to clearly identify which of the display corresponding to mode information and the display corresponding to separate information is being performed. becomes possible.

Feature G6. When causing a display corresponding to the separate information to be displayed, the second information display control means selects a specific individual information display means (the second information display means) which is in a display state when displaying the aspect information among the plurality of individual information display means. In the first to tenth embodiments, the third notification display device 69c, in the eleventh and twelfth embodiments, the fourth notification display device 204, and in the thirteenth embodiment, the third notification display device 203 and the fourth notification device display device 204) in a display state,
The display content of the specific individual information display means when the display corresponding to the separate information is performed may be displayed on the specific individual information display means when the display corresponding to the aspect information is performed. The gaming machine according to feature G5.

According to feature G6, in a specific individual information display means, the display content that can be displayed when a display corresponding to aspect information is performed can also be displayed when a display corresponding to another information is performed, so that the aspect It becomes possible to avoid imposing restrictions on the display contents when displaying information corresponding to the information. Furthermore, even if the specific individual information display means has a configuration that can display the same display content, it will not be in a non-display state if it has the configuration of feature G5 above and a display corresponding to the mode information is performed. Since the predetermined individual information display means is in a non-display state when a display corresponding to another information is performed, it is possible to specify which of the plurality of individual information display means is being displayed.

Feature G7. The gaming machine according to feature G5 or G6, wherein the first information display control means puts each of the plurality of individual information display means into a display state when causing the display corresponding to the aspect information to be displayed.

According to feature G7, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state, so that the predetermined individual information display means corresponds to another information in which the predetermined individual information display means is in the non-display state. This makes it possible to clearly distinguish the display from the display.

Feature G8. The first information display control means sequentially changes the display of the aspect information on the information display means, and even when changing the display of the aspect information, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features G5 to G7, characterized in that the game machine is not maintained in the same state as above.

According to feature G8, when display corresponding to mode information is performed, the predetermined individual information display means is not maintained in a non-display state. As a result, regardless of the timing at which the plurality of individual information display means are checked, it is possible to specify which of the display corresponding to the mode information and the display corresponding to separate information is being performed on the plurality of individual information display means. becomes possible.

Feature G9. The second information display control means controls one specific individual information display means among the plurality of individual information display means (in the first to tenth embodiments, the third notification display device 69c, the eleventh, and the twelfth display devices). In the embodiment, any one of features G5 to G8 is characterized in that the fourth notification display device 204) displays a display corresponding to the separate information, and the remaining individual information display means is in a non-display state. The gaming machine described in (1) above.

According to feature G9, when a display corresponding to separate information is performed, only one individual information display means is in the display state, so it is easy to understand whether or not a display corresponding to separate information is being performed. Become.

Feature G10. The plurality of individual information display means are arranged in a predetermined direction,
The gaming machine according to feature G9, wherein the specific individual information display means is present at an end in the predetermined direction of the plurality of individual information display means arranged in the predetermined direction.

According to feature G10, since one individual information display means in which a display corresponding to separate information is displayed is located at an end in a predetermined direction, it is possible to determine whether or not a display corresponding to separate information is being performed. It becomes easier to do.

Feature G11. The first information display control means is a part of the plurality of individual information display means (in the first to tenth embodiments, the first notification display device 69a, the eleventh ~ In the fourteenth embodiment, a display corresponding to the type of the aspect information to be displayed is performed on the first notification display device 201 and the second notification display device 202), and a plurality of the individual information display means Individual information display means for displaying results (in the first to tenth embodiments, the second notification display device 69b and the third notification display device 69c; in the eleventh to fourteenth embodiments, the individual information display device 69b and the third notification display device 69c) A display corresponding to the content of the mode information to be displayed is performed on the third notification display device 203 and the fourth notification display device 204,
The gaming machine according to any one of features G5 to G10, wherein the predetermined individual information display means corresponds to the individual information display means for the type display target.

According to feature G11, when a display corresponding to aspect information is to be performed, a display corresponding to the type of aspect information to be displayed is performed on the individual information display means for the type display target, and an individual information display for the result display target is performed. The means performs a display corresponding to the content of the mode information to be displayed. This makes it easier to understand the mode information to be displayed. In this case, when the display corresponding to separate information is performed, the individual information display means for which the type is displayed is hidden, so the state in which the type display is hidden corresponds to the separate information. It will be easier to understand if separate information is displayed.

Feature G12. The information display means has a plurality of unit light emitting parts (display segments 201a to 201g, 202a to 202g), and performs a predetermined display by a combination of unit light emitting parts that are in a light emitting state among the plurality of unit light emitting parts. It is a configuration that allows
The second information display control means corresponds to the different information by setting a unit light emitting unit, which can be set in a light emitting state when a display corresponding to the mode information is displayed, among the plurality of unit light emitting parts, into a light emitting state. A combination of the unit light emitting parts that is in a light emitting state when a display corresponding to the other information is displayed does not exist when a display corresponding to the aspect information is displayed. The gaming machine according to any one of features G1 to G11, characterized in that the gaming machine is configured to be a combination.

According to feature G12, when a display corresponding to the mode information is performed, a unit light emitting section that can be set to a light emitting state is set to a light emitting state, whereby a display corresponding to another information is performed, and a display corresponding to the mode information is displayed. In order to diversify the information, it is possible to place as few restrictions as possible on the content of the display corresponding to the mode information. On the other hand, a combination of unit light emitting parts that are in a light emitting state when a display corresponding to different information is performed is a combination that does not exist when a display corresponding to mode information is performed. Thereby, by understanding the combination of unit light emitting parts that are in the light emitting state, it becomes possible to understand which of the display corresponding to the mode information and the display corresponding to other information is being performed.

Feature G13. There are a plurality of display modes corresponding to the mode information in the information display means,
The game according to feature G12, wherein among the plurality of unit light emitting parts, there is no unit light emitting part that does not enter a light emitting state even if all the displays corresponding to the mode information of the plurality of modes are performed. Machine.

According to feature G13, when the display corresponding to the aspect information is performed, the unit light emitting parts of any combination are set to the light emitting state. Therefore, in order to diversify the display corresponding to the aspect information, It becomes possible to place as few restrictions as possible on the content of the display corresponding to the information.

Feature G14. Specific individual information display means as the information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, the thirteenth In the embodiment, a plurality of individual information display means including a third notification display device 203 and a fourth notification display device 204 are provided,
When causing a display corresponding to the separate information to be displayed, the second information display control means selects a predetermined individual information display means from among the plurality of individual information display means that does not go into a non-display state when a display corresponding to the aspect information is displayed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments; first notification display device 201 and second notification device in the eleventh and twelfth embodiments) Feature G12 characterized in that the display device 202 and the third notification display device 203 (in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are in a non-display state. Or the gaming machine described in G13.

According to feature G14, a predetermined individual information display means that does not go into a non-display state when a display corresponding to mode information is performed becomes a non-display state when a display corresponding to another information is performed. As a result, simply by understanding the type of individual information display means that is in a hidden state, it is possible to clearly identify which of the display corresponding to mode information and the display corresponding to separate information is being performed. becomes possible.

Feature G15. Equipped with a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level,
The gaming machine according to any one of features G1 to G14, wherein the second information display control means causes a display corresponding to the separate information to be displayed in a situation where the setting value can be changed.

According to feature G15, the information display means that displays the display corresponding to the mode information can also be used as the display means for notifying that the setting value can be changed.

Feature G16. The gaming machine according to feature G15, wherein the second information display control means causes information corresponding to the currently selected setting value to be displayed as the display corresponding to the separate information.

According to feature G16, the information display means that displays the display corresponding to the mode information can also be used as the display means for displaying the setting value that is being changed.

Feature G17. The gaming machine according to any one of features G1 to G16, wherein the second information display control means causes a display corresponding to an abnormal state of the gaming machine to be displayed as the display corresponding to the separate information.

According to feature G17, the information display means for displaying a display corresponding to mode information can also be used as a display means for displaying a display corresponding to an abnormal state of the gaming machine.

Feature G18. The second information display control means is characterized in that when displaying a display corresponding to the abnormal state in a situation where the abnormal state does not occur, the second information display control means causes a display corresponding to the fact that the abnormal state does not occur. The gaming machine according to feature G17.

According to feature G18, it is possible to clearly identify whether or not an abnormal state has occurred by checking the information display means.

Note that for the configuration of features G1 to G18, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature H group>
Feature H1. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
Information deriving means (in the first embodiment, step S1402 to step S1412 in the management CPU 112 (in the third embodiment, the function to execute the process of step S1807 in the management CPU 112; in the fifth embodiment, the function to execute the process in step S2107 in the management CPU 112),
The information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to In the fourteenth embodiment, a first information display control means (a function for executing display processing in the management CPU 112) that controls the display of the first to fourth notification display devices 201 to 204);
A second information display control means (step S202 and step S208 in the main CPU 63 in the first to tenth embodiments) that controls the display of the information display means so that a display corresponding to another information different from the mode information is displayed In the 11th embodiment, the main CPU 63 performs steps S3101, S3103, and S3109. In the 12th embodiment, the main CPU 63 performs steps S3201, S3202, and S3204. and a function of executing the process of step S3210, a function of executing the abnormality display process in the main CPU 63 in the thirteenth embodiment),
Equipped with
The information display means has a plurality of unit light emitting parts (display segments 201a to 201g, 202a to 202g), and performs a predetermined display by a combination of unit light emitting parts that are in a light emitting state among the plurality of unit light emitting parts. It is a configuration that allows
The second information display control means corresponds to the different information by setting a unit light emitting unit, which can be set in a light emitting state when a display corresponding to the mode information is displayed, among the plurality of unit light emitting parts, into a light emitting state. A combination of the unit light emitting parts that becomes a light emitting state when a display corresponding to the other information is displayed does not exist when a display corresponding to the aspect information is displayed. A game machine characterized in that it allows combinations to be made.

According to feature H1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, mode information corresponding to the results of the game in a predetermined period is derived using the history information stored in the history storage means. Then, a display corresponding to the aspect information is performed on the information display means. This makes it possible to grasp the gaming history management results, such as the frequency of occurrence of predetermined events. Further, in the information display means, not only a display corresponding to the mode information but also a display corresponding to other information is performed. This makes it possible to effectively utilize the information display means.

In addition, display corresponding to different information is performed by setting a unit light-emitting section to a light-emitting state, which can be set to a light-emitting state when a display corresponding to the mode information is displayed, thereby diversifying the display corresponding to the mode information. It becomes possible to place as few restrictions as possible on the content of the display corresponding to the mode information. On the other hand, a combination of unit light emitting parts that are in a light emitting state when a display corresponding to different information is performed is a combination that does not exist when a display corresponding to mode information is performed. Thereby, by understanding the combination of unit light emitting parts that are in the light emitting state, it becomes possible to understand which of the display corresponding to the mode information and the display corresponding to other information is being performed.

Feature H2. There are a plurality of display modes corresponding to the mode information in the information display means,
The game according to feature H1, wherein among the plurality of unit light emitting parts, there is no unit light emitting part that does not enter a light emitting state even if all the displays corresponding to the mode information of the plurality of modes are performed. Machine.

According to feature H2, when the display corresponding to the aspect information is performed, the unit light emitting parts of any combination are set to the light emitting state. Therefore, in order to diversify the display corresponding to the aspect information, It becomes possible to place as few restrictions as possible on the content of the display corresponding to the information.

Feature H3. Specific individual information display means as the information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, the thirteenth In the embodiment, a plurality of individual information display means including a third notification display device 203 and a fourth notification display device 204 are provided,
When causing a display corresponding to the separate information to be displayed, the second information display control means selects a predetermined individual information display means from among the plurality of individual information display means that does not go into a non-display state when a display corresponding to the aspect information is displayed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments; first notification display device 201 and second notification device in the eleventh and twelfth embodiments) Feature H1 characterized in that the display device 202 and the third notification display device 203 (in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are in a non-display state. Or the gaming machine described in H2.

According to feature H3, a predetermined individual information display means that does not go into a non-display state when a display corresponding to aspect information is performed becomes a non-display state when a display corresponding to another information is performed. As a result, simply by understanding the type of individual information display means that is in a hidden state, it is possible to clearly identify which of the display corresponding to mode information and the display corresponding to separate information is being performed. becomes possible.

Feature H4. The gaming machine according to feature H3, wherein the first information display control means sets each of the plurality of individual information display means to a display state when causing the display corresponding to the aspect information to be performed.

According to feature H4, when a display corresponding to mode information is performed, each of the plurality of individual information display means is in a display state, so that a predetermined individual information display means corresponds to another information that is in a non-display state. This makes it possible to clearly distinguish the display from the display.

Feature H5. The first information display control means sequentially changes the display of the aspect information on the information display means, and even when changing the display of the aspect information, the predetermined individual information display means is in a non-display state. The gaming machine according to feature H3 or H4, characterized in that the game machine is not maintained in the same state.

According to feature H5, when display corresponding to mode information is performed, the predetermined individual information display means is not maintained in a non-display state. As a result, regardless of the timing at which the plurality of individual information display means are checked, it is possible to specify which of the display corresponding to the mode information and the display corresponding to separate information is being performed on the plurality of individual information display means. becomes possible.

Feature H6. Equipped with a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level,
The gaming machine according to any one of features H1 to H5, wherein the second information display control means causes a display corresponding to the separate information to be displayed in a situation where the setting value can be changed.

According to feature H6, the information display means that displays the display corresponding to the mode information can also be used as the display means for notifying that the setting value can be changed.

Feature H7. The gaming machine according to feature H6, wherein the second information display control means causes information corresponding to the currently selected setting value to be displayed as the display corresponding to the separate information.

According to feature H7, the information display means that displays the display corresponding to the aspect information can also be used as the display means for displaying the setting value that is being changed.

Note that for the configuration of features H1 to H7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics Group I>
Feature I1. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
Information deriving means (in the first embodiment, step S1402 to step S1412 in the management CPU 112 (in the third embodiment, the function to execute the process of step S1807 in the management CPU 112; in the fifth embodiment, the function to execute the process in step S2107 in the management CPU 112),
A first information display control means (management side a function of executing display processing in the CPU 112);
a second information display control means (a function for executing abnormality display processing in the main CPU 63) that controls the display of the information display means so that a display corresponding to an abnormal state of the gaming machine is displayed;
A gaming machine characterized by comprising:

According to feature I1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, mode information corresponding to the results of the game in a predetermined period is derived using the history information stored in the history storage means. Then, a display corresponding to the aspect information is performed on the information display means. This makes it possible to grasp the gaming history management results, such as the frequency of occurrence of predetermined events. In addition, the information display means not only displays the mode information but also displays the abnormal state of the gaming machine. This makes it possible to effectively utilize the information display means.

Feature I2. The second information display control means is characterized in that when displaying a display corresponding to the abnormal state in a situation where the abnormal state does not occur, the second information display control means causes a display corresponding to the fact that the abnormal state does not occur. The gaming machine according to feature I1.

According to feature I2, it is possible to clearly identify whether an abnormal state has occurred by checking the information display means.

Feature I3. Feature I1 or I2 is characterized in that a period during which a display corresponding to the mode information is displayed on the information display means and a period during which a display corresponding to the abnormal state is performed on the information display means is distinguished. The game machine described.

According to feature I3, by understanding the situation in which display is being performed on the information display means, it is possible to determine which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed on the information display means. It becomes possible to specify.

Feature I4. The second information display control means displays a display corresponding to the abnormal state by controlling the display of the information display means so that the display mode is different from the display mode when the display corresponding to the mode information is displayed. The gaming machine according to feature G1 or G2, wherein

According to feature I4, by understanding the display mode of the information display means, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed on the information display means. It becomes possible.

Feature I5. Features I1 to I4 characterized in that the information display means includes a plurality of individual information display means (first to fourth notification display devices 201 to 204) each capable of displaying a plurality of types of information. The gaming machine according to any one of the above.

According to feature I5, by using a plurality of individual information display means to display a display corresponding to the mode information, it is possible to display a wide variety of mode information. Furthermore, by having multiple individual information display means, it is possible to make the display mode significantly different between when the display corresponding to the mode information is displayed and when the display corresponding to the abnormal state is displayed. .

Feature I6. When causing a display corresponding to the abnormal state to be displayed, the second information display control means selects a predetermined individual information display means from among the plurality of individual information display means that does not go into a non-display state when a display corresponding to the mode information is performed. The gaming machine according to feature I5, characterized in that the information display means (the first notification display device 201 and the second notification display device 202) are in a non-display state.

According to feature I6, the predetermined individual information display means, which does not go into a non-display state when a display corresponding to mode information is performed, becomes a non-display state when a display corresponding to an abnormal state is performed. As a result, simply by understanding the type of individual information display means that is in a hidden state, it is possible to clearly identify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed. becomes possible.

Feature I7. When causing a display corresponding to the abnormal state to be displayed, the second information display control means selects a specific individual information display means (the second information display means) which is in a display state when displaying the aspect information among the plurality of individual information display means. The third notification display device 203 and the fourth notification display device 204) are brought into a display state,
The display content of the specific individual information display means when the display corresponding to the abnormal state is performed may be displayed on the specific individual information display means when the display corresponding to the mode information is performed. The gaming machine according to feature I6.

According to feature I7, in the specific individual information display means, the display contents that can be displayed when the display corresponding to the aspect information is performed can also be displayed when the display corresponding to the abnormal state is performed, so that the aspect It becomes possible to avoid imposing restrictions on the display contents when displaying information corresponding to the information. In addition, even if the specific individual information display means has a configuration that can display the same display content, it will not become a non-display state if it has the configuration of feature I7 above and a display corresponding to the aspect information is performed. When a predetermined individual information display means displays a display corresponding to an abnormal state, it becomes a non-display state, so it is possible to specify which of the plurality of individual information display means is displaying.

Feature I8. The gaming machine according to feature I6 or I7, wherein the first information display control means puts each of the plurality of individual information display means into a display state when causing the display corresponding to the mode information to be displayed.

According to feature I8, when the display corresponding to the aspect information is performed, each of the plurality of individual information display means is in the display state, so this corresponds to an abnormal state in which a predetermined individual information display means is in the non-display state. This makes it possible to clearly distinguish the display from the display.

Feature I9. The first information display control means sequentially changes the display of the aspect information on the information display means, and even when changing the display of the aspect information, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features I6 to I8, characterized in that the game machine is configured such that the game machine is not maintained in the same state.

According to feature I9, when display corresponding to mode information is performed, the predetermined individual information display means is not maintained in a non-display state. As a result, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed on the plurality of individual information display means, regardless of the timing at which the plurality of individual information display means are checked. becomes possible.

Note that for the configuration of features I1 to I9, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature J group>
Feature J1. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); )and,
Information deriving means (in the first embodiment, step S1402 to step S1412 in the management CPU 112 (in the third embodiment, the function to execute the process of step S1807 in the management CPU 112; in the fifth embodiment, the function to execute the process in step S2107 in the management CPU 112),
The information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to In the fourteenth embodiment, a first information display control means (a function for executing display processing in the management CPU 112) that controls the display of the first to fourth notification display devices 201 to 204);
Equipped with
The first information display control means sequentially changes the display corresponding to the aspect information on the information display means, and even when changing the display corresponding to the aspect information, the information display means does not display any information. A game machine characterized in that the game machine is prevented from being maintained in a state.

According to feature J1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, mode information corresponding to the results of the game in a predetermined period is derived using the history information stored in the history storage means. Then, a display corresponding to the aspect information is performed on the information display means. This makes it possible to grasp the gaming history management results, such as the frequency of occurrence of predetermined events. Furthermore, when a display corresponding to the mode information is displayed, the information display means is not maintained in a non-display state. This makes it possible to specify the display corresponding to the mode information, regardless of the timing at which the information display means is checked.

Feature J2. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth In the embodiment, the gaming machine according to feature J1 is provided with a plurality of first to fourth notification display devices 201 to 204).

According to feature J2, by using a plurality of individual information display means to display a display corresponding to the mode information, it is possible to display a wide variety of mode information.

Feature J3. The gaming machine according to feature J2, wherein the first information display control means sets each of the plurality of individual information display means to a display state when causing the display corresponding to the aspect information to be performed.

According to feature J3, each of the plurality of individual information display means is in the display state when the display corresponding to the mode information is performed, and even when the display corresponding to the mode information is changed, the display state is not changed. maintained. This makes it easier to understand the aspect information.

Feature J4. The first information display control means is a part of the plurality of individual information display means (in the first to tenth embodiments, the first notification display device 69a, the eleventh ~ In the fourteenth embodiment, a display corresponding to the type of the aspect information to be displayed is performed on the first notification display device 201 and the second notification display device 202), and a plurality of the individual information display means Individual information display means for displaying results (in the first to tenth embodiments, the second notification display device 69b and the third notification display device 69c; in the eleventh to fourteenth embodiments, the individual information display device 69b and the third notification display device 69c) The gaming machine according to feature J2 or J3, wherein a display corresponding to the content of the aspect information to be displayed is performed on the third notification display device 203 and the fourth notification display device 204).

According to feature J4, when a display corresponding to aspect information is to be performed, a display corresponding to the type of aspect information to be displayed is performed on the individual information display means for the type display target, and an individual information display to be displayed as a result is performed. The means performs a display corresponding to the content of the mode information to be displayed. This makes it easier to understand the mode information to be displayed.

Note that for the configuration of features J1 to J4, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature K group>
Feature K1. A history storage execution means (a function for executing history setting processing in the management CPU 112) that stores game history information corresponding to the occurrence of a predetermined event due to the execution of a game in the history storage means (history memory 117); ),
The history storage execution means is a means for preventing the history information from being stored in the history storage means even if the predetermined event occurs in a restricted situation (a function for making a negative determination in step S3501 in the main CPU 63). ) A gaming machine characterized by comprising:

According to feature K1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, in a restricted situation, history information is not stored even if a predetermined event occurs, so it is possible to prevent history information from being stored in situations where it is undesirable to store history information. .

Feature K2. The gaming machine according to feature K1, wherein the restriction situation can occur as a situation from when the supply of operating power to the history storage execution means is started until a restriction release event occurs.

According to feature K2, it is possible to prevent the occurrence of a predetermined event due to an operation check immediately after the start of supply of operating power from being stored as history information.

Feature K3. means for setting the restricted state when the supply of operating power to the history storage execution means is started and a restricting condition is satisfied (a function for executing the process of step S3610 in the main CPU 63); ,
Means for not setting the above-mentioned restriction situation when the supply of operating power to the history storage execution means is started and the above-mentioned restriction condition is not satisfied (a function of executing the process of step S3621 in the main CPU 63) and,
The gaming machine according to feature K2, characterized by comprising:

According to feature K3, there are cases in which a restriction situation is set and cases in which it is not set, depending on whether or not a restriction condition is satisfied. This makes it possible to avoid being set to a restricted status as needed.

Feature K4. The limiting situation may occur as a situation from when the supply of operating power to the history storage execution means is started until the number of gaming balls discharged from the gaming area exceeds a predetermined reference number. The gaming machine according to any one of K1 to K3.

According to feature K4, it is possible to prevent history information from being stored until the number of game balls discharged from the game area reaches or exceeds a predetermined reference number after the supply of operating power is started.

Feature K5. When a predetermined event occurs due to the execution of a game, the corresponding game history information is stored in the history storage means (normal counter area 231, opening/closing execution mode counter area 232, high frequency support mode counter area 233). History storage execution means for storing (function for executing normal ball entry management processing in the main side CPU 63, ball entry management processing during opening/closing execution mode, and ball entry management processing during high frequency support mode);
information deriving means (a function of executing the process of step S4208 in the main CPU 63) for deriving mode information corresponding to the game result in a predetermined period using the history information stored in the history storage means;
Equipped with
A gaming machine characterized in that the information deriving means does not derive the mode information when the situation is restricted.

According to feature K5, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, mode information corresponding to the results of the game in a predetermined period is derived using the history information stored in the history storage means. This makes it possible to grasp the gaming history management results, such as the frequency of occurrence of predetermined events. Furthermore, in the case of a restricted situation, modal information will not be derived even if a predetermined event occurs, so it is possible to prevent modal information from being derived in situations where it is undesirable to derive modal information. .

Feature K6. The gaming machine according to feature K5, wherein the restriction situation can occur as a situation from when the supply of operating power to the history storage execution means is started until a restriction release event occurs.

According to feature K6, it is possible to prevent mode information from being derived using history information based on the occurrence of a predetermined event in an operation check immediately after the start of supply of operating power.

Feature K7. The limiting situation may occur as a situation from when the supply of operating power to the history storage execution means is started until the number of gaming balls discharged from the gaming area exceeds a predetermined reference number. The gaming machine described in K5 or K6.

According to feature K7, it is possible to prevent mode information from being derived until the number of game balls discharged from the game area reaches or exceeds a predetermined reference number after the supply of operating power is started.

Note that for the configuration of features K1 to K7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the above feature G group, the above feature H group, the above feature I group, the above feature J group, and the above feature K group, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this respect.

<Feature L group>
Feature L1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
A first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least one of the items stored in the internal storage means is evacuation execution means (in the fifteenth embodiment, a function for executing the processes of step S3802 and steps S3902 to S3907 in the main side CPU 63; In the embodiment, the function of executing the process of step S4402 in the main CPU 63, in the 17th embodiment, the function of executing the process of steps S4502 to S4507 in the main CPU 63, and in the 18th embodiment, the function of executing the process of step S4502 in the main CPU 63. a function of executing the process of S4602, a function of executing the processes of step S4701 and step S4703 in the main CPU 63 in the 19th embodiment),
When or after the second predetermined process is finished, return execution means (in the fifteenth embodiment, step S3804 and A function to execute the process from step S3910 to step S3915, a function to execute the process from step S4404 in the main CPU 63 in the 16th embodiment, and a function to execute the process from step S4510 to step S4515 in the main CPU 63 in the 17th embodiment. (in the 18th embodiment, a function to execute the processing of step S4605 in the main CPU 63, and in the 19th embodiment, a function to execute the processing in step S4705 and step S4706 in the main CPU 63),
A gaming machine characterized by comprising:

According to feature L1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least some of the information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Furthermore, when or after the second predetermined process is finished, the information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process. From the above, it becomes possible to perform various types of control suitably.

Feature L2. The gaming machine according to feature L1, wherein the predetermined information is part of the information stored in the internal storage means.

According to feature L2, only part of the information stored in the internal storage means is saved to the predetermined storage means, so that the storage capacity required for saving the information in the internal storage means in the predetermined storage means is reduced. It is possible to suppress it.

Feature L3. The internal storage means has a first storage area (WA register, BC register, DE register, HL register, IX register, and IY register) and a second storage area (WA register, BC register, DE register, HL register, IX register, and registers other than IY registers),
The second predetermined process execution means is configured to store information in the first storage area in the second predetermined process, but not to store information in the second storage area,
The gaming machine according to feature L2, wherein the saving execution means saves the information stored in the first storage area to the predetermined storage means.

According to feature L3, when a situation changes from a situation where the first predetermined process is being executed to a situation where the second predetermined process is executed, or when a situation where the second predetermined process is executed, the second predetermined process is stored in the internal storage means. The information in the first storage area to be stored is saved to a predetermined storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before execution of the second predetermined process, It becomes possible to suppress the storage capacity required to save information in the storage means.

Feature L4. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine according to any one of features L1 to L3, wherein the save execution means saves the predetermined information to the second predetermined storage area.

According to feature L4, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the storage destination of information in the predetermined storage means can be determined by the first predetermined process and the second predetermined process. It becomes possible to make a clear difference. Thereby, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least a portion of the information stored in the internal storage means is information is saved to the second predetermined storage area. This makes it possible to save the information in the internal storage means immediately before the start of the second predetermined process, and also makes it possible to save the information without using the first predetermined storage area.

Feature L5. The evacuation execution means is
When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, the first predetermined information, which is a part of the information stored in the internal storage means, is used in the first predetermined process. means for saving to the first predetermined storage area (in the fifteenth embodiment, a function of executing the process of step S3802 in the main CPU 63; in the sixteenth embodiment, a function of executing the process of step S4402 in the main CPU 63); ,
When the situation changes from the situation where the first predetermined process is being executed to the situation where the second predetermined process is executed, the second predetermined information, which is a part of the information stored in the internal storage means, is stored in the second predetermined process. (a function of executing steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment, and a function of executing steps S4502 to S4507 in the main CPU 63 in the seventeenth embodiment) (in the 18th embodiment, the function to execute the process of step S4602 in the main CPU 63; in the 19th embodiment, the function to execute the process in steps S4702 and S4703 in the main CPU 63);
The gaming machine according to feature L4, comprising:

According to feature L5, the first predetermined information that is part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process, and the part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process. The second predetermined information is saved in the second predetermined storage area in the second predetermined process. As a result, it becomes possible to save each piece of information stored in the internal storage means at a timing that is preferable, and the process for saving information is executed in a distributed manner between the first predetermined process and the second predetermined process. becomes possible.

Feature L6. The gaming machine according to feature L5, wherein the first predetermined information is information in a flag register provided in the internal storage means.

According to feature L6, it is possible to appropriately save information in the flag register in a situation where the first predetermined process is being executed.

Feature L7. The second predetermined storage area is
a stack area (stack area 224 for non-specific control) into which information can be written with a push command and read with a pop command;
a work area (work area 223 for non-specific control) in which information can be written and read by a load command;
Equipped with
The gaming machine according to any one of features L4 to L6, wherein the saving execution means saves the predetermined information to one of the stack area and the work area.

According to feature L7, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the stack area in the second predetermined storage area At least part of the information stored in the internal storage means is saved to one of the work area and the work area. This makes it possible to consolidate information saving destinations, and to simplify the processing configuration for saving and the processing configuration for restoring information.

Feature L8. The gaming machine according to feature L7, wherein the saving execution means saves the predetermined information to the work area.

According to feature L8, since the save destination of at least part of the information stored in the internal storage means is the work area, it is possible to save the information without cumulatively changing the stack pointer. Become.

Feature L9. The first predetermined storage area is capable of storing and reading information when the first predetermined process is executed, and is capable of reading information when the second predetermined process is executed. Inability to remember information
The second predetermined storage area is capable of storing and reading information when the second predetermined process is executed, and is capable of reading information when the first predetermined process is executed. The gaming machine according to any one of features L4 to L8, characterized in that information cannot be stored.

According to feature L9, it is possible to treat the first predetermined storage area as a storage area dedicated to the first predetermined process, and it is also possible to treat the second predetermined storage area as a storage area dedicated to the second predetermined process. becomes.

Feature L10. The predetermined storage means is
a stack area (stack area 224 for non-specific control) into which information can be written with a push command and read with a pop command;
a work area (work area 223 for non-specific control) in which information can be written and read by a load command;
Equipped with
The gaming machine according to any one of features L1 to L9, wherein the saving execution means saves the predetermined information to one of the stack area and the work area.

According to feature L10, it becomes possible to consolidate the save destinations of the predetermined information, and it becomes possible to simplify the processing configuration for saving the predetermined information and the processing configuration for restoring the predetermined information.

Feature L11. The gaming machine according to feature L10, wherein the saving execution means saves the predetermined information to the work area.

According to feature L11, since the save destination of the predetermined information is the work area, it becomes possible to save the information without cumulatively changing the stack pointer.

Feature L12. The predetermined information is a part of information stored in the internal storage means,
The evacuation execution means stores the internal storage means when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation changes to the situation where the second predetermined process is executed. The gaming machine according to feature L11, further comprising means for saving specific information, which is part of the information stored in the stack area, into the stack area (a function of executing the process of step S3802 in the main CPU 63). .

According to feature L12, in a configuration in which predetermined information is saved in the work area, specific information is saved in the stack area. This allows the information stored in the internal storage means to be distributed and saved in the work area and the stack area.

Feature L13. The gaming machine according to feature L12, wherein the predetermined information has a larger amount of information than the specific information.

According to feature L13, by saving the predetermined information having a larger amount of information than the specific information to the work area, a large amount of information is cumulatively stored in the stack area when saving the information stored in the internal storage means. It is possible to prevent this from happening.

Feature L14. When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed, information on a stack pointer provided in the internal storage means; is a configuration that is fixed information,
The gaming machine according to any one of features L1 to L13, wherein the information on the stack pointer provided in the internal storage means is not saved by the save execution means.

According to feature L14, there is no need to secure a capacity for saving stack pointer information in the predetermined storage means, so it is possible to suppress the capacity of the predetermined storage means. Furthermore, even in a configuration where the stack pointer information is not saved, if the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or the situation where the second predetermined process is executed. In this case, the stack pointer information becomes fixed information, so it is possible to restore the stack pointer information to the one before the start of the second predetermined process without saving the stack pointer information as described above. It is possible.

Feature L15. Means for setting the fixed information in the stack pointer when or after the second predetermined process (in the fifteenth embodiment, a function for executing the process in step S3909 in the main CPU 63, in the seventeenth embodiment) According to the embodiment, the gaming machine according to feature L14 is equipped with a function of executing the process of step S4509 in the main CPU 63, and a function of executing the process of step S4604 in the main CPU 63 in the 18th embodiment. .

According to feature L15, when or after the second predetermined process ends, it is possible to restore the stack pointer information to the information before the second predetermined process was started.

Feature L16. When the situation changes from executing the first predetermined process to executing the second predetermined process, or when the situation changes to executing the second predetermined process, the stack pointer is set to the second predetermined process. means for setting the corresponding second response start information (in the fifteenth embodiment, a function of executing the process of step S3901 in the main CPU 63; in the seventeenth embodiment, a function of executing the process of step S4501 in the main CPU 63; In the eighteenth embodiment, the gaming machine according to feature L14 or L15 is provided with a function of executing the process of step S4601 in the main CPU 63.

According to feature L16, when the second predetermined process is started, the second response start information corresponding to the second predetermined process is set to the stack pointer, so that an appropriate address can be set in the second predetermined process. It becomes possible to store information in the stack area.

Feature L17. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features L1 to L16, wherein the second predetermined process includes a process for managing a gaming history.

According to feature L17, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature L18. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature L18, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature L19. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature L18, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature L19, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to gaming results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature L20. The gaming machine according to feature L19, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature L20, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features L1 to L20, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature M group>
Feature M1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
A first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least one of the items stored in the internal storage means is evacuation execution means (in the 15th embodiment, a function to execute the processing of steps S3902 to S3907 in the main CPU 63, in the 17th embodiment In the 18th embodiment, the main CPU 63 has a function of executing steps S4502 to S4507, and in the 19th embodiment, the main CPU 63 has a function of executing steps S4701 and S4602. function to execute the process of S4703),
When or after the second predetermined process is finished, return execution means (in the fifteenth embodiment, step S3910 in the main CPU 63) returns the predetermined information saved in the predetermined storage means to the internal storage means A function to execute the process in step S3915, a function to execute the process in steps S4510 to S4515 in the main CPU 63 in the 17th embodiment, a function to execute the process in step S4605 in the main CPU 63 in the 18th embodiment, In the 19th embodiment, a function of executing the processing of step S4705 and step S4706 in the main CPU 63);
Equipped with
The gaming machine is characterized in that the saving execution means saves the predetermined information in the predetermined storage means in response to a load command.

According to feature M1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least part of the predetermined information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is finished, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process. When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the above predetermined information is saved to the predetermined storage means by a load instruction. . This makes it possible to save predetermined information without changing the stack pointer.

Feature M2. The predetermined storage means is
a stack area (stack area 224 for non-specific control) into which information can be written with a push command and read with a pop command;
a work area (work area 223 for non-specific control) in which information can be written and read by a load command;
Equipped with
The gaming machine according to feature M1, wherein the saving execution means saves the predetermined information to the work area.

According to feature M2, since the predetermined information, which is at least part of the information stored in the internal storage means, is saved to the work area, the information is saved without cumulatively changing the stack pointer. becomes possible.

Feature M3. The predetermined information is a part of information stored in the internal storage means,
The evacuation execution means stores the internal storage means when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation changes to the situation where the second predetermined process is executed. The gaming machine according to feature M2, further comprising means for saving specific information that is part of the information stored in the stack area to the stack area (a function of executing the process of step S3802 in the main CPU 63). .

According to feature M3, in a configuration in which predetermined information is saved in the work area, specific information is saved in the stack area. This allows the information stored in the internal storage means to be distributed and saved in the work area and the stack area.

Feature M4. The gaming machine according to feature M3, wherein the predetermined information has a larger amount of information than the specific information.

According to feature M4, by saving the predetermined information having a larger amount of information than the specific information to the work area, a large amount of information is cumulatively stored in the stack area when saving the information stored in the internal storage means. It is possible to prevent this from happening.

Feature M5. The work area is
a first work area (work area 221 for specific control) in which information is stored when the first predetermined process is executed;
a second work area (work area 223 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine according to any one of features M2 to M4, wherein the saving execution means saves the predetermined information to the second work area.

According to feature M5, by providing the first work area and the second work area in the work area, the storage destination of information in the work area is clearly different between the first predetermined process and the second predetermined process. becomes possible. Thereby, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least a portion of the information stored in the internal storage means is information is saved to the second work area. This makes it possible to save the information in the internal storage means immediately before the start of the second predetermined process, and also makes it possible to save the information without using the first work area.

Feature M6. The first work area is capable of storing and reading information when the first predetermined process is executed, and is capable of reading information when the second predetermined process is executed. Inability to remember information
The second work area is capable of storing and reading information when the second predetermined process is executed, and is capable of reading information when the first predetermined process is executed. The gaming machine according to feature M5, characterized in that information cannot be stored.

According to feature M6, it becomes possible to treat the first work area as a storage area dedicated to the first predetermined process, and it becomes possible to treat the second work area as a storage area dedicated to the second predetermined process. .

Feature M7. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
A first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least one of the items stored in the internal storage means is evacuation execution means (in the 15th embodiment, a function to execute the processing of steps S3902 to S3907 in the main CPU 63, in the 17th embodiment In the 18th embodiment, the main CPU 63 has a function of executing steps S4502 to S4507, and in the 19th embodiment, the main CPU 63 has a function of executing steps S4701 and S4602. function to execute the process of S4703),
When or after the second predetermined process is finished, return execution means (in the fifteenth embodiment, step S3910 in the main CPU 63) returns the predetermined information saved in the predetermined storage means to the internal storage means A function to execute the process in step S3915, a function to execute the process in steps S4510 to S4515 in the main CPU 63 in the 17th embodiment, a function to execute the process in step S4605 in the main CPU 63 in the 18th embodiment, In the 19th embodiment, a function of executing the processing of step S4705 and step S4706 in the main CPU 63);
Equipped with
The predetermined storage means is
a stack area (stack area 224 for non-specific control) into which information can be written with a push command and read with a pop command;
a work area (work area 223 for non-specific control) in which information can be written and read by a load command;
Equipped with
The gaming machine is characterized in that the saving execution means saves the predetermined information to one of the stack area and the work area.

According to feature M7, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least part of the predetermined information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is finished, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process.

In addition, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, one of the stack area and the work area in the predetermined storage means. Then, the predetermined information is saved. This makes it possible to consolidate information saving destinations, and to simplify the processing configuration for saving and the processing configuration for restoring information.

Note that for the configuration of features M1 to M7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics N group>
Feature N1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
Equipped with
When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, the information of the stack pointer provided in the internal storage means is configured to be fixed information. A gaming machine.

According to feature N1, when the situation changes from the situation in which the first predetermined process is executed to the situation in which the second predetermined process is executed, the information of the stack pointer provided in the internal storage means becomes fixed information, so that the second predetermined process is executed. There is no need to save information on the stack pointer when starting a predetermined process. This eliminates the need to secure a storage area for saving stack pointer information. Additionally, when the situation changes from executing the first predetermined process to executing the second predetermined process, the stack pointer information becomes fixed information, so the stack pointer information should not be saved as described above. However, it is possible to restore the stack pointer information to the information before the start of the second predetermined process.

Feature N2. Means for setting the fixed information in the stack pointer when or after the second predetermined process (in the fifteenth embodiment, a function for executing the process in step S3909 in the main CPU 63, in the seventeenth embodiment) In the embodiment, the gaming machine according to feature N1 is equipped with a function of executing the process of step S4509 in the main CPU 63, and a function of executing the process of step S4604 in the main CPU 63 in the 18th embodiment. .

According to feature N2, when or after the second predetermined process is finished, it is possible to restore the stack pointer information to the information before the second predetermined process was started.

Feature N3. means for setting second response start information corresponding to the second predetermined process in the stack pointer when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed; In the embodiment, the function of executing the process of step S3901 in the main CPU 63, in the 17th embodiment, the function of executing the process of step S4501 in the main CPU 63, and in the 18th embodiment, the process of step S4601 in the main CPU 63 The gaming machine according to feature N1 or N2, characterized in that the gaming machine is equipped with a function of executing the above function.

According to feature N3, when the second predetermined process is started, the second response start information corresponding to the second predetermined process is set to the stack pointer, so that an appropriate address can be set in the second predetermined process. It becomes possible to store information in the stack area.

Feature N4. When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least one of the items stored in the internal storage means is evacuation execution means (in the fifteenth embodiment, a function for executing the processes of step S3802 and steps S3902 to S3907 in the main side CPU 63; In the embodiment, the function of executing the process of step S4402 in the main CPU 63, in the 17th embodiment, the function of executing the process of steps S4502 to S4507 in the main CPU 63, and in the 18th embodiment, the function of executing the process of step S4502 in the main CPU 63. a function of executing the process of S4602, a function of executing the processes of step S4701 and step S4703 in the main CPU 63 in the 19th embodiment),
When or after the second predetermined process is finished, return execution means (in the fifteenth embodiment, step S3804 and A function to execute the process from step S3910 to step S3915, a function to execute the process from step S4404 in the main CPU 63 in the 16th embodiment, and a function to execute the process from step S4510 to step S4515 in the main CPU 63 in the 17th embodiment. (in the 18th embodiment, a function to execute the processing of step S4605 in the main CPU 63, and in the 19th embodiment, a function to execute the processing in step S4705 and step S4706 in the main CPU 63),
Equipped with
The gaming machine according to any one of features N1 to N3, wherein the information of the stack pointer provided in the internal storage means is not saved by the save execution means.

According to feature N4, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least some of the information is saved in a predetermined storage means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Furthermore, when or after the second predetermined process is finished, the information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process. Furthermore, since the stack pointer information is not to be saved, there is no need to secure a capacity for saving the stack pointer information in the predetermined storage means. Therefore, it is possible to suppress the capacity of the predetermined storage means. Furthermore, even in a configuration where the stack pointer information is not saved, if the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or the situation where the second predetermined process is executed. In this case, the stack pointer information becomes fixed information, so it is possible to restore the stack pointer information to the one before the start of the second predetermined process without saving the stack pointer information as described above. It is possible.

Feature N5. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine according to feature N4, wherein the saving execution means saves the predetermined information to the second predetermined storage area.

According to feature N5, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the storage destination of information in the predetermined storage means can be determined by the first predetermined process and the second predetermined process. It becomes possible to make a clear difference. Thereby, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, at least a portion of the information stored in the internal storage means is information is saved to the second predetermined storage area. This makes it possible to save the information in the internal storage means immediately before the start of the second predetermined process, and also makes it possible to save the information without using the first predetermined storage area.

Feature N6. The first predetermined storage area is capable of storing and reading information when the first predetermined process is executed, and is capable of reading information when the second predetermined process is executed. Impossible to memorize information,
The second predetermined storage area is capable of storing and reading information when the second predetermined process is executed, and is capable of reading information when the first predetermined process is executed. The gaming machine according to feature N5, characterized in that it is not possible to store information about objects.

According to feature N6, it is possible to treat the first predetermined storage area as a dedicated storage area for the first predetermined process, and it is also possible to treat the second predetermined storage area as a dedicated storage area for the second predetermined process. becomes.

Note that for the configuration of features N1 to N6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic group O>
Feature O1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
A first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
When the situation changes from the situation where the first predetermined process is being executed to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed, at least a portion of the storage in the internal storage means is stored. A first state setting means (which executes the processing of steps S4803 to S4808 in the main CPU 63) to set the state of the predetermined storage area (WA register, BC register, DE register, HL register, IX register, and IY register) to a predetermined state. function) and
a second state setting means (a function for executing the processes of steps S4903 to S4908 in the main CPU 63) that sets the state of the predetermined storage area to the predetermined state when or after the second predetermined process is finished;
A gaming machine characterized by comprising:

According to feature O1, when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the predetermined storage area of the internal storage means The state of the predetermined storage area is set to a predetermined state, and when or after the second predetermined process ends, the state of the predetermined storage area is set to the predetermined state again. This allows the state of the predetermined storage area to be in the predetermined state before and after the second predetermined process. Therefore, it is possible to prevent the state of the predetermined storage area caused by one of the first predetermined process and the second predetermined process from affecting the other process. From the above, it becomes possible to perform various types of control suitably.

Feature O2. The gaming machine according to feature O1, wherein the predetermined state is a state when supply of operating power to the control means is started.

According to feature O2, the predetermined storage area is set to the predetermined state when the supply of operating power to the control means is started, so the processing configuration for setting the predetermined state is simplified. becomes possible.

Feature O3. The gaming machine according to feature O1 or O2, wherein the predetermined state is a state in which the predetermined storage area is cleared to "0".

According to feature O3, since the predetermined storage area is set to a state cleared to "0" as the predetermined state, it is possible to simplify the processing configuration for setting the predetermined state.

Feature O4. The gaming machine according to any one of features O1 to O3, wherein the predetermined storage area is a part of the storage area in the internal storage means.

According to feature O4, only a part of the storage area of the internal storage means is set to the predetermined state, so that it is possible to reduce the processing load for setting the predetermined state.

Feature O5. The internal storage means includes at least the predetermined storage area and another storage area (registers other than the WA register, BC register, DE register, HL register, IX register, and IY register),
The second predetermined process execution means is configured to store information in the predetermined storage area in the second predetermined process, but not to store information in the separate storage area,
The gaming machine according to feature O4, wherein the first state setting means and the second state setting means are configured not to change the state of the separate storage area.

According to feature O5, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation changes to the situation where the second predetermined process is executed, the second predetermined process is stored in the internal storage means. A predetermined storage area in which information is to be stored is set to a predetermined state. This makes it possible to prevent the state of the predetermined storage area caused by the first predetermined process from affecting the second predetermined process. In addition, since the state of the separate storage area is not changed, setting it to the predetermined state when the second predetermined process is started does not affect the process after the second predetermined process ends. It becomes possible.

Feature O6. Features O1 to O5, characterized in that the information in the predetermined storage area before the predetermined state is set by the first state setting means is information that is not used after the second predetermined process is completed. The gaming machine according to any one of the above.

According to feature O6, the second predetermined process ends even if the predetermined storage area is set to the predetermined state when the second predetermined process is executed or when the second predetermined process is executed. This makes it possible to avoid affecting subsequent processing.

Feature O7. A portion stored in the internal storage means when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation changes to the situation where the second predetermined process is executed. evacuation execution means (a function for executing the process of step S4802 in the main CPU 63) that saves predetermined information (information of the flag register) that is information on the information in the predetermined storage means (main RAM 65);
return execution means for restoring the predetermined information saved in the predetermined storage means to the internal storage means when or after the second predetermined process is finished (a function of executing the process of step S4810 in the main CPU 63); and,
The gaming machine according to any one of features O1 to O6, characterized by comprising:

According to feature O7, when the situation changes from the situation where the first predetermined process is being executed to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information is stored in the internal storage means. Part of the predetermined information is saved in a predetermined storage means. As a result, when the second predetermined process is executed, the information stored in the internal storage means when the first predetermined process was executed and which is necessary for the subsequent execution of the first predetermined process is rewritten. It is possible to prevent this from occurring. Further, when or after the second predetermined process is finished, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it becomes possible to execute a process different from the second predetermined process based on the state of the internal storage means before execution of the second predetermined process.

Feature O8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features O1 to O7, wherein the second predetermined process includes a process for managing a gaming history.

According to feature O8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature O9. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring due to the game being executed is stored. , a high-frequency support mode counter area 233).

According to feature O9, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature O10. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature O9, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature O10, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to gaming results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature O11. The gaming machine according to feature O10, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature O11, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features O1 to O11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature P group>
Feature P1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
A first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-first embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
A gaming machine characterized by comprising:

According to feature P1, a first predetermined storage area and a second predetermined storage area are provided, and the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is treated as a dedicated storage area for the first predetermined process. It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted.

Feature P2. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to feature P1, wherein the second predetermined process includes a process for managing a gaming history.

According to feature P2, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature P3. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature P3, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature P4. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature P3, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature P4, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to game results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature P5. The gaming machine according to feature P4, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature P5, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Feature P6. When the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, the first predetermined information, which is a part of the information stored in the internal storage means, is used in the first predetermined process. A first saving means (in the fifteenth embodiment, a function of executing the process of step S3802 in the main CPU 63, and in the sixteenth embodiment, a function of executing the process of step S4402 in the main CPU 63) function) and
When the situation changes from the situation where the first predetermined process is being executed to the situation where the second predetermined process is executed, the second predetermined information, which is a part of the information stored in the internal storage means, is stored in the second predetermined process. A second saving means (in the 15th embodiment, a function of executing the processing of steps S3902 to S3907 in the main CPU 63, and in the 17th embodiment, a function of executing steps S4502 to S4502 in the main CPU 63) A function to execute the process of step S4507, a function to execute the process of step S4602 in the main side CPU 63 in the 18th embodiment, a function to execute the processes of step S4701 and step S4703 in the main side CPU 63 in the 19th embodiment) and,
The gaming machine according to any one of features P1 to P5, characterized by comprising:

According to feature P6, the first predetermined information that is part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process, and the part of the information stored in the internal storage means is saved in the first predetermined storage area in the first predetermined process. The second predetermined information is saved in the second predetermined storage area in the second predetermined process. As a result, it becomes possible to save each piece of information stored in the internal storage means at a timing that is preferable, and the process for saving information is executed in a distributed manner between the first predetermined process and the second predetermined process. becomes possible.

Feature P7. When or after the second predetermined process is finished, first return execution means (in the fifteenth embodiment, the main (a function of executing the process of step S3804 in the side CPU 63, a function of executing the process of step S4404 in the main side CPU 63 in the 16th embodiment);
When or after the second predetermined process is finished, a second return execution means (in the fifteenth embodiment, the main In the 17th embodiment, the main CPU 63 has a function of executing steps S3910 to S3915 in the side CPU 63, and in the 18th embodiment, the main CPU 63 has a function of executing steps S4605. (a function of executing the process, in the nineteenth embodiment, a function of executing the process of step S4705 and step S4706 in the main CPU 63),
The gaming machine according to feature P6, comprising:

According to feature P7, when or after the second predetermined process ends, the first predetermined information saved in the first predetermined storage area is returned to the internal storage means, and the first predetermined information saved in the second predetermined storage area is returned to the internal storage means. Since the second predetermined information is restored to the internal storage means, it is possible to restore the state of the internal storage means to the state before the second predetermined process was started.

Feature P8. The gaming machine according to feature P6 or P7, wherein the first predetermined information includes information of a flag register provided in the internal storage means.

According to feature P8, it is possible to appropriately save information in the flag register in a situation where the first predetermined process is being executed.

Feature P9. The gaming machine according to any one of features P6 to P8, wherein the second predetermined information includes information on all registers of the internal storage means.

According to feature P9, the information of all the registers in the internal storage means is saved at once, so there is no need to selectively save the information of the registers.

Feature P10. The second predetermined storage area is
a stack area (stack area 224 for non-specific control) into which information is written by a push command and read by a pop command;
A work area (work area 223 for non-specific control) in which information is written and read by a load instruction;
Equipped with
The gaming machine according to feature P9, wherein the second saving execution means saves the second predetermined information to one of the stack area and the work area.

According to feature P10, information in all registers of the internal storage means is saved to one of the stack area and the work area in the second predetermined storage area. This makes it possible to consolidate the save destinations for information of all registers, and it becomes possible to simplify the processing configuration for saving and the processing configuration for restoring.

Feature P11. The gaming machine according to feature P10, wherein the second saving execution means saves the second predetermined information to the stack area.

According to feature P11, it is possible to save information in all registers while not using the work area.

Feature P12. The gaming machine according to any one of features P6 to P11, wherein the second predetermined information includes information on a stack pointer of the internal storage means.

According to feature P12, it is possible to appropriately save stack pointer information in a situation where the first predetermined process is being executed.

Note that for the configuration of features P1 to P12, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature L group, the feature M group, the feature N group, the feature O group, and the feature P group, the following problems can be solved.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this respect.

<Feature Q group>
Features Q1. A control unit (MPU 62) that executes various processes and temporarily stores information in an internal storage unit (register of the main CPU 63) when executing the process;
History storage means (management RAM 241) that is provided as a separate chip from the control means and is capable of temporarily storing information;
Equipped with
The control means includes a history storage execution means (normal ball entry management processing in the main CPU 63, A gaming machine characterized by having a function of executing ball entry management processing during opening/closing execution mode and ball entry management processing during high frequency support mode.

According to feature Q1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. Further, since the history storage means is provided as a separate chip from the control means, it is possible to increase the storage capacity for storing history information while using a general-purpose control means.

Features Q2. The gaming machine according to feature Q1, wherein the control means includes a predetermined storage means (main RAM 65) that temporarily stores information when executing various processes.

According to feature Q2, in a configuration including not only a predetermined storage means provided in the control means but also a history storage means provided as a separate chip from the control means, by storing history information in the history storage means. It becomes possible to store and hold a large amount of historical information.

Feature Q3. The gaming machine according to feature Q2, wherein the control means causes the predetermined storage means to temporarily store information when executing processing related to the history information.

According to feature Q3, in a configuration in which the history storage means for storing history information is provided as a separate chip from the control means, when processing related to history information is executed, a predetermined storage means provided in the control means is used. Since the information is temporarily stored, it is possible to prevent the processing speed from decreasing excessively when processing related to history information is executed.

Features Q4. The control means includes information derivation means (executes the process of step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means. The gaming machine according to any one of features Q1 to Q3, characterized in that the gaming machine has a function of:

According to feature Q4, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to the game results in a predetermined period using the history information stored in the history storage means. It becomes possible to understand the results.

Features Q5. The gaming machine according to feature Q4, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature Q5, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time.

Note that for the configuration of features Q1 to Q5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature Q group described above, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this respect.

<Characteristic R group>
Feature R1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Becomes the object of use by the setting means based on the fact that a plurality of events including the first event and the second event occur when the supply of operating power to the control means having the setting means is started. Situation generating means (in the 22nd embodiment, a function of executing the processing of steps S5003 to S5006 in the main CPU 63; in another embodiment, the main CPU 63 (in the 23rd embodiment, a function to execute the processes of steps S5703 to S5705 and step S5715 in the main CPU 63),
A gaming machine characterized by comprising:

According to feature R1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, in order to set the set value to be used, multiple events including the first event and the second event must occur when the supply of operating power to the control means is started. Must be. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R2. An open grasping means for grasping that the opening/closing body (front door frame 14) is in an open state (in the 22nd embodiment, a function of executing the process of step S5005 in the main CPU 63, in another embodiment, a step in the main CPU 63) (a function of executing the process of step S5505, a function of executing the process of step S5703 in the main CPU 63 in the 23rd embodiment),
Feature R1 characterized in that the situation generation means specifies that the first event has occurred based on the fact that the opening/closing body is recognized by the openness recognition means as being in an open state. The gaming machine described in .

According to feature R2, in order to set the setting value to be used, the opening/closing body needs to be in an open state. As a result, if an act of fraudulently setting a setting value to be used is performed, it becomes possible to highlight the fraudulent act, and as a result, it becomes easier to discover the fraudulent act. .

Feature R3. Separate opening/closing means (in the 22nd embodiment, a function of executing the process of step S5006 in the main side CPU 63; in another embodiment, the main side CPU 63 (in the twenty-third embodiment, a function of executing the process of step S5704 in the main CPU 63),
The situation generation means is characterized in that it specifies that the second event has occurred based on the fact that the separate opening/closing body is grasped by the separate openness grasping means. The gaming machine described in feature R2.

According to feature R3, in order to set the setting value to be used, it is necessary not only to open the opening/closing body but also to open another opening/closing body. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R4. The setting means selects at least one of the setting value to be used and setting the setting value to be used, based on the operation of the predetermined operation means (update button 68b, reset button 68c). The configuration is to perform
The gaming machine according to feature R2 or R3, wherein the predetermined operating means is configured to be operable by opening a separate opening/closing body.

According to feature R4, the setting value to be used cannot be set unless an opening/closing body different from the separate opening/closing body that is opened to enable the predetermined operating means to be operated is opened. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R5. The opening/closing body defines the front side of the gaming machine in the gaming area where the gaming balls flow down,
The gaming machine according to any one of features R2 to R4, wherein the gaming area is opened to the front of the gaming machine by opening the opening/closing body.

According to feature R5, in order to set the setting value to be used, it is necessary to open the opening/closing body to open the gaming area to the front of the gaming machine. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R6. The situation generating means specifies that one of the plurality of events has occurred based on the fact that a predetermined operation is being performed with a setting key on the setting key insertion section (setting key insertion section 68a). The gaming machine according to any one of features R1 to R5.

According to feature R6, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key on the setting key insertion section, but also to cause a different event to occur. be. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R7. The situation generation means generates the plurality of events based on the fact that a predetermined game event (operation of the firing operation device 28, ball entering the through gate 35) occurs when a game is played. The gaming machine according to any one of features R1 to R6, characterized in that it is specified that one of the events has occurred.

According to feature R7, in order to set the setting value to be used, it is not only necessary to generate a predetermined gaming event that occurs when a game is played, but also to set a setting value that is to be used. It is necessary to cause the following events to occur. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R8. The situation generating means is based on the fact that a game ball is detected by ball entry detection means (gate detection sensor 49a) that detects that a game ball has entered a predetermined ball entry section provided in the gaming area. , the gaming machine according to any one of features R1 to R7, characterized in that it is specified that one of the plurality of events has occurred.

According to feature R8, in order to set the setting value to be used, it is necessary to make the game ball enter a predetermined ball entry part, and it is also necessary to cause another event to occur. There is. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R9. A setting value notification means (a function for executing a setting confirmation process in the main CPU 63) that causes a notification means to notify the setting value to be used set by the setting means,
The setting value notification means transmits the setting value to be used set by the setting means to the notification means based on the occurrence of a plurality of events including the first event and the second event. The gaming machine according to any one of features R1 to R8, characterized in that the game machine is notified by:

According to feature R9, it is possible to make it difficult to fraudulently check the setting values. In addition, the administrator of the game hall only needs to generate the first and second events when setting the setting values to be used or when confirming the setting values, so the work is simplified. This will make it easier to understand each task.

Feature R10. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
A plurality of events including both a predetermined operation by a setting key on the setting key insertion part (setting key insertion part 68a) and another event different from the predetermined operation by the setting key on the setting key insertion part are performed. Situation generation means (in the 22nd embodiment, a situation generation means in the main CPU 63) that creates a setting possible situation in which the setting value to be used can be set by the setting means based on what has occurred. A function to execute the processing from step S5003 to step S5006, in another form, a function to execute the processing from step S5503 to step S5507 in the main CPU 63, and in the twenty-third embodiment, a function to execute the processing from step S5703 to step S5705 and step S5715 in the main CPU 63. functions) and
A game machine characterized by comprising:

According to feature R10, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key on the setting key insertion section, but also to cause a different event to occur. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R11. An open grasping means for grasping that the opening/closing body (front door frame 14) is in an open state (in the 22nd embodiment, a function of executing the process of step S5005 in the main CPU 63, in another embodiment, a step in the main CPU 63) (a function of executing the process of step S5505, a function of executing the process of step S5703 in the main CPU 63 in the 23rd embodiment),
Feature R10 is characterized in that the situation generation means specifies that the other event has occurred based on the fact that the opening/closing body is recognized by the openness recognition means as being in the open state. The game machine described.

According to feature R11, in order to set the setting value to be used, the opening/closing body needs to be in an open state. As a result, if an act of fraudulently setting a setting value to be used is performed, it becomes possible to highlight the fraudulent act, and as a result, it becomes easier to discover the fraudulent act. .

Feature R12. Separate opening/closing means (in the 22nd embodiment, a function of executing the process of step S5006 in the main side CPU 63; in another embodiment, the main side CPU 63 (in the twenty-third embodiment, a function of executing the process of step S5704 in the main CPU 63),
The situation generating means identifies that one of the plurality of events has occurred based on the fact that the separate opening/closing body is in an open state is grasped by the separate opening grasping means. The gaming machine according to feature R11.

According to feature R12, in order to set the setting value to be used, it is necessary not only to open the opening/closing body but also to open another opening/closing body. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R13. The setting means selects at least one of the setting value to be used and setting the setting value to be used, based on the operation of the predetermined operation means (update button 68b, reset button 68c). The configuration is to perform
The gaming machine according to feature R11 or R12, wherein the predetermined operating means is configured to be operable by opening a separate opening/closing body.

According to feature R13, the setting value to be used cannot be set unless an opening/closing body different from the separate opening/closing body that is opened to enable the operation of the predetermined operating means is opened. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R14. The opening/closing body defines the front side of the gaming machine in the gaming area where the gaming balls flow down,
The gaming machine according to any one of features R11 to R13, wherein the gaming area is opened to the front of the gaming machine by opening the opening/closing body.

According to feature R14, in order to set the setting value to be used, it is necessary to open the opening/closing body to open the gaming area to the front of the gaming machine. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and it is also possible to make the fraudulent behavior noticeable.

Feature R15. The situation generation means generates the plurality of events based on the fact that a predetermined game event (operation of the firing operation device 28, ball entering the through gate 35) occurs when a game is played. The gaming machine according to any one of features R10 to R14, characterized in that it is specified that one of the events has occurred.

According to feature R15, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key in the setting key insertion section, but also to perform a predetermined operation that occurs when a game is played. It is necessary to generate a gaming event. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R16. The situation generating means is based on the fact that a game ball is detected by ball entry detection means (gate detection sensor 49a) that detects that a game ball has entered a predetermined ball entry section provided in the gaming area. , the gaming machine according to any one of features R10 to R15, characterized in that it is specified that one of the plurality of events has occurred.

According to feature R16, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation using the setting key on the setting key insertion part, but also to insert a game ball into a predetermined ball entry part. You need to make the ball. As a result, it is possible to make it difficult to fraudulently set a setting value to be used.

Feature R17. A setting value notification means (a function for executing a setting confirmation process in the main CPU 63) that causes a notification means to notify the setting value to be used set by the setting means,
The setting value notification means is configured to notify the setting value based on the fact that the predetermined operation with the setting key on the setting key insertion section is being performed and that a plurality of events including both of the other events have occurred. The gaming machine according to any one of features R10 to R16, characterized in that the setting value to be used that is set by the notification means is notified.

According to feature R17, it is possible to make it difficult to perform an act of fraudulently checking the set value. In addition, whether the administrator of the game hall is setting the setting value to be used or confirming the setting value, he/she must perform the specified operation using the setting key in the setting key insertion section and another event may occur. Since the tasks can be shared, it becomes easier to understand each task.

Note that for the configuration of features R1 to R17, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature R group described above, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to deal with fraud against the gaming machines, and there is still room for improvement in this respect.

<Feature S group>
Feature S1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Situation generating means (in the 22nd embodiment, a situation generation means for creating a setting possible situation in which the setting value to be used can be set by the setting means (steps S5003 to S5006 and steps S5401 to S5401 in the main CPU 63) A function to execute the process of step S5408, in another embodiment, a function to execute the process of steps S5503 to S5507 in the main CPU 63, and in the 23rd embodiment, a function to execute the process of steps S5703 to S5705 and step S5715 in the main CPU 63. (in the 24th embodiment, a function to execute the processing of steps S5801 to S5804 in the main CPU 63, and in the 25th embodiment, a function to execute the processing of steps S5901 to S5904 in the main CPU 63),
Setting value grasping means (in the 22nd embodiment, step S5017 in the main CPU 63 and a function of executing the processing of steps S5111 and S5112, or in another form, a function of executing the processing of steps S5611 and S5612 in the main CPU 63),
A gaming machine characterized by comprising:

According to feature S1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that In this case, it is determined whether the setting value before the setting possible situation is the same as the setting value set in the setting possible situation. This makes it possible to execute processing corresponding to whether or not setting values are the same across settable situations. Therefore, when a setting value to be used is set, it is possible to create a favorable situation for the setting result, and it is possible to suitably perform the setting value setting work.

Feature S2. Based on the fact that the setting value grasping means has grasped that the setting value before the setting possible state and the setting value set by the setting means are the same, a corresponding simultaneous process is performed. It has a simultaneous means (in the 22nd embodiment, a function of executing the process of step S5113 in the main CPU 63, and in another embodiment, a function of executing the process of step S5613 in the main CPU 63). The gaming machine according to feature S1.

According to feature S2, when the setting values are the same across the settable situations, the same time processing is executed, thereby making it possible to create a favorable situation for the setting values being the same. Become.

Feature S3. The gaming machine according to feature S2, wherein the same time means executes, as the same time process, a process for making a notification corresponding to the fact that the setting value has not been changed.

According to feature S3, it is possible to notify the game hall manager or the like that the set values are the same across the settable situations.

Feature S4. Based on the fact that the setting value grasping means has grasped that the setting value before the setting possible situation is different from the setting value set by the setting means, a corresponding non-same time process is executed. (In the twenty-second embodiment, the main CPU 63 executes the process of step S5114; in another embodiment, the main CPU 63 executes the process of step S5614.) The gaming machine according to any one of features S1 to S3.

According to feature S4, when the set values are not the same across the settable situations, the non-identical process is executed, thereby making it possible to create a favorable situation for the changed set values. becomes.

Feature S5. The gaming machine according to feature S4, wherein the non-same time means executes, as the non-same time process, a process for making a notification corresponding to the change of the setting value. .

According to feature S5, it is possible to notify the game hall manager or the like that the setting value has been changed while the setting is possible.

Feature S6. The situation generating means is configured to perform the setting based on the need to erase information in the storage means for storing the setting value after the supply of operating power to the control means having the setting means has started. The gaming machine according to any one of features S1 to S5, characterized in that the gaming machine makes the situation possible.

According to feature S6, when it becomes necessary to erase the information in the storage means that stores the setting values, the setting becomes possible, so the game is not continued even though the information on the setting values has been erased. It is possible to prevent this from happening. In this case, the configuration of feature S1 is provided, and it is determined whether or not the setting value before the setting possible situation is the same as the setting value set in the setting possible situation. This makes it possible to execute processing corresponding to whether or not setting values are the same across settable situations.

Feature S7. The setting value is not changed based on the setting value grasping means recognizing that the setting value before the setting possible state and the setting value set by the setting means are the same. (In the 22nd embodiment, the function of executing the process of step S5113 in the main side CPU 63, in another embodiment, the function of executing the process of step S5613 in the main side CPU 63). The gaming machine according to feature S6.

According to feature S7, even if a setting possible situation occurs due to the erasure of information in the storage means, if the setting values are the same across the setting possible situation, the setting values will not be changed. An announcement will be made in response to the failure. This makes it possible to notify the player that the setting value has not been changed even if the setting becomes possible in the middle of the game, and the player can feel safe even if the setting becomes possible in the middle of the game. It becomes possible to continue playing the game with care.

Feature S8. The situation generating means is
A first situation generating means (in the 22nd embodiment, from step S5003 in the main CPU 63 A function to execute the process of step S5006, in another form, a function to execute the processes of steps S5503 to S5507 in the main CPU 63, and in the 23rd embodiment, a function to execute the processes of steps S5703 to S5705 and step S5715 in the main CPU 63. function) and
a second situation in which the setting possible situation occurs based on the need to erase information in a storage unit that stores the setting values after the supply of operating power to the control unit has started; Generating means (in the 22nd embodiment, a function to execute the processing of steps S5401 to S5408 in the main CPU 63, in the 24th embodiment, a function to execute the processing of steps S5801 to S5804 in the main CPU 63, In the embodiment, a function of executing the processing of steps S5901 to S5904 in the main CPU 63);
Equipped with
The setting value grasping means is configured to determine whether the settable situation is caused by the first situation generating means or the settable situation caused by the second situation generating means, before the settable situation becomes the settable situation. The gaming machine according to any one of features S1 to S7, characterized in that it is determined whether or not the set value in , and the set value set by the setting means are the same.

According to feature S8, when it becomes necessary to erase the information in the storage means that stores the setting values, the setting becomes possible, so the game is not continued even though the information on the setting values has been erased. It is possible to prevent this from occurring. In this case, using the same process as when the setting possible state is reached based on the start of supply of operating power to the control means, the setting possible state is changed as the information in the storage means is erased. When this occurs, it becomes possible to execute processing corresponding to whether or not the set values are the same across the settable situation.

Note that for the configuration of features S1 to S8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature S group described above, it is possible to solve the following problems.

Pachinko gaming machines and slot machines are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front of the machine that stores game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to create a favorable situation when a setting value that determines the advantage of the gaming machine is set, and improvements are still needed in this regard. There is room for

<Characteristic T group>
Feature T1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to twenty-fifth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to twenty-fifth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
A first monitoring execution means for monitoring whether or not the first predetermined storage area is normal (in the 22nd embodiment, a function of executing the processing of steps S5401 to S5404 in the main CPU 63, in the 24th embodiment) A function to execute the processing of steps S5801 to S5804 in the main CPU 63, a function to execute the processing of steps S5901 to S5904 in the main CPU 63 in the 25th embodiment, and a function to execute the processing of step S7701 in the main CPU 63 in the 32nd embodiment. ~Function to execute the process of step S7703),
A second monitoring execution means for monitoring whether or not the second predetermined storage area is normal (in the 22nd embodiment, a function of executing the processing of steps S5405 to S5408 in the main CPU 63, in the 24th embodiment) A function of executing the processing of steps S5809, step S5810, step S5812 and step S5813 in the main side CPU 63, a function of executing the processing of steps S6101, step S6102, step S6105 and step S6106 in the main side CPU 63 in the 25th embodiment, In the 32nd embodiment, a function of executing the processing of steps S7706 to S7708 in the main CPU 63);
A gaming machine characterized by comprising:

According to feature T1, a first predetermined storage area and a second predetermined storage area are provided, and the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is treated as a dedicated storage area for the first predetermined process. It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. Further, by monitoring whether the first predetermined storage area is normal and monitoring whether the second predetermined storage area is normal, the first predetermined process and the second predetermined process are performed. It becomes possible to specify whether the situation is such that each of the processes can be performed normally.

Feature T2. The game according to feature T1, wherein the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are executed in either the first predetermined process or the second predetermined process. Machine.

According to feature T2, monitoring whether the first predetermined storage area is normal or not and monitoring whether or not the second predetermined storage area is normal is performed in one of the first predetermined process and the second predetermined process. It is executed centrally. This makes it possible to simplify the processing configuration compared to a configuration in which monitoring of each storage area is executed in a distributed manner in the first predetermined process and the second predetermined process.

Feature T3. The gaming machine according to feature T1 or T2, wherein the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are executed in the first predetermined process.

According to feature T3, monitoring whether the first predetermined storage area is normal or not and monitoring whether the second predetermined storage area is normal or not can be collectively executed in the first predetermined process. becomes.

Feature T4. A predetermined erasing means (in the 22nd embodiment, a main side The function of executing the process of step S5410 in the CPU 63, the function of executing the process of steps S5806, step S5811, and step S5814 in the main CPU 63 in the 24th embodiment, and the function of executing the process of step S5906 and step S5906 in the main CPU 63 in the 25th embodiment The gaming machine according to any one of features T1 to T3, characterized in that the gaming machine is equipped with a function of executing the processing of steps S6103 and S6107.

According to feature T4, when the first predetermined storage area is abnormal, the information in the first predetermined storage area is erased, so that the first predetermined process is executed while the first predetermined storage area is in an abnormal state. This makes it possible to prevent this from happening.

Feature T5. The predetermined erasing means erases the information in the first predetermined storage area based on the fact that the first monitoring execution means specifies that the first predetermined storage area is abnormal, and erases the information in the second predetermined storage area. The gaming machine according to feature T4, characterized in that information in the area is erased.

According to feature T5, when the first predetermined storage area is abnormal, not only the first predetermined storage area but also the second predetermined storage area is erased. Thereby, if there is a possibility that an abnormality has occurred in the second predetermined storage area, it becomes possible to erase the information in the second predetermined storage area regardless of the monitoring result by the second monitoring execution means.

Feature T6. The predetermined erasing means may erase information in the second predetermined storage area based on the second monitoring execution means specifying that the second predetermined storage area is abnormal. The gaming machine described in T4 or T5.

According to feature T6, when the first predetermined storage area is abnormal, the information in the first predetermined storage area is erased, so that the first predetermined process is executed while the first predetermined storage area is in an abnormal state. This makes it possible to prevent this from happening.

Feature T7. The predetermined erasing means erases the information in the second predetermined storage area based on the second monitoring execution means specifying that the second predetermined storage area is abnormal, and deletes the information in the first predetermined storage area. The gaming machine according to feature T6, characterized in that information in the area is erased.

According to feature T7, when the second predetermined storage area is abnormal, not only the second predetermined storage area but also the first predetermined storage area is erased. Thereby, if there is a possibility that an abnormality has occurred in the first predetermined storage area, it becomes possible to erase the information in the first predetermined storage area regardless of the monitoring result by the first monitoring execution means.

Feature T8. According to any one of features T4 to T7, the process for erasing information by the predetermined erasing means is performed in either one of the first predetermined process and the second predetermined process. gaming machines.

According to feature T8, the process of erasing information in each predetermined storage area based on the identification of an abnormality is performed collectively in one of the first predetermined process and the second predetermined process. This makes it possible to simplify the processing configuration compared to a configuration in which erasing information in each storage area is executed in a distributed manner in the first predetermined process and the second predetermined process.

Feature T9. The gaming machine according to any one of features T4 to T7, wherein a process for erasing information by the predetermined erasing means is executed in the first predetermined process.

According to feature T9, it becomes possible to collectively execute the process of erasing information in each predetermined storage area based on the identification of an abnormality in the first predetermined process.

Feature T10. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features T1 to T9, wherein the second predetermined process includes a process for managing a gaming history.

According to feature T10, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature T11. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature T11, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature T12. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature T11, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature T12, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to game results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature T13. The gaming machine according to feature T12, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature T13, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features T1 to T13, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature U group>
Feature U1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a flag register provided in the internal storage means when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed; state setting means (in the 26th embodiment, a function of executing the processing of steps S6202 to S6204 and step S6211 in the main CPU 63, and in the 27th embodiment, a step in the main CPU 63) A function to execute the processes of S6302 to S6307 and S6312);
A game machine characterized by comprising:

According to feature U1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the flag register of the internal storage means is The state is set to a specific state. This makes it possible to start the second predetermined process in a situation where the state of the flag register is in a predetermined specific state. Therefore, it becomes possible to suitably perform various controls.

Feature U2. The gaming machine according to feature U1, wherein the specific state is a state when supply of operating power to the control means is started.

According to feature U2, since the flag register is set to the state when the supply of operating power to the control means is started as the specific state, the processing configuration for setting the specific state can be simplified. It becomes possible.

Feature U3. The gaming machine according to feature U1 or U2, wherein the specific state is a state in which the flag register is cleared to "0".

According to feature U3, since the flag register is set to a cleared state of "0" as the specific state, it is possible to simplify the processing configuration for setting the specific state.

Feature U4. Means for causing the state of the flag register to become the specific state when or after the second predetermined process is completed (in the twenty-sixth embodiment, executing the processes of steps S6213 to S6218 in the main CPU 63) The gaming machine according to any one of features U1 to U3, characterized in that the gaming machine is equipped with a function (in the twenty-seventh embodiment, a function of executing the processing of steps S6314 to S6322 in the main CPU 63).

According to feature U4, the second predetermined process is executed not only when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation is such that the second predetermined process is executed. When or even if the process ends, the state of the flag register is set to a specific state. This makes it possible to restart the first predetermined process in a situation where the state of the flag register is in a predetermined specific state. Furthermore, it is possible to set the state of the flag register to a specific state before and after the second predetermined process. Therefore, it is possible to prevent the state of the flag register caused by one of the first predetermined process and the second predetermined process from affecting the other process.

Feature U5. comprising a predetermined storage means (main side RAM 65) in which information is temporarily stored when executing processing in the control means,
The state setting means includes:
Means for bringing the state of a predetermined storage area in the predetermined storage means into the specific state (in the twenty-sixth embodiment, a function for executing the processing of steps S6202 to S6204 in the main CPU 63; in the twenty-seventh embodiment, A function of executing the processing of steps S6302 to S6307 in the main CPU 63),
Means for causing the state of the flag register to become the specific state by storing information stored in the predetermined storage area in the flag register (in the twenty-sixth embodiment, the processing in step S6211 in the main CPU 63 is performed) (in the 27th embodiment, a function to execute the process of step S6312 in the main CPU 63),
The gaming machine according to any one of features U1 to U4, characterized by comprising:

According to feature U5, even if the configuration is such that it is not possible to directly set the state of the flag register to a specific state as a command of the control means, the flag is set by writing information to the predetermined storage means and reading the information. It becomes possible to set the state of the register to a specific state.

Feature U6. The predetermined storage means is
a stack area (stack area 222 for specific control) into which the control means can write information with a push command and into which the control means can read information with a pop command;
a work area (work area 221 for specific control) in which the control means can write and read information in accordance with a load command;
Equipped with
The gaming machine according to feature U5, wherein the predetermined storage area is provided in the stack area.

According to feature U6, even in a configuration in which information stored in the work area cannot be directly written to the flag register, the state of the flag register can be specified by using writing of information to the stack area and reading of the information. It is possible to set the status.

Feature U7. a predetermined register provided in the internal storage means when a situation in which the first predetermined process is being executed changes to a situation in which the second predetermined process is executed or a situation in which the second predetermined process is executed; (a function of executing steps S6205 to S6210 in the main CPU 63 in the 26th embodiment, a function of executing steps S6308 to S6311 in the main CPU 63 in the 27th embodiment) processing functions),
According to any one of features U1 to U6, the state setting means causes the state of the flag register to become the specific state after the state of the predetermined register is set to the predetermined state. Game machine.

The state of the flag register can change each time various processes are executed by the control means. In this case, according to feature U7, since the state of the flag register is set to the specific state after the state of the predetermined register is set to the predetermined state, the flag register becomes the specific state immediately before the second predetermined process is started. It becomes possible to make it seem that the

Feature U8. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is a means for making the state of the flag register become a specific state (in the twenty-sixth embodiment, a function of executing the processing of steps S6202 to S6204 and step S6211 in the main CPU 63, and in the twenty-seventh embodiment) A gaming machine characterized by having a function of executing the processing of steps S6302 to S6307 and step S6312 in the main CPU 63.

According to feature U8, it is possible to set the state of the flag register to a specific state as necessary.

Note that for the configuration of features U1 to U8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic group V>
Feature V1. It includes a control means (main CPU 63) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when executing the processing,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a flag register provided in the internal storage means when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed; evacuation execution means (in the 15th embodiment, the function of executing the process of step S3802 in the main CPU 63, and in the 16th embodiment, the function of executing the process of step S4402 in the main CPU 63) In the 20th embodiment, the function to execute the process in step S4802 in the main CPU 63, in the 28th embodiment, the function to execute the process in steps S6402 to S6405 in the main CPU 63, In the embodiment, a function of executing the processing of steps S6502 to S6509 in the main CPU 63);
When or after the second predetermined process is finished, return execution means (step S3804 in the main CPU 63 in the fifteenth embodiment) returns the information of the flag register saved in the predetermined storage means to the flag register; In the 16th embodiment, the function to execute the process in step S4404 in the main CPU 63, in the 20th embodiment, the function to execute the process in step S4810 in the main CPU 63, in the 28th embodiment (in the 29th embodiment, a function of executing the processing of steps S6407 to S6415 in the main CPU 63, and a function of executing the processing of steps S6511 to S6518 of the main CPU 63 in the 29th embodiment),
A game machine characterized by comprising:

According to feature V1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information in the flag register is stored in the predetermined memory. be evacuated by means. Thereby, when the second predetermined process is executed, it is possible to prevent the information stored in the flag register from being rewritten when the first predetermined process is executed. Furthermore, when or after the second predetermined process is finished, the information saved in the predetermined storage means is returned to the flag register. Thereby, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process based on the state of the flag register before execution of the second predetermined process. From the above, it becomes possible to perform various types of control suitably.

Feature V2. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The gaming machine according to feature V1, wherein the saving execution means saves the information in the flag register to the first predetermined storage area.

According to feature V2, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the storage destination of information in the predetermined storage means can be determined by the first predetermined process and the second predetermined process. It becomes possible to make a clear difference. Thereby, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information in the flag register is stored in the first predetermined storage area. will be evacuated to. This makes it possible to save the information in the flag register immediately before the second predetermined process is started, and also makes it possible to save the information without using the second predetermined storage area.

Feature V3. The first predetermined storage area is capable of storing and reading information when the first predetermined process is executed, and is capable of reading information when the second predetermined process is executed. Inability to remember information
The second predetermined storage area is capable of storing and reading information when the second predetermined process is executed, and is capable of reading information when the first predetermined process is executed. The gaming machine according to feature V2, characterized in that information cannot be stored.

According to feature V3, it is possible to treat the first predetermined storage area as a storage area dedicated to the first predetermined process, and it is also possible to treat the second predetermined storage area as a storage area dedicated to the second predetermined process. becomes.

Feature V4. The predetermined storage means is
a stack area (stack area 222 for specific control) into which information can be written with a push command and read out with a pop command;
a work area (work area 221 for specific control) in which information can be written and read by a load command;
Equipped with
The gaming machine according to any one of features V1 to V3, wherein the saving execution means saves the information in the flag register to one of the stack area and the work area.

According to feature V4, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the stack area in the second predetermined storage area The information of the flag register is saved in one of the work area and the work area. This makes it possible to consolidate information saving destinations, and to simplify the processing configuration for saving and the processing configuration for restoring information.

Feature V5. The gaming machine according to feature V4, wherein the saving execution means saves the information in the flag register to the work area.

According to feature V5, since the save destination of the information in the flag register is the work area, it becomes possible to save the information without cumulatively changing the stack pointer.

Feature V6. The evacuation execution means is
Means for storing the information of the flag register in a predetermined register provided in the internal storage means (in the twenty-eighth embodiment, a function of executing the processing of step S6402 and step S6403 in the main CPU 63; in the twenty-ninth embodiment, a main function) a function of executing the processing of steps S6502 to S6505 in the side CPU 63);
Means for storing information of the flag register stored in the predetermined register in the predetermined storage means (in the twenty-eighth embodiment, a function of executing the process of step S6404 in the main CPU 63, in the twenty-ninth embodiment, the main CPU 63 function of executing the process of step S6506);
The gaming machine according to any one of features V1 to V5, characterized by comprising:

According to feature V6, even if the configuration is such that the information in the flag register cannot be directly saved to the predetermined storage means as a command of the control means, writing of information to the predetermined register and predetermined information stored in the predetermined register are performed. By using writing to the storage means, it becomes possible to save the information in the flag register to a predetermined storage means.

Note that for the configuration of features V1 to V6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Feature W group>
Feature W1. Equipped with a control means (main CPU 63) that executes various processes,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Abnormal event monitoring means (program monitoring unit 252) that monitors whether an abnormal event is occurring;
It is possible to create a situation in which information erasure processing is performed on at least the first predetermined storage area based on the fact that the abnormal event has been identified by the abnormal event monitoring means. an erasing situation generating means (reset signal output section 251),
A gaming machine characterized by comprising:

According to feature W1, a first predetermined storage area and a second predetermined storage area are provided, and the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is treated as a dedicated storage area for the first predetermined process. It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. Further, based on the identification that an abnormal event has occurred, information erasure processing is performed on at least the first predetermined storage area. This makes it possible to prevent the first predetermined process from being executed while the information in the first predetermined storage area is held as is even though an abnormal event has occurred.

Feature W2. The control means includes:
Means for executing processing for storing power outage response information when the supply of operating power to the control means is stopped (in the 30th embodiment, a function for executing the processing of step S6709 and step S6710 in the main CPU 63) , in the 32nd embodiment, the function of executing the processing of steps S7609 to S7611 in the main CPU 63);
When the supply of operating power to the control means is started in a situation where the power outage response information is not stored and the process at the time of supply start is executed, the information erasing process is performed for at least the first predetermined storage area. means (in the 30th embodiment, the function of executing the processing of step S6607 in the main CPU 63, in the 31st embodiment, the function of executing the clearing process in the case of an abnormality in the main CPU 63; In the embodiment, a function of executing the processing of steps S7704, S7705, S7808, and S7810 in the main CPU 63);
Equipped with
The erasure situation generating means causes the control means to start the supply in a situation where the power outage response information is not stored, based on the fact that the abnormal event monitoring means has identified that the abnormal event has occurred. The gaming machine according to feature W1, characterized in that the processing at the time is executed.

According to feature W2, when the supply of operating power to the control means is started and the process at the time of supply start is executed in a situation where power outage response information is not stored, the information erasing process is performed at least in the first predetermined manner. By being executed on the storage area, the information in the first predetermined storage area is retained as is when the supply of operating power to the control means is started in a situation where the processing at the time of a power outage is not properly performed. It is possible to prevent the first predetermined process from being executed in the current state. In this case, based on the fact that it has been identified that an abnormal event has occurred, the control means executes the process at the time of supply start in a situation where power outage response information is not stored. As a result, by utilizing a configuration that executes information erasure processing when the control means executes processing at the time of supply start in a situation where power outage response information is not stored, information is stored in response to the occurrence of an abnormal event. It becomes possible to execute the erasing process.

Feature W3. The control means executes various processes when receiving a reset signal, and is configured to perform various processing when receiving the reset signal in a situation where operating power is being supplied but not receiving the reset signal. The processing at the time of supply start is started based on the situation where
The erasure situation generating means is configured to cause the control means to set a state in which the reset signal is not received based on the fact that the abnormal event monitoring means has identified that the abnormal event has occurred. The gaming machine according to feature W2, wherein the gaming machine receives the reset signal.

According to feature W3, the excellent effects described above can be achieved by switching the reception state of the reset signal.

Feature W4. The control means is configured to temporarily store information in an internal storage means (a register and a program counter of the main CPU 63) when executing a process, and stores information stored in the internal storage means in the first predetermined storage. It is a configuration that can be temporarily evacuated to an area,
The abnormal event monitoring means monitors whether an abnormality has occurred in the information stored in the internal storage means as the abnormal event,
Any one of features W1 to W3, wherein the erasing situation generating means generates a situation in which the erasing process of the information is performed on at least both the first predetermined storage area and the internal storage means. The gaming machine described in .

According to feature W4, since the information stored in the internal storage means can be temporarily saved to the first predetermined storage area, when an abnormality occurs regarding the information stored in the internal storage means, the first predetermined storage area is saved. 1. There is also a possibility that an abnormality has occurred in the information stored in the predetermined storage area. In this case, if an abnormality occurs with respect to the information stored in the internal storage means, information deletion processing is performed not only on the internal storage means but also on the first predetermined storage area. This makes it possible to prevent the first predetermined process from being executed in that state even though an abnormality has occurred with respect to the information stored in the first predetermined storage area.

Feature W5. The erasure status generating means prevents the information erasure process from being executed on the second predetermined storage area even if the abnormal event monitoring means identifies that the abnormal event has occurred. The gaming machine according to any one of features W1 to W4.

According to feature W5, even if an abnormal event occurs, information can be stored and retained in the second predetermined storage area.

Feature W6. The erasure status generating means is configured to erase the information based on the fact that the abnormal event monitoring means has identified that the abnormal event has occurred. The gaming machine according to any one of features W1 to W4, characterized in that the gaming machine generates a situation in which the game is executed for both of the following.

According to feature W6, information deletion processing is performed on both the first predetermined storage area and the second predetermined storage area based on the identification that an abnormal event has occurred. This makes it possible to prevent the first predetermined process from being executed with the information in the first predetermined storage area being retained as is even though an abnormal event has occurred, and also to It is possible to prevent the second predetermined process from being executed while the information in the second predetermined storage area is retained as it is even though the information in the second predetermined storage area is retained.

Feature W7. The information erasing process for the first predetermined storage area is executed in the first predetermined process, and the information erasing process for the second predetermined storage area is executed in the second predetermined process. The gaming machine according to feature W6.

According to feature W7, also regarding the information erasure process, the first predetermined storage area is treated as a storage area dedicated to the first predetermined process, and the second predetermined storage area is treated as a storage area dedicated to the second predetermined process. This makes it possible to

Feature W8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features W1 to W7, wherein the second predetermined process includes a process for managing a gaming history.

According to feature W8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature W9. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature W9, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature W10. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature W9, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature W10, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to gaming results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature W11. The gaming machine according to feature W10, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature W11, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features W1 to W11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics Group X>
Features X1. Equipped with a control means (main CPU 63) that executes various processes,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
Equipped with
The second predetermined process execution means is configured to perform erasure execution means ( In the 25th embodiment, the main CPU 63 has a function to execute the process of step S6103 and step S6107, in the 30th embodiment, the main CPU 63 has a function to execute the process of step S7204, and in the 31st embodiment, the main CPU 63 (a function of executing the process of step S7508 in the 32nd embodiment, a function of executing the process of step S7808 and step S7810 in the main CPU 63).

According to feature X1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted.

In addition, when an erasure trigger occurs, information deletion processing is executed for the second predetermined storage area, so even if some abnormality has occurred in the second predetermined storage area, the second predetermined storage area This makes it possible to prevent the second predetermined process from being executed while the information is retained as is. Further, since the information deletion process is executed in the second predetermined process, it is possible to prevent the first predetermined process from intervening in updating the information in the second predetermined storage area.

Features X2. The erasure execution means executes the information erasure process on the second predetermined storage area while preventing non-erasure target information (management monitoring flag, return address information, information on various registers) from being erased. The gaming machine described in feature X1.

According to feature X2, the information erasing process for the second predetermined storage area is performed while ensuring that non-erasure target information in the second predetermined storage area is not erased. This makes it possible to perform the information erasing process on the second predetermined storage area while preventing even necessary information from being erased.

Feature X3. The second predetermined process execution means is configured to execute the second predetermined process when a situation in which the first predetermined process is executed changes to a situation in which the second predetermined process is executed or a situation in which the second predetermined process is executed. Storage execution means (in the 30th embodiment A function to execute the processing of steps S7102 to S7107 in the main CPU 63, a function to execute the processing of steps S7502 to S7507 in the main CPU 63 in the 31st embodiment, and a function to execute the processing of step S7802 in the main CPU 63 in the 32nd embodiment. - a function to execute the process of step S7807),
The game according to feature Machine.

According to the feature It becomes possible to perform information deletion processing on the storage area.

Features X4. The storage execution means stores, as the return correspondence information, information on a return address of the program when the second predetermined process ends and the program returns to the first predetermined process in the second predetermined storage area. The gaming machine according to feature X3.

According to feature X4, since the information erasing process is executed on the second predetermined storage area while preventing the information of the return address of the program from being erased when returning to the first predetermined process, the second predetermined storage area Even if the information erasing process is executed on the program, it is possible to return to the predetermined program in the first predetermined process when the second predetermined process is completed.

Features X5. The control means is configured to temporarily store information in an internal storage means (register of the main CPU 63) when executing the process,
The gaming machine according to feature X3 or X4, wherein the storage execution means stores the information stored in the internal storage means in the second predetermined storage area as the return correspondence information.

According to the feature On the other hand, even if the information deletion process is executed, the information used in the first predetermined process can be restored to the internal storage means when the second predetermined process is completed.

Features X6. The erasure execution means causes the information erasure process to be executed on the second predetermined storage area based on the occurrence of an abnormality in the second predetermined storage area, as the occurrence of the erasure trigger. The gaming machine according to any one of features X1 to X5.

According to feature X6, based on the occurrence of an abnormality in the second predetermined storage area, information deletion processing is executed for the second predetermined storage area, so that the abnormality occurs in the second predetermined storage area. This makes it possible to prevent the second predetermined process from being executed while the user is in the current state.

Feature X7. The second predetermined process execution means executes the second predetermined process by monitoring whether or not the second predetermined storage area is normal (in the thirtieth embodiment, the second predetermined process execution means monitors whether or not the second predetermined storage area is normal) The gaming machine according to feature X6, characterized in that the gaming machine has a function of executing processing.

According to feature X7, not only the information deletion process for the second predetermined storage area but also the monitoring of whether or not the second predetermined storage area is normal is performed in the second predetermined process without intervening the first predetermined process. Therefore, it is possible to execute monitoring whether the second predetermined storage area is normal or not and executing the information erasing process for the second predetermined storage area as a series of processes in the second predetermined process. .

Features X8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features X1 to X7, wherein the second predetermined process includes a process for managing a gaming history.

According to feature X8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Features X9. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature X9, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Features X10. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature

According to feature X10, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to gaming results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Features X11. The gaming machine according to feature X10, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature X11, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features X1 to X11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristics Y group>
Feature Y1. Equipped with a control means (main CPU 63) that executes various processes,
The control means is
a first predetermined process execution means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process execution means for executing a second predetermined process among the various processes (a function for executing a management execution process in the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
A first calculation means for calculating first reference numerical information corresponding to a plurality of pieces of information stored in the first predetermined storage area (in the 30th embodiment, the main CPU 63 executes the processes of step S6604 and step S6710) function, in the 31st embodiment, the function of executing the process of step S7304 in the main CPU 63, and in the 32nd embodiment, the function of executing the process of step S7610 and step S7701 in the main CPU 63),
A gaming machine characterized by comprising:

According to feature Y1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a storage area dedicated to the second predetermined process. This makes it possible to clearly differentiate the storage location of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when executing one of the first predetermined process and the second predetermined process, it is possible to prevent information used in the other process from being deleted. In this case, first reference numerical information corresponding to a plurality of pieces of information stored in the first predetermined storage area is calculated. By using the first reference numerical information, it becomes possible to specify whether an information abnormality has occurred only in the first predetermined storage area.

Feature Y2. Information erasing means for performing information erasing processing on the first predetermined storage area based on identifying the occurrence of an abnormality with respect to the first reference numerical information calculated by the first calculating means; (In the 30th embodiment, the function of executing the process of step S6607 in the main side CPU 63, in the 31st embodiment, the function of executing the process of step S7401 and step S7402 in the main side CPU 63, and in the 32nd embodiment, the function of executing the process of step S7407 in the main side CPU 63 The gaming machine according to feature Y1, characterized in that the gaming machine is equipped with a function of executing the processing of step S7704 and step S7705 in the CPU 63.

According to feature Y2, when the occurrence of an abnormality with respect to the first reference numerical information is identified, information deletion processing is executed for the first predetermined storage area, so that even though an information abnormality has occurred, First, it is possible to prevent the first predetermined process from being executed while the information in the first predetermined storage area is retained as is.

Feature Y3. The first calculation means is
a first power outage calculation unit that calculates the first reference numerical information when the supply of operating power to the control unit is stopped (in the 30th embodiment, a function of executing the process of step S6710 in the main CPU 63; In the 32nd embodiment, a function of executing the process of step S7610 in the main CPU 63),
A first power-on calculation means (in the 30th embodiment, a function of executing the process of step S6604 in the main CPU 63) that calculates the first reference numerical information when the supply of operating power to the control means is started. , in the 31st embodiment, the function of executing the process of step S7304 in the main side CPU 63, and in the 32nd embodiment, the function of executing the process of step S7701 in the main side CPU 63),
Equipped with
The information erasing means is based on the fact that the first reference numerical information calculated by the first power outage calculation means and the first reference numerical information calculated by the first power on calculation means do not match. , the gaming machine according to feature Y2, wherein the information erasing process is executed on at least the first predetermined storage area.

According to feature Y3, it is possible to determine whether or not the information in the first predetermined storage area is stored and retained even when the supply of operating power is stopped by calculating the first reference numerical information. becomes. If the information in the first predetermined storage area is not stored and retained after the supply of operating power is stopped, information deletion processing is executed for the first predetermined storage area, so that an information error occurs. It is possible to prevent the first predetermined process from being executed while the information in the first predetermined storage area is held as is despite the occurrence of the above.

Feature Y4. The information erasing means does not perform erasing processing of the information on the second predetermined storage area even if the occurrence of an abnormality is identified regarding the first reference numerical information calculated by the first calculation means. The gaming machine according to feature Y2 or Y3.

According to feature Y4, when the occurrence of an abnormality is identified regarding the first reference numerical information, information deletion processing is executed for the first predetermined storage area, while information deletion processing is performed for the second predetermined storage area. Processing is not executed. This makes it possible to prevent even the information in the second predetermined storage area from being erased in a situation where an information abnormality occurs in the first predetermined storage area.

Feature Y5. The gaming machine according to any one of features Y1 to Y4, wherein the first reference numerical information is information that does not change depending on the information stored in the second predetermined storage area.

According to feature Y5, in a configuration in which a first predetermined storage area and a second predetermined storage area exist, it is possible to individually identify information abnormalities regarding the first predetermined storage area using the first reference numerical information. It becomes possible.

Feature Y6. A second calculation means (a function for executing the processing of step S7611 and step S7706 in the main CPU 63) is provided for calculating second reference numerical information corresponding to a plurality of pieces of information stored in the second predetermined storage area. The gaming machine according to any one of features Y1 to Y5.

According to feature Y6, second reference numerical information corresponding to a plurality of pieces of information stored in the second predetermined storage area is calculated. By using the second reference numerical information, it is possible to specify whether an information abnormality has occurred only in the second predetermined storage area.

Feature Y7. means for performing information erasure processing on at least the second predetermined storage area based on the identification of the occurrence of an abnormality with respect to the second reference numerical information calculated by the second calculation means; The gaming machine according to feature Y6, characterized in that the gaming machine is equipped with a function of executing the processing of step S7808 and step S7810 in the main CPU 63.

According to feature Y7, when the occurrence of an abnormality with respect to the second reference numerical information is identified, information deletion processing is performed on the second predetermined storage area, so that even though an information abnormality has occurred, First, it is possible to prevent the second predetermined process from being executed while the information in the second predetermined storage area is retained as is.

Feature Y8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features Y1 to Y7, wherein the second predetermined process includes a process for managing a gaming history.

According to feature Y8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It becomes possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature Y9. The second predetermined storage area includes a history storage area (normal counter area 231, opening/closing execution mode counter area 232) in which game history information corresponding to a predetermined event occurring as a result of a game being executed is stored. , a high-frequency support mode counter area 233).

According to feature Y9, when a predetermined event occurs, history information corresponding to it is stored in the history storage area. This makes it possible for gaming machines to store and retain information for managing the number of occurrences or frequency of occurrence of predetermined events, and by using this managed information, it is possible to better manage the frequency of occurrence of predetermined events. It becomes possible to do so. Further, by storing the history information in the gaming machine itself, it is possible to prevent unauthorized access to or unauthorized modification of the history information. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the history storage area from being rewritten during execution.

Feature Y10. The second predetermined process execution means is an information derivation means (step S4208 in the main CPU 63) that derives mode information corresponding to the result of the game in a predetermined period using the history information stored in the history storage area. The gaming machine according to feature Y9, characterized in that the gaming machine is equipped with a function of executing the processing of (a).

According to feature Y10, the game history, such as the frequency of occurrence of predetermined events, can be managed by deriving mode information corresponding to gaming results in a predetermined period using history information stored in the history storage area. It becomes possible to understand the results.

Feature Y11. The gaming machine according to feature Y10, wherein the second predetermined storage area includes a mode information storage area (calculation result storage area 234) that stores the mode information derived by the information derivation means.

According to feature Y11, when mode information corresponding to game results in a predetermined period is derived using history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the gaming history management results at any time. In addition, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, so that the process for controlling the progress of the game is executed. It becomes possible to prevent the information stored in the mode information storage area from being rewritten during execution.

Note that for the configuration of features Y1 to Y11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the above feature T group, the above feature U group, the above feature V group, the above feature W group, the above feature X group, and the above feature Y group, it is possible to solve the following problems.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately perform various controls, and there is still room for improvement in this respect.

<Characteristics Z group>
Feature Z1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Situation generation means for creating a setting enable situation in which the setting value to be used can be set by the setting means (function for executing the processing of step S7905, step S7916, and step S7917 in the main CPU 63) and,
In a situation where the supply of operating power to the control means (main CPU 63) having the setting means is started and the process at the time of supply start is being executed, the setting value of the target to be used in a situation where the setting is not possible is determined. A setting notification means (a function for executing a setting confirmation process in the main CPU 63) for causing notification to be performed;
A gaming machine characterized by comprising:

According to feature Z1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage, the player can use the more advantageous setting value. It is to be expected that In this case, in order to check the set value that is set to be used, it is necessary to temporarily stop the supply of operating power to the control means and then restart the supply of operating power to the control means. . This makes it difficult to illegally check the setting values. Further, since the setting value is notified while the supply start process is being executed, there is no need to notify the setting value in a situation where the game is interrupted. Therefore, it becomes possible to appropriately notify the setting value.

Feature Z2. The gaming machine according to feature Z1, wherein the situation generation means causes the settable situation to occur in a situation where the supply start process is being executed.

According to feature Z2, a setting possible situation in which setting values to be used can be set and a situation in which setting values to be used are notified in situations where settings are not possible are defined at the time of supply start. It becomes possible to summarize the situation in which processing is being executed.

Feature Z3. comprising a first identifying means (a function of executing the processing of step S7912 and step S7916 in the main CPU 63) for identifying the occurrence of the first trigger event,
The setting notification means is configured to enable the setting based on the situation where the process at the time of supply start is being executed and the occurrence of the first trigger event has been specified by the first specifying means. The gaming machine according to feature Z1 or Z2, characterized in that the setting value of the object to be used is notified in a situation other than the current situation.

According to feature Z3, in order to notify the setting value to be used, it is necessary not only to start supplying operating power to the control means but also to generate a first trigger event. This makes it difficult to illegally check the setting values.

Feature Z4. The gaming machine according to feature Z3, wherein the first trigger event is that a predetermined operation with a setting key is performed on a setting key insertion section (setting key insertion section 68a).

According to feature Z4, in order to notify the setting of the target to be used, it is necessary to perform a predetermined operation using the setting key on the setting key insertion section. This makes it difficult to illegally check the setting values.

Feature Z5. The setting notification means satisfies the notification condition based on the situation in which the process at the time of supply start is being executed and the occurrence of the first trigger event has been specified by the first identification device. In this case, the setting value of the target to be used is notified in a situation where the setting is not possible,
The situation generating means satisfies the setting condition based on the situation where the process at the time of supply start is being executed and the occurrence of the first triggering event has been specified by the first specifying means. When the above setting is possible,
The gaming machine according to feature Z3 or Z4, wherein the notification condition and the setting condition are different.

According to feature Z5, in both cases of generating a settable situation and notifying a setting value to be used, not only the supply of operating power to the control means is started, but also the first trigger event is triggered. need to occur. As a result, it is possible to make it difficult to fraudulently set a setting value to be used, and to fraudulently attempt to confirm a setting value to be used. On the other hand, because the setting conditions for generating a configurable situation and the notification conditions for notifying the setting value to be used are different, the situation in which the configurable situation and the setting value to be used are announced is different. It becomes possible to cause either one of these to occur independently.

Feature Z6. comprising a second identifying means (a function of executing the process of step S7905 in the main CPU 63) for identifying the occurrence of the second trigger event,
The setting condition is a situation in which the occurrence of the first trigger event is specified by the first specifying means in a situation where the process at the time of supply start is being executed, and the occurrence of the first trigger event is specified by the second specifying means. Established on the basis that the occurrence of the triggering event is specified,
The notification condition is a situation in which the first specifying means has specified the occurrence of the first trigger event in a situation where the supply start process is being executed, and the second specifying means has specified the second trigger event. The gaming machine according to feature Z5, characterized in that the trigger event is established based on a situation in which the occurrence of the trigger event is not specified.

According to feature Z6, in order to generate the settable situation, it is necessary to start supplying operating power to the control means and not only to generate the first trigger event but also to generate the second trigger event. As a result, whether the set value to be used is set or the set value to be used is notified, it not only starts supplying operating power to the control means. In a configuration in which it is necessary to generate a first trigger event, it is possible to make the operation for generating a settable situation more complicated. Therefore, it becomes possible to more intensively prevent acts of attempting to set setting values to be used illegally.

Feature Z7. The gaming machine according to feature Z6, wherein the second trigger event is that a predetermined operation means (reset button 68c) is operated.

According to feature Z7, in order to generate the settable situation, it is necessary not only to start supplying operating power to the control means and to generate the first trigger event, but also to operate the predetermined operation means. This makes it difficult for people to illegally set setting values to be used, while also preventing the operations to legitimately create a setting-enabled situation from becoming excessively complicated. becomes possible.

Feature Z8. Information erasing means ( The gaming machine according to feature Z6 or Z7, further comprising a function of executing the process of step S7915 in the main CPU 63.

According to feature Z8, the conditions for generating a settable situation and the setting values to be used in a situation that is not a settable situation are established by using the second trigger event necessary to execute the information deletion process. It becomes possible to make the conditions for making the notification different.

Feature Z9. The gaming machine according to feature Z8, wherein the information erasing means executes the information erasing process even when the setting possible situation occurs.

According to feature Z9, it is possible to execute the information deletion process when the setting becomes possible.

Feature Z10. A situation in which the occurrence of the second triggering event is specified by the second specifying means in a situation where the process at the time of supply start is being executed, and the occurrence of the first triggering event is specified by the first specifying means. The gaming machine according to feature Z8 or Z9, characterized in that if the setting is not possible, the information erasing means executes the information erasing process even though the setting is not possible.

According to feature Z10, depending on whether or not the first trigger event is generated when the supply of operating power to the control means is started, information erasure processing is executed and a setting possible state is reached; It is possible to select a case where the deletion process is executed but the setting is not possible.

Note that for the configuration of features Z1 to Z10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

<Characteristic group a>
Feature a1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Situation generation means for creating a setting enable situation in which the setting value to be used can be set by the setting means (function for executing the processing of step S7905, step S7916, and step S7917 in the main CPU 63) and,
an information erasing means (a function that executes the process of step S7915 in the main CPU 63) that executes information erasing processing;
a setting notification means (a function for executing a setting confirmation process in the main CPU 63) for notifying the setting value of the usage target in a situation where the setting is not possible;
a first specifying means for specifying the occurrence of a first trigger event (a function of executing the processes of step S7912 and step S7916 in the main CPU 63);
a second specifying means for specifying the occurrence of the second trigger event (a function for executing the process of step S7905 in the main CPU 63);
Equipped with
The situation generating means specifies that the first triggering event occurs in a situation where the supply of operating power to the control means having the setting means is started and processing at the time of supply start is being executed, by the first specifying means. and the occurrence of the second triggering event is specified by the second specifying means, so that the setting possible situation is set;
The information erasing means performs the information erasing process based on the fact that the second specifying means has identified the occurrence of the second trigger event in the situation where the supply start process is being executed. Run
A situation in which the occurrence of the second triggering event is specified by the second specifying means in a situation where the process at the time of supply start is being executed, and the occurrence of the first triggering event is specified by the first specifying means. If the situation is such that the setting is not possible, the information erasing means executes the information erasing process, although the setting is not possible.
The setting notification means is configured to detect the occurrence of the first trigger event in a situation where the first specifying means specifies the occurrence of the first trigger event in a situation where the supply start process is being executed, and the second specifying device specifies the second trigger event. A gaming machine characterized in that, based on a situation in which the occurrence of a triggering event is not specified, notification of the setting value of the target to be used in a situation where the setting is not possible is performed.

According to feature a1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Furthermore, since the configuration allows information erasure processing to be executed, it is possible to prevent a game from being played even though an information abnormality has occurred. Furthermore, since the configuration is such that the setting values that are set to be used can be notified, it becomes possible to confirm the setting values.

In this case, in order to confirm the set value that is set to be used, it is necessary to start supplying operating power to the control means and to generate a first trigger event. This makes it difficult to illegally check the setting values.

In addition, in order to generate a settable situation, it is necessary to start supplying operating power to the control means and to generate not only the first trigger event but also the second trigger event. As a result, whether the set value to be used is set or the set value to be used is notified, it not only starts supplying operating power to the control means. In a configuration in which it is necessary to generate a first trigger event, it is possible to make the operation for generating a settable situation more complicated. Therefore, it becomes possible to more intensively prevent acts of attempting to set setting values to be used illegally.

In addition, by using the second trigger event necessary to execute the information deletion process, the conditions for generating a setting possible situation and the setting values to be used in situations where the setting is not possible are announced. This makes it possible to vary the conditions for achieving this.

Also, depending on whether or not the first trigger event occurs when the supply of operating power to the control means is started, the information deletion process may be executed and the setting becomes possible, or the information deletion process may be executed. It becomes possible to select whether or not the settings will be executed.

Feature a2. The gaming machine according to feature a1, wherein the first trigger event is that a predetermined operation using a setting key is performed on a setting key insertion section (setting key insertion section 68a).

According to feature a2, in order to notify the setting of the target to be used, it is necessary to perform a predetermined operation using the setting key on the setting key insertion section. This makes it difficult to illegally check the setting values.

Feature a3. The gaming machine according to feature a1 or a2, wherein the second trigger event is that a predetermined operation means (reset button 68c) is operated.

According to feature a3, in order to generate the settable situation, it is necessary not only to start supplying operating power to the control means and to generate the first trigger event, but also to operate the predetermined operation means. This makes it difficult for people to illegally set setting values to be used, while also preventing the operations to legitimately create a setting-enabled situation from becoming excessively complicated. becomes possible.

Note that for the configuration of features a1 to a3, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature Z group and the feature a group, the following problems can be solved.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, there is a need for a configuration that can suitably confirm the setting values that determine the advantage of the gaming machine, and there is still room for improvement in this regard. .

<Characteristic group b>
Feature b1. a setting means (a function for executing setting value update processing in the main CPU 63) for setting a setting value to be used from among setting values in multiple stages corresponding to the player's advantage level;
Situation generation means for creating a setting enable situation in which the setting value to be used can be set by the setting means (function for executing the processing of step S7905, step S7916, and step S7917 in the main CPU 63) and,
a setting monitoring means (a function of executing the process of step S8220 in the main CPU 63) that executes a setting monitoring process for monitoring whether the setting value of the target to be used is abnormal;
Equipped with
A gaming machine characterized in that the setting monitoring process is not included in the process at the start of supply that is executed when the supply of operating power to the control means having the setting means is started.

According to feature b1, since the configuration is such that the setting value to be used is set from among the setting values in multiple stages corresponding to the player's advantage level, the player can use the more advantageous setting value. It is to be expected that Further, since a setting monitoring process is executed to monitor whether or not the setting value to be used is abnormal, it is possible to deal with it if the setting value to be used is abnormal. Moreover, since the setting monitoring process is not included in the process at the time of starting supply, it is possible to achieve the above-mentioned excellent effects while preventing the processing load of the process at the time of starting supply from increasing.

Feature b2. The gaming machine according to feature b1, wherein the situation generating means generates the settable situation in a situation where the supply start process is being executed.

According to feature b2, since the setting possible situation occurs in a situation where the processing at the start of supply is being executed, it is possible to set the setting value to be used before the game starts. . In this case, since the setting value to be used is set in the process at the start of supply, the processing load of the process at the start of supply increases accordingly. On the other hand, with the configuration of feature b1 above, since the settings monitoring process is not included in the process at the start of supply, the processing load of the process at the start of supply is not further increased, and the It becomes possible to monitor whether or not the set value is abnormal.

Feature b3. The gaming machine according to feature b1 or b2, wherein the setting monitoring means executes the setting monitoring process after the process at the time of starting supply is completed.

According to feature b3, since the setting monitoring process is executed after the process at the start of supply is completed, the setting value to be used is detected to be abnormal while preventing the processing load of the process at the start of supply from increasing. It becomes possible to monitor whether the

Feature b4. The gaming machine according to feature b3, wherein the setting monitoring means executes the setting monitoring process every time a monitoring opportunity occurs after the supply start process is completed.

According to feature b4, since the setting monitoring process is executed every time a monitoring opportunity occurs after the process at the start of supply is completed, it becomes easier to identify that the setting value to be used is abnormal.

Feature b5. A means for executing periodically activated interrupt processing (a function for executing the first timer interrupt processing in the main CPU 63),
The gaming machine according to any one of features b1 to b4, wherein the interrupt processing includes the setting monitoring processing.

According to feature b5, since the setting monitoring process is executed every time the device is periodically activated, it is possible to increase the frequency of monitoring whether or not the setting value to be used is abnormal.

Feature b6. The setting monitoring means is a means for regulating the progress of the game (step S8207 and The gaming machine according to any one of features b1 to b5, characterized in that the gaming machine is equipped with a function of executing the process of step S8302.

According to feature b6, the progress of the game is regulated when it is identified that the setting value to be used is abnormal, so the game is not continued even though the setting value to be used is abnormal. It is possible to prevent this from happening.

Feature b7. The setting monitoring means is configured to provide a notification that allows the player to recognize that the setting possible situation should occur based on the fact that the setting value of the target to be used is determined to be abnormal in the setting monitoring process. The gaming machine according to any one of features b1 to b6, characterized in that the gaming machine is provided with a means for executing the process (a function of executing the process of step S8303 in the main CPU 63).

According to feature b7, when it is specified that the setting value of the target to be used is abnormal, a notification is executed that allows the player to recognize that a setting possible situation should occur. If the value becomes abnormal, it is possible to prompt the manager of the game hall to resolve it.

Note that for the configuration of features b1 to b7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, and features H1 to H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, Features S1 to S8, Features T1 to T13, Features U1 to U8, Features V1 to V6, Features W1 to W11, Features X1 to X11, Features Y1 to Y11, Features Z1 to Z10, Features a1 to a3, Features b1 to Any one or more configurations of b7 may be applied. Thereby, it becomes possible to produce a synergistic effect by the combined configuration.

According to the invention related to the feature b group described above, it is possible to solve the following problems.

Pachinko gaming machines, slot machines, and the like are known as gaming machines. For example, a pachinko game machine is equipped with a tray storage section on the front side of the machine for storing game balls given to players, and the game balls stored in the tray storage section are guided to a game ball firing device. , is fired toward the gaming area in response to the player's firing operation. For example, when a game ball enters the ball entry section provided in the game area, the game ball is paid out from the payout device to the tray storage section, for example. Furthermore, in a pachinko game machine, a configuration is known in which the tray storage section includes an upper tray storage section and a lower tray storage section, and in this case, the game balls stored in the upper tray storage section are fired. Guided by the device, surplus game balls in the upper tray storage section are discharged to the lower tray storage section.

Furthermore, in the slot machine, when a start lever is operated to start a new game while medals are being bet, a lottery process is executed by the control means. In addition, when the lottery process is executed, the control means executes rotation start control to start the rotation of the reels, and when the stop button is operated while the reels are rotating, the control means executes rotation start control. Rotation of the reel is stopped by executing the rotation stop control. Then, if the stop result after the reels stop rotating corresponds to a winning combination in the lottery process, a benefit corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to suitably manage the setting values that determine the advantage of the gaming machine, and there is still room for improvement in this respect.

Below, the basic configuration of a gaming machine to which each of the above features can be applied or is applied to each feature will be shown.

Pachinko game machine: an operating means operated by a player, a game ball firing means that fires a game ball based on the operation of the operating means, a ball path that guides the fired game ball to a predetermined gaming area, A game machine comprising game parts arranged within a region, and giving a bonus to a player when a game ball passes through a predetermined passage part of each game part.

A reel-type gaming machine such as a slot machine: equipped with a pattern display device that variably displays a plurality of symbols, the variable display of the plurality of symbols is started due to the operation of the start operation means, and the variable display of the plurality of symbols is started due to the operation of the stop operation means. A gaming machine in which variable display of the plurality of symbols is stopped after the display is stopped or after a predetermined period of time has elapsed, and a bonus is given to a player according to the symbols after the stoppage.

DESCRIPTION OF SYMBOLS 10... Pachinko machine, 12... Game machine main body, 14... Front door frame, 28... Launch operation device, 33... First operating port, 34... Second operating port, 35... Through gate, 49a... Gate detection sensor, 63... Main side CPU, 65... Main side RAM, 68a... Setting key insertion section, 68b... Update button, 68c... Reset button, 69a... Display device for first notification, 69b... Display device for second notification, 69c... Third notification 112...Management CPU, 117...Memory for history, 171...Memory for separate storage, 181-186...Memory for history for settings 1-6, 191...Memory for first history, 192...Second history memory, 201...first notification display device, 201a-201g...display segment, 202...second notification display device, 202a-202g...display segment, 203...third notification display device, 204...fourth Notification display device, 221... Work area for specific control, 222... Stack area for specific control, 223... Work area for non-specific control, 224... Stack area for non-specific control, 231... Normal counter area, 232... Counter area for opening/closing execution mode, 233... Counter area for high frequency support mode, 234... Calculation result storage area, 241... RAM for management, 251... Reset signal output section, 252... Program monitoring section.

Claims (1)

comprising a control means for executing various processes and temporarily storing information in an internal storage means when executing the processes;
The control means is
a first predetermined process execution means for executing a first predetermined process among the various processes;
a second predetermined process execution means for executing a second predetermined process among the various processes;
a flag register provided in the internal storage means when the situation changes from the situation where the first predetermined process is executed to the situation where the second predetermined process is executed, or when the situation changes to a situation where the second predetermined process is executed; a state setting means for setting the state to a specific state;
A gaming machine characterized by comprising:

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