JP7140172B2 - game machine - Google Patents

Description

The present invention relates to gaming machines.

Pachinko game machines, slot machines, and the like are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray reservoir are discharged to the lower tray reservoir by being guided by the device (see Patent Document 1, for example).

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

JP 2009-261415 A

Here, in the game machines such as the above examples, etc., it is necessary to make the configuration regarding the setting and confirmation of the set values suitable, and there is still room for improvement in this respect.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a game machine capable of providing a suitable configuration for setting and confirming setting values .

In order to solve the above problems, the invention according to claim 1 provides a setting means for setting a set value corresponding to the player's advantage,
a situation generating means for creating a settable situation in which setting values can be set by the setting means;
information erasing means for executing information erasing processing;
setting notification means for notifying a setting value to be used in a situation in which the setting is not possible;
a first identification means for identifying that a predetermined operation is being performed using the setting key on the setting key insertion portion;
a second identifying means for identifying that the predetermined operating means is being operated;
a history storage execution means for storing history information of a game corresponding to a predetermined event occurring by executing a game in a history storage means;
information derivation means for deriving mode information corresponding to a game during a predetermined period by using the history information stored in the history storage means;
display control means for controlling display of the mode information derived by the information derivation means on the information display means in a predetermined mode display;
with
The situation generation means uses the setting key to the setting key insertion section in a situation where the supply of operating power to the control means having the setting means is started and the process at the time of supply start is being executed. Based on the fact that it is specified by the first specifying means that the predetermined operation is being performed and that the second specifying means is specifying that the predetermined operation means is being operated. , so as to be in the configurable state,
a situation in which it is not specified by the first specifying means that the predetermined operation is being performed using the setting key on the setting key insertion portion while the process at the time of supply start is being executed; Based on the fact that it is specified by the second specifying means that the predetermined operating means is being operated, the information deleting process is executed by the information deleting means even though the setting is not possible. ,
The setting notifying means specifies, by the first specifying means, that the predetermined operation is being performed using the setting key on the setting key insertion portion in a situation where the process at the time of supply start is being executed. and the operation of the predetermined operation means is not specified by the second specifying means, the setting value of the use object in the situation where the setting is not possible is performed. It is a configuration that allows notification to be performed,
The control means is
Predetermined internal storage means for temporarily storing information upon execution of processing;
In-area processing executing means for executing in-area processing, which is processing using a program stored in a storage area of a predetermined address range in the program storage means;
an out-of-area process execution means for executing an out-of-area process, which is a process using a program stored in a storage area of an address range outside the predetermined address range in the program storage means;
saving executing means for saving information stored in the predetermined internal storage means to a saving storage means when or after the out-of-area processing is started;
a return execution means for returning the information saved in the save storage means to the predetermined internal storage means when or after the out-of-area processing is finished;
with
When the supply start process is started by the control means, a process included in the intra-region process is executed,
The processing by the situation generating means, the processing by the setting notification means, and the information erasing process by the information erasing means are included in the intra-area process ,
A predetermined setting process for setting data that enables the display control means to perform the predetermined mode display is included in the outside area process,
The configuration is such that the information display means notifies the set value in the settable state,
The in-area process executing means comprises means for executing, as the in-area process, an output process for notifying the set value by the information display means in the settable state. Characterized by

According to the present invention, it is possible to provide a suitable configuration for setting and confirming setting values .

1 is a perspective view showing a pachinko machine according to a first embodiment; FIG. 1 is an exploded perspective view showing the main components of a pachinko machine; FIG. It is a front view which shows the structure of a game board. It is an explanatory view for explaining the configuration related to the discharge of the game ball that has flowed down the game area. It is a front view of a main controller. 1 is a block diagram showing an electrical configuration of a pachinko machine; FIG. It is an explanatory view for explaining the contents of various counters used for winning or losing lottery. FIG. 4 is an explanatory diagram for explaining various tables stored in a main-side ROM; It is a flowchart which shows the main process performed by main side CPU. It is a flowchart which shows the setting value update process performed by main side CPU. It is a flowchart which shows the timer interrupt processing performed by main side CPU. It is a flowchart which shows the special figure special electric control processing performed by main side CPU. It is a flow chart showing a special figure variation start process executed by the main side CPU. FIG. 11 is an explanatory diagram for explaining a configuration for inputting a detection result of a ball-entering detection sensor to the main side CPU; It is a flowchart which shows the entering ball detection process performed by main side CPU. It is a block diagram for demonstrating the electrical structure of the various devices which communicate between a payout control apparatus and the said payout control apparatus. It is a flowchart which shows the timer interruption process performed by payout side CPU. 3 is a block diagram for explaining the electrical configuration of a management IC; FIG. FIG. 4 is an explanatory diagram for explaining the configuration of an input port of a management-side I/F; FIG. 4 is an explanatory diagram for explaining the configuration of a correspondence memory; FIG. 4 is an explanatory diagram for explaining the configuration of a history memory; It is a flowchart which shows the process for recognition performed by main side CPU. 4 is a flowchart showing management processing executed by a management-side CPU; (a) to (d) are time charts showing how information on correspondence between the first to fifteenth buffers and signal types is stored in a correspondence memory. 9 is a flowchart showing management output processing executed by the main CPU; 7 is a flowchart showing history setting processing executed by a management CPU; (a) to (e) are time charts showing how history information is stored in the history memory. 9 is a flowchart showing output processing of a set value update signal executed by the main CPU; FIG. 10 is a flow chart showing a setting update recognition process executed by a management CPU; FIG. 4 is a flowchart showing display output processing executed by a management CPU; 4 is a flow chart showing display processing executed by a management-side CPU; (a) It is a flowchart which shows the data output process performed by main side CPU, (b) It is a flowchart which shows the external output process which is performed by management side CPU. FIG. 11 is an explanatory diagram for explaining various tables stored in a main ROM in the second embodiment; FIG. FIG. 11 is an explanatory diagram for explaining the configuration of another storage memory in the third embodiment; FIG. 10 is a flow chart showing a setting update recognition process executed by a management CPU; FIG. 10 is a flowchart showing repeated change monitoring processing executed by a management CPU; FIG. 16 is a flow chart showing repeated change monitoring processing executed by the main CPU in the fourth embodiment; FIG. FIG. 21 is a flow chart showing a setting update recognition process executed by a management CPU in the fifth embodiment; FIG. FIG. 21 is an explanatory diagram for explaining the configuration of a history memory in the sixth embodiment; FIG. 7 is a flowchart showing history setting processing executed by a management CPU; FIG. 10 is a flow chart showing a setting update recognition process executed by a management CPU; FIG. FIG. 21 is an explanatory diagram for explaining the configuration of a history memory in the seventh embodiment; FIG. FIG. 10 is a flow chart showing a setting update recognition process executed by a management CPU; FIG. FIG. 21 is an explanatory diagram for explaining the configuration of a history memory in the eighth embodiment; FIG. FIG. 10 is a flow chart showing a setting update recognition process executed by a management CPU; FIG. 7 is a flowchart showing history setting processing executed by a management CPU; 4 is a flowchart showing display output processing executed by a management CPU; FIG. 21 is an explanatory diagram for explaining the configuration of an input port of a management-side I/F in the ninth embodiment; FIG. It is a flowchart which shows the process for recognition performed by main side CPU. 4 is a flowchart showing management processing executed by a management-side CPU; (a) to (h) are time charts showing how information on the correspondence between the first to twelfth buffers and the types of signals is stored in the correspondence memory. FIG. 20 is a block diagram for explaining the configuration of a signal path for transmitting detection results of each ball-entering detection sensor to the main side CPU and management IC in the tenth embodiment; It is a front view of the main controller in 11th Embodiment. FIG. 4 is a block diagram for explaining an electrical configuration for performing various displays on the first to fourth notification display devices under the control of the MPU; 4 is a flow chart showing display processing executed by a management-side CPU; It is a flowchart which shows the setting value update process performed by main side CPU. (a) is an explanatory diagram for explaining the display mode of the first to fourth notification display devices when the game history management result is displayed; (b) when the setting state of the pachinko machine is changed; FIG. 4 is an explanatory diagram for explaining the display modes of the first to fourth notification display devices; (a) to (h) are time charts showing how the first to fourth notification display devices enter a display state. (a) It is explanatory drawing for demonstrating the structure of the 1st information display apparatus in 12th Embodiment, (b) It is explanatory drawing for demonstrating the structure of the 2nd information display apparatus. The first notification display device in the case of displaying the management result of the game history on the first to fourth notification display devices and in the case of displaying that the setting state of the pachinko machine is changeable. and FIG. 11 is an explanatory diagram for explaining display contents of a second notification display device. It is a flowchart which shows the setting value update process performed by main side CPU. FIG. 32 is an explanatory diagram for explaining the configuration of an abnormality display area in the thirteenth embodiment; It is a flowchart which shows the abnormality setting process performed by main side CPU. It is a flowchart which shows the process for an abnormality display performed by main side CPU. FIG. 22 is a flowchart showing management output processing executed by the main CPU in the fourteenth embodiment; FIG. It is a flowchart which shows the main process performed by main side CPU in another form. FIG. 32 is an explanatory diagram for explaining a setting mode of programs and data in a main ROM in the fifteenth embodiment; It is an explanatory view for explaining a setting mode of each area in main side RAM. It is a flowchart which shows the timer interrupt processing performed by main side CPU. It is a flowchart which shows the process for management performed by main side CPU. It is a flowchart which shows the management execution process performed by main side CPU. FIG. 10 is an explanatory diagram for explaining various areas of a non-specific control work area used for managing game histories; It is a flowchart which shows the check process performed by main side CPU. It is a flowchart which shows the normal ball entry management process performed by main side CPU. It is a flowchart which shows the result calculation process performed by main side CPU. It is a flowchart which shows the process for a display performed by main side CPU. FIG. 22 is a flow chart showing management processing executed by the main CPU in the sixteenth embodiment; FIG. FIG. 22 is a flow chart showing management execution processing executed by the main CPU in the seventeenth embodiment; FIG. FIG. 20 is a flow chart showing management execution processing executed by the main CPU in the eighteenth embodiment; FIG. FIG. 20 is a flow chart showing management execution processing executed by the main CPU in the nineteenth embodiment; FIG. FIG. 20 is a flow chart showing management processing executed by the main CPU in the twentieth embodiment; FIG. It is a flowchart which shows the management execution process performed by main side CPU. FIG. 20 is an explanatory diagram for explaining the electrical configuration in the twenty-first embodiment; FIG. 20 is a flow chart showing main processing executed by a main CPU in the twenty-second embodiment; FIG. It is a flowchart which shows the setting value update process performed by main side CPU. It is a flowchart which shows the timer interrupt processing performed by main side CPU. It is a flowchart which shows the process for setting confirmation performed by main side CPU. 4 is a flowchart showing RAM monitoring processing executed by the main CPU; It is a flowchart which shows the main process performed by main side CPU in another form. It is a flowchart which shows the setting value update process performed by main side CPU in another form. FIG. 23 is a flow chart showing main processing executed by a main CPU in the twenty-third embodiment; FIG. FIG. 20 is a flow chart showing RAM monitoring processing executed by the main CPU in the twenty-fourth embodiment; FIG. 29 is a flow chart showing RAM monitoring processing executed by the main CPU in the twenty-fifth embodiment; It is a flowchart which shows the management execution process performed by main side CPU. It is a flowchart which shows the another monitoring process performed by main side CPU. 29 is a flow chart showing management processing executed by the main CPU in the twenty-sixth embodiment; 29 is a flow chart showing management processing executed by the main CPU in the twenty-seventh embodiment; FIG. 20 is a flow chart showing management processing executed by the main CPU in the twenty-eighth embodiment; FIG. 29 is a flow chart showing management processing executed by the main CPU in the twenty-ninth embodiment; 29 is a flow chart showing main processing executed by the main CPU in the thirtieth embodiment; It is a flowchart which shows the power failure information storage process performed by main side CPU. (a) It is a block diagram for demonstrating the structure of MPU, (b) is a time chart which shows the mode of the output of the reset signal by a reset signal output part. It is a flowchart which shows the timer interrupt processing performed by main side CPU. 10 is a flowchart showing setting monitoring processing executed by the main CPU; It is a flowchart which shows the process for management performed by main side CPU. It is a flowchart which shows the management execution process performed by main side CPU. It is a flowchart which shows the another monitoring process performed by main side CPU. FIG. 23 is a flow chart showing main processing executed by a main CPU in the thirty-first embodiment; FIG. It is a flowchart which shows the clear processing at the time of abnormality performed by main side CPU. It is a flowchart which shows the clear processing for non-specific control performed by main side CPU. FIG. 32 is a flowchart showing power failure information storage processing executed by the main CPU in the thirty-second embodiment; FIG. 7 is a flowchart showing checksum monitoring processing executed by the main CPU; It is a flowchart which shows the clear processing for non-specific control performed by main side CPU. 29 is a flow chart showing main processing executed by a main CPU in the thirty-third embodiment; It is a flowchart which shows the process for setting confirmation performed by main side CPU. It is a flowchart which shows the setting value update process performed by main side CPU. It is a flowchart which shows the 1st timer interrupt processing performed by main side CPU. 10 is a flowchart showing setting monitoring processing executed by the main CPU; FIG. 4 is a block diagram for explaining a configuration for display control of various display circuits by a main CPU; (a) is an explanatory diagram for explaining various buffers provided in a work area for specific control; (b) is an explanatory diagram for explaining various storage areas provided in a work area for non-specific control; be. It is an explanatory view for explaining an electric composition of display IC. (a) to (g) show how the type data and the display data are transmitted from the main CPU to the display IC and the display data transmitted from the display IC are received by the first display circuit or the second display circuit. It is a time chart. It is a flowchart which shows the 2nd timer interrupt processing performed by main side CPU. (a) is an explanatory diagram for explaining the display contents of the first to fourth notification display devices in a situation in which the setting value is updated; (b) the first to fourth notifications in a situation in which the setting value is confirmed; FIG. 4 is an explanatory diagram for explaining the display contents of the display device for the display; 29 is a flowchart showing set value update processing executed by the main CPU in the thirty-fourth embodiment;

<First embodiment>
A first embodiment of a pachinko game machine (hereinafter referred to as a "pachinko machine"), which is a type of game machine, will be described in detail below with reference to the drawings. FIG. 1 is a perspective view of a pachinko machine 10, and FIG. 2 is an exploded perspective view showing the main components of the pachinko machine 10. As shown in FIG. In FIG. 2, the configuration inside the game area PA of the pachinko machine 10 is omitted for the sake of convenience.

The pachinko machine 10, as shown in FIG. have. The outer frame 11 is formed by connecting wooden plates on four sides and has a rectangular frame shape. A pachinko machine 10 is installed in a game hall by fixing an outer frame 11 to an island facility. Incidentally, the pachinko machine 10 does not have to have the outer frame 11, and the pachinko machine 10 may have a structure in which the outer frame 11 is attached to the island facilities of the game hall.

As shown in FIG. 2, the game machine body 12 includes an inner frame 13, a front door frame 14 arranged in front of the inner frame 13, and a back pack unit 15 arranged behind the inner frame 13. ing. The inner frame 13 of the game machine body 12 is rotatably supported by the outer frame 11 . More specifically, the inner frame 13 can be rotated forward with the left side as the rotation base end side and the right side as the rotation tip side in a front view.

A front door frame 14 is rotatably supported by the inner frame 13, and is rotatable forward with the left side as the rotation base end side and the right side as the rotation tip side in a front view. In addition, the back pack unit 15 is rotatably supported by the inner frame 13, and is rotatable rearward with the left side as the rotation base end and the right side as the rotation tip side in a front view.

The gaming machine main body 12 is provided with a locking device at its turning tip, and has a function of locking the gaming machine main body 12 to the outer frame 11 so that it cannot be opened. It has a function of locking the door frame 14 with respect to the inner frame 13 so that it cannot be opened. Each of these locked states is released by unlocking the cylinder lock 17 exposed on the front surface of the pachinko machine 10 using an unlock key.

Next, the configuration of the front side of the gaming machine body 12 will be described.

The inner frame 13 is mainly composed of a resin base 21 that has substantially the same outer shape as the outer frame 11 . A substantially elliptical window hole 23 is formed in the central portion of the resin base 21 . A game board 24 is detachably attached to the resin base 21 . The game board 24 is made of plywood, and the game area PA formed on the front surface of the game board 24 is exposed to the front side of the inner frame 13 through the window holes 23 of the resin base 21 .

Here, the configuration of the game board 24 will be described with reference to FIG. FIG. 3 is a front view of the game board 24. FIG.

An inner rail portion 25 and an outer rail portion 26 are attached to the game board 24 so as to partition a part of the outer edge of the game area PA. The guide rail is configured as A game ball shot from a game ball shooting mechanism 27 (see FIG. 2) attached below the window hole 23 in the resin base 21 is guided to the upper part of the game area PA by guide rails.

Incidentally, the game ball launching mechanism 27 includes a launch rail 27a extending toward the guide rail, a ball feeder 27b that supplies game balls stored in an upper tray 55a, which will be described later, onto the launch rail 27a, and a and a solenoid 27c, which is an electric actuator that shoots the game ball supplied to the guide rail toward the guide rail. When a shooting operation device (or operation handle) 28 provided on the front door frame 14 is rotated, a solenoid 27c is driven and controlled to shoot a game ball.

The game board 24 is formed with a plurality of large and small openings penetrating in the front-rear direction. Each opening is provided with a general winning port 31, a special electric winning device 32, a first operating port 33, a second operating port 34, a through gate 35, a variable display unit 36, a special figure unit 37, a general figure unit 38, etc. ing. A total of four general winning openings 31 are provided, and the others are provided one each.

Even if a ball enters the through gate 35, no game ball is put out. On the other hand, when a ball enters the general winning hole 31, the special electric winning device 32, the first operating hole 33 and the second operating hole 34, a predetermined number of game balls are paid out. Specifically, regarding the number of prize balls, when one game ball enters the first operation port 33 or when one game ball enters the second operation port 34 , one prize ball is paid out, and when one game ball enters the general winning hole 31, 10 prize balls are paid out and sent to the special electric prize winning device 32 When one game ball is entered, 15 prize balls are paid out.

In addition, the number of prize balls is arbitrary, for example, the second operation port 34 may have a smaller number of prize balls than the first operation port 33, and the second operation port 34 may be the first operation port. The number of prize balls may be larger than 33.

In addition, an out port 24a is provided at the bottom of the game board 24, and game balls that do not enter various winning ports are discharged from the game area PA through the out port 24a. Further, the game board 24 is provided with a large number of nails 24b for appropriately dispersing and adjusting the falling direction of game balls, and various members such as windmills.

Here, the entry ball means that the game ball passes through a predetermined opening, and not only is the game ball discharged from the game area PA after passing through the opening, but also from the game area PA after passing through the opening. A mode in which the liquid continues to flow down the game area PA without being discharged is also included. However, in the following description, in order to clearly distinguish from the entry of game balls into the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the through gate 35 The entry of a game ball into the game ball is also expressed as winning.

The first operating port 33 and the second operating port 34 are unitized as an operating port device and installed on the game board 24 . Both the first working port 33 and the second working port 34 are open upward. Further, the two operating ports 33 and 34 are vertically aligned with the first operating port 33 facing upward. The second operating port 34 is provided with a universal electrical accessory 34a as a guide piece consisting of a pair of left and right movable pieces. A game ball cannot enter the second operating port 34 when the universal electrical role 34a is closed, and the winning to the second operating port 34 becomes possible when the universal electrical role 34a is in the open state.

A through gate 35 is provided upstream of the second operation port 34 in the direction in which the game ball flows. The through-gate 35 has a through-hole (not shown) penetrating in the vertical direction, and a game ball entering the through-gate 35 flows down the game area PA after winning. As a result, the game ball that has entered the through gate 35 can enter the second operating port 34. - 特許庁

Based on the winning of the through gate 35, the universal electrical accessory 34a of the second operating port 34 is switched from the closed state to the open state. Specifically, the internal lottery is performed with the winning of the through gate 35 as a trigger, and the general figure unit 38 provided in the lower right corner which is the area where the game ball does not pass in the game area PA. Variation display of the pattern is performed in the section 38a. Then, when the result of the internal lottery is the electric power open winning, the stop result corresponding to the result is displayed, and the variable display of the universal diagram display section 38a ends, the state shifts to the electric power open state. In the common electric open state, the common electric accessory 34a is opened in a predetermined manner.

In addition, the normal figure display unit 38a is composed of a segment display device in which a plurality of LED display segments are arranged in a predetermined manner. It may be constituted by other types of display devices such as displays, CRTs or dot matrix displays. In addition, as the pattern variably displayed in the normal figure display unit 38a, a configuration in which a plurality of types of characters are variably displayed, a configuration in which a plurality of types of symbols are variably displayed, a configuration in which a plurality of types of characters are variably displayed, or A configuration in which a plurality of types of colors are switched and displayed can be considered.

In the normal pattern unit 38, a normal pattern holding display portion 38b is provided at a position adjacent to the normal pattern display portion 38a. The number of winning game balls in the through gate 35 is reserved up to four, and the reserved number is displayed by lighting of the normal figure reservation display section 38b.

A winning lottery is performed with the winning of the first operating port 33 or the second operating port 34 as a trigger. Then, the result of the lottery is clearly shown through the display effect on the special figure unit 37 and the symbol display device 41 of the variable display unit 36. - 特許庁

In detail, the special figure unit 37 is provided with a special figure display section 37a. The display area of the special figure display portion 37a is narrower than the display surface 41a of the pattern display device 41. In the special figure display section 37a, a variable display or a predetermined display of the pattern is performed by performing a winning lottery with the winning of the first operation opening 33 or the winning of the second operation opening 34 as a trigger. Then, a result corresponding to the lottery result is displayed. In addition, the special figure display unit 37a is configured by a segment display device in which a plurality of LED display segments are arranged in a predetermined manner, but is not limited to this, a liquid crystal display device, an organic EL It may be constituted by other types of display devices such as displays, CRTs or dot matrix displays. In addition, as the pattern displayed in the special figure display unit 37a, a configuration in which multiple types of characters are displayed, a configuration in which multiple types of symbols are displayed, a configuration in which multiple types of characters are displayed, or multiple types of colors is displayed.

In the special figure unit 37, a special figure reservation display section 37b is provided at a position adjacent to the special figure display section 37a. The number of game balls won in the first operation port 33 or the second operation port 34 is reserved up to four, and the number of reservations is displayed by lighting the special figure reservation display part 37b.

More specifically, the pattern display device 41 is configured as a liquid crystal display device having a liquid crystal display, and display contents are controlled by a display control device, which will be described later. The pattern display device 41 is not limited to a liquid crystal display device, and may be a plasma display device, an organic EL display device, or another display device having a display screen such as a CRT, or a dot matrix display device. may

In the design display device 41, when the fluctuation display or the predetermined display of the pattern is performed in the special figure display unit 37a based on the winning to the first operation port 33 or the winning to the second operation port 34, the pattern is displayed according to it A variable display or a predetermined display is performed. For example, on the display surface 41a of the pattern display device 41, three pattern rows of upper, middle and lower rows are set as a plurality of display areas. The symbols are scroll-displayed in ascending or descending order. In this scroll display, scroll display is first started in all symbol rows, then the scroll display is switched to standby display in the order of upper symbol row→lower symbol row→middle symbol row. The game ends with the design still displayed. Then, in a game turn in which the game result is a jackpot result, a combination of predetermined symbols is stopped and displayed on the preset effective line on the display surface 41 a of the symbol display device 41 . Specifically, when the maximum winning jackpot result described later is obtained, the combination of the same odd numbered symbols is stopped and displayed, and when the low probability jackpot result described later is obtained, the combination of the same even numbered symbols is stopped and displayed. In the case of a low winning high probability big winning result, the combination of symbols which are not the same combination of symbols but not the low winning high probability big winning result are stop-displayed.

In the symbol display device 41, not only the display effect triggered by the winning of the first operation port 33 or the second operation port 34, but also the display effect during the opening/closing execution mode that shifts after winning is performed. will be In addition, based on the winning of any of the operation ports 33, 34, the display is started on the special figure display unit 37a and the symbol display device 41, and the predetermined result is displayed and the end is one of the game rounds. times. In addition, the pattern display device 41 may arbitrarily display the patterns in any manner without being limited to the above. can be changed as appropriate. Further, the patterns displayed variably on the pattern display device 41 are not limited to the above-described patterns, and for example, only numbers may be variably displayed as the patterns.

When a big win is won in a winning lottery based on the winning to the first operating port 33 or the winning to the second operating port 34, it shifts to the opening/closing execution mode in which the winning to the special electric prize winning device 32 is possible. The special electric prize winning device 32 includes a large prize winning opening (not shown) leading to the back side of the game board 24, and an opening/closing door 32a for opening and closing the big winning opening. The opening/closing door 32a is arranged in either a closed state or an open state. Specifically, the opening/closing door 32a is normally in a closed state in which game balls cannot win prizes, and is switched to an open state in which game balls can win prizes when the internal lottery wins the transition to the opening/closing execution mode. It has become. Incidentally, the open/close execution mode is a mode to be shifted to when a winning result is obtained. It should be noted that although it is not impossible to win a prize in the closed state, it may be configured to be in a state in which it is more difficult to win a prize than in the open state.

FIG. 4 is an explanatory diagram for explaining a configuration relating to discharge of game balls that have flowed down the game area PA.

As already explained, a game ball entering any one of the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34 and the out opening 24a is discharged from the game area PA. In other words, the game ball launched from the game ball launching mechanism 27 and flowed into the game area PA is any of the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the out port 24a It will be discharged from the game area PA by entering the ball into. A game ball entering any one of the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, the second operating port 34 and the out port 24a is led to the back side of the game board 24.例文帳に追加

On the back surface of the game board 24, discharge passage portions 42 to 48 are formed corresponding to the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, the second operating port 34 and the out port 24a, respectively. . The game balls that have flowed into the discharge passages 42 to 48 are led to the lower end of the game board 24 on the back side of the game board 24 by flowing down the discharge passages 42 to 48 into which they flowed in, and are sent to a discharge ball recovery section (not shown). is recovered. Then, the game balls collected by the discharge ball collecting section are discharged to the ball circulation device of the island facility where the pachinko machine 10 is installed in the game hall.

Various detection sensors 42a to 48a for detecting game balls are provided in the discharge passages 42 to 48, respectively. These discharge passage portions 42 to 48 and detection sensors 42a to 48a will be described below. Since four general prize winning openings 31 are provided as already explained, there are discharge passage portions 42 to 44 corresponding to each of these four openings. In this case, one detection sensor 42a is provided for each of the first discharge passage portion 42 corresponding to the leftmost general prize winning port 31 and the second discharge passage portion 43 corresponding to the general prize winning port 31 adjacent thereto. 43a is provided. Specifically, the first winning opening detection sensor 42a is provided so that the detection range exists in the middle of the first discharge passage portion 42, and the detection range is in the middle of the second discharge passage portion 43. A second winning hole detection sensor 43a is provided so as to exist. The game ball entering the leftmost general winning hole 31 is detected by the first winning hole detection sensor 42a while passing through the first discharge passage part 42, and enters the general winning hole 31 on the right side. The ball is detected by the second winning opening detection sensor 43a while passing through the second discharge passage portion 43. FIG. In addition, a third discharge passage portion 44 is formed so as to join the two general prize winning openings 31 on the right side at a midway position. The third discharge passage portion 44 has an entrance side area corresponding to each of the two general winning openings 31, and has one exit side area by joining the entrance side areas in the middle. is doing. A third winning opening detection sensor 44a is provided so that a detection range exists in the middle of the exit side area of the third discharge passage portion 44 . A game ball that enters one of the two right-side general winning holes 31 is detected by the third winning hole detection sensor 44a while passing through the third discharge passage portion 44. - 特許庁

A fourth discharge passage portion 45 exists corresponding to the special electric prize winning device 32 . A special electric detection sensor 45a is provided so that a detection range exists in the middle of the fourth discharge passage portion 45, and the game ball entering the special electric prize winning device 32 passes through the fourth discharge passage portion 45. It is detected by the special electric detection sensor 45a. A fifth discharge passage portion 46 exists corresponding to the first operation port 33 . A first operation opening detection sensor 46a is provided so that a detection range exists in the middle of the fifth discharge passage portion 46, and the game ball entering the first operation opening 33 passes through the fifth discharge passage portion 46. It is detected by the first operation port detection sensor 46a while passing through. A sixth discharge passage portion 47 exists corresponding to the second operation port 34 . A second operation opening detection sensor 47a is provided so that a detection range exists in the middle of the sixth discharge passage portion 47, and the game ball entering the second operation opening 34 passes through the sixth discharge passage portion 47. It is detected by the second operation opening detection sensor 47a while it is passing through. A seventh discharge passage portion 48 is present corresponding to the out port 24a. An out-port detection sensor 48a is provided so that a detection range exists in the middle of the seventh discharge passage portion 48, and the game ball entering the out port 24a passes through the seventh discharge passage portion 48. It is detected by the outlet detection sensor 48a.

A game ball that is detected by any one of the various detection sensors 42a to 48a will not be detected by the other detection sensors 42a to 48a. A gate detection sensor 49a is also provided for the through gate 35, and the game ball passing through the through gate 35 on the way down the game area PA is detected by the gate detection sensor 49a.

Electromagnetic induction type proximity sensors are used as the various detection sensors 42a to 49a, but any sensor can be used as long as the game balls can be detected individually. Further, the various detection sensors 42a-49a are electrically connected to a main controller 60 which will be described later, and detection results of the various detection sensors 42a-49a are output to the main controller 60. FIG. Specifically, the various detection sensors 42a to 49a output a LOW level signal when no game ball is detected, and output a HI level signal when a game ball is detected. Note that the relationship between HI and LOW may be reversed without being limited to this.

As shown in FIG. 2, the front door frame 14 is provided so as to cover the entire front side of the inner frame 13 in which the game board 24 having the above configuration is attached to the resin base 21 . As shown in FIG. 1, the front door frame 14 is formed with a window portion 51 through which substantially the entire game area PA can be viewed from the front. The window portion 51 has a substantially elliptical shape, and a window panel 52 is fitted therein. The window panel 52 is made of glass in a colorless and transparent manner, but is not limited to this, and may be made of a synthetic resin in a colorless and transparent manner. As long as it is visible, it may be colored and transparent.

A display light-emitting portion 53 is provided above the window portion 51 . A pair of left and right speaker units 54 are provided for outputting sound effects and the like according to the game state. An upper bulging portion 55 bulging forward and a lower bulging portion 56 are vertically arranged below the window portion 51 . An upper plate 55a that opens upward is provided inside the upper bulging portion 55, and a lower plate 56a that likewise opens upward is provided inside the lower bulging portion 56. As shown in FIG. The upper tray 55a has a function of temporarily storing game balls paid out from a payout device, which will be described later, and guiding them toward the game ball launching mechanism 27 while aligning them in a line. In addition, the lower plate 56a has a function of storing surplus game balls in the upper plate 55a.

Next, the configuration of the rear side of the gaming machine main body 12 will be described.

As shown in FIG. 2, a main control device 60 is mounted on the back surface of the inner frame 13 (specifically, the game board 24) for main control of the game. FIG. 5 is a front view of the main controller 60. FIG.

As shown in FIG. 5, the main controller 60 has a main control board 61 housed in a board box 60a. An MPU 62 is mounted on the element mounting surface, which is one plate surface of the main control board 61 . The board box 60a is formed transparent so that the MPU 62 accommodated in the board box 60a can be visually observed from the outside of the board box 60a. Although the board box 60a is formed colorless and transparent, it may be formed colored and transparent as long as the MPU 62 accommodated in the board box 60a can be visually observed from the outside of the board box 60a. The main controller 60 is mounted on the rear surface of the resin base 21 in the board box 60a such that the facing wall portion 60b facing the element mounting surface of the main control board 61 faces the pachinko machine 10 rearward. Therefore, by opening the game machine main body 12 to the front of the pachinko machine 10 with respect to the outer frame 11 and exposing the back surface of the resin base 21, it becomes possible to see the opposing wall portion 60b of the board box 60a and It is possible to see the MPU 62 through the opposing wall portion 60b.

The board box 60a is formed by assembling a plurality of case bodies 60c back and forth, and the plurality of case bodies 60c prevents the separation of the case bodies 60c and leaves traces of the case bodies 60c when the case bodies 60c are separated. A coupling portion 60e is provided for leaving the . A plurality of coupling portions 60e are arranged side by side on one side of the substantially rectangular parallelepiped board box 60a. As a result, in a state in which separation of the case body 60c is prevented by using some of the joints 60e, even if the case body 60c is separated by destroying the part of the joints 60e, another joint is subsequently performed. By bringing the portion 60e into the coupled state, it is possible to prevent the separation of the case body 60c again. In addition, since the connecting portion 60e is destroyed and a trace remains when the case body 60c is separated, it is possible to grasp whether or not the case body 60c is illegally separated by visually checking the connecting portion 60e. It becomes possible. In addition, a sealing seal 60f is attached to one side of the substrate box 60a opposite to the one side on which the connecting portions 60e are arranged so as to straddle the boundary between the case bodies 60c. When the sealing seal 60f is peeled off, the adhesive layer remains on the case body 60c. As a result, when the sealing seal 60f is peeled off when the case body 60c is separated, it is possible to leave a trace.

In the main control device 60 having the above configuration, the main control board 61 is owned by the manager of the game hall in order to generate an opportunity to change the setting state of the pachinko machine 10 within the range of "setting 1" to "setting 6". A setting key insertion unit 68a into which a setting key is inserted and turned ON, an update button 68b operated to sequentially change the setting state of the pachinko machine 10 after the ON operation to the setting key insertion unit 68a, and a main control unit. A reset button 68c operated to clear the data of a main side RAM 65 provided in the MPU 62 of 60, which will be described later, and first to third notification display devices 69a to 69c for notifying the management results of the game history. , is provided. In addition, the connection terminal of the external device is connected to the MPU 62 mounted on the main control board 61 so that the management result of the game history or the information (program and data) stored in the main ROM 64 can be read by the external device. A reading terminal 68d is provided for the purpose. Incidentally, the setting state of the pachinko machine 10 is not limited to the six stages of "setting 1" to "setting 6", and any number of stages may be used.

These setting key insertion portion 68a, update button 68b, reset button 68c, reading terminal 68d (that is, MPU 62), and first to third notification display devices 69a to 69c are all provided on the element mounting surface of the main control board 61. ing. The device mounting surface of the main control board 61 faces the facing wall 60b of the board box 60a as already described, but the setting key insertion part 68a, update button 68b, reset button 68c and reading terminal 68d face each other. It is not covered by the wall portion 60b. That is, the opposed wall portion 60b has individual openings in areas opposed to the setting key insertion portion 68a, the update button 68b, the reset button 68c, and the reading terminal 68d. As a result, it is possible to insert a setting key into the setting key insertion portion 68a without opening the board box 60a, to press the update button 68b, and to press the reset button 68c. It is possible to connect a connection terminal of an external device to the reading terminal 68d.

By inserting the setting key into the setting key inserting portion 68a and rotating it in a predetermined direction, the setting key inserting portion 68a is turned on. By starting the supply of operating power to the pachinko machine 10 in that state (that is, by starting the supply of operating power to the MPU 62 of the main controller 60), the setting state of the pachinko machine 10 can be changed. changeable state. In this state, each time the update button 68b is pressed once, the setting state of the pachinko machine 10 is changed step by step in the range of "setting 1" to "setting 6" in ascending order. When the update button 68b is operated in the state of "setting 6", the state is updated to "setting 1". The setting key insertion portion 68a is turned off by rotating the setting key inserted in the setting key insertion portion 68a from the ON operation position in a direction opposite to the predetermined direction to return to the initial position. Become. When the setting key insertion portion 68a is turned off, the changeable state ends, and the game can be played with the set values at that time. In other words, even if the update button 68b is operated after the changeable state ends, the setting value cannot be changed.

The ON operation for the setting key insertion portion 68a is valid only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main controller 60 is started). Therefore, even if the setting key inserting portion 68a is turned ON after the MPU 62 of the main controller 60 has completed the operation power supply start process, the setting value cannot be changed.

The setting state of the pachinko machine 10 determines the advantage per unit time in the pachinko machine 10, and the larger the value of "setting n" (n is an integer from "1" to "6") (that is, setting The higher the value, the higher the advantage. Although the details will be described later, there are a low probability mode in which the winning probability is relatively low and a high probability mode in which the winning probability is relatively high as a winning lottery mode that determines the winning probability of the jackpot result, and the set value is It is set so that the higher the value, the higher the winning probability of the jackpot result in the low probability mode. On the other hand, the winning probability of the jackpot results in the high probability mode is constant regardless of the set value.

The reset button 68c is operated to clear the data in the main RAM 65 as described above, but in order to clear the data, the operating power must be supplied to the pachinko machine 10 while the reset button 68c is pressed. (that is, it is necessary to start supplying operating power to the MPU 62 of the main controller 60). The ON operation for the reset button 68c is valid only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main controller 60 is started). Therefore, even if the reset button 68c is pressed after the MPU 62 of the main controller 60 completes the operation power supply start process, the data in the main RAM 65 cannot be cleared.

As already explained, the reading terminal 68d is connected to the connection terminal of the external device so that the management result of the game history or the information (program and data) stored in the main ROM 64 can be read by the external device. In order to perform external output to, it is necessary to start supplying operating power to the pachinko machine 10 with the connection terminal of the external device connected to the reading terminal 68d (that is, the operation of the main controller 60 to the MPU 62 power must be turned on). The connection of the external device to the reading terminal 68d is enabled only when the supply of operating power to the pachinko machine 10 is started (that is, when the supply of operating power to the MPU 62 of the main controller 60 is started). Therefore, even if an external device is connected to the reading terminal 68d after the MPU 62 of the main control device 60 has completed the processing for starting the supply of operating power, no external output to the external device is performed.

Each of the first to third notification display devices 69a to 69c is a segment display device in which seven LED display segments are arranged. It may be a light emitter, a liquid crystal display device, or an organic EL display. Each of the first to third notification display devices 69a to 69c is installed so that its display surface faces the direction in which the element mounting surface of the main control board 61 faces. covered. In this case, since the substrate box 60a is transparent, the display surfaces of the first to third notification display devices 69a to 69c housed in the substrate box 60a can be viewed from the outside of the substrate box 60a. becomes possible. As already explained, the main controller 60 is mounted on the rear surface of the resin base 21 in the substrate box 60a so that the facing wall portion 60b facing the element mounting surface of the main control substrate 61 faces the rear of the pachinko machine 10. Therefore, when the game machine main body 12 is opened to the front of the pachinko machine 10 with respect to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to third notifications are made through the opposing wall portion 60b. It is possible to view the display surfaces of the display devices 69a to 69c.

On the display surface of the first notification display device 69a, not only numbers "0" to "9" but also various characters including alphabetic characters are displayed. On the other hand, the numbers "0" to "9" are displayed on the second notification display device 69b and the third notification display device 69c. The management results of the game history are notified using the first to third notification display devices 69a to 69c, and the content of this notification will be described in detail later. Further, in a changeable state in which the setting state of the pachinko machine 10 can be changed, a value corresponding to the current setting value is displayed on the third notification display device 69c. The value corresponding to the set value may be displayed on the first notification display device 69a, or may be displayed on the second notification display device 69b. In addition, the setting value before entering the changeable state is displayed on one of the first to third notification display devices 69a to 69c, and the current setting value is displayed on the first to third notification display devices. It is also possible to adopt a configuration in which the information is displayed on another notification display device out of the display devices 69a to 69c.

As shown in FIG. 2, the back pack unit 15 is installed so as to cover the back side of the inner frame 13 including the main controller 60 . The back pack unit 15 includes a back pack 72 made of a transparent synthetic resin, and a payout mechanism 73 and a controller assembly unit 74 are attached to the back pack 72 .

The payout mechanism part 73 includes a tank 75 to which game balls supplied from the island facilities of the game hall are sequentially replenished, and a payout device 76 for paying out the game balls stored in the tank 75 . The game balls paid out from the payout device 76 are discharged to the upper tray 55a or the lower tray 56a through a payout passage provided on the downstream side of the payout device 76.例文帳に追加The payout mechanism 73 is supplied with a main power supply of, for example, 24 volts AC, and is equipped with a back pack board having a power switch for turning the power ON and OFF.

The control device assembly unit 74 includes a payout control device 77 having a function of controlling a payout device 76, and a predetermined electric power required by various control devices, etc., is generated and output, and is accompanied by the operation of the shooting operation device 28 by the player. A power supply/shooting control device 78 for controlling the launching of game balls is provided. The payout control device 77 and the power supply/launch control device 78 are arranged one on top of the other in such a manner that the payout control device 77 is behind the pachinko machine 10 .

<Electrical Configuration of Pachinko Machine 10>
FIG. 6 is a block diagram showing the electrical configuration of the pachinko machine 10. As shown in FIG.

The main control device 60 comprises a main control board 61 that controls the main game, and a power outage monitoring board 67 that monitors the power supply. An MPU 62 is mounted on the main control board 61 . The MPU 62 incorporates a main ROM 64, a main RAM 65, and a management IC 66 in addition to a main CPU 63, which is an arithmetic processing device including a control section and a calculation section. In addition to the elements described above, the MPU 62 incorporates an interrupt circuit, a timer circuit, a data input/output circuit, various counter circuits as a random number generator, and the like.

The main ROM 64 is a memory such as a NOR flash memory and a NAND flash memory that does not require external power supply (that is, non-volatile storage means), and is used exclusively for reading. The main ROM 64 stores various control programs executed by the main CPU 63 and fixed value data.

The main RAM 65 is a memory (that is, volatile storage means) such as SRAM and DRAM that requires power supply from the outside to retain data, and is used for both reading and writing. The main RAM 65 can be randomly accessed, and has a faster read time than the main ROM 64 when compared with the same data capacity. The main RAM 65 temporarily stores various data for execution of the control program stored in the main ROM 64 .

The management IC 66 is a management device that manages game history based on information supplied from the main CPU 63 . Although details will be described later, the management IC 66 grasps the entry history of game balls to the general winning opening 31, the special electric winning device 32, the first operating opening 33, the second operating opening 34, and the out opening 24a, The frequency of entering the ball into the general winning opening 31, the special electric winning device 32, the first operating opening 33 and the second operating opening 34 is grasped according to the grasped ball entering history. Further, the management IC 66 grasps the occurrence frequency of the opening/closing execution mode and the high-frequency support mode, which will be described later.

The MPU 62 is provided with an input port and an output port. An input side of the MPU 62 is connected to a power failure monitoring board 67 and a payout control device 77 provided in the main control device 60 . A power supply/emission control device 78 having a function of supplying operating power is connected to the power failure monitoring board 67 , and operating power is supplied to the MPU 62 via the power failure monitoring board 67 .

Various sensors such as ball entry detection sensors 42a to 49a are connected to the input side of the MPU 62 . As already described, the respective ball entry detection sensors 42a to 49a include the first winning opening detection sensor 42a, the second winning opening detection sensor 43a, the third winning opening detection sensor 44a, the special electric detection sensor 45a, and the first operation opening detection. A sensor 46a, a second working opening detection sensor 47a, an outlet detection sensor 48a and a gate detection sensor 49a are included. Based on the detection results of these ball-entering detection sensors 42a to 49a, the main CPU 63 determines whether a ball is entering each ball-entering section. Further, in the main CPU 63, various lotteries are executed based on the winning of the first operating port 33, and various lotteries are executed based on the winning of the second operating port 34.

The input side of the MPU 62 is provided with a setting key insertion portion 68a, an update button 68b and a reset button 68c provided on the main control board 61 . A sensor (not shown) is provided in the setting key inserting portion 68a, and the sensor detects whether the setting key inserting portion 68a is arranged at the ON operation position or the OFF operation position. Based on the detection result from the sensor, the main CPU 63 identifies whether the setting key insertion portion 68a is located at the ON operation position or the OFF operation position. The update button 68b is provided with a sensor (not shown), and the sensor detects whether or not the update button 68b is pressed. Then, the main CPU 63 determines whether or not the update button 68b is pressed based on the detection result from the sensor. The reset button 68c is provided with a sensor (not shown), and the sensor detects whether or not the reset button 68c is pressed. Then, the main CPU 63 determines whether or not the reset button 68c is pressed based on the detection result from the sensor.

The output side of the MPU 62 is connected with a power failure monitor board 67, a payout control device 77 and a sound emission control device 81. A prize ball command is output to the payout control device 77 based on, for example, a game ball entering a prize ball corresponding ball entry portion among the ball entry portions where the occurrence of the ball entry corresponds to the payout of the game ball. be. Various commands such as a variation command, a type command, and an opening command are output to the sound emission control device 81 .

On the output side of the MPU 62, a special electric drive unit 32b that opens and closes the open/close door 32a of the special electric prize winning device 32, a general electric drive unit 34b that opens and closes the general electric accessory 34a of the second operation opening 34, A figure unit 37 and a general figure unit 38 are connected. Incidentally, the special figure unit 37 is provided with a special figure display section 37a and a special figure reservation display section 37b, but all of these are connected to the output side of the MPU62. Similarly, the normal map unit 38 is provided with a normal map display unit 38a and a normal map reservation display unit 38b, all of which are connected to the output side of the MPU62. Various driver circuits are provided on the main control board 61, and the MPU 62 executes drive control of various drive units and various display units through the driver circuits.

In other words, in the opening/closing execution mode, the driving control of the special electric driving unit 32b is executed in the main CPU 63 so that the special electric winning device 32 is opened and closed. Further, when the general electric accessory 34a is won in the open state, the main side CPU 63 executes drive control of the general electric drive unit 34b so that the general electric accessory 34a is opened and closed. Moreover, display control of the special figure display part 37a is performed in main side CPU63 in the case of each game time. In addition, when the lottery result of whether or not to set the general electric accessory 34a to the open state is specified, the main side CPU 63 controls the display of the general pattern display unit 38a. Also, when the winning prize to the first operation port 33 or the second operation port 34 occurs, or when the variable display is started in the special figure display unit 37a, the display control of the special figure reservation display unit 37b in the main side CPU63 is executed, and when winning to the through gate 35 occurs, or when variable display is started in the normal pattern display unit 38a, the main CPU 63 controls the display of the normal pattern reservation display unit 38b.

First to third notification display devices 69a to 69c are connected to the output side of the MPU 62. FIG. In addition, the management result of the game history in the management IC 66 is notified through the display on the first to third notification display devices 69a to 69c. Further, when changing the setting state of the pachinko machine 10, the current setting value is displayed on the third notification display device 69c. In this case, the display of the first notification display device 69a and the second notification display device 69b is controlled by the management IC 66 and is not controlled by the main CPU 63, whereas the third notification display device 69c is controlled by the main CPU 63. The display is controlled and the display is controlled by the management IC 66 . Display control by the main side CPU 63 has priority over display control by the management IC 66 for the display of the third notification display device 69c.

However, the present invention is not limited to this, and the third notification display device 69c may also be configured so that the display is controlled by the management IC 66 and the display is not controlled by the main CPU 63 . In this case, when the current setting value is displayed on the third notification display device 69c when the setting state of the pachinko machine 10 is changed, the main side CPU 63 instructs the management IC 66 to display the setting value. good.

The MPU 62 is provided with a reading terminal 68d. A sensor (not shown) is provided at the reading terminal 68d, and the sensor detects whether or not a connection terminal of an external device is connected to the reading terminal 68d. Then, the main CPU 63 determines whether or not the connection terminal of the external device is connected to the reading terminal 68d based on the detection result from the sensor. When an external device is connected to the reading terminal 68d, the game history management result in the management IC 66 or the information (program and data) stored in the main ROM 64 is output to the external device.

The blackout monitoring board 67 relays between the main control board 61 and the power/launch control device 78 and monitors the maximum voltage output from the power/launch control device 78, which is a stable DC voltage of 24 volts. The payout control device 77 controls the payout of prize balls and rental balls by the payout device 76 based on the prize ball command received from the main controller 60 .

The power/emission control device 78 is connected to, for example, a commercial power supply (external power supply) in a game hall or the like. Then, based on the external power supplied from the commercial power supply, the main control board 61, the payout control device 77, etc. are generated with the necessary operating power, and the generated operating power is supplied. Incidentally, the power supply/launch control device 78 is provided with a power supply unit for power failure such as a backup capacitor, and even if the power supply of the pachinko machine 10 is in the OFF state, the power supply unit for power failure is used as the main power supply. Electric power for memory retention is supplied to the main side RAM 65 and the payout control device 77 of the control device 60 . The power/shooting control device 78 controls the shooting of the game ball shooting mechanism 27, and the game ball shooting mechanism 27 is driven when predetermined shooting conditions are met. Further, as already explained, the payout mechanism 73 is provided with a power switch, and when the power switch is turned ON, the supply of operating power to the pachinko machine 10 is started, and the power switch is turned OFF. , the supply of operating power to the pachinko machine 10 is stopped.

The audio light emission control device 81 drives and controls the display light emission section 53 and the speaker section 54 provided on the front door frame 14 based on various commands received from the main control device 60, and controls the display control device 82. is. The display control device 82 executes display control of the pattern display device 41 based on the command received from the sound emission control device 81 .

<Electrical Configuration for Performing Various Lottery Draws by Main Side CPU 63>
Next, an electrical configuration for performing various lotteries by the main CPU 63 will be described with reference to FIG.

The main side CPU 63 uses various counter information during the game to set the jackpot occurrence lottery, the display setting of the special figure display section 37a, the setting of the symbol display of the symbol display device 41, the display setting of the normal figure display section 38a, and the like. Specifically, as shown in FIG. 7, the winning random number counter C1 used for the lottery of winning generation, the big winning type counter C2 used when judging the big winning type, and the pattern display device 41 fluctuate. The reach random number counter C3 used for the reach generation lottery when doing, the random number initial value counter CINI used for setting the initial value of the hit random number counter C1, and the display duration in the special figure display unit 37a and the pattern display device 41 are determined. A variation type counter CS is used. Furthermore, it is decided to use the general electric accessory open counter C4 used for the lottery of whether or not the general electrical accessory 34a of the second operation port 34 is in the general electrical open state. The counters C1 to C3, CINI, CS, and C4 are provided in the various counter areas 65b of the main RAM 65. FIG.

Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter that adds 1 to the previous value each time it is updated and returns to "0" after reaching the maximum value. Each counter is updated at short time intervals. Information corresponding to the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is provided in the main side RAM 65 as acquisition information storage means when a prize is won in the first operation opening 33 or the second operation opening 34. stored in the reserved storage area 65a.

The pending storage area 65a comprises a pending area RE and an execution area AE. The reservation area RE includes a first reservation area RE1, a second reservation area RE2, a third reservation area RE3, and a fourth reservation area RE4. In addition, a combination of each numerical value information of the hit random number counter C1, the jackpot type counter C2 and the reach random number counter C3 is stored as reserved information in one of the reserved areas RE1 to RE4.

In this case, in the first reservation area RE1 to the fourth reservation area RE4, when the winning to the first operation port 33 or the second operation port 34 occurs multiple times in succession, the first reservation area RE1 → the second Each numerical information is stored chronologically in order of reservation area RE2→third reservation area RE3→fourth reservation area RE4. By providing four reservation areas RE1 to RE4 in this manner, up to four winning histories of game balls to the first operation port 33 or the second operation port 34 are retained and stored. .

It should be noted that the number that can be retained and stored is not limited to four, and may be any number, such as two, three, or five or more, or may be singular.

The execution area AE is an area for moving each numerical value information stored in the first reservation area RE1 of the reservation area RE when starting the variable display of the special figure display section 37a, and the start of one game round. At that time, the success or failure determination is performed based on various numerical information stored in the execution area AE.

Each of the above counters will be described in detail.

First, the universal electrical role item release counter C4 will be described. For example, the general electric role item release counter C4 is configured to be incremented by 1 in order within the range of 0 to 250, and return to "0" after reaching the maximum value. The general electric accessory release counter C4 is periodically updated, and stored in the general electric reservation area 65c of the main side RAM 65 at the timing when the game ball wins the through gate 35. - 特許庁Then, at a predetermined timing, a lottery is performed as to whether or not to control the general electric role item 34a to the open state based on the stored value of the general electric role item opening counter C4.

In this pachinko machine 10, a plurality of types of support modes are set so that the mode of support by the general electric role item 34a is different from each other. Specifically, in the support mode, when compared with a situation in which game balls are continuously shot in the same manner in the game area PA, the general electric accessory 34a of the second operation port 34 opens per unit time. A high-frequency support mode and a low-frequency support mode are set so that the frequency of states is relatively high and low.

In the high frequency support mode and the low frequency support mode, the probability of winning the general electric open state in the general electric open lottery using the general electric accessory open counter C4 is the same (for example, both are 4/5). , in the high frequency support mode, the number of times that the general electrical role 34a is in the open state when the general electrical open state is won is set more than in the low frequency support mode, and the open time for one time is set longer. It is In this case, in the high frequency support mode, when the general electric open state is won and the open state of the general electric accessory 34a occurs multiple times, the time from the end of one open state to the start of the next open state The closing time is set shorter than one opening time. Furthermore, in the high-frequency support mode, compared to the low-frequency support mode, the minimum secured time (that is, the The duration of one display on the display section 38a) is set short.

As described above, in the high-frequency support mode, the probability of winning the second operation port 34 is higher than in the low-frequency support mode. In other words, in the low frequency support mode, the probability of winning the first operation opening 33 is higher than in the second operation opening 34, but in the high frequency support mode, the second operation opening is higher than the first operation opening 33. The probability of winning a prize to the mouth 34 is increased. When a prize is awarded to the second operation port 34, a predetermined number of game balls are paid out. Therefore, in the high-frequency support mode, the player can play the game while not reducing the number of balls in his hand too much. It can be carried out.

In addition, the configuration for making the high-frequency support mode more frequent than the low-frequency support mode to become the electric power open state per unit time is not limited to the above, for example, in the electric power open lottery A configuration may be adopted in which the probability of winning the electric power open state is increased. In addition, after one general electric open lottery is performed, the time secured for the next general electric open lottery In a configuration where multiple types of variable display time) are prepared, in the high-frequency support mode, it is easier to select a shorter reserved time than in the low-frequency support mode, or is set so that the average reserved time is shorter. good too. In addition, the number of open times is increased, the open time is lengthened, and the secured time that is secured after one electric power open lottery is held and the next electric power open lottery is held is shortened. The advantage of the high-frequency support mode over the low-frequency support mode may be increased by applying any one condition or any combination of shortening the average time and increasing the winning probability.

Here, as already explained, the pachinko machine 10 has the setting states of "setting 1" to "setting 6", but the opening frequency and opening mode of the general electric role 34a in the low frequency support mode Even the setting values are the same, and the opening frequency and the opening mode of the general electrical accessory 34a in the high-frequency support mode are also the same regardless of the setting values. However, it is not limited to this, and at least one of the opening frequency and opening mode of the general electric role 34a for at least one of the low frequency support mode and the high frequency support mode varies according to the setting state of the pachinko machine 10 may be configured. For example, the higher the set value, the higher the frequency of opening the general electrical accessory 34a in the low-frequency support mode. A configuration may be adopted in which the probability of a game ball entering the mouth 34 is increased. In addition, the higher the set value, the higher the frequency of opening the general electrical accessory 34a in the high-frequency support mode. A configuration may be adopted in which the ball entry probability of the game ball to the operation opening 34 is increased.

Next, the winning random number counter C1 will be described. The winning random number counter C1 is configured to be incremented by 1 in order within the range of 0 to 599, for example, and return to "0" after reaching the maximum value. In particular, when the winning random number counter C1 completes one cycle, the value of the random number initial value counter CINI at that time is read as the initial value of the winning random number counter C1. The random number initial value counter CINI is a loop counter similar to the winning random number counter C1 (value=0 to 599). The hit random number counter C1 is periodically updated, and stored in the reservation storage area 65a of the main side RAM 65 at the timing when the game ball enters the first operation opening 33 or the second operation opening .

The values of random numbers for winning the jackpot are stored in the main ROM 64 as a success/failure table. FIG. 8 is an explanatory diagram for explaining various tables stored in the main ROM 64. As shown in FIG. Low-probability tables 64a to 64f for the low-probability mode and a high-probability table 64g for the high-probability mode are stored as the correctness tables.

The low certainty tables 64a to 64f are provided in one-to-one correspondence with the setting states of "setting 1" to "setting 6". That is, the low accuracy table 64a for setting 1 referred to when the setting state of the pachinko machine 10 is "setting 1" and the setting referred to when the setting state of the pachinko machine 10 is "setting 2" A low accuracy table 64b for 2, a low accuracy table 64c for setting 3 that is referred to when the setting state of the pachinko machine 10 is "setting 3", and a setting state of the pachinko machine 10 is "setting 4". The low accuracy table 64d for setting 4 referred to when the setting state of the pachinko machine 10 is "setting 5", the low accuracy table 64e for setting 5 referred to when the setting state is "setting 5", and the pachinko machine 10 There is a low certainty table 64f for setting 6 that is referred to when the setting state of is "setting 6".

These low probability tables 64a to 64f are set so that the higher the setting value, the higher the winning probability of the jackpot result. Specifically, when the low certainty table 64a for setting 1 is referred to, the jackpot result is about 1/320, and when the low certainty table 64b for setting 2 is referred, about 1/310. When the low certainty table 64c for setting 3 is referred to, the result is about 1/300, and when the low certainty table 64d for setting 4 is referred, about 1/290. When the low certainty table 64e for setting 5 is referred to, the result is about 1/280, and when the low certainty table 64f for setting 6 is referred, about 1/270. result in a big hit. As a result, when the setting state of the pachinko machine 10 is set to a high setting value, it becomes easier for a large winning result to occur in the low-probability mode, which is advantageous for the player.

On the other hand, the high certainty table 64g is provided with only one type so as to be common to any setting state of "setting 1" to "setting 6". The high-probability table 64g is set so that the winning probability of the jackpot results is higher than the low-probability tables 64a-64f in any setting state of "setting 1" to "setting 6". Specifically, when the high certainty table 64g is referred to, the jackpot result is about 1/30. As a result, regardless of the setting state of the pachinko machine 10, the high-probability mode can be made more advantageous than the low-probability mode. In addition, even in the lowest setting state "setting 1", it is possible to increase the probability of a big hit result by entering the high probability mode than in the low probability mode of "setting 6" which is the highest setting state. becomes. In addition, as for the high probability mode, it is possible to prevent the occurrence of advantages or disadvantages depending on the setting state of the pachinko machine 10, and suppress the storage capacity for pre-storing the high probability table 64g in the main side ROM 64. becomes possible.

The jackpot type counter C2 is configured to be incremented by 1 in order within the range of 0 to 29, and return to "0" after reaching the maximum value. The jackpot type counter C2 is periodically updated, and stored in the reservation storage area 65a at the timing when the game ball wins the first operation opening 33 or the second operation opening .

In this pachinko machine 10, a plurality of jackpot results are set. These multiple jackpot results are (1) the aspect of the opening/closing control of the special electric prize winning device 32 in the opening/closing execution mode, (2) the lottery mode in the winning/losing lottery means after the opening/closing execution mode ends, and (3) the first prize after the opening/closing execution mode ends. A plurality of jackpot results are set by providing a difference in the three conditions of the support mode in the universal electrical accessory 34a of the second operation port 34.

As a mode of opening/closing control of the special electric prize winning device 32 in the opening/closing execution mode, the frequency of winning to the special electric prize winning device 32 from the start to the end of the opening/closing execution mode is relatively high. A frequency winning mode and a low frequency winning mode are set. Specifically, in both the high-frequency winning mode and the low-frequency winning mode, the round game is executed up to a predetermined number of times.

A round game is a game that continues until either a predetermined upper limit duration time elapses or a predetermined upper limit number of game balls wins a special electric prize winning device 32 is satisfied. That is. In addition, the number of round games in the opening/closing execution mode triggered by the result of the big win is the same as the fixed number of rounds regardless of the type of the result of the big win triggered by the shift. Specifically, the upper limit number of round games is set to 15 rounds regardless of the jackpot result.

In addition, in the pachinko machine 10, a plurality of types of one-time opening mode of the special electric prize winning device 32 are set with different opening durations from opening to closing of the special electric prize winning device 32.例文帳に追加Specifically, a long time mode in which the open duration is set to a long time of 29 seconds, and a short time mode in which the open duration is set to a short time shorter than the long time of 0.06 seconds, is set.

In the pachinko machine 10, when the shooting operation device 28 is operated by the player, the game ball shooting mechanism 27 is driven so that one game ball is shot toward the game area PA every 0.6 seconds. controlled. In the round game, the upper limit number of end conditions is set to nine. Then, in the long time mode among the above open modes, the open continuation time is set to be longer than the product of the shooting cycle of the game ball and one round game. On the other hand, in the short-time mode, the opening duration is set to be shorter than the product of the game ball launch cycle and one round game, more specifically, shorter than the game ball launch cycle. Therefore, when one opening is performed in the long-time mode, it is expected that the special electric winning device 32 will win the maximum number of prizes in one round game, and one time in the short-time mode. When the opening is performed for the first time, it is expected that no prize will be won to the special electric prize winning device 32, or if there will be a prize, it will be about one.

In the high-frequency winning mode, the special electric winning device 32 is opened once in a long time mode in each round game. On the other hand, in the low-frequency winning mode, the special electric winning device 32 is opened once in a short time mode in each round game.

In the high frequency winning mode and the low frequency winning mode, the number of times of opening and closing the special electric winning device 32, the number of round games, the opening duration for one opening, and the upper limit number in one round game is higher than the low-frequency winning mode, and is not limited to the above value, and is arbitrary is.

As shown in FIG. 8, the distribution destination of the jackpot result for the jackpot type counter C2 is stored in the main ROM 64 as a distribution table 64h. In the distribution table 64h, low-probability jackpot results, low-win high-probability jackpot results, and maximum-benefit jackpot results are set as jackpot results in the case of a jackpot result.

A low-probability jackpot result is a jackpot result in which the opening/closing execution mode becomes a high-frequency prize winning mode, and after the opening/closing execution mode ends, the winning/failure lottery mode becomes a low-probability mode and the support mode becomes a high-frequency support mode. However, this high-frequency support mode transitions to the low-frequency support mode when the number of games reaches the end reference number of times (specifically, 100 times) after transition.

The result of the low winning high probability jackpot is that the opening and closing execution mode becomes the low frequency winning mode, and after the opening and closing execution mode ends, the lottery mode becomes the high probability mode and the support mode becomes the high frequency support mode. be. These high-probability mode and high-frequency support mode are continued until the lottery result in the success/failure lottery results in a big win state winning, and the game shifts to a big win state accordingly.

The maximum profit jackpot result is a jackpot result in which the opening/closing execution mode becomes a high-frequency prize winning mode, and after the opening/closing execution mode ends, the winning/failure lottery mode becomes a high-probability mode and the support mode becomes a high-frequency support mode. These high-probability mode and high-frequency support mode are continued until the lottery result in the success/failure lottery results in a big win state winning, and the game shifts to a big win state accordingly.

In relation to each game state described above, the normal game state is not the open/close execution mode, but the win/fail lottery mode is the low probability mode, and the support mode is the low frequency support mode. In addition, as the game result, it is possible to adopt a configuration in which the low winning high probability jackpot result is not set. In addition, in the opening and closing execution mode in the low winning high probability jackpot result, the number of round games may be less than in the case of the low probability jackpot result and the maximum profit jackpot result.

In the distribution table 64h, among the values of the jackpot type counter C2 of "0 to 29", "0 to 9" correspond to the low probability jackpot result, and "10 to 14" correspond to the low winning high probability jackpot result. Correspondingly, "15-29" corresponds to the maximum winning jackpot result.

Only one sorting table 64h is provided so that it is common to any of the setting states of "setting 1" to "setting 6". As a result, it is possible to prevent the setting state of the pachinko machine 10 from producing an advantage or a disadvantage in the distribution mode of the jackpot result, and the memory capacity for pre-storing the distribution table 64h in the main side ROM 64.例文帳に追加can be suppressed.

It should be noted that it is also possible to adopt a configuration in which the distribution mode of the jackpot result is different according to the setting state of the pachinko machine 10 . For example, the higher the set value, the higher the probability of being assigned to the maximum advantageous jackpot result, or the higher the set value, the higher the probability of being assigned to the maximum advantageous jackpot result or the low winning high probability jackpot result. In this case, the higher the set value, the higher the probability of entering the high-probability mode after a big win. Also, the higher the set value, the lower the probability of being distributed to the low winning high probability jackpot result. It is good also as a structure which can be distributed to a jackpot result. In this case, the higher the set value, the higher the probability of occurrence of the opening/closing execution mode of the high-frequency winning mode.

Next, the reach random number counter C3 will be described. The reach random number counter C3 is configured such that it is incremented by 1 in sequence within the range of 0 to 238, for example, and returns to "0" after reaching the maximum value. In the pachinko machine 10, an expected effect is set as a kind of display effect in the pattern display device 41.例文帳に追加The expected effect is a gaming machine equipped with a symbol display device 41 capable of displaying symbols in a variable manner, and in a game cycle that results in a predetermined big win, the final stop result is the award corresponding result. It is a display state for making the player think that it is a variable display state that is likely to result in the grant correspondence result in the stage before the stop result is derived and displayed after the symbol variable display is started in . Concretely, a combination of symbols having the same number on any of the activated lines is stopped and displayed for the award correspondence result.

There are two types of expectation effects: a ready-to-win display and an advance notice display for expecting the occurrence of the ready-to-win display and the occurrence of the grant correspondence result in a stage before the occurrence of the ready-to-win display.

In the ready-to-win display, a combination of ready-to-win symbols is displayed by stopping and displaying the symbols of some of the plurality of symbol rows displayed on the display surface 41a of the symbol display device 41, and the remaining symbols are displayed in that state. It includes a display state in which symbols are variably displayed in the symbol row. In addition, in a state in which the combinations of ready-to-win patterns are displayed as described above, the patterns are displayed in the remaining pattern rows in a variable manner, and a predetermined character or the like is displayed as a moving image on the background screen to produce a ready-to-win effect. , the combination of the ready-to-win pattern is reduced or hidden, and then a predetermined character or the like is displayed as a moving image on substantially the entire display surface 41a to perform the ready-to-win effect.

In the advance notice display, after the pattern display is started on the display surface 41a of the pattern display device 41, the patterns are displayed in a variable manner in all the pattern rows, or in a part of the pattern rows and a plurality of patterns are displayed. In the situation where the symbols are variably displayed in the symbol row, a mode is included in which characters are displayed separately from the symbols on the symbol row. It also includes a background screen in a predetermined mode different from the previous mode, and a pattern in the pattern row in a predetermined mode different from the previous mode. Such an advance notice display can occur in any game cycle when the reach display is performed or when the reach display is not performed. It is set to occur with probability.

The ready-to-win display is executed regardless of the value of the ready-to-win random number counter C3 in game rounds in which the same combination of symbols is finally stopped and displayed. Also, in a game cycle corresponding to a big hit result in which the same combination of symbols is not stop-displayed, the game is not executed regardless of the value of the reach random number counter C3. Also, in the game round corresponding to the result of losing, the reach random number counter C3 obtained at a predetermined timing by referring to the reach table stored in the main ROM 64 is executed when the reach display corresponds to the occurrence of the reach display. .

On the other hand, the decision as to whether or not to perform the advance notice display is made not by the main controller 60 but by the sound emission control device 81 . In this case, the sound emission control device 81 determines that the game round corresponding to one of the jackpot results is more likely to cause the notice display than the game round corresponding to the result of losing, and that the notice display with a low appearance rate is more likely to occur. Lottery processing for advance notice display is executed so as to satisfy at least one of the conditions of being likely to occur. Incidentally, the result of the lottery is reflected when the symbol display device 41 executes an effect for a game cycle.

Here, the probability of occurrence of the ready-to-win display in game rounds resulting in a loss is the same regardless of the setting state of "setting 1" to "setting 6". As a result, it is possible to prevent the setting state of the pachinko machine 10 from giving an advantage or a disadvantage with respect to the probability of occurrence of the ready-to-win display in game rounds resulting in a loss. However, the present invention is not limited to this, and a configuration may be adopted in which the higher the set value, the higher the probability of occurrence of the ready-to-win display in game rounds that result in an error.

Next, the variation type counter CS will be described. The fluctuation type counter CS is configured to be incremented by 1 in order within the range of 0 to 198, for example, and return to "0" after reaching the maximum value. The variation type counter CS is used when the main side CPU 63 determines the display continuation time in the special figure display unit 37a and the display continuation time of the design in the design display device 41. The fluctuation type counter CS is updated once each time a timer interrupt process, which will be described later, is executed, and is repeatedly updated within the remaining time until the next timer interrupt process is executed. Then, the buffer value of the variation type counter CS is acquired when determining the variation pattern at the start of the variation display in the special figure display unit 37a and at the start of variation in the design by the design display device 41.

<Regarding the processing configuration of the main CPU 63>
Next, each process executed by the main CPU 63 to advance the game will be described. The processing of the main CPU 63 can be roughly classified into main processing that is started when the power is turned on, and timer interrupt processing that is started periodically (with a period of 4 milliseconds in this embodiment).

<Main processing>
First, the main processing will be described with reference to the flowchart of FIG.

First, power-on wait processing is executed (step S101). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, one second) elapses after the main process is activated. The operation start and initial setting of the pattern display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S102).

After that, it is determined whether or not the setting key insertion portion 68a is turned on (step S103). If the setting key insertion portion 68a has not been turned ON (step S103: NO), it is determined whether or not the reset button 68c has been pressed (step S104). When the reset button 68c is pressed (step S104: YES), each area of the main RAM 65 is cleared except for the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the main RAM 65. "0" is cleared, and initial setting is performed for the "0" cleared area (step S105). That is, when the supply of the operating power to the pachinko machine 10 is started while pressing the reset button 68c without turning ON the setting key inserting portion 68a, the operation of the pachinko machine 10 for the information of the set value is performed. The clearing process of the main RAM 65 is executed while maintaining the state before the power supply is stopped, and the memory area for which the clearing process has been executed is initialized. As a result, other areas of the main RAM 65 can be initialized without changing the set values. In step S105, the various registers of the main CPU 63 are also initialized after being cleared to "0".

If the reset button 68c is not pressed (step S104: NO), it is determined whether or not the power failure flag is set to "1" (step S106). A power failure flag is provided in the main RAM 65, and when the predetermined power failure processing is normally executed when the supply of operating power to the main CPU 63 is stopped, the power failure flag is set to "1". will be set. If the power failure flag is set to "1", it is determined whether or not the checksum calculation result matches the checksum saved when the power was shut off, that is, the validity of the stored data is determined (step S107). . When the process of step S105 is executed, or when an affirmative determination is made in step S107, it is determined whether or not the setting value of the pachinko machine 10 is normal by confirming the main side RAM 65 (step S108). Specifically, if the setting value is any one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is determined to be abnormal.

When a negative determination is made in any of steps S106 to S108, operation prohibition processing is executed. In the operation prohibition process, after executing an error notification process for notifying the hall manager or the like of the occurrence of an error (step S109), an infinite loop occurs. The operation prohibition process is canceled by executing the all clear process (step S117), which will be described later.

If affirmative determinations are made in all steps S106 to S108, power-on setting processing is executed (step S110). In the power-on setting process, a predetermined area of the main side RAM 65 is set to an initial value such as initialization of a power failure flag, and a command corresponding to the current game state is transmitted to the sound emission control device 81 . Further, after executing the process of step S110, a recognition process (step S111) for causing the management IC 66 to recognize various information, and outputting various data to an external device connected to the reading terminal 68d of the MPU 62. data output processing for the purpose is executed (step S112). The details of these recognition processing and data output processing will be described later.

Although the main CPU 63 is configured to periodically execute timer interrupt processing, generation of timer interrupt processing is prohibited at the stage when the main processing is started. The state in which the occurrence of the timer interrupt process is prohibited is canceled at the timing before the process of step S112 is completed and the process of step S113 is executed, and execution of the timer interrupt process is permitted. As a result, when the supply of operating power to the main CPU 63 is started, the data output process of step S112 is completed, and the timer interrupt process is not executed until the stage before the process of step S113 is started. Therefore, the main CPU 63 does not start the process for advancing the game until the relevant situation is reached.

After that, the process proceeds to the remaining processes of steps S113 to S116. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. Although this remaining time varies according to the processing completion time of each timer interrupt process, the remaining process of steps S113 to S116 is repeatedly executed using such irregular time. In this respect, the remaining processes of steps S113 to S116 can be said to be non-periodic processes that are executed non-periodically.

In the remaining process, first, in step S113, interrupt prohibition is set to prohibit the occurrence of timer interrupt processing. In subsequent step S114, random number initial value update processing for updating the random number initial value counter CINI is performed, and in step S115, variation counter update processing for updating the variation type counter CS is performed. In these updating processes, the current numerical information is read from the corresponding counter of the main RAM 65, and after executing the process of adding 1 to the read numerical information, the process of overwriting the reading source counter is executed. In this case, they are cleared to "0" when the counter value exceeds the maximum value. After that, in step S116, an interrupt permission setting is performed to switch from a state in which the occurrence of timer interrupt processing is prohibited to a state in which it is permitted. When the process of step S116 has been executed, the process returns to step S113, and the processes of steps S113 to S116 are repeated.

On the other hand, if the setting key insertion part 68a is ON-operated (step S103: YES), the main side RAM 65 including the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the main side RAM 65 All the areas are cleared to "0" and initial setting is performed for the areas cleared to "0" (step S117). That is, when an operation for changing the setting state of the pachinko machine 10 is performed, all areas of the main side RAM 65 are cleared to "0" even if the reset button 68c is not pressed, and the clearing is performed. Initialization is performed for the storage area in which the process has been performed. In step S117, the various registers of the main CPU 63 are also initialized after being cleared to "0". In addition, it is not limited to this, and even if an operation for changing the setting state of the pachinko machine 10 is performed, if the reset button 68c is not pressed, all of the main side RAM 65 A configuration may be adopted in which the all clear process is executed when the reset button 68c is pressed while an operation for changing the setting state of the pachinko machine 10 is being performed without the clear process being executed.

After that, in step S118, the setting value update process is executed, and in step S119, the output process of the setting value update signal is executed, and then the process proceeds to step S110. The set value update process will be described below. The output processing of the setting value update signal will be described later in detail. FIG. 10 is a flow chart showing the set value update process.

First, "1" is set in the set value counter provided in the main RAM 65 (step S201). The setting value counter is a counter for specifying which setting value the setting state of the pachinko machine 10 is by the main side CPU 63 . By setting "1" to the set value counter, the set value becomes "set 1" regardless of the set value up to that point when the set value update process is executed.

After that, a set value display start process is executed (step S202). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number "1" corresponding to "setting 1" is displayed. The manager of the game hall can grasp the current setting state of the pachinko machine 10 by confirming the third notification display device 69c when changing the setting value.

Thereafter, on the condition that the setting key insertion portion 68a has not been turned off (step S203: NO), it is determined whether or not the update button 68b has been pressed once (step S204). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S204, the process returns to step S203 to determine whether or not the setting key insertion portion 68a has been turned off.

If the update button 68b has been pressed once (step S204: YES), 1 is added to the set value counter of the main RAM 65 (step S205). If the value of the set value counter after adding 1 exceeds "6" (step S206: YES), "1" is set to the set value counter (step S207). As a result, each time the update button 68b is pressed once, the set value is updated to the value one step higher. going back.

When a negative determination is made in step S206, or when the process of step S207 is executed, the setting value display update process is executed (step S208). In the set value display update process, the display of the third notification display device 69c is controlled so that the number corresponding to the value of the set value counter of the main side RAM 65 is displayed. By checking the third notification display device 69c, the manager of the game hall can grasp the setting state of the pachinko machine 10 after the update button 68b is pressed.

After executing the process of step S208, the process returns to step S203, and it is determined whether or not the setting key insertion portion 68a has been turned off. If the OFF operation has not been performed (step S203: NO), the processing after step S204 is executed again. If the OFF operation has been performed (step S203: YES), the setting value display termination process is executed (step S209). In the setting value display end processing, the display of the setting values on the third notification display device 69c is ended.

<Timer interrupt processing>
Next, timer interrupt processing will be described with reference to the flowchart of FIG. Timer interrupt processing is performed periodically (for example, every 4 milliseconds).

First, power failure information storage processing is executed (step S301). In the power failure information storage process, it is monitored whether or not a power failure signal corresponding to the occurrence of a power failure is received from the power failure monitoring board 67, and when the occurrence of a power failure is specified, the power failure process is executed and then an infinite loop is performed. Become. In the power failure processing, the power failure flag of the main RAM 65 is set to "1", the checksum is calculated, and the calculated checksum is stored.

After that, random number update processing for lottery is executed (step S302). In the lottery random number update process, the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the general electric accessory release counter C4 are updated. Specifically, the current numerical information is sequentially read out from the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the general electric role release counter C4, and the process of adding 1 to each of the read numerical information was executed. Afterwards, a process of overwriting the read source counter is executed. In this case, they are cleared to "0" when the counter value exceeds the maximum value. After that, in step S303, random number initial value update processing is executed in the same manner as in step S114, and in step S304, variation counter update processing is executed in the same manner as in step S115.

After that, fraud detection processing is executed to monitor whether or not a predetermined event set as a monitoring target for fraud has occurred (step S305). In the fraud detection process, the game stop flag provided in the main side RAM 65 is set to "1" by monitoring the occurrence of a plurality of types of events and confirming that a predetermined event has occurred. In the following step S306, it is determined whether or not the progress of the game is stopped by determining whether or not the game stop flag is set to "1". When a negative determination is made in step S306, the processes after step S307 are executed.

In step S307, port output processing is executed. In the port output process, when the output information has been set in the previous timer interrupt process, a process for outputting corresponding to the output information to the various driving units 32b and 34b is executed. For example, when the information to switch the special electric prize winning device 32 to the open state is set, the output of the drive signal to the special electric drive unit 32b is started, and when the information to switch to the closed state is set stops the output of the drive signal. In addition, when information is set to switch the general electric accessory 34a of the second operation port 34 to the open state, the output of the drive signal to the general electric drive unit 34b is started to switch to the closed state. When the information is set, the output of the drive signal is stopped.

After that, read processing is executed (step S308). In the reading process, signals other than the power failure signal and the winning signal are read, and the read information is stored for use in future processing.

After that, ball entry detection processing is executed (step S309). In the ball-entering detection process, signals received from the ball-entering detection sensors 42a to 49a are read, and based on the reading results, the out port 24a, the general prize-winning port 31, the special electric prize-winning device 32, and the first operation port 33 , the presence or absence of the ball entering the second operating port 34 and the through gate 35 is specified. The details of the ball-entering detection process will be described later.

After that, a timer update process is executed to collectively update numerical information of a plurality of types of timer counters provided in the main RAM 65 (step S310). In this case, the timer counters that are updated by subtracting the stored numerical information are collectively handled. may be configured.

After that, a shooting control process for controlling shooting of game balls is executed (step S311). In a situation where the shooting operation to the shooting operation device 28 is continued, one game ball is shot in 0.6 seconds, which is a predetermined shooting cycle. In the subsequent step S312, as an input state monitoring process, based on the information read in the reading process of step S308, disconnection confirmation of each ball detection sensor 42a to 49a, opening confirmation of the game machine body 12 and the front door frame 14 are performed. I do.

After that, a special figure special electric control process for performing execution control of the game round and execution control of the opening and closing execution mode is executed (step S313). Special figure special electric control processing is explained in detail later.

After that, the general map general electric control process is executed (step S314). In the general map general electric control process, when the prize to the through gate 35 is generated, the processing for acquiring the reservation information on the general map side is executed, and when the reservation information on the general map side is stored Then, open determination is performed for the reservation information, and processing for performing the production for the normal map is performed with the open determination as a trigger. Moreover, based on the result of open determination, the process which opens and closes the universal electrical accessory 34a of the 2nd operation|movement opening 34 is performed. In this case, if the support mode is the low-frequency support mode, the corresponding process is executed, and if the support mode is the high-frequency support mode, the corresponding process is executed. Further, when the opening/closing execution mode is selected, the low-frequency support mode is set even if the immediately preceding support mode is the high-frequency support mode.

In the following step S315, based on the processing result of step S313 and step S314 immediately before, while setting the output information for reflecting the increase or decrease number of pending information pertaining to the special figure display unit 37a to the special figure pending display unit 37b , Set the output information for reflecting the increase/decrease number of the reservation information related to the normal map display unit 38a to the normal map reservation display unit 38b. Further, in step S315, based on the processing results of step S313 and step S314 immediately before, along with setting the output information for updating the display content of the special figure display unit 37a, the display content of the normal figure display unit 38a Set the output information for updating.

After that, the content of the command and signal received from the payout control device 77 is confirmed, and payout state reception processing for performing processing corresponding to the confirmation result is executed (step S316). Also, a payout output process for setting the prize ball command as an output target is executed (step S317). Also, an external information setting process is executed for controlling the start and end of the output of the external signal according to the processing results of the various processes executed in the current timer interrupt process (step S318). Thereafter, a management output process for outputting information corresponding to the result of the game ball entering the game area PA to the management IC 66 is executed (step S319). Details of the management output process will be described later.

Next, the special figure special electric control process of step S313 is demonstrated, referring the flowchart of FIG.

First, a hold information acquisition process is executed (step S401). In the reservation information acquisition process, it is determined whether or not the winning to the first operation port 33 or the second operation port 34 has occurred, and if the winning has occurred, the number of reservations in the reservation storage area 65a is the upper limit It is determined whether or not it is less than a value (“4” in this embodiment). If the number of reservations is less than the upper limit, the number of reservations is incremented by 1, and the numerical information of the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 updated in the previous step S302 is used for holding. Store in the first reserved area among the empty reserved areas RE1 to RE4 of the area RE. It should be noted that when the winning to the first operation port 33 and the second operation port 34 occurs at the same time, the processing for acquiring the above-described pending information is executed within the range of executing the processing for acquiring the pending information once. Run multiple times. Also, when the hold information is newly acquired, a command at the time of acquisition corresponding to it is transmitted to the sound emission control device 81 . When receiving the command, the sound emission control device 81 updates the display of the image indicating the number of pieces of pending information on the pattern display device 41 to the display content corresponding to the increase of the pending information.

After that, the information of the special special electric counter provided in the main RAM 65 is read (step S402), and the special special electric address table provided in the main ROM 64 is read (step S403). Then, the start address corresponding to the information of the special special electric counter is acquired from the special special electric counter from the special special electric address table (step S404), and jumps to the process indicated by the acquired start address among the processes of steps S406 to S412 (step S405 ). The special special electric counter is a counter for the main side CPU 63 to grasp which of the various processes of steps S406 to S412 should be executed, and the special special electric address table is a counter for the special special electric counter. A start address of a program for executing the processes of steps S406 to S412 is set in association with the numerical information.

In step S406, special figure fluctuation start processing is executed. FIG. 13 is a flow chart showing the special figure variation start process.

In the special figure fluctuation start process, on condition that the number of pieces of reservation information stored in the reservation area RE is 1 or more (step S501: YES), data setting processing is executed (step S502). In the data setting process, first, the number of reservations is decremented by 1, and the data stored in the first reservation area RE1 of the reservation area RE is moved to the execution area AE. After that, a process of shifting the data stored in each of the reservation areas RE1 to RE4 of the reservation area RE is executed. This data shift process is a process for sequentially shifting the data stored in the first reservation area RE1 to the fourth reservation area RE4 to the lower area side. , the third reservation area RE3→the second reservation area RE2, the fourth reservation area RE4→the third reservation area RE3, etc. After that, the fourth reservation area RE4 is cleared to "0". At this time, a shift command is transmitted to the sound emission control device 81 for recognizing that the data in the reserved area has been shifted. When receiving the command, the sound emission control device 81 updates the display of the image indicating the number of pieces of pending information on the pattern display device 41 to the display content corresponding to the decrease of the pending information.

After executing the data setting process, the right/wrong table is read from the main ROM 64 (step S503). Specifically, first, the current winning/failing lottery mode is grasped by reading information indicating the winning/failure lottery mode of the main RAM 65 . In the case of the high probability mode, the high probability table 64g is read from the main side ROM64. On the other hand, when it is in the low probability mode, the setting state of the pachinko machine 10 is grasped by reading the value of the setting value counter of the main side RAM65. Then, the low accuracy tables 64a to 64f corresponding to the comprehended setting values are read from the main ROM 64. FIG.

After that, the success/failure determination processing is executed with reference to the success/failure tables 64a to 64g read in step S503 (step S504). In the success/failure determination process, the information for success/failure determination among the information stored in the execution area AE, that is, the numerical information related to the winning random number counter C1 is the big winning numerical information set in the success/failure tables 64a to 64g read in step S503. It is determined whether or not they match.

If the result of the success/failure determination process is a jackpot winning result (step S505: YES), a distribution determination process is executed (step S506). In the distribution determination process, out of the information stored in the execution area AE, information for distribution determination, that is, numerical information relating to the jackpot type counter C2 is read. Then, referring to the distribution table 64h provided in the main ROM 64, it specifies which jackpot result the numerical information related to the read jackpot type counter C2 corresponds to. Specifically, it specifies which one of the low probability jackpot result, the low prize winning high probability jackpot result, and the maximum profit jackpot result corresponds.

After that, a stop result setting process for the jackpot result is executed (step S507). Specifically, the information on the form of the pattern to be finally stopped and displayed on the special figure display unit 37a in the game round related to the start of this fluctuation is obtained from the stop result table for the jackpot result stored in advance in the main ROM 64. specified, and writes the specified information in the main side RAM 65 . In the stop result table for the jackpot result, information on the form of the pattern stopped and displayed on the special figure display section 37a is set differently for each type of jackpot result.

After that, a flag setting process corresponding to the distribution determination result is executed (step S508). Specifically, the main RAM 65 is provided with flags corresponding to the types of each jackpot result, and in step S508, among the flags corresponding to each jackpot result type, A flag corresponding to the result is set to "1".

On the other hand, if it is determined in step S505 that the result is not a jackpot winning result, a stop result setting process for a losing result is executed (step S509). Specifically, the information on the form of the pattern to be finally stopped and displayed on the special figure display unit 37a in the game round related to the start of this fluctuation is obtained from the stop result table for the deviation result stored in advance in the main side ROM 64 specified, and writes the specified information in the main side RAM 65 . The information on the form of the pattern selected in this case is different from the information on the form of the pattern selected in the case of the jackpot result.

After executing the process of either step S508 or step S509, the process of grasping the duration of the game round is executed (step S510). In such processing, the numerical information of the fluctuation type counter CS is acquired. Also, it is determined whether or not the ready-to-win display is generated on the symbol display device 41 in the current game round. Specifically, when the game round related to the start of this fluctuation is the result of the low-probability jackpot or the result of the maximum profit jackpot, it is determined that the ready-to-win display occurs. In addition, when neither of the jackpot results is obtained and the numerical information relating to the ready-to-win random number counter C3 stored in the execution area AE is numerical information corresponding to the occurrence of ready-to-win, it is determined that a ready-to-win display occurs.

When it is determined that the ready-to-win display occurs, the continuous period table for ready-to-win occurrence generation stored in the main ROM 64 is referred to, and the duration of the game cycle corresponding to the numerical information of the current variation type counter CS is acquired. . On the other hand, when it is determined that the ready-to-win display does not occur, the continuous period table for no-to-win occurrence stored in the main ROM 64 is referred to, and the continuation of the game round corresponding to the numerical information of the current variation type counter CS. Get duration. Incidentally, the duration of the game times that can be obtained by referring to the non-reach duration table is different from the duration of the game times that can be obtained by referring to the duration table for reach occurrence.

It should be noted that the continuation period of the game round when the ready-to-win situation does not occur is set so that the continuation period of the game round becomes shorter as the number of reservation information stored in the reservation area RE increases. Also, in the situation where the support mode is the high frequency support mode, compared to the case where the number of pending information is the same as in the situation where the support mode is the low frequency support mode, a shorter duration of game rounds is selected. A non-reach duration table is set. However, the present invention is not limited to this, and a configuration may be adopted in which the duration of the game cycle does not change according to the number of pieces of pending information or the support mode, or the above relationship may be reversed. Furthermore, the above configuration may be applied to the continuation period of the game cycle when reach occurs. In addition, in the case of various jackpot results, the duration table may be set individually for each of the case of the loss reach and the case of the loss result of no reach. In this case, the continuation period of the game round is distributed according to each game result.

After that, the information of the duration of the game round acquired in step S510 is set in the special figure special electric timer counter provided in the main side RAM 65 (step S511). The update of the numerical information set in the special special electric timer counter is executed in the timer update process (step S310). By the way, as an effect for the game cycle, the variable display of the pattern in the special figure display unit 37a and the variable display of the pattern in the pattern display device 41 are performed. is displayed (in the symbol display device 41, a predetermined combination of symbols is waiting on the activated line), the final stop display is performed for the final stop period (for example, 0.5 seconds). In this case, the duration of the game round acquired in step S510 is the total time for one game round.

After that, the variation command and the type command are transmitted to the sound emission control device 81 (step S512). The variation command includes information on the duration of game rounds. Here, as described above, the duration of game rounds obtained by referring to the non-reach duration table is different from the duration of game rounds obtained by referring to the duration table for reach occurrence. Even if the variation command does not include information on the presence or absence of the occurrence of reach, the sound emission control device 81 can specify the presence or absence of the occurrence of reach from the information on the duration of the game cycle. In this respect, it can be said that the variation command includes information indicating whether or not reach occurs. Note that the variation command may include information that directly indicates the presence or absence of reach occurrence. Also, the type command includes information on the game result.

When the voice emission control device 81 receives the command for variation and the type command from the main side CPU 63, the display light emission portion 53, the speaker portion 54 and the pattern display device 41 execute the effect for the game round. In this case, the effect for the game round is performed in a mode corresponding to the contents of the variation command and the type command. In addition, the pattern display device 41 performs a variable display of symbols as an effect for the game cycle, and when the effect for the game cycle ends, a combination of symbols corresponding to the results of the winning/failure determination process and the distribution determination process is displayed. Stop is displayed.

Then, the variable display of the pattern in the special figure display part 37a is started (step S513). Then, 1 is added to the special figure special electric counter (step S514). In this case, since the numerical information of the special figure special electric counter when the special figure fluctuation start processing is executed is "0", the numerical information of the special figure special electric counter becomes "1". After that, the eleventh output flag provided in the main RAM 65 is set to "1" (step S515). The eleventh output flag is a flag for specifying that the main side CPU 63 should output information indicating that a game cycle has started to the management IC 66 .

Returning to the explanation of the special figure special electric control processing (FIG. 52), in step S407, the special figure fluctuation processing is executed. In the special figure fluctuation process, it is determined whether or not it is the timing before the final stop display during the duration of the game round, and if it is before the final stop display, the display mode of the pattern in the special figure display section 37a is regulated. Execute processing to change the When it is time to display the final stop, by adding 1 to the numerical information of the special figure special electric counter, the numerical information of the counter is changed from the one corresponding to the special figure fluctuation processing to the special figure fixed processing. update to something. In this embodiment, the main CPU 63 does not send the final stop command to the sound emission control device 81 .

In step S408, processing during special figure determination is executed. In the processing during special figure determination, the display mode of the pattern in the special figure display section 37a is set to the display mode corresponding to the lottery result of the current game round. Also, in the special figure determination process, it is determined whether or not the final stop period has elapsed, and when the period has elapsed, it is determined whether or not the transition to the opening/closing execution mode occurs. When the transition to the opening/closing execution mode does not occur, the numerical information of the special special electric counter is cleared to "0". When the transition to the opening and closing execution mode occurs, by adding 1 to the numerical information of the special special electric counter, the numerical information of the counter is changed from the one corresponding to the special electric confirmation processing to the one corresponding to the special electric start processing. Update.

In step S409, special electric start processing is executed. In the special electric start processing, if the processing for starting the opening period in the current opening/closing execution mode has not yet been executed, the processing for setting the opening period is executed. Also, an opening command is transmitted to the sound emission control device 81 . By receiving the opening command, the sound emission control device 81 causes the display emission section 53, the speaker section 54 and the pattern display device 41 to perform the opening effect. When the opening period has passed, a start process for starting the first round game is executed. In the start processing, the special electric prize winning device 32 is set in an open state, and conditions for ending the round game are set. When setting the end condition, the upper limit duration time for continuing the special electric prize winning device 32 in the open state in the first round game of this time is set, and the special electric prize winning device 32 can win in the first round game of this time. The upper limit number of game balls is set in a winning number counter provided in the main side RAM 65. - 特許庁

In step S410, special electric open processing is executed. In the special electric open process, it is determined whether or not the end condition of the round game is established. When the termination condition is established, the special electric prize winning device 32 is closed. Then, if the round game ended this time is not the last round game to be executed, by adding 1 to the numerical information of the special special electric counter, the numerical information of the counter is changed from the one corresponding to the special electric open processing to the special electric closed processing. If the round game that ended this time is the last round game, the numerical information of the special figure special electric counter is added by 2, so that the numerical information of the counter corresponds to the special electric open processing. Update from one to one corresponding to the special electric end processing.

In step S411, processing during special electric closing is executed. In the special electric closing process, it is determined whether or not the interval period between round games has elapsed. The interval period is set when the previous round game ends. When the interval period has passed, the special electric prize winning device 32 is put into an open state, and the end condition of the round game is set. Then, by subtracting 1 from the numerical value information of the special special electric counter, the numerical value information of the counter is updated from the one corresponding to the special electric closed processing to the one corresponding to the special electric open processing.

In step S412, special electric end processing is executed. In the special electric end processing, if the processing for starting the ending period in the current opening/closing execution mode has not yet been executed, the ending period (for example, 5 seconds) is set and the ending command is transmitted to the sound emission control device 81. . By receiving the ending command, the sound emission control device 81 causes the display light emission section 53, the speaker section 54 and the pattern display device 41 to execute the ending effect. When the ending period elapses, each of the success/failure lottery mode and the support mode after the end of the opening/closing execution mode is set to a mode corresponding to the result of the big win that triggered the start of the opening/closing execution mode this time.

Next, based on the detection results of the respective ball detection sensors 42a to 49a, the main side CPU 63 controls the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, the second operating port 34, and the through hole. A configuration for specifying whether or not a game ball has entered the gate 35 will be described. FIG. 14 is an explanatory diagram for explaining a configuration for inputting the detection results of the entering ball detection sensors 42a to 49a to the main side CPU 63. As shown in FIG.

The main side CPU 63 is provided with an input port 63a. The input port 63a is configured as an 8-bit parallel interface so that it can handle 8 types of signals simultaneously. Areas for storing "0" or "1" information according to the voltage of each signal are provided in one-to-one correspondence with each terminal. That is, the area includes 0th bit D0 to 7th bit D7. In addition, although more than eight types of signals are input to the input port 63a, the number of signals to be input to the input port 63a is limited to eight types by the driver IC. Switched through switching control.

In the entering ball detection process (step S309) of the timer interrupt process (FIG. 11), the signal group to be input to the input port 63a is set to the signal group from each of the entering ball detection sensors 42a to 49a. In such a setting, the 0th bit D0 stores information corresponding to the detection signal from the first winning opening detection sensor 42a, and the first bit D1 corresponds to the detection signal from the second winning opening detection sensor 43a. The second bit D2 stores information corresponding to the detection signal from the third winning opening detection sensor 44a, and the third bit D3 stores information corresponding to the detection signal from the special train detection sensor 45a. , the fourth bit D4 stores information corresponding to the detection signal from the first working opening detection sensor 46a, the fifth bit D5 stores information corresponding to the detection signal from the second working opening detection sensor 47a, The 6th bit D6 stores information corresponding to the detection signal from the outlet detection sensor 48a, and the 7th bit D7 stores information corresponding to the detection signal from the gate detection sensor 49a.

Each of the ball entry detection sensors 42a to 49a detects the passage of the game ball by outputting a LOW level signal indicating non-detection as a detection signal when the passage of the game ball is not detected. In this case, a HI level signal indicating that detection is in progress is output as a detection signal. When the input port 63a receives a LOW level signal, it stores "0" information in the corresponding bit, and when it receives a HI level signal, stores "1" in the corresponding bit. store the information of In other words, in a situation in which the passage of the game ball is not detected by the ball entry detection sensors 42a to 49a, "0" information corresponding to the information indicating non-detection is stored in the corresponding bit, and the passage of the game ball is stored. In the detected state, information of "1" corresponding to information indicating that detection is being performed is stored for the corresponding bit.

FIG. 15 is a flow chart showing the ball entry detection process executed in step S309 of the timer interrupt process (FIG. 11).

When it is confirmed that the state in which information "0" is stored in the 0th bit D0 has changed to the state in which information "1" is stored, the first winning hole detection sensor 42a detects one It is determined that a game ball has been detected (step S601: YES). In this case, the first output flag provided in the main RAM 65 is set to "1" (step S602), and the value of the 10 prize ball counter provided in the main RAM 65 is incremented by 1 (step S603). . The first output flag is for specifying that the main side CPU 63 should output information indicating that one game ball has been detected by the first winning hole detection sensor 42a to the management IC 66. is a flag. The 10 prize ball counter is a counter for the main side CPU 63 to specify the number of times the payout of 10 game balls should be executed. When the value of the 10 prize ball counter is 1 or more, the 10 prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the 10 prize ball command is output. When the command is output once, the value of the 10-ball counter is subtracted by 1. When the payout control device 77 receives the 10 prize ball command, it drives and controls the payout device 76 so that 10 game balls are paid out.

When it is confirmed that the state in which the information "0" is stored in the first bit D1 has changed to the state in which the information "1" is stored, the second winning hole detection sensor 43a detects one It is determined that a game ball has been detected (step S604: YES). In this case, the second output flag provided in the main RAM 65 is set to "1" (step S605), and the value of the 10 prize ball counter provided in the main RAM 65 is incremented by 1 (step S606). . The second output flag is for the main side CPU 63 to specify that the information output indicating that one game ball has been detected by the second winning hole detection sensor 43a should be output to the management IC 66. is a flag.

When it is confirmed that the state in which the information "0" is stored in the second bit D2 has changed to the state in which the information "1" is stored, the third winning hole detection sensor 44a detects one It is determined that a game ball has been detected (step S607: YES). In this case, the third output flag provided in the main RAM 65 is set to "1" (step S608), and the value of the 10 prize ball counter provided in the main RAM 65 is incremented by 1 (step S609). . The third output flag is for specifying that the main side CPU 63 should output information indicating that one game ball has been detected by the third winning hole detection sensor 44a to the management IC 66. is a flag.

When it is confirmed that the state in which information "0" is stored in the third bit D3 has changed to the state in which information "1" is stored, one game ball is detected by the special electric detection sensor 45a. It is determined that it has been detected (step S610: YES). In this case, the special electric winning flag provided in the main RAM 65 is set to "1" (step S611), the fourth output flag provided in the main RAM 65 is set to "1" (step S612), and further The value of the 15 prize ball counter provided in the main side RAM 65 is incremented by 1 (step S613). The special electric prize flag is a flag for the main side CPU 63 to specify that one game ball has entered the special electric prize winning device 32 in the round game in the open/close execution mode. By confirming that the special electric prize flag is set to "1" in the special electric prize control processing (step S313) of the timer interrupt processing (FIG. 11), one game ball enters the special electric prize winning device 32. It specifies that a ball has been generated, and subtracts 1 from the number of remaining balls that can enter the special electric prize winning device 32 in the round game. When the process of subtracting 1 from the possible number of winning balls is executed, the special electric winning prize flag is cleared to "0". The fourth output flag is a flag for the main side CPU 63 to specify that information indicating that one game ball has been detected by the special electric detection sensor 45a should be output to the management IC 66. . The 15 prize ball counter is a counter for the main side CPU 63 to specify the number of times the payout of 15 game balls should be executed. When the value of the 15 prize ball counter is 1 or more, the 15 prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (Fig. 11), and the 15 prize ball command is output. When the command is output once, the value of the 15 prize ball counter is subtracted by 1. When the payout control device 77 receives the 15 prize ball command, it drives and controls the payout device 76 so that 15 game balls are paid out.

When it is confirmed that the state in which information "0" is stored in the fourth bit D4 has changed to the state in which information "1" is stored, the first operation opening detection sensor 46a detects one It is determined that a game ball has been detected (step S614: YES). In this case, the first operation winning flag provided in the main RAM 65 is set to "1" (step S615), and the fifth output flag provided in the main RAM 65 is set to "1" (step S616). Furthermore, the value of the one-ball counter provided in the main side RAM 65 is incremented by 1 (step S617). The first operation winning flag is a flag for specifying in the main side CPU 63 that one game ball has entered the first operation opening 33 . In the special figure special electric control processing (step S313) of the timer interrupt processing (FIG. 11), by confirming that the first operation winning flag is set to "1", it is stored in the reservation area RE of the reservation storage area 65a On the condition that the number of pieces of pending information stored is less than the upper limit of four, a process of newly storing pending information is executed. It is confirmed that "1" is set to the first operation winning flag in the special electric special electric control processing (step S313), and when the processing corresponding to the confirmation is executed, the first operation winning flag is cleared to "0" do. The fifth output flag is for the main side CPU 63 to specify that information output indicating that one game ball has been detected by the first operating opening detection sensor 46a should be output to the management IC 66. is a flag. The one prize ball counter is a counter for the main side CPU 63 to specify the number of times one game ball should be paid out. When the value of the counter for one prize ball is 1 or more, a one prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and a one prize ball command is output. When the command is output once, the value of the one prize ball counter is subtracted by one. When the payout control device 77 receives the one prize ball command, it drives and controls the payout device 76 so that one game ball is paid out.

When it is confirmed that the state where information "0" is stored in the fifth bit D5 has changed to the state where information "1" is stored, the second operating opening detection sensor 47a detects one It is determined that a game ball has been detected (step S618: YES). In this case, the second operation winning flag provided in the main RAM 65 is set to "1" (step S619), and the sixth output flag provided in the main RAM 65 is set to "1" (step S620). Furthermore, the value of the one-ball counter provided in the main side RAM 65 is incremented by 1 (step S621). The second operation winning flag is a flag for specifying in the main side CPU 63 that one game ball has entered the second operation opening 34 . In the special figure special electric control processing (step S313) of the timer interrupt processing (FIG. 11), by confirming that the second operation winning flag is set to "1", it is stored in the reservation area RE of the reservation storage area 65a On the condition that the number of pieces of pending information stored is less than the upper limit of four, a process of newly storing pending information is executed. It is confirmed that "1" is set to the second operation winning flag in the special electric special electric control processing (step S313), and when the processing corresponding to the confirmation is executed, the second operation winning flag is cleared to "0". do. The sixth output flag is for the main side CPU 63 to specify that the information output indicating that one game ball has been detected by the second operation opening detection sensor 47a should be output to the management IC 66. is a flag.

When it is confirmed that the state in which information "0" is stored in the sixth bit D6 has changed to the state in which information "1" is stored, one game ball is detected by the outlet detection sensor 48a. is detected (step S622: YES). In this case, the seventh output flag provided in the main RAM 65 is set to "1" (step S623). The seventh output flag is a flag for the main side CPU 63 to specify that information indicating that one game ball has been detected by the outlet detection sensor 48a should be output to the management IC 66. be.

When it is confirmed that the state in which information "0" is stored in the seventh bit D7 has changed to the state in which information "1" is stored, one game ball is detected by the gate detection sensor 49a. It is determined that it has been detected (step S624: YES). In this case, the gate winning flag provided in the main RAM 65 is set to "1" (step S625). The gate winning flag is a flag for the main side CPU 63 to specify that one game ball has entered the through gate 35 . By confirming that "1" is set to the gate winning prize flag in the normal map general electric control processing (step S314) of the timer interrupt processing (FIG. 11), the general map stored in the general electric reservation area 65c On the condition that the number of pending information on the side is less than 4, which is the upper limit number, the processing of storing the numerical information of the current general electric utility item open counter C4 in the general electric holding area 65c as the holding information on the general map side. to run. It is confirmed that "1" is set to the gate winning flag in the general/universal electric control processing (step S314), and when the processing corresponding to the confirmation is executed, the gate winning flag is cleared to "0".

In addition, since the timer interrupt processing (FIG. 11) is started at a period of 4 milliseconds as already explained, when the detection of one gaming ball is started by one of the entering ball detection sensors 42a to 49a, the corresponding The main side CPU 63 identifies that one game ball has been detected by the entering ball detection sensors 42a to 49a in a situation where the detection of the one game ball is continued by the entering ball detection sensors 42a to 49a. is performed at Therefore, it is sufficient to provide one each of the first to seventh output flags.

Next, the contents of processing executed by the payout control device 77 will be described. First, the electrical configuration of the payout control device 77 and various devices communicating with the payout control device 77 will be described with reference to the block diagram of FIG.

The payout control device 77 has an MPU 91 . The MPU 91 incorporates a payout side CPU 92, which is an arithmetic processing device including a control section and a calculation section, as well as a payout side ROM 93, a payout side RAM 94, an interrupt circuit, a timer circuit, a data input/output circuit, and the like.

The payout-side ROM 93 is a memory (that is, a non-volatile storage means) that does not require power supply from the outside to retain memory, such as a NOR flash memory and a NAND flash memory, and is used exclusively for reading. The payout side ROM 93 stores various control programs and fixed value data executed by the payout side CPU 92 .

The payout side RAM 94 is a memory such as SRAM and DRAM that requires external power supply for memory retention (that is, volatile storage means), and is used for both reading and writing. The payout-side RAM 94 can be randomly accessed, and has a faster read time than the payout-side ROM 93 when compared with the same data capacity. The payout side RAM 94 temporarily stores various data for execution of the control program stored in the payout side ROM 93 .

The payout side CPU 92 can perform two-way communication with the main side CPU 63 . When the payout side CPU 92 receives the prize ball command from the main side CPU 63, it drives and controls the payout device 76 so that the number of game balls corresponding to the prize ball command is paid out. In addition, the payout side CPU 92 monitors whether or not the game ball can be paid out normally, and if it is specified that it is not possible to pay out the game ball normally, the payout side RAM 94 To stop a payout device 76 even in a situation where unpaid prize ball number information is stored. In addition, the payout CPU 92 transmits to the main CPU 63 a payout restriction command indicating that the payout cannot be performed normally. When the main side CPU 63 receives the payout restriction command, the symbol display device 41, the display light emitting unit 53 and the speaker unit 54 inform that it is not possible to normally pay out the game balls. A notification command is transmitted to the sound emission control device 81 so that A state in which the lower tray 56a is full of game balls, a no-ball state in which the tank 75 is not replenished with game balls, and a payout device 76 are states in which the game balls cannot be normally dispensed. does not operate normally, a main body open state in which the game machine main body 12 is opened from the outer frame 11, and a front door open state in which the front door frame 14 is opened from the inner frame 13. .

A full tank detection sensor (not shown) is provided in the middle of the game ball passage leading from the payout device 76 to the lower tray 56a. The payout side CPU 92 specifies that the tank is full when the game balls are continuously detected by the full-tank detection sensor, and the state in which the game balls are continuously detected by the full-tank detection sensor is cancelled. It specifies that the full tank state is canceled when the tank is full.

A ball non-detection sensor (not shown) is provided in the middle of the game ball passage leading from the tank 75 to the payout device 76 , and the detection result of the ball non-detection sensor is input to the payout side CPU 92 . The payout-side CPU 92 identifies the state of no ball when the game ball is not continuously detected by the ball non-detection sensor, and when the state where the game ball is not continuously detected by the ball non-detection sensor is cancelled. Determine that the ballless state has been released.

The payout device 76 is provided with a payout detection sensor (not shown) for detecting game balls paid out from the payout device 76 , and the detection result of the payout detection sensor is input to the payout side CPU 92 . The payout side CPU 92 specifies that one game ball has been paid out from the payout device 76 when the game ball is detected by the payout detection sensor. In addition, the payout side CPU 92 specifies that the payout abnormal state occurs when the game ball is not continuously detected by the payout detection sensor in spite of driving and controlling the payout device 76 so that the game ball is paid out. , When the state in which the game balls are not continuously detected by the payout detection sensor is canceled, it is specified that the abnormal payout state is canceled.

A front door open sensor 95 is provided on the front surface of the inner frame 13 (see FIG. 2), and the detection result of the front door open sensor 95 is input to the payout side CPU 92 . In this case, when the front door frame 14 is closed with respect to the inner frame 13, the front door open sensor 95 transmits a closing detection signal to the dispensing side CPU 92, and the front door frame 14 is opened with respect to the inner frame 13. , the front door open sensor 95 transmits an open detection signal to the payout side CPU 92 . The dispensing side CPU 92 identifies that the front door frame 14 is in the closed state when receiving the closed detection signal from the front door open sensor 95, and when receiving the open detection signal from the front door open sensor 95. Identify that the front door frame 14 is in the open state. In addition, the dispensing side CPU 92 transmits a front door opening command to the main side CPU 63 at the timing when the front door frame 14 is specified to have changed from the closed state to the open state, and specifies that the front door frame 14 has changed from the open state to the closed state. A front door closing command is transmitted to the main side CPU 63 at the timing. The main side CPU 63 specifies that the front door frame 14 is in the open state when receiving the front door open command, and specifies that the front door frame 14 is in the closed state when receiving the front door closing command.

A main body open sensor 96 is provided on the front surface of the back pack unit 15 (see FIG. 2), and the detection result of the main body open sensor 96 is input to the payout side CPU 92 . In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closing detection signal to the payout side CPU 92, and the gaming machine main body 12 is in the open state with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the payout side CPU 92 . The payout side CPU 92 specifies that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and determines that the gaming machine main body 12 is in the closed state when receiving the opening detection signal from the main body opening sensor 96. Identify that the main body 12 is in the open state. In addition, the payout side CPU 92 transmits a body opening command to the main side CPU 63 at the timing specified that the game machine body 12 has changed from the closed state to the open state, and specified that the game machine body 12 has changed from the open state to the closed state. A body closing command is transmitted to the main side CPU 63 at the timing. The main CPU 63 specifies that the gaming machine main body 12 is in the open state when receiving the main body opening command, and specifies that the gaming machine main body 12 is in the closed state when receiving the main body closing command.

The timer interrupt processing executed by the payout side CPU 92 will be described with reference to the flowchart of FIG. The timer interrupt process is repeatedly started at a predetermined cycle (for example, 2 milliseconds).

First, the full-tank process is executed (step S701). In the full-tank process, as already explained, based on the detection result of the full-tank detection sensor, it is specified whether the tank is full or not, and if the tank is full, processing for stopping the payout of game balls. is executed, and a command indicating that the tank is full is sent to the main side CPU 63 . Further, when the full tank state is canceled, a process for enabling the payout of game balls is executed, and a command indicating that the full tank state has been canceled is transmitted to the main side CPU 63 .

After that, a ball useless process is executed (step S702). In the no-ball processing, as already explained, it is determined whether or not the ball is in the no-ball state based on the detection result of the no-ball detection sensor. While executing it, it transmits a command indicating that it is in the no-ball state to the main side CPU 63 . Further, when the no-ball state is canceled, a process for enabling the payout of game balls is executed, and a command indicating that the no-ball state has been canceled is transmitted to the main side CPU 63 .

Thereafter, a payout abnormality monitoring process is executed (step S703). In the abnormal payout monitoring process, as already explained, it is determined whether or not the abnormal payout state is present based on the detection result of the payout detection sensor, and if the abnormal payout state exists, the process of stopping the payout of game balls is executed. At the same time, it transmits to the main side CPU 63 a command indicating that the payout is in an abnormal state. Further, when the abnormal payout state is canceled, a process for enabling the payout of game balls is executed, and a command indicating that the abnormal payout state is canceled is transmitted to the main side CPU 63 .

Thereafter, front door opening monitoring processing is executed (step S704). In the front door open monitoring process, as already explained, it is determined whether or not the front door frame 14 is open based on the detection result of the front door open sensor 95. If the front door frame 14 is open, A front door opening command is transmitted to the main side CPU 63 while executing processing for stopping the payout of game balls. Further, when the front door frame 14 is closed, a process for enabling the payout of game balls is executed, and a front door closing command is transmitted to the main side CPU 63 .

Thereafter, main body opening monitoring processing is executed (step S705). In the main body open monitoring process, as already described, it is determined whether or not the gaming machine main body 12 is in the open state based on the detection result of the main body open sensor 96, and if the gaming machine main body 12 is in the open state, a game ball is detected. , and transmits a body opening command to the main side CPU 63 . Further, when the gaming machine main body 12 is closed, a process for enabling the payout of game balls is executed, and a main body closing command is transmitted to the main side CPU 63 .

Thereafter, command reading processing is executed (step S706). In the command reading process, a process of reading the prize ball command transmitted by the main side CPU 63 is executed, and the prize ball command is stored in the payout side RAM 94 . Then, after executing a prize ball setting process for adding the number corresponding to the received prize ball command to the undistributed prize ball number information in the payout side RAM 94 (step S707), game balls are paid out by the payout device 76 Payout control processing for controlling the execution of is executed (step S708). In the payout control process, when the information on the number of unpaid prize balls stored in the payout side RAM 94 is a value of 1 or more, the drive control of the payout device 76 is performed, and one game ball is detected by the payout detection sensor. When it does, 1 is subtracted from the value of prize ball number information. Then, when the value of the prize ball number information becomes "0", the driving control of the payout device 76 is stopped. After that, external information setting processing is executed for controlling the start and end of the output of the external signal according to the processing results of the various processing executed in the current timer interrupt processing (step S709).

Next, a configuration for externally outputting information from the pachinko machine 10 to the hall computer HC provided in the game hall will be described.

As shown in FIG. 2, the back pack unit 15 is provided with an external terminal plate 97 . The external terminal plate 97 is provided with a large number of external terminals, some of which are electrically connected to the main CPU 63 and some of which are A plurality of external terminals are electrically connected to the payout side CPU 92 . Since the main CPU 63 and the payout CPU 92 are electrically connected to the external terminal plate 97, the main CPU 63 and the payout CPU 92 send information to the hall computer HC as shown in FIG. It is possible to output

One external terminal of the external terminal plate 97 is electrically connected to the front door open sensor 95 and one external terminal of the external terminal plate 97 is electrically connected to the main body open sensor 96 . More specifically, a signal relay board 98 is provided in the middle of the signal path from the front door open sensor 95 to the dispensing side CPU 92 . The signal relay board 98 is provided with a branch path SL2 branched from the signal path SL1 directed from the front door open sensor 95 to the dispensing side CPU92. The branch path SL2 is connected to an external terminal on the external terminal plate 97 for opening the front door. Therefore, an electric signal corresponding to the detection result of the front door opening sensor 95 is input not only to the dispensing side CPU 92 but also to the external terminal for opening the front door on the external terminal plate 97 . As a result, a signal indicating whether or not the front door frame 14 is in the open state can be externally output to the hall computer HC without going through the control by the payout side CPU 92 .

More specifically, the signal relay board 98 is provided with a branch path SL4 branched from the signal path SL3 extending from the main body open sensor 96 to the payout side CPU 92 . The branch path SL4 is connected to an external terminal on the external terminal plate 97 for opening the main body. Therefore, an electric signal corresponding to the detection result of the body opening sensor 96 is input not only to the dispensing side CPU 92 but also to the external terminal for opening the body on the external terminal plate 97 . This makes it possible to externally output a signal indicating whether or not the gaming machine main body 12 is in the open state to the hall computer HC without intervention of the control by the payout side CPU 92 .

Next, the contents of the information externally output from the main side CPU 63 and the payout side CPU 92 to the hall computer HC will be described. First, the contents of the information externally output from the main CPU 63 to the hall computer HC will be described.

The main CPU 63 performs information output setting to each external terminal assigned to the main CPU 63 on the external terminal board 97 in the external information setting process (step S318) in the timer interrupt process (FIG. 11). As information output from the main CPU 63 to the external terminal board 97, information indicating that the open/close execution mode is in progress, information indicating that the support mode is in the high-frequency support mode, and information indicating that one game cycle has ended. Information indicating that and a predetermined number (for example, 100) game balls from the game area PA through any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33 and the second operating port 34 Information indicating that the game ball has been discharged, information indicating that the game ball has entered the first operating port 33, and information indicating that the game ball has entered the second operating port 34 are included. .

The payout side CPU 92 sets the output of information to each external terminal assigned to the payout side CPU 92 on the external terminal board 97 in the external information setting process (step S709) in the timer interrupt process (FIG. 17). Information output from the payout side CPU 92 to the external terminal plate 97 includes information indicating that 10 game balls have been paid out.

In the hall computer HC, it is possible to grasp the manner in which game balls are put out in the pachinko machine 10 according to various information received from the pachinko machine 10 through the external terminal board 97 . for example,
・Ball payout rate, which is the ratio of the number of game balls that have been discharged from the game area PA of the pachinko machine 10 until 100 game balls are discharged Ball rate (hereinafter referred to as "B")
・Ball output rate in open/close execution mode ・Ball output rate in high-frequency support mode "S")
・ BS x “Number of prize balls for winning in the first operation port 33 and the second operation port 34”
・The number of game balls entering the first operation opening 33 until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as "S1")
- The number of game balls entering the second operation opening 34 until 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as "S2")
・B-(S1דNumber of prize balls for winning to first operating port 33”+S2דNumber of prize balls for winning to second operating port 34”)
・Probability of occurrence of opening/closing execution mode per unit game time ・Probability of occurrence of high-frequency support mode per unit game time, etc. are calculated. As a result, it is possible to manage the entry mode of game balls in the game area PA of the pachinko machine 10 in the hall computer HC. The number of prize balls means the number of game balls paid out when one game ball enters the corresponding ball entry portion.

<Structure for managing winning modes of game balls>
Next, a configuration for managing the game history using the management IC 66 will be described. First, the electrical configuration of the management IC 66 will be described with reference to the block diagram of FIG.

As already explained, the MPU 62 of the main controller 60 has a main CPU 63 , a main ROM 64 , a main RAM 65 and a management IC 66 . In addition to these, the MPU 62 has an I/F 101 as well as the already-described reading terminal 68d.

The I/F 101 is an interface for transmitting and receiving signals to and from equipment outside the MPU 62 . The I/F 101 is electrically connected to the main side CPU 63 via the internal bus 103 . Through the input port of the I/F 101, detection results from sensors such as the incoming ball detection sensors 42a to 49a and commands from the payout side CPU 92 are input to the MPU 62, and based on the input detection results and command contents. Various processes are executed by the main CPU 63 as already described. In addition, when a signal is output to a device such as the drive unit 32b for a special electric as a result of various processing executed by the main side CPU 63, the signal is output through the output port of the I/F 101, and the main side As a result of execution of various processes by the CPU 63 , when command output is performed to the payout side CPU 92 and the sound emission control device 81 , the command output is performed through the output port of the I/F 101 .

The management IC 66 includes a management side I/F 111, a management side CPU 112, a management side ROM 113, a management side RAM 114, an RTC 115, a correspondence memory 116, a history memory 117, a calculation result memory 131, It has These devices are connected through an internal bus 66a provided in the management IC 66 so as to be bidirectionally communicable.

The management side I/F 111 receives various signals from the main side CPU 63 via the signal path group 118 for unidirectional communication built in the MPU 62, and the signal path group 119 for unidirectional communication built in the MPU 62. It is an interface for transmitting various signals to the readout terminal 68d via. Various signals from the main side CPU 63 are input to the input port of the management side I/F 111, and various signals to the reading terminal 68d are output from the output port of the management side I/F 111. FIG. The main CPU 63 is electrically connected to the reading terminal 68d through a signal path group 120 for two-way communication built in the MPU 62. FIG.

The management-side CPU 112 is an arithmetic processing device including a control unit and an arithmetic unit. The management-side ROM 113 is a memory (that is, a non-volatile storage means) that does not require power supply from the outside for storing data such as a NOR flash memory and a NAND flash memory, and is used exclusively for reading. The management-side ROM 113 stores various control programs and fixed value data executed by the management-side CPU 112 . The management-side RAM 114 is a memory such as SRAM and DRAM that requires power supply from the outside for storage (that is, volatile storage means), and is used for both reading and writing. The management-side RAM 114 can be randomly accessed, and has a shorter time required for reading than the management-side ROM 113 when compared with the same data capacity. The management-side RAM 114 temporarily stores various data for execution of the control program stored in the management-side ROM 113 .

The RTC 115 is a real-time clock that constantly measures date information and time information, and outputs the measured date information and time information (hereinafter also referred to as date information) in accordance with instructions from the management side CPU 112. It is a configuration that allows In addition, the RTC 115 is provided with a backup power supply, and it is possible to measure date information and time information even while the pachinko machine 10 is powered off.

The correspondence memory 116 is a memory (that is, volatile storage means) such as SRAM and DRAM that requires power supply from the outside to hold data, and is used for both reading and writing. Correspondence memory 116 stores information about correspondence between buffers 122a to 122p provided in input port 121 of management side I/F 111 and types of signals input to buffers 122a to 122p. used for The details of the contents of the correspondence memory 116 will be described later.

The history memory 117 is a memory such as a NOR flash memory and a NAND flash memory that does not require external power supply (that is, non-volatile storage means), and is used for both reading and writing. The history memory 117 is used to store information on game history received from the main side CPU 63 through the management side I/F 111 . The details of the contents of history memory 117 will be described later.

The calculation result memory 131 is a memory (that is, a non-volatile storage means) that does not require power supply from the outside to hold data such as a NOR flash memory and a NAND flash memory, and is used for both reading and writing. The calculation result memory 131 is used to sequentially store various parameters calculated by the management side CPU 112 using history information stored in the history memory 117 . The contents of various parameters stored in the calculation result memory 131 are sequentially displayed on the first to third notification display devices 69a to 69c and output to an external device connected to the reading terminal 68d.

Next, the configuration of the input port 121 provided in the management side I/F 111 will be described. FIG. 19 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I/F 111. As shown in FIG.

The input port 121 is provided with a plurality of buffers 122a-122p. Specifically, first to sixteenth buffers 122a to 122p are provided. One type of signal can be input to each of the first to sixteenth buffers 122a to 122p through signal paths 118a to 118p. is at LOW level, information of "0" is stored as the first data, and information of "1" is stored as the second data when the signal to be input is at HI level. Note that the relationship between these LOW and HI and the first data and the second data may be reversed.

A first signal corresponding to the detection result of the first winning hole detection sensor 42a is input to the first buffer 122a. In this case, the main side CPU 63 outputs the first signal of LOW level in a situation where the new game ball is not detected by the first winning hole detection sensor 42a, and one game is detected by the first winning hole detection sensor 42a. A first signal of HI level is output for a specific period when a ball is detected. This specified period is a period sufficient for the management side CPU 112 to specify that the first signal of HI level is input to the first buffer 122a.

A second signal corresponding to the detection result of the second winning hole detection sensor 43a is input to the second buffer 122b. In this case, the main side CPU 63 outputs the second signal of LOW level in a situation where the new game ball is not detected by the second winning hole detection sensor 43a, and one game is detected by the second winning hole detection sensor 43a. When a ball is detected, it outputs a second signal of HI level for a specific period. This specified period is sufficient for the management CPU 112 to specify that the second signal of HI level is input to the second buffer 122b.

A third signal corresponding to the detection result of the third winning hole detection sensor 44a is input to the third buffer 122c. In this case, the main side CPU 63 outputs the third signal of LOW level in a situation where the new game ball is not detected by the third winning hole detection sensor 44a, and one game is detected by the third winning hole detection sensor 44a. When a ball is detected, it outputs a third signal of HI level for a specific period. This specified period is a period sufficient for the management side CPU 112 to specify that the HI level third signal is input to the third buffer 122c.

A fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. In this case, the main side CPU 63 outputs the LOW level fourth signal in a situation where no new game ball is detected by the special electric detection sensor 45a, and when one game ball is detected by the special electric detection sensor 45a. to output a fourth signal of HI level over a specific period. This specified period is a period sufficient for the management side CPU 112 to specify that the fourth signal of HI level is input to the fourth buffer 122d.

A fifth signal corresponding to the detection result of the first operating port detection sensor 46a is input to the fifth buffer 122e. In this case, the main side CPU 63 outputs a LOW level fifth signal in a situation where a new game ball is not detected by the first operation opening detection sensor 46a, and one game is detected by the first operation opening detection sensor 46a. When the ball is detected, a HI level fifth signal is output for a specific period. This specified period is sufficient for the management CPU 112 to specify that the fifth signal of HI level is input to the fifth buffer 122e.

A sixth signal corresponding to the detection result of the second operating port detection sensor 47a is input to the sixth buffer 122f. In this case, the main side CPU 63 outputs a LOW level sixth signal in a situation where no new game ball is detected by the second operation opening detection sensor 47a, and one game is detected by the second operation opening detection sensor 47a. When the ball is detected, it outputs a sixth signal of HI level for a specific period. This specified period is sufficient for the management CPU 112 to specify that the sixth buffer 122f is receiving the HI level sixth signal.

A seventh signal corresponding to the detection result of the outlet detection sensor 48a is input to the seventh buffer 122g. In this case, the main side CPU 63 outputs the LOW level seventh signal when no new game ball is detected by the outlet detection sensor 48a, and one game ball is detected by the outlet detection sensor 48a. HI level seventh signal is output for a specific period. This specified period is sufficient for the management side CPU 112 to specify that the HI level seventh signal is input to the seventh buffer 122g.

The eighth buffer 122h receives an eighth signal corresponding to whether the open/close execution mode is in progress. In this case, the main CPU 63 continues to output the LOW level eighth signal in the non-opening/closing execution mode, and continuously outputs the HI level eighth signal in the opening/closing execution mode.

The ninth buffer 122i receives a ninth signal corresponding to whether the high-frequency support mode is in effect. In this case, the main CPU 63 continuously outputs the LOW level ninth signal when the high frequency support mode is not set, and continuously outputs the HI level ninth signal when the high frequency support mode is set.

A tenth signal corresponding to whether or not the front door frame 14 is open is input to the tenth buffer 122j. In this case, the main CPU 63 continues to output the LOW level tenth signal when the front door frame 14 is closed, and continues to output the HI level tenth signal when the front door frame 14 is open. and output.

An eleventh signal corresponding to whether or not a game round has been started is input to the eleventh buffer 122k. In this case, the main CPU 63 continuously outputs the LOW level eleventh signal until the game round is started, and outputs the HI level eleventh signal for a specific period when the game round is started. do. This specified period is a period sufficient for the management side CPU 112 to specify that the 11th signal of HI level is input to the 11th buffer 122k.

A set value update signal is inputted to the fifteenth buffer 122o to make the management side CPU 112 recognize that the setting state of the pachinko machine 10 has been newly set by the main side CPU 63. FIG. In this case, the master side CPU 63 outputs a setting value update signal of LOW level when the setting state of the pachinko machine 10 is not newly set, and when the setting state of the pachinko machine 10 is newly set. Then, a HI-level set value update signal is output for a number of pulse signals corresponding to the newly set value for a specific period. This specific period is sufficient for the management side CPU 112 to identify that the HI level set value update signal is input to the fifteenth buffer 122o.

The sixteenth buffer 122p contains an output instruction signal for causing the management side CPU 112 to recognize the trigger for outputting the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to the reading terminal 68d. is entered. In this case, the main CPU 63 outputs a LOW-level output instruction signal when it is not necessary to output history information, and outputs a HI-level output instruction signal for a specific period when it is necessary to output history information. do. This specified period is sufficient for the management side CPU 112 to specify that the HI level output instruction signal is being input to the sixteenth buffer 122p.

The twelfth buffer 122l, the thirteenth buffer 122m and the fourteenth buffer 122n can receive signals from the main side CPU 63, but in the pachinko machine 10, they are blank to which normal signals cannot be input. In this way, as the input port 121 of the management side I/F 111, the number of buffers 122a to 122p larger than the types of signals output from the main side CPU 63 to the management IC 66 in the pachinko machine 10 is provided. It becomes possible to divert the management IC 66 to a model different from the pachinko machine 10.例文帳に追加This makes it possible to improve the versatility of the management IC 66 . Incidentally, signal paths 118a to 118p are formed between the main CPU 63 and the first to sixteenth buffers 122a to 122p so as to correspond one-to-one to the first to sixteenth buffers 122a to 122p. However, it is not limited to this, and a configuration in which the signal paths 118l to 118n are not formed between the buffers 122l to 122n to be blanked is also possible.

Input of the set value update signal to the fifteenth buffer 122o and input of the output instruction signal to the sixteenth buffer 122p are determined in the design stage of the management IC 66, and an instruction from the main CPU 63 is received. Instead, the management CPU 112 can specify that the set value update signal is input to the fifteenth buffer 122o and the output instruction signal is input to the sixteenth buffer 122p. On the other hand, the types of signals to be input to the first to fourteenth buffers 122a to 122n are not determined at the design stage of the management IC 66, and the types of these signals are instructed by the main CPU 63. Thus, it is specified by the management side CPU 112 . Details of the types of these signals in the management side CPU 112 will be described later. This is done by transmitting a type identification command to the In this case, the information on the types of various signals provided by the type identification command is stored in the correspondence memory 116, and when the management side CPU 112 specifies the types of the various signals in a state where operating power is being supplied, The information stored in the correspondence memory 116 is referred to.

FIG. 20 is an explanatory diagram for explaining the configuration of the correspondence memory 116. As shown in FIG. Correspondence memory 116 has first to fourteenth correspondence areas 123a to 123n in one-to-one correspondence with first to fourteenth buffers 122a to 122n provided at input port 121 of management side I/F 111. is provided.

In the first correspondence area 123a, information indicating that it is the general prize winning opening 31 is stored as information for specifying the type of signal input to the first buffer 122a by the management side CPU 112. FIG. In addition, in the first correspondence area 123a, there is information indicating that it is the general winning hole 31 and information (10) of the number of game balls to be paid out when one game ball enters the general winning hole 31. Stored. In the second correspondence area 123b, information indicating that it is the general winning hole 31 is stored as information for specifying the type of signal input to the second buffer 122b by the management side CPU 112. FIG. In addition, in the second correspondence area 123b, information indicating that it is the general winning hole 31 and information (10) of the number of game balls to be paid out when one game ball enters the general winning hole 31 are displayed. Stored. In the third correspondence area 123c, information indicating that it is the general winning hole 31 is stored as information for specifying the type of signal input to the third buffer 122c by the management side CPU 112. FIG. In addition, in the third correspondence area 123c, there is information indicating that it is the general winning hole 31 and information (10) of the number of game balls to be paid out when one game ball enters the general winning hole 31. Stored.

In the fourth correspondence area 123d, information indicating that it is the special electric winning device 32 is stored as information for specifying the type of signal input to the fourth buffer 122d by the management CPU 112. FIG. In addition, in the fourth correspondence area 123d, there is information indicating that it is the special electric prize winning device 32 and information (15 pieces) of the number of game balls to be paid out when one game ball enters the special electric prize winning device 32. Stored. Information indicating the first operation port 33 is stored in the fifth correspondence area 123e as information for specifying the type of signal input to the fifth buffer 122e by the management CPU 112. FIG. In addition, in the fifth correspondence area 123e, information indicating that it is the first operating port 33 and information on the number of game balls to be paid out when one game ball enters the first operating port 33 (one ) are also stored. Information indicating the second operation port 34 is stored in the sixth correspondence area 123f as information for specifying the type of signal input to the sixth buffer 122f by the management CPU 112. FIG. In addition, in the sixth correspondence area 123f, information indicating that it is the second operating port 34 and information on the number of game balls to be paid out when one game ball enters the second operating port 34 (one ) are also stored. Information indicating the output port 24a is stored in the seventh correspondence area 123g as information for the management CPU 112 to specify the type of signal input to the seventh buffer 122g.

Information indicating the opening/closing execution mode is stored in the eighth correspondence area 123h as information for specifying the type of signal input to the eighth buffer 122h by the management CPU 112. FIG. Information indicating the high-frequency support mode is stored in the ninth correspondence area 123i as information for the management CPU 112 to specify the type of signal input to the ninth buffer 122i. Information indicating the front door frame 14 is stored in the tenth correspondence area 123j as information for the management CPU 112 to specify the type of signal input to the tenth buffer 122j. The eleventh correspondence area 123k stores information indicating the start of a game round as information for the management CPU 112 to specify the type of signal input to the eleventh buffer 122k.

The twelfth correspondence area 123l stores information indicating that the signal is blank and does not correspond to any kind of signal input to the twelfth buffer 122l, as information for specifying the type of the signal input to the twelfth buffer 122l. In the thirteenth correspondence area 123m, as information for specifying the type of signal input to the thirteenth buffer 122m by the management side CPU 112, information indicating that the signal is blank and does not correspond to any of them is stored. The fourteenth correspondence area 123n stores information indicating that it is blank and does not correspond to any of the types of signals input to the fourteenth buffer 122n, as information for the management CPU 112 to specify the type of signal input to the fourteenth buffer 122n.

As described above, the types of signals to be input to the first to fourteenth buffers 122a to 122n are specified by the management side CPU 112 upon receiving instructions from the main side CPU 63. , the management IC 66 can be used for a model different from the pachinko machine 10.例文帳に追加This makes it possible to improve the versatility of the management IC 66 .

In addition, instead of outputting information for recognizing the type of signal each time a signal corresponding to the storage of history information is output to the first to fourteenth buffers 122a to 122n, the type of the signal is recognized in advance. Information for specifying the types of signals input to the first to fourteenth buffers 122a to 122n by the management side CPU 112 based on the output information is stored in the correspondence memory 116. It is a configuration that As a result, compared to a configuration in which information for recognizing the type of the signal is output each time a signal corresponding to the storage of history information is output to the first to fourteenth buffers 122a to 122n, each time the signal is output, It is possible to suppress the amount of information output from the side CPU 63 to the management side CPU 112 .

Information for identifying the types of signals input to the first to fourteenth buffers 122a to 122n is output by the management CPU 112 at the start of supply of operating power. As a result, when a game is started on the pachinko machine 10, the management side CPU 112 can specify the types of signals input to the first to fourteenth buffers 122a to 122n.

Further, information setting indicating that the set value update signal is input to the fifteenth buffer 122o and information setting indicating that the output instruction signal is input to the sixteenth buffer 122p are performed in the design stage of the management IC 66. FIG. As a result, not only this pachinko machine 10 but also other types of pachinko machines using the management IC 66 can reliably use the set value update signal and the output instruction signal for the fifteenth buffer 122o and the sixteenth buffer 122p. It is possible to omit the processing for specifying the type of signal input to. Therefore, it is possible to reduce the processing load of processing for identifying the type of such signal.

Next, the history memory 117 of the management IC 66 will be explained. FIG. 21 is an explanatory diagram for explaining the structure of the history memory 117. As shown in FIG.

The history memory 117 is provided with a history area 124 for sequentially storing history information. In the history area 124, a plurality of pieces of pointer information are set with serial numbers, and a history information storage area 125 is set corresponding to each piece of pointer information on a one-to-one basis. The history information storage area 125 can store combinations of RTC information and correspondence information. In this case, each history information storage area 125 has a data capacity of 2 bytes, a data capacity of 1 byte is allocated as an area for storing RTC information, and a data capacity of 1 byte is allocated as an area for storing correspondence relationship information. A data capacity of 1 byte is allocated. When it becomes necessary to store the correspondence information according to the signals input to the first to fourteenth buffers 122a to 122n (actually the first to eleventh buffers 122a to 122k in the case of the pachinko machine 10). , first stores the date and time information currently measured by the RTC 115 in the area for storing the RTC information of the history information storage area 125 corresponding to the pointer information to be written currently. After that, the correspondence relation information corresponding to the buffers 122a to 122n that triggered the current information storage is read from the correspondence relation areas 123a to 123n corresponding to the buffers 122a to 122n in the correspondence relation memory 116, and the read correspondence relation information is stored in the area for storing the correspondence relation information of the history information storage area 125 corresponding to the pointer information to be currently written.

More specifically, the first to seventh buffers 122a to 122g receive signals corresponding to the detection results of the entering ball detection sensors 42a to 48a as described above. Therefore, the first to seventh correspondence areas 123a to 123g in the correspondence memory 116 store information corresponding to the types of the entering ball detection sensors 42a to 48a. More specifically, the information corresponding to the type of ball entry corresponding to each of the ball entry detection sensors 42a to 48a is stored in the first to seventh correspondence areas 123a to 123g. In the pachinko machine 10, as already explained, the first to third winning hole detection sensors 42a to 44a all detect game balls entering the general winning hole 31, so these first to third winning holes Information indicating that each of the first to third correspondence areas 123a to 123c corresponding to the detection sensors 42a to 44a is the general prize winning opening 31 is stored. The fourth correspondence area 123d stores information indicating that it is the special electric prize winning device 32, and the fifth correspondence area 123e stores information indicating that it is the first operation port 33. , the sixth correspondence area 123f stores information indicating the second operation port 34, and the seventh correspondence area 123g stores information indicating the out port 24a. If the buffers 122a to 122n that triggered the current information storage are any of the first to seventh buffers 122a to 122g, the information on the types of ball-entering sections corresponding to the buffers 122a to 122g are the first to It is read out from any one of the seventh correspondence areas 123a to 123g, and the read information of the type of ball entering portion is stored in the area for storing the correspondence information of the history information storage area 125 as it is.

On the other hand, the eighth buffer 122h receives a signal indicating whether it is in the opening/closing execution mode, the ninth buffer 122i receives a signal indicating whether it is in the high frequency support mode, and the tenth buffer 122j receives a signal indicating whether it is in the high frequency support mode. A signal indicating whether or not the front door frame 14 is open is input, and a signal indicating whether or not a game cycle has started is input to the eleventh buffer 122k. Therefore, the information indicating the opening/closing execution mode is stored in the eighth correspondence area 123h, the information indicating the high-frequency support mode is stored in the ninth correspondence area 123i, and the tenth correspondence area. Information indicating that it is the front door frame 14 is stored in 123j, and information indicating that it is a game round is stored in the eleventh correspondence area 123k.

As described above, the main CPU 63 continues to output the LOW level eighth signal in a situation other than the opening/closing execution mode, and continuously outputs the HI level eighth signal in a situation in the opening/closing execution mode. The side CPU 112 specifies that the opening/closing execution mode has started when the eighth signal changes from LOW level to HI level, and specifies that the opening/closing execution mode has ended when the eighth signal changes from HI level to LOW level. becomes possible. When the eighth signal changes from LOW level to HI level and from HI level to LOW level, the management side CPU 112 is triggered to store correspondence information in the history information storage area 125. identify that That is, when the eighth signal changes from the LOW level to the HI level, not only the information indicating the open/close execution mode read from the eighth correspondence area 123h but also the start information is stored in the history information storage area 125. Store in the area for storing the correspondence relationship information. When the eighth signal changes from the HI level to the LOW level, not only the information indicating the opening/closing execution mode read out from the eighth correspondence relationship area 123h but also the end information is stored in the history information storage area 125. Store in the area for storing the correspondence relationship information.

As described above, the main CPU 63 continues to output the LOW level ninth signal in a situation other than the high frequency support mode, and continuously outputs the HI level ninth signal in a situation in the high frequency support mode. , the management-side CPU 112 specifies that the high-frequency support mode has started when the ninth signal changes from LOW level to HI level, and ends the high-frequency support mode when the ninth signal changes from HI level to LOW level. It is possible to specify that When the ninth signal changes from LOW level to HI level and from HI level to LOW level, the management side CPU 112 is triggered to store correspondence information in the history information storage area 125. identify that That is, when the ninth signal changes from the LOW level to the HI level, not only the information indicating the high frequency support mode read from the ninth correspondence area 123i but also the start information is stored in the history information storage area. 125 is stored in an area for storing correspondence information. When the ninth signal changes from the HI level to the LOW level, not only the information indicating the high frequency support mode read from the ninth correspondence area 123i but also the end information is stored in the history information storage area. 125 is stored in an area for storing correspondence information.

As already explained, the main CPU 63 continuously outputs the LOW level tenth signal when the front door frame 14 is closed, and outputs the HI level tenth signal when the front door frame 14 is open. In order to continuously output, the management side CPU 112 specifies that the front door frame 14 is opened when the tenth signal changes from LOW level to HI level, and when the tenth signal changes from HI level to LOW level. can identify that the front door frame 14 is closed. When the tenth signal changes from LOW level to HI level and from HI level to LOW level, the management side CPU 112 is triggered to store correspondence information in the history information storage area 125. identify that That is, when the tenth signal changes from the LOW level to the HI level, not only the information indicating the front door frame 14 read from the tenth correspondence area 123j but also the opening start information is stored together with the history information. Stored in the area for storing correspondence relationship information in the area 125 . Further, when the tenth signal changes from HI level to LOW level, not only the information indicating that it is the front door frame 14 read from the tenth correspondence area 123j but also the opening end information is stored together with the history information. Stored in the area for storing correspondence relationship information in the area 125 .

As already explained, the main CPU 63 continues to output the LOW level eleventh signal until the game round start timing, and when the game round start timing comes, the HI level eleventh signal is output for a specific period. Output a signal. Therefore, the management-side CPU 112 specifies that a game cycle has started when the eleventh signal changes from the LOW level to the HI level. That is, when the eleventh signal changes from LOW level to HI level, the information indicating that it is a game round read from the eleventh correspondence area 123k is stored in the correspondence information of the history information storage area 125. area.

The history information storage area 125 is capable of storing all the history information generated during the 10 business days in which game balls are continuously shot from the pachinko machine 10 from opening to closing. It takes a few minutes. For example, if history information is generated 60,000 times a day, the history information storage area 125 for 600,000 or more pieces is provided. As a result, all history information can be stored and held in the history memory 117 for at least ten days.

The history memory 117 is provided with a pointer area 126 separately from the history area 124 . The pointer area 126 stores information for the management CPU 112 to specify the pointer information currently being written in the history memory 117 . Specifically, at the shipping stage of the pachinko machine 10, the pointer area 126 is set with information designating the pointer information of "0" to be written. Then, each time one piece of history information is newly stored in the history information storage area 125, the information in the pointer area 126 is updated so that the value of the pointer information to be written is incremented by one. When the pointer information in the last order is to be written and the history information is stored in the history information storage area 125 corresponding to the pointer information in the last order, the pointer information is set so that the pointer information of "0" is to be written. The information in the use area 126 is updated. As a result, when the number of pieces of history information that can be stored exceeds the number of pieces of history information that can be stored, and a trigger to store history information occurs, the history information storage area 125 in which the old piece of history information is stored is overwritten with new piece of history information in order. Become.

Also, when the history information is read from the history memory 117 by an external device, the history information storage area 125 is cleared to "0" and the pointer information of "0" is written. The information in the pointer area 126 is updated. As a result, it is possible to prevent the history information that has been read once from being read again.

Next, a specific processing configuration for managing the game history using the management IC 66 will be described. First, a processing configuration for storing information on correspondence between the first to fourteenth buffers 122a to 122n provided in the input port 121 of the management side I/F 111 and the types of signals in the correspondence memory 116 will be described. FIG. 22 is a flow chart showing recognition processing executed by the main CPU 63 . Note that the recognition process is executed in step S111 in the main process (FIG. 9).

First, "14" is set in the recognition output counter provided in the main RAM 65 (step S801). The recognition output counter is the rest of the information output for allowing the management side CPU 112 to recognize which kind of signal the first to fourteenth buffers 122a to 122n of the input port 121 in the management side I/F 111 correspond to. is a counter for specifying the required number of times by the main side CPU 63 . As already explained, 14 of the first to fourteenth buffers 122a to 122n are subject to signal type recognition, so "14" is set in the recognition output counter.

Thereafter, an identification start command output process is executed (step S802). The main CPU 63 outputs various commands to the management CPU 112 to make the management CPU 112 recognize which kind of signals the first to fourteenth buffers 122a to 122n correspond to. The first to eighth signals input to the first to eighth buffers 122a to 122h are used for this command output. That is, by using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h) used to instruct the management side CPU 112 to store history information, the first to fourteenth buffers 122a A command is output to make the management side CPU 112 recognize which kind of signal .about.122n corresponds to. As a result, the number of signal paths can be reduced compared to a configuration in which the signal paths for outputting the command are provided separately from the signal paths 118a to 118p for outputting signals to the first to sixteenth buffers 122a to 122p. becomes possible and the configuration can be simplified. The identification start command has a data capacity of 8 bits, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In the process of outputting the identification start command, the output state of the ninth signal is switched to HI level at the timing of starting the output of the identification start command so that the management side CPU 112 recognizes that a new command has been sent. Also, the period during which the identification start command and the output state of the ninth signal are maintained at HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the identification start command and the ninth signal. It is By receiving the identification start command, the management side CPU 112 is instructed to start processing for storing information on the correspondence between the first to fourteenth buffers 122a to 122n and the types of signals in the correspondence memory 116. Identify.

Thereafter, the type identification command corresponding to the current value of the recognition output counter of the main RAM 65 is read from the main ROM 64 (step S803). In this case, the 1st to 14th buffers 122a to 122n are corresponded so that the first buffer 122a is the target of signal type setting first, and then the n+1th buffer is the target of signal type setting after the nth buffer. Recognition setting of the signal type to be used is performed. Therefore, if the output counter for recognition is "14" to "12", the type identification command indicating that it is the general winning hole 31 and the number of prize balls is read, and if the output counter for recognition is "11", the special electric winning read a type identification command indicating that it is the device 32 and the number of prize balls; if the output counter for recognition is "10", read out a type identification command indicating that it is the first operating port 33 and the number of prize balls; If the output counter for recognition is "9", it is the second working port 34 and the type identification command indicating the number of prize balls is read. If the output counter for recognition is "8", it is the out port 24a. If the output counter for recognition is "7", the type identification command indicating that it is in the opening/closing execution mode is read, and if the output counter for recognition is "6", it means that it is in the high frequency support mode. If the output counter for recognition is "5", the type identification command indicating that it is the front door frame 14 is read, and if the output counter for recognition is "4", it means that it is a game round. If the output counter for recognition is "3" to "1", the type identification command indicating blank is read.

After that, output processing of the read type identification command is executed (step S804). The type identification command has an 8-bit data capacity like the identification start command, and the data of each bit is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In the identification type command output process, the output state of the ninth signal is switched to HI level at the timing of starting the output of the identification type command so that the management side CPU 112 recognizes that a new command has been transmitted. Also, the period during which the identification type command output state and the output state of the ninth signal are maintained at the HI level are set to a period sufficient for the management side CPU 112 to recognize the output state of these identification type command and the ninth signal. It is By receiving the identification type command, the management side CPU 112 stores the corresponding identification type command in the correspondence area 123a to 123n corresponding to the buffer to be set this time among the first to fourteenth buffers 122a to 122n. Stores information about

Thereafter, 1 is subtracted from the value of the recognition output counter of the main RAM 65 (step S805), and it is determined whether or not the value of the recognition output counter after the subtraction of 1 is "0" (step S806). When the value of the output counter for recognition is 1 or more (step S806: NO), processing for outputting a type identification command corresponding to the value of the output counter for recognition after subtracting 1 is executed (steps S803 and step S804).

On the other hand, if the value of the recognition output counter is "0" (step S806: YES), output processing of an identification end command is executed (step S807). The identification end command has a data capacity of 8 bits, and each bit of data is input to the first to eighth buffers 122a to 122h as the first to eighth signals, respectively. In the identification end command output process, the output state of the ninth signal is switched to HI level at the timing of starting the output of the identification end command in order to make the management side CPU 112 recognize that a new command has been transmitted. Further, the period during which the identification end command and the output state of the ninth signal are maintained at HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the identification end command and the ninth signal. It is By receiving the identification end command, the management side CPU 112 specifies that the processing for storing the information on the correspondence between the first to fourteenth buffers 122a to 122n and the signal types in the correspondence memory 116 has been completed. do.

Next, the management processing executed by the management side CPU 112 will be described with reference to the flowchart of FIG. The management process is started when the supply of operating power to the management side CPU 112 is started. The processing speed of the management side CPU 112 is faster than the processing speed of the main side CPU 63, and after one timer interrupt processing (FIG. 11) is started in the main side CPU 63, the next timer interrupt processing (FIG. 11) is performed. is started, the combination of the processes after step S908 in the management process is executed 16 times or more.

First, it is determined whether or not an identification start command has been received from the main CPU 63 (step S901). If the identification start command has not been received (step S901: NO), after executing the setting update recognition process (step S902), the process returns to step S901. In the setting update recognition process, when a new setting of the setting state of the pachinko machine 10 is performed by the main side CPU 63, the corresponding process is executed, although the details will be described later.

When the identification start command is received from the main side CPU 63 (step S901: YES), the value of the setting target counter provided in the management side RAM 114 is cleared to "0" (step S903). The setting target counter is a counter for the management side CPU 112 to specify the type of the buffers 122a to 122n for which the type of signal is to be set. The first buffer 122a is the target of signal type setting first, and then the n+1th buffer is the target of signal type setting after the nth buffer.

Thereafter, on condition that the type identification command has been received from the main CPU 63 (step S904: YES), the correspondence setting process is executed (step S905). In the correspondence setting process, among the first to fourteenth correspondence areas 123a to 123n of the correspondence memory 116, the correspondence area corresponding to the current value of the counter to be set in the management side RAM 114 is stored with the type identification received this time. Stores the signal type information set in the command. After that, 1 is added to the setting target counter value of the management side RAM 114 (step S906).

When a negative determination is made in step S904, or when the process of step S906 is executed, it is determined whether or not an identification end command has been received from the main CPU 63 (step S907). If the identification end command has not been received (step S907: NO), the process returns to step S904, and under the condition that the type identification command is newly received from the main CPU 63 (step S904: YES), steps S905 and S906 Execute the process again.

If the identification end command has been received from the main CPU 63 (step S907: YES), the processing of steps S908 to S910 is repeatedly executed. In step S908, although the details will be described later, history setting processing for storing history information corresponding to the type of signal received from the main CPU 63 in the history memory 117 is executed. In step S909, the history information stored in the history memory 117 is used to calculate various parameters, and the results of the calculations are notified by the first to third notification display devices 69a to 69c, although the details will be described later. Execute display output processing for In step S910, although the details will be described later, an external output process is executed for outputting the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to the reading terminal 68d.

FIG. 24 is a time chart showing how information on correspondence between the first to fourteenth buffers 122a to 122n and the types of signals input to these buffers 122a to 122n is stored in the correspondence memory 116. FIG. FIG. 24(a) shows a period during which commands are output from the main side CPU 63 to the management side CPU 112 using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h). b) shows the period during which the output state of the ninth signal is at HI level, and FIG. FIG. 24D shows the execution period of the identification state in which the process for identifying the correspondence is executed, and FIG.

When the supply of operating power to the main CPU 63 and the management CPU 112 is started, an identification start command using the first to eighth signals is started to be output at the timing t1 as shown in FIG. 24(a). be. At the timing t1, the output state of the ninth signal is changed from LOW level to HI level as shown in FIG. 24(b). After that, at timing t2 in which the output of the identification start command is continued, the output state of the ninth signal is changed from HI level to LOW level as shown in FIG. 24(b). By confirming that the output state of the ninth signal has changed from the HI level to the LOW level, the management side CPU 112 specifies that the command has been sent from the main side CPU 63, and the first to eighth buffers 122a to 122h. The content of the command received from the main side CPU 63 is grasped by confirming the information of . In this case, since the identification start command has been received, the management CPU 112 makes an affirmative determination in step S901 of the management processing (FIG. 23) to enter the identification state. After that, at the timing of t3, the output of the identification start command is stopped as shown in FIG. 24(a).

After that, at the timing of t4, as shown in FIG. 24(a), output of the first type identification command using the first to eighth signals is started. At the timing t4, the output state of the ninth signal is changed from LOW level to HI level as shown in FIG. 24(b). After that, at timing t5 when the output of the type identification command is continued, the output state of the ninth signal is changed from HI level to LOW level as shown in FIG. 24(b). By confirming that the output state of the ninth signal has changed from the HI level to the LOW level, the management side CPU 112 specifies that the command has been sent from the main side CPU 63, and the first to eighth buffers 122a to 122h By checking the information, the content of the command received from the main side CPU 63 is grasped. In this case, since the first type identification command has been received, the management CPU 112 executes the correspondence setting process at the timing t5 as shown in FIG. 24(d). In the correspondence setting process, information indicating that it is the general winning hole 31 and information on the number of prize balls is stored in the first correspondence area 123 a of the correspondence memory 116 . After that, at timing t6, the output of the type identification command is stopped as shown in FIG. 24(a).

After that, at timing t7 to timing t9, timing t10 to timing t12, timing t13 to timing t15, and timing t16 to timing t18, similarly to timing t4 to timing t6, the main Correspondence setting processing corresponding to the type identification command output from the side CPU 63 is executed by the management side CPU 112 . In this case, the correspondence setting process corresponding to the 14th type identification command is completed between timing t16 and timing t18.

After that, at the timing of t19, as shown in FIG. 24(a), the output of the identification end command using the first to eighth signals is started. At the timing of t19, the output state of the ninth signal is changed from LOW level to HI level as shown in FIG. 24(b). After that, at timing t20 when the output of the identification end command is continued, the output state of the ninth signal is changed from HI level to LOW level as shown in FIG. 24(b). By confirming that the output state of the ninth signal has changed from the HI level to the LOW level, the management side CPU 112 specifies that the command has been sent from the main side CPU 63, and the first to eighth buffers 122a to 122h By checking the information, the content of the command received from the main side CPU 63 is grasped. In this case, since the identification end command has been received, the identification state of the management side CPU 112 ends at the timing t20 as shown in FIG. 24(c). After that, at the timing of t21, the output of the identification end command is stopped as shown in FIG. 24(a).

In order to instruct the management side CPU 112 to store the history information by using the configuration that allows the management side CPU 112 to recognize whether or not a command is being output using the ninth signal as described above. Clearly to the management side CPU 112 that commands are being output even in a configuration in which commands are output using the first to eighth signals (that is, the first to eighth signal paths) to be used. It is possible to recognize.

Next, a processing configuration for storing history information in history memory 117 will be described. FIG. 25 is a flow chart showing management output processing executed by the main CPU 63 . Note that the management output process is executed at step S319 in the timer interrupt process (FIG. 11).

First, "11" is set in the managed counter provided in the main RAM 65 (step S1001). The managed object counter specifies whether or not there is a managed object that is not specified as to whether or not the signal output state to the management side CPU 112 should be changed in the current management output process. In addition, it is a counter for the main side CPU 63 to specify whether the signal output state to the management side CPU 112 should be changed for any of the managed objects. In one management output process, the management targets for which the main CPU 63 determines whether or not to change the signal output state to the management CPU 112 are the seven ball entry detection sensors 42a to 48a, There are a total of 11 items including whether or not the open/close execution mode is executed, whether or not the high-frequency support mode is executed, whether or not the front door frame 14 is opened and closed, and whether or not the game cycle is started. Therefore, "11" is set to the managed counter first.

After that, it is determined whether or not the output state of the signal to the management side CPU 112 for the management target corresponding to the current management target counter value is HI level (step S1002). If it is not HI level (step S1002: NO), it is determined whether or not the value of the managed object counter is 5 or more. to 48a (step S1003).

If an affirmative determination is made in step S1003, it is determined whether or not the output flag of the main RAM 65 corresponding to the value of the managed counter is set to "1" (step S1004). Specifically, when the value of the managed counter is "11" and corresponds to the first winning opening detection sensor 42a, it is determined whether or not the first output flag is set to "1", When the value of the managed counter is "10" and corresponds to the second winning opening detection sensor 43a, it is determined whether or not the second output flag is set to "1", and the value of the managed counter is determined. is "9" and corresponds to the third winning opening detection sensor 44a, it is determined whether or not the third output flag is set to "1", and the value of the managed counter is "8". If it corresponds to the special electric detection sensor 45a, it is determined whether or not the fourth output flag is set to "1", the value of the managed counter is "7", and the first operation opening detection sensor 46a , it is determined whether or not the fifth output flag is set to "1". If the sixth output flag is set to "1" or not, and if the value of the managed counter is "5" and corresponds to the outlet 24a, the seventh output flag is set to " 1” is set. As already described, these first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

If the output flag corresponding to the value of the managed counter is set to "1" (step S1004: YES), the output state of the signal corresponding to the value of the managed counter among the first to seventh signals is set to HI level. (step S1005). After that, the output flag corresponding to the value of the managed counter is cleared to "0" (step S1006).

If a negative determination is made in step S1003, it is determined whether or not an opportunity has occurred to switch the output state of the signal corresponding to the value of the counter to be managed to HI level (step S1007). Specifically, if the value of the managed counter is "4", it is determined whether or not the transition to the open/close execution mode has occurred. It is determined whether or not the transition to the frequency support mode has occurred, and if the value of the managed counter is "2", it is determined whether or not the front door frame 14 is in the open state, and the managed counter is If the value is "1", it is determined whether or not the eleventh output flag is set to "1", thereby determining whether or not the game round has been started. If an affirmative determination is made in step S1007, the output state of the signal corresponding to the value of the managed counter is set to HI level (step S1008). When the value of the managed counter is "1" and the process of step S1008 is executed, the eleventh output flag is cleared to "0".

If an affirmative determination is made in step S1002, it is determined whether or not an opportunity has occurred to switch the output state of the signal corresponding to the value of the counter to be managed to LOW level (step S1009). Specifically, when the value of the managed object counter is 5 or more or "1" and the current managed object is one of the ball entry detection sensors 42a to 48a or the start of the game round, the first to seventh signals and the 11th signal that corresponds to the value of the managed counter is switched from LOW level to HI level, and then it is determined whether or not the HI output duration period (specifically, 10 milliseconds) has passed. . This HI output continuation period is set to a period longer than the longest processing interval of the history setting process (step S908) of the management process (FIG. 23) in the management side CPU 112, and the output of the signal switched from the LOW level to the HI level. This period allows the management CPU 112 to reliably identify the state. If the value of the managed object counter is "4" and the current managed object is in the opening/closing execution mode, it is determined whether or not the opening/closing execution mode has ended, and the value of the managed object counter is "3". If the current management target is the high-frequency support mode, it is determined whether the high-frequency support mode has ended, the value of the management target counter is "2", and the current management target is the front door frame 14. If so, it is determined whether or not the front door frame 14 is closed. If there is an opportunity to switch the output state of the signal corresponding to the value of the managed counter to LOW level (step S1009: YES), the output state of the signal corresponding to the value of the managed counter is set to LOW level ( step S1010).

If a negative determination is made in step S1004, if the process of step S1006 is performed, if a negative determination is made in step S1007, if the process of step S1008 is performed, if a negative determination is made in step S1009, or step When the process of S1010 is executed, the value of the managed counter in the main RAM 65 is decremented by 1 (step S1011). Then, it is determined whether or not the value of the managed counter after subtracting 1 is "0" (step S1012). If the value of the managed object counter is 1 or more (step S1012: NO), the process after step S1002 is executed for the managed object corresponding to the new value of the managed object counter.

Next, the history setting process executed by the management side CPU 112 will be described with reference to the flowchart of FIG. The history setting process is executed in step S908 of the management process (FIG. 23).

First, the number of buffers to be checked by the management side CPU 112 among the first to fourteenth buffers 122a to 122n is set in the confirmation target counter provided in the management side RAM 114 (step S1101). Specifically, among the first to fourteenth correspondence areas 123a to 123n in the correspondence memory 116, the number of correspondence areas in which information other than information indicating blank is stored is specified, and the number of the correspondence areas is specified. The number of information is set in the check target counter. In the pachinko machine 10, as already explained, information other than the information indicating blank is stored in the first to eleventh correspondence areas 123a to 123k, so in step S1101 "11" is set in the check target counter. do.

After that, it is confirmed whether or not the numerical information stored in the buffer corresponding to the current value of the check target counter among the first to fourteenth buffers 122a to 122n has been changed from "0" to "1". Then, it is determined whether or not the output state of the input signal from the main CPU 63 to the buffer has been switched from LOW level to HI level (step S1102). When the value of the check target counter is "n", the n-th buffers 122a to 122n are to be checked for numerical information. For example, if the value of the counter to be confirmed is "11", the eleventh buffer 122k is to be confirmed for numerical information, and if the value of the counter to be confirmed is "5", the fifth buffer 122e is to be confirmed for numerical information. .

If an affirmative determination is made in step S1102, RTC information, which is date information and time information, is read from the RTC 115 (step S1103). Then, write processing to the history memory 117 is executed (step S1104). In the write process, the pointer information in the history area 124 to be written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S1103 is written in the history information storage area 125 of the history area 124 . Also, the correspondence information is read from the correspondence areas 123a to 123n corresponding to the current check target counter values, and the correspondence information is written in the history information storage area 125 corresponding to the pointer information to be written. Further, if the correspondence information is any one of the information indicating the open/close execution mode, the information indicating the high-frequency support mode, and the information indicating the front door frame 14, the above-mentioned Not only the correspondence information but also the start information is written in the history information storage area 125 corresponding to the pointer information to be written. When the value of the check target counter is "n", the n-th correspondence area 123a to 123n becomes the read target of the correspondence information. For example, if the value of the confirmation target counter is "11", the eleventh correspondence area 123k is the target of reading the correspondence information, and if the value of the confirmation target counter is "5", the fifth correspondence area 123e is the correspondence It becomes a target for reading information.

By executing the writing process as described above, the value of the check target counter is one of the out port 24a, the general winning port 31, the special electric winning device 32, the first operation port 33, the second operation port 34, and the game round , the history information storage area 125 corresponding to the pointer information to be written contains the RTC information, the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operation port 33, the second A combination of the operation port 34 and the correspondence information indicating that it is one of the game rounds is stored as history information. When the value of the check target counter is any of the open/close execution mode, the high-frequency support mode, and the front door frame 14, RTC information is stored in the history information storage area 125 corresponding to the pointer information to be written. Then, the combination of the correspondence information indicating any one of the opening/closing execution mode, the high-frequency support mode, and the front door frame 14, and the start information is stored as history information.

After that, update processing of the target pointer is executed (step S1105). In the updating process, the numerical value information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition of 1 has exceeded the maximum value of the pointer information in the history area 124 . If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. When the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

If a negative determination is made in step S1102, or if the process of step S1105 is executed, whether or not the signal output has been switched to the LOW level is checked in the correspondence areas 123a to 123n corresponding to the current confirmation target counter value. It is determined whether or not correspondence information to be checked is stored (step S1106). Specifically, when the current value of the confirmation target counter is "8" to "10", information indicating that the open/close execution mode is in the corresponding correspondence area 123h to 123j, Since either the information indicating that there is one or the information indicating that it is the front door frame 14 is stored, an affirmative determination is made in step S1106.

If an affirmative determination is made in step S1106, the numerical information stored in the buffer corresponding to the current check target counter value among the first to fourteenth buffers 122a to 122n is changed from "1" to "0". It is determined whether the output state of the input signal from the main CPU 63 to the buffer has been switched from HI level to LOW level (step S1107). If an affirmative determination is made in step S1107, the RTC information is read (step S1108) as in step S1103, and the writing process to the history memory 117 is executed (step S1109). In the write process, the RTC information read in step S1108 is written in the history information storage area 125 of the history area 124 corresponding to the pointer information to be written. Also, the correspondence information is read from the correspondence areas 123a to 123n corresponding to the current check target counter values, and the correspondence information is written in the history information storage area 125 corresponding to the pointer information to be written. In addition, not only the correspondence relationship information but also the end information is written in the history information storage area 125 corresponding to the pointer information to be written. By executing the writing process in this way, when the value of the confirmation target counter is any of the opening/closing execution mode, the high frequency support mode, and the front door frame 14, it corresponds to the pointer information to be written. In the history information storage area 125, a combination of RTC information, correspondence information indicating one of the opening/closing execution mode, high-frequency support mode, and front door frame 14, and end information is stored as history information. state. After that, similar to step S1105, update processing of the target pointer is executed (step S1110).

When a negative determination is made in step S1106, when a negative determination is made in step S1107, or when the process of step S1110 is executed, the value of the check target counter in the management RAM 114 is subtracted by 1 (step S1111). Then, it is determined whether or not the value of the check target counter after subtracting 1 is "0" (step S1112). If the value of the confirmation object counter is 1 or more (step S1112: NO), the process after step S1102 is executed for the confirmation object corresponding to the new value of the confirmation object counter.

Next, how the history information is stored in the history memory 117 will be described with reference to the time chart of FIG. FIG. 27(a) shows a period in which a HI level signal is input to any one of the first to seventh, eleventh buffers 122a to 122g, 122k, and FIG. 27(c) shows a period during which a HI level signal is inputted to the ninth buffer 122i, and FIG. 27(d) shows a period during which a HI level signal is inputted to the tenth buffer 122j. is input, and FIG. 27E shows the timing of writing history information to the history memory 117. FIG.

At the timing t1, as shown in FIG. 27(a), the output state of the signal input to any one of the first to seventh and eleventh buffers 122a to 122g, 122k is switched from LOW level to HI level. Therefore, the history information is written in the history memory 117 at the timing t1 as shown in FIG. 27(e). After that, at the timing of t2, the signal that was switched to the HI level at the timing of t1 is switched to the LOW level as shown in FIG. 27(a). However, since this signal is input to any one of the first to seventh and eleventh buffers 122a to 122g and 122k, and switching of the LOW level is not an object to store history information, At the timing, the history information is not written as shown in FIG. 27(e).

After that, as shown in FIG. 27(a), at each of the timings t3, t5, t6, t9, t10, t13 and t14, the first to seventh and 11 buffers 122a to 122g and 122k, the output state of the signal input is switched from LOW level to HI level. Therefore, history information is written at each of these timings as shown in FIG. 27(e).

As shown in FIG. 27(b), the output state of the signal input to the eighth buffer 122h is HI level from timing t4 to timing t7. This eighth buffer 122h corresponds to whether or not the open/close execution mode is generated. Therefore, as shown in FIG. 27(e), the timing of t4, which is the timing at which the output state of the signal input to the eighth buffer 122h is switched to HI level, and the timing at which the output state of the signal is switched to LOW level. The history information is written at each timing t7. In this case, the history information written at timing t4 includes start information, and the history information written at timing t7 includes end information. This makes it possible to grasp the execution period of the opening/closing execution mode by checking the history information in the history memory 117 .

In addition, history information is written in the history memory 117 in the order of passage of time. Therefore, whether the history information indicating that a ball has entered any one of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, and the second operating port 34 is during the opening/closing execution mode. It is possible to distinguish whether or not In addition, since the history information includes RTC information, any of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33 and the second operating port 34 can be determined by comparing the RTC information. It is possible to distinguish whether or not the history information indicating that a ball has been entered into a hole is during the opening/closing execution mode.

As shown in FIG. 27(c), the output state of the signal input to the ninth buffer 122i is HI level from timing t8 to timing t11. This ninth buffer 122i corresponds to whether or not the high frequency support mode is generated. Therefore, as shown in FIG. 27(e), the timing t8 at which the output state of the signal input to the ninth buffer 122i switches to the HI level and the timing at which the output state of the signal switches to the LOW level The history information is written at each timing t11. In this case, the history information written at timing t8 includes start information, and the history information written at timing t11 includes end information. This makes it possible to grasp the execution period of the high-frequency support mode by checking the history information in the history memory 117 .

In addition, history information is written in the history memory 117 in the order of passage of time. Therefore, the history information indicating that a ball has entered any one of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, and the second operating port 34 is included in the high frequency support mode. It is possible to distinguish whether or not In addition, since the history information includes the RTC information, any of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33 and the second operating port 34 can be determined by comparing the RTC information. It is possible to distinguish whether or not the history information indicating that a ball has been entered into a ball during the high-frequency support mode.

As shown in FIG. 27(d), the output state of the signal input to the tenth buffer 122j is HI level from timing t12 to timing t15. The tenth buffer 122j corresponds to whether or not the front door frame 14 is open. Therefore, as shown in FIG. 27(e), the timing t12 at which the output state of the signal input to the tenth buffer 122j switches to the HI level and the timing at which the output state of the signal switches to the LOW level The history information is written at each timing t15. In this case, the history information written at timing t12 includes start information, and the history information written at timing t15 includes end information. Accordingly, by checking the history information in the history memory 117, it is possible to grasp the period during which the front door frame 14 is in the open state.

In addition, history information is written in the history memory 117 in the order of passage of time. Therefore, the history information indicating that a ball has entered one of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, and the second operating port 34 indicates that the front door frame 14 is open. It becomes possible to distinguish whether it is a thing or not. In addition, since the history information includes the RTC information, any of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33 and the second operating port 34 can be determined by comparing the RTC information. It is possible to distinguish whether or not the history information indicating that a ball has been entered into one is during the opening of the front door frame 14 .

Next, the output processing of the setting value update signal executed when the setting state of the pachinko machine 10 is set by the main side CPU 63 will be described. FIG. 28 is a flow chart showing output processing of the set value update signal executed by the main CPU 63. As shown in FIG. Note that output processing of the set value update signal is executed in step S119 in the main processing (FIG. 9).

A value corresponding to the setting value of the pachinko machine 10 set this time is set in the pulse number counter provided in the main side RAM 65 (step S1201). Specifically, the value of the set value counter of the main side RAM 65 is set in the pulse number counter. Thereafter, it is determined whether or not the setting value update signal directed to the management side CPU 112 is at HI level (step S1202). As already explained, the set value update signal is inputted to the fifteenth buffer 122o of the input port 121 in the IC 66 for management. Here, the output processing of the setting value update signal is processing for causing the management side CPU 112 to specify the types of signals input to the first to fourteenth buffers 122a to 122n of the input port 121 in the main processing (FIG. 9). It is executed before certain recognition processing. On the other hand, since it is set in the management IC 66 at the design stage of the pachinko machine 10 that the set value update signal is input to the fifteenth buffer 122o, the set value update signal is output before the recognition process. Even if the process is executed, it becomes possible for the management side CPU 112 to identify that the signal input to the fifteenth buffer 122o is the set value update signal.

If a negative determination is made in step S1202, 1 is subtracted from the value of the LOW level counter provided in the main RAM 65 (step S1203), and whether or not the value of the LOW level counter after the subtraction of 1 is "0". (step S1204). The LOW level counter is a counter for the main side CPU 63 to determine whether or not the set value update signal has been maintained at the LOW level for a predetermined period while the set value update signal outputs a plurality of pulses in which the set value update signal is at HI level. is. If the value of the LOW level counter is "0" (step S1204: YES), it means that it is time to set the setting value update signal to HI level. Set (step S1205).

After that, the HI level counter provided in the main RAM 65 is set to "20" (step S1206). The HI level counter is a counter for the main CPU 63 to specify the period during which the set value update signal is maintained at HI level. Since the value set in the HI level counter is decremented by 1 at intervals of about 10 microseconds, the set value update signal is maintained at the HI level for 200 microseconds when one pulse is output. This HI level maintenance period is a period sufficient for the management side CPU 112 to specify that the set value update signal has been changed from LOW level to HI level.

If the setting value update signal is HI level (step S1202: YES), the value of the HI level counter of the main RAM 65 is subtracted by 1 (step S1207), and the value of the HI level counter after the subtraction of 1 is "0". It is determined whether or not (step S1208). If the value of the HI level counter is "0" (step S1208: YES), it means that it is time to set the setting value update signal to LOW level. Set (step S1209).

Thereafter, 1 is subtracted from the pulse number counter value of the main RAM 65 (step S1210), and it is determined whether or not the pulse number counter value after the 1 subtraction is "0" (step S1211). If the value of the pulse number counter is not "0" (step S1211: NO), the output of the pulse signal by the setting value update signal for the number corresponding to the setting value of the pachinko machine 10 set this time has been completed. Since it means that there is no data, "20" is set in the LOW level counter of the main RAM 65 (step S1212). Since the value set in the LOW level counter is decremented by 1 at intervals of about 10 microseconds, it is maintained at the LOW level for 200 microseconds between a plurality of pulse outputs by the set value update signal. This LOW level maintenance period is a period sufficient for the management side CPU 112 to specify that the set value update signal has been changed from HI level to LOW level.

When the value of the pulse number counter is "0" (step S1211: YES), the output of the pulse signal by the set value update signal for the number corresponding to the set value of the pachinko machine 10 set this time has been completed. Therefore, output processing of a set value identification end command is executed (step S1213). The setting value identification end command is a command for making the management side CPU 112 recognize that the output of the setting value update signal for making the management side CPU 112 recognize the setting value of the pachinko machine 10 set this time is completed. When outputting the set value identification end command, the first to eighth signals input to the first to eighth buffers 122a to 122h are used in the same way as the identification start command, type identification command and identification end command. However, the signal pattern of the setting value identification end command is different from those of the identification start command, the type identification command and the identification end command.

As described above, in the setting value update signal output process, a pulse signal corresponding to the number of setting value update signals for the pachinko machine 10 set at the start of supply of operating power this time is output to the management IC 66. do. By executing the setting update recognition process, the management side CPU 112 grasps the number of pulse signals by the setting value update signal, and grasps the setting value of the pachinko machine 10 set this time based on it.

FIG. 29 is a flow chart showing a setting update recognition process executed by the management side CPU 112 . Note that the setting update recognition process is executed in step S902 of the management process (FIG. 23).

It is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level (step S1301). When an affirmative determination is made in step S1301, the value of the setting value grasping counter provided in the management side RAM 114 is set to "1" (step S1302). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means "setting 6".

After that, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level again (step S1303). If an affirmative determination is made in step S1303, 1 is added to the value of the set value grasping counter of the management side RAM 114 (step S1304). As a result, the setting value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

If a negative determination is made in step S1303 or if the process of step S1304 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121, , determines whether or not a setting value identification end command has been received from the main CPU 63 (step S1305). If a negative determination is made in step S1305, the process returns to step S1303.

If an affirmative determination is made in step S1305, RTC information, which is date information and time information, is read from the RTC 115 (step S1306). Then, write processing to the history memory 117 is executed (step S1307). In the write process, the pointer information in the history area 124 to be written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S1306 is written in the history information storage area 125 of the history area 124 . Also, both the information for identifying the set value and the information of the value of the set value grasp counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting was performed, and the information of the setting value when the setting is performed. The combination is stored as history information.

After that, update processing of the target pointer is executed (step S1308). In the updating process, the numerical value information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition of 1 has exceeded the maximum value of the pointer information in the history area 124 . If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

By executing the setting update recognition process as described above, when the setting state of the pachinko machine 10 is newly set, the fact that the setting was made, the date and time when the setting was made, and the A combination of set values when settings are made is stored in the history area 124 as history information. As a result, by reading and analyzing the information stored in the history memory 117 using an external device connected to the reading terminal 68d, the date and time when the setting state of the pachinko machine 10 was newly set and the relevant setting are It is possible to grasp the contents of the set values when the setting is performed.

Here, even if the setting state of the pachinko machine 10 is newly set, the information stored in the history memory 117 is maintained as it is. As a result, even if the setting state of the pachinko machine 10 is newly set, it is possible to prevent the history information in the history memory 117 from being erased. It is calculated using the history information that exists before and after. In this case, since the date and time when the setting state of the pachinko machine 10 was newly set as described above is stored in the history memory 117, it is stored in the history memory 117 by connecting an external device to the reading terminal 68d. By reading the information, it is possible to calculate various parameters in the period after the timing when the setting state of the pachinko machine 10 is newly set and the setting state is maintained.

Next, the display output processing executed by the management side CPU 112 will be described with reference to the flowchart of FIG. Note that the display output process is executed in step S909 of the management process (FIG. 23).

First, it is determined whether or not it is the calculation timing (step S1401). If 51 seconds have elapsed since the supply of operating power to the management-side CPU 112 was started, or if 51 seconds have elapsed since the previous affirmative determination was made in step S1401, an affirmative determination is made in step S1401. If an affirmative determination is made in step S1401, the number of different types of ball hits during normal times is calculated (step S1402). Specifically, first, by counting the number of history information storage areas 125 in which the correspondence information indicating the outlet 24a is stored in the history area 124 of the history memory 117, Calculate the number of incoming balls. In addition, by counting the number of history information storage areas 125 in which correspondence relationship information indicating that it is the general winning opening 31 is stored in the history area 124 of the history memory 117, the ball entering the general winning opening 31 is counted. Calculate the number. In addition, by counting the number of history information storage areas 125 that store correspondence information indicating that it is the special electric prize winning device 32 in the history area 124 of the history memory 117, the winning ball to the special electric prize winning device 32 is counted. Calculate the number. In addition, by counting the number of history information storage areas 125 in which the correspondence information indicating the first operation port 33 is stored in the history area 124 of the history memory 117, Calculate the number of incoming balls. In addition, by counting the number of history information storage areas 125 in which the correspondence information indicating the second operation port 34 is stored in the history area 124 of the history memory 117, Calculate the number of incoming balls.

After that, in the history area 124 of the history memory 117, the history information storage area 125 storing the correspondence information indicating that it is the front door frame 14 and the start information, and the correspondence relationship indicating that it is the front door frame 14 By referring to the history information storage area 125 that exists in the period between the history information storage area 125 in which the information and the end information are stored, the out exit that occurred in the situation where the front door frame 14 was open 24a, the number of balls entering each of the general winning opening 31, the special electric winning device 32, the first operating opening 33 and the second operating opening 34 is calculated (step S1403). In the history area 124 of the history memory 117, a history information storage area 125 in which the correspondence information indicating the front door frame 14 and the start information are stored, and the correspondence information indicating the front door frame 14 and The period between the history information storage area 125 in which the end information is stored is calculated from the RTC information stored in the history information storage area 125 . In addition, in the entirety of the pointer information, which is a serial number, the history information storage area 125 storing the correspondence information indicating the front door frame 14 and the start information and the correspondence indicating the front door frame 14 If there are a plurality of sections with the history information storage area 125 in which information and end information are stored, the total number of hits for the sections is calculated. Also, although there is a history information storage area 125 in which correspondence relationship information indicating that the front door frame 14 and start information are stored, RTC information corresponding to a time after the history information storage area 125 is present. is stored in the history information storage area 125, the correspondence information indicating the front door frame 14 and the end information are not stored, the correspondence information indicating the front door frame 14 and the start information are stored. All the history information in the history information storage area 125 in which the RTC information corresponding to the time after the history information storage area 125 is stored is treated as that in which the front door frame 14 is in the open state.

Thereafter, various parameters are calculated using the calculation results of steps S1402 and S1403 (step S1404). Specifically, first, the number of entering balls generated while the front door frame 14 is open calculated in step S1403 is subtracted from the number of entering balls calculated in step S1402. Then, the following 1st to 8th parameters are calculated using each number of hit balls after the subtraction. The difference between the number of balls entering the out hole 24a calculated in step S1402 and the number of balls entering the out hole 24a calculated in step S1403 is defined as the number of balls entering K1. The difference in the number of balls entered in the general winning port 31 calculated in step S1403 with respect to the number of balls is defined as the number of entered balls K2, and the special electric prize winning device calculated in step S1403 relative to the number of balls entered in the special electric prize winning device 32 calculated in step S1402. 32 is defined as the number of entered balls K3, and the difference between the number of entered balls through the first working hole 33 calculated in step S1403 and the number of balls entered into the first working hole 33 calculated in step S1402 is defined as the number of entered balls K3. The difference between the number of balls entering the second operating port 34 calculated in step S1403 and the number of balls entering the second operating port 34 calculated in step S1402 is defined as the number of entering balls K5.
・First parameter: total number of game balls paid out (K2 x "number of prize balls for winning to general winning opening 31" + K3 x "number of winning balls for winning to special electric winning device 32" + K4 x "first operation opening 33 "Number of prize balls for winning" + K5 × "Number of prize balls for winning to second operation port 34") / total number of game balls discharged from skill area PA (K1 + K2 + K3 + K4 + K5) ratio (hereinafter, this ratio is referred to as " D1”)
・Second parameter: ratio of total number of game balls K2 entering general winning hole 31/total number of game balls ejected from game area PA (K1+K2+K3+K4+K5) Ratio of the total number of game balls K3 / total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) Fourth parameter: total number of game balls K4 into the first operation port 33 / discharged from the game area PA Percentage of the total number of game balls (K1 + K2 + K3 + K4 + K5) (hereinafter, this percentage is referred to as "D2")
· Fifth parameter: the ratio of the total number K5 of game balls entering the second operation port 34 / the total number of game balls ejected from the game area PA (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio is referred to as "D3")
・Sixth parameter: D1-(D2 x "number of prize balls for winning to first operating port 33" + D3 x "number of prize balls for winning to second operating port 34")
・Seventh parameter: (K3 x "number of prize balls for winning to special electric prize winning device 32" + K5 x "number of prize balls for winning to second operation port 34") / total number of game balls paid out (K2 x "general The number of prize balls for winning to the winning opening 31" + K3 × "Number of prize balls for winning to the special electric winning device 32" + K4 x "Number of prize balls for winning to the first operation opening 33" + K5 x "Second operation opening 34 8th parameter: K3 x ``Number of prize balls for winning to special electric winning device 32''/Total number of game balls paid out (K2 x `` "Number of prize balls" + K3 x "Number of prize balls for winning to special electric prize winning device 32" + K4 x "Number of prize balls for winning to first operation opening 33" + K5 x "Number of prize balls for winning to second operation opening 34" ”) In step S 1404 , the first to eighth parameters, which are the calculation results, are stored in the normal storage area of the calculation result memory 131 . The first to eighth parameters stored in the normal storage area are retained until step S1404 is executed next time. That is, when the next step S1404 is executed and the first to eighth parameters are calculated, the newly calculated first to eighth parameters are stored in the normal storage area. The previous calculation results of the first to eighth parameters stored in the normal storage area are overwritten.

After that, in the history area 124 of the history memory 117, the history information storage area 125 storing the correspondence information indicating the opening/closing execution mode and the start information, the correspondence information indicating the opening/closing execution mode, and the start information are stored. By referring to the history information storage area 125 that exists in the period between the history information storage area 125 that stores the end information, the out port 24a and the general winning port 31 that occurred in the open/close execution mode , the number of balls entering each of the special electric prize winning device 32, the first operating port 33 and the second operating port 34 (step S1405). A history information storage area 125 in which the correspondence information indicating the open/close execution mode and start information are stored in the history area 124 of the history memory 117, and the correspondence information and end information indicating the open/close execution mode. is calculated from the RTC information stored in the history information storage area 125 . In addition, the history information storage area 125 stores the correspondence information and the start information indicating the opening/closing execution mode, and the correspondence information indicating the opening/closing execution mode and If there are a plurality of sections with the history information storage area 125 in which the end information is stored, the total number of hits for the sections is calculated. Also, although there is a history information storage area 125 in which correspondence relationship information and start information indicating that the open/close execution mode is stored, RTC information corresponding to a time after the history information storage area 125 is not stored. If the stored history information storage area 125 does not store the correspondence information and the end information indicating the opening/closing execution mode, the correspondence information and the start information indicating the opening/closing execution mode are stored. Any of the history information in the history information storage area 125 that stores the RTC information corresponding to the time after the history information storage area 125 is treated as in the opening/closing execution mode.

After that, during the period of the opening and closing execution mode specified in step S1405, the out port 24a, the general winning port 31, the special electric winning device 32, the first operation port 33 and the The number of balls entering each of the second operating holes 34 is calculated (step S1406). The method of calculating the number of entered balls is the same as in step S1403, except that the period of the open/close execution mode specified in step S1405 is assumed.

After that, various parameters are calculated using the calculation results of steps S1405 and S1406 (step S1407). Specifically, first, the number of entering balls generated while the front door frame 14 is open calculated in step S1406 is subtracted from the number of entering balls calculated in step S1405. Then, the following 11th to 18th parameters are calculated using each number of hit balls after the subtraction. The difference between the number of balls entering the out hole 24a calculated in step S1405 and the number of balls entering the out hole 24a calculated in step S1406 is defined as the number of balls entering K11. The difference in the number of balls entered in the general winning port 31 calculated in step S1406 with respect to the number of balls is defined as the number of entered balls K12, and the special electric prize winning device calculated in step S1406 relative to the number of balls entered in the special electric prize winning device 32 calculated in step S1405. 32 is defined as the number of entering balls K13, and the difference between the number of entering balls into the first working hole 33 calculated in step S1406 and the number of entering balls into the first working hole 33 calculated in step S1405 is defined as the number of entering balls K13. The difference between the number of balls entering the second working opening 34 calculated in step S1406 and the number of balls entering the second working opening 34 calculated in step S1405 is defined as the number of entering balls K14.
11th parameter: total number of game balls to be paid out (K12 x "number of prize balls for winning to general winning opening 31" + K13 x "number of winning balls for winning to special electric winning device 32" + K14 x "first operation opening 33 The ratio of the total number of game balls discharged from the game area PA (K11+K12+K13+K14+K15) (hereafter, this ratio is referred to as " D11”)
・Twelfth parameter: ratio of total number of game balls K12 entering general winning port 31/total number of game balls ejected from game area PA (K11+K12+K13+K14+K15) The ratio of the total number of game balls K13 / the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) 14th parameter: The total number of game balls K14 into the first operation port 33 / discharged from the game area PA Percentage of the total number of game balls (K11 + K12 + K13 + K14 + K15) (hereinafter, this percentage is referred to as "D12")
· Fifteenth parameter: the ratio of the total number of game balls K15 entering the second operation port 34 / the total number of game balls ejected from the game area PA (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio is referred to as "D13")
16th parameter: D11-(D12 x "number of prize balls for winning to first operating port 33" + D13 x "number of prize balls for winning to second operating port 34")
17th parameter: (K13 x "number of prize balls for winning to special electric prize winning device 32" + K15 x "number of prize balls for winning to second operation port 34") / total number of game balls paid out (K12 x "general "Number of prize balls for winning to winning opening 31" + K13 x "Number of winning balls for winning to special electric winning device 32" + K14 x "Number of winning balls for winning to first operation opening 33" + K15 x "Second operation opening 34" 18th parameter: K13 x ``Number of prize balls for winning to special electric winning device 32'' / Total number of game balls paid out (K12 x ``For winning to general winning port 31 "Number of prize balls" + K13 x "Number of prize balls for winning to special electric prize winning device 32" + K14 x "Number of prize balls for winning to first operation opening 33" + K15 x "Number of prize balls for winning to second operation opening 34" ”) In step S 1407 , the 11th to 18th parameters, which are the calculation results, are stored in the open/close execution mode memory area of the calculation result memory 131 . The 11th to 18th parameters stored in the storage area for the opening/closing execution mode are retained until the next step S1407 is executed. That is, when the next step S1407 is executed and the 11th to 18th parameters are calculated, the newly calculated 11th to 18th parameters are stored in the open/close execution mode storage area. , the previous calculation results of the 11th to 18th parameters stored in the open/close execution mode storage area are overwritten.

After that, in the history area 124 of the history memory 117, the history information storage area 125 storing the correspondence relationship information indicating the high-frequency support mode and the start information, and the correspondence relationship indicating the high-frequency support mode By referring to the history information storage area 125 that exists in the period between the history information storage area 125 in which the information and end information are stored, the out exit 24a that occurred in the high-frequency support mode, general The number of balls entering each of the winning opening 31, the special electric winning device 32, the first operating opening 33 and the second operating opening 34 is calculated (step S1408). A history information storage area 125 in which the correspondence information indicating the high-frequency support mode and the start information are stored in the history area 124 of the history memory 117, and the correspondence information indicating the high-frequency support mode and The period between the history information storage area 125 in which the end information is stored is calculated from the RTC information stored in the history information storage area 125 . In addition, the history information storage area 125 storing the correspondence relationship information indicating the high-frequency support mode and the start information and the correspondence relationship indicating the high-frequency support mode are stored in the entirety of the consecutively numbered pointer information. If there are a plurality of sections with the history information storage area 125 in which information and end information are stored, the total number of hits for the sections is calculated. Also, although there is a history information storage area 125 that stores correspondence relationship information indicating that the high-frequency support mode and start information are stored, RTC information corresponding to a time after the history information storage area 125 is present. is stored in the history information storage area 125, the correspondence information indicating the high-frequency support mode and the end information are not stored, the correspondence information indicating the high-frequency support mode and the start information are stored. Any of the history information in the history information storage area 125 that stores RTC information corresponding to a time after the history information storage area 125 that is set is treated as that in the high-frequency support mode.

After that, during the period of the high-frequency support mode specified in step S1408, the out port 24a, the general winning port 31, the special electric winning device 32, and the first operation port 33 generated in the state where the front door frame 14 is open and the number of balls entered into each of the second working openings 34 (step S1409). The method of calculating the number of hits is the same as in step S1403, except that the high-frequency support mode specified in step S1408 is assumed.

Thereafter, various parameters are calculated using the calculation results of steps S1408 and S1409 (step S1410). Specifically, first, the number of entering balls generated while the front door frame 14 is open calculated in step S1409 is subtracted from the number of entering balls calculated in step S1408. Then, the following 21st to 26th parameters are calculated using the number of hit balls after the subtraction. The difference between the number of balls entering the out hole 24a calculated in step S1408 and the number of balls entering the out hole 24a calculated in step S1409 is defined as the number of balls entering K21. The difference between the number of balls and the number of balls entering the general winning port 31 calculated in step S1409 is defined as the number of entering balls K22, and the special electric winning device calculated in step S1409 relative to the number of entering balls of the special electric winning device 32 calculated in step S1408. 32 is defined as the number of entering balls K23, and the difference between the number of entering balls into the first working hole 33 calculated in step S1409 and the number of entering balls into the first working hole 33 calculated in step S1408 is defined as the number of entering balls K23. The difference between the number of balls entering the second working port 34 calculated in step S1409 and the number of balls entering the second working port 34 calculated in step S1408 is defined as the number of entering balls K24.
21st parameter: total number of game balls to be paid out (K22 x "number of prize balls for winning to general winning opening 31" + K23 x "number of winning balls for winning to special electric winning device 32" + K24 x "first operation opening 33 The ratio of the total number of game balls ejected from the game area PA (K21+K22+K23+K24+K25) (hereafter, this ratio is referred to as " D11”)
22nd parameter: ratio of the total number of game balls entering the general winning hole 31 K22/total number of game balls discharged from the game area PA (K21+K22+K23+K24+K25) 24th parameter: total number of game balls K24/discharged from the game area PA Percentage of the total number of game balls (K21 + K22 + K23 + K24 + K25) (hereinafter, this percentage is referred to as "D22")
· 25th parameter: the ratio of the total number of game balls K25 entering the second operation port 34 / the total number of game balls ejected from the game area PA (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio is referred to as "D23")
26th parameter: D21-(D22 x "number of prize balls for winning to first operating port 33" + D23 x "number of prize balls for winning to second operating port 34")
In step S1410, the 21st to 26th parameters, which are the calculation results, are stored in the memory area for the high-frequency support mode in the calculation result memory 131. FIG. The twenty-first to twenty-sixth parameters stored in the high-frequency support mode storage area are stored and held until the next step S1410 is executed. That is, when the next step S1410 is executed and the 21st to 26th parameters are calculated, the newly calculated 21st to 26th parameters are stored in the high frequency support mode storage area. Then, the calculation results of the previous 21st to 26th parameters stored in the storage area for the high-frequency support mode are overwritten.

Thereafter, the frequency of occurrence of the opening/closing execution mode is calculated and stored (step S1411). Specifically, by counting the number of history information storage areas 125 in which correspondence relationship information and start information indicating that the open/close execution mode is stored in the history area 124 of the history memory 117, the opening/closing execution mode is determined. Calculate the number of occurrences of In addition, the number of occurrences of game rounds is calculated by counting the number of history information storage areas 125 in which correspondence information indicating the start of game rounds is stored in the history area 124 of the history memory 117. . Then, the number of occurrences of the opening/closing execution mode per unit game is calculated. The number of occurrences of the opening/closing execution mode is defined as the number of times of occurrence K31, and the number of times of occurrence of the game cycle is defined as the number of times of occurrence K32.
・The 31st parameter: K31/K32
In step S1411, the 31st parameter, which is the calculation result, is stored in the opening/closing execution mode frequency storage area in the calculation result memory 131. FIG. The thirty-first parameter stored in the opening/closing execution mode frequency storage area is retained until the next step S1411 is executed. That is, when the next step S1411 is executed and the 31st parameter is calculated, the newly calculated 31st parameter is stored in the open/close execution mode frequency storage area. The previous calculation result of the 31st parameter stored in the frequency storage area is overwritten.

After that, the occurrence frequency of the high frequency support mode is calculated and stored (step S1412). Specifically, by counting the number of history information storage areas 125 in which the correspondence relationship information indicating the high-frequency support mode and the start information are stored in the history area 124 of the history memory 117, the high-frequency support mode is stored. Calculate the number of occurrences of support mode. In addition, the number of occurrences of game rounds is calculated by counting the number of history information storage areas 125 in which correspondence information indicating the start of game rounds is stored in the history area 124 of the history memory 117. . Then, the number of occurrences of the high frequency support mode per unit game time and the ratio of the number of occurrences of the high frequency support mode to the number of occurrences of the opening/closing execution mode are calculated. The number of occurrences of the high frequency support mode is K41, the number of game rounds is K42, and the opening/closing execution mode calculated in step S1411 is K43.
・The 41st parameter: K41/K42
・42nd parameter: K41/K43
In step S1412, the 41st to 42nd parameters, which are the calculation results, are stored in the high-frequency support mode frequency storage area in the calculation result memory 131. FIG. The 41st to 42nd parameters stored in the high frequency support mode frequency storage area are stored and held until the next step S1412 is executed. That is, when the next step S1412 is executed and the 41st to 42nd parameters are calculated, the newly calculated 41st to 42nd parameters are stored in the high-frequency support mode frequency storage area. Then, the previous calculation results of the 41st to 42nd parameters stored in the high-frequency support mode frequency storage area are overwritten.

If a negative determination is made in step S1401, or if the processing of step S1412 is executed, display processing is executed (step S1413). FIG. 31 is a flow chart showing display processing.

First, 1 is subtracted from the value of the update timing counter provided in the management side RAM 114 (step S1501). The update timing counter is a counter for the management side CPU 112 to specify the timing for updating the display contents of the management result of the game history on the first to third notification display devices 69a to 69c. The management side CPU 112 controls the display of the first to third notification display devices 69a to 69c to display the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first Parameters and calculation results of the 41st to 42nd parameters are reported. In this case, information corresponding to the type of parameter to be notified is displayed on the first notification display device 69a. Further, of the value obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the ones place is displayed for the third notification display. Displayed on device 69c. In the first to third notification display devices 69a to 69c, the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameters and the forty-first to The display corresponding to the calculation result of the 42nd parameter is sequentially switched according to a predetermined order, and after the calculation result of the 42nd parameter, which is the last display target, is displayed, the first order display target is displayed. The calculation result of one parameter is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is two seconds.

Here, the calculation cycle of the various parameters in the management side CPU 112 is 51 seconds. On the other hand, the number of various parameters is 25, and the period during which the calculation result of one parameter is continuously displayed is 2 seconds. Therefore, various parameters calculated by the management side CPU 112 are to be displayed on the first to third display devices 69a to 69c at least once.

When the processing of step S1501 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether or not the value of the update timing counter after subtracting 1 is "0". It is determined whether or not it is time to do so (step S1502). When an affirmative determination is made in step S1502, 1 is added to the value of the display target counter provided in the management side RAM 114 (step S1503). If the value of the display target counter after adding 1 exceeds the maximum value of "24" (step S1504: YES), the value of the display target counter is cleared to "0" (step S1505).

The display target counter is a counter for the management side CPU 112 to specify the types of parameters to be displayed on the first to third notification display devices 69a to 69c. The 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameters, the 41st to 42nd parameters, and the display target counters of "0" to "24" There is a one-to-one correspondence with the possible values. For example, when the value of the display target counter is "0", the first parameter to be displayed first becomes the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is "24". , the 42nd parameter, which is the last display target, is the display target of the first to third notification display devices 69a to 69c.

When a negative determination is made in step S1504, or when the process of step S1505 is executed, the first notification display device 69a is displayed so as to display information corresponding to the type of parameter corresponding to the value of the counter to be displayed. control (step S1506). Further, a parameter corresponding to the value of the counter to be displayed is read from the calculation result memory 131, the read parameter is multiplied by 100, and a number corresponding to the tens place is displayed on the second notification display device 69b, A number corresponding to the ones place is displayed on the third notification display device 69c (step S1507). The contents displayed on the first to third notification display devices 69a to 69c in steps S1506 and S1507 are continued until the next update timing or until the supply of operating power to the management side CPU 112 is stopped. be. Thereafter, a value corresponding to 2 seconds is set in the update timing counter of the management RAM 114 as the value corresponding to the next update timing (step S1508).

By executing the display processing as described above, when the supply of operating power to the management side CPU 112 is started, the game history management result is displayed on the first to third notification display devices 69a to 69c. be done. The display of the management result of the game history is performed regardless of whether the game is continued or not. This is done regardless of whether it is visible or not. Thus, by executing the display control of the first to third information display devices 69a to 69c regardless of the game situation and the state of the pachinko machine 10, the first to third information display devices 69a 69c can be simplified.

The display of the management result of the game history on the first to third notification display devices 69a to 69c is started after the supply of operating power to the management side CPU 112 is started and after the identification end command is received from the main side CPU 63. be done. In this case, the information stored in the calculation result memory 131 is retained even when the supply of operating power to the pachinko machine 10 is stopped, similarly to the information stored in the history memory 117. Therefore, when the supply of operating power to the management side CPU 112 is started, the management result of the game history calculated before the supply of the operating power to the management side CPU 112 is stopped is displayed.

When the setting state of the pachinko machine 10 is set when the supply of operating power to the main side CPU 63 is started, the information corresponding to the set value being changed is displayed on the third notification display device 69c. However, while the information corresponding to the set value is displayed before the identification end command is transmitted from the main CPU 63, the game history on the first to third notification display devices 69a to 69c is displayed. The display of the management result of is started after the main side CPU 63 transmits an identification end command. As a result, even if the third notification display device 69c is configured to be used both as a display device for displaying information corresponding to the setting value and for displaying the management result of the game history, it is possible to display these displays. It is possible to prevent periods from overlapping.

Further, when the information corresponding to the set value is displayed, the first notification display device 69a and the second notification display device 69b are not displayed. On the other hand, when the game history management result is being displayed, the first notification display device 69a and the second notification display device 69b are not hidden. This makes it possible to identify which of the display of information corresponding to the set value and the display of the management result of the game history is being performed on the third notification display device 69c.

Next, a processing configuration for outputting the history information stored in the history memory 117 and the various parameters stored in the calculation result memory 131 to an external device electrically connected to the reading terminal 68d of the MPU 62. explain. FIG. 32(a) is a flow chart showing data output processing executed by the main side CPU 63. FIG. The data output process is executed at step S112 in the main process (FIG. 9).

In the data output process, first, it is determined whether or not a connection signal indicating that an external device is electrically connected to the reading terminal 68d has been received from the reading terminal 68d (step S1601). If a negative determination is made in step S1601, the data output processing ends. In this case, the supply of operating power to the main CPU 63 must be restarted in order to execute the data output process. Thus, in order to externally output history information and various parameters, supply of operating power to the main side CPU 63 should be started while an external device is electrically connected to the reading terminal 68d. need to be A power switch for stopping and starting the supply of operating power to the main CPU 63 is provided in the payout mechanism 73 mounted on the rear surface of the back pack unit 15. In order to do so, it is necessary to open the gaming machine main body 12 from the outer frame 11 to expose the rear surface of the back pack unit 15 . Under these circumstances, in order to externally output history information and various parameters, supply of operating power to the main CPU 63 is started while an external device is electrically connected to the reading terminal 68d. It is possible to make it difficult for anyone other than the manager of the game hall to read the history information and various parameters.

If an affirmative determination is made in step S1601, the current connection of the external device to the reading terminal 68d is determined by determining whether or not a control information confirmation signal is received from the reading terminal 68d. (step S1602). The external device is configured to be able to perform both confirmation of control information and confirmation of history information and various parameters. A signal for confirming control information is transmitted, and when confirmation of history information and various parameters is selected by manual operation of the external device, a signal for history confirmation is transmitted from the external device. The configuration is not limited to this, and the external device for checking control information and the external device for checking history may be separate. In this case, when an external device for checking the control information is electrically connected to the reading terminal 68d, a signal for checking the control information is transmitted from the external device, and an external device for checking the history is sent to the reading terminal 68d. When the device is electrically connected, a signal for history confirmation is transmitted from the external device.

When an affirmative determination is made in step S1602, output processing for confirming control information is executed (step S1603). In the output process, a program and data are read as control information from the main ROM 64, and the read control information is output to the reading terminal 68d. As a result, the control information can be read by an external device electrically connected to the reading terminal 68d, and it is possible to confirm whether the control information is legitimate or normal. It is possible to do

If a negative determination is made in step S1602, an output instruction signal is transmitted to the management side CPU 112 (step S1604). Specifically, the output state of the output instruction signal is switched from LOW level to HI level. This HI level output state continues for a specific period. This specified period is sufficient for the management CPU 112 to specify that the 16th buffer 122p is receiving the HI level output instruction signal. By switching the output state of the output instruction signal to the HI level, management-side CPU 112 executes processing for outputting history information.

Specifically, as shown in the flowchart of FIG. 32(b), when the output state of the output instruction signal input to the sixteenth buffer 122p of the input port 121 switches from LOW level to HI level, the management side CPU 112 (Step S1701: YES), the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 are read, and the read history information and various parameters are output to the reading terminal 68d. (Step S1702). As a result, the history information and various parameters can be read by the external device electrically connected to the reading terminal 68d, and the information of the management result of the game history can be analyzed. When the management CPU 112 outputs the history information to the reading terminal 68d, it clears the history memory 117 to "0" (step S1703). The history information in the history memory 117 is erased only when the history information is read by an external device.

Returning to the description of the data output process (FIG. 32(a)), when the process of step S1603 is executed or when the process of step S1604 is executed, the electrical connection of the external device to the reading terminal 68d continues. It is determined whether or not it is set (step S1605). If it is continued (step S1605: YES), it stands by at step S1605. As a result, it is possible to prevent the processing set in the execution order after the data output processing from being executed until the connection of the external device to the reading terminal 68d is released. If the connection of the external device to the reading terminal 68d is canceled (step S1605: NO), this data output process is terminated.

According to this embodiment detailed above, the following excellent effects are obtained.

Since the game ball is paid out when the game ball enters any one of the general winning hole 31, the special electric winning device 32, the first operating hole 33 and the second operating hole 34, the player can enter any of these ball entering parts The game is played while expecting that the game ball will enter the ball. In this configuration, the entry of a game ball into any one of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 (hereinafter also referred to as the history target ball entering section) occurs, history information corresponding to it is stored in the history memory 117 of the management IC 66 . As a result, it becomes possible for the pachinko machine 10 to store and hold information for managing the number of game balls entering each history target ball entering portion or the frequency of entering the ball, and the managed information is used. This makes it possible to appropriately manage the manner in which a game ball enters each history target ball entering section. Further, since the history information is stored and held by the pachinko machine 10 itself, it is possible to prevent unauthorized access to and unauthorized alteration of the history information.

All the ball-entering units that discharge game balls from the game area PA are subject to execution of history information storage processing and are subject to management using history information. This makes it possible to manage the ball-entering frequency for any history-targeted club by using the history information. In addition, it becomes possible to manage the ratio of the number of game balls entering each history target ball entering section to the number of game balls discharged from the game area PA using the history information.

The history information includes RTC information, which is information corresponding to the timing at which the game ball entered the history target ball-entering portion that triggered the storage of the history information. As a result, by using the history information, it is possible to grasp in detail the history of the game ball entering the history target ball entering section.

The history memory 117 stores not only the history information corresponding to the entry of the game ball into the history target ball entry portion, but also the history information indicating whether or not the open/close execution mode is in progress, and whether the high frequency support mode is in progress. and history information indicating whether the front door frame 14 is open. As a result, it is possible to distinguish between each of these situations and manage the manner in which the game ball enters the history target ball entering section.

It is possible to output the history information stored in the history memory 117 to an external device, which is a device outside the pachinko machine 10 . As a result, it becomes possible to read the history information by the external device and analyze the manner of entry of the game ball into the history target ball entry section using the read history information.

The MPU 62 is provided with a reading terminal 68d, and the program can be read from the main ROM 64 by an external device electrically connected to the reading terminal 68d. This makes it possible to check whether the program is normal. In this configuration, the history information stored in the history memory 117 is externally output using the reading terminal 68d for externally outputting the program. This makes it possible to externally output the history information while preventing the configuration from becoming complicated.

Either the program or the history information is specified as the information to be output from the reading terminal 68d, and the information on the side corresponding to the specified result is externally output through the reading terminal 68d. As a result, in the configuration in which the history information is externally output using the reading terminal 68d for externally outputting the program, the pachinko machine 10 can determine whether the information to be externally output is either the program or the history information. is specified on the side, and the specified information is output to the outside. Therefore, even if the reading terminal 68d is also used, it is possible to read out only the necessary information.

Based on the information received from the external device electrically connected to the reading terminal 68d, it is specified whether the information to be output from the reading terminal 68d is the program or history information. This makes it possible to avoid complicating the configuration regarding the selection of information to be externally output.

An MPU 62 having a main-side ROM 64 storing programs in advance has a management IC 66 and a reading terminal 68d. This makes it possible to concentrate the signal paths for the reading terminal 68 d within the MPU 62 . Therefore, it is possible to achieve the excellent effects already described while making unauthorized access to the signal path to the reading terminal 68d difficult.

A main side CPU 63 that executes a process for paying out a game ball based on the entry of the game ball into one of the general winning opening 31, the special electric winning device 32, the first operating opening 33 and the second operating opening 34. Separately, a management side CPU 112 is provided, and the management side CPU 112 executes processing for storing history information in the history memory 117 . As a result, it becomes possible to manage the manner of entry of game balls into the respective history object entry sections while preventing the processing load of the main side CPU 63 from excessively increasing.

The main side CPU 63 and the management side CPU 112 are provided on the same chip as the MPU 62 . This makes it possible to prevent unauthorized access to the communication path between the main side CPU 63 and the management side CPU 112 .

The main side CPU 63 stores the information corresponding to the detection results of the ball entry detection sensors 42a to 48a in each buffer of the input port 121 of the management IC 66 using the signal paths corresponding to the ball entry detection sensors 42a to 48a. 122a-122g. As a result, the types of information transmitted from the main CPU 63 correspond to the buffers 122a to 122g (that is, the respective signal paths), simplifying the configuration for distinguishing the types of information in the management CPU 112. It becomes possible to

The main CPU 63 receives information corresponding to whether or not the opening/closing execution mode is in progress, information corresponding to whether or not the high frequency support mode is in progress, information corresponding to whether or not the front door frame 14 is being opened, And the information corresponding to the start of the game cycle is transmitted to each of the buffers 122h to 122k of the input port 121 of the management IC 66 using signal paths corresponding to each of these situations. As a result, the type of information corresponding to each situation corresponds to each of the buffers 122h to 122k (that is, each signal path), thereby simplifying the configuration for distinguishing between the types of information in the management CPU 112. becomes possible.

The master side CPU 63 transmits to the management side CPU 112 correspondence relationship information indicating which type of information each buffer 122a to 122k (that is, each signal path 118a to 118k) corresponds to. This eliminates the need to store the correspondence information in advance in the management IC 66 . Therefore, it is possible to improve the versatility of the management IC 66 .

When the supply of operating power to the main CPU 63 is started, the correspondence information is transmitted from the main CPU 63 to the management IC 66 . As a result, in a situation where a game ball may enter the history target ball entry section, the management IC 66 can specify the correspondence relationship between the information transmitted from the main side CPU 63 and the history target ball entry section. It is possible to make it

Correspondence information is transmitted from the main side CPU 63 to the management IC 66 using the signal paths 118a to 118g for transmitting information indicating whether or not a game ball has entered the history target ball entry portion. This makes it possible to simplify the communication configuration compared to a configuration in which a dedicated signal path is provided for transmitting correspondence information.

The management IC 66 is provided with a correspondence memory 116 , and the correspondence information transmitted from the main CPU 63 to the management IC 66 is stored in the correspondence memory 116 . As a result, every time the main side CPU 63 transmits the information of the detection result of each of the ball entry detection sensors 42a to 48a, the information that enables the management IC 66 to specify the history target ball entry portion corresponding to the information to be transmitted. no longer need to provide. Therefore, it is possible to suppress the amount of information of the detection results of the ball entry detection sensors 42a to 48a transmitted from the main side CPU 63. FIG.

When the output state of the output instruction signal output from the main CPU 63 to the management IC 66 is switched from LOW level to HI level, information is output from the management IC 66 to the reading terminal 68d. In this case, the fact that the signal path corresponding to the sixteenth buffer 122p corresponds to the output instruction signal can be specified by the management side CPU 112 without receiving the correspondence relation information from the main side CPU 63. . This makes it possible to prevent the configuration related to the transmission of correspondence information from becoming extremely complicated.

The management IC 66 is provided with buffers 122a to 122p capable of receiving information from the main CPU 63, the number of which is greater than the number of types of information to be transmitted from the main CPU 63 to the management IC 66. It is As a result, even if the number of types of information increases or decreases according to the model of the pachinko machine 10, it is possible to deal with the situation without changing the configuration of the buffers 122a to 122p. Therefore, it is possible to improve the versatility of the management IC 66 .

When history information is transmitted from the management IC 66 to the reading terminal 68d, each piece of history information includes correspondence information indicating the type of the history target ball-entering club corresponding to the history information. As a result, it is possible to use the read history information to specify the manner in which the game ball enters each history target ball entry section.

By using the history information stored in the history memory 117 in the management IC 66, various parameters (first to eighth parameters, eleventh 18th parameter, 21st to 26th parameter, 31st parameter, 41st to 42nd parameter) are calculated. Various parameters resulting from these calculations are sequentially displayed on the first to third notification display devices 69a to 69c. As a result, it becomes possible for the pachinko machine 10 to notify various parameters that are the result of calculation using the history information.

Various parameters are calculated while excluding the history information corresponding to the situation in which the front door frame 14 is open. This makes it possible to derive various parameters in a normal situation in which the front door frame 14 is in the closed state. Further, various parameters corresponding to each of the conditions of the open/close execution mode and the condition of the high-frequency support mode are calculated. As a result, it becomes possible for the manager of the game hall or the like to grasp the ball entry mode of the game ball according to each situation.

When the history information in the history memory 117 is output to an external device, the history memory 117 is initialized by executing clearing processing of the history memory 117 . As a result, history information that exceeds the storage capacity of the history memory 117 is to be stored in the history memory 117, and the history information that should be stored and held is erased by overwriting. can be made difficult to occur.

History information is stored in the history memory 117 in a configuration in which an external output corresponding to the entry of a game ball into the first operation port 33 or the second operation port 34 is performed through the external terminal plate 97. . As a result, by using the information output to the outside through the external terminal plate 97, the number of game balls entering the first operating port 33 and the second operating port 34 and the frequency of entering the game ball can be easily grasped. By using the history information stored in the memory 117, it is possible to accurately grasp the number of game balls entering the history target ball entering section and the frequency of entering the ball.

In the low-probability mode, the probability of a big win result fluctuates according to the setting state of the pachinko machine 10 of "setting 1" to "setting 6". Thus, even with a single pachinko machine 10, it is possible to create a situation in which the probability of a jackpot result is advantageous or disadvantageous in the low-probability mode. Therefore, it is possible to improve the interest in the game.

The probability of a big win result in the low probability mode fluctuates according to the setting state of the pachinko machine 10 of "setting 1" to "setting 6", while the probability of a big win result in the high probability mode is set by the pachinko machine 10. It does not change depending on the state. This makes it possible to limit the influence of the setting state of the pachinko machine 10 on the probability of a jackpot result to the situation in the low-probability mode. In addition, since it is possible to make the high accuracy table 64g referred to in the high probability mode common regardless of the setting state of the pachinko machine 10, the table 64a to 64g is stored in advance in the main ROM It is possible to suppress an increase in storage capacity for storing.

In the low-probability mode, the probability of the jackpot result fluctuates according to the setting state of the pachinko machine 10 of "setting 1" to "setting 6", while the distribution mode of the type of jackpot result depends on the setting state of the pachinko machine 10. does not change accordingly. This makes it possible to limit the influence of the setting state of the pachinko machine 10 to the situation in the low-probability mode. In addition, since it is possible to make the distribution table 64h referred to when distributing the types of jackpot results common regardless of the setting state of the pachinko machine 10, the distribution table 64h is stored in the main ROM 64. It is possible to suppress an increase in the storage capacity for storing in advance.

Even if the setting state of the pachinko machine 10 is newly set, the history information stored in the history memory 117 is stored and held without being erased. Thus, even if the setting state of the pachinko machine 10 is newly set, the history information up to that point can be continuously stored in the history memory 117, and the history memory can be maintained for a long period of time. Using the history information accumulated in 117, it becomes possible to specify the management result of the game history.

The setting state of the pachinko machine 10 is newly set in a configuration in which the history information stored in the history memory 117 is stored and held without being erased even if the setting state of the pachinko machine 10 is newly set. is performed, history information corresponding to it is stored in history memory 117 . As a result, it is possible to distinguish between the history information before the setting state of the pachinko machine 10 is newly set and the history information after the setting is made.

When the history information corresponding to the new setting of the setting state of the pachinko machine 10 is stored in the history memory 117, the information corresponding to the setting value is included in the history information. This makes it possible to identify the contents of the setting values that were set in the past by referring to the history information.

When calculating various parameters at the time of calculation, the history information stored after the history information corresponding to the new setting of the pachinko machine 10 in the history memory 117 is used as a reference. may be configured to calculate various parameters. In this case, it is possible to derive the management result of the game history at the timing after the setting state of the pachinko machine 10 is newly set as various parameters.

Also, when calculating various parameters at the calculation timing, history information corresponding to new setting of the setting state of the pachinko machine 10 in the history memory 117 and corresponding to change of the setting value is used as a reference. , and the history information stored after that may be used to calculate various parameters. In this case, it is possible to derive the management result of the game history at the timing after the setting state of the pachinko machine 10 is changed as various parameters.

Also, although the circuit board box 60a of the main controller 60 is provided with an opening for exposing the reading terminal 68d, the opening is not provided and the reading terminal 69d is located on the opposite wall 60b. It is good also as a structure covered with. In this case, it is necessary to open the board box 60a in order to connect an external device to the reading terminal 68d.

<Second embodiment>
In this embodiment, the contents of the win/fail table corresponding to the setting state of the pachinko machine 10 are different from those in the first embodiment. The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 33 is an explanatory diagram for explaining various tables stored in the main ROM 64 in this embodiment.

As shown in FIG. 33, the main ROM 64 has an area 161 for setting 1, an area 162 for setting 2, an area 163 for setting 3, an area 164 for setting 4, an area 165 for setting 5, and an area for setting 6. 166 and are provided. In the area 161 for setting 1, a low probability table 161a for setting 1 to be referred to when the setting state of the pachinko machine 10 is "setting 1" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 and a high-probability table 161b for setting 1, which is referred to when the setting state of is "setting 1" and the win-or-fail lottery mode is the high probability mode. In the area 162 for setting 2, a low probability table 162a for setting 2, which is referred to when the setting state of the pachinko machine 10 is "setting 2" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 and a high-probability table 162b for setting 2 that is referred to when the setting state of is "setting 2" and the lottery mode is the high probability mode. In the setting 3 area 163, the setting state of the pachinko machine 10 is "setting 3" and the winning/failure lottery mode is the low probability mode, the low probability table 163a for the setting 3 referred to, and the pachinko machine 10 and a high-probability table 163b for setting 3, which is referred to when the setting state of is "setting 3" and the win-or-fail lottery mode is the high probability mode.

In the area 164 for setting 4, a low probability table 164a for setting 4, which is referred to when the setting state of the pachinko machine 10 is "setting 4" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 and a high-probability table 164b for setting 4 that is referred to when the setting state of is "setting 4" and the win-or-fail lottery mode is the high probability mode. In the area 165 for setting 5, a low probability table 165a for setting 5, which is referred to when the setting state of the pachinko machine 10 is "setting 5" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 and a high-probability table 165b for setting 5 that is referred to when the setting state of is "setting 5" and the win-or-fail lottery mode is the high probability mode. In the area 166 for setting 6, a low probability table 166a for setting 6, which is referred to when the setting state of the pachinko machine 10 is "setting 6" and the win/fail lottery mode is the low probability mode, and the pachinko machine 10 and a high-probability table 166b for setting 6, which is referred to when the setting state of is "setting 6" and the win-or-fail lottery mode is the high probability mode.

Winning probabilities of the jackpot result set in each of the low certainty tables 161a to 166a are different from each other. Specifically, when the low certainty table 161a for setting 1 is referred to, the jackpot result is about 1/320, and when the low certainty table 162a for setting 2 is referred, about 1/310. When the low certainty table 163a for setting 3 is referred to, the big winning result is about 1/300, and when the low certainty table 164a for setting 4 is referred, about 1/290. When the low probability table 165a for setting 5 is referred to, the result is about 1/280, and when the low probability table 166a for setting 6 is referred, about 1/270. result in a big hit. As a result, when the setting state of the pachinko machine 10 is set to a high setting value, it becomes easier for a large winning result to occur in the low-probability mode, which is advantageous for the player.

Winning probabilities of the jackpot result set in each of the high probability tables 161b to 166b are different from each other. Specifically, when the high certainty table 161b for setting 1 is referred to, the jackpot result is about 1/45, and when the high certainty table 162b for setting 2 is referred, about 1/40 When the high probability table 163b for setting 3 is referred to, the result is about 1/35, and when the high probability table 164b for setting 4 is referred, the result is about 1/30. When the high probability table 165b for setting 5 is referred to, the result is about 1/25, and when the high probability table 166b for setting 6 is referred, the result is about 1/20. result in a big hit. As a result, when the setting state of the pachinko machine 10 is set to a high setting value, it becomes easier to generate a big win result in the high-probability mode, which is advantageous for the player.

That is, in the first embodiment, the higher the set value of the setting state of the pachinko machine 10, the higher the winning probability of the jackpot result in the low-probability mode, while the winning probability of the jackpot result in the high-probability mode is "setting 1". Although it is configured to be common in any setting state of ~ "Setting 6", in this embodiment, both the winning probability of the jackpot result in the low probability mode and the winning probability of the jackpot result in the high probability mode are the pachinko The higher the setting value of the machine 10, the higher the setting value. This makes it possible to increase the player's advantage over the fact that a high set value is set.

In addition, even if the winning probability of the jackpot result in the low-probability mode in the case of "setting 6", which is the highest setting state, is the winning probability of the jackpot result in the high-probability mode in the case of "setting 1", which is the lowest setting state. It is set lower than the probability. As a result, it is possible to prevent the player's advantage from becoming extremely low when the setting state of the pachinko machine 10 is "setting 1", and the setting state of the pachinko machine 10 is "setting 1". It is possible to prevent the player's advantage from becoming extremely high in the case of "6".

On the other hand, the sorting table 64h is provided with only one type so as to be common to any of the setting states of "setting 1" to "setting 6", as in the first embodiment. As a result, it is possible to prevent the setting state of the pachinko machine 10 from producing an advantage or a disadvantage in terms of the distribution mode of the jackpot results, and the memory capacity for pre-storing the distribution table 64h in the main-side ROM 64.例文帳に追加can be suppressed.

The winning probability of the jackpot result in the low-probability mode is higher when the setting state of the pachinko machine 10 is higher, while the winning probability of the jackpot result in the high-probability mode is higher when the setting state of the pachinko machine 10 is higher. A configuration in which the set value is lower may be adopted. In this case, in the low-probability mode, the higher the setting value of the pachinko machine 10 is, the more advantageous it is to the player, and in the high-probability mode, the lower the setting value of the pachinko machine 10 is, the more advantageous it is to the player. becomes possible.

Further, the winning probability of the jackpot result in the high-probability mode is higher when the setting value of the pachinko machine 10 is higher, while the winning probability of the jackpot result in the low-probability mode is "setting 1" to "setting 6". ] may be set constant. In this case, in the high-probability mode, the higher the setting value of the pachinko machine 10 is, the more advantageous it is for the player, and in the low-probability mode, the setting state of the pachinko machine 10 is not advantageous or disadvantageous. Become.

<Third Embodiment>
This embodiment differs from the first embodiment in the handling of the game history management results when the setting state of the pachinko machine 10 is newly set. The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

The management IC 66 is provided with a separate storage memory 171 as a memory for storing information in addition to each memory in the first embodiment. FIG. 34 is an explanatory diagram for explaining the separate storage memory 171. As shown in FIG. The separate storage memory 171 is a memory such as a NOR flash memory and a NAND flash memory that does not require external power supply for storage (that is, non-volatile storage means), and is used for both reading and writing.

The separate storage memory 171 is provided with a first separate storage area 172 , a second separate storage area 173 , a third separate storage area 174 , a fourth separate storage area 175 and a fifth separate storage area 176 . In these first to fifth separate storage areas 172 to 176, information on the management result of the game history calculated when the setting state of the pachinko machine 10 is newly set, more specifically in the first embodiment. (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, 41st to 42nd parameters) described in 1. above are sequentially stored. In this case, when the setting state of the pachinko machine 10 is newly set, various parameters are first stored in the first separate storage area 172, and thereafter each time the setting state of the pachinko machine 10 is newly set, the n-th separate Storage areas 172 to 176→(n+1)th different storage areas 172 to 176, the areas to be stored are switched. When the setting state of the pachinko machine 10 is newly set after the various parameters are stored in the fifth separate storage area 176, the various parameters are stored again in the first separate storage area 172.例文帳に追加At this time, various parameters already stored in the first separate storage area 172 are erased. As a result, the various parameters are stored in the separate storage memory 171 until the new setting of the pachinko machine 10 is executed five times, and the oldest various parameters are erased after five times. It is remembered by

Various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by the external device by connecting the external device to the reading terminal 68d. Thereby, it is possible to grasp the management result of the game history before the setting state is newly set in the pachinko machine 10 .

Next, the setting update recognition processing according to the present embodiment, which is executed by the management CPU 112, will be described with reference to the flowchart of FIG.

When the set value update signal input to the fifteenth buffer 122o of the input port 121 switches from LOW level to HI level (step S1801: YES), the value of the set value grasping counter of the management side RAM 114 is set to "1". Set (step S1802). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means "setting 6".

Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level again (step S1803). If an affirmative determination is made in step S1803, 1 is added to the value of the setting value grasping counter of the management side RAM 114 (step S1804). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

If a negative determination is made in step S1803, or if the process of step S1804 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121, , determines whether or not a setting value identification end command has been received from the main CPU 63 (step S1805). If a negative determination is made in step S1805, the process returns to step S1803.

If an affirmative determination is made in step S1805, repeated change monitoring processing is executed (step S1806). In the repeated change monitoring process, details of which will be described later, but when new settings of the setting state of the pachinko machine 10 occur repeatedly in a short period of time, a process for notifying it is executed. In the configuration in which various parameters are stored in the separate storage memory 171 each time the setting state of the pachinko machine 10 is newly set, the management result of the game history in the case where the game is played for a predetermined period is intended. It is assumed that the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to erase the setting automatically. On the other hand, by executing the repeated change monitoring process, when such an action is performed, a notification corresponding to it is executed.

After that, various calculation processes are executed (step S1807). In the various arithmetic processing, the processing of steps S1402 to S1412 of the display output processing (FIG. 30) in the first embodiment is executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters and 41st to the 42nd parameter) are calculated.

After that, the various parameters calculated in step S1807 are stored in the current storage target area among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 (step S1808). A pointer information area is set in the separate storage memory 171 so that the management side CPU 112 can specify an area to be stored among the first to fifth separate storage areas 172 to 176 . The information in the pointer information area is set so that when various parameters are stored in the area targeted for storage among the first to fifth separate storage areas 172 to 176, the storage target is changed to the next area. is updated to By executing the process of step S1808, various parameters at that point in time for the new setting of the setting state of the pachinko machine 10 are stored in the separate storage memory 171. FIG.

Thereafter, the history memory 117 is cleared to "0" (step S1809). That is, in this embodiment, not only when the history information is read by an external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set, the history memory 117 history information is erased.

Thereafter, the RTC information, which is date information and time information, is read from the RTC 115 (step S1810). Then, write processing to the history memory 117 is executed (step S1811). In the write process, the pointer information in the history area 124 to be written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S1810 is written in the history information storage area 125 of the history area 124. FIG. Also, both the information for identifying the set value and the information of the value of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting was performed, and the information of the setting value when the setting is performed. The combination is stored as history information.

After that, update processing of the target pointer is executed (step S1812). In the updating process, the numerical value information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition of 1 has exceeded the maximum value of the pointer information in the history area 124 . If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

Next, the repeated change monitoring process executed in step S1806 will be described with reference to the flowchart of FIG.

First, it is determined whether or not the number of times the game has been executed since the setting state of the pachinko machine 10 was set last time is within the reference number of times (specifically, 100 times) (step S1901). Specifically, the setting of the pachinko machine 10 is performed by counting the number of the history information storage areas 125 in which the correspondence information indicating the start of the game round is stored in the history area 124 of the history memory 117. The number of games played since the state was set last time is grasped, and it is further determined whether or not the grasped number of games is within a reference number (specifically, 100 times).

If an affirmative determination is made in step S1901, 1 is added to the value of the repetition change counter provided in the separate storage memory 171 (step S1902). Since the separate storage memory 171 is a memory that does not require power supply from the outside to hold data as already described, it does not require power supply from the outside to hold the value of the repeat change counter.

Thereafter, it is determined whether or not the value of the repetition change counter after adding 1 exceeds the notification reference value of "5" (step S1903). The notification reference value corresponds to the number of the first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171 . Therefore, in step S1903, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without intervening execution of game rounds exceeding the reference number of times exceeds the number of the first to fifth separate storage areas 172 to 176. It is determined whether or not the threshold is exceeded.

If an affirmative determination is made in step S1903, display processing for repetitive changes is executed (step S1904). In the repetitive change display processing, the display contents of the first to third notification display devices 69a to 69c correspond to the fact that the new setting of the setting state of the pachinko machine 10 is repeated the number of times exceeding the notification reference value in a short period of time. Display content for repeated changes. The display content of the repeated change is the display content of displaying "E" on all of the first to third notification display devices 69a to 69c, and this display content does not occur in other situations. Further, the state in which the repeated change display contents are displayed on the first to third notification display devices 69a to 69c continues until the repeated change flag provided in the separate storage memory 171 is cleared to "0". . The repetitive change flag is a flag for the management side CPU 112 to specify that the display contents of repetitive change should be displayed on the first to third notification display devices 69a to 69c. Further, when the repetitive change flag is set to "1" and the repetitive change display contents are displayed on the first to third notification display devices 69a to 69c, the display processing in the first embodiment is performed. (FIG. 31) is not executed. After that, the repeat change flag of the separate storage memory 171 is set to "1" (step S1905).

If a negative determination is made in step S1901, the value of the repetition change counter in the separate storage memory 171 is cleared to "0" (step S1906). Thereafter, on condition that the repetitive change flag of the separate storage memory 171 is set to "1" (step S1907: YES), the repetitive change display contents of the first to third notification display devices 69a to 69c are changed. The display is ended (step S1908), and the repetition change flag is cleared to "0" (step S1909).

According to this embodiment detailed above, the following excellent effects are obtained.

When the setting state of the pachinko machine 10 is newly set, the history information stored in the history memory 117 is erased. As a result, it is possible to leave in the history memory 117 the history information of games executed after the setting state of the pachinko machine 10 is newly set.

When the setting state of the pachinko machine 10 is newly set, the history information of the history memory 117 at that time is used to calculate various parameters as the game history management results. As a result, it is possible to grasp the management result of the game history in the situation before the setting state is newly set in the pachinko machine 10 . Further, even if the history information in the history memory 117 is erased when the setting state of the pachinko machine 10 is newly set, it is possible to grasp the management result of the game history by the history information to be erased. It becomes possible.

In the configuration in which various parameters are calculated using the history information in the history memory 117 at that point in time when a new setting of the setting state is performed in the pachinko machine 10, the calculated various parameters are stored in a separate storage memory. 171. As a result, even if the setting state is newly set in the pachinko machine 10, it is possible to grasp the management result of the game history in the situation before the setting is performed at an arbitrary timing thereafter.

By providing a plurality of separate storage areas 172 to 176 in the separate storage memory 171, it is possible to store various parameters corresponding to the setting timings of the setting state for a plurality of times. Thereby, it is possible to grasp the management result of the game history in a plurality of periods based on the timing at which the setting state is newly set. In addition, even if the setting state of the pachinko machine 10 is repeatedly newly set under a situation in which a game is not played, various parameters calculated using history information of a situation in which a game is actually played It is possible to increase the possibility of remaining in the separate storage memory 171 .

Various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by the external device by connecting the external device to the reading terminal 68d. Thereby, it is possible to grasp the management result of the game history before the setting state is newly set in the pachinko machine 10 .

In the configuration in which various parameters are stored in the separate storage memory 171 each time the setting state of the pachinko machine 10 is newly set, the management result of the game history in the case where the game is played for a predetermined period is intended. It is assumed that the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to erase the setting automatically. On the other hand, by executing the repeated change monitoring process, when such an action is performed, a notification corresponding to it is executed. As a result, it is possible to notify the administrator or the like that the new setting of the pachinko machine 10 has been repeatedly performed in a short period of time.

Notification that the new setting of the setting state of the pachinko machine 10 has been repeated in a short period of time is performed by the first to third notification display devices 69a to 69c. As a result, by using the first to third notification display devices 69a to 69c for notifying the management result of the game history, the new setting of the pachinko machine 10 is repeatedly performed in a short period of time. Notification can be made.

In a situation where it is necessary to notify that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time, the first to third notification display devices 69a to 69c continue to display the display contents of repeated changes. , the management result of the game history in the normal time is not notified by the first to third notification display devices 69a to 69c. This makes it possible to emphasize the notification that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time.

In addition, when the number of game rounds executed since the setting state of the pachinko machine 10 was newly set is within the reference number of times, and the event in which the new setting is performed continues exceeding the notification reference value. However, it is not limited to this, and the total discharge of the game balls discharged from the game area PA after the new setting of the setting state of the pachinko machine 10 is performed. In a situation where the number is within the reference number, if the event in which the new setting is performed continues exceeding the notification reference value, the corresponding notification may be performed. In addition, after the new setting of the setting state of the pachinko machine 10 is performed, a predetermined ball entry portion (for example, the out port 24a, the general prize winning port 31, the first operation port 33 and the second operation port 34 or a predetermined Combination) In a situation where the total number of discharged game balls that entered the ball is within the reference number, if the event in which the new setting is performed continues exceeding the notification reference value, the corresponding notification is executed. good. In addition, when the total number of pieces of history information newly stored in the history memory 117 after the setting state of the pachinko machine 10 is newly set is within the reference number, the event of the new setting being made is reported. A configuration may be adopted in which, when the reference value is continuously exceeded, the notification corresponding to it is executed.

Further, when the new setting of the setting state of the pachinko machine 10 is executed exceeding the notification reference value within the monitoring reference period (for example, 600 seconds), the corresponding notification may be performed.

In addition, when the number of game rounds executed after the setting state of the pachinko machine 10 is newly set is within the reference number of times, and the event in which the new setting is performed continues exceeding the notification reference value. However, the set value is changed in a situation where the number of game rounds executed after the setting state of the pachinko machine 10 is newly set is within the reference number of rounds. A configuration may be adopted in which, when events continue to exceed the notification reference value, the corresponding notification is executed.

In addition, when the number of game rounds executed after the setting state of the pachinko machine 10 is newly set is within the reference number of times, and the event in which the new setting is performed continues exceeding the notification reference value. However, the new setting is triggered in a situation where the number of game times executed after the new setting of the setting state of the pachinko machine 10 is performed is within the reference number of times. It is also possible to adopt a configuration in which a corresponding notification is executed when events for which various parameters are calculated continue exceeding the notification reference value.

In addition, when the number of game rounds executed after the setting state of the pachinko machine 10 is newly set is within the reference number of times, and the event in which the new setting is performed continues exceeding the notification reference value. However, in addition to or instead of this, the progress of the game may be restricted for a predetermined period (for example, one hour).

<Fourth Embodiment>
This embodiment differs from the third embodiment in that the main CPU 63 executes the repeated change monitoring process. The configuration that is different from the third embodiment will be described below. Note that the description of the same configuration as that of the third embodiment is basically omitted.

FIG. 37 is a flow chart showing a repeated change monitoring process executed by the main CPU 63. As shown in FIG. Note that the repeated change monitoring process is executed when the set value update process (step S118) is executed in the main process (FIG. 9). That is, when the setting state of the pachinko machine 10 is newly set, the repeated change monitoring process is executed. However, the present invention is not limited to this, and a configuration may be adopted in which the change monitoring process is repeatedly executed when the set value is changed.

First, it is determined whether or not the number of times the game has been executed since the setting state of the pachinko machine 10 was set last time is within the reference number of times (specifically, 100 times) (step S2001). The main side RAM 65 is provided with a game number counter for measuring the number of times the game is executed after the setting state of the pachinko machine 10 is newly set, and the main side CPU 63 detects when the game is newly executed. The value of the number-of-games counter is incremented by 1 each time the game is played. The number-of-games counter is excluded from being cleared to "0" even when the clearing process (steps S105 and S117) of the main RAM 65 is executed.

When an affirmative determination is made in step S2001, 1 is added to the value of the repetition change counter provided in the main RAM 65 (step S2002). The repetitive change counter is excluded from being cleared to "0" even when the clearing process (steps S105 and S117) of the main RAM 65 is executed.

Thereafter, it is determined whether or not the value of the repetitive change counter after adding 1 exceeds the notification reference value of "5" (step S2003). The notification reference value corresponds to the number of the first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171 . Therefore, in step S2003, the number of times the new setting of the setting state of the pachinko machine 10 has been repeated without intervening execution of game times exceeding the reference number of times exceeds the number of the first to fifth separate storage areas 172 to 176. It is determined whether or not the threshold is exceeded.

If an affirmative determination is made in step S2003, the repeat change flag provided in the main RAM 65 is set to "1" (step S2004). The repetitive change flag is a flag for the main CPU 63 to specify that the repetitive change should be notified. The repetitive change flag is excluded from being cleared to "0" even when the clearing process (steps S105 and S117) of the main RAM 65 is executed.

If a negative determination is made in step S2001, the value of the repetition change counter in the main RAM 65 is cleared to "0" (step S2005). Thereafter, on condition that the repeat change flag of the main RAM 65 is set to "1" (step S2006: YES), the repeat change flag is cleared to "0" (step S2007).

In the repetitive change monitoring process, if the repetitive change flag in the main RAM 65 is set to "1" (step S2008: YES), a repetitive change notification command is sent to the sound emission control device 81 (step S2009). When the sound emission control device 81 receives the repetitive change notification command, the pattern display device 41, the display light emitting unit 53, and the speaker unit 54 make the repetitive change notification. Notification of the repeated change is continued until the supply of operating power to the sound emission control device 81 is stopped.

According to the above configuration, it is possible to notify that the setting state of the pachinko machine 10 has been repeatedly set in a short period of time based on the control by the main side CPU 63 . In addition, since the notification is performed by the symbol display device 41, the display light emitting unit 53 and the speaker unit 54, the setting state of the pachinko machine 10 can be changed without opening the gaming machine body 12 forward with respect to the outer frame 11. It is possible to make the administrator recognize that new settings have been repeatedly made in a short period of time.

In addition to or instead of the configuration in which the notification command for repeated change is transmitted from the main side CPU 63 to the sound emission control device 81 when the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, A configuration in which corresponding external output is performed may be employed.

Further, the main CPU 63 may execute the repeated change monitoring process in this embodiment, and the management side CPU 112 may execute the repeated change monitoring process in the third embodiment. As a result, it becomes possible to strictly monitor whether or not the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time.

<Fifth Embodiment>
This embodiment differs from the third embodiment in the processing configuration of the setting update recognition processing in the management side CPU 112 . The configuration that is different from the third embodiment will be described below. Note that the description of the same configuration as that of the third embodiment is basically omitted.

FIG. 38 is a flow chart showing processing for setting update recognition in this embodiment executed by the management side CPU 112 .

When the set value update signal input to the fifteenth buffer 122o of the input port 121 switches from LOW level to HI level (step S2101: YES), the value of the set value grasping counter of the management side RAM 114 is set to "1". Set (step S2102). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means "setting 6".

After that, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level again (step S2103). If an affirmative determination is made in step S2103, 1 is added to the value of the set value grasping counter of the management side RAM 114 (step S2104). As a result, the setting value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

If a negative determination is made in step S2103 or if the process of step S2104 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121, , determines whether or not a setting value identification end command has been received from the main CPU 63 (step S2105). If a negative determination is made in step S2105, the process returns to step S2103.

If an affirmative determination is made in step S2105, it is determined whether or not a predetermined number or more of predetermined history information exist in the history memory 117 (step S2106). Specifically, the setting of the pachinko machine 10 is performed by counting the number of the history information storage areas 125 in which the correspondence information indicating the start of the game round is stored in the history area 124 of the history memory 117. The number of games played since the state was set last time is grasped, and it is further determined whether or not the grasped number of games exceeds a reference number (specifically, 100 times). However, it is not limited to this, and the number of history information storage areas 125 storing correspondence information indicating that game balls have been ejected from the game area PA is the reference number (specifically, 1000 pieces). may be determined in step S2106 as to whether or not the value is exceeded. Correspondence information indicating that a game ball has entered a predetermined ball entry portion (for example, one of the out port 24a, the general winning port 31, the first operation port 33 and the second operation port 34, or a predetermined combination) It may be determined in step S2106 whether or not the number of history information storage areas 125 in which is stored exceeds a reference number (specifically, 1000). Further, it may be determined in step S2106 whether or not the total number of pieces of history information stored in the history memory 117 exceeds the reference number (specifically, 1000 pieces).

In addition, when the number of game rounds executed after the setting state of the pachinko machine 10 is newly set is within the reference number of times, and the event in which the new setting is performed continues exceeding the notification reference value. However, it is not limited to this, and the total discharge of the game balls discharged from the game area PA after the new setting of the setting state of the pachinko machine 10 is performed. In a situation where the number is within the reference number, if the event in which the new setting is performed continues exceeding the notification reference value, the corresponding notification may be performed. In addition, after the new setting of the setting state of the pachinko machine 10 is performed, a predetermined ball entry portion (for example, the out port 24a, the general prize winning port 31, the first operation port 33 and the second operation port 34, or a predetermined Combination) In a situation where the total number of discharged game balls that entered the ball is within the reference number, if the event in which the new setting is performed continues exceeding the notification reference value, the corresponding notification is executed. good. In addition, in a situation where the total number of history information newly stored in the history memory 117 after the setting state of the pachinko machine 10 is newly set is within the reference number, the event of the new setting being performed is notified. A configuration may be adopted in which, when the reference value is continuously exceeded, the notification corresponding to it is executed.

When an affirmative determination is made in step S2106, various arithmetic processes are executed (step S2107). In the various arithmetic processing, the processing of steps S1402 to S1412 of the display output processing (FIG. 30) in the first embodiment is executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters and 41st to the 42nd parameter) are calculated.

After that, the various parameters calculated in step S2107 are stored in the current storage target area among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 (step S2108). A pointer information area is set in the separate storage memory 171 so that the management side CPU 112 can specify an area to be stored among the first to fifth separate storage areas 172 to 176 . The information in the pointer information area is changed so that when various parameters are stored in the area to be stored among the first to fifth separate storage areas 172 to 176, the area to be stored is changed to the next area. is updated to By executing the process of step S2108, various parameters at that point in time for the new setting of the setting state of the pachinko machine 10 are stored in the separate storage memory 171. FIG.

If a negative determination is made in step S2106, or if the process of step S2108 is executed, the history memory 117 is cleared to "0" (step S2109). That is, in this embodiment, not only when the history information is read by an external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set, the history memory 117 history information is erased.

Thereafter, the RTC information, which is date information and time information, is read from the RTC 115 (step S2110). Then, write processing to the history memory 117 is executed (step S2111). In the write process, the pointer information in the history area 124 to be written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S2110 is written in history information storage area 125 of history area 124 . Also, both the information for identifying the set value and the information of the value of the set value grasp counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting was performed, and the information of the setting value when the setting is performed. The combination is stored as history information.

After that, update processing of the target pointer is executed (step S2112). In the updating process, the numerical value information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the addition of 1 has exceeded the maximum value of the pointer information in the history area 124 . If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. When the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

According to the above configuration, when the setting state of the pachinko machine 10 is newly set, the history information stored in the history memory 117 is stored on the condition that a predetermined number or more of history information is stored in the history memory 117. Various parameters are calculated using the history information, and the various parameters are stored in the separate storage memory 171 . As a result, even if the new setting of the pachinko machine 10 is repeatedly performed in a short period of time, the separate storage memory 171 does not contain the information of the management result of the game history as the result of the actual game being played. It can be stored.

Note that the processing of step S2109 may be executed on condition that the processing of steps S2107 and S2108 are executed. In other words, the history information stored in history memory 117 is erased under the condition that a predetermined number or more of history information are stored in history memory 117 . This makes it possible to prevent the history information in the history memory 117 from being erased even if new settings of the pachinko machine 10 are repeatedly made in a short period of time.

<Sixth embodiment>
This embodiment differs from the first embodiment in the configuration of the history memory 117 . The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 39 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

The history memory 117 is provided with a total area 141 , a first status area 142 , a second status area 143 and a third status area 144 . 1st to 14th counters 141a to 141n, 142a to 142n, 143a to 143n and 144a to 144n are provided in each of these areas 141 to 144, respectively. Information on the number of times the output state of the first signal input to the first buffer 122a is changed from LOW level to HI level is stored in the first counters 141a to 144a of the areas 141 to 144, respectively. The second counters 141b to 144b of the areas 141 to 144 store information on the number of times the output state of the second signal input to the second buffer 122b is changed from LOW level to HI level. The third counters 141c to 144c of the areas 141 to 144 store information on the number of times the output state of the third signal input to the third buffer 122c is changed from LOW level to HI level. The fourth counters 141d to 144d of the areas 141 to 144 store information on the number of times the output state of the fourth signal input to the fourth buffer 122d is changed from LOW level to HI level. The fifth counters 141e to 144e of the areas 141 to 144 store information on the number of times the output state of the fifth signal input to the fifth buffer 122e is changed from LOW level to HI level. The sixth counters 141f to 144f of the areas 141 to 144 store information on the number of times the output state of the sixth signal input to the sixth buffer 122f is changed from LOW level to HI level. The seventh counters 141g to 144g of the areas 141 to 144 store information on the number of times the output state of the seventh signal input to the seventh buffer 122g is changed from LOW level to HI level. The eighth counters 141h to 144h of the areas 141 to 144 store information on the number of times the output state of the eighth signal input to the eighth buffer 122h is changed from LOW level to HI level. The ninth counters 141i to 144i of the areas 141 to 144 store information on the number of times the output state of the ninth signal input to the ninth buffer 122i is changed from LOW level to HI level. The tenth counters 141j to 144j of the areas 141 to 144 store information on the number of times the output state of the tenth signal input to the tenth buffer 122j has changed from the LOW level to the HI level. The eleventh counters 141k to 144k of the areas 141 to 144 store information on the number of times the output state of the eleventh signal input to the eleventh buffer 122k is changed from LOW level to HI level. The twelfth counters 141l to 144l of the areas 141 to 144 store information on the number of times the output state of the twelfth signal input to the twelfth buffer 122l is changed from LOW level to HI level. The thirteenth counters 141m to 144m of the areas 141 to 144 store information on the number of times the output state of the thirteenth signal input to the thirteenth buffer 122m is changed from LOW level to HI level. The 14th counters 141n to 144n of the areas 141 to 144 store information on the number of times the output state of the 14th signal input to the 14th buffer 122n is changed from LOW level to HI level.

FIG. 40 is a flow chart showing history setting processing in this embodiment executed by the management side CPU 112 .

First, the number of buffers to be confirmed by the management CPU 112 among the first to fourteenth buffers 122a to 122n is set in the confirmation target counter of the management RAM 114 (step S2201). Specifically, among the first to fourteenth correspondence areas 123a to 123n in the correspondence memory 116, the number of correspondence areas in which information other than information indicating blank is stored is specified, and the number of the correspondence areas is specified. The number of information is set in the check target counter. In the pachinko machine 10, information other than information indicating blank is stored in the first to eleventh correspondence areas 123a to 123k, so in step S2201, "11" is set in the check target counter.

After that, it is determined whether or not the buffers 122a to 122n corresponding to the current check target counters are buffers to which status information signals are input (step S2202). Specifically, information indicating the opening/closing execution mode, information indicating the high-frequency support mode, and It is determined whether or not any of the information indicating that it is the front door frame 14 is stored.

If an affirmative determination is made in step S2202, a state information setting process is executed (step S2203). In the setting process, when the output state of the eighth signal indicating whether or not the opening/closing execution mode is in progress is switched from the LOW level to the HI level, the information of the first state indicating that the opening/closing execution mode is in progress is sent to the management side. When the output state of the eighth signal switches from HI level to LOW level, the information of the first state is erased from the management side RAM 114 . Further, when the output state of the ninth signal indicating whether the high-frequency support mode is in progress is switched from the LOW level to the HI level, the second state information indicating that the high-frequency support mode is in progress is stored in the management side RAM 111 . , and when the output state of the ninth signal switches from HI level to LOW level, the information of the second state is erased from the management side RAM 114 . Further, when the output state of the tenth signal indicating whether or not the front door frame 14 is open is switched from the LOW level to the HI level, third state information indicating that the front door frame 14 is being opened. is stored in the management-side RAM 114, and the third state information is erased from the management-side RAM 114 when the output state of the tenth signal switches from the HI level to the LOW level.

If a negative determination is made in step S2202, or if the process of step S2203 is executed, the numerical information stored in the buffer corresponding to the current check target counter value among the first to fourteenth buffers 122a to 122n is , is changed from "0" to "1", thereby determining whether the output state of the input signal from the main CPU 63 to the buffer has been switched from LOW level to HI level ( step S2204). If the numerical information stored in the eighth buffer 122h is changed from "0" to "1" in a situation where the current value of the check target counter is the value corresponding to the eighth buffer 122h, the process proceeds to step S2203. The information of the first state is stored in management-side RAM 114, and an affirmative determination is made in step S2204. Further, when the numerical information stored in the ninth buffer 122i is changed from "0" to "1" in a situation where the current value of the check target counter is the value corresponding to the ninth buffer 122i, the process proceeds to step S2203. The information of the second state is stored in management-side RAM 114, and an affirmative determination is made in step S2204. Further, when the numerical value information stored in the tenth buffer 122j is changed from "0" to "1" in a situation where the current value of the check target counter is the value corresponding to the tenth buffer 122j, the process proceeds to step S2203. The third state information is stored in management RAM 114, and an affirmative determination is made in step S2204.

When an affirmative determination is made in step S2204, addition processing of the corresponding total counter is executed (step S2205). In the addition processing, one is added to the counter value corresponding to the current check target counter value among the first to fourteenth total counters 141 a to 141 n in the total area 141 of the history memory 117 . For example, if the value of the counter to be confirmed is "11", the eleventh counter 141k for totalization is subject to addition, and if the value of the counter to be confirmed is "5", the fifth counter 141e for totalization is subject to addition. If the value of the check target counter is "1", the first total counter 141a is subject to addition.

After that, by referring to the state information of the management side RAM 114, it is determined whether or not it is in the first state, that is, whether or not it is in the opening/closing execution mode (step S2206). If it is in the first state (step S2206: YES), the corresponding counter for the first state is added (step S2207). In the addition processing, one is added to the value of the counter corresponding to the value of the current check target counter among the first to fourteenth counters 142a to 142n for the first state in the first state area 142 of the history memory 117. . For example, if the value of the check target counter is "11", the eleventh counter 142k for the first state is subject to addition, and if the value of the check target counter is "5", the fifth counter 142e for the first state is If the value of the counter to be confirmed is "1", the first counter 142a for the first state is to be added.

Thereafter, by referring to the state information in the management RAM 114, it is determined whether or not it is in the second state, that is, whether or not it is in the high frequency support mode (step S2208). If it is in the second state (step S2208: YES), the corresponding counter for the second state is added (step S2209). In the addition processing, one is added to the value of the counter corresponding to the value of the current check target counter among the first to fourteenth counters 143a to 143n for the second state in the second state area 143 of the history memory 117. . For example, if the value of the check target counter is "11", the eleventh counter 143k for the second state is subject to addition, and if the value of the check target counter is "5", the fifth counter 143e for the second state is If the value of the confirmation target counter is "1", the first counter 143a for the second state becomes the addition target.

After that, by referring to the state information of the management side RAM 114, it is determined whether or not the state is the third state, that is, whether or not the front door frame 14 is being opened (step S2210). If it is in the third state (step S2210: YES), the corresponding counter for the third state is added (step S2211). In the addition processing, one is added to the value of the counter corresponding to the value of the current check target counter among the first to fourteenth counters 144a to 144n for the third state in the area 144 for the third state of the history memory 117. . For example, if the value of the check target counter is "11", the eleventh counter 144k for the third state is subject to addition, and if the value of the check target counter is "5", the fifth counter 144e for the third state is If the value of the confirmation target counter is "1", the first counter 144a for the third state becomes the addition target.

When a negative determination is made in step S2204, when a negative determination is made in step S2210, or when the process of step S2211 is executed, the value of the check target counter in the management RAM 114 is subtracted by 1 (step S2212). Then, it is determined whether or not the value of the check target counter after subtracting 1 is "0" (step S2213). If the value of the confirmation object counter is 1 or more (step S2213: NO), the process after step S2202 is executed for the confirmation object corresponding to the new value of the confirmation object counter.

By executing the history setting process as described above, the number of game balls entering the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33 and the second operating port 34, and the execution of opening and closing The number of occurrences of modes, the number of occurrences of high-frequency support mode, and the number of occurrences of game rounds are stored as number-of-times information instead of being stored as history information as in the first embodiment. This makes it possible to reduce the storage capacity required in the history memory 117 compared to a configuration in which each piece of history information is stored individually.

Since the information is stored as the number of times information instead of the history information, there is no need to perform the process of deriving the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

Next, the setting update recognition processing according to the present embodiment, which is executed by the management CPU 112, will be described with reference to the flowchart of FIG.

When the set value update signal input to the fifteenth buffer 122o of the input port 121 switches from LOW level to HI level (step S2301: YES), the value of the set value grasping counter of the management side RAM 114 is set to "1". Set (step S2302). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means "setting 6".

After that, it is determined whether or not the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level again (step S2303). If an affirmative determination is made in step S2303, 1 is added to the value of the setting value grasping counter of the management side RAM 114 (step S2304). As a result, the setting value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

If a negative determination is made in step S2303, or if the process of step S2304 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121, , determines whether or not a setting value identification end command has been received from the main CPU 63 (step S2305). If a negative determination is made in step S2305, the process returns to step S2303.

If an affirmative determination is made in step S2305, the total area 141 in the history memory 117 is opened and closed in the total area 141 in the history memory 117. An eighth total counter 141h for counting the number of mode occurrences and a ninth total counter 141i for counting the number of occurrences of the high-frequency support mode in the total area 141 in the history memory 117 "0" is cleared (steps S2306 to S2308). As a result, each number of times information of the number of game times executed, the number of times of occurrence of the opening/closing execution mode, and the number of times of occurrence of the high-frequency support mode is cleared to "0" when the setting state of the pachinko machine 10 is newly set. be done. Therefore, the 31st parameter indicating the number of occurrences of the opening/closing execution mode per unit game time, the 41st parameter indicating the number of times the high frequency support mode occurred per unit game time, and the high frequency support mode for the number of times the opening/closing execution mode occurred. The calculation result of the 42nd parameter indicating the ratio of the number of occurrences corresponds to the game contents after the new setting of the setting state of the pachinko machine 10 is performed. In the configuration in which the winning probability of the jackpot result is changed when the setting value of the pachinko machine 10 is changed, the calculation results of the 31st parameter, the 41st parameter and the 42nd parameter are changed to the setting state of the pachinko machine 10 as described above. The calculation results of the 31st parameter, the 41st parameter and the 42nd parameter are appropriate based on the current set values by making the settings correspond to the game contents after the new settings are made. It is possible to determine whether

On the other hand, even if the setting state of the pachinko machine 10 is newly set, the counters other than the eighth total counter 141h, the ninth total counter 141i and the eleventh counter 141k in the history memory 117 are " 0" not cleared. As a result, management of the number of game balls entering each history target ball entering portion or the frequency of entering the ball is based on the long-term game history without being affected by the new setting of the setting state of the pachinko machine 10.例文帳に追加becomes possible.

According to the above configuration, the number of game balls entering the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33 and the second operating port 34, the number of times the opening and closing execution mode occurs, and the high frequency support The number of occurrences of modes and the number of occurrences of game rounds are not stored as history information as in the first embodiment, but are stored as number information. This makes it possible to reduce the storage capacity required in the history memory 117 compared to a configuration in which each piece of history information is stored individually.

Further, since the information is stored not as the history information but as the number of times information, there is no need to execute the process of deriving the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

The number of times information of the number of game times executed, the number of occurrences of the opening/closing execution mode, and the number of times of occurrence of the high-frequency support mode is cleared to "0" when the setting state of the pachinko machine 10 is newly set. Therefore, the 31st parameter indicating the number of occurrences of the opening/closing execution mode per unit game, the 41st parameter indicating the number of times the high frequency support mode occurs per unit of the game, and the high frequency support mode for the number of times the opening/closing execution mode occurs. The calculation result of the 42nd parameter indicating the ratio of the number of occurrences corresponds to the game content after the new setting of the setting state of the pachinko machine 10 is performed. In the configuration in which the winning probability of the jackpot result is changed when the setting value of the pachinko machine 10 is changed, the calculation results of the 31st parameter, the 41st parameter and the 42nd parameter are changed to the setting state of the pachinko machine 10 as described above. The calculation results of the 31st parameter, the 41st parameter and the 42nd parameter are appropriate based on the current setting value by making it correspond to the game content after the new setting is made. It is possible to determine whether

On the other hand, even if the setting state of the pachinko machine 10 is newly set, the counters other than the eighth total counter 141h, the ninth total counter 141i and the eleventh counter 141k in the history memory 117 are " 0" not cleared. As a result, management of the number of game balls entering each history target ball entering portion or the frequency of entering the ball is based on the long-term game history without being affected by the new setting of the setting state of the pachinko machine 10.例文帳に追加becomes possible.

Note that the configuration of the history memory 117 as in this embodiment may be applied to the first to fifth embodiments and the embodiments described after this embodiment. For example, when applied to the first embodiment, even if the setting state of the pachinko machine 10 is newly set, the information in the history memory 117 is maintained as it is. Also, when applied to the third embodiment, when the setting state of the pachinko machine 10 is newly set, the entire history memory 117 is cleared to "0".

In addition, when the setting value of the pachinko machine 10 is changed, the processing of steps S2306 to S2308 may be executed in the setting update recognition processing (FIG. 41). As a result, even if the setting state of the pachinko machine 10 is newly set, if the set value is not changed before and after that, the information on the number of execution times of the game round, the information on the number of occurrence times of the opening/closing execution mode, and the high-frequency support are provided. When the setting value of the pachinko machine 10 is changed without clearing the information on the number of occurrences of the mode to "0", the information on the number of times the game is performed, the information on the number of times the opening/closing execution mode occurs, and the high-frequency support mode. can be cleared to "0".

In the setting update recognition process (FIG. 41), various parameters are calculated using the counters 141 to 144 of the history memory 117 before the processes of steps S2306 to S2308 are executed. Various parameters may be stored in the calculation result memory 131 .

<Seventh Embodiment>
This embodiment differs from the first embodiment in the configuration of the history memory 117 . The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 42 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

As the history memory 117, history memories 181 to 186 corresponding to the setting states of the pachinko machine 10, "setting 1" to "setting 6," are provided. Specifically, a history memory 181 for setting 1 is provided in correspondence with "setting 1", a history memory 182 for setting 2 is provided in correspondence with "setting 2", and a history memory 182 for setting 2 is provided in correspondence with "setting 2". A history memory 183 for setting 3 is provided in association with setting 3, a history memory 184 for setting 4 is provided in correspondence with setting 4, and a history memory 184 for setting 4 is provided in correspondence with setting 5. A history memory 185 for setting 5 is provided for setting 5, and a history memory 186 for setting 6 is provided corresponding to "setting 6".

Each of history memories 181 to 186 for settings 1 to 6 is provided with a combination of history area 124 and pointer area 126 of history memory 117 in the first embodiment. Thereby, it becomes possible to store the history information corresponding to each of the setting states of the pachinko machine 10 of "setting 1" to "setting 6". In this case, when the setting state of the pachinko machine 10 is newly set, the history memories 181 to 186 corresponding to the setting values for which the new setting is performed are stored as history information. When the setting state of the pachinko machine 10 is newly set, the history information can be stored by distinguishing it for each set value without erasing the history information. In addition, since various parameters are calculated using history information corresponding to the currently set pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each setting value.

The total area 141, the first state area 142, the second state area 143, and the third state area 144 in the sixth embodiment are stored in the history memories 181 to 186 for the settings 1 to 6, respectively. It is good also as a structure with which the combination of is set.

Next, the setting update recognition processing according to the present embodiment, which is executed by the management CPU 112, will be described with reference to the flowchart of FIG.

When the setting value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level (step S2401: YES), the value of the setting value grasping counter provided in the memory 131 for calculation result is set to "1" (step S2402). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means "setting 6". Further, in this embodiment, since the operation result memory 131, which is a memory that does not require an external power supply for storing data, is provided with a setting value grasping counter, even if the supply of operating power to the management IC 66 is stopped, Also, the value stored in the set value grasping counter is stored.

Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level again (step S2403). If an affirmative determination is made in step S2403, 1 is added to the value of the set value grasping counter in the calculation result memory 131 (step S2404). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

If a negative determination is made in step S2403 or if the process of step S2404 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121, , determines whether or not a set value identification end command has been received from the main CPU 63 (step S2405). If a negative determination is made in step S2405, the process returns to step S2403.

If an affirmative determination is made in step S2405, the history memories 181 to 186 corresponding to the value of the set value grasping counter in the calculation result memory 131 are set as objects to be stored in history information and to be referenced when calculating various parameters ( step S2406). Specifically, if the value of the setting value grasping counter is "1", it means that "setting 1" has been set. Set as a reference target during calculation. Also, if the value of the setting value grasping counter is "2", it means that "setting 2" has been set. Set as a reference target. Also, if the value of the set value grasping counter is "3", it means that "setting 3" has been set. Set as a reference target. Also, if the value of the set value grasping counter is "4", it means that "setting 4" has been set. Set as a reference target. Also, if the value of the setting value grasping counter is "5", it means that "setting 5" has been set. Set as a reference target. Also, if the value of the setting value grasping counter is "6", it means that "setting 6" has been set. Set as a reference target.

Thereafter, the RTC information, which is date information and time information, is read from the RTC 115 (step S2407). Then, write processing to the history memory 117 is executed (step S2408). In the write process, the history memories 181 to 186 set as the history information storage targets in step S2406 are selected from among the history memories 181 to 186 for settings 1 to 6. FIG. Then, by referring to the pointer area 126 in the history memories 181 to 186 that are the storage objects, the pointer information of the history area 124 that is the current writing object is specified, and the pointer information that is the writing object is specified. The RTC information read in step S2407 is written in the history information storage area 125 of the history area 124 corresponding to the pointer information that is present. Also, information for identifying the set value is written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the combination of the information indicating that the setting state of the pachinko machine 10 is newly set and the RTC information corresponding to the date and time when the setting is performed is stored as the history information.

After that, update processing of the target pointer is executed (step S2409). In the updating process, the history memories 181 to 186 set as the storage target of the history information in step S2406 are selected from among the history memories 181 to 186 for the settings 1 to 6, and the history memories 181 to 186 are stored. Numerical information stored in the pointer area 126 is read and 1 is added. It is determined whether or not the pointer information after the addition of 1 has exceeded the maximum value of the pointer information in the history area 124 . If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. When the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

According to the above configuration, history memories 181 to 186 for settings 1 to 6 are provided as history memory 117 so as to correspond to "setting 1" to "setting 6," respectively. As a result, it is possible to store the game history corresponding to each of the setting states of the pachinko machine 10 of "setting 1" to "setting 6". In this case, when the setting state of the pachinko machine 10 is newly set, the history memories 181 to 186 corresponding to the setting values for which the new setting is performed are stored as history information. When the setting state of the pachinko machine 10 is newly set, the history information can be stored by distinguishing it for each set value without erasing the history information. In addition, since various parameters are calculated using history information corresponding to the currently set pachinko machine 10, it is possible to appropriately derive various parameters corresponding to each setting value.

The history memory 117 is not limited to the configuration in which the six memories 181 to 186 for the settings 1 to 6 are provided. an area corresponding to the history memory 181 for setting 2, an area corresponding to the history memory 182 for setting 2, an area corresponding to the history memory 183 for setting 3, and an area corresponding to the history memory 184 for setting 4 An area corresponding to the history memory 185 for the setting 5 and an area corresponding to the history memory 186 for the setting 6 may be set.

<Eighth embodiment>
This embodiment differs from the first embodiment in the configuration of the history memory 117 . The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 44 is an explanatory diagram for explaining the configuration of the history memory 117 in this embodiment.

As the history memory 117, a first history memory 191 and a second history memory 192 are provided. Each of the first history memory 191 and the second history memory 192 is provided with a combination of the history area 124 and the pointer area 126 of the history memory 117 in the first embodiment. In this case, in a situation where one of the first history memory 191 and the second history memory 192 is used to store the history information, the setting state of the pachinko machine 10 is newly set. is performed, the history information in one of the history memories 191 and 192 is left without being erased until a predetermined number or more of history information are stored in the other history memory 191 and 192 thereafter. In addition, history information can be newly stored in both history memories 191 and 192 until a predetermined number or more of history information are stored in the other history memory 191 and 192. Become.

Next, the setting update recognition processing according to the present embodiment, which is executed by the management CPU 112, will be described with reference to the flowchart of FIG.

When the setting value update signal input to the fifteenth buffer 122o of the input port 121 switches from LOW level to HI level (step S2501: YES), the value of the setting value grasping counter provided in the management side RAM 114 is set to " 1” (step S2502). The setting value grasping counter is a counter for specifying the setting value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the setting value grasping counter is "1", it means "setting 1", If the value of the setting value grasping counter is "6", it means "setting 6".

Thereafter, it is determined whether or not the set value update signal input to the fifteenth buffer 122o of the input port 121 has switched from LOW level to HI level again (step S2503). If an affirmative determination is made in step S2503, 1 is added to the value of the setting value grasping counter of the management side RAM 114 (step S2504). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

If a negative determination is made in step S2503, or if the process of step S2504 is executed, based on the input states of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121, , determines whether or not a setting value identification end command has been received from the main CPU 63 (step S2505). If a negative determination is made in step S2505, the process returns to step S2503.

If an affirmative determination is made in step S2505, the setting change occurrence flag provided in the calculation result memory 131 is set to "1" (step S2506). The setting change occurrence flag has been set as a history information storage target in the first history memory 191 and the second history memory 192 after the setting state of the pachinko machine 10 is newly set. This is a flag for the management side CPU 112 to specify whether or not the history information is to be stored not only in the history memories 191 and 192 but also in the other history memories 191 and 192 . In addition, since the operation result memory 131, which is a memory that does not require power supply from the outside for storing, is provided with a setting change occurrence flag, even if the supply of operating power to the management IC 66 is stopped, the setting change will occur. The value stored in the flag is stored.

Thereafter, the RTC information, which is date information and time information, is read from the RTC 115 (step S2507). Then, write processing to each history memory 191, 192 is executed (step S2508). In the writing process, first, the pointer information in the history area 124 to be currently written is specified by referring to the pointer area 126 of the first history memory 191, and the pointer information to be written is specified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to . Also, both the information for identifying the set value and the information of the value of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting was made, and the information of the setting value when the setting was made. The combination is stored in the first history memory 191 as history information. In the writing process, the pointer information of the history area 124 to be written is specified by referring to the pointer area 126 of the second history memory 192, and the pointer information to be written is specified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to the information. Also, both the information for identifying the set value and the information of the value of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 has been newly set, the RTC information corresponding to the date and time when the setting was made, and the information of the setting value when the setting was made. The combination is stored in the second history memory 192 as history information.

Thereafter, update processing for each target pointer is executed (step S2509). In the updating process, first, numerical information stored in the pointer area 126 of the first history memory 191 is read and 1 is added. It is determined whether or not the pointer information after the addition of 1 has exceeded the maximum value of the pointer information in the history area 124 . If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. When the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information. Further, in the updating process, the numerical value information stored in the pointer area 126 of the second history memory 192 is read out and 1 is added. It is determined whether or not the pointer information after the addition of 1 has exceeded the maximum value of the pointer information in the history area 124 . If the maximum value is not exceeded, the pointer information after the addition of 1 is overwritten in the pointer area 126 as new pointer information to be written. When the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

Next, the history setting process in this embodiment executed by the management CPU 112 will be described with reference to the flowchart of FIG.

If the setting change occurrence flag of the calculation result memory 131 is not set to "1" (step S2601: NO), the side of the first history memory 191 and the second history memory 192 that is to be stored This means that only history information should be stored. In this case, first, the history memories 191 and 192 that are currently stored are grasped (step S2602). The calculation result memory 131 is provided with a storage target flag, and when the value of the storage target flag is "0", the first history memory 191 becomes the storage target, and the value of the storage target flag is "1". , the second history memory 192 is the object of storage. Note that since the storage target flag is provided in the calculation result memory 131, which is a memory that does not require power supply from the outside for storing data, even if the supply of operating power to the management IC 66 is stopped, the storage target flag remains unchanged. The value of is stored.

Thereafter, history setting execution processing is executed for the history memories 191 and 192 to be stored (step S2603). Specifically, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed for one of the history memories 191 and 192 to be stored. As a result, the history information is stored in one of the history memories 191 and 192, which is a storage target.

On the other hand, if the setting change occurrence flag of the calculation result memory 131 is set to "1" (step S2601: YES), the first history memory 191 and the second history memory 192 are to be stored. This means that history information should be stored not only on one side but also on the other side. In this case, history setting execution processing is executed for both history memories 191 and 192 (step S2604). Specifically, first, the first history memory 191 is subjected to steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment. As a result, history information is stored in the first history memory 191 . After that, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed for the second history memory 192. FIG. As a result, history information is stored in the second history memory 192 .

When the process of step S2603 or the process of step S2604 is executed, it is determined whether or not the setting change occurrence flag of the calculation result memory 131 is set to "1" (step S2605). If an affirmative determination is made in step S2605, it is determined whether or not a predetermined number or more of ball ejection histories exist in the non-stored history memories 191 and 192 (step S2606). Specifically, when the value of the storage target flag of the calculation result memory 131 is "0", the first history memory 191 is the storage target. It is determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that a game ball has been ejected from is stored. Further, when the value of the storage target flag of the calculation result memory 131 is "1", the second history memory 192 is the storage target. It is determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that the has been discharged is stored. It should be noted that it is not determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that the game ball has been discharged from the game area PA is stored. may be determined whether or not a predetermined number (specifically, "100") or more of history information indicating is stored.

If an affirmative determination is made in step S2606, storage target change processing is executed (step S2607). In the storage target change processing, the value of the storage target flag of the calculation result memory 131 is set to a value between two values different from the current value, thereby changing the first history memory 191 and the second history memory 192. Among them, the side to be memorized is changed. Specifically, if the value of the storage target flag is "0", the storage target is changed from the first history memory 191 to the second history memory 192 by setting the storage target flag to "1". Also, if the value of the storage target flag is "1", the storage target is changed from the second history memory 192 to the first history memory 191 by clearing the storage target flag to "0". As a result, the history memories 191 and 192 in which only the history information of the games executed after the setting state of the pachinko machine 10 is newly set are set as storage targets. Various parameters are calculated using the history information of the history memories 191 and 192, which are newly stored, so that the setting state of the pachinko machine 10 is newly set and then executed. It is possible to derive various parameters from the game.

After that, clear processing is executed for the side of the first history memory 191 and the second history memory 192 that has been the object of storage until then (step S2608). Specifically, if the value of the storage target flag is "0", the second history memory 192 is cleared to "0", and if the value of the storage target flag is "1", the first history memory 191 is cleared to " 0” clear. Thereafter, the setting change occurrence flag in the calculation result memory 131 is cleared to "0" (step S2609).

Next, the display output processing in this embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG.

If it is the calculation timing (step S2701: YES), the side of the first history memory 191 and the second history memory 192 to be stored is grasped (step S2702). Specifically, if the value of the storage target flag of the calculation result memory 131 is "0", the first history memory 191 is grasped as the storage target, and if the value of the storage target flag is "1", the second The history memory 192 is grasped as a storage object. Thereafter, steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed using the history information stored in the history memories 191 and 192 to be stored as grasped in step S2702. By this, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, 41st to 42nd parameters) are calculated, and the calculated various parameters are calculated. It is stored in the result memory 131 (step S2703). In this case, the history information is stored in both the first history memory 191 and the second history memory 192 because the setting change occurrence flag of the calculation result memory 131 is set to "1". Even if there is, the various parameters are calculated using one of the history memories 191 and 192 that are storage objects.

If a negative determination is made in step S2701, or if the processing of step S2703 is executed, display processing is executed (step S2704). The processing contents of the display processing are the same as the display processing (FIG. 31) in the first embodiment.

According to the above configuration, the first history memory 191 and the second history memory 192 are provided as the history memory 117, and when the setting state of the pachinko machine 10 is newly set, While the history memories 191 and 192 that have been storage targets are stored as they are, the history information is also stored in the history memories 191 and 192 that are not storage targets. When a predetermined number or more of the history information corresponding to the discharge of the game ball from the game area PA is stored in the history memories 191 and 192 on the side not to be stored, the history information is not to be stored. The history memories 191 and 192 on the side are stored as they are, and the history memories 191 and 192 on the side that have been stored until then are cleared to "0". As a result, when the setting state of the pachinko machine 10 is newly set, various parameters can be calculated using only the history information of the game played with the newly set setting value. Become.

On the other hand, according to the above configuration, even if the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to prevent the calculation of various parameters from being performed appropriately, the history data to be stored Memories 191 and 192 remain unchanged. Thereby, even if new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, it is possible to appropriately derive the management result of the game history up to that point.

Note that the history memory 117 is not limited to the configuration in which two memories, the first history memory 191 and the second history memory 192, are provided. A first history area corresponding to the memory 191 and a second history area corresponding to the second history memory 192 may be set.

Also, a configuration in which only one history memory 117 is provided may be employed. In this case, when the total number of game balls ejected from the game area PA after the new setting of the pachinko machine 10 is set becomes equal to or greater than a predetermined number, the new setting of the pachinko machine 10 is performed. The history information prior to the timing at which the setting was made may be erased, and the history information after the timing at which the setting was made may be stored and held without being erased. As a result, at the timing when a predetermined number or more of history information is accumulated after the setting state of the pachinko machine 10 is newly set, the history before the timing when the setting state of the pachinko machine 10 is newly set. Information can be erased. Further, by storing the history information corresponding to the timing when the setting state of the pachinko machine 10 is newly set in the history memory 117, the setting state can be newly set in the history memory 117. It is possible to distinguish between the history information before the timing at which the is performed and the history information after the timing.

Also, the timing of erasing the history information is limited to the case where the total number of game balls discharged from the game area PA after the new setting of the setting state of the pachinko machine 10 has reached a predetermined number or more. Instead, it may be the case that the number of times the game has been played since the setting state of the pachinko machine 10 was newly set exceeds the predetermined number.

In addition, even if the setting state of the pachinko machine 10 is newly set, if the setting value is not changed before and after that, the change of the history memories 191 and 192 to be stored and the history information When the setting state of the pachinko machine 10 is newly set and the setting value is changed before and after that, the history memories 191 and 192 to be stored as described above are not erased. may be changed and the history information may be deleted.

<Ninth Embodiment>
In this embodiment, among the first to sixteenth buffers 122a to 122p of the input port 121 in the management side I/F 111, the type of the input signal is determined at the design stage of the management IC 66. It differs from the first embodiment. Also, the configuration of processing executed by the main CPU 63 to allow the management CPU 112 to specify the type of input signal is different from that of the first embodiment. The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 48 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I/F 111 in this embodiment.

The same types of signals as in the first embodiment are input to the first to seventh buffers 122a to 122g and the sixteenth buffer 122p. Specifically, a first signal corresponding to the detection result of the first winning hole detection sensor 42a is input to the first buffer 122a, and a second signal corresponding to the detection result of the second winning hole detection sensor 43a is inputted to the second buffer 122b. 2 signals are input, the third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the third buffer 122c, and the fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. A fifth signal corresponding to the detection result of the first working opening detection sensor 46a is inputted to the fifth buffer 122e, and a fifth signal corresponding to the detection result of the second working opening detection sensor 47a is inputted to the sixth buffer 122f. A sixth signal is input, a seventh signal corresponding to the detection result of the outlet detection sensor 48a is input to the seventh buffer 122g, and an output instruction signal is input to the sixteenth buffer 122p.

On the other hand, in the first embodiment, the signal corresponding to the open/close execution mode is input to the eighth buffer 122h as the eighth signal, the signal corresponding to the high-frequency support mode is input to the ninth buffer 122i as the ninth signal, A signal corresponding to the front door frame 14 is input to the tenth buffer 122j as the tenth signal, a signal corresponding to the start of the game cycle is input to the eleventh buffer 122k as the eleventh signal, and a set value update signal is input to the fifteenth buffer. 122o, but in this embodiment, the buffers to which these signals are input are different. Specifically, a signal corresponding to the start of a game cycle is input to the eleventh buffer 122k as a game cycle signal, a set value update signal is input to the twelfth buffer 122l, and a signal corresponding to the opening/closing execution mode is input to the opening/closing execution mode. A signal corresponding to the high frequency support mode is input to the 14th buffer 122n as a high frequency support mode signal, and a signal corresponding to the front door frame 14 is input to the 15th buffer 122m as a door open signal. input to the buffer 122o.

A game cycle signal is input to the 11th buffer 122k, a set value update signal is input to the 12th buffer 122l, an opening/closing execution mode signal is input to the 13th buffer 122m, and a 14th buffer 122n is input. It is determined at the design stage of the management IC 66 that the high frequency support mode signal is input, the door open signal is input to the fifteenth buffer 122o, and the output instruction signal is input to the sixteenth buffer 122p. Thus, without receiving instructions from the main CPU 63, the management CPU 112 can specify that the corresponding signals are input to the 11th to 16th buffers 122k to 122p. On the other hand, the types of signals to be input to the first to tenth buffers 122a to 122j are not determined at the design stage of the management IC 66, and the types of these signals are instructed by the main CPU 63. Thus, it is specified by the management side CPU 112 . The processing for specifying the type of this signal is executed when supply of operating power to the main CPU 63 and the management CPU 112 is started, as in the first embodiment.

FIG. 49 is a flow chart showing recognition processing of this embodiment executed by the main CPU 63 . Note that the recognition process is executed in step S111 in the main process (FIG. 9) as in the first embodiment.

First, "10", which is the number of the first to tenth buffers 122a to 122j whose signal types are to be recognized, is set in the recognition output counter of the main RAM 65 (step S2801). After that, an identification start signal output process is executed (step S2802). In the output process, the output states of the first signal input to the first buffer 122a, the open/close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n is set to HI level, the output of the identification start signal is started. The period during which these signals are maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of these signals.

After that, the output frequency information corresponding to the current value of the recognition output counter of the main RAM 65 is read from the main ROM 64, and the read output frequency information is set in the output frequency counter provided in the main RAM 65 ( step S2803). The number-of-outputs counter is a counter for specifying the number of times the type identification signal is output by the main CPU 63 .

In this embodiment, when the management side CPU 112 recognizes the types of signals input to the first buffer 122a to the tenth buffer 122j, the number of prize balls set for the ball-entering section corresponding to the types of signals is determined. Outputs the type identification signal the same number of times as The management side CPU 112 stores information corresponding to the number of times the type identification signal is received for each of the first buffer 122a to the tenth buffer 122j in the first to tenth correspondence areas 123a to 123j of the correspondence memory 116. . That is, the types of signals input to the first buffer 122a to the tenth buffer 122j are grasped as the number of prize balls set for the ball entry portion corresponding to the types of the signals.

In step S2803, when the value of the output counter for recognition is one of "10", "9" and "8", "10" corresponding to the number of winning balls of the general winning hole 31 is set in the output number counter. . Further, when the value of the output counter for recognition is "7", "15" corresponding to the number of prize balls of the special electric prize winning device 32 is set in the output number counter. Further, when the value of the output counter for recognition is "6", "1" corresponding to the number of prize balls of the first operation opening 33 is set in the output number counter. Further, when the value of the output counter for recognition is "5", "1" corresponding to the number of prize balls of the second operation opening 34 is set in the output number counter. Further, when the value of the output counter for recognition is "4", even if the game ball enters the out port 24a corresponding to the out port 24a, the game ball is not paid out. is set to "0". Also, if the value of the output counter for recognition is any one of "3" to "1", the corresponding ball-entering portion does not exist and is blank, so the output count counter is set to "0".

After that, output processing of a start opportunity signal is executed (step S2804). In the output process, by setting the output state of the first signal input to the first buffer 122a to HI level, the output of the start trigger signal is started. The period during which the first signal is maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the first signal.

Thereafter, on the condition that the value of the output counter of the main RAM 65 is not "0" (step S2805: YES), that is, on the condition that a value of 1 or more is set in the output counter in step S2803, The process advances to step S2806. In step S2806, output processing of a type identification signal is executed. In the output process, the type identification signal is started to be output by setting the output state of the second signal input to the second buffer 122b to HI level. The period during which the second signal is maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the second signal.

Thereafter, 1 is subtracted from the value of the output number counter of the main RAM 65 (step S2807), and it is determined whether or not the value of the output number counter after the 1 subtraction is "0" (step S2808). If the value of the output number counter is 1 or more (step S2808: NO), the process returns to step S2806.

If an affirmative determination is made in step S2805 or if an affirmative determination is made in step S2808, output processing of an end trigger signal is executed (step S2809). In the output process, by setting the output state of the third signal input to the third buffer 122c to HI level, the output of the termination trigger signal is started. The period during which the third signal is maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of the third signal.

Thereafter, 1 is subtracted from the value of the recognition output counter of the main RAM 65 (step S2810), and it is determined whether or not the value of the recognition output counter after the 1 subtraction is "0" (step S2811). If the value of the recognition output counter is 1 or more (step S2811: NO), the process returns to step S2803 to execute processing for recognizing the type of signal corresponding to the value of the recognition output counter after subtracting 1. do.

On the other hand, when the value of the recognition output counter is "0" (step S2811: YES), output processing of an identification end signal is executed (step S2812). In the output process, the output states of the third signal input to the third buffer 122c, the open/close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n is set to HI level, the output of the identification end signal is started. The period during which these signals are maintained at the HI level is set to a period sufficient for the management side CPU 112 to recognize the output state of these signals.

Next, the management processing in this embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. The management process is started when the supply of operating power to the management side CPU 112 is started as in the first embodiment.

First, it is determined whether or not the reception of the identification start signal from the main CPU 63 has ended (step S2901). If the identification start signal has not been received, the setting update recognition process is executed in step S2902, and then the process in step S2901 is executed again. The processing contents of the setting update recognition processing are the same as those of the first embodiment.

When the reception of the identification start signal from the main side CPU 63 is completed (step S2901: YES), the value of the setting target counter in the management side RAM 114 is cleared to "0" (step S2903). Thereafter, on condition that a start trigger signal has been received from the main CPU 63 (step S2904: YES), the process proceeds to step S2905. In step S2905, it is determined whether or not a type identification signal has been received from the main CPU 63 . If the type identification signal has been received (step S2905: YES), 1 is added to the value of the reception counter provided in the management side RAM 114 (step S2906). The reception number counter is a counter for specifying the number of times the type identification signal is received from the main side CPU 63 by the management side CPU 112 . Note that the value of the reception number counter is cleared to "0" when an affirmative determination is made in step S2904.

If a negative determination is made in step S2905, or if the process of step S2906 is executed, it is determined whether or not an end trigger signal has been received from the main CPU 63 (step S2907). If the termination trigger signal has not been received (step S2907: NO), the process returns to step S2905, and if the termination trigger signal has been received (step S2907: YES), the correspondence relationship setting process is executed (step S2908). In the correspondence setting process, among the first to tenth correspondence areas 123a to 123j of the correspondence memory 116, the correspondence area corresponding to the current value of the counter to be set in the management side RAM 114 is set in the reception counter. Stores the value that is specified. In this case, the first correspondence area 123a, the second correspondence area 123b, and the third correspondence area 123c are set with "10" corresponding to the number of winning balls of the general winning opening 31, and the fourth correspondence area 123d is set with is set to "15" corresponding to the number of prize balls of the special electric prize winning device 32, "1" corresponding to the number of prize balls of the first operation opening 33 is set to the fifth correspondence area 123e, and the sixth correspondence "1" corresponding to the number of prize balls of the second operation opening 34 is set in the area 123f. Also, "0" is set in the seventh to twelfth correspondence area 123g to 123l. After that, 1 is added to the setting target counter value of the management side RAM 114 (step S2909).

When a negative determination is made in step S2904, or when the process of step S2909 is executed, it is determined whether reception of the identification end signal from the main CPU 63 is completed (step S2910). If the reception of the identification end signal has not ended (step S2910: NO), the process returns to step S2904, and on condition that the start trigger signal is received from the main CPU 63 (step S2904: YES), the processes after step S2905 are executed. Run. If the identification end signal has been received from the main CPU 63 (step S2910: YES), the history setting process in step S2911, the display output process in step S2912, and the external output process in step S2913 are repeatedly executed.

FIG. 51 is a time chart showing how information on correspondence between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j is stored in the correspondence memory 116. FIG. 51(a) shows the period during which the output state of the first signal is HI level, FIG. 51(b) shows the period during which the output state of the second signal is HI level, and FIG. ) shows the period during which the output state of the third signal is at HI level, FIG. 51(d) shows the period during which the output state of the open/close execution mode signal is at HI level, and FIG. FIG. 51(f) shows the period during which the output state of the high-frequency support mode signal is at HI level, and FIG. FIG. 51(g) shows the timing for adding 1 to the value of the reception count counter of the management side RAM 114, and FIG. The timing at which the management-side CPU 112 executes the correspondence setting process (step S2908) is shown.

When the supply of operating power to the main CPU 63 and the management CPU 112 is started, at the timing of t1, as shown in FIGS. , the open/close execution mode signal and the high frequency support mode signal are changed from the LOW level to the HI level. As a result, output of an identification start signal from the main side CPU 63 to the management side CPU 112 is started. After that, at timing t2, the output states of the first signal, the open/close execution mode signal, and the high frequency support mode signal are changed from HI level to LOW level. As a result, the output of the identification start signal from the main CPU 63 to the management CPU 112 is stopped. At the timing t2, the management CPU 112 makes an affirmative determination in step S2901 of the management processing (FIG. 50), thereby entering the identification state as shown in FIG. 51(f).

Thereafter, the output state of the first signal is maintained at the HI level as shown in FIG. 51(a) from timing t3 to timing t4. As a result, a start trigger signal is output to the management side CPU 112 . Then, the output state of the second signal is maintained at the HI level as shown in FIG. 51(b) from timing t5 to timing t7. As a result, the type identification signal is output once to the management side CPU 112 . In this case, at the timing of t6, 1 is added to the value of the reception number counter of the management side RAM 114 as shown in FIG. 51(g).

Thereafter, the output state of the third signal is maintained at the HI level as shown in FIG. 51(c) from timing t8 to timing t10. As a result, a termination trigger signal is output to the management side CPU 112 . In this case, at timing t9, the management side CPU 112 executes the correspondence setting process as shown in FIG. Since the value of the reception count counter is "1" at the timing when the correspondence setting process is executed, "1" is set as the correspondence information in the correspondence areas 123a to 123j to be set this time in the correspondence memory 116. ” information.

Thereafter, the output state of the first signal is maintained at HI level as shown in FIG. 51(a) from timing t11 to timing t12. As a result, a start trigger signal is output to the management side CPU 112 . Then, as shown in FIG. 51(b), the second timing is shown in FIG. The output state of the signal is maintained at HI level. As a result, the type identification signal is output once to the management side CPU 112 . In this case, the value of the reception count counter of the management side RAM 114 is incremented by 1 at each of timing t14, timing t17, timing t20, and timing t23, as shown in FIG.

Thereafter, the output state of the third signal is maintained at the HI level as shown in FIG. 51(c) from timing t25 to timing t27. As a result, a termination trigger signal is output to the management side CPU 112 . In this case, at the timing of t26, the management-side CPU 112 executes the correspondence setting process as shown in FIG. Since the value of the reception count counter is "10" at the timing when the correspondence setting process is executed, "10" is set as the correspondence information in the correspondence areas 123a to 123j to be set this time in the correspondence memory 116. ” information.

After that, at the timing of t28, as shown in FIGS. 51(c), 51(d), and 51(e), the output states of the third signal, the opening/closing execution mode signal, and the high-frequency support mode signal are LOW. level to HI level. As a result, output of an identification end signal from the main CPU 63 to the management CPU 112 is started. After that, at the timing of t29, the output states of the third signal, the opening/closing execution mode signal, and the high frequency support mode signal are changed from HI level to LOW level. As a result, the output of the identification end signal from the main CPU 63 to the management CPU 112 is stopped. At the timing t29, the management CPU 112 makes an affirmative determination in step S2910 of the management process (FIG. 50), thereby canceling the identification state as shown in FIG. 51(f).

In this embodiment, since the information on the number of prize balls is stored as the correspondence information, the history information stored in the history memory 117 includes the prize balls corresponding to the entering ball section that triggered the storage of the history information. Information on the number is included as correspondence information. In this configuration, if there are a plurality of types of ball-entering parts with the same number of winning balls, the history information cannot distinguish between the ball-entering parts. Specifically, since the number of winning balls is one for each of the first working opening 33 and the second working opening 34, it is possible to distinguish between the first working opening 33 and the second working opening 34 in the history information. Can not. Under such circumstances, the number of prize balls may be different between the first operating port 33 and the second operating port 34 . As a result, even with a configuration in which history information is stored as in the present embodiment, it is possible to distinguish between the first working port 33 and the second working port 34 in the history information.

According to the present embodiment described in detail above, not only the set value update signal and the output instruction signal, but also information corresponding to whether or not the game cycle has started, information corresponding to whether or not the opening/closing execution mode is in progress, Information corresponding to whether or not the high-frequency support mode is on and information corresponding to whether or not the front door frame 14 is open is also sent from the main side CPU 63 to indicate that the signal path corresponds to these pieces of information. can be identified by the management side CPU 112 without receiving the correspondence information. In this case, only the information corresponding to the detection results of the ball entry detection sensors 42a to 48a is the information that requires the main side CPU 63 to recognize the correspondence relationship between each information and each signal path 118a to 118j to the management side CPU 112. Become. When the management side CPU 112 recognizes the correspondence information, pulse signals of the same number as the number of prize balls corresponding to the respective entering ball detection sensors 42a to 48a are sent from the main side CPU 63 to the management side CPU 112 using the second signal. output to This makes it possible to simplify the configuration regarding transmission of correspondence information.

<Tenth Embodiment>
This embodiment differs from the above-described first embodiment in the configuration for providing the management IC 66 with information on each ball entry result. The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 52 is an explanatory diagram for explaining the configuration of the signal path for inputting the detection results of the respective entering ball detection sensors 42a to 48a to the main side CPU 63 and the management IC 66. As shown in FIG.

The detection result of the first winning hole detection sensor 42a is input to the main side CPU 63 through the first signal path SL11. Also, the detection result of the second winning hole detection sensor 43a is input to the main side CPU 63 through the second signal path SL12. Further, the detection result of the third winning hole detection sensor 44a is input to the main side CPU 63 through the third signal path SL13. Further, the detection result of the special electric detection sensor 45a is input to the main side CPU 63 through the fourth signal path SL14. Further, the detection result of the first operation port detection sensor 46a is input to the main side CPU 63 through the fifth signal path SL15. Further, the detection result of the second operation opening detection sensor 47a is input to the main side CPU 63 through the sixth signal path SL16. Further, the detection result of the outlet detection sensor 48a is input to the main side CPU 63 through the seventh signal path SL17.

A first branch path SL21 is formed by branching from the middle position of the first signal path SL11, and the first branch path SL21 is electrically connected to the management IC66. Further, a second branch path SL22 is formed by branching from the middle position of the second signal path SL12, and the second branch path SL22 is electrically connected to the management IC66. Further, a third branch path SL23 is formed by branching from the middle position of the third signal path SL13, and the third branch path SL23 is electrically connected to the management IC66. Further, a fourth branch path SL24 is formed by branching from the middle position of the fourth signal path SL14, and the fourth branch path SL24 is electrically connected to the management IC66. Further, a fifth branch path SL25 is formed by branching from the middle position of the fifth signal path SL15, and the fifth branch path SL25 is electrically connected to the management IC66. Further, a sixth branch path SL26 is formed by branching from the middle position of the sixth signal path SL16, and the sixth branch path SL26 is electrically connected to the management IC66. Further, a seventh branch path SL27 is formed by branching from the middle position of the seventh signal path SL17, and the seventh branch path SL27 is electrically connected to the management IC66.

With the above configuration, the detection results of the respective entering ball detection sensors 42a to 48a are input to the management IC 66 without intervening processing by the main side CPU 63. FIG. As a result, the main CPU 63 executes processing for making the management side CPU 112 recognize the ball entry results of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, and the second operating port 34. Since there is no need to do this, the processing load on the main CPU 63 can be reduced.

Further, the branch points of the branch paths SL21 to SL27 from the signal paths SL11 to SL17 are present in the MPU62. As a result, it is possible to make it difficult to access the branch point and the branch routes SL21 to SL27 from the outside, and it is possible to prevent fraudulent acts of inputting an abnormal ball entry result only to the management IC 66. .

<Eleventh Embodiment>
This embodiment differs from the first embodiment in the configuration of the display device for displaying the management results of the game history. The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 53 is a front view of main controller 60 in this embodiment.

In the first embodiment, the main control device 60 is provided with the first notification display device 69a, the second notification display device 69b, and the third notification display device 69c. A display device 201, a second notification display device 202, a third notification display device 203, and a fourth notification display device 204 are provided. These first to fourth notification display devices 201 to 204 are arranged side by side on the element mounting surface of the main control board 61 .

Each of the first to fourth notification display devices 201 to 204 is a segment display device in which seven LED display segments are arranged. It may be a light emitter, a liquid crystal display device, or an organic EL display. Each of the first to fourth notification display devices 201 to 204 is installed so that its display surface faces the direction in which the element mounting surface of the main control board 61 faces, and the opposing wall portion 60b of the board box 60a covered. In this case, since the board box 60a is transparent, the display surfaces of the first to fourth notification display devices 201 to 204 accommodated in the board box 60a can be viewed from the outside of the board box 60a. becomes possible. In addition, the main control device 60 is mounted on the back surface of the resin base 21 in the board box 60a so that the facing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10. When the main body 12 is opened to the front of the pachinko machine 10 with respect to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to fourth information display devices 201 are displayed through the opposing wall portion 60b. 204 can be visually observed.

On the display surface of the first notification display device 201, alphabets such as "A", "E", "H", "L", and "O" are displayed. On the other hand, in the second notification display device 202, the third notification display device 203 and the fourth notification display device 204, numbers in the range of "0" to "9" are displayed. The management result of the game history is notified using the first to fourth notification display devices 201 to 204. FIG. In this case, in the first notification display device 201 and the second notification display device 202, the game history management results (first to eighth parameters, eleventh to eighteenth parameters in the first embodiment, parameter, 21st to 26th parameters, 31st parameter, 41st to 42nd parameters) are displayed corresponding to the type, and the third notification display device 203 and the fourth notification display device 204 are subject to notification. A display corresponding to the content of the management result of the game history of the type shown is performed.

Specifically, the types of game history management results are the 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameters, and the 41st to 42nd parameters in the first embodiment. exists. On the first notification display device 201, a display corresponding to the type of parameter group to be notified is performed. Specifically, when any one of the first to eighth parameters is to be notified, "A" is displayed on the first notification display device 201, and any one of the eleventh to eighteenth parameters is displayed. When it is subject to notification, "E" is displayed on the first notification display device 201, and when any of the 21st to 26th parameters is subject to notification, the first notification display device "H" is displayed at 201, and when any of the 31st parameters is to be notified, "L" is displayed at the first notification display device 201, and the 41st to 42nd parameters are notified. If it is a target, "O" is displayed on the display device 201 for first notification.

The second notification display device 202 displays the order corresponding to the type of the game history management result to be notified among the arrangement order of the game history management results in the parameter group to be notified. Taking the parameter group of the first to eighth parameters as an example, when the first parameter is to be notified, "1" is displayed on the second notification display device 202, and the second parameter is displayed. When the notification target is set, "2" is displayed on the second notification display device 202, and when the third parameter is the notification target, "3" is displayed on the second notification display device 202. is displayed, and when the fourth parameter is to be notified, "4" is displayed on the second notification display device 202, and when the fifth parameter is to be notified, the second notification When "5" is displayed on the display device 202 and the sixth parameter is to be notified, "6" is displayed on the second notification display device 202 and the seventh parameter is to be notified. If there is, "7" is displayed on the second notification display device 202, and "8" is displayed on the second notification display device 202 if the eighth parameter is to be notified. Further, taking the parameter group of the 21st to 26th parameters as an example, when the 21st parameter is to be notified, "1" is displayed on the second notification display device 202, and the 22nd parameter is displayed. When the parameter is to be notified, "2" is displayed on the second notification display device 202, and when the 23rd parameter is to be notified, the second notification display device 202 displays " 3" is displayed, and when the 24th parameter is to be notified, "4" is displayed on the second notification display device 202, and when the 25th parameter is to be notified, the second "5" is displayed on the notification display device 202, and "6" is displayed on the second notification display device 202 when the 26th parameter is to be notified.

Details of the display contents of the third notification display device 203 and the fourth notification display device 204 are as follows. It is displayed on the display device 203 , and a number corresponding to the ones place is displayed on the fourth notification display device 204 .

In the first to fourth notification display devices 201 to 204, the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameters and the forty-first to forty-second The display corresponding to the calculation result of the parameter is sequentially switched according to a predetermined order, and after the calculation result of the 42nd parameter, which is the last display target, is displayed, the first parameter, which is the first display target, is displayed. is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is two seconds. On the other hand, the management CPU 112 has a calculation period of 51 seconds for the various parameters, and the number of the various parameters is 25. Therefore, various parameters calculated by the management side CPU 112 are to be notified by the first to fourth notification display devices 201 to 202 at least once.

In the first to fourth notification display devices 201 to 204, as in the first embodiment, not only is the game history management result notified, but also the setting state of the pachinko machine 10 can be changed. In , the value corresponding to the current setting value is displayed. Specifically, in the changeable state, the first to third information display devices 201 to 203 are turned off, while the first to fourth information display devices 204 arranged side by side are present at the right end. A value corresponding to the current set value is displayed on the fourth notification display device 204 which is currently running. That is, when "setting 1" is selected in the changeable state, "1" is displayed on the fourth notification display device 204, and when "setting 2" is selected in the changeable state, "2" is displayed on the fourth notification display device 204, and when "setting 3" is selected in the changeable state, "3" is displayed on the fourth notification display device 204, indicating that the change is possible. When "Setting 4" is selected in the state, "4" is displayed on the display device 204 for fourth notification, and when "Setting 5" is selected in the changeable state, "4" is displayed. "5" is displayed on the display device 204, and "6" is displayed on the fourth notification display device 204 when "setting 6" is selected in the changeable state.

Next, an electrical configuration for performing various displays on the first to fourth notification display devices 201 to 204 under the control of the MPU 62 will be described. FIG. 54 is a block diagram for explaining an electrical configuration for performing various displays on the first to fourth notification display devices 201 to 204 under the control of the MPU 62. As shown in FIG.

As already explained, the main control board 61 is provided with the MPU 62 and the first to fourth notification display devices 201 to 204 . Also, the main control board 61 is provided with a first display IC 205 , a second display IC 206 , a third display IC 207 and a fourth display IC 208 .

The first display IC 205 is provided corresponding to the first notification display device 201, and is electrically connected to the MPU 62 via a signal path SL31 and electrically connected to the first notification display device 201 via a signal path SL32. It is connected. The first display IC 205 is provided with a storage buffer for storing display data received from the MPU 62, and display control of the first notification display device 201 according to the display data stored in the storage buffer. control segment lighting. The first display IC 205 can store and hold the display data stored in the storage buffer when the operating power is supplied. 201 to continue to display. Then, by changing the display data by the MPU 62, the display of the first notification display device 201 is changed to display contents corresponding to the changed display data. Further, in a situation where the display data is not set by the MPU 62 after the supply of operating power to the first display IC 205 is started, the display data becomes all "0" data. , the first notification display device 201 is in a non-display state, that is, in a light-off state.

However, it is not limited to this configuration, and even if the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the first display IC 205, the first display IC 205 displays Data may be stored and retained. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display performed on the first notification display device 201 immediately before the supply of the operating power to the pachinko machine 10 is stopped It will be started by the display device 201 for the 1st information.

The second display IC 206 is provided corresponding to the second notification display device 202, and is electrically connected to the MPU 62 through the signal path SL33 and electrically connected to the second notification display device 202 through the signal path SL34. It is connected. The second display IC 206 is provided with a storage buffer for storing the display data received from the MPU 62, and the display control of the second notification display device 202 according to the display data stored in the storage buffer, that is, each display control segment lighting. The second display IC 206 can store and hold the display data stored in the storage buffer when the operating power is supplied. 202 to continue to display. Then, by changing the display data by the MPU 62, the display of the second notification display device 202 is changed to display contents corresponding to the changed display data. Further, in a situation where the display data is not set by the MPU 62 after the supply of operating power to the second display IC 206 is started, the display data is all "0" data. , the second notification display device 202 is in a non-display state, that is, in a light-off state.

However, it is not limited to this configuration, and is displayed on the second display IC 206 even in a situation where the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the second display IC 206. Data may be stored and retained. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display performed on the second notification display device 202 immediately before the supply of the operating power to the pachinko machine 10 is stopped It will be started by the second notification display device 202 .

The third display IC 207 is provided corresponding to the third notification display device 203, and is electrically connected to the MPU 62 through the signal path SL35 and electrically connected to the third notification display device 203 through the signal path SL36. It is connected. The third display IC 207 is provided with a storage buffer for storing the display data received from the MPU 62, and according to the display data stored in the storage buffer, the display control of the third notification display device 203, that is, each display control segment lighting. The third display IC 207 can store and hold the display data stored in the storage buffer when the operating power is supplied, and the display contents corresponding to the stored display data are displayed on the third notification display device. 203 continues to be displayed. Then, by changing the display data by the MPU 62, the display of the third notification display device 203 is changed to display contents corresponding to the changed display data. In addition, after the supply of operating power to the third display IC 207 is started and the display data is not set by the MPU 62, the display data is all "0" data. , the third notification display device 203 is in a non-display state, that is, in a light-off state.

However, it is not limited to this configuration, and even if the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the third display IC 207, the third display IC 207 displays Data may be stored and retained. In this case, when the supply of operating power to the pachinko machine 10 is started, the display performed on the third notification display device 203 immediately before the supply of operating power to the pachinko machine 10 is stopped It will be started by the third notification display device 203 .

A fourth display IC 208 is provided corresponding to the fourth notification display device 204, and is electrically connected to the MPU 62 via a signal path SL37 and electrically connected to the fourth notification display device 204 via a signal path SL38. It is connected. The fourth display IC 208 is provided with a storage buffer for storing the display data received from the MPU 62, and according to the display data stored in the storage buffer, the display control of the fourth notification display device 204, that is, each display control segment lighting. The fourth display IC 208 can store and hold the display data stored in the storage buffer when operating power is supplied, and displays the display content corresponding to the stored display data to the fourth display device for notification. 204 to continue to display. Then, by changing the display data by the MPU 62, the display of the fourth notification display device 204 is changed to display contents corresponding to the changed display data. In addition, after the supply of operating power to the fourth display IC 208 is started and the display data is not set by the MPU 62, the display data is all "0" data. , the fourth notification display device 204 is in a non-display state, that is, in a light-off state.

However, it is not limited to this configuration, and is displayed on the fourth display IC 208 even in a situation where the supply of operating power to the pachinko machine 10 is stopped by supplying backup power to the fourth display IC 208. Data may be stored and retained. In this case, when the supply of operating power to the pachinko machine 10 is started, the display performed on the fourth notification display device 204 immediately before the supply of operating power to the pachinko machine 10 is stopped It will be started by the fourth notification display device 204 .

The output of display data to the first to fourth display ICs 205 to 208 is performed by the MPU 62, but the output setting of the display data is performed by the main side CPU 63 and the management side CPU 112, respectively. That is, the main CPU 63 executes display control of the first to fourth notification display devices 201 to 204 and the management CPU 112 executes display control of the first to fourth notification display devices 201 to 204 . In this case, the period during which the display data output setting is performed is adjusted in each of the main side CPU 63 and the management side CPU 112 so that the display data output setting is not performed at the same time. Specifically, in a changeable state in which the setting state of the pachinko machine 10 can be changed after the supply of operating power to the MPU 62 is started, the display data output setting is performed by the main side CPU 63. The display data output setting by the management side CPU 112 is not performed. On the other hand, in a state in which the setting value cannot be changed, the display data output setting is performed by the management side CPU 112, whereas the display data output setting is not performed by the main side CPU 63. FIG.

If the display data output setting by the main side CPU 63 and the display data output setting by the management side CPU 112 are performed at the same time, the display data output setting by the main side CPU 63 is given priority. However, the present invention is not limited to this, and a configuration may be adopted in which the display data output setting by the management side CPU 112 is given priority.

Next, the display processing in this embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG.

First, 1 is subtracted from the value of the update timing counter of the management side RAM 114 (step S3001). The update timing counter is a counter for the management side CPU 112 to specify the timing of updating the display contents of the game history management results on the first to fourth notification display devices 201 to 204 . After that, by determining whether or not the value of the update timing counter after subtracting 1 is "0", it is determined whether or not it is time to update the display contents of the first to fourth notification display devices 201 to 204. is determined (step S3002).

If an affirmative determination is made in step S3002, 1 is added to the value of the display object counter in the management side RAM 114 (step S3003). If the value of the display target counter after adding 1 exceeds the maximum value of "24" (step S3004: YES), the value of the display target counter is cleared to "0" (step S3005). The display target counter is a counter for the management side CPU 112 to specify the types of parameters to be displayed on the first to fourth notification display devices 201 to 204 . The 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameters, the 41st to 42nd parameters, and the display target counters of "0" to "24" There is a one-to-one correspondence with the possible values. For example, when the value of the display target counter is "0", the first parameter to be displayed first becomes the display target of the first to fourth notification display devices 201 to 204, and the value of the display target counter is "24". , the 42nd parameter, which is the last display target, is the display target of the first to fourth notification display devices 201 to 204 .

When a negative determination is made in step S3004, or when the process of step S3005 is executed, the display data corresponding to the type of parameter corresponding to the value of the counter to be displayed is read from the management ROM 113 (step S3006). Then, display data setting processing corresponding to the first notification display device 201 is executed (step S3007), and display data setting processing corresponding to the second notification display device 202 is executed (step S3008). For example, if the value of the display target counter is "0" and the first parameter is the display target, the display data for displaying "A" on the first notification display device 201 is sent to the first display IC 205. In addition to outputting, display data for displaying "1" on the second notification display device 202 is output to the second display IC 206 . Further, for example, if the value of the display target counter is "24" and the 42nd parameter is to be displayed, the display data for displaying "O" on the first notification display device 201 is set to the first display. While outputting to IC205, the display data for displaying "2" on the 2nd information display device 202 are output to 2nd display IC206.

After that, the parameter corresponding to the value of the counter to be displayed is read from the calculation result memory 131, and the display data corresponding to the 10's place and the display data corresponding to the 1's place of the result of multiplying the read parameter by 100 are displayed. Read from the management side ROM 113 (step S3009). Then, display control is performed on the third notification display device 203 so that the number corresponding to the tens digit of the result is displayed (step S3010), and the fourth notification display device 203 is controlled so that the number corresponding to the ones digit is displayed. Display control of the notification display device 204 is performed (step S3011). For example, when the result of multiplying by 100 is "53", the display data for displaying "5" on the third notification display device 203 is output to the third display IC 207, and to the fourth notification display device 204. Display data for displaying “3” is output to the fourth display IC 208 .

Thereafter, a value corresponding to 2 seconds is set in the update timing counter of the management RAM 114 as a value corresponding to the next update timing (step S3012).

By executing the display processing as described above, the management results of the game history are displayed on the first to fourth notification display devices 201 to 204. FIG. The display of the management result of the game history is performed regardless of whether the game is continued or not. This is done regardless of whether it is visible or not. By executing the display control of the first to fourth information display devices 201 to 204 regardless of the game situation and the state of the pachinko machine 10 in this way, the first to fourth information display devices 201 204 can be simplified.

The display of the management result of the game history on the first to fourth notification display devices 201 to 204 is started after the supply of operating power to the management side CPU 112 is started and after the identification end command is received from the main side CPU 63. be done. In this case, the information stored in the calculation result memory 131 is retained even when the supply of operating power to the pachinko machine 10 is stopped, just like the information stored in the history memory 117. Therefore, when the supply of operating power to the management side CPU 112 is started, the management result of the game history calculated before the supply of the operating power to the management side CPU 112 is stopped is displayed.

The first to fourth display ICs 205 to 208 store and hold the display data output from the MPU 62 while the operating power is being supplied, and correspond to the corresponding first to fourth display devices 201 to 204 for notification according to the display data. to control the display. Therefore, after the display of the management result of the game history is started, the first to fourth notification display devices 201 to 204 do not go into the off state (that is, the non-display state), and the lighting state corresponding to some display ( display state).

Next, setting value update processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG.

First, the first to third notification display devices 201 to 203 are extinguished (step S3101). Specifically, it outputs display data of all “0” to the first to third display ICs 205 to 207 . As a result, the display segments of the first to third notification display devices 201 to 203 are all turned off, and the first to third notification display devices 201 to 203 are turned off. Incidentally, immediately after the supply of operating power to the pachinko machine 10 is started, the display segments of the first to fourth information display devices 201 to 204 are all extinguished, and the first to fourth information display devices 201 204 is in a non-display state. Therefore, step S3101 is a process for maintaining the first to third notification display devices 201 to 203 in the non-display state, and if any of the first to third notification display devices 201 to 203 If it is in the display state, it is processed to be in the non-display state.

After that, "1" is set in the set value counter of the main RAM 65 (step S3102). The setting value counter is a counter for specifying which setting value the setting state of the pachinko machine 10 is by the main side CPU 63 . By setting "1" to the set value counter, the set value becomes "set 1" regardless of the set value up to that point when the set value update process is executed.

After that, display start processing of the setting value in the fourth display notification device 204 is executed (step S3103). In the setting value display start processing, display data for displaying “1” is output to the fourth display IC 208 . As a result, the number “1” corresponding to “setting 1” is displayed on the fourth notification display device 204 .

After that, on the condition that the setting key insertion portion 68a has not been turned off (step S3104: NO), it is determined whether or not the update button 68b has been pressed once (step S3105). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3105, the process returns to step S3104 to determine whether or not the setting key insertion portion 68a has been turned off.

If the update button 68b has been pressed once (step S3105: YES), 1 is added to the set value counter of the main RAM 65 (step S3106). If the value of the set value counter after adding 1 exceeds "6" (step S3107: YES), the set value counter is set to "1" (step S3108). As a result, each time the update button 68b is pressed once, the set value is updated to the value one step higher. going back.

When a negative determination is made in step S3107, or when the process of step S3108 is executed, the display update process of the setting value in the fourth notification display device 204 is executed (step S3109). In the setting value display update process, display data for displaying a number corresponding to the value of the setting value counter of the main side RAM 65 is output to the fourth display IC 208 . As a result, the number corresponding to the current set value is displayed on the fourth notification display device 204 . By confirming the fourth notification display device 204, the manager of the game hall can grasp the setting state of the pachinko machine 10 after the update button 68b is pressed.

After executing the process of step S3109, the process returns to step S3104, and it is determined whether or not the setting key insertion portion 68a has been turned off. If the OFF operation has not been performed (step S3104: NO), the processing after step S3105 is executed again. If the OFF operation has been performed (step S3104: YES), the management result display start processing is executed in the first to fourth notification display devices 201 to 204 (step S3110).

In the display start process, a management result display start command is transmitted from the main CPU 63 to the management CPU 112 . The management CPU 112 that has received the management result display start command executes processing for displaying the first parameter among the various parameters stored in the calculation result memory 131 . The processing contents in this case are the same as steps S3006 to S3012 in the display processing (FIG. 55). As a result, the display corresponding to the first parameter calculated immediately before the operation power of the pachinko machine 10 was stopped last time is performed on the first to fourth notification display devices 201 to 204. FIG.

Next, the display modes of the first to fourth notification display devices 201 to 204 when the game history management result is displayed and when the setting state of the pachinko machine 10 is updated will be described. FIG. 57(a) is an explanatory diagram for explaining the display mode of the first to fourth notification display devices 201 to 204 when the game history management result is displayed, and FIG. 57(b) is a pachinko machine. 10 is an explanatory diagram for explaining the display modes of the first to fourth notification display devices 201 to 204 when the setting state of No. 10 is changed; FIG.

When the management result of the game history is displayed, at least one display segment in each of the first to fourth notification display devices 201 to 204 is turned on as shown in FIG. 57(a). In other words, each of the first to fourth notification display devices 201 to 204 enters the display state. This is the same regardless of which of the 1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameters, and 41st to 42nd parameters is to be notified. . As a result, the manager of the game hall can see that all of the first to fourth notification display devices 201 to 204 are in the display state, so that the first to fourth notification display devices 201 to 204 It is possible to grasp that the management result of the game history is being displayed.

On the other hand, when the setting state of the pachinko machine 10 is changed, all the display segments of the first to third notification display devices 201 to 203 are turned off as shown in FIG. 57(b). That is, each of the first to third notification display devices 201 to 203 is put into a non-display state. Further, any one of "1" to "6" is displayed on the fourth notification display device 204. FIG. In this way, one of "1" to "6" is displayed on the fourth notification display device 204 and each of the first to third notification display devices 201 to 203 is in a non-display state, The manager of the game hall can grasp that the display corresponding to the setting value is being performed on the first to fourth notification display devices 201 to 204, and can clearly grasp the current setting value. becomes possible.

Next, referring to the time charts of FIGS. 58(a) to 58(h), how the first to fourth notification display devices 201 to 204 are brought into the display state will be described. FIG. 58(a) shows a changeable state period in which the setting state of the pachinko machine 10 can be changed, and FIG. 58(b) shows updating of the setting display on the first to fourth notification display devices 201 to 204. FIG. 58(c) shows the period during which the game history management results are displayed on the first to fourth information display devices 201 to 204, and FIG. 58(d) shows the first to fourth information display devices. FIG. 58(e) shows the period during which the first notification display device 201 is in the display state, and FIG. 58(g) shows the period during which the display device 203 for the third notification is in the display state, and FIG. 58(h) shows the period during which the display device 203 for the third notification is in the display state It shows the period during which the display device 204 for the display is in the display state.

The setting state of the pachinko machine 10 is changed at the timing t1 as shown in FIG. becomes a modifiable state in which At the timing t1, the setting display is updated as shown in FIG. 58(b), and the fourth notification display device 204 enters the display state as shown in FIG. 58(h), and the display state is continued. In this case, since "Setting 1" is selected, "1" is displayed on the display device 204 for fourth notification. On the other hand, at timing t1, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are in a non-display state, that is, all display segments are turned off. maintained.

After that, by operating the update button 68b to change the setting value at each of timing t2, timing t3, timing t4, and timing t5, as shown in FIG. is the timing for updating the setting value display. In this case, as shown in FIG. 58(h), the display content of the fourth notification display device 204 is switched to the number corresponding to the setting value after the change at each of these timings. The display device 204 for the fourth notification is maintained in the display state including each timing at which is performed. On the other hand, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are also in the non-display state at each of these set value display update timings. The segment remains extinguished.

After that, the changeable state is terminated as shown in FIG. In this case, the display period of the game history management result is started at the timing t6 as shown in FIG. 58(c). Specifically, the display of the first parameter stored in the calculation result memory 131 is started. Therefore, at the timing t6, as shown in FIGS. 58(e) to 58(g), the first to third notification display devices 201 to 203 are switched from the non-display state to the display state, and the fourth notification display The device 204 remains in the displayed state although the displayed content is changed.

After that, timing t7, timing t8, timing t9, timing t10, timing t11 and timing t12 are timings for updating the display of the management result of the game history as shown in FIG. 58(d). In this case, as shown in FIGS. 58(e) to 58(h), the first to fourth notification display devices 201 to 204 change the display contents corresponding to the management result of the game history after updating at each timing. However, all of the first to fourth notification display devices 201 to 204 are maintained in the display state, including each timing at which the display contents are switched.

According to this embodiment detailed above, the following excellent effects are obtained.

In the configuration in which the management results of the game history are displayed on the first to fourth notification display devices 201 to 204, the display corresponding to the changeable state in which the setting state of the pachinko machine 10 can be changed is displayed. This is performed by the first to fourth notification display devices 201 to 204. FIG. As a result, the first to fourth notification display devices 201 to 204 can be used not only for displaying the management result of the game history, but also as a display device for performing corresponding display in the changeable state. .

Corresponds to the period in which the game history management result is displayed on the first to fourth notification display devices 201 to 204 and the state in which the setting values can be changed in the first to fourth notification display devices 201 to 204. It is distinguished from the period during which the display is made. As a result, by grasping the status of display on the first to fourth notification display devices 201 to 204, it is possible to determine which display is performed on the first to fourth notification display devices 201 to 204. It is possible to identify whether there is

The first to fourth notification display devices 201 to 204 are arranged so that when the display corresponding to the setting value changeable state is performed, the display mode is different from the display mode when the management result of the game history is displayed. Display controlled. Thus, by grasping the display mode of the first to fourth notification display devices 201 to 204, it is possible to specify which display is performed in the first to fourth notification display devices 201 to 204. becomes possible.

A plurality of notification display devices 201 to 204 are provided. As a result, it is possible to perform a wide variety of displays as displays corresponding to the management results of the game history. In addition, since there are a plurality of notification display devices 201 to 204, the display mode can be enlarged depending on whether the game history management result is displayed or when the setting value changeable state is displayed. It is possible to make a difference.

When the display corresponding to the setting value changeable state is performed, the first to third notification display devices 201 to 203 which are not in the non-display state when displaying the management result of the game history are in the non-display state. As a result, only by confirming whether or not the first to third notification display devices 201 to 203 are in the non-display state, it is possible to display the management result of the game history and the display corresponding to the changeable state of the setting value. It is possible to clearly identify which one of them is performed by the first to fourth notification display devices 201 to 204 .

When the display corresponding to the setting value changeable state is performed, the fourth notification display device 204 is brought into the display state, and the display content is the same as that of the fourth notification display device 204 in the case of displaying the management result of the game history. This is the display content that can be displayed in . By making it possible for the display contents of the fourth notification display device 204 to overlap in this way, it is possible to display the management result of the game history and display corresponding to the changeable state of the set value. It becomes possible not to restrict the display contents of . In addition, even if the display contents of the fourth notification display device 204 may overlap in this way, when the display corresponding to the changeable state of the setting value is performed, the first to third notification display devices Since 201 to 203 are in a non-display state, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204. FIG.

When the game history management result is displayed, each of the first to fourth notification display devices 201 to 204 is in a display state. Thus, the display modes of the first to fourth notification display devices 201 to 204 are clearly different between when the game history management result is displayed and when the setting value changeable state is displayed. becomes possible.

When the management result of the game history is displayed, even if the type of the management result of the game history to be displayed is changed, the first to fourth notification display devices 201 to 204 are not maintained in the non-display state. . This makes it possible to specify the management result of the game history regardless of the timing of checking the first to fourth notification display devices 201 to 204 in the situation where the management result of the game history is displayed. In addition, regardless of the timing at which the first to fourth information display devices 201 to 204 are confirmed, the first to fourth information display devices 201 to 204 are in a state where the game history management results can be displayed and the setting values can be changed. It becomes possible to specify which of the corresponding displays is being performed.

When the display corresponding to the setting value changeable state is performed, only one of the fourth notification display devices 204 is in the display state. This makes it easier to grasp whether or not the display corresponding to the changeable state of the setting value is being performed.

In the configuration in which the first to fourth notification display devices 201 to 204 are arranged in the horizontal direction, only the fourth notification display device 204 arranged on the right end is used to display the state in which the setting value can be changed. done. This makes it easier to grasp whether or not the display corresponding to the changeable state of the setting value is being performed.

When the management result of the game history is displayed, the display corresponding to the type of the management result of the game history to be displayed is performed using the first display device 201 and the second display device 202 for notification. A display corresponding to the content of the management result of the game history is performed using the third notification display device 203 and the fourth notification display device 204 . This makes it easier to grasp the management result of the game history. In this case, both the first notification display device 201 and the second notification display device 202, which display the types of game history management results, are in a non-display state in the setting value changeable state. As a result, the state in which the first and second notification display devices 201 and 202 for displaying the type are not displayed corresponds to the changeable state of the set value. It becomes easy to grasp that display is being performed.

Further, when the display corresponding to the changeable state of the setting value is performed, not only the first notification display device 201 and the second notification display device 202 that display the type of management result of the game history, but also the game The third notification display device 203, which displays the content of the history management results, is also in a non-display state. This makes it easier to understand that the display corresponding to the changeable state of the setting value is being performed.

Display data is output from the MPU 62 to the first to fourth display ICs 205 to 208, and the first to fourth display ICs 205 to 208 perform predetermined displays on the first to fourth display devices 201 to 204 according to the display data. In this configuration, display data are stored and held in the first to fourth display ICs 205 to 208. FIG. As a result, for example, even if the main CPU 63 stops the execution of the process for advancing the game due to the occurrence of radio wave detection abnormality or vibration detection abnormality (if affirmative determination is made in step S306), It is possible to maintain the display of the game history management results on the first to fourth notification display devices 201 to 204 .

In addition, among the first to fourth notification display devices 201 to 204, the targets that are in the non-display state (all extinguished state) in the changeable state in which the setting state of the pachinko machine 10 can be changed are the first to It is not limited to the third notification display devices 201 to 203, and the first and second notification display devices 201 and 202 may be used. In this case, the third notification display device 203 displays a predetermined display (for example, "5") different from the content of the current set value, and the fourth notification display device 204 displays the current set value. may be configured to display a number corresponding to , and a predetermined display (for example, display of "5") different from the content of the current set value is performed on the fourth notification display device 204, and a third notification The display device 203 may display a number corresponding to the current set value. Also, the first notification display device 201 and the third notification display device 203 are in a non-display state (all off state), and the second notification display device 202 and the fourth notification display device 204 are in a display state. Alternatively, the first notification display device 201 and the fourth notification display device 204 are in a non-display state (all off state), and the second notification display device 202 and the third notification display device 203 are in a display state. The second notification display device 202 and the third notification display device 203 are in a non-display state (all off state), and the first notification display device 201 and the fourth notification display device 204 are displayed. state, the second notification display device 202 and the fourth notification display device 204 are in a non-display state (all off state), and the first notification display device 201 and the third notification display device 203 may be in a display state.

In addition, in the changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be configured to be in a non-display state (all extinguished state). Only the display device 202 may be in a non-display state (all off state), only the third notification display device 203 may be in a non-display state (all off state), or a fourth notification display device A configuration in which only 204 is in a non-display state (all off state) may be adopted.

In addition, in the changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be configured to be in the display state, and only the second notification display device 202 may be displayed. The configuration may be such that only the third notification display device 203 is in the display state.

<Twelfth Embodiment>
In this embodiment, the display contents of the first notification display device 201 and the second notification display device 202 in the setting value changeable state are different from those in the eleventh embodiment. The configuration that is different from the eleventh embodiment will be described below. The description of the same configuration as that of the eleventh embodiment is basically omitted.

59(a) is an explanatory diagram for explaining the configuration of the first notification display device 201, and FIG. 59(b) is an explanatory diagram for explaining the configuration of the second notification display device 202. FIG.

As shown in FIG. 59(a), the first notification display device 201 has seven first to seventh display segments 201a to 201g. Each of the first to seventh display segments 201a to 201g is shaped like a bar and has a light emitter such as an LED inside. These seven first to seventh display segments 201a to 201g are arranged so that the first notification display device 201 serves as a so-called seven segment display.

As shown in FIG. 59(b), the second notification display device 202 has seven first to seventh display segments 202a to 202g. Each of the first to seventh display segments 202a to 202g is shaped like a bar and has a light emitter such as an LED inside. These seven first to seventh display segments 202a to 202g are arranged so that the second notification display device 202 becomes a so-called seven segment display.

FIG. 60 shows the case of displaying the management result of the game history on the first to fourth notification display devices 201 to 204 and the case of displaying that the setting state of the pachinko machine 10 is changeable. 2 is an explanatory diagram for explaining the display contents of the first notification display device 201 and the second notification display device 202 in FIG.

The display contents of the first notification display device 201 and the second notification display device 202 when displaying the management result of the game history are the same as those in the eleventh embodiment. Therefore, any one of "A", "E", "H", "L", and "O" is displayed on the first notification display device 201, and "1" to "8" are displayed on the second notification display device 202. ” is displayed.

In this case, each of the first to seventh display segments 201a to 201g of the first notification display device 201 corresponds to "A", "E", "H", "L" in the first notification display device 201, At least one type of display of "O" is a light emission target. That is, even if any of "A", "E", "H", "L", and "O" is displayed on the first notification display device 201, the display segments 201a to 201g that are not subject to light emission are does not exist.

Similarly for the second notification display device 202, each of the first to seventh display segments 202a to 202g of the second notification display device 202 corresponds to "1" to "8" in the second notification display device 202. light emission target in at least one type of display among the displays. In other words, even if any one of "1" to "8" is displayed on the second notification display device 202, there are no display segments 202a to 202g that are not subject to light emission.

In the changeable state in which the setting state of the pachinko machine 10 can be changed, in the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in a light emitting state. As described above, the second display segment 201b and the fifth display segment 201e can be in a light emitting state when the management result of the game history is displayed on the first notification display device 201. FIG. Furthermore, the second display segment 201b and the fifth display segment 201e are in a light emitting state in any case where the management result of the game history is displayed on the first notification display device 201. FIG. On the other hand, among the first to seventh display segments 201a to 201g, only the second display segment 201b and the fifth display segment 201e are in the light emitting state. Not present when displaying results. As a result, while the display segments 201b and 201e that can be in a light-emitting state when displaying the management result of the game history are used in the changeable state of the set value, the display is not displayed when the management result of the game history is displayed. The mode can be displayed on the first notification display device 201 . Therefore, while the display segments 201a to 201g used for displaying the management result of the game history are also used, the first notification display device 201 can be caused to display corresponding to the changeable state of the setting value. It becomes possible.

In the setting value changeable state, in the second notification display device 202, the third display segment 202c is in a light emitting state. As already explained, the third display segment 202c can be in a luminous state when the management result of the game history is displayed on the second notification display device 202. FIG. On the other hand, the display content of the second notification display device 202, in which only the third display segment 202c of the first to seventh display segments 202a to 202g is in the light emitting state, exists when the game history management result is displayed. not. As a result, in the setting value changeable state, while using the display segment 202c that can be in a light emitting state when displaying the management result of the game history, a display mode that is not displayed when the management result of the game history is displayed can be used. It is possible to display on the second notification display device 202 . Therefore, while the display segments 202a to 202g used for displaying the management result of the game history are also used, the second notification display device 202 can be caused to display corresponding to the changeable state of the setting value. It becomes possible.

Next, setting value update processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG.

First, a process for starting display of setting values in the first and second notification display devices 201 and 202 is executed (step S3201). Specifically, with respect to the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in a light-emitting state, and the other display segments 201a, 201c, 201d, 201f, and 201g are in a light-off state. display data is output to the first display IC 205 . In addition, for the second notification display device 202, display data is output to the second display IC 206 so that the third display segment 202c is in a light emitting state and the other display segments 202a, 202b, 202d to 202g are in a non-lighting state. As a result, the first notification display device 201 and the second notification display device 202 start displaying to notify that the setting state of the pachinko machine 10 is changeable.

Thereafter, a process of turning off the third notification display device 203 is executed (step S3202). Specifically, display data that is all “0” is output to the third display IC 207 . As a result, all the display segments of the third notification display device 203 are turned off, and the third notification display device 203 is in a non-display state.

After that, "1" is set in the set value counter of the main RAM 65 (step S3203). The setting value counter is a counter for specifying which setting value the setting state of the pachinko machine 10 is by the main side CPU 63 . By setting "1" to the set value counter, the set value becomes "set 1" regardless of the set value up to that point when the set value update process is executed.

After that, display start processing of the setting value in the fourth notification display device 204 is executed (step S3204). In the setting value display start processing, display data for displaying “1” is output to the fourth display IC 208 . As a result, the number “1” corresponding to “setting 1” is displayed on the fourth notification display device 204 .

After that, on condition that the setting key insertion portion 68a has not been turned off (step S3205: NO), it is determined whether or not the update button 68b has been pressed once (step S3206). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3206, the process returns to step S3205 to determine whether or not the setting key insertion portion 68a has been turned off.

If the update button 68b has been pressed once (step S3206: YES), 1 is added to the set value counter of the main RAM 65 (step S3207). If the value of the set value counter after adding 1 exceeds "6" (step S3208: YES), the set value counter is set to "1" (step S3209). As a result, each time the update button 68b is pressed once, the set value is updated to a value one step higher, and when the update button 68b is pressed once in the state of "setting 6", the setting value is changed to "setting 1". going back.

When a negative determination is made in step S3208, or when the process of step S3209 is executed, the display update process of the setting value in the fourth notification display device 204 is executed (step S3210). In the setting value display update process, display data for displaying a number corresponding to the value of the setting value counter of the main side RAM 65 is output to the fourth display IC 208 . As a result, the number corresponding to the current set value is displayed on the fourth notification display device 204 . By confirming the fourth notification display device 204, the administrator of the game hall can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S3210, the process returns to step S3205 to determine whether or not the setting key insertion portion 68a has been turned off. If the OFF operation has not been performed (step S3205: NO), the processing after step S3206 is executed again. If the OFF operation has been performed (step S3205: YES), the management result display start processing is executed in the first to fourth notification display devices 201 to 204 (step S3211).

In the display start process, a management result display start command is transmitted from the main CPU 63 to the management CPU 112 . The management CPU 112 that has received the management result display start command executes processing for displaying the first parameter among the various parameters stored in the calculation result memory 131 . The processing contents in this case are the same as steps S3006 to S3012 in the display processing (FIG. 55). As a result, the display corresponding to the first parameter calculated immediately before the operation power of the pachinko machine 10 was stopped last time is performed on the first to fourth notification display devices 201 to 204. FIG.

According to this embodiment detailed above, the following excellent effects are obtained.

The setting value can be changed by making the display segments 201a to 201g and 202a to 202g of the first and second notification display devices 201 and 202, which can be in the light emitting state when the management result of the game history is displayed, be in the light emitting state. An indication corresponding to the state is made. As a result, in order to diversify the display of the management result of the game history, it is possible to limit the contents of the display corresponding to the management result of the game history as much as possible. On the other hand, for each of the first notification display device 201 and the second notification display device 202, the display segments 201a to 201g, 202a to 202b are in a light emitting state when the display corresponding to the changeable state of the setting value is performed. The combination of 202g is a combination that does not exist when the game history management result is displayed. Thus, by grasping the combination of the display segments 201a to 201g and 202a to 202g that are in the light emitting state for each of the first notification display device 201 and the second notification display device 202, the game history management result can be displayed. and the display corresponding to the changeable state of the set value.

For each of the first notification display device 201 and the second notification display device 202, there are display segments 201a to 201g and 202a to 202g that do not emit light even if the display of the management result of the game history is performed in all patterns. not. As a result, it is possible to minimize the restriction on the display contents of the management result of the game history in order to diversify the display corresponding to the management result of the game history.

When the display corresponding to the setting value changeable state is performed, the third notification display device 203, which is not in the non-display state when displaying the management result of the game history, is in the non-display state. As a result, not only the display contents of the first notification display device 201 and the second notification display device 202, but also whether or not the third notification display device 203 is in the non-display state can be confirmed, whereby the game history can be displayed. It is possible to clearly specify which of the display of the management result and the display corresponding to the changeable state of the set value is performed by the first to fourth display devices 201 to 204 for notification.

In addition, it is limited to the configuration in which only one type of display content corresponding to the changeable state in which the setting state of the pachinko machine 10 can be changed in the first and second notification display devices 201 and 202 is set. It is also possible to adopt a configuration in which a plurality of types are set. In this case, the display order of the plurality of types of display contents is predetermined, and each time the changeable state is newly executed, the display contents to be displayed may be changed according to the display order. In this way, even if there are a plurality of types of display contents corresponding to the changeable state of the setting value, these display contents are displayed in the display segment 201a which is in a light-emitting state when the management result of the game history is displayed. .

In one of the case of displaying the management result of the game history and the case of displaying corresponding to the changeable state in which the setting state of the pachinko machine 10 can be changed, the first and second notification display devices A configuration may be adopted in which blinking display is performed in 201 and 202, and display in which lighting is maintained is performed in the other. In this case, the manager of the gaming hall can specify which of the display corresponding to the management result of the game history and the display corresponding to the changeable state depending on whether the display is blinking or lighting. A combination of the display segments 201a to 201g and 202a to 202g which are in a light emitting state in the display corresponding to the possible state may be a combination used when displaying the management result of the game history. It may be a combination that is not used when displaying the result. Further, the lighting period and the extinguishing period in the blinking display may be configured to match each other between the first notification display device 201 and the second notification display device 202, or may be completely shifted. , may be partially overlapped.

<Thirteenth Embodiment>
In this embodiment, when an abnormal state occurs in the pachinko machine 10, the corresponding display is performed using the first to fourth notification display devices 201 to 204, unlike the eleventh embodiment. there is The configuration that is different from the eleventh embodiment will be described below. The description of the same configuration as that of the eleventh embodiment is basically omitted.

FIG. 62 is an explanatory diagram for explaining the configuration of the abnormality display area 211 provided in the main RAM 65. As shown in FIG.

The abnormality display area 211 is an area for storing information on abnormal conditions to be displayed on the first to fourth notification display devices 201 to 204 . The abnormality display area 211 is provided with a plurality of unit areas 211a to 211d. Specifically, a first unit area 211a, a second unit area 211b, a third unit area 211c, and a fourth unit area 211d are provided. Each of the first to fourth unit areas 211a to 211d can store information on the abnormal state of the pachinko machine 10, one by one. That is, in the abnormality display area 211, a maximum of four pieces of information on the abnormal state of the pachinko machine 10 can be stored.

Here, in this embodiment, all the information of the abnormal state which occurs in the pachinko machine 10 is specified by the main CPU 63 . For example, when an abnormality related to the payout of game balls occurs (for example, the lower tray 56a is full, the tank 75 is empty, or the payout device 76 has an abnormality in payout), the payout side CPU 92 issues a command corresponding to the abnormality that has occurred. to the main side CPU 63. In addition, the pachinko machine 10 is provided with a radio wave detection sensor and a vibration detection sensor (not shown), and when the radio wave detection sensor detects an illegal radio wave, an abnormal signal corresponding to it is transmitted to the main side CPU 63, and an abnormal signal is generated. When the vibration detection sensor detects vibration, an abnormal signal corresponding to it is transmitted to the main side CPU 63 . Also, based on identifying that normal signal transmission is not performed from each of the entering ball detection sensors 42a to 49a, occurrence of disconnection abnormality of these entering ball detection sensors 42a to 49a is specified.

The types of abnormal conditions specified by the main CPU 63 are larger than the maximum number of abnormal condition information that can be stored in the abnormal display area 211 . Then, when many abnormal conditions occur simultaneously, it is assumed that new abnormal information will be generated even though the maximum number of abnormal condition information has already been stored in the abnormal display area 211 . On the other hand, the storage priority is set for the abnormal state information at the setting stage of the pachinko machine 10, and in the situation where the maximum number of abnormal state information is already stored in the abnormal display area 211, new If an abnormal state occurs in the first state, the information of the abnormal state with the higher storage priority is left in the abnormality display area 211 . As a result, it becomes possible to preferentially execute notification of an abnormal state having a high storage priority.

Next, the abnormality setting process executed by the main CPU 63 will be described with reference to the flowchart of FIG. The abnormality setting process is executed as the first process of the timer interrupt process (FIG. 11).

First, it is determined whether or not an abnormal display target has occurred (step S3301). The types of abnormal display objects include full tank 56a, no ball in tank 75, abnormal dispensing by dispensing device 76, abnormal radio wave detection, abnormal vibration detection, and disconnection abnormality of each incoming ball detection sensor 42a-49a. The number of types of abnormality display targets is greater than the number of first to fourth unit areas 211a to 211d provided in the abnormality display area 211. FIG.

If an affirmative determination is made in step S3301, whether or not the information of the abnormal state corresponding to the abnormality display target that occurred this time is already stored in any of the first to fourth unit areas 211a to 211d of the abnormality display area 211. is determined (step S3302). If it has already been stored, the information of the abnormal state corresponding to the abnormal display object that occurred this time is not stored in the abnormal display area 211 . As a result, it is possible to prevent the same type of abnormal state information from being redundantly stored in the abnormal display area 211 .

If a negative determination is made in step S3302, it is determined whether or not the value of the abnormality target counter provided in the main RAM 65 is the maximum value (specifically, "4") (step S3303). The abnormality target counter is a counter for the main CPU 63 to specify the number of areas in which abnormal state information is stored among the first to fourth unit areas 211 a to 211 d in the abnormality display area 211 .

If the value of the abnormality target counter is the maximum value (step S3303: YES), priority comparison processing is executed (step S3304). In the priority comparison process, first, among the abnormal state information stored in the first to fourth unit areas 211a to 211d of the abnormal display area 211, the abnormal state information with the lowest storage priority is specified. The storage priority is determined in advance at the design stage of the pachinko machine 10, and specifically, the lower tray 56a is full → no balls in the tank 75 → abnormal vibration detection → abnormal payout by payout device 76 → ball detection sensor 42a. The storage priority increases in the order of wire breakage to 49a → radio wave detection abnormality. In the priority comparison process, which of the abnormal state information with the lowest storage priority stored in the first to fourth unit areas 211a to 211d and the abnormality display target that has occurred this time has a higher storage priority. Compare and judge whether.

If the storage priority of the abnormality display target that has occurred this time is lower (step S3305: NO), the abnormality information corresponding to the abnormality display target that has occurred this time is not stored in the abnormality display area 211 . As a result, in a configuration in which the number of types of abnormality display targets is greater than the number of the first to fourth unit areas 211a to 211d provided in the abnormality display area 211, information on abnormality states with high storage priority can be displayed. It becomes possible to leave it in the abnormality display area 211 .

If the storage priority of the abnormality display target that occurred this time is higher (step S3305: YES), the abnormality display area 211 is set (step S3306). In the setting process of the abnormality display area 211, which is executed when an affirmative determination is made in step S3305, in the unit areas 211a to 211d specified as storing the information of the abnormal state with the lowest storage priority, Overwrite the abnormal status information corresponding to the abnormal display target.

On the other hand, when the value of the abnormality counter of the main RAM 65 has not reached the maximum value (step S3303: NO), after adding 1 to the value of the abnormality counter (step S3307), the abnormality display area 211 is set. (step S3306). In the setting process, one area is selected from among the unit areas 211a to 211d in which information on the abnormal state is not stored in the abnormal display area 211, and the abnormal state corresponding to the abnormal display target that occurred this time is displayed in the selected area. store the information of

It should be noted that in step S3306, if there is only one piece of abnormal state information stored in the abnormal display area 211, the abnormal state information is stored in the first unit area 211a. If there are a plurality of pieces of abnormal state information stored in the n-th unit areas 211a to 211b, the abnormal state information is stored in order from the area with the smallest value of "n".

In the abnormality setting process, it is determined whether or not a cancellation event for an abnormality display target has occurred (step S3308). For example, whether or not a command has been received from the payout side CPU 92 indicating that the full tank of the lower tray 56a has been canceled, that the tank 75 has no balls, or that the payout abnormality of the payout device 76 has been canceled. judge. In addition, whether or not an abnormality cancellation operation has been performed for the occurrence of radio wave detection abnormality, whether or not an abnormality cancellation operation has been performed for the occurrence of vibration detection abnormality, or whether or not an abnormality cancellation operation has been performed for the occurrence of disconnection abnormality. judge.

If an affirmative determination is made in step S3308, the process of erasing the abnormality display area 211 is executed (step S3309). In the erasing process, it is determined whether or not the abnormal state information corresponding to the abnormal display target to be canceled this time is stored in any of the first to fourth unit areas 211a to 211d of the abnormal display area 211. , and when it is stored, the information of the abnormal state is erased by clearing "0" to the area in which it is stored. In this case, if only one piece of abnormal state information is stored in the abnormal display area 211 after erasing, the abnormal state information is stored in the first unit area 211a. When a plurality of pieces of abnormal state information are stored in the display area 211, the abnormal state information is stored in the n-th unit areas 211a to 211b in descending order of the value of "n". Also, 1 is subtracted from the value of the abnormality object counter of the main RAM 65 (step S3310).

In the abnormality setting process, it is determined whether or not an abnormality display start operation has occurred (step S3311). An error display start operation is performed by pressing the update button 68b with the game machine main body 12 opened forward from the outer frame 11 in a state where the setting state of the pachinko machine 10 is not changeable. It is done by manipulating

If an affirmative determination is made in step S3311, it is determined whether information on one or more abnormal states is stored in the abnormality display area 211 (step S3312). If the information of the abnormal state is not stored, the abnormal display on the first to fourth notification display devices 201 to 204 is not started. As a result, it is possible to prevent the abnormal display from being started even though there is no abnormal state information to be notified.

If an affirmative determination is made in step S3312, the abnormal display flag provided in the main RAM 65 is set to "1" (step S3313). The abnormal display flag stops the display corresponding to the management result of the game history, and displays the information corresponding to the abnormal state stored in the abnormality display area 211 to the first to fourth notification display devices 201 to 204. It is a flag for the main side CPU 63 to specify that it is a situation that should be performed in . Even if the abnormal display start operation is performed in a situation where the abnormal display flag is already set to "1", a negative determination is made in step S3311.

After that, a management result display stop setting process is executed (step S3314). In the stop setting process, a stop display command is sent to the management side CPU 112 to temporarily stop updating the display of the management result of the game history on the first to fourth notification display devices 201 to 204 . Upon receiving the display stop command, the management CPU 112 stops execution of the display processing (FIG. 55). However, even if the management side CPU 112 receives the display stop command, it does not set display data that is all "0" data in the first to fourth display ICs 205 to 208 . Therefore, until the display data is transmitted from the main side CPU 63 to the first to fourth display ICs 205 to 208, the display of the management result of the game history at that time is continued on the first to fourth display devices 201 to 204. be.

In the abnormality setting process, it is determined whether or not an operation to end the abnormality display has occurred (step S3315). The abnormal display termination operation is performed by pressing the reset button 68c while the gaming machine main body 12 is opened forward with respect to the outer frame 11 in a state where the setting state of the pachinko machine 10 is not changeable. It is done by manipulating If an affirmative determination is made in step S3315, the abnormal display flag of the main RAM 65 is cleared to "0" (step S3316). It should be noted that even if an operation to end the abnormal display is performed in a situation where the value of the abnormal display flag is already "0", a negative determination is made in step S3315.

After that, the management result display cancellation processing is executed (step S3317). In the cancellation cancellation process, by transmitting a cancellation cancellation command to the management side CPU 112, the state in which updating of the display of the management result of the game history on the first to fourth notification display devices 201 to 204 is canceled. Release. The management-side CPU 112 resumes the execution of the display processing (FIG. 55) by receiving the cancellation cancellation command. However, even if the management side CPU 112 receives the cancellation cancellation command, it does not set the display data that is all "0" data in the first to fourth display ICs 205 to 208 . Therefore, until the display data is transmitted from the management side CPU 112 to the first to fourth display ICs 205 to 208, the abnormal display at that time is continued on the first to fourth notification display devices 201 to 204. FIG. In addition, the management side CPU 112 continues to store the history information and to calculate various parameters even in a situation where updating of the display of the management result of the game history is stopped. It is stored in the result memory 131 . Therefore, when the state in which the update of the display of the management result of the game history is canceled, the display of the most recent management result of the game history is immediately displayed on the first to fourth notification display devices 201 to 204. It will be resumed.

In the abnormality setting process, when "1" is set in the abnormality display flag of the main RAM 65 (step S3318: YES), the abnormality display process is executed (step S3319). FIG. 64 is a flow chart showing processing for displaying an abnormality.

First, extinguishing processing of the first and second notification display devices 201 and 202 is executed (step S3401). Specifically, the display data of all “0” is output to the first and second display ICs 205 and 206 . As a result, all the display segments of the first and second notification display devices 201 and 202 are turned off, and the first and second notification display devices 201 and 202 are put into a non-display state.

After that, 1 is subtracted from the value of the update timing counter provided in the main RAM 65 (step S3402). The update timing counter is a counter for the main side CPU 63 to specify the timing for updating the display contents of the abnormality display on the first to fourth notification display devices 201 to 204 . If the value of the update timing counter is already "0", that state is maintained. After that, it is determined whether or not it is time to update the display contents of the first to fourth notification display devices 201 to 204 by determining whether or not the value of the update timing counter is "0" ( step S3403).

When an affirmative determination is made in step S3403, update processing of the display target counter provided in the main RAM 65 is executed (step S3404). In the update process, if this is the first error display process after the error display flag of the main RAM 65 was set to "1", the display object counter is set to "0". The value of the display target counter corresponds to the first to fourth unit areas 211a to 211d of the abnormality display area 211. Specifically, the value of "0" of the display target counter corresponds to the first unit area 211a. A value of "1" for the display target counter corresponds to the second unit area 211b, a value of "2" for the display target counter corresponds to the third unit area 211c, and a value of "3" for the display target counter corresponds to the second unit area 211b. ” corresponds to the fourth unit area 211d. In the updating process, if this time is not the first abnormal display process after the abnormal display flag of the main RAM 65 was set to "1", 1 is added to the value of the display object counter.

After that, it is determined whether or not abnormal state information is stored in the area corresponding to the current value of the counter to be displayed among the first to fourth unit areas 211a to 211d (step S3405). Here, as already explained, when only one piece of abnormal state information is stored, that abnormal state information is stored in the first unit area 211a, and a plurality of pieces of abnormal state information are stored. In this case, abnormal state information is stored in order from the area with the smallest value of "n" in the n-th unit areas 211a to 211b. Therefore, if no abnormal state information is stored in the area corresponding to the current value of the display target counter, abnormal state information is also stored in the area corresponding to the value greater than the display target counter value. There will be no. Also, if the value of the display target counter after adding 1 exceeds the maximum value of "3", the corresponding area does not exist in the first place, so it is treated as if the abnormal state information is not stored. .

If an affirmative determination is made in step S3405, the value of the display target counter in the main RAM 65 is cleared to "0" (step S3406). Here, it is assumed that all the abnormal states that are the targets of the abnormal display are canceled in the situation where the abnormal display is being performed. In this case, even if the abnormality display process is executed, the abnormality display area 211 does not store information on the abnormality. In such a situation, the third and fourth notification display devices 203 and 204 display that no abnormal state information is stored.

When a negative determination is made in step S3405, or when the process of step S3406 is executed, the display data to be displayed corresponding to the value of the display counter in the main RAM 65 is read out from the main ROM 64 (step S3407). Specifically, among the first to fourth unit areas 211a to 211d of the abnormality display area 211, the information stored in the area corresponding to the value of the display target counter of the main RAM 65 is read. Then, display data corresponding to the information is read from the main ROM 64 . The display data is set in a one-to-one correspondence with the information on the abnormal state, and the display contents of the third and fourth display devices 203 and 204 based on the display data are different for each type of information on the abnormal state. are different. There is also display data corresponding to the absence of abnormal state information, and this display data is different from the display data corresponding to the abnormal state information. Therefore, when there is no abnormal state information, the display contents of the third and fourth notification display devices 203 and 204 are different from those when there is abnormal state information.

On the other hand, the display contents of the display corresponding to the information of the abnormal state and the display contents of the display corresponding to the absence of the information of the abnormal state in the third and fourth notification display devices 203 and 204 The contents of display when the game history management results are displayed on the display devices 203 and 204 for notification 4 and the contents of the setting values displayed on the display device 204 for notification overlap. On the other hand, when the game history management result is displayed, all of the first to fourth notification display devices 201 to 204 are displayed, and the setting state of the pachinko machine 10 can be changed. In the state, the first to third information display devices 201 to 203 are in a non-display state and the fourth information display device 204 is in a display state, and when an abnormality is displayed, the first and second information display devices 201 and 202 are in a non-display state and the third and fourth notification display devices 203 and 204 are in a display state. It becomes possible for the manager of the game hall to grasp whether it is a display or not.

Thereafter, display control is performed on the third notification display device 203 according to the display data read out in step S3407 (step S3408), and display control is performed on the fourth notification display device 204 (step S3409). In this case, the third notification display device 203 and the fourth notification display device 203 and the fourth notification display device 203 are displayed in both cases of display corresponding to abnormal state information and display corresponding to the absence of abnormal state information. None of the display devices 204 are in a non-display state (that is, they are not in an all-lights-out state), and are in some display state.

Thereafter, a value corresponding to 2 seconds is set as a value corresponding to the next update timing in the update timing counter of the main RAM 65 (step S3410).

According to this embodiment detailed above, the following excellent effects are obtained.

In a configuration in which game history management results are displayed on the first to fourth notification display devices 201 to 204, displays corresponding to abnormal states of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. is done. As a result, the first to fourth notification display devices 201 to 204 can be used not only for displaying the management results of the game history, but also as display devices for displaying information corresponding to an abnormal state.

When the pachinko machine 10 is not in an abnormal state and the first to fourth notification display devices 201 to 204 are caused to display information corresponding to the abnormal state, the first to fourth notification display devices 201 to 204 An indication is provided corresponding to the fact that no abnormal condition has occurred. As a result, it becomes possible to clearly specify whether or not an abnormal state has occurred in the pachinko machine 10 by checking the first to fourth notification display devices 201 to 204.

A period during which the game history management results are displayed on the first to fourth notification display devices 201 to 204, and a display corresponding to the abnormal state of the pachinko machine 10 is performed on the first to fourth notification display devices 201 to 204. is distinguished from the period for which the As a result, by grasping the status of display on the first to fourth notification display devices 201 to 204, it is possible to determine which display is performed on the first to fourth notification display devices 201 to 204. It is possible to identify whether there is

When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first to fourth notification display devices 201 to 204 are arranged so that the display mode is different from the display mode when the management result of the game history is displayed. Display controlled. Thus, by grasping the display mode of the first to fourth notification display devices 201 to 204, it is possible to specify which display is performed in the first to fourth notification display devices 201 to 204. becomes possible.

A plurality of notification display devices 201 to 204 are provided. As a result, it is possible to perform a wide variety of displays as displays corresponding to the management results of the game history. In addition, due to the presence of a plurality of notification display devices 201 to 204, the display mode is enlarged depending on whether the management result of the game history is displayed or when the display corresponding to the abnormal state of the pachinko machine 10 is performed. It is possible to make a difference.

When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first and second notification display devices 201 and 202, which are not in the non-display state when displaying the management result of the game history, are in the non-display state. As a result, only by confirming whether or not the first and second notification display devices 201 and 202 are in the non-display state, the management result of the game history and the display corresponding to the abnormal state of the pachinko machine 10 can be displayed. It is possible to clearly specify which one of them is performed by the first to fourth notification display devices 201 to 204 .

When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the third and fourth notification display devices 203 and 204 are brought into the display state, and the display content is the third display in the case of displaying the management result of the game history. , and the display contents that can be displayed on the fourth notification display devices 203 and 204 . By overlapping the display contents of the third and fourth notification display devices 203 and 204 in this way, when the management result of the game history is displayed and the display corresponding to the abnormal state of the pachinko machine 10 is displayed. It becomes possible not to restrict each display content when it is performed. In addition, even if the display contents of the third and fourth notification display devices 203 and 204 can be overlapped in this way, when the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first and fourth notification display devices 203 and 204 Since the second notification display devices 201 and 202 are in a non-display state, it is possible to identify which display is being performed in the first to fourth notification display devices 201 to 204. FIG.

If an error display start operation is performed in a situation where no information on an abnormal state is stored in the error display area 211, the information on the abnormal state is displayed on the first to fourth notification display devices 201 to 204 at that time. may be configured to display corresponding to the fact that is not stored.

<Fourteenth Embodiment>
In this embodiment, the processing configuration of the management output process executed by the main CPU 63 is different from that in the first embodiment. The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

FIG. 65 is a flow chart showing management output processing in this embodiment executed by the main CPU 63 .

First, it is determined whether or not the management start flag provided in the main RAM 65 is set to "1" (step S3501). The management start flag is a flag for the main CPU 63 to specify whether history information should be stored in the history memory 117 or not. In this embodiment, the total number of game balls ejected from the game area PA after the supply of operating power to the pachinko machine 10 is started (that is, after the supply of operating power to the MPU 62 is started) is the management start reference. The history information is not stored in the history memory 117 until the number corresponding to the value or more, and when the total number of the game balls discharged from the game area PA becomes the number corresponding to the management start reference value or more. Storage of history information in history memory 117 is started. At the stage of shipment of the pachinko machine 10, the operation of the pachinko machine 10 is sometimes checked before shipment, and at that time, game balls are put in each ball entry section and the operation after that is checked. On the other hand, the history information is not stored in the history memory 117 until the total number of game balls ejected from the game area PA becomes equal to or greater than the management start reference value after the supply of operating power to the pachinko machine 10 is started. By doing so, it is possible to prevent the result of entering a ball at the time of operation check as described above from being stored as history information.

If a negative determination is made in step S3501, "7" is set in the starting control counter provided in the main RAM 65 (step S3502). The management counter at the start determines which of the seven ball entry detection sensors 42a to 48a is in a situation where the detection state of the game ball is specified in a situation where the management start flag is not set to "1". This is a counter for identification by the main CPU 63 .

After that, it is determined whether or not the output flag of the main RAM 65 corresponding to the value of the control counter at start is set to "1" (step S3503). Specifically, when the value of the management counter at the start is "7" and corresponds to the first winning hole detection sensor 42a, it is determined whether or not the first output flag is set to "1". , when the value of the management counter at the start is "6" and corresponds to the second winning opening detection sensor 43a, it is determined whether or not the second output flag is set to "1", and management at the start is performed. When the value of the counter is "5" and corresponds to the third winning hole detection sensor 44a, it is determined whether or not the third output flag is set to "1", and the value of the management counter at the start is determined. If it is "4" and corresponds to the special electric detection sensor 45a, it is determined whether or not the fourth output flag is set to "1". If it corresponds to the operating opening detection sensor 46a, it is determined whether or not the fifth output flag is set to "1". 47a, it is determined whether or not the sixth output flag is set to "1". determines whether or not the seventh output flag is set to "1". As already described, these first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

If an affirmative determination is made in step S3503, the output flag corresponding to the value of the control counter at start is cleared to "0" (step S3504). After that, 1 is added to the value of the discharged number counter provided in the main RAM 65 (step S3505). The discharge number counter is a counter for the main side CPU 63 to specify the total number of game balls discharged from the game area PA in a situation where the management start flag of the main side RAM 65 is not set to "1".

Thereafter, it is determined whether or not the value of the discharged number counter is greater than or equal to the management start reference value (step S3506). Although the management start reference value is set to "300", it is not limited to this, and may be configured to be a number less than "300" or to be a number greater than "300". .

If a negative determination is made in step S3503 or if a negative determination is made in step S3506, 1 is subtracted from the value of the control counter at the start of the main RAM 65 (step S3507). Then, it is determined whether or not the value of the start time management counter after subtracting 1 is "0" (step S3508). If a negative determination is made in step S3508, the process returns to step S3503, and if an affirmative determination is made in step S3508, this management output process ends.

On the other hand, if the value of the discharge number counter of the main RAM 65 is equal to or greater than the management start reference value (step S3506: YES), the management start flag of the main RAM 65 is set to "1" (step S3509). Thereafter, management processing is executed (step S3510). Also, if the management start flag is set to "1" and the determination in step S3501 is affirmative, the management process is executed (step S3510). The contents of the management process are the same as steps S1001 to S1012 of the management output process (FIG. 25) in the first embodiment.

According to the above configuration, the total number of game balls ejected from the game area PA after the supply of operating power to the pachinko machine 10 is started (that is, after the supply of operating power to the MPU 62 is started) is managed. History information is not stored in the history memory 117 until the total number of game balls discharged from the game area PA becomes equal to or greater than the management start reference value until the number becomes equal to or greater than the start reference value. In this case, storage of history information in history memory 117 is started. At the stage of shipment of the pachinko machine 10, the operation of the pachinko machine 10 may be checked before shipment, and at that time, game balls are put in each ball entry section and the operation after that is checked. On the other hand, the history information is not stored in the history memory 117 until the total number of game balls discharged from the game area PA after the supply of the operating power to the pachinko machine 10 is started becomes equal to or greater than the management start reference value. By doing so, it is possible to prevent the result of entering a ball or the like at the time of operation check as described above from being stored as history information.

Here, after the supply of the operating power to the pachinko machine 10 is started as described above, until the total number of game balls discharged from the game area PA reaches or exceeds the number corresponding to the management start reference value, In a configuration in which history information is not stored in the memory 117, it is impossible to calculate the management result of the game history during that period. Therefore, in such a situation, the first to fourth notification display devices 201 to 204 may be configured to display corresponding to the situation. For example, in each of the first to fourth notification display devices 201 to 204, all the display segments may be configured to emit light. Since the content of the display is not displayed either in the case of displaying the management result of the game history or in the case of displaying that the setting state of the pachinko machine 10 is changeable, it is not displayed. By checking the first to fourth notification display devices 201 to 204, it is possible to identify whether or not the history information is not stored as described above.

It should be noted that, after the supply of operating power to the pachinko machine 10 is started, depending on whether or not the setting state of the pachinko machine 10 is changeable or not, the setting mode of the information of the management start flag of the main side RAM 65 is different. It is good also as a structure which carries out. FIG. 66 is a flow chart showing the main processing in the alternative mode executed by the main side CPU 63. As shown in FIG. In steps S3601 to S3609, the same processes as steps S101 to S109 of the main process (FIG. 9) in the first embodiment are executed, and in steps S3611 to S3620, the main process (FIG. The same processing as steps S110 to S119 of 9) is executed. On the other hand, in this alternative embodiment, if the determination in step S3608 is affirmative, the management start flag of the main RAM 65 is cleared to "0" (step S3610), and after executing the processing of step S3620, the management start flag of the main RAM 65 is cleared. is set to "1" (step S3621). According to this configuration, when the processing for newly setting the setting state of the pachinko machine 10 is not executed, the total number of game balls ejected from the game area PA after the supply of the operating power to the pachinko machine 10 is started. The history information is not stored in the history memory 117 until the value becomes equal to or greater than the management start reference value, and when the processing for newly setting the setting state of the pachinko machine 10 is executed, the pachinko machine 10 is processed. The history information is stored in the history memory 117 irrespective of the number of discharged game balls after the supply of operating power is started. As a result, it is possible to manage the game history immediately after the supply of operating power to the pachinko machine 10 is started in a situation where there is a high possibility that the operation check at the shipping stage of the pachinko machine 10 is not performed.

Also, the history information is stored in the history memory 117 until the total number of game balls ejected from the game area PA after the supply of operating power to the pachinko machine 10 is started becomes equal to or greater than the management start reference value. Alternatively, an area may be provided separately from the history memory 117 for storing history information until the total number of game balls reaches or exceeds the management start reference value. Thereby, it becomes possible to specify the management result of the game history in the situation.

Also, the history information is stored in the history memory 117 until the total number of game balls ejected from the game area PA after the supply of operating power to the pachinko machine 10 is started becomes equal to or greater than the management start reference value. As a condition for generating a situation where there is no history information, a condition may be added in which supply of operating power to the pachinko machine 10 is started in a situation where history information is not stored in the history memory 117.例文帳に追加In this case, when the supply of operating power to the pachinko machine 10 is started in a situation where the history information is already stored in the history memory 117, the total number of game balls ejected from the game area PA is the management start reference. The history information is stored in the history memory 117 from the beginning regardless of whether or not the value is equal to or greater than the value.

Also, the history information is stored in the history memory 117 until the total number of game balls ejected from the game area PA after the supply of operating power to the pachinko machine 10 is started becomes equal to or greater than the management start reference value. In addition to or instead of the configuration in which there is no radio wave detection abnormality or vibration detection abnormality, the history information may not be stored in the history memory 117 until the abnormal state is cleared. As a result, it is possible to prevent history information from being stored for an event that occurred in an abnormal state.

Also, the history information is stored in the history memory 117 until the total number of game balls ejected from the game area PA after the supply of operating power to the pachinko machine 10 is started becomes equal to or greater than the management start reference value. In addition to or instead of the configuration in which the history information is not stored in the history memory 117 when the gaming machine main body 12 or the front door frame 14 is open. As a result, it is possible to prevent history information from being stored with respect to an event that occurs while the gaming machine main body 12 or the front door frame 14 is open.

<Fifteenth Embodiment>
This embodiment differs from the above-described first embodiment in the execution subject of the processing for managing the game history. The configuration that is different from the first embodiment will be described below. Note that the description of the same configuration as that of the first embodiment is basically omitted.

In the first embodiment, the management IC 66 is provided in the MPU 62, but in this embodiment, the MPU 62 is not provided with the management IC 66. FIG. Instead of providing the management IC 66, the main side CPU 63 executes the processing for managing the game history in this embodiment. In addition, in this embodiment, the main CPU 63 performs various controls by distinguishing between specific control and non-specific control. Specifically, control related to game history management is defined as non-specific control, and control other than non-specific control, including control for progressing a game based on game operations by the player, is defined as specific control.

Specifically, the specific control includes all the control by the main process (FIG. 9) that is executed when the supply of operating power to the main CPU 63 is started. Note that in the present embodiment, the recognition process (step S111), the data output process (step S112), and the setting value update signal output process (step S119) in the main process (FIG. 9) in the first embodiment are Not executed. Also in this embodiment, timer interrupt processing is periodically executed by interrupting the processing of steps S113 to S116 in the main processing (FIG. 9). All of the processes other than the management process to be described later are included in the specific control. Part of management processing is also included in specific control.

FIG. 67 is an explanatory diagram for explaining how programs and data are set in the main-side ROM 64. As shown in FIG. In correspondence with the fact that the control executed by the main side CPU 63 is classified into specific control and non-specific control, as shown in FIG. The addresses of the areas in which the data, programs for non-specific control, and data for non-specific control are stored are clearly distinguished.

Specifically, specific control programs are collectively stored in areas of consecutive addresses within the range of addresses X(1) to X(k+2). Further, addresses X(k+3) to X(k+5) consecutive to addresses X(1) to X(k+2) are addresses of unused areas in which data is not stored. Specific control data are collectively stored in areas of consecutive addresses within the range from k+6) to X(m+2). Addresses X(m+3) to X(m+5) following addresses X(k+6) to X(m+2) are addresses of unused areas in which data is not stored. m+6) to X(n+2), programs for non-specific control are collectively stored in areas of consecutive addresses. Addresses X(n+3) to X(n+5) following addresses X(m+6) to X(n+2) are addresses of unused areas in which data is not stored. n+6) to X(p+2), data for non-specific control are collectively stored in each continuous address area. The relationship between programs and data and addresses as described above is set in both physical addresses in the main ROM 64 and logical addresses on the memory map recognized by the main CPU 63 .

As described above, the specific control program and specific control data, and the non-specific control program and non-specific control data, regardless of the execution order of the processes for executing the corresponding controls, Since they are stored in areas with different ranges of addresses, when checking only a specific control program and specific control data, for example, the addresses where these specific control programs and specific control data are stored It is sufficient to check only the area of the range. For example, when checking only the program for non-specific control and the data for non-specific control, the address where the program for non-specific control and the data for non-specific control are stored. Only the area of coverage needs to be checked. Therefore, it is possible to efficiently perform work when checking programs and data by distinguishing between specific control and non-specific control. In addition, along with this, it is possible to efficiently perform the work for correcting programs and data by distinguishing between specific control and non-specific control.

No data is stored between the address range of the area in which the specific control program and specific control data are stored and the address range of the area in which the non-specific control program and non-specific control data are stored. By setting the address range of the unused area, it becomes easier to grasp the boundary between the address range for specific control and the address range for non-specific control in the checking work.

In each of the address range for specific control and the address range for non-specific control, programs and data are stored in areas of different ranges of addresses, regardless of the execution order of processes for executing the corresponding control. By doing so, it becomes possible to efficiently perform work when checking programs and data separately. In addition, since the address range of an unused area in which no data is stored is set between the address range of the area in which the program is stored and the address range of the area in which the data is stored, the program This makes it easier to grasp the boundary between the address range and the data address range during the checking work.

FIG. 68 is an explanatory diagram for explaining how each area in the main RAM 65 is set. In correspondence with the fact that the control executed by the main side CPU 63 is classified into specific control and non-specific control, as shown in FIG. The address range of the stack area 222 for non-specific control and the address range of the work area 223 for non-specific control and the address range of the stack area 224 for non-specific control are clearly distinguished.

Specifically, an area of consecutive addresses within the range of addresses Y(1) to Y(r+2) is set as a work area 221 for specific control. Addresses Y(r+3) to Y(r+5) following addresses Y(1) to Y(r+2) are addresses of unused areas. ) is set as a stack area 222 for specific control. Addresses Y(s+3) to Y(s+5) following addresses Y(r+6) to Y(s+2) are addresses of unused areas. ) is set as a work area 223 for non-specific control. Addresses Y(t+3) to Y(t+5) following addresses Y(s+6) to Y(t+2) are addresses of unused areas. ) is set as a stack area 224 for non-specific control. The relationship between each area and address as described above is set in both the physical address in the main RAM 65 and the logical address on the memory map recognized by the main CPU 63 .

Since the work area 221 for specific control and the work area 223 for non-specific control are separately set as described above, when the main CPU 63 executes the specific control and when the non-specific control is executed, Therefore, different areas of the main RAM 65 are used when executing various calculations. As a result, when one of the specific control and the non-specific control is executed, it is possible to make it difficult to cause an event in which necessary information in the main RAM 65 is erased in the other. Incidentally, when writing information to the work areas 221 and 223 and reading information from the work areas 221 and 223, the main CPU 63 executes a load command.

Since the stack area 222 for specific control and the stack area 224 for non-specific control are set separately, the main CPU 63 can determine whether the main CPU 63 executes the specific control or the non-specific control. Different areas of the main RAM 65 are used when saving the information stored in the register of the side CPU 63 and when storing the information of the return address on the program. As a result, when one of the specific control and the non-specific control is executed, when saving the information stored in the register of the main side CPU 63 and when storing the information of the return address on the program, the other can be used. It is possible to make it difficult to cause an event such as the information to be deleted to be erased. Incidentally, when writing information to the stack areas 222 and 224, the main CPU 63 issues a push instruction, and when reading information from the stack areas 222 and 224, the main CPU 63 issues a pop instruction. When reading information from each of the stack areas 222 and 224, the information written later in the stack area 222 and 224 is read first.

Here, when the main CPU 63 executes a process corresponding to the specific control, the main CPU 63 can write information to the work area 221 for specific control and the stack area 222 for specific control. Information can be read from the work area 221 for specific control and the stack area 222 for specific control. On the other hand, when the main CPU 63 executes processing corresponding to specific control, the main CPU 63 can read information from the work area 223 for non-specific control and the stack area 224 for non-specific control. , the work area 223 for non-specific control and the stack area 224 for non-specific control cannot be written. This makes it possible to prevent the information used in the process corresponding to the non-specific control from being erroneously deleted while the process corresponding to the specific control is being executed.

When the main CPU 63 executes processing corresponding to non-specific control, the main CPU 63 can write information to the work area 223 for non-specific control and the stack area 224 for non-specific control. In addition, information can be read from the work area 223 for non-specific control and the stack area 224 for non-specific control. On the other hand, when the main CPU 63 executes processing corresponding to non-specific control, although the main CPU 63 can read information from the work area 221 for specific control and the stack area 222 for specific control, Information cannot be written to the work area 221 for specific control and the stack area 222 for specific control. This makes it possible to prevent the information used in the process corresponding to the specific control from being erroneously deleted while the process corresponding to the non-specific control is being executed.

Although backup power is supplied to the main RAM 65 even after the pachinko machine 10 is powered off, the backup power includes the work area 221 for specific control, the stack area 222 for specific control, and the non-specific control. and the stack area 224 for non-specific control. As a result, the information stored in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control can be stored in the pachinko machine 10 when the power is turned off. Even afterward, the memory is retained while the backup power is being supplied.

Next, timer interrupt processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG. As in the first embodiment, the timer interrupt process is performed periodically (for example, every 4 milliseconds) while the processes of steps S113 to S116 are being performed in the main process (FIG. 9). The program corresponding to timer interrupt processing is set as a program for specific control.

In steps S3701 to S3718, the same processes as steps S301 to S318 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. Management processing is executed in step S3719 in the timer interrupt processing. When executing the management process, a subroutine program corresponding to the management process set in the specific control program is executed. is written in the stack area 222 for specific control by a push instruction. Then, when the management process is completed, information for specifying the return address is read out by a pop instruction, and the program for the timer interrupt process indicated by the return address is returned to.

FIG. 70 is a flowchart showing management processing. The processing of steps S3801 to S3805 in the management processing is executed by the main CPU 63 using the specific control program and specific control data.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S3801). This prevents the timer interrupt processing (FIG. 69), which corresponds to the specific control, from being interrupted and started in the middle of the management execution processing (described later), which corresponds to the non-specific control. becomes possible.

Thereafter, as "PUSH PSW", the information in the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S3802). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes according to the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the program of the subroutine corresponding to the management execution process is started, the flag register information in the state before the subroutine is called or changed after the subroutine is started can be saved. It becomes possible to save to the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

After that, the management execution processing is started by reading out the subroutine program corresponding to the management execution processing set in the non-specific control program (step S3803). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push command. Then, when the management execution process is completed, information for specifying the return address is read by the pop command, and the program for the management process indicated by the return address is returned to.

When returning to the management processing program after executing the management execution processing, the information of the flag register saved in the stack area 222 for specific control in step S3802 is transferred to the main CPU 63 as "POP PSW" by the pop instruction. flag register (step S3804). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S3802 was executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, in order to switch from the state in which the occurrence of timer interrupt processing (FIG. 69) is prohibited to the state in which it is permitted, interrupt permission is set (step S3805). This enables a new execution of timer interrupt processing.

FIG. 71 is a flow chart showing management execution processing. Note that the processing of steps S3901 to S3915 in the management execution processing is executed by the main CPU 63 using a non-specific control program and non-specific control data.

First, as "LD SP, Y(u+2)", Y(u+2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S3901). The stack pointer is an area in which address information is set for the main CPU 63 to specify a storage area to which information is to be written by a push instruction in the stack areas 222 and 224 . Each time a push instruction is performed, the stack pointer information is updated to the address information of the storage area to be written in the next order, and each time a pop instruction is performed, the stack pointer information is updated to the previous order to be written is updated to the information of the address of the storage area. When the stack area 224 for non-specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 224 for non-specific control, and each time the information to be stored is added. Then, the storage area of the storage destination is changed toward the first address side in the stack area 224 for non-specific control. Therefore, in step S3901, the information of the last address in stack area 224 for non-specific control is set in the stack pointer. The fact that information is stored from the storage area of the last address to the storage area of the first address in this way is also the same for the stack area 222 for specific control.

Incidentally, in both the stack area 222 for specific control and the stack area 224 for non-specific control, if a push instruction is additionally executed even though information is set in all storage areas, All areas of the main side RAM 65 are cleared to "0" assuming that an abnormality has occurred in the storage process. As a result, it is possible to prevent the game from proceeding despite the occurrence of an abnormality in the memory processing.

Thereafter, as "LD (_WABUF), WA", the information in the WA register of the main CPU 63 is saved in the WA buffer set in the non-specific control work area 223 by the load instruction (step S3902). Also, as "LD (_BCBUF), BC", the information in the BC register of the main CPU 63 is saved in the BC buffer set in the non-specific control work area 223 by the load instruction (step S3903). Also, "LD
(_DEBUF), DE", the information in the DE register of the main CPU 63 is saved in the DE buffer set in the non-specific control work area 223 by the load instruction (step S3904). Also, as "LD (_HLBUF), HL", the information in the HL register of the main CPU 63 is saved in the HL buffer set in the non-specific control work area 223 by the load instruction (step S3905). Also, as "LD (_IXBUF), IX", the information in the IX register of the main CPU 63 is saved in the IX buffer set in the non-specific control work area 223 by the load instruction (step S3906). Also, as "LD (_IYBUF), IY", the information in the IY register of the main CPU 63 is saved in the IY buffer set in the non-specific control work area 223 by the load instruction (step S3907).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the already-described flag registers. In this case, in steps S3902 to S3907, each information of the WA register, BC register, DE register, HL register, IX register and IY register, which are some of these general-purpose registers, auxiliary registers and index registers is saved in the corresponding buffer in the work area 223 for non-specific control. The information amount of each of the WA register, BC register, DE register, HL register, IX register and IY register is 2 bytes.

These WA register, BC register, DE register, HL register, IX register and IY register are registers used in check processing (step S3908) which is processing corresponding to non-specific control. By saving the information set in such registers to the non-specific control work area 223 prior to the execution of the check process (step S3908), the information of these registers used for specific control can be transferred to the non-specific control. can be evacuated before is started. Therefore, even if these registers are overwritten during the non-specific control, the information saved in the work area 223 for non-specific control is returned to these registers when the non-specific control is terminated. can be returned to the state corresponding to the specific control before the non-specific control is executed.

In addition, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers in the work area 223 for non-specific control, the WA to be used in the check process, which is the process corresponding to the non-specific control By selectively saving the information of the registers, BC register, DE register, HL register, IX register and IY register to the non-specific control work area 223, the register information is saved in the non-specific control work area 223. It is possible to suppress the capacity to be ensured in order to Therefore, it is possible to save the above register information while securing a large capacity of the non-specific control work area 223 that can be used for the check processing. Of course, of the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63, registers other than the WA register, BC register, DE register, HL register, IX register, and IY register support non-specific control. The information set before the start of the processing to be performed is stored and retained until the processing corresponding to the non-specific control ends and the processing corresponding to the specific control is restarted.

In addition, by saving register information in the work area 223 for non-specific control instead of saving it in the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be reduced accordingly. It becomes possible. Also, when using the stack area 224 for non-specific control, as already explained, information is written in the order in which later information is read out first. Otherwise, all subsequent read order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the occurrence of the above event even when there is a large amount of information to be saved. .

After executing the processing of steps S3902 to S3907, check processing is executed (step S3908). When executing the check processing, a subroutine program corresponding to the check processing set in the non-specific control program is executed. Information for specifying the return address of the execution process is written in the non-specific control stack area 224 by the push instruction. Then, when the check process is completed, information for specifying the return address is read by the pop instruction, and the program of the management execution process indicated by the return address is returned to. Details of the check processing will be described later.

After executing the check process, Y(r+α) is set in the stack pointer of the main side CPU 63 as a fixed address when returning to the specific control by a load instruction as "LD SP, Y(r+α)" (step S3909). ). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

The amount of information stored in the stack area 222 for specific control is always constant immediately before the subroutine of the management execution process is executed in step S3803 of the management process (FIG. 70). The information of the stack pointer of the side CPU 63 (that is, the value of the stack pointer) is constant. In this case, the information stored in the specific control stack area 222 includes, for example, information on the return address of the management process (FIG. 70) after the management execution process (FIG. 71) ends, and the management process ( 70) is completed, the information of the return address of the timer interrupt processing (FIG. 69) can be mentioned. The constant information of the stack pointer is Y(r+α). Therefore, when the check process, which is the process corresponding to the non-specific control, is completed and the process corresponding to the specific control is resumed, Y(r+α), which is the constant information, is set in the stack pointer of the main CPU 63. This makes it possible to restore the information of the stack pointer to the information immediately before the process corresponding to non-specific control is started. By setting the fixed information in the stack pointer in this way, the information of the stack pointer is restored to the information immediately before the processing corresponding to the non-specific control is started, so that the processing corresponding to the non-specific control It becomes unnecessary to save the information of the stack pointer of the main side CPU 63 corresponding to the specific control to the main side RAM 65 before starting the control. Therefore, it is possible to reduce the processing load and eliminate the need to secure an area for saving in the main RAM 65 .

Thereafter, as "LD WA, (_WABUF)", the WA register of the main CPU 63 is overwritten with the information saved in the WA buffer of the non-specific control work area 223 by the load instruction (step S3910). Also, as "LD BC, (_BCBUF)", the BC register of the main CPU 63 is overwritten with the information saved in the BC buffer of the non-specific control work area 223 by the load instruction (step S3911). Also, as "LD DE, (_DEBUF)", the DE register of the main CPU 63 is overwritten with the information saved in the DE buffer of the non-specific control work area 223 by the load instruction (step S3912). Also, as "LD HL, (_HLBUF)", the HL register of the main CPU 63 is overwritten with the information saved in the HL buffer of the non-specific control work area 223 by the load instruction (step S3913). Also, as "LD IX, (_IXBUF)", the IX register of the main CPU 63 is overwritten with the information saved in the IX buffer of the non-specific control work area 223 by the load instruction (step S3914). Also, as "LD IY, (_IYBUF)", the IY register of the main CPU 63 is overwritten with the information saved in the IY buffer of the non-specific control work area 223 by the load instruction (step S3915). By executing the processing of steps S3910 to S3915, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63. It is possible to restore the information corresponding to the specific control immediately before the control.

Here, the information stored in the flag register and various registers of the main CPU 63 when the process corresponding to the non-specific control is executed is not saved in the main RAM 65 when the process corresponding to the specific control is restarted. . This eliminates the need to secure a storage area for saving the above information in the work area 221 for specific control and the stack area 222 for specific control.

In addition, information stored in the flag register and various registers of the main CPU 63 when processing corresponding to non-specific control is executed may be changed after returning to processing corresponding to specific control. This information is not used when restarting. In other words, information necessary for a plurality of times of processing corresponding to non-specific control executed with processing corresponding to specific control in between is stored in the work area 223 for non-specific control or the stack area for non-specific control. 224 and not stored in the flag register and various registers of the main CPU 63 . Therefore, even if the information stored in the flag register and various registers of the main side CPU 63 is not saved in the main side RAM 65 when the processing corresponding to the non-specific control is executed, the processing corresponding to the non-specific control is executed. no problem with

Next, the check processing executed by calling the subroutine program in step S3908 will be described. In the check process, a process for collecting game history information, a process for deriving the management result of the game history, and a process for notifying the management result are executed. That is, the processing for collecting game history information, the processing for deriving the management result of the game history, and the processing for notifying the management result are executed as processing corresponding to non-specific control.

Before explaining the check process, the contents of various areas 231 to 234 of the non-specific control work area 223 used to manage the game history will be explained. FIG. 72 is an explanatory diagram for explaining various areas 231 to 234 of the work area 223 for non-specific control used for managing game histories.

The non-specific control work area 223 is provided with a normal counter area 231 , an opening/closing execution mode counter area 232 , and a high-frequency support mode counter area 233 . Each of these areas 231 to 233 includes general winning counters 231a, 232a, 233a, special electric winning counters 231b, 232b, 233b, first operation counters 231c, 232c, 233c, second operation counters 231d, 232d, 233d, and Out counters 231e, 232e, and 233e are provided. The general winning counters 231a, 232a, 233a are counters for measuring the number of game balls entered into the general winning opening 31 from a predetermined measurement start timing. The special electric prize-winning counters 231b, 232b, and 233b are counters for measuring the number of game balls entering the special electric prize-winning device 32 from a predetermined measurement start timing. The first operation counters 231c, 232c, 233c are counters for measuring the number of game balls entered into the first operation opening 33 from a predetermined measurement start timing. The second operation counters 231d, 232d, and 233d are counters for measuring the number of game balls entering the second operation opening 34 from a predetermined measurement start timing. The out counters 231e, 232e, 233e are counters for measuring the number of game balls entered into the out port 24a from a predetermined measurement start timing.

Each of the counters 231a to 231e in the normal counter area 231 is in a state in which the front door frame 14 is in a closed state and neither in the opening/closing execution mode nor in the high-frequency support mode. It is used to count the number of game balls entered in 31-34. Each of the counters 232a to 232e in the open/close execution mode counter area 232 is in the state in which the front door frame 14 is in the closed state and the open/close execution mode is in the target ball entry portion 24a, 31 to 34. It is used to count the number of game balls thrown. Each of the counters 233a to 233e in the high-frequency support mode counter area 233 is the target ball entry portion 24a, 31 to 34 when the front door frame 14 is closed and the high-frequency support mode is set. It is used to count the number of game balls entered in the .

The reason why the state in which the front door frame 14 is open is not subject to measurement is that when the front door frame 14 is open, the game balls enter the ball entry portions 24a, 31 to 34 by maintenance. This is in order to exclude the number of balls entered in the case where the number is counted. However, the present invention is not limited to this, and the state in which the front door frame 14 is in the open state may also be measured in the same manner as the state in which the front door frame 14 is in the closed state.

In addition to the normal counter area 231 , open/close execution mode counter area 232 , and high-frequency support mode counter area 233 , the non-specific control work area 223 includes a calculation result storage area 234 . The calculation result storage area 234 is an area for storing information on the game history management results calculated using the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233. . The information of the management result of the game history stored in the calculation result storage area 234 is stored and held until the newly calculated information of the management result of the game history is overwritten by the newly calculated information.

FIG. 73 is a flow chart showing the check processing executed by calling the subroutine program in step S3908. Note that the processing of steps S4001 to S4008 in the check processing, including subroutine processing, is executed by the main CPU 63 using a program for non-specific control and data for non-specific control. When executing a subroutine process, the return address information after execution of the subroutine process is written in the storage area corresponding to the current stack pointer value of the main CPU 63 in the non-specific control stack area 224. At the same time, the value of the stack pointer is updated to the information of the address of the next memory area to be stored. Further, when the processing of the subroutine is completed, the return address information is read from the storage area corresponding to the previous value with respect to the current stack pointer value of the main side CPU 63, and the return address information is corresponded. While returning to the program, the value of the stack pointer is updated to the information of the address of the storage area from which the information of the return address was read.

In the check process, if the front door frame 14 is open (step S4001: YES), the normal ball entry management process (step S4004), the ball entry management process during the opening/closing execution mode (step S4005), and the high frequency Result calculation processing (step S4007) and display processing (step S4008), which will be described later, are executed without executing any of the incoming ball management processing (step S4006) during the support mode. Since the game area PA is formed by the space partitioned in the front and rear by the back surface of the window panel 52 provided on the front door frame 14 and the front surface of the game board 24, when the front door frame 14 is in an open state, Even if the game area PA is opened forward and a game ball is shot toward the game area PA in this situation, the game ball cannot flow down the game area PA normally. In addition, when a game ball enters the ball entry portions 24a, 31 to 34 while the front door frame 14 is in an open state, the game hall administrator may This is the case where the front door frame 14 is in an open state and a game ball enters due to maintenance or the like. Since such a game ball entry is not a game ball entry in a regular game execution situation, there is no need to manage such a game ball entry. Therefore, in the check process, when the front door frame 14 is in the open state as described above, none of the processes in steps S4004 to S4006 are executed.

If the front door frame 14 is closed and neither the opening/closing execution mode nor the high-frequency support mode is set (steps S4001 to S4003: NO), normal ball entry management processing is executed (step S4004). If the front door frame 14 is in the closed state and the opening/closing execution mode is set (step S4001: NO, step S4002: YES), ball entry management processing during the opening/closing execution mode is executed (step S4005). If the front door frame 14 is in the closed state and the high frequency support mode is set (step S4001: NO, step S4003: YES), ball entry management processing during the high frequency support mode is executed (step S4006).

FIG. 74 is a flowchart showing normal ball entry management processing in step S4004.

When it is determined that one game ball has been detected by the first winning hole detection sensor 42a (step S4101: YES), that is, the signal received from the first winning hole detection sensor 42a switches from the LOW level to the HI level. If it is confirmed that it has changed, if it is determined that one game ball has been detected by the second winning opening detection sensor 43a (step S4103: YES), that is, the signal received from the second winning opening detection sensor 43a When it is confirmed that is switched from the LOW level to the HI level, or when it is determined that one game ball is detected by the third winning hole detection sensor 44a (step S4105: YES), that is, the third winning hole When it is confirmed that the signal received from the detection sensor 44a has switched from LOW level to HI level, 1 is added to the value of the normal winning counter 231a (steps S4102, S4104, S4106).

In the opening/closing execution mode entry ball management process, as processing corresponding to steps S4102, S4104 and S4106, 1 is added to the value of the general prize winning counter 232a for the opening/closing execution mode, and entry in the high frequency support mode is performed. If it is ball management processing, 1 is added to the value of the general winning counter 233a for the high frequency support mode as processing corresponding to steps S4102, S4104 and S4106. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to specific control, the detection results of the first to third winning opening detection sensors 42a to 44a are monitored. When it is determined that one game ball is detected by any one of the first to third winning opening detection sensors 42a to 44a, a process for paying out the number of game balls corresponding to the general winning opening 31. to run.

If it is determined that one game ball has been detected by the special electric detection sensor 45a (step S4107: YES), that is, it has been confirmed that the signal received from the special electric detection sensor 45a has switched from the LOW level to the HI level. In this case, 1 is added to the value of the special electric winning counter 231b for normal use (step S4108).

In the case of ball entry management processing during the opening/closing execution mode, 1 is added to the value of the special electric winning counter 232b for the opening/closing execution mode as processing corresponding to step S4108, and in the case of ball entry management processing during the high-frequency support mode, As processing corresponding to step S4108, 1 is added to the value of the special electric winning counter 233b for the high frequency support mode. Also, in the entering ball detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to the specific control, the detection result of the special electric detection sensor 45a is monitored. When it is determined that the game balls are detected, a process for putting out the game balls of the number corresponding to the special electric prize winning device 32 is executed and a process for specifying the timing for ending the round game is executed.

When it is determined that one game ball has been detected by the first working opening detection sensor 46a (step S4109: YES), that is, the signal received from the first working opening detecting sensor 46a is switched from the LOW level to the HI level. When the change is confirmed, 1 is added to the value of the first operation counter 231c for normal use (step S4110).

If the entry management process is in the opening/closing execution mode, 1 is added to the value of the first operation counter 232c for the opening/closing execution mode as a process corresponding to step S4110, and if the entry management process is in the high-frequency support mode, For example, as processing corresponding to step S4110, 1 is added to the value of the first operation counter 233c for the high frequency support mode. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as a process corresponding to specific control, the detection result of the first working opening detection sensor 46a is monitored. When it is determined that one game ball is detected at 46a, a process is executed so that the number of game balls corresponding to the first operation opening 33 are paid out, and reservation information for a special figure is acquired. Execute processing to identify the trigger.

When it is determined that one game ball has been detected by the second operation opening detection sensor 47a (step S4111: YES), that is, the signal received from the second operation opening detection sensor 47a is switched from the LOW level to the HI level. When it is confirmed that it has been changed, 1 is added to the value of the second operation counter 231d for normal use (step S4112).

If the entry management process is in the opening/closing execution mode, 1 is added to the value of the second operation counter 232d for the opening/closing execution mode as a process corresponding to step S4112, and if the entry management process is in the high-frequency support mode, For example, as processing corresponding to step S4112, 1 is added to the value of the second operation counter 233d for the high frequency support mode. Also, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, the detection result of the second working opening detection sensor 47a is monitored. When it is determined that one game ball has been detected at 47a, a process is executed so that the number of game balls corresponding to the second operation opening 34 are paid out, and reservation information for a special figure is acquired. Execute processing to identify the trigger.

When it is determined that one game ball has been detected by the outlet detection sensor 48a (step S4113: YES), that is, it indicates that the signal received from the outlet detection sensor 48a has switched from the LOW level to the HI level. If confirmed, the value of the out counter 231e for normal use is incremented by 1 (step S4114).

If the incoming ball management process is in the opening/closing execution mode, 1 is added to the value of the out counter 232e for the opening/closing execution mode as a process corresponding to step S4114, and if the incoming ball management process is in the high-frequency support mode, step S4114 is performed. As a process corresponding to S4114, 1 is added to the value of the high-frequency support mode out counter 233e. Further, in the entering ball detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, the detection result of the outlet detection sensor 48a is not monitored.

By executing the processing of steps S4004 to S4006 as described above, the number of game balls entering the general winning opening 31 is measured using the general winning counters 231a, 232a, and 233a, and the special electric winning device 32 The number of game balls entering the game ball is measured using special electric winning counters 231b, 232b, 233b, and the number of game balls entering the first operation opening 33 is measured using the first operation counters 231c, 232c, 233c. The number of game balls entering the second operation opening 34 is measured using second operation counters 231d, 232d, and 233d, and the number of game balls entering the out opening 24a is counted by the out counter 231e, 232e and 233e. As a result, the main side CPU 63 can grasp the ball entry history to each of the ball entry portions 24a, 31-34. In addition, since the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 are separately provided, a situation in which neither the opening/closing execution mode nor the high-frequency support mode is used. , the main side CPU 63 can grasp the ball entry history to each of the ball entry sections 24a, 31 to 34 by distinguishing between the opening/closing execution mode and the high-frequency support mode.

Returning to the description of the check processing (FIG. 73), if the determination in step S4001 is affirmative, the processing in step S4004 is executed, the processing in step S4005 is executed, or the processing in step S4006 is executed, step Result calculation processing is executed in S4007, and display processing is executed in step S4008.

FIG. 75 is a flow chart showing result calculation processing in step S4007.

First, it is determined whether or not the management start flag provided in the non-specific control work area 223 is set to "1" (step S4201). The management start flag is a flag for the main side CPU 63 to specify whether or not it is a situation in which game history collection for calculating a game history management result should be executed. In this embodiment, when the supply of operating power to the pachinko machine 10 is started for the first time after the pachinko machine 10 is manufactured (that is, when the supply of operating power to the MPU 62 is started), the game discharged from the game area PA Until the total number of balls reaches or exceeds the number corresponding to the management start reference value, the total number of game balls discharged from the game area PA is not executed to collect the game history for calculating the management result of the game history. is equal to or greater than the number corresponding to the management start reference value, game history collection is executed for calculating the management result of the game history. At the stage of shipment of the pachinko machine 10, the operation of the pachinko machine 10 is sometimes checked before shipment, and at that time, game balls are put in each ball entry section and the operation after that is checked. On the other hand, until the total number of game balls ejected from the game area PA becomes equal to or greater than the management start reference value after the supply of the operating power to the pachinko machine 10 is started, the game for calculating the management result of the game history is performed. By disabling the execution of history collection, it is possible to prevent collection of the game history for calculating the game history management result, such as the ball entry result at the time of the operation check as described above. Become.

Here, when the supply of operating power to the pachinko machine 10 is started for the first time after the pachinko machine 10 is manufactured (that is, when the supply of operating power to the MPU 62 is started), the value of the management start flag is "0". It has become. In this case, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the open/close execution mode counter area 232, and the values of the counters 233a to 233e of the high frequency support mode counter area 233 is also "0". On the other hand, in a situation where the value of the management start flag is "1", the supply of operating power to the pachinko machine 10 is stopped, and then in a situation in which backup power is supplied to the main side RAM 65, the operating power to the pachinko machine 10 is supplied. is started, the value of the management start flag remains "1". In this case, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the open/close execution mode counter area 232, and the values of the counters 233a to 233e of the high frequency support mode counter area 233 is maintained in the state before the supply of operating power to the pachinko machine 10 is stopped. With the above configuration, when the value of the management start flag is "0", the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the open/close execution mode counter area 232, And the values of the respective counters 233a to 233e in the high frequency support mode counter area 233 are also "0".

Incidentally, when the main-side RAM 65 is cleared at step S105 or step S117 in the main process (FIG. 9), the objects to be cleared are the work area 221 for specific control and the stack for specific control. The area 222, the work area 223 for non-specific control, and the stack area 224 for non-specific control are excluded from the clear processing targets. As a result, the manager of the game hall cannot intentionally clear the work area 223 for non-specific control and the stack area 224 for non-specific control to "0".

In addition, the main CPU 63 checks whether or not an abnormality has occurred in the work area 223 for non-specific control and the stack area 224 for non-specific control in timer interrupt processing (FIG. 69) described later, and confirms whether or not an abnormality has occurred. is confirmed, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". This makes it possible to initialize the work area 223 for non-specific control and the stack area 224 for non-specific control when an abnormality occurs. In addition, when an abnormality occurs in the work area 223 for non-specific control in this configuration, the work area 223 for non-specific control is cleared to "0" without clearing the stack area 224 for non-specific control to "0". However, when an abnormality occurs in the stack area 224 for non-specific control, the stack area 224 for non-specific control is cleared to "0" without clearing the work area 223 for non-specific control to "0". good too. Further, even if an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, the calculation result storage area 234 may be configured to be excluded from being cleared to "0".

If a negative determination is made in step S4201, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the open/close execution mode counter area 232, and the high frequency support mode counter area 233 The total number is calculated by adding up all the values of the counters 233a to 233e (step S4202). Then, it is determined whether or not the calculated total number is greater than the management start reference value of "300" (step S4203).

If an affirmative determination is made in step S4203, the management start flag of the non-specific control work area 223 is set to "1" (step S4204). Also, the counters 231a to 231e of the normal counter area 231, the counters 232a to 232e of the open/close execution mode counter area 232, and the counters 233a to 233e of the high frequency support mode counter area 233 are all cleared to "0". (Step S4205). As a result, the total number of game balls ejected from the game area PA after the supply of the operating power to the pachinko machine 10 is started (that is, after the supply of the operating power to the MPU 62 is started) is the management start reference value. All the game history information collected until the number corresponding to or more is reached is deleted. Therefore, until the total number of game balls ejected from the game area PA becomes equal to or greater than the management start reference value after the supply of operating power to the pachinko machine 10 is started, game history collection for calculating the game history management result is performed. can be prevented from executing.

If an affirmative determination is made in step S4201, the total number is calculated as in step S4202 (step S4206). That is, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the open/close execution mode counter area 232, and the values of the counters 233a to 233e of the high frequency support mode counter area 233 are The total number is calculated by totaling all. Then, it is determined whether or not the calculated total number is equal to or greater than "6000", which is the calculation reference number (step S4207).

If an affirmative determination is made in step S4207, various parameters are calculated (step S4208). Specifically, the values of the various counters 231a to 231e in the normal counter area 231 are set to K61 to K65, the values of the various counters 232a to 232e in the opening/closing execution mode counter area 232 are set to K71 to K75, and the values of the counters 232a to 232e are set to K71 to K75. The following 61st to 68th parameters are calculated when the values of the various counters 233a to 233e in the counter area 233 are K81 to K85.
61st parameter: Total number of game balls to be paid out (“K61+K71+K81”דNumber of prize balls for winning in general prize winning port 31”+“K62+K72+K82”דNumber of prize balls for winning in special electric prize winning device 32”+“K63+K73+K83” ”דNumber of prize balls for winning in the first operating port 33”+“K64+K74+K84”דNumber of prize balls for winning in the second operating port 34”)/Total number of game balls discharged from the skill area PA ( K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) ratio 62nd parameter: Total number of game balls paid out during normal operation (K61 x "number of prize balls for winning in general winning gate 31" + K62 x "number of winning balls in winning to special electric winning device 32" + K63 x "number of prize balls for winning to first operating port 33" + K64 x "number of winning balls for winning to second operating port 34") / total number of game balls discharged from skill area PA during normal operation (K61 + K62 + K63 + K64 + K65) ) Ratio 63rd parameter: Total number of game balls paid out during open/close execution mode (K71 x “Number of prize balls for winning in general winning port 31” + K72 x “Number of prize balls for winning in special electric winning device 32” + K73 x "number of prize balls for winning the first operating port 33" + K74 x "number of winning balls for winning to the second operating port 34") / total number of game balls discharged from the skill area PA in the open/close execution mode Ratio of number (K71 + K72 + K73 + K74 + K75) 64th parameter: Total number of game balls paid out during high-frequency support mode (K81 x "number of prize balls for winning to general winning port 31" + K82 x "for winning to special electric winning device 32 Number of prize balls" + K83 x "Number of prize balls for winning in the first operation port 33" + K84 x "Number of prize balls for winning in the second operation port 34") / Discharged from technique area PA in high frequency support mode Ratio of the total number of game balls (K81 + K82 + K83 + K84 + K85) 65th parameter: the ratio of the total number of game balls entering the general winning hole 31 (K61 + K71 + K81) / the total number of game balls discharged from the game area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K8 + K8 + K8 + K8 + K83 + K83)・ 66th parameter: total number of game balls entering the first operation port 33 (K63 + K73 + K8 3) / Percentage of the total number of game balls discharged from the game area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) 67th parameter: ("K62 + K72 + K82" x "number of prize balls for winning to the special electric winning device 32" x 4 + "K84 + K7" 2 Number of prize balls for winning to operation port 34”) / Total number of game balls paid out (“K61 + K71 + K81” x “Number of prize balls for winning to general winning port 31” + “K62 + K72 + K82” x “To special electric winning device 32 Number of prize balls for winning" + "K63 + K73 + K83" x "Number of prize balls for winning to the first operating port 33" + "K64 + K74 + K84" x "Number of prize balls for winning to the second operating port 34") ratio ・68th Parameter: "K62 + K72 + K82" x "Number of prize balls for winning to special electric prize winning device 32" / Total number of game balls paid out ("K61 + K71 + K81" x "Number of prize balls for winning to general winning port 31" + "K62 + K72 + K82" x ""Number of prize balls for winning to special electric prize winning device 32" + "K63 + K73 + K83" x "Number of prize balls for winning to first operation opening 33" + "K64 + K74 + K84" x "Number of prize balls for winning to second operation opening 34" ) After that, the calculation result storage area 234 is overwritten with the 61st to 68th parameters calculated in step S4208 (step S4209). In this case, the 61st to 68th parameters of the calculation result of the previous processing that have already been stored in the calculation result storage area 234 are deleted. Since backup power is supplied to the main RAM 65 even when the supply of operating power to the pachinko machine 10 is stopped, if the backup power is supplied, the pachinko machine 10 Information of the 61st to 68th parameters calculated before the supply of the operating power to the pachinko machine 10 is stopped is stored in the calculation result storage area 234 even immediately after the supply of the operating power is started.

After that, the counters 231a to 231e of the normal counter area 231, the counters 232a to 232e of the open/close execution mode counter area 232, and the counters 233a to 233e of the high frequency support mode counter area 233 are all cleared to "0". (Step S4210). As a result, it is possible to once erase the game history information at the moment when the 61st to 68th parameters are calculated.

It should be noted that immediately after the management start flag is set to "1", when the total number of game balls discharged from the game area PA is equal to or greater than the value obtained by subtracting the management start reference value from the calculation reference number, steps S4208 to The processing of step S4210 may be executed, and then the processing of steps S4208 to S4210 may be executed when the total number of game balls ejected from the game area PA becomes equal to or greater than the calculation reference number.

FIG. 76 is a flow chart showing display processing in step S4008 in the check processing (FIG. 73).

First, the value of the update timing counter provided in the non-specific control work area 223 is subtracted by 1 (step S4301). The update timing counter is a counter for the main side CPU 63 to specify the timing of updating the display contents of the game history management results on the first to third notification display devices 69a to 69c. The main CPU 63 notifies the calculation results of the 61st to 68th parameters by controlling the display of the first to third notification display devices 69a to 69c. In this case, information corresponding to the type of parameter to be notified is displayed on the first notification display device 69a. Further, of the value obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the ones place is displayed for the third notification display. Displayed on device 69c. In the first to third notification display devices 69a to 69c, the displays corresponding to the calculation results of the 61st to 68th parameters are sequentially switched according to a predetermined order, and the display target of the last order is displayed. After the calculation result of the 68th parameter is displayed, the calculation result of the 61st parameter, which is the first display target, is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 10 seconds.

Here, the calculation cycle of the 61st to 68th parameters in the main CPU 63 is 60 minutes at the shortest. On the other hand, the number of the 61st to 68th parameters is 8, and the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Therefore, the 61st to 68th parameters calculated by the main CPU 63 are displayed on the first to third display devices 69a to 69c at least once.

When the processing of step S4301 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether or not the value of the update timing counter after subtracting 1 is "0". It is determined whether or not it is time to do so (step S4302). When an affirmative determination is made in step S4302, 1 is added to the value of the display object counter provided in the work area 223 for non-specific control (step S4303). When the value of the display target counter after adding 1 exceeds the maximum value of "7" (step S4304: YES), the value of the display target counter is cleared to "0" (step S4305).

The display target counter is a counter for the main CPU 63 to specify the type of parameter to be displayed on the first to third notification display devices 69a to 69c. There is a one-to-one correspondence between the 61st to 68th parameters and the possible values of the display target counters "0" to "7". For example, when the value of the display object counter is "0", the 61st parameter, which is the first display object, becomes the display object of the first to third notification display devices 69a to 69c, and the value of the display object counter is "7". , the 68th parameter, which is the last display object, becomes the display object of the first to third notification display devices 69a to 69c.

When a negative determination is made in step S4304, or when the process of step S4305 is executed, the first notification display device 69a is displayed so as to display information corresponding to the type of parameter corresponding to the value of the counter to be displayed. control (step S4306). Further, a parameter corresponding to the value of the counter to be displayed is read from the calculation result storage area 234, the read parameter is multiplied by 100, and a number corresponding to the tens place is displayed on the second notification display device 69b, A number corresponding to the ones place is displayed on the third notification display device 69c (step S4307).

Here, a display IC is provided corresponding to each of the first to third notification display devices 69a to 69c. In step S4306, the main CPU 63 outputs display data to the display IC corresponding to the first notification display device 69a, and in step S4307, the main CPU 63 outputs the display data to the display IC corresponding to the second notification display device 69b and the third notification. Display data is output to each of the display ICs corresponding to the display device 69c. These display ICs can store display data when operating power is supplied, and display contents corresponding to the stored display data are continuously displayed on the corresponding notification display devices 69a to 69c. display. By changing the display data by the main side CPU 63, the display of the notification display devices 69a to 69c is changed to display contents corresponding to the changed display data. As a result, even after the management execution process (FIG. 71), which is the process corresponding to the non-specific control, ends and returns to the process corresponding to the specific control, the execution status of the process corresponding to the non-specific control is set The display corresponding to the display data is continued on the first to third notification display devices 69a to 69c.

Thereafter, a value corresponding to 10 seconds is set as a value corresponding to the next update timing in the update timing counter of the work area 223 for non-specific control (step S4308).

By executing the display processing as described above, when the supply of operating power to the main CPU 63 is started, the management result of the game history is displayed on the first to third notification display devices 69a to 69c. be done. The display of the management result of the game history is performed regardless of whether the game is continued or not. This is done regardless of whether it is visible or not. Thus, by executing the display control of the first to third information display devices 69a to 69c regardless of the game situation and the state of the pachinko machine 10, the first to third information display devices 69a 69c can be simplified.

According to this embodiment detailed above, the following excellent effects are obtained.

The main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, and a work area 223 for non-specific control and a stack area 224 for non-specific control. The work area 221 for specific control and the stack area 222 for specific control are used when processing corresponding to specific control is executed by the main CPU 63 using a program for specific control and data for specific control. In addition, the main CPU 63 executes processing corresponding to non-specific control using a program for non-specific control and data for non-specific control. In this case, it is possible to read the information, but it is impossible to store the information. In addition, the work area 223 for non-specific control and the stack area 224 for non-specific control can store and read information when processing corresponding to non-specific control is executed by the main CPU 63. On the other hand, when the processing corresponding to the specific control is executed by the main CPU 63, although the information can be read, the information cannot be stored. As a result, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to the specific control, and the work area 223 for non-specific control and the stack area for non-specific control 224 can be treated as a dedicated storage area for processing corresponding to non-specific control. Therefore, it is possible to clearly differentiate the storage destination of information in the main RAM 65 between the process corresponding to the specific control and the process corresponding to the non-specific control. Therefore, it is possible to prevent the information used in one of the processing corresponding to the specific control and the processing corresponding to the non-specific control from being erased when the other processing is executed.

The processing corresponding to specific control includes processing for controlling the progress of the game, and the processing corresponding to non-specific control includes processing for managing game history. As described above, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to specific control, and the work area 223 for non-specific control and the stack area 222 for non-specific control The stack area 224 of is treated as a dedicated storage area for processing corresponding to non-specific control. As a result, information used in processing for managing the game history, such as the normal counter area 231, the opening/closing execution mode counter area 232, the high frequency support mode, and the information used in the processing for managing the game history, when the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the counter area 233 and the calculation result storage area 234 from being rewritten.

The main RAM 65 is provided with a normal counter area 231 in which information for managing the game history is stored, an opening/closing execution mode counter area 232, a high frequency support mode counter area 233, and a calculation result storage area 234. This allows the main CPU 63 to complete the processing for managing the game history. In addition, it is possible to prevent unauthorized access to and unauthorized modification of the information on the game history and the information on various parameters calculated using the information on the game history.

When the situation where the process corresponding to the specific control is executed changes to the situation where the process corresponding to the non-specific control is executed, or when the situation changes to the situation where the process corresponding to the non-specific control is executed, various types of the main CPU 63 Information in the register is saved in the main RAM 65 . As a result, when the process corresponding to the non-specific control is executed, it is possible to prevent the information stored in the various registers of the main CPU 63 from being rewritten when executing the process corresponding to the specific control. Become. Further, when or after the processing corresponding to the non-specific control is ended, the information saved in the main side RAM 65 is restored to various registers of the main side CPU 63 . As a result, when the processing corresponding to the non-specific control is completed, it is possible to execute the processing corresponding to the specific control from the state of various registers of the main CPU 63 before executing the processing corresponding to the non-specific control. Become.

When the situation in which the process corresponding to the specific control is executed becomes the situation in which the process corresponding to the non-specific control is executed, or when the situation in which the process corresponding to the non-specific control is executed, various registers of the main CPU 63 Information of some of the registers is saved in the main RAM 65 . This makes it possible to reduce the storage capacity required for saving the information in the registers of the main CPU 63 in the main RAM 65 .

When the situation in which the process corresponding to the specific control is executed becomes the situation in which the process corresponding to the non-specific control is executed, or when the situation in which the process corresponding to the non-specific control is executed, various registers of the main CPU 63 Among them, the information of the register to be stored in the processing corresponding to the non-specific control is saved in the main side RAM 65 . As a result, when the process corresponding to the non-specific control is completed, the process corresponding to the specific control can be resumed from the state of the register of the main CPU 63 before the execution of the process corresponding to the non-specific control. , it is possible to reduce the storage capacity required for saving the information in the registers of the main CPU 63 in the main RAM 65 .

When a process corresponding to non-specific control is started, the information in the flag register of the main CPU 63 is saved in the stack area 222 for specific control in the process corresponding to the specific control, and the WA register, BC register, Each information of the DE register, HL register, IX register and IY register is saved in the non-specific control work area 223 in the process corresponding to the non-specific control. As a result, each information stored in the various registers of the main CPU 63 can be saved at a suitable timing, and the process for saving the information can correspond to the specific control and the non-specific control. It is possible to distribute and execute the processing.

The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes according to the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. In this case, the information in the flag register is saved in the stack area 222 for specific control in the process corresponding to the specific control before the process corresponding to the non-specific control is started. As a result, it is possible to save the information of the flag register in the state before it changes after the call of the subroutine corresponding to the non-specific control or the start of the subroutine in the stack area 222 for specific control.

By saving the information of the WA register, BC register, DE register, HL register, IX register and IY register to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the non-specific It is possible to keep the capacity of the stack area 224 for specific control small. Also, when the stack area 224 for non-specific control is used, the order of writing information is read first from the latter information. All subsequent readout order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the occurrence of the above event even when there is a large amount of information to be saved. .

Stack pointer of main CPU 63 is fixed information, and the information of the stack pointer is not saved in the main RAM 65 at the start of the process corresponding to the non-specific control. As a result, since it is not necessary to secure a capacity for saving stack pointer information in the main RAM 65, the storage capacity of the main RAM 65 can be reduced accordingly. In addition, even in a configuration where the information of the stack pointer is not saved in this way, when the situation where the process corresponding to the specific control is executed changes to the situation where the process corresponding to the non-specific control is executed, or when the process corresponding to the non-specific control is executed Since the information of the stack pointer of the main CPU 63 becomes fixed information when the corresponding process is to be executed, the process corresponding to the non-specific control can be performed without saving the information of the stack pointer as described above. When finished, it is possible to restore the information of the stack pointer before the process corresponding to the non-specific control was started.

Although the information in the flag register of the main side CPU 63 is saved in the main side RAM 65 in the process corresponding to the specific control when the process corresponding to the non-specific control is executed, it is not limited to this. Instead, the information in the flag register may be saved in the main RAM 65 in the process corresponding to non-specific control. In addition, after the processing corresponding to the non-specific control is completed, the return of the information to the flag register of the main CPU 63 is performed in the processing corresponding to the specific control, but it is not limited to this. A configuration may be adopted in which information is returned to the flag register in processing corresponding to non-specific control.

Also, after the information in the WA register, BC register, DE register, HL register, IX register and IY register of the main CPU 63 has started the processing corresponding to the non-specific control, the main Although the information is saved in the side RAM 65, the present invention is not limited to this, and the information in these registers may be saved in the main side RAM 65 in processing corresponding to specific control. In addition, when the processing corresponding to the non-specific control is completed, the return of the information to each of the above registers is performed by the processing corresponding to the non-specific control. A configuration may be adopted in which the information is returned to the register in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<Sixteenth Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration of management processing. The configuration different from that of the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 77 is a flow chart showing management processing in this embodiment executed by the main CPU 63 . The processing of steps S4401 to S4405 in the management processing is executed by the main CPU 63 using the specific control program and specific control data.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S4401). This prevents timer interrupt processing (FIG. 69), which is processing corresponding to specific control, from being interrupted and started in the middle of management execution processing, which is processing corresponding to non-specific control, which will be described later. becomes possible.

Thereafter, as "LD (_PSWBUF), PSW", the information in the flag register of the main CPU 63 is saved in the PSW buffer set in the work area 221 for specific control by the load instruction (step S4402). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes according to the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the program of the subroutine corresponding to the management execution process is started, the flag register in the state before the subroutine is called or changed after the subroutine is started. Information can be saved in the work area 221 for specific control.

After that, by reading out the subroutine program corresponding to the management execution processing set in the non-specific control program, the management execution processing is started (step S4403). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push command. Then, when the management execution process is completed, information for specifying the return address is read by the pop command, and the program for the management process indicated by the return address is returned to.

When returning to the program for management processing after execution of the management execution processing, it is saved in the PSW buffer in the work area 221 for specific control in step S4402 by the load instruction as "LD PSW, (_PSWBUF)". The information in the flag register is returned to the flag register of the main side CPU 63 (step S4404). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S4402 was executed last time. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, in order to switch from the state in which the generation of timer interrupt processing (FIG. 69) is prohibited to the state in which it is permitted, interrupt permission is set (step S4405). This enables a new execution of timer interrupt processing.

According to the above configuration, information in the flag register of the main CPU 63 immediately before switching from specific control to non-specific control is saved in the work area 221 for specific control, not in the stack area 222 for specific control. This makes it possible to save the information of the flag register while suppressing the capacity of the stack area 222 for specific control.

Although the PSW buffer in the work area 221 for specific control is reserved as a dedicated area, it is not limited to this, and may be configured as a shared area in which other information can also be written. That is, in a situation where management processing is not executed, there is no need to save the information in the flag register of the main CPU 63 corresponding to the specific control. A configuration may be adopted in which a dual-use area that is also used as a PSW buffer is used when executing arithmetic processing. In this case, since the shared area is certainly used to save the information in the flag register when executing the management process, the It is necessary to have a configuration in which unnecessary information is written in the shared area.

<Seventeenth Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration of the management execution process. The configuration that is different from the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 78 is a flow chart showing management execution processing in this embodiment executed by the main CPU 63 . Note that the processing of steps S4501 to S4515 in the management execution processing is executed by the main CPU 63 using a non-specific control program and non-specific control data.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y(u+2)" is set to the stack pointer of the main side CPU 63 by the load instruction. Y(u+2) is set as a fixed address in (step S4501).

After that, as "PUSH WA", the information of the WA register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by the push instruction (step S4502). In this case, the information in the WA register is saved in a storage area corresponding to the fixed address set in the stack pointer of the main CPU 63 in step S4501. Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH BC", the information of the BC register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4503). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH DE", the information of the DE register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4504). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH HL", the information of the HL register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4505). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH IX", the information of the IX register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by a push instruction (step S4506). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH IY", the information of the IY register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 by the push instruction (step S4507). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After executing the processing of steps S4502 to S4507, check processing is executed (step S4508). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after the execution of the check process is pushed by the push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program of the management execution process indicated by the return address is returned to. The contents of the check processing are the same as those of the fifteenth embodiment.

After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y(r+α)" is set to the stack pointer of the main side CPU 63 by the load instruction. Y(r+α) is set as a fixed address in (step S4509). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

After that, as "POP IY", the information saved by the pop instruction to the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main side CPU 63 in the stack area 224 for non-specific control. The IY register of the main CPU 63 is overwritten (step S4510). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the memory area to be written in the previous order.

After that, as "POP IX", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main side CPU 63 in the stack area 224 for non-specific control by the pop instruction. The IX register of the main side CPU 63 is overwritten (step S4511). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the memory area to be written in the previous order.

After that, as "POP HL", the information saved by the pop instruction to the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main side CPU 63 in the stack area 224 for non-specific control. The HL register of the main CPU 63 is overwritten (step S4512). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the memory area to be written in the previous order.

After that, as "POP DE", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main side CPU 63 in the stack area 224 for non-specific control by the pop instruction. The DE register of the main CPU 63 is overwritten (step S4513). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the memory area to be written in the previous order.

After that, as "POP BC", the information saved by the pop instruction to the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main side CPU 63 in the stack area 224 for non-specific control. The BC register of the main CPU 63 is overwritten (step S4514). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the memory area to be written in the previous order.

After that, as "POP WA", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main side CPU 63 in the stack area 224 for non-specific control by the pop instruction. The WA register of the main side CPU 63 is overwritten (step S4515). Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the memory area to be written in the previous order.

By executing the processing of steps S4510 to S4515, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63. It is possible to restore the information corresponding to the specific control immediately before the control.

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in steps S4502 to S4507, each information of the WA register, BC register, DE register, HL register, IX register and IY register, which are some of these general-purpose registers, auxiliary registers and index registers is saved in the stack area 224 for non-specific control. These WA register, BC register, DE register, HL register, IX register and IY register are registers used in check processing (step S4508) which is processing corresponding to non-specific control. By saving the information set in such registers to the non-specific control stack area 224 prior to the execution of the check process (step S4508), the information of these registers used for specific control can be transferred to the non-specific control. can be evacuated before is started. Therefore, even if these registers are overwritten during the non-specific control, the information saved in the stack area 224 for non-specific control is returned to these registers when the non-specific control is terminated, so that the state of these registers can be changed. can be returned to the state corresponding to the specific control before the non-specific control is executed.

In addition, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers in the stack area 224 for non-specific control, the WA to be used in the check process, which is the process corresponding to the non-specific control By selectively saving the information of the registers, BC register, DE register, HL register, IX register and IY register to the non-specific control stack area 224, the register information is saved in the non-specific control stack area 224. It is possible to suppress the capacity to be secured in order to Therefore, it is possible to save the above register information while securing a large capacity of the stack area 224 for non-specific control that can be used in the check process.

<Eighteenth Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration of the management execution process. The configuration that is different from the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 79 is a flow chart showing management execution processing in this embodiment executed by the main CPU 63 . The processing of steps S4601 to S4605 in the management execution processing is executed by the main CPU 63 using a non-specific control program and non-specific control data.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y(u+2)" is set to the stack pointer of the main side CPU 63 by the load instruction. Y(u+2) is set as a fixed address in (step S4601).

After that, as "LD (_ALLBUF), ALL", the information of all the registers of the main side CPU 63 is saved in the ALL buffer set in the non-specific control work area 223 by the load instruction (step S4602). As a result, all The information of the registers is collectively saved in the ALL buffer of the work area 223 for non-specific control. By saving all the registers of the main CPU 63 in the non-specific control work area 223 in this way, there is no need to selectively save the information of the registers of the main CPU 63 .

Here, the registers to be saved include the flag register. The flag register information is saved in the stack area 222 for specific control in step S3802 of the management process (FIG. 70), but in step S4602 the flag register information is saved in the work area 223 for non-specific control. be done. This eliminates the need to selectively save the information in the registers of the main CPU 63, including the information in the flag registers. In addition, even if the information of the flag register is redundantly saved in this way, after the end of the management execution process, the special control stack area 222 is transferred from the special control stack area 222 to the main CPU 63 in step S3804 of the management process (FIG. 70). Therefore, when returning to the process corresponding to the specific control, the information in the flag register of the main CPU 63 can be restored to the state immediately before the management execution process is executed. becomes.

Thereafter, check processing is executed (step S4603). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after the execution of the check process is pushed by the push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program of the management execution process indicated by the return address is returned to. The contents of the check processing are the same as those of the fifteenth embodiment.

After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y(r+α)" is set to the stack pointer of the main side CPU 63 by the load instruction. Y(r+α) is set as a fixed address in (step S4604). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, as "LD ALL, (_ALLBUF)", the information saved in the ALL buffer of the non-specific control work area 223 is overwritten in the corresponding registers of the main CPU 63 by the load instruction (step S4605). This makes it possible to restore the information in all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

According to the above configuration, the information in the register of the main CPU 63 is saved not in the stack area 224 for non-specific control, but in the work area 223 for non-specific control. Therefore, the capacity of H.224 can be kept small. Also, when the stack area 224 for non-specific control is used, the order of writing information is read first from the latter information. All subsequent readout order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the occurrence of the above event even when there is a large amount of information to be saved. .

Also, when saving the information of the registers of the main side CPU 63 to the work area 223 for non-specific control, the WA register, BC register, DE register, and HL register used in the check processing which is the processing corresponding to the non-specific control , IX and IY registers, as well as other registers, are collectively saved in the ALL buffer of the work area 223 for non-specific control. By saving all the registers of the main CPU 63 in the non-specific control work area 223 in this way, there is no need to selectively save the information of the registers of the main CPU 63 .

It should be noted that the information of all the registers of the main side CPU 63 is saved in the main side RAM 65 in the process corresponding to the non-specific control after the process corresponding to the non-specific control is started, but it is not limited to this. Instead, information in all registers may be saved in the main RAM 65 in processing corresponding to specific control. In addition, when the processing corresponding to the non-specific control is completed, the information is returned to all the registers by the processing corresponding to the non-specific control. information may be restored in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<Nineteenth Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration of the management execution process. The configuration different from that of the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 80 is a flow chart showing management execution processing in this embodiment executed by the main CPU 63 . Note that the processing of steps S4701 to S4706 in the management execution processing is executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, as "LD (_SPBUF), SP", the information of the stack pointer of the main side CPU 63 is saved in the SP buffer set in the non-specific control work area 223 by a load instruction (step S4701). As a result, the information of the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started is saved in the work area 223 for non-specific control.

After that, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y(u+2)" is set to "LD SP, Y(u+2)" by the load instruction to the stack pointer of the main CPU 63 at the start of non-specific control. Y(u+2) is set as a fixed address in (step S4702).

After that, as "PUSH ALL", the information of all the registers of the main CPU 63 is transferred from the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the non-specific control stack area 224 and the storage area. Save to a continuous storage area (step S4703). In this case, since the information of all the registers of the main CPU 63 cannot be stored in one storage area in the stack area 224 for non-specific control, as described above, the current state of the main CPU 63 in the stack area 224 for non-specific control The storage area corresponding to the information of the stack pointer and the storage area contiguous from the storage area are set as save destinations of the register information. Also, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written next to the storage area in which the last information is stored when the information of all the registers is saved.

After that, check processing is executed (step S4704). When executing the check process, a subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after the execution of the check process is pushed by the push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program of the management execution process indicated by the return address is returned to. The contents of the check processing are the same as those of the fifteenth embodiment.

After that, as "POP ALL", a storage area corresponding to the current stack pointer information of the main side CPU 63 in the non-specific control stack area 224 and information saved in a continuous storage area from the storage area by the pop instruction are overwritten in the corresponding registers of the main CPU 63 (step S4705). As a result, the information in all the registers of the main CPU 63 can be restored to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

Thereafter, as "LD SP, (_SPBUF)", the stack pointer of the main CPU 63 is overwritten with the information saved in the SP buffer of the non-specific control work area 223 by the load instruction (step S4706). As a result, the information in the stack pointer of the main CPU 63 is restored to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

According to the above configuration, when the information in the registers of the main CPU 63 is saved in the stack area 224 for non-specific control, the WA register, BC register, DE Information of all registers including not only registers, HL registers, IX registers, and IY registers, but also other registers are collectively saved in the stack area 224 for non-specific control. By saving all the registers of the main CPU 63 in the non-specific control stack area 224 in this way, there is no need to selectively save the information in the registers of the main CPU 63 .

Information of the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started is saved in the work area 223 for non-specific control. As a result, even if the information of the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started may fluctuate, the process corresponding to the non-specific control ends and the specific control starts. When returning to the corresponding process, it is possible to return the information of the stack pointer of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

It should be noted that the information of all the registers of the main side CPU 63 is saved in the main side RAM 65 in the process corresponding to the non-specific control after the process corresponding to the non-specific control is started, but it is not limited to this. Instead, information in all registers may be saved in the main RAM 65 in processing corresponding to specific control. In addition, when the processing corresponding to the non-specific control is completed, the information is returned to all the registers by the processing corresponding to the non-specific control. information may be restored in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<Twentieth Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration of management processing and management execution processing. The configuration that is different from the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 81 is a flow chart showing management processing in this embodiment executed by the main CPU 63 . The processing of steps S4801 to S4811 in the management processing is executed by the main CPU 63 using the specific control program and specific control data.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S4801). This prevents the timer interrupt processing (FIG. 69), which corresponds to the specific control, from being interrupted and started in the middle of the management execution processing (described later), which corresponds to the non-specific control. becomes possible.

Thereafter, as "PUSH PSW", the information in the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S4802). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes according to the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the program of the subroutine corresponding to the management execution process is started, the flag register in the state before the subroutine is called or changed after the subroutine is started. Information can be saved in the stack area 222 for specific control.

After that, as "LD WA, 0", the WA register of the main side CPU 63 is cleared to "0" by the load instruction (step S4803). Also, as "LD BC, 0", the BC register of the main side CPU 63 is cleared to "0" by the load instruction (step S4804). Also, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by the load instruction (step S4805). Also, as "LD HL, 0", the HL register of the main side CPU 63 is cleared to "0" by the load instruction (step S4806). Also, as "LD IX, 0", the IX register of the main side CPU 63 is cleared to "0" by the load instruction (step S4807). Also, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by the load instruction (step S4808).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in steps S4803 to S4808, the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, are Clear "0". These WA register, BC register, DE register, HL register, IX register and IY register are registers used in check processing (step S4902) which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of management execution processing (step S4809), which is processing corresponding to non-specific control, the states of these registers are changed to zero before processing corresponding to non-specific control is started. In addition, the state immediately after the start of supply of operating power to the main CPU 63 can be obtained.

In addition, each information of the WA register, BC register, DE register, HL register, IX register and IY register before the processing corresponding to the non-specific control is started is This information is unnecessary for the processing corresponding to the specific control. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem occurs in the processing corresponding to the specific control that is returned after the processing corresponding to the non-specific control is completed.

After executing the processes of steps S4803 to S4808, the management execution process is started by reading out the subroutine program corresponding to the management execution process set in the non-specific control program (step S4809). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push command. Then, when the management execution process is completed, information for specifying the return address is read by the pop command, and the program for the management process indicated by the return address is returned to.

When returning to the program for management processing after execution of the management execution processing, the information in the flag register saved in the stack area 222 for specific control in step S4802 by the pop instruction is transferred to the main CPU 63 as "POP PSW". flag register (step S4810). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S4802 was executed last time. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, in order to switch from the state in which the generation of timer interrupt processing (FIG. 69) is prohibited to the state in which it is permitted, interrupt permission is set (step S4811). This enables a new execution of timer interrupt processing.

FIG. 82 is a flow chart showing management execution processing in this embodiment executed by the main CPU 63 . Note that the processes of steps S4901 to S4909 in the management execution process are executed by the main CPU 63 using a non-specific control program and non-specific control data.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y(u+2)" is set to the stack pointer of the main side CPU 63 by the load instruction at the start of non-specific control. Y(u+2) is set as a fixed address (step S4901).

After that, check processing is executed (step S4902). When executing the check processing, a subroutine program corresponding to the check processing set in the non-specific control program is executed. Information for specifying the return address of the execution process is written in the non-specific control stack area 224 by the push instruction. Then, when the check process is completed, information for specifying the return address is read by the pop instruction, and the program of the management execution process indicated by the return address is returned to. The contents of the check processing are the same as those of the fifteenth embodiment.

After that, as "LD WA, 0", the WA register of the main side CPU 63 is cleared to "0" by the load instruction (step S4903). Also, as "LD BC, 0", the BC register of the main side CPU 63 is cleared to "0" by the load instruction (step S4904). Also, as "LD DE, 0", the DE register of the main side CPU 63 is cleared to "0" by the load instruction (step S4905). Also, as "LD HL, 0", the HL register of the main side CPU 63 is cleared to "0" by the load instruction (step S4906). Also, as "LD IX, 0", the IX register of the main side CPU 63 is cleared to "0" by the load instruction (step S4907). Also, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by the load instruction (step S4908).

These WA register, BC register, DE register, HL register, IX register and IY register are registers used in the check processing (step S4902) which is processing corresponding to non-specific control as already described. By clearing such registers to "0" prior to returning from the processing corresponding to the non-specific control to the processing corresponding to the specific control, the state of these registers can be changed to the main state before returning to the processing corresponding to the specific control. It is possible to enter the state immediately after the supply of operating power to the side CPU 63 is started.

In addition, each information of the WA register, BC register, DE register, HL register, IX register and IY register before the processing corresponding to the specific control is started is the non-specific register after the processing corresponding to the specific control is finished. This information is unnecessary for processing corresponding to control. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem occurs in the process corresponding to the non-specific control that is returned after the process corresponding to the specific control is completed.

After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, "LD SP, Y(r+α)" is set to the stack pointer of the main side CPU 63 by the load instruction. Y(r+α) is set as a fixed address in (step S4909). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

According to the above configuration, when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is being executed, the WA register, BC register, DE register, HL register, and IX register of the main side CPU 63 and the IY register are cleared to "0". This eliminates the need to save the information in each of these registers to the main RAM 65 . Therefore, there is no need to secure a capacity for saving each of these pieces of information.

Also, when returning to the process corresponding to the specific control from the situation where the process corresponding to the non-specific control is being executed, the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63 It is configured to be cleared to "0". As a result, when returning to the processing corresponding to the specific control, it is possible to restore the state of each of these registers to the state immediately before the processing corresponding to the non-specific control is started.

The state in which each register is cleared to "0" is the state when the supply of operating power to the MPU 62 is started. This makes it possible to simplify the processing configuration for setting each of the above registers to a predetermined state when starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control. .

When starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control, the registers to be cleared to "0" are some of the various registers of the main side CPU 63 . As a result, it is possible to reduce the processing load for setting each register to a predetermined state when starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control.

In a configuration that clears the WA register, BC register, DE register, HL register, IX register, and IY register to "0" when starting processing corresponding to non-specific control and returning to processing corresponding to specific control, Other registers are not cleared to "0". This makes it possible to prevent the information necessary for the process corresponding to the specific control from being erased at the start of the process corresponding to the non-specific control.

Information in registers other than the WA register, BC register, DE register, HL register, IX register, and IY register is not saved in the main RAM 65 at the start of processing corresponding to non-specific control. This eliminates the need to secure an area in the main RAM 65 for saving these pieces of information.

The information in the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 before the processing corresponding to non-specific control is started is This is information that is not used in processing corresponding to specific control. As a result, even if each of the above registers is cleared to "0" when the process corresponding to the non-specific control is started, the specific control after the process corresponding to the non-specific control is completed. It is possible to avoid affecting the processing.

Instead of clearing the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63 at steps S4803 to S4808 in the management processing (FIG. 81), these The configuration may be such that the register is initialized. That is, when the supply of operating power to the MPU 62 is started, the registers of the main CPU 63 are once cleared to "0", and then the information of each register is set so as to be in the initial state, but step S4803. In steps S4808, each register may be set so as to be in this initial state. In this case, in steps S4903 to S4908, each register is set so as to be in the above-described initial state. It is possible to restore the state immediately before the processing corresponding to the control is started.

Further, instead of clearing the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63 at steps S4803 to S4808 in the management processing (FIG. 81), these A configuration in which "1" is set to all of the registers may be used. In this case, by setting "1" to all of the above registers in steps S4903 to S4908, when returning to the processing corresponding to the specific control, the state of each of these registers is set to the processing corresponding to the non-specific control. It is possible to return to the state immediately before the start of

In addition, when the processing corresponding to the non-specific control is executed, the information of the flag register of the main side CPU 63 is saved in the main side RAM 65 in the processing corresponding to the specific control, but it is not limited to this. Instead, the information in the flag register may be saved in the main RAM 65 in the process corresponding to non-specific control. In addition, after the processing corresponding to the non-specific control is completed, the return of the information to the flag register of the main CPU 63 is performed in the processing corresponding to the specific control. A configuration may be adopted in which information is returned to the flag register in processing corresponding to non-specific control.

Further, the processing corresponding to the specific control is performed before the processing corresponding to the non-specific control is started to clear the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 to "0". However, the present invention is not limited to this, and the processing for clearing these registers to "0" may be executed in the processing corresponding to the non-specific control. In addition, when the processing corresponding to the non-specific control ends, the processing for clearing the above registers to "0" is performed in the processing corresponding to the non-specific control, but it is not limited to this, The process of clearing each register to "0" may be performed in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

Also, in the management processing (FIG. 81), the processing of "PUSH PSW" in step S4802 is executed before setting "0" to each register in steps S4803 to S4808. , after the "PUSH PSW" process in step S4802 sets "0" to each register in steps S4803 to S4808 and before the program of the subroutine corresponding to the management execution process is read out in step S4809. It may be configured to be This makes it possible to save the information in the flag register after being changed by the load instructions in steps S4803 to S4808 to the stack area 222 for specific control.

<Twenty-first Embodiment>
This embodiment differs from the fifteenth embodiment in the configuration for collecting information on game history. The configuration that is different from the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 83 is an explanatory diagram for explaining the electrical configuration in this embodiment.

The MPU 62 is provided with a main CPU 63, a main ROM 64 and a main RAM 65 as in the fifteenth embodiment. Moreover, unlike the fifteenth embodiment, the MPU 62 is electrically connected to a management RAM 241 . In other words, a management RAM 241 is provided separately from the main RAM 65 built into the MPU 62 , and the management RAM 241 is externally attached to the MPU 62 .

The main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, a work area 223 for non-specific control, and a stack area 224 for non-specific control, as in the fifteenth embodiment. ing. Therefore, when the main CPU 63 uses the specific control program and specific control data in the main ROM 64 to execute processing corresponding to the specific control, the work area 221 for the specific control in the main RAM 65 and the When the stack area 222 for specific control is used and the main CPU 63 uses the program for non-specific control and the data for non-specific control in the main ROM 64 to execute the process corresponding to the non-specific control A work area 223 for non-specific control and a stack area 224 for non-specific control in the main RAM 65 are used.

The management RAM 241 is provided with a normal counter area 231 , an opening/closing execution mode counter area 232 , a high-frequency support mode counter area 233 , and a calculation result storage area 234 . The contents of these areas 231 to 234 are the same as those of the fifteenth embodiment. Also in this embodiment, management execution processing including check processing is executed as processing corresponding to non-specific control in the main CPU 63 . In the check process, game histories are collected by updating the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 in the same manner as in the fifteenth embodiment. The 61st to 68th parameters calculated using the collected game history are written in the calculation result storage area 234 . That is, since the management RAM 241 is used when the main CPU 63 executes processing corresponding to non-specific control, the management RAM 241 is used as a work area for non-specific control.

Also, when collecting game histories and calculating the 61st to 68th parameters using the collected history information, the work area 223 for non-specific control and the stack area 224 for non-specific control of the main side RAM 65 are Appropriately used.

According to the above configuration, the normal counter area 231 , open/close execution mode counter area 232 , high frequency support mode counter area 233 and calculation result storage area 234 are provided in the management RAM 241 externally attached to the MPU 62 . As a result, it is possible to store the collected game history information without increasing the required storage capacity in the work area 223 for non-specific control in the main RAM 65, and to use the game history. It is possible to store the calculated 61st to 68th parameters. In addition, it is possible to increase the storage capacity for storing game history information while using a general-purpose MPU 62 .

The work area 223 for non-specific control and the stack area 224 for non-specific control of the main side RAM 65 are appropriately used when game history is collected and the collected history information is used to calculate the 61st to 68th parameters. be done. As a result, it is possible to prevent the processing speed from being extremely lowered when executing the processing related to the history information.

In addition to or instead of the configuration in which the management RAM 241 is provided with the normal counter area 231, the open/close execution mode counter area 232, the high-frequency support mode counter area 233, and the calculation result storage area 234, the first embodiment A configuration may be adopted in which a storage area corresponding to the history memory 117 in the form or the like is set. In this case, it is necessary to increase the storage capacity required to store the history information. Therefore, it is possible to flexibly cope with an increase in storage capacity.

<Twenty-Second Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration executed by the main CPU 63 . The configuration different from that of the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 84 is a flow chart showing main processing in this embodiment executed by the main CPU 63 . The processing of steps S5001 to S5019 in the main processing is executed by the main CPU 63 using a specific control program and specific control data.

First, power-on wait processing is executed (step S5001). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, one second) elapses after the main process is activated. The operation start and initial setting of the pattern display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S5002).

Thereafter, it is determined whether or not the reset button 68c is being pressed (step S5003), and it is determined whether or not the setting key insertion portion 68a is being turned ON using the setting key (step S5004). 13 is determined whether or not the front door frame 14 is in an open state (step S5005), and it is determined whether or not the gaming machine body 12 is in an open state with respect to the outer frame 11 (step S5006).

In this embodiment, a front door open sensor 95 for detecting whether or not the front door frame 14 is in an open state with respect to the inner frame 13 is electrically connected to the main side CPU 63. The detection result of 95 is input to the main side CPU 63 . In this case, when the front door frame 14 is closed with respect to the inner frame 13, the front door open sensor 95 transmits a close detection signal to the main side CPU 63, and the front door frame 14 is opened with respect to the inner frame 13. , the front door open sensor 95 transmits an open detection signal to the main CPU 63 . The main CPU 63 identifies that the front door frame 14 is in the closed state when receiving the closed detection signal from the front door open sensor 95 , and when receiving the open detection signal from the front door open sensor 95 . Identify that the front door frame 14 is in the open state.

In addition, in this embodiment, a main body open sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main side CPU 63. The detection result of 96 is input to the main side CPU 63 . In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closing detection signal to the main side CPU 63, and when the gaming machine main body 12 is in the open state with respect to the outer frame 11, In some cases, the body open sensor 96 transmits an open detection signal to the main side CPU 63 . The main CPU 63 determines that the gaming machine main body 12 is in the closed state when receiving the closed detection signal from the main body open sensor 96, and determines that the main CPU 63 is in the closed state when receiving the open detection signal from the main body open sensor 96. Identify that the main body 12 is in the open state.

If the reset button 68c is being pressed (step S5003: YES) and a negative determination is made in any one of steps S5004 to S5006, clear processing at non-setting update is executed (step S5007). . In the clear processing at the time of non-setting update, except for the area (specifically the setting value counter) where the information of the setting value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control, the specific control The work area 221 for the work area 221 is cleared to "0", and the area cleared to "0" is initialized. As a result, the area indicating whether or not the winning lottery mode is the high probability mode is cleared to "0", so the winning lottery draws regardless of the winning lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. Mode is low probability mode. In addition, the game round is not executed, the open/close execution mode is not executed, and the normal diagram display section 38a is not displayed in a variable manner, and the general electric accessory 34a is in the closed state. situation. In addition, since the reservation storage area 65a and the general electricity reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display unit 37a is erased and the general figure display unit The pending information for 38a is deleted. Also, in the clearing process at the time of non-setting update, the stack area 222 for specific control is cleared to "0". In addition, in the clearing process at the time of non-setting update, the various registers of the main side CPU 63 are also cleared to "0" and then initialized.

In the clear processing at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if the supply of operating power to the pachinko machine 10 is started while the reset button 68c is pressed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

If the reset button 68c is not pressed (step S5003: NO), it is determined whether or not the power failure flag is set to "1" (step S5008). A power failure flag is provided in the work area 221 for specific control. is set to "1". If the power failure flag is set to "1", it is determined whether or not the checksum calculation result matches the checksum saved when the power was shut off, that is, the validity of the stored data is determined (step S5009). . When the clear processing at the time of non-setting update is executed in step S5007, or when the affirmative determination is made in step S5009, the pachinko machine 10 is set by confirming the value of the set value counter in the work area 221 for specific control. It is determined whether the value is normal (step S5010). Specifically, if the set value set in the set value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is abnormal. Determine that there is.

If a negative determination is made in any of steps S5008 to S5010, operation prohibition processing is executed. In the operation prohibition process, after executing an error notification process for notifying the hall manager or the like of the occurrence of an error (step S5011), an infinite loop is formed. The operation prohibition process is canceled by executing a clear process (step S5018) at the time of setting update, which will be described later.

If affirmative determinations are made in all of steps S5008 to S5010, power-on setting processing is executed (step S5012). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current game state is transmitted to the sound emission control device 81 .

Although the main CPU 63 is configured to periodically execute timer interrupt processing, generation of timer interrupt processing is prohibited at the stage when the main processing is started. The state in which the generation of the timer interrupt process is prohibited is released at the timing before the process of step S5012 is completed and the process of step S5013 is executed, and execution of the timer interrupt process is permitted. As a result, when the supply of operating power to the main CPU 63 is started, the power-on setting process of step S5012 is completed, and the timer interrupt process is not executed until the stage before the process of step S5013 is started. Therefore, the main CPU 63 does not start the process for advancing the game until the relevant situation is reached.

After that, the remaining processing of steps S5013 to S5016 is performed. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. This remaining time fluctuates according to the processing completion time of each timer interrupt processing, but the remaining processing of steps S5013 to S5016 is repeatedly executed using such irregular time. In this regard, it can be said that the remaining processes of steps S5013 to S5016 are irregular processes that are executed irregularly. In steps S5013 to S5016, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

On the other hand, if the reset button 68c is being pressed (step S5003: YES) and all steps S5004 to S5006 are affirmative, processing for updating the set values is executed. Specifically, first, copy processing of the setting value is executed (step S5017). In the copy process, the information of the setting value counter used for specifying the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. . As a result, even if the information of the setting value counter is cleared to "0" in the setting update clearing process (step S5018) executed after this, the current setting before the setting value update clearing process is executed. It is possible to grasp the setting value of the pachinko machine 10 (that is, the setting value of the pachinko machine 10 before the supply of operating power to the pachinko machine 10 is stopped).

After that, clear processing at the time of setting update is executed (step S5018). In the clearing process at the time of setting update, the work area 221 for specific control is set to "0 ' is cleared, and the initial setting is performed for the area cleared to '0'. As a result, the game cycle is not executed, the open/close execution mode is not executed, and the normal diagram display section 38a is not displayed in a variable manner, and the normal electric accessory 34a is in the closed state. A situation arises. In addition, since the reservation storage area 65a and the general electricity reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display unit 37a is erased and the general figure display unit The pending information for 38a is deleted. In addition, in the clearing process at the time of setting update, the stack area 222 for specific control is cleared to "0" and the area cleared to "0" is initialized. In addition, in the clearing process at the time of setting update, the set value counter used to specify the set value of the pachinko machine 10 is cleared to "0". In addition, in the clearing process at the time of updating the settings, the various registers of the main CPU 63 are also cleared to "0" and then initialized.

On the other hand, in the clearing process at the time of setting update, the area indicating whether the winning lottery mode is the high probability mode is not cleared to "0". can be maintained in the mode before the supply of operating power to the pachinko machine 10 is stopped. In addition, since the copy area is not cleared to "0" in the clear processing at the time of setting update, it is possible to specify the set value that was set before the execution of the clear processing at the time of setting update.

In the clear processing at the time of setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". Thereby, even if the setting value update process capable of changing the setting value of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

Then, after executing the set value update process in step S5019, the process proceeds to step S5012. The set value update process will be described below. FIG. 85 is a flow chart showing setting value update processing. The processes of steps S5101 to S5114 in the set value update process are executed by the main CPU 63 using the specific control program and specific control data.

First, a set value counter provided in the work area 221 for specific control is set to "1" (step S5101). The setting value counter is a counter for specifying which setting value the setting state of the pachinko machine 10 is by the main side CPU 63 . By setting "1" to the set value counter, the set value becomes "set 1" regardless of the set value up to that point when the set value update process is executed.

After that, the setting value display start process is executed (step S5102). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number "1" corresponding to "setting 1" is displayed. The manager of the game hall can grasp the current setting state of the pachinko machine 10 by confirming the third notification display device 69c when changing the setting value.

After that, it is determined whether or not one game ball is detected by the outlet detection sensor 48a (step S5103). Specifically, it is determined whether or not the signal received from the outlet detection sensor 48a has switched from the LOW level to the HI level. If a negative determination is made in step S5103, it is determined whether or not the update button 68b has been pressed once (step S5104). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S5104, the process returns to step S5103, and it is determined whether or not one game ball has been detected by the out-port detection sensor 48a.

If the update button 68b has been pressed once (step S5104: YES), the value of the set value counter in the specific control work area 221 is incremented by 1 (step S5105). If the value of the set value counter after adding 1 exceeds "6" (step S5106: YES), the set value counter is set to "1" (step S5107). As a result, each time the update button 68b is pressed once, the set value is updated to the value one step higher. going back.

When a negative determination is made in step S5106, or when the process of step S5107 is executed, the setting value display update process is executed (step S5108). In the setting value display update process, the display of the third notification display device 69c is controlled so that the number corresponding to the value of the setting value counter in the specific control work area 221 is displayed. By checking the third notification display device 69c, the manager of the game hall can grasp the setting state of the pachinko machine 10 after the update button 68b is pressed.

After executing the process of step S5108, it returns to step S5103 and it is determined whether one game ball was detected by the out mouth detection sensor 48a. When one game ball is not detected by the out-port detection sensor 48a (step S5103: NO), the processing after step S5104 is executed again. When one game ball is detected by the outlet detection sensor 48a (step S5103: YES), it is determined whether or not the setting key insertion portion 68a is switched from the ON state to the OFF state (step S5109). In this case, it is not specified whether or not the setting key insertion portion 68a is in the OFF state, but it is specified whether or not switching from the ON state to the OFF state has occurred. If specified, an affirmative determination is made in step S5109.

If not switched to the OFF state (step S5109: NO), the process of step S5109 is executed again. As a result, the process waits until the setting key insertion portion 68a is turned off. If it has been switched to the OFF state (step S5109: YES), the setting value display end processing is executed (step S5110). In the setting value display end processing, the display of the setting values on the third notification display device 69c is ended. In this case, display of information of various parameters stored in the calculation result storage area 234 provided in the work area 223 for non-specific control is started on the first to third display devices 69a to 69c.

After that, the set value comparison process is executed (step S5111). In the set value comparison process, it is determined whether or not the information of the set value counter in the work area 221 for specific control matches the information stored in the copy area in the work area 221 for specific control. That is, it is determined whether or not the setting value set before the supply of operating power to the pachinko machine 10 is stopped is the same as the setting value set in the current setting value updating process.

If the setting value set before the supply of operating power to the pachinko machine 10 is stopped and the setting value set in the current setting value update process are the same (step S5112: NO), non A change notification process is executed (step S5113). In the non-change notification process, a setting maintenance command indicating that the setting value has not been changed is transmitted to the sound emission control device 81 . Upon receiving the setting maintenance command, the sound emission control device 81 causes the display light emitting section 53 to emit light in a manner corresponding to the setting maintenance, and also outputs the sound "setting maintenance" from the speaker section 54 . In addition, the character image "The setting is maintained." is displayed on the pattern display device 41. - 特許庁

These notifications are maintained until the notification execution period (for example, 10 seconds) elapses after the setting maintenance command is transmitted, and are terminated when the notification execution period elapses. However, the present invention is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can grasp that the set value is maintained. In addition, in the notification processing when not changed, the setting value is maintained by setting the display content on at least one display device of the first to third notification display devices 69a to 69c to the display content corresponding to the setting maintenance. It may be configured to notify that the setting value is maintained, or may be configured to perform an external output indicating that the set value is maintained.

If the setting value that was set before the supply of operating power to the pachinko machine 10 was stopped and the setting value that was set in the current setting value update process are not the same (step S5112: YES), change A time notification process is executed (step S5114). In notification processing at the time of change, a setting change command indicating that the setting value has been changed is transmitted to the sound emission control device 81 . Upon receiving the setting change command, the sound emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the setting change, and outputs the sound "Setting change" from the speaker unit 54 . In addition, the character image of "The setting is changed." is displayed on the pattern display device 41. - 特許庁

These notifications are maintained until the notification execution period (for example, 10 seconds) elapses after the setting change command is transmitted, and are terminated when the notification execution period elapses. However, the present invention is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can grasp that the setting value has been changed. In addition, in the notification processing at the time of change, the display content on at least one display device of the first to third notification display devices 69a to 69c is changed to display content corresponding to the setting change. may be configured to notify, or may be configured to perform an external output indicating that the set value has been changed.

As described above, in the present embodiment, in order to execute the setting value updating process, not only the setting key insertion portion 68a is turned ON, but also the reset button 68c is pressed, and the front door frame 14 is opened. , and the gaming machine main body 12 must be in an open state. This makes it difficult to illegally execute the set value update process.

Also, the front door frame 14 and the gaming machine main body 12 must be in an open state in order to execute the set value update process. As a result, even if an attempt is made to illegally execute the setting value updating process, the illegal act will be conspicuous because the front door frame 14 and the game machine main body 12 are in the open state, and the manager of the game hall will Easier to detect fraudulent activity.

In particular, in order to execute the set value update process, not only the opening operation of the gaming machine main body 12 necessary to expose the main control device 60 but also the opening operation of the front door frame 14 are required. It is possible to make the work of the fraudulent act complicated, and to make the fraudulent act conspicuous.

In addition, in a configuration in which the processing for progressing the game is not returned to if the setting value update processing is not completed, in order to confirm the setting value selected in the setting value update processing and end the setting value update processing, It is necessary to cause the game ball to enter the out port 24a to cause the out port detection sensor 48a to detect the game ball, and then turn off the setting key insertion portion 68a. As a result, even if the set value update process is illegally executed, it is possible to make it difficult to perform an operation for ending the set value update process and returning to the process for progressing the game.

Also, the set value set before the supply of operating power to the pachinko machine 10 is stopped and the set value selected in the set value update process are compared to determine whether or not both set values are the same. The corresponding notification is executed. As a result, the manager of the game hall can easily grasp whether or not the setting value has been changed by the setting value updating process.

FIG. 86 is a flow chart showing timer interrupt processing in this embodiment executed by the main CPU 63 . The timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes of steps S5013 to S5016 are being executed in the main process (FIG. 84). The program corresponding to timer interrupt processing is set as a program for specific control.

In steps S5201 to S5205, the same processes as steps S301 to S305 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control.

After that, a setting confirmation process is executed (step S5206). When executing the setting confirmation process, a subroutine program corresponding to the setting confirmation process set in the specific control program is executed. Information for specifying the return address of timer interrupt processing after the execution of is written in the stack area 222 for specific control by a push instruction. Then, when the setting confirmation process is completed, information for specifying the return address is read out by a pop instruction, and the program for the timer interrupt process indicated by the return address is returned to.

FIG. 87 is a flow chart showing the setting confirmation process. The processing of steps S5301 to S5312 in the setting confirmation processing is executed by the main CPU 63 using a program for specific control and data for specific control.

First, it is determined whether or not the setting value corresponding to the information of the setting value counter in the specific control work area 221 is being displayed on the third notification display device 69c (step S5301). If a negative determination is made in step S5301, it is determined whether it is neither the game round nor the opening/closing execution mode (step S5302), and the pattern fluctuation display times and the general electric role 34a in the general pattern display unit 38a are opened. It is determined whether it is neither of the general electric open states that can be in the state (step S5303), it is determined whether the front door frame 14 is in the open state with respect to the inner frame 13 (step S5304), and the outer frame 11, it is determined whether or not the gaming machine main body 12 is in the open state (step S5305), and whether or not the setting key insertion portion 68a is ON-operated (step S5306). Whether or not the front door frame 14 is open is determined based on the detection result of the front door open sensor 95 as in step S5005 in the main processing (FIG. 84). This determination is made based on the detection result of the main body open sensor 96 as in step S5006 in the main processing (FIG. 84).

If a negative determination is made in any one of steps S5302 to S5306, this setting confirmation process ends without executing the processes of steps S5307 to S5309. If all of steps S5302 to S5306 result in an affirmative determination, a setting value display start process is executed (step S5307). In the setting value display start process, the display of the third notification display device 69c is controlled so that the number of the setting value corresponding to the information of the setting value counter in the work area 221 for specific control is displayed. When confirming the setting values, the manager of the game hall can grasp the current setting state of the pachinko machine 10 by looking at the third notification display device 69c.

After that, the game stop flag provided in the work area 221 for specific control is set to "1" (step S5308). The game stop flag is a situation in which an affirmative determination is made in step S5207 in timer interrupt processing (FIG. 86) and the processing of steps S5208 to S5221 is not executed, that is, the execution of processing for advancing the game should be stopped. It is a flag for specifying whether or not the main side CPU 63 is present. By setting the game stop flag to "1", the process of steps S5208 to S5221 is not executed by making an affirmative determination in step S5207 of the timer interrupt process (FIG. 86). As a result, the setting value is confirmed while the execution of the process for progressing the game is stopped. However, even if the game stop flag is set to "1", the processing of steps S5201 to S5205 in the timer interrupt processing (FIG. 86) is executed, so the setting value is checked. Even so, power failure monitoring is executed, and the winning random number counter C1, jackpot type counter C2, reach random number counter C3, and random number initial value counter CINI are updated, and further fraud detection is executed.

After that, a confirmation notification start command is transmitted to the sound emission control device 81 (step S5309). By receiving the confirmation notification start command, the sound emission control device 81 causes the display light emitting unit 53 to emit light in a mode corresponding to the setting confirmation, and outputs the sound "Setting confirmation is in progress" from the speaker unit 54. . In addition, the character image "Confirming settings" is displayed on the pattern display device 41. - 特許庁These notifications are continued until a confirmation notification end command is received from the main side CPU 63 . It should be noted that an external output indicating that the setting value is being checked may be provided.

As described above, neither the game time nor the opening and closing execution mode, and the pattern fluctuation display time in the normal figure display unit 38a and the normal electric open state in which the general electric role 34a can be in the open state. By displaying the display for confirming the setting value on the third notification display device 69c, it is possible to prevent the setting value from being confirmed while the game is being played. It becomes possible.

In addition, in order to display the display for confirming the set value on the third notification display device 69c, not only the setting key insertion portion 68a is turned ON but also the front door frame 14 is opened. , and the gaming machine main body 12 must be in an open state. As a result, even if an attempt is made to illegally perform display for confirming the set values, it is possible to make it difficult to do so.

Also, in order for the display for confirming the set value to be displayed on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 must be in an open state. As a result, even if an attempt is made to illegally perform a display for confirming the set values, the fraudulent act will be conspicuous because the front door frame 14 and the game machine main body 12 are in the open state, and the management of the game hall. It becomes easier for the person to discover the fraudulent act.

In particular, in order to display the display for confirming the set value on the third notification display device 69c, not only the opening operation of the game machine main body 12 necessary for exposing the main control device 60 but also Since the opening operation of the front door frame 14 is also required, it is possible to complicate the work of the fraudulent act and to make the fraudulent act conspicuous.

If an affirmative determination is made in step S5301, it is determined whether or not the setting key insertion portion 68a has been turned off (step S5310). If the OFF operation is performed (step S5310: YES), the game stop flag in the work area 221 for specific control is cleared to "0" (step S5311). As a result, a negative determination is made in step S5207 of the timer interrupt processing (FIG. 86), so that the processing of steps S5208 to S5221 is executed. As a result, the state in which the execution of the process for progressing the game is stopped is cancelled.

Thereafter, a confirmation notification end command is transmitted to the sound emission control device 81 (step S5312). Upon receiving the confirmation notification end command, the sound emission control device 81 terminates the notification indicating that the set values are being confirmed in the pattern display device 41, the display light emitting section 53 and the speaker section .

Returning to the description of the timer interrupt processing (FIG. 86), after the setting confirmation processing in step S5206 is finished, it is determined whether or not the game is stopped (step S5207). In this case, if the game stop flag in the work area 221 for specific control is set to "1" in the setting confirmation process of step S5206, affirmative determination is made in step S5207 and step S5208 to step S5221 Take no action. Further, even if the occurrence of fraud is detected in the fraud detection processing of step S5205, an affirmative determination is made in step S5207 and the processing of steps S5208 to S5221 is not executed.

In steps S5208 to S5219, the same processes as steps S307 to S318 of the timer interrupt process (FIG. 11) in the first embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. Also, in step S5221, the same processing as in step S3719 of the timer interrupt processing (FIG. 69) in the fifteenth embodiment is executed.

On the other hand, in step S5220, RAM monitoring processing is executed. When executing the RAM monitoring process, a subroutine program corresponding to the RAM monitoring process set in the specific control program is executed. is written in the stack area 222 for specific control by a push instruction. When the RAM monitoring process ends, information for identifying the return address is read out by a pop instruction, and the program returns to the timer interrupt process indicated by the return address.

FIG. 88 is a flowchart showing RAM monitoring processing. The processing of steps S5401 to S5412 in the RAM monitoring processing is executed by the main CPU 63 using a program for specific control and data for specific control.

First, monitoring processing of the work area 221 for specific control is executed (step S5401). In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the work area 221 for specific control due to noise or the like. Although this monitoring method is arbitrary, for example, in the work area 221 for specific control, whether or not the state of a storage area in which information is not written by various controls in the main CPU 63 is different from the initial state. is monitored, and if the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is "1". , it is determined that an abnormality has occurred if the storage area has a value of "0". In addition to the monitoring method described above, it may be determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined at step S5401 that there is an abnormality (step S5402: YES), the processing from step S5409 to step S5412 is executed. If it is determined that there is no abnormality in step S5401 (step S5402: NO), the process proceeds to step S5403.

In step S5403, monitoring processing of the stack area 222 for specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the stack area 222 for specific control due to noise or the like. Although this monitoring method is arbitrary, for example, in the stack area 222 for specific control, whether or not the state of the storage area in which information is not written by various controls in the main CPU 63 is different from the initial state. is monitored, and if the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is "1". , it is determined that an abnormality has occurred if the storage area has a value of "0". In addition to the monitoring method described above, it may be determined that an abnormality has occurred when the value of a predetermined byte is different from the value that can be set in a normal state.

If it is determined at step S5403 that there is an abnormality (step S5404: YES), the processing from step S5409 to step S5412 is executed. If it is determined that there is no abnormality in step S5403 (step S5404: NO), the process proceeds to step S5405.

In step S5405, monitoring processing of the work area 223 for non-specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the non-specific control work area 223 due to noise or the like. Although this monitoring method is arbitrary, for example, in the non-specific control work area 223, whether or not the state of a storage area in which information is not written by various controls in the main CPU 63 is different from the initial state. and if the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is "1". , it is determined that an abnormality has occurred if the storage area has a value of "0". In addition to the monitoring method described above, it may be determined that an abnormality has occurred when the value of a predetermined byte is different from the value that can be set in a normal state.

If it is determined at step S5405 that there is an abnormality (step S5406: YES), the processing from step S5409 to step S5412 is executed. If it is determined that there is no abnormality in step S5405 (step S5406: NO), the process proceeds to step S5407.

In step S5407, monitoring processing of the stack area 224 for non-specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the stack area 224 for non-specific control due to noise or the like. Although this monitoring method is arbitrary, for example, in the stack area 224 for non-specific control, whether or not the state of a storage area in which information is not written by various controls in the main CPU 63 is different from the initial state. and if the state is different from the initial state, it is determined that an abnormality has occurred. In this case, if the initial state of the storage area is "0", it is determined that an abnormality has occurred if "1" is stored in the storage area, and the initial state of the storage area is "1". , it is determined that an abnormality has occurred if the storage area has a value of "0". In addition to the monitoring method described above, it may be determined that an abnormality has occurred when the value of a predetermined byte is different from a value that can be set in a normal state.

If it is determined at step S5407 that there is an abnormality (step S5408: YES), the processing from step S5409 to step S5412 is executed. Specifically, first, copy processing of the setting value is executed (step S5409). In the copy process, the information of the setting value counter used for specifying the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. . As a result, even if the information of the set value counter is cleared to "0" in the abnormal clearing process (step S5410) executed after this, the pachinko machine 10 before the abnormal clearing process is executed It is possible to grasp the setting value of

After that, a clear process at the time of abnormality is executed (step S5410). In the error clearing process, the work area 221 for specific control except the copy area is cleared to "0", and the stack area 222 for specific control, the work area 223 for non-specific control, and the stack for non-specific control Clear the area 224 to "0". Initialization is performed after clearing to "0". That is, in the RAM monitoring process, an abnormality occurs in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. If it is specified that the specific control work area 221 is cleared to "0" except for the copy area, the stack area 222 for specific control, the work area 223 for non-specific control, and the work area 223 for non-specific control clears the stack area 224 of . As a result, when there is a possibility that some kind of information abnormality has occurred in the main RAM 65, neither the processing corresponding to the specific control nor the processing corresponding to the non-specific control is executed in that state. It becomes possible to do so.

Note that when the stack area 222 for specific control is cleared to "0", the return address information after execution of the RAM monitoring process is also erased. Therefore, when the stack area 222 for specific control is cleared to "0", after the process of step S5412 is completed, the predetermined program is uniquely restored. Specifically, it is configured to return to the process of step S5013 in the main process (FIG. 22) univocally. However, the program that returns uniquely is not limited to step S5013, and may be step S5221 in timer interrupt processing (FIG. 86). When the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the stack area 222 for specific control.

After that, an abnormality command indicating that the clear processing at the time of abnormality has occurred is transmitted to the sound emission control device 81 (step S5411). Upon receiving the abnormal command, the sound emission control device 81 causes the display light emission unit 53 to emit light in a mode corresponding to the forced clear, and outputs the sound "Forcibly cleared" from the speaker unit 54. In addition, the character image "Forcibly cleared" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, the notification is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification end operation may be, for example, pressing the update button 68b or pressing the reset button 68c. By confirming the notification, the manager of the game hall can grasp that the main side RAM 65 has been forcibly cleared.

Thereafter, set value update processing is executed (step S5412). In other words, when the clear processing at the time of abnormality occurs, "0" clear is executed including the set value counter in the work area 221 for specific control, so resetting the set value of the pachinko machine 10 is performed. In order to do so, execute the setting value update process. The contents of the set value update process are the same as those in step S5019 of the main process (FIG. 84). Therefore, each time the update button 68b is pressed once, the set value is updated step by step, and the selected set value is determined by detecting the game ball with the out-hole detection sensor 48a. The set value that is being updated and the set value that has been finalized are displayed on the third notification display device 69c. After that, when the setting key insertion portion 68a is switched from the ON state to the OFF state, it is determined that the end condition of the setting value updating process is satisfied.

Here, it is not determined that the end condition is met only when the setting key insertion portion 68a is in the OFF state. Determined as established. When the setting value update process is executed in the RAM monitoring process (FIG. 88), the setting key insertion unit 68a is in the OFF state at the start of the setting value update process. In order to establish this, it is necessary to insert the setting key into the setting key insertion portion 68a, perform the ON operation once, and then perform the OFF operation. As a result, it is possible to prevent the set value update process from ending even though the manager of the game hall has not performed a normal operation.

When the setting key insertion unit 68a is switched from the ON state to the OFF state and the conditions for terminating the setting value update process are satisfied, step S5111 in the setting value update process (FIG. 85) is executed to It compares whether or not the set value stored in the copy area in the work area 221 for specific control and the set value currently set in the set value counter in the work area 221 for specific control are the same. That is, it is determined whether or not the set value set before the execution of the error clearing process (step S5410) is the same as the set value set in the current set value update process. If both setting values are the same (step S5112: NO), the already explained setting maintenance notification is performed by executing the notification processing for non-change (step S5113). On the other hand, if both setting values are different (step S5112: YES), the already explained setting change notification is performed by executing the change notification processing (step S5114).

According to this embodiment detailed above, the following excellent effects are obtained.

In order to execute the setting value updating process when the supply of the operating power to the pachinko machine 10 is started, not only the setting key insertion portion 68a is turned on but also the reset button 68c is pressed. , the front door frame 14 must be in an open state, and the gaming machine main body 12 must be in an open state. This makes it difficult to illegally execute the set value update process.

The front door frame 14 and the gaming machine main body 12 must be open in order to execute the set value update process. As a result, even if an attempt is made to illegally execute the set value update process, the fraudulent act will be conspicuous because the front door frame 14 and the gaming machine main body 12 are in the open state, and the manager of the gaming hall will Easier to detect fraudulent activity.

In particular, in order to execute the set value update process, not only the opening operation of the gaming machine main body 12 necessary to expose the main control device 60 but also the opening operation of the front door frame 14 are required. It is possible to make the work of the fraudulent act complicated, and to make the fraudulent act conspicuous.

In a configuration in which the processing for progressing the game is not returned to if the setting value update processing is not completed, in order to confirm the setting value selected in the setting value update processing and end the setting value update processing, an out port It is necessary to make the game ball enter 24a to detect the game ball by the outlet detection sensor 48a, and then turn off the setting key insertion portion 68a. As a result, even if the set value update process is illegally executed, it is possible to make it difficult to perform an operation for ending the set value update process and returning to the process for progressing the game.

A set value set before the supply of operating power to the pachinko machine 10 is stopped is compared with a set value selected in the set value update process to determine whether or not both set values are the same. A corresponding notification is performed. As a result, the administrator of the game hall can easily grasp whether or not the set value has been changed by the set value update process.

Neither the game time nor the opening and closing execution mode, and the set value is set on the condition that neither the pattern fluctuation display time in the general diagram display unit 38a nor the general electrical open state in which the general electrical role 34a can be in the open state. By displaying the display for confirmation on the third notification display device 69c, it is possible to prevent the work of confirming the set values while the game is being played. .

In order to make the display for confirming the set value appear on the third notification display device 69c, not only the setting key insertion portion 68a is turned ON but also the front door frame 14 is opened. , and the game machine body 12 must be in an open state. As a result, even if an attempt is made to illegally perform display for confirming the set values, it is possible to make it difficult to do so.

The front door frame 14 and the gaming machine main body 12 must be in an open state so that the display for confirming the set value is displayed on the third notification display device 69c. As a result, even if an attempt is made to illegally perform a display for confirming the set values, the fraudulent act will be conspicuous because the front door frame 14 and the game machine main body 12 are in the open state, and the management of the game hall. It becomes easier for the person to discover the fraudulent act.

In particular, in order to display the display for confirming the set value on the third notification display device 69c, not only the opening operation of the game machine main body 12 necessary for exposing the main control device 60 but also Since the opening operation of the front door frame 14 is also required, it is possible to complicate the work of the fraudulent act and to make the fraudulent act conspicuous.

If any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control is identified as having an abnormality, clears the work area 221 for specific control except for the copy area to "0", and clears the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control to "0". "clear. As a result, when there is a possibility that some kind of information abnormality has occurred in the main RAM 65, both the processing corresponding to the specific control and the processing corresponding to the non-specific control are executed in that state. It is possible to prevent it from being lost.

In the process corresponding to the specific control, an information abnormality occurs not only in the work area 221 for specific control and the stack area 222 for specific control, but also in the work area 223 for non-specific control and the stack area 224 for non-specific control. It is monitored whether or not This makes it possible to simplify the processing configuration compared to a configuration in which whether or not an information abnormality has occurred is monitored separately for the processing corresponding to the specific control and the processing corresponding to the non-specific control.

If any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control is identified as having an abnormality, , in the process corresponding to the specific control, not only the work area 221 for specific control and the stack area 222 for specific control, but also the work area 223 for non-specific control and the stack area 224 for non-specific control are "0 ” is cleared. This makes it possible to simplify the processing configuration compared to the configuration in which the processing corresponding to the specific control and the processing corresponding to the non-specific control are separately cleared to "0".

When the error clearing process is executed due to the occurrence of an information error, the set value updating process is executed. As a result, it is possible to prevent the game from progressing even though the setting value is not set. In this case, if the setting value that was set before executing the clear processing at the time of error is the same as the setting value set by the setting value update processing after the execution of the clear processing at the time of error, , the setting maintenance notification is performed. As a result, even if the clear processing at the time of abnormality is executed, the setting maintenance notification will be performed by resetting the setting value set in the previous situation, and even if the clear processing at the time of abnormality is executed, It is possible to clearly show to the player that the set value has not changed. By the way, since it is common to record the setting values of each pachinko machine 10 installed in the game hall, the setting value update processing after the execution of the clear processing at the time of abnormality so as to become the recorded setting values It is possible to execute

The condition for executing the setting value updating process when the supply of operating power to the pachinko machine 10 is started may be different from the above embodiment. FIG. 89 is a flow chart showing another form of main processing. In the main process, steps S5501 to S5506 and steps S5508 to S5520 are the same as steps S5001 to S5019 of the main process (FIG. 84) in the above embodiment. On the other hand, in the main process, at step S5507, it is determined whether or not the operation handle of the shooting operation device 28 operated to shoot the game ball to the game area PA has been rotated from the initial rotation position. Then, the reset button 68c is pressed (step S5503: YES), the setting key insertion portion 68a is turned ON (step S5504: YES), and the front door frame 14 is opened with respect to the inner frame 13. (step S5505: YES), the gaming machine main body 12 is in an open state with respect to the outer frame 11 (step S5506: YES), and the operation handle of the shooting operation device 28 is rotated from the initial rotation position. If so (step S5507: YES), set value update processing (step S5520) is executed. As a result, in order to execute the setting value updating process when the supply of operating power to the pachinko machine 10 is started, not only is the setting key inserted into the setting key insertion portion 68a and the ON operation is performed, but also the firing It is necessary to start supplying operating power to the pachinko machine 10 in a state where the operating handle of the operating device 28 is rotated. Therefore, it is possible to make it difficult to perform an act of illegally changing the setting value. It should be noted that in step S5507, instead of determining whether or not the operation handle of the firing operation device 28 has been rotated from the initial rotation position, it is determined whether or not the firing operation device 28 is being touched by the player. may be configured.

In addition, as a condition for executing the setting value update process when the supply of operating power to the pachinko machine 10 is started, the front door frame 14 is in an open state with respect to the inner frame 13 and the outer Although both conditions that the gaming machine main body 12 is in an open state with respect to the frame 11 are set, it is also possible to set only one of these conditions.

Further, as a condition for executing the setting value updating process when the supply of the operating power to the pachinko machine 10 is started, the condition that the reset button 68c is pressed is set. However, the configuration may be such that the condition is not set.

Further, as a condition for executing the setting value updating process when the supply of the operating power to the pachinko machine 10 is started, the operation of the pachinko machine 10 in a state where the game ball is detected by the gate detection sensor 49a. A configuration in which the condition that power supply has started is also possible. As a result, in order to execute the setting value updating process when the supply of operating power to the pachinko machine 10 is started, not only inserting the setting key into the setting key inserting section 68a and performing the ON operation, It is necessary to start supply of operating power to the pachinko machine 10 in a state in which the game balls are retained in the gate 35.例文帳に追加Therefore, it is possible to make it difficult to perform an act of illegally changing the set value.

Further, the content of the operation for finalizing the set value in the set value update process may be different from that in the above embodiment. FIG. 90 is a flow chart showing a set value update process in another form. In the set value update process, steps S5601 to S5602 and steps S5604 to S5614 are the same as steps S5101 to S5102 and steps S5104 to S5114 of the set value update process (FIG. 85) in the above embodiment. . On the other hand, in the setting value update process, in step S5603, it is not determined whether or not the game ball is detected by the outlet detection sensor 48a, but the ON signal is continuously output from the gate detection sensor 49a. It is determined whether or not the ON continuation period is equal to or longer than the end reference period (specifically, 5 seconds). If an affirmative determination is made in step S5603, the setting value being selected is determined, and the process proceeds to step S5609. According to this configuration, in order to fix the set value being selected, it is necessary to intentionally retain the game ball in the through gate 35 for the end reference period or longer. A game ball stays in the through gate 35 for more than the end reference period does not occur in a situation where a normal game is played. As a result, it is possible to make it so that the condition for fixing the set value being selected is not established or is difficult to be established in a situation where a normal game is being played. Further, even if the setting value update process is started due to fraud, it is possible to make it difficult to perform an operation for fixing the setting value being selected in the setting value update process.

Further, in the setting value updating process, the setting value being selected may be confirmed when the operation handle of the firing operation device 28 is rotated from the initial rotation position, and the firing operation device 28 may be touched by the player. A configuration may be adopted in which the set value being selected is determined when the

Further, in the setting value update process, when the special electric detection sensor 45a detects that a game ball has entered the special electric winning device 32 provided with an opening/closing member, the set value being selected may be determined. Well, it may be configured such that the set value being selected is determined when the second operation opening detection sensor 47a detects that a game ball has entered the second operation opening 34 provided with an opening/closing member. In this case, in order to fix the set value being selected, it is necessary to maintain the game ball after manually opening the target ball entry part, so that it is difficult to illegally change the set value. becomes possible.

Also, in the set value update process, selection is made based on detection of a game ball entering the second ball entering portion after detection of the game ball entering the first ball entering portion. It is also possible to adopt a configuration in which the set value inside is determined. In this case, in order to fix the set value being selected, it is necessary to enter the game ball into a plurality of ball entry sections by maintenance according to a predetermined order. becomes possible. In this case, both the first ball entry part and the second ball entry part are provided with opening and closing members so that the workability of regular work will not be extremely reduced. It becomes possible to

Further, in the setting value update process, by switching the setting key insertion part 68a from the ON state to the OFF state, the setting value being selected may be determined and the end condition of the setting value update process may be satisfied.

Further, in the setting value update process, the operation for updating the setting value by one step is not limited to the pressing operation of the update button 68b. It may be configured to be updated.

In addition, when the supply of the operating power to the pachinko machine 10 is started in the state where the reset button 68c is pressed and the setting key insertion portion 68a is ON-operated by the setting key, When the front door frame 14 is not in an open state with respect to the frame 13 or when the game machine main body 12 is not in an open state with respect to the outer frame 11, the clear processing (step S5007) at the time of non-setting update is executed. There is no limitation, and a configuration may be adopted in which the clear processing is not executed at the time of non-setting update. As a result, it is possible to prevent the execution of the clear processing at the time of non-setting update against the will of the manager of the game hall.

In addition, when the supply of operating power to the pachinko machine 10 is started in a situation where the reset button 68c is pressed and the setting key insertion portion 68a is not ON-operated by the setting key, When the front door frame 14 is not in an open state with respect to the frame 13 or when the game machine main body 12 is not in an open state with respect to the outer frame 11, the clear processing (step S5007) at the time of non-setting update is executed. There is no limitation, and a configuration may be adopted in which the clear processing is not executed at the time of non-setting update. As a result, it is possible to make it difficult to illegally execute the clear processing at the time of non-setting update.

<Twenty-third Embodiment>
This embodiment differs from the twenty-second embodiment in the processing configuration of the main processing. The configuration different from that of the twenty-second embodiment will be described below. Note that the description of the same configuration as that of the twenty-second embodiment is basically omitted.

FIG. 91 is a flow chart showing main processing in this embodiment executed by the main CPU 63 . It should be noted that the processing of steps S5701 to S5720 in the main processing is executed by the main CPU 63 using a program for specific control and data for specific control.

First, power-on wait processing is executed (step S5701). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, one second) elapses after the main process is activated. The operation start and initial setting of the pattern display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S5702).

After that, based on the detection result of the front door open sensor 95, it is determined whether or not the front door frame 14 is open with respect to the inner frame 13 (step S5703). It is determined whether or not the gaming machine main body 12 is in the open state (step S5704), and it is determined whether or not the reset button 68c is pressed (step S5705). If a negative determination is made in any of steps S5703 to S5705, the processing of steps S5706 to S5714 is executed. These steps S5706 to S5714 are the same as steps S5008 to S5016 of the main process (FIG. 84) in the twenty-second embodiment.

If affirmative determinations are made in all of steps S5703 to S5705, selection processing is executed (step S5715). In the selection process, either a situation in which the clear process is executed when the settings are not updated and the setting value update process is not executed, or a situation in which the setting value update process is executed while the clear process is executed when the settings are updated. A process of determining whether is based on the selection operation by the manager of the game hall is executed. Specifically, each time the update button 68b is pressed once, the state in which one of the above states is selected is switched to the state in which the other state is selected. Note that the selection operation may be performed by operating the reset button 68c, or may be performed by operating another operation unit. Further, when the user selects a situation in which the clearing process is executed at the time of non-setting update and the set value updating process is not executed, "O" is displayed on the first notification display device 69a and the second notification display device 69b is displayed. And when the third notification display device 69c is turned off and the setting update processing is executed along with the clearing process at the time of setting update, "O" is displayed on the second notification display device 69b. is displayed, and the first notification display device 69a and the third notification display device 69c are turned off. In addition, when the reset button 68c is continuously pressed for a fixed selection period (specifically, 10 seconds) or more, the situation selected from among the above situations is confirmed as the current selection target. do.

Note that when the update button 68b is continuously pressed for a fixed selection period (specifically, 10 seconds) or more, the situation selected from among the above situations is confirmed as the current selection target. It may be configured such that when another operation unit is continuously pressed for a fixed selection period (specifically, 10 seconds) or longer, the situation selected from among the above situations is selected as the current selection. It is good also as a structure which determines as a target. Moreover, it is also possible to adopt a configuration in which the situation selected from among the above situations is confirmed as the current selection target by rotating the operation handle of the firing operation device 28 .

In the selection process, if a situation in which the clear process at the time of non-setting update is executed and the setting value update process is not executed is confirmed as the current selection target (step S5716: NO), the clear process at the time of non-setting update is executed. (Step S5717). The processing contents of the clear processing at the time of non-setting update are the same as step S5007 of the main processing (FIG. 84) in the twenty-second embodiment.

In the selection process, if the situation in which the clear process at the time of setting update is executed and the setting value update process is executed as the current selection target (step S5716: YES), the setting value copy process is executed (step S5718), clear processing at the time of setting update is executed (step S5719), and setting value update processing is executed (step S5720). The processing contents of these steps S5718 to S5720 are the same as steps S5017 to S5019 of the main processing (FIG. 84) in the twenty-second embodiment.

According to the above configuration, even in a configuration in which the setting key insertion unit 68a is not provided, the clear processing is executed when the setting is not updated and the setting value update processing is not executed, and the clear processing is performed when the setting is updated. As a result, it becomes possible for the manager of the game hall to select in which situation the set value update process is to be executed.

In addition, not only when executing the setting value updating process but also when executing the clearing process at the time of non-setting update, the supply of the operating power to the pachinko machine 10 is stopped in the state where the reset button 68c is pressed. In addition to starting, it is necessary to open the front door frame 14 with respect to the inner frame 13 and open the game machine main body 12 with respect to the outer frame 11 . As a result, it is possible to make it difficult to illegally execute the clear processing at the time of non-setting update.

As conditions for executing the selection process when the supply of operating power to the pachinko machine 10 is started, the front door frame 14 must be in an open state with respect to the inner frame 13 and the outer frame 11, both conditions that the gaming machine main body 12 is in the open state are set, but only one of these conditions may be set.

In addition, as a condition for executing the selection process when the supply of operating power to the pachinko machine 10 is started, a condition that the firing handle of the firing operation device 28 is rotated is added. It may be a configuration in which a condition that the shooting operation device 28 is being touched may be added, or a configuration in which a condition that a game ball is detected by the gate detection sensor 49a is added. good too.

<24th Embodiment>
This embodiment differs from the twenty-second embodiment in the processing configuration of the RAM monitoring process. The configuration different from that of the twenty-second embodiment will be described below. Note that the description of the same configuration as that of the twenty-second embodiment is basically omitted.

FIG. 92 is a flow chart showing RAM monitoring processing in this embodiment executed by the main CPU 63 . The processing of steps S5801 to S5814 in the RAM monitoring processing is executed by the main CPU 63 using the specific control program and specific control data.

First, monitoring processing of the work area 221 for specific control is executed (step S5801). The content of the monitoring process is the same as step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined that there is an abnormality in step S5801 (step S5802: YES), the processing of steps S5805 to S5808 is executed.

If it is not determined in step S5801 that there is an abnormality (step S5802: NO), the stack area 222 for specific control is monitored (step S5803). The content of the monitoring process is the same as step S5403 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined at step S5803 that there is an abnormality (step S5804: YES), the processing from step S5805 to step S5808 is executed.

In details of the processing of steps S5805 to S5808, first, copy processing of setting values is executed (step S5805). In the copy process, the information of the setting value counter used for specifying the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. . As a result, even if the information of the setting value counter is cleared to "0" in the abnormal clearing process (step S5806) executed later, this pachinko machine 10 before the abnormal clearing process is executed It is possible to grasp the setting value of

After that, clear processing at the time of abnormality is executed (step S5806). In the error clearing process, the work area 221 for specific control except for the copy area is cleared to "0", and the stack area 222 for specific control is cleared to "0". Initialization is performed after clearing to "0". On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". That is, in the RAM monitoring process of this embodiment, when it is specified that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the specific control except for the copy area is performed. The work area 221 for specific control is cleared to "0" and the stack area 222 for specific control is cleared to "0". As a result, when there is a possibility that some kind of information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control is executed in that state. It is possible to prevent it from being lost. Even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". Triggered by information abnormality in the work area 221 for specific control or stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". It is possible to prevent

Note that when the stack area 222 for specific control is cleared to "0", the return address information after execution of the RAM monitoring process is also erased. Therefore, when the stack area 222 for specific control is cleared to "0", after the process of step S5808 is completed, the predetermined program is uniquely restored. Specifically, it is configured to return to the process of step S5013 in the main process (FIG. 22) univocally. However, the program that returns uniquely is not limited to step S5013, and may be step S5221 in the timer interrupt process (FIG. 86). When the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the stack area 222 for specific control.

After that, an abnormality command indicating that the clear processing at the time of abnormality has occurred is transmitted to the sound emission control device 81 (step S5807). Upon receiving the abnormal command, the sound emission control device 81 causes the display light emission unit 53 to emit light in a mode corresponding to the forced clear, and outputs the sound "Forcibly cleared" from the speaker unit 54. In addition, the character image "Forcibly cleared" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, the notification is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification end operation may be, for example, pressing the update button 68b or pressing the reset button 68c. By confirming the notification, the manager of the game hall can grasp that the work area 221 for specific control and the stack area 222 for specific control have been forcibly cleared.

Thereafter, set value update processing is executed (step S5808). The contents of the set value update process are the same as those in step S5412 in the RAM monitor process (FIG. 88) in the twenty-second embodiment.

If it is determined that there is no abnormality in both steps S5801 and S5803 (steps S5802 and S5804: NO), the work area 223 for non-specific control is monitored (step S5809). The content of the monitoring process is the same as step S5405 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined that there is an abnormality in step S5809 (step S5810: YES), the work area 223 for non-specific control is cleared to "0" and initial setting is performed (step S5811). In this case, the normal counter area 231, open/close execution mode counter area 232, high frequency support mode counter area 233, calculation result storage area 234, and management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

On the other hand, in step S5811, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are " 0” can be prevented from being cleared.

In step S5811, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are cleared to "0", but the management start flag is not cleared to "0". may be configured. In step S5811, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the management start flag are cleared to "0", but the calculation result storage area 234 is not cleared to "0". may be configured. In step S5811, the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233 are cleared to "0", but the calculation result storage area 234 and the management start flag are not cleared to "0". may be configured.

If a negative determination is made in step S5810 or if the processing of step S5811 is executed, the stack area 224 for non-specific control is monitored (step S5812). The content of the monitoring process is the same as step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined that there is an abnormality in step S5812 (step S5813: YES), the stack area 224 for non-specific control is cleared to "0" and initialized (step S5814). This makes it possible to eliminate the information abnormality in the stack area 224 for non-specific control.

On the other hand, in step S5814, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are " 0” can be prevented from being cleared.

According to the above configuration, when it is specified that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control except for the copy area is cleared to "0" and the stack area 222 for specific control is cleared to "0". As a result, when there is a possibility that some kind of information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control is executed in that state. It is possible to prevent it from being lost.

Even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0" by an information abnormality in the work area 221 for specific control or the stack area 222 for specific control. It becomes possible to do so.

Even if an information error occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". This prevents the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control from being cleared to "0" by an information abnormality in the work area 223 for non-specific control. becomes possible.

Even if an information error occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". This prevents the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control from being cleared to "0" by the information abnormality in the stack area 224 for non-specific control. becomes possible.

When an information error occurs in the work area 221 for specific control, the work area 221 for specific control except for the copy area is cleared to "0", while the stack area 222 for specific control is set to " 0” may be configured not to be cleared.

Further, when an information abnormality occurs in the stack area 222 for specific control, the stack area 222 for specific control is cleared to "0", while the work area 221 for specific control is not cleared to "0". may be In this case, even if the stack area 222 for specific control is cleared to "0", the processing of steps S5805 to S5808 may not be executed.

<Twenty-Fifth Embodiment>
This embodiment differs from the twenty-second embodiment in the processing configuration for monitoring whether or not an information abnormality has occurred in each of the areas 221 to 224 of the main RAM 65 . The configuration different from that of the twenty-second embodiment will be described below. Note that the description of the same configuration as that of the twenty-second embodiment is basically omitted.

FIG. 93 is a flow chart showing RAM monitoring processing in this embodiment executed by the main CPU 63 . The processing of steps S5901 to S5908 in the RAM monitoring processing is executed by the main CPU 63 using the specific control program and specific control data.

First, monitoring processing of the work area 221 for specific control is executed (step S5901). The content of the monitoring process is the same as step S5401 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined at step S5901 that there is an abnormality (step S5902: YES), the processing from step S5905 to step S5908 is executed.

If it is not determined in step S5901 that there is an abnormality (step S5902: NO), the stack area 222 for specific control is monitored (step S5903). The content of the monitoring process is the same as step S5403 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined at step S5903 that there is an abnormality (step S5904: YES), the processing from step S5905 to step S5908 is executed.

In details of the processing of steps S5905 to S5908, first, copy processing of setting values is executed (step S5905). In the copy process, the information of the setting value counter used for specifying the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. . As a result, even if the information of the set value counter is cleared to "0" in the abnormal clearing process (step S5906) executed after this, the pachinko machine 10 before the abnormal clearing process is executed It is possible to grasp the setting value of

After that, a clear process at the time of abnormality is executed (step S5906). In the error clearing process, the work area 221 for specific control except for the copy area is cleared to "0", and the stack area 222 for specific control is cleared to "0". Initialization is performed after clearing to "0". On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". That is, in the RAM monitoring process of this embodiment, when it is specified that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the specific control except for the copy area is performed. The work area 221 for specific control is cleared to "0" and the stack area 222 for specific control is cleared to "0". As a result, when there is a possibility that some kind of information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control is executed in that state. It is possible to prevent it from being lost. Even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". Triggered by information abnormality in the work area 221 for specific control or stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". It is possible to prevent

After that, an abnormality command indicating that the clear processing at the time of abnormality has occurred is transmitted to the sound emission control device 81 (step S5907). By receiving the abnormal command, the audio light emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the forced clearing of the work area 221 for specific control and the stack area 222 for specific control, and also causes the speaker unit 54 to emit light. output a voice saying "Forcible clear has been executed for specific control." Also, a character image saying "Forcible clearing has been executed for specific control" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can grasp that the work area 221 for specific control and the stack area 222 for specific control have been forcibly cleared.

Thereafter, set value update processing is executed (step S5908). The contents of the set value update process are the same as those in step S5412 in the RAM monitor process (FIG. 88) in the twenty-second embodiment.

In the RAM monitoring process executed using the specific control program and the specific control data as described above, the work area 221 for specific control and the stack area 222 for specific control are monitored for information abnormalities. However, the work area 223 for non-specific control and the stack area 224 for non-specific control are not monitored for information abnormality. The monitoring of information abnormalities in the work area 223 for non-specific control and the stack area 224 for non-specific control is a process corresponding to non-specific control in which programs for non-specific control and data for non-specific control are used. is executed.

FIG. 94 is a flow chart showing management execution processing in this embodiment executed by the main CPU 63 . The management execution process is executed by reading out a subroutine program in the management process (FIG. 70) as in the fifteenth embodiment. Further, the processing of steps S6001 to S6016 in the management execution processing is executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

In steps S6001 to S6008 and steps S6010 to S6016, the same processes as steps S3901 to S3915 of the management execution process (FIG. 71) in the fifteenth embodiment are executed. Further, in step S6009, another monitoring process is executed. When executing the separate monitoring process, a subroutine program corresponding to the separate monitoring process set in the non-specific control program is executed. Information for specifying the return address of the management execution process later is written in the stack area 224 for non-specific control by the push instruction. Then, when the separate monitoring process is completed, information for specifying the return address is read by the pop command, and the program of the management execution process indicated by the return address is returned to.

FIG. 95 is a flow chart showing another monitoring process. Note that the processes of steps S6101 to S6108 in the separate monitoring process are executed by the main CPU 63 using a program for non-specific control and data for non-specific control.

First, monitoring processing of the work area 223 for non-specific control is executed (step S6101). The content of the monitoring process is the same as step S5405 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined that there is an abnormality in step S6101 (step S6102: YES), the non-specific control work area 223 is cleared to "0" and initial setting is performed (step S6103). In this case, the normal counter area 231, open/close execution mode counter area 232, high frequency support mode counter area 233, calculation result storage area 234, and management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

On the other hand, in step S6103, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are " 0” can be prevented from being cleared.

In step S6103, the normal counter area 231, open/close execution mode counter area 232, high frequency support mode counter area 233, and calculation result storage area 234 are cleared to "0", but the management start flag is not cleared to "0". may be configured. In step S6103, the normal counter area 231, the opening/closing execution mode counter area 232, the high frequency support mode counter area 233, and the management start flag are cleared to "0", but the calculation result storage area 234 is not cleared to "0". may be configured. In step S6103, the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 are cleared to "0", but the calculation result storage area 234 and the management start flag are not cleared to "0". may be configured.

After that, clear notification processing is executed (step S6104). In the clear notification process, a command indicating that the non-specific control work area 223 has been cleared to "0" is transmitted to the sound emission control device 81 . Upon receiving the command, the audio light emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the forced clearing of the work area 223 for non-specific control, and also outputs “History information is forcibly cleared” from the speaker unit 54. It outputs a sound saying "I'm sorry. In addition, the character image "history information has been forcibly cleared" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can grasp that the work area 223 for non-specific control has been forcibly cleared.

When a negative determination is made in step S6102 or when the process of step S6104 is executed, the process of monitoring the stack area 224 for non-specific control is executed (step S6105). The content of the monitoring process is the same as step S5407 of the RAM monitoring process (FIG. 88) in the twenty-second embodiment. If it is determined that there is an abnormality in step S6105 (step S6106: YES), the stack area 224 for non-specific control is cleared to "0" and initialized (step S6107). This makes it possible to eliminate the information abnormality in the stack area 224 for non-specific control.

On the other hand, in step S6107, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are " 0” can be prevented from being cleared.

After that, clear notification processing is executed (step S6108). In the clear notification process, a command indicating that the non-specific control stack area 224 has been cleared to "0" is transmitted to the sound emission control device 81 . Upon receiving the command, the audio light emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the forced clearing of the stack area 224 for non-specific control, and also outputs from the speaker unit 54, "The stack for non-specific control is Forced clear." is output. In addition, the symbol display device 41 is made to display a character image saying "Unspecified control stack is forcibly cleared." These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can grasp that the stack area 224 for non-specific control has been forcibly cleared.

When the non-specific control stack area 224 is forcibly cleared, the address of the program in step S6010 in the management execution process (FIG. 94) is uniquely set as return address information after execution of the separate monitoring process. . As a result, even if the non-specific control stack area 224 is forcibly cleared, it is possible to return to the original program to be returned in the management execution process. When the stack area 224 for non-specific control is forcibly cleared, the stack pointer of the main CPU 63 is also set to the address of the first storage area in the stack area 224 for non-specific control.

According to the above configuration, the monitoring of whether or not an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control is executed in the process corresponding to the specific control in the main CPU 63. Monitoring of whether or not an information abnormality has occurred in the work area 223 for specific control and the stack area 224 for non-specific control is executed in the process corresponding to the non-specific control in the main CPU 63 . As a result, not only are the areas 221 to 224 of the main RAM 65 to be used clearly distinguished between the processing corresponding to the specific control and the processing corresponding to the non-specific control, but also the areas of the main RAM 65 to be monitored are clearly distinguished. 221 to 224 can also be clearly distinguished.

In addition, when the work area 223 for non-specific control is cleared to "0", the information of various registers of the main side CPU 63 used in the process corresponding to the specific control is stored in the work area 223 for non-specific control. The saved information is also cleared to "0". In this case, even if the processing corresponding to the non-specific control is completed and the processing corresponding to the specific control is resumed, there is a possibility that the state before the processing corresponding to the non-specific control is started cannot be restored. Therefore, when the work area 2223 for non-specific control is cleared to "0", the work area 221 for specific control and the stack area 222 for specific control may also be cleared to "0". Also, in this configuration, the set value counter in the work area 221 for specific control is also cleared to "0", so when returning from processing corresponding to non-specific control to processing corresponding to specific control, The setting value update process may be executed first as the corresponding process.

<26th Embodiment>
This embodiment differs from the twentieth embodiment in the processing configuration of management processing. The configuration that is different from the twentieth embodiment will be described below. The description of the same configuration as that of the twentieth embodiment is basically omitted.

FIG. 96 is a flow chart showing management processing in this embodiment executed by the main CPU 63 . The processing of steps S6201 to S6219 in the management processing is executed by the main CPU 63 using the specific control program and specific control data.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S6201). This prevents the timer interrupt processing (FIG. 69), which corresponds to the specific control, from being interrupted and started in the middle of the management execution processing (described later), which corresponds to the non-specific control. becomes possible.

After that, as "LD HL, SP", the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by the load instruction (step S6202). In this case, the amount of information in the stack pointer is 16 bits, and the amount of information in each of the H and L registers is 8 bits. , and continuous 8-bit information from the lower side of the stack pointer is overwritten in the L register.

After that, as "LD (HL), 0", a 1-byte storage area corresponding to the information of the stack pointer stored in the HL register of the main CPU 63 in the stack area 222 for specific control is set to "0" by the load instruction. Clear (step S6203). Note that the HL register of the main CPU 63 has been overwritten with the information of the stack pointer of the main CPU 63 in step S6202, and the information of the stack pointer of the main CPU 63 has not been updated until the process of step S6203 is executed. Since this has not been done, in step S6203, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

After that, as "LD SP, SP-1", the information of the stack pointer of the main side CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by the load instruction. (Step S6204). When the stack area 222 for specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 222 for specific control. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6204, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the processing of step S6204, the storage area next in order to the storage area cleared to "0" in step S6203 is set as the storage target of information by the next push command, and in step S6203 The storage area cleared to "0" is set as an information read target by the next pop command.

After that, as "LD WA, 0", the WA register of the main side CPU 63 is cleared to "0" by the load instruction (step S6205). Also, as "LD BC, 0", the BC register of the main CPU 63 is cleared to "0" by the load instruction (step S6206). Also, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by the load instruction (step S6207). Also, as "LD HL, 0", the HL register of the main CPU 63 is cleared to "0" by the load instruction (step S6208). Also, as "LD IX, 0", the IX register of the main side CPU 63 is cleared to "0" by the load instruction (step S6209). Also, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by the load instruction (step S6210).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in steps S6205 to S6210, the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these general-purpose registers, auxiliary registers, and index registers, are Clear "0". These WA register, BC register, DE register, HL register, IX register and IY register are registers used in management execution processing (step S6212) which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of management execution processing (step S6212), which is processing corresponding to non-specific control, the state of these registers can be changed before processing corresponding to non-specific control is started. In addition, the state immediately after the start of supply of operating power to the main CPU 63 can be obtained.

In addition, each information of the WA register, BC register, DE register, HL register, IX register and IY register before the processing corresponding to non-specific control is started is This information is unnecessary in the processing corresponding to the specific control. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem occurs in the processing corresponding to the specific control that is returned after the processing corresponding to the non-specific control is completed.

After that, as "POP PSW", information is read from the storage area in the order of writing immediately before the storage area corresponding to the information of the stack pointer of the main side CPU 63 in the stack area 222 for specific control by the pop instruction, The flag register of the main CPU 63 is overwritten with the read information (step S6211). The information of the stack pointer of the main CPU 63 immediately before the pop instruction in step S6211 is executed is the storage area in the next writing order with respect to the storage area in the stack area 222 for specific control cleared to "0" in step S6203. It is information corresponding to Therefore, the storage area in the write order that is immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the specific control stack area 222 becomes the storage area cleared to "0" in step S6203. . By overwriting the flag register of the main CPU 63 with the information read from this storage area, the flag register is cleared to "0". One storage area in the stack area 222 for specific control has an information amount of 8 bits (1 byte), and the flag register of the main side CPU 63 also has an information amount of 8 bits (1 byte). . By clearing the flag register to "0" prior to execution of the management execution process (step S6212), which is the process corresponding to the non-specific control, the state of the flag register is set to "0" before the process corresponding to the non-specific control is started. It is possible to enter the state immediately after the supply of operating power to the main CPU 63 is started.

After that, the management execution processing is started by reading out the subroutine program corresponding to the management execution processing set in the non-specific control program (step S6212). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push instruction. Then, when the management execution processing is completed, information for specifying the return address is read out by a pop instruction, and the program for management processing indicated by the return address is returned to.

The contents of the management execution process are the same as those of the management execution process (FIG. 82) in the twentieth embodiment. Therefore, after the check process is completed in the management execution process, the WA register, BC register, DE register, HL register, IX register and IY register are cleared to "0". As a result, these registers are cleared to "0" prior to returning from the processing corresponding to the non-specific control to the processing corresponding to the specific control, and the states of these registers are changed to "0" before returning to the processing corresponding to the specific control. It is possible to enter the state immediately after the supply of operating power to the main CPU 63 is started.

When returning to the management processing program after executing the management execution processing, processing for clearing the flag register of the main side CPU 63 to "0" is executed. Specifically, first, as "PUSH HL", information in the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6213). After the push instruction is executed, the information of the stack pointer of the main CPU 63 is the information corresponding to the storage area in the order of writing next to the storage area where the information of the HL register is saved in the stack area 222 for specific control. Become.

Thereafter, as "LD HL, SP", the HL register of the main CPU 63 is overwritten with the information of the stack pointer of the main CPU 63 by the load instruction (step S6214). In this case, the amount of information in the stack pointer is 16 bits, and the amount of information in each of the H and L registers is 8 bits. , and continuous 8-bit information from the lower side of the stack pointer is overwritten in the L register.

After that, as "LD (HL), 0", a 1-byte storage area corresponding to the information of the stack pointer stored in the HL register of the main CPU 63 in the stack area 222 for specific control is set to "0" by the load instruction. Clear (step S6215). Note that the HL register of the main CPU 63 has been overwritten with the information of the stack pointer of the main CPU 63 in step S6214, and the information of the stack pointer of the main CPU 63 has not been updated until the process of step S6215 is executed. Since this has not been done, in step S6215, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

After that, as "LD SP, SP-1", the information of the stack pointer of the main side CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by the load instruction. (Step S6216). When the stack area 222 for specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 222 for specific control. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6216, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the processing of step S6216, the storage area next in order to the storage area cleared to "0" in step S6215 is set as the storage target of information by the next push command, and in step S6215 The storage area cleared to "0" is set as the information read target by the next pop command.

After that, as "POP PSW", information is read from the storage area in the order of writing immediately before the storage area corresponding to the information of the stack pointer of the main side CPU 63 in the stack area 222 for specific control by the pop instruction, The flag register of the main CPU 63 is overwritten with the read information (step S6217). The information of the stack pointer of the main CPU 63 immediately before the pop instruction in step S6217 is executed is the storage area in the next writing order with respect to the storage area in the stack area 222 for specific control cleared to "0" in step S6215. It is information corresponding to Therefore, in the stack area 222 for specific control, the storage area in the order of writing immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 is cleared to "0" in step S6215. It becomes a storage area in the stack area 222 . By overwriting the flag register of the main CPU 63 with the information read from this storage area, the flag register is cleared to "0". One storage area in the stack area 222 for specific control has an information amount of 8 bits (1 byte), and the flag register of the main side CPU 63 also has an information amount of 8 bits (1 byte). . By clearing the flag register to "0" after the execution of the management execution process (step S6212), which is the process corresponding to the non-specific control, the state of the flag register is set to "0" after the process corresponding to the non-specific control is completed. It is possible to enter the state immediately after the supply of operating power to the is started. Further, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area one ahead in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6213 is returned to the HL register of the main CPU 63 by a pop instruction (step S6218). Since the HL register is cleared to "0" immediately before the management execution process (step S6212) ends, the information cleared to "0" is saved in the stack area 222 for specific control in step S6213. At the same time, in step S6218, the information cleared to "0" is returned to the HL register of the main CPU 63, so that the HL register of the main CPU 63 is cleared to "0". Also, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, in order to switch from the state in which the generation of timer interrupt processing (FIG. 69) is prohibited to the state in which it is permitted, interrupt permission is set (step S6219). This enables a new execution of timer interrupt processing.

According to the above configuration, the following effects can be obtained in addition to the effects described in the twentieth embodiment.

It is configured to clear the flag register of the main side CPU 63 to "0" when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is being executed. As a result, there is no need to save the information of the flag register used in the process corresponding to the specific control in the main RAM 65 when the process corresponding to the non-specific control is being executed. Therefore, there is no need to secure a capacity for saving the information.

The flag register of the main side CPU 63 is also cleared to "0" when the process corresponding to the non-specific control is returned to the process corresponding to the specific control. As a result, when returning to the processing corresponding to the specific control, it is possible to restore the state of the flag register to the state immediately before the processing corresponding to the non-specific control is started.

The state in which the flag register is cleared to "0" is the state when supply of operating power to the MPU 62 is started. This makes it possible to simplify the processing configuration for setting the flag register to a predetermined state when starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control.

The information in the flag register of the main CPU 63 before the process corresponding to the non-specific control is started is the information that is not used in the process corresponding to the specific control after the process corresponding to the non-specific control is finished. As a result, even if the flag register is cleared to "0" when the processing corresponding to the non-specific control is started, the processing corresponding to the specific control after the processing corresponding to the non-specific control is completed. It is possible not to influence it.

A predetermined storage area in the stack area 222 for specific control is cleared to "0", and the flag register is overwritten with information in the storage area cleared to "0" by a pop instruction, thereby clearing the flag register to "0". Configuration. This makes it possible to clear the flag register to "0" even in a configuration in which direct clearing of the flag register to "0" by a load instruction is regulated.

Instead of clearing the flag register to "0", the flag register may be initialized. That is, when the supply of operating power to the MPU 62 is started, the flag register of the main CPU 63 is once cleared to "0", and then the information is set so as to be in the initial state. In step S6211, the flag register may be set so as to be in this initial state. In this case, by configuring the flag register to be set to the initial state in steps S6213 to S6218 as well, when returning to the process corresponding to the specific control, the state of the flag register is changed to the non-specific control. It is possible to return to the state immediately before the processing corresponding to is started.

Further, in steps S6202 to S6204 and step S6211, instead of clearing the flag register of the main CPU 63 to "0", the flag register may be set to "1". In this case, by setting "1" to all the flag registers in steps S6213 to S6218 as well, when returning to the processing corresponding to the specific control, the state of the flag register is changed to the processing corresponding to the non-specific control. It is possible to return to the state immediately before being done.

Further, instead of the processing of steps S6202 to S6204 and step S6211, the flag register of the main side CPU 63 may be directly cleared to "0" by the load instruction as "LD PSW, 0". Further, instead of the processing of steps S6213 to S6218, the flag register of the main side CPU 63 may be directly cleared to "0" by the load instruction as "LD PSW, 0".

Further, instead of executing the processing of steps S6213 and S6218, a configuration may be used in which the HL register is cleared to "0" by a load instruction as "LD HL, 0". Even in this case, it is possible to restore the state of the HL register to the state immediately before execution of the management execution process, which is the process corresponding to non-specific control.

Further, instead of the configuration in which the processing for clearing the flag register to "0" is executed in the processing corresponding to the specific control, it may be configured to be executed in the processing corresponding to the non-specific control.

<27th Embodiment>
This embodiment differs from the twentieth embodiment in the processing configuration of management processing. The configuration that is different from the twentieth embodiment will be described below. The description of the same configuration as that of the twentieth embodiment is basically omitted.

FIG. 97 is a flow chart showing management processing in this embodiment executed by the main CPU 63 . Note that the processing of steps S6301 to S6323 in the management processing is executed by the main CPU 63 using the specific control program and specific control data.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S6301). This prevents the timer interrupt processing (FIG. 69), which corresponds to the specific control, from being interrupted and started in the middle of the management execution processing (described later), which corresponds to the non-specific control. becomes possible.

After that, as "PUSH AF", the information of the A register and the information of the flag register of the main CPU 63 are stored corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The area and the storage area are saved in the next storage area in the order of writing (step S6302). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are separately stored for two storage areas with consecutive addresses. be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

After that, as "POP HL", the HL register of the main CPU 63 is overwritten with the information in the A register and the information in the flag register saved in the stack area 222 for specific control in step S6302 by a pop instruction (step S6303). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is transferred to the L register of the main CPU 63. overwritten in the register. The H register and L register of the main side CPU 63 each have an information amount of 8 bits (1 byte). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, as "LD A, 0", the A register of the main side CPU 63 is cleared to "0" by the load instruction (step S6304). Then, as "LD L, A", the information in the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by the load instruction (step S6305). The information in the A register of the main CPU 63 is overwritten in the H register of the main CPU 63 (step S6306). Since the A register has been cleared to "0" in step S6304, the L and H registers are cleared to "0" by overwriting the information in the A register to the L and H registers. becomes.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in the storage area and in the next storage area in the writing order for the storage area (step S6307). Since the H register and L register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the H register and the information of the L register are separately stored for two storage areas with consecutive addresses. be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

After that, as "LD BC, 0", the BC register of the main side CPU 63 is cleared to "0" by the load instruction (step S6308). Also, as "LD DE, 0", the DE register of the main CPU 63 is cleared to "0" by the load instruction (step S6309). Also, as "LD IX, 0", the IX register of the main side CPU 63 is cleared to "0" by the load instruction (step S6310). Also, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by the load instruction (step S6311).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the flag registers. In this case, in steps S6308 to S6311, the BC register, DE register, IX register and IY register, which are some of these general-purpose registers, auxiliary registers and index registers, are cleared to "0". Also, the HL register is cleared to "0" in steps S6305 and S6306. These BC register, DE register, HL register, IX register and IY register are registers used in management execution processing (step S6313) which is processing corresponding to non-specific control. By clearing such registers to "0" prior to execution of management execution processing (step S6313), which is processing corresponding to non-specific control, the states of these registers are changed to zero before processing corresponding to non-specific control is started. In addition, the state immediately after the start of supply of operating power to the main CPU 63 can be obtained.

In addition, each information of the BC register, DE register, HL register, IX register and IY register before the processing corresponding to the non-specific control is started is used for the specific control after the processing corresponding to the non-specific control is completed. This information is unnecessary for the corresponding processing. Therefore, even if the information in these registers is cleared to "0" without being saved, no problem occurs in the processing corresponding to the specific control that is returned after the processing corresponding to the non-specific control is completed.

After that, as "POP AF", the A register and the flag register of the main CPU 63 are overwritten with the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6307 by the pop instruction ( step S6312). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control becomes the flag of the main CPU 63. overwritten in the register. Since both the information of the H register and the information of the L register saved in the stack area 222 for specific control are all "0" information, the A register of the main CPU 63 is The flag register of the main side CPU 63 is cleared to "0" as well as being cleared to "0". As a result, it is possible to change the state of the flag register to the state immediately after the supply of the operating power to the main CPU 63 is started before the process corresponding to the non-specific control is started. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, the management execution processing is started by reading out the subroutine program corresponding to the management execution processing set in the non-specific control program (step S6313). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push command. Then, when the management execution processing is completed, information for specifying the return address is read out by a pop instruction, and the program for management processing indicated by the return address is returned to.

After the check process is completed in the management execution process, the BC register, DE register, HL register, IX register and IY register are cleared to "0". As a result, these registers are cleared to "0" prior to returning from the processing corresponding to the non-specific control to the processing corresponding to the specific control, and the states of these registers are changed to "0" before returning to the processing corresponding to the specific control. It is possible to enter the state immediately after the supply of operating power to the main CPU 63 is started.

When returning to the management processing program after executing the management execution processing, processing for clearing the flag register of the main side CPU 63 to "0" is executed. Specifically, first, as "PUSH HL", information in the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6314). After the push instruction is executed, the information of the stack pointer of the main CPU 63 is the information corresponding to the storage area in the order of writing next to the storage area where the information of the HL register is saved in the stack area 222 for specific control. Become.

After that, as "PUSH AF", the information of the A register and the information of the flag register of the main CPU 63 are stored corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The area and the storage area are saved in the next storage area in the order of writing (step S6315). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are separately stored for two storage areas with consecutive addresses. be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

After that, as "POP HL", the HL register of the main CPU 63 is overwritten with the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6315 by the pop instruction (step S6316). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is transferred to the L register of the main CPU 63. overwritten in the register. The H register and L register of the main side CPU 63 each have an information amount of 8 bits (1 byte). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "LD A, 0", the A register of the main side CPU 63 is cleared to "0" by the load instruction (step S6317). Then, as "LD L, A", the information in the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by the load instruction (step S6318). The information in the A register of the main CPU 63 is overwritten in the H register of the main CPU 63 (step S6319). Since the A register has been cleared to "0" in step S6317, the L and H registers are cleared to "0" by overwriting the information in the A register to the L and H registers. becomes.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in the storage area and in the next storage area in the writing order for the storage area (step S6320). Since the H register and L register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the H register and the information of the L register are separately stored for two storage areas with consecutive addresses. be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

After that, as "POP AF", the A register and the flag register of the main CPU 63 are overwritten with the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6320 by the pop instruction ( step S6321). In this case, the information in the H register saved in the stack area 222 for specific control is overwritten in the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control becomes the flag of the main CPU 63. overwritten in the register. Since the information of the H register and the information of the L register saved in the stack area 222 for specific control are all "0" information, the A register of the main CPU 63 is The flag register of the main side CPU 63 is cleared to "0" as well as being cleared to "0". By clearing the flag register to "0" after the execution of the management execution process (step S6313), which is the process corresponding to the non-specific control, the state of the flag register is set to "0" after the process corresponding to the non-specific control is completed. It is possible to enter the state immediately after the supply of operating power to the is started. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6314 is returned to the HL register of the main CPU 63 by a pop instruction (step S6322). Since the HL register is cleared to "0" immediately before the management execution process (step S6313) ends, the information cleared to "0" is saved in the stack area 222 for specific control in step S6314. At the same time, in step S6322, the information cleared to "0" is returned to the HL register of the main side CPU 63, so that the HL register of the main side CPU 63 is cleared to "0" as a result. Further, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, in order to switch from the state in which the generation of timer interrupt processing (FIG. 69) is prohibited to the state in which it is permitted, interrupt permission is set (step S6323). This enables a new execution of timer interrupt processing.

According to the above configuration, it is possible to clear the flag register of the main CPU 63 to "0" without executing the process of clearing the predetermined storage area in the stack area 222 for specific control to "0" by the load instruction. becomes. As a result, the flag register of the main CPU 63 can be cleared to "0" even in a configuration in which it is regulated to clear "0" to a predetermined storage area in the stack area 222 for specific control by a load instruction. becomes possible.

Instead of clearing the flag register to "0", the flag register may be initialized. That is, when the supply of operating power to the MPU 62 is started, the flag register of the main CPU 63 is once cleared to "0", and then the information is set so as to be in the initial state. In step S6312, the flag register may be set so as to be in this initial state. In this case, in steps S6314 to S6322, the flag register is set so as to be in the above-described initial state, so that when returning to the process corresponding to the specific control, the state of the flag register is changed to the non-specific control. It is possible to return to the state immediately before the processing corresponding to is started.

Further, in steps S6302 to S6307 and step S6312, instead of clearing the flag register of the main CPU 63 to "0", the flag register may be set to "1". In this case, by setting "1" to all flag registers in steps S6314 to S6322 as well, when returning to the process corresponding to the specific control, the state of the flag register is changed to the process corresponding to the non-specific control. It is possible to return to the state immediately before being done.

Alternatively, the processing of steps S6302 and S6303 may not be executed. In this case, it is possible to simplify the processing configuration.

Alternatively, the processing of steps S6315 and S6316 may not be executed. In this case, it is possible to simplify the processing configuration.

Further, instead of the configuration for executing the processing of steps S6302 to S6306, as "LD HL, 0", after the HL register is cleared to "0" by the load instruction, the HL register cleared to "0" is pushed. After saving to the stack area 222 for specific control by the pop instruction, the saved information may be returned to the AF register to clear the flag register of the main CPU 63 to "0".

Further, instead of the configuration in which the process of clearing the flag register to "0" is executed in the process corresponding to the specific control, it may be configured to be executed in the process corresponding to the non-specific control.

<28th Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration of management processing. The configuration different from that of the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 98 is a flow chart showing management processing in this embodiment executed by the main CPU 63 . The processing of steps S6401 to S6416 in the management processing is executed by the main CPU 63 using the specific control program and specific control data.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S6401). This prevents the timer interrupt processing (FIG. 69), which corresponds to the specific control, from being interrupted and started in the middle of the management execution processing (described later), which corresponds to the non-specific control. becomes possible.

After that, as "PUSH WA", the information of the WA register (that is, the W register and the A register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in the storage area and in the next storage area in the write order for the storage area (step S6402). Since the W register and A register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the W register and A register are individually saved in two storage areas with consecutive addresses. be. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

Thereafter, as "LD A, PSW", the A register of the main CPU 63 is overwritten with the information in the flag register of the main CPU 63 by the load instruction (step S6403). In this case, both the flag register and the A register have an information amount of 8 bits (1 byte). Then, as "LD (_FGBUF), A", the information in the A register of the main CPU 63 is saved in the FG buffer set in the specific control work area 221 by the load instruction (step S6404). Since the A register is overwritten with the information of the flag register in step S6403, the information of the flag register is saved in the work area 221 for specific control by executing step S6404.

Thereafter, as "POP WA", the information in the WA register saved in the stack area 222 for specific control in step S6402 is returned to the WA register of the main CPU 63 by a pop instruction (step S6405). As a result, even if the A register is used to save the information in the flag register to the specific control work area 221, the state of the A register can be restored to the state before the save. Become. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, the management execution processing is started by reading out the subroutine program corresponding to the management execution processing set in the non-specific control program (step S6406). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push command. Then, when the management execution process is completed, information for specifying the return address is read by the pop command, and the program for the management process indicated by the return address is returned to.

The contents of the management execution process are the same as those of the management execution process (FIG. 71) in the fifteenth embodiment. Therefore, each information of the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63 is saved in the non-specific control work area 223 before the check processing is started in the management execution processing. WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63 are stored in the work area 223 for non-specific control after the check processing is completed in the management execution processing. is returned to As a result, the states of the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63 can be made the same before and after the check processing.

However, it is not limited to this, and the processing contents of the management execution processing may be the same as the management execution processing (FIG. 78) in the seventeenth embodiment. (FIG. 79), or the same configuration as the management execution process (FIG. 80) in the nineteenth embodiment.

When returning to the management processing program after executing the management execution processing, a processing for returning the information in the flag register of the main CPU 63 to the state before the management execution processing is executed is executed. Specifically, first, as "PUSH HL", the information in the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6407). After the push instruction is executed, the information of the stack pointer of the main CPU 63 is the information corresponding to the storage area in the order of writing next to the storage area where the information of the HL register is saved in the stack area 222 for specific control. Become.

Thereafter, as "PUSH WA", the information in the WA register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6408). After the push instruction is executed, the information of the stack pointer of the main CPU 63 is the information corresponding to the storage area of the next writing order with respect to the storage area where the information of the WA register is saved in the stack area 222 for specific control. Become.

After that, as "LD HL, SP", the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by the load instruction (step S6409). In this case, the amount of information in the stack pointer is 16 bits, and the amount of information in each of the H and L registers is 8 bits. , and continuous 8-bit information from the lower side of the stack pointer is overwritten in the L register.

Thereafter, as "LD A, (_FGBUF)", the A register of the main CPU 63 is overwritten with the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6406 by the load instruction (step S6410). Then, as "LD (HL), A", a load instruction causes the main side The information in the A register of the CPU 63 is stored (step S6411). As a result, the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is saved in the stack area 222 for specific control.

After that, as "LD SP, SP-1", the information of the stack pointer of the main side CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by the load instruction. (Step S6412). When the stack area 222 for specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 222 for specific control. The storage area of the storage destination is changed toward the first address side in the stack area 222 of . Therefore, in step S6412, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area with the smaller address by one in the stack area 222 for specific control. By executing the processing of step S6412, the storage area next in order to the storage area in which the information of the A register was saved in step S6411 is set as the storage target of information by the next push instruction, and step In S6411, the storage area from which the information in the A register was saved is set as the information read target by the next pop instruction.

After that, as "POP PSW", information is read from the storage area in the order of writing immediately before the storage area corresponding to the information of the stack pointer of the main side CPU 63 in the stack area 222 for specific control by the pop instruction, The flag register of the main CPU 63 is overwritten with the read information (step S6413). The information of the stack pointer of the main CPU 63 immediately before the pop instruction in step S6413 is executed is the information corresponding to the storage area in the next writing order with respect to the storage area where the information of the A register was saved in step S6411. It's becoming Therefore, in the stack area 222 for specific control, the storage area in the order of writing immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 is the memory where the information of the A register was saved in step S6411. area. By overwriting the flag register of the main CPU 63 with the information read from this storage area, the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 becomes the flag of the main CPU 63. It will be returned to the register. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area one ahead in the writing order in the stack area 222 for specific control.

Thereafter, as "POP WA", the information in the WA register saved in the stack area 222 for specific control in step S6408 is returned to the WA register of the main CPU 63 by the pop instruction (step S6414). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control. Also, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6407 is returned to the HL register of the main CPU 63 by the pop instruction (step S6415). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, in order to switch from the state in which the generation of timer interrupt processing (FIG. 69) is prohibited to the state in which it is permitted, interrupt permission is set (step S6416). This enables a new execution of timer interrupt processing.

According to the above configuration, when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is being executed, the information of the flag register of the main CPU 63 is transferred to the stack area 222 for the specific control instead of the stack area 222 It is possible to save to the work area 221 for specific control. When the process corresponding to the specific control is restored from the state in which the process corresponding to the non-specific control is being executed, the information of the flag register saved in the work area 221 for specific control becomes the flag of the main CPU 63. Returned to register. As a result, information can be returned to the flag register of the main CPU 63 from the storage area of the work area 221 for specific control specified on the program without referring to the information of the stack pointer of the main CPU 63. Even if the information in the stack pointer of the side CPU 63 has been rewritten due to noise or the like, the information can be restored to the flag register of the main side CPU 63 .

Further, the processing for saving the information of the flag register to the main RAM 65 may be configured to be executed by the processing corresponding to the non-specific control instead of the processing corresponding to the specific control. Further, instead of the configuration in which the processing for restoring the flag register information saved in the main RAM 65 to the flag register of the main CPU 63 is executed in the processing corresponding to the specific control, the processing corresponding to the non-specific control is performed. It may be configured to be executed.

<29th Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration of management processing. The configuration that is different from the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 99 is a flow chart showing management processing in this embodiment executed by the main CPU 63 . The processing of steps S6501 to S6519 in the management processing is executed by the main CPU 63 using the specific control program and specific control data.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 69), interrupt prohibition is set (step S6501). This prevents timer interrupt processing (FIG. 69), which is processing corresponding to specific control, from being interrupted and started in the middle of management execution processing, which is processing corresponding to non-specific control, which will be described later. becomes possible.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in the storage area and in the next storage area in the writing order for the storage area (step S6502). Since the H register and L register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the H register and L register is individually saved in two storage areas with consecutive addresses. be. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

After that, as "PUSH AF", the information of the A register and the information of the flag register of the main CPU 63 are stored corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The area and the storage area are saved in the next storage area in the order of writing (step S6503). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are separately stored for two storage areas with consecutive addresses. be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

After that, as "POP HL", the HL register of the main CPU 63 is overwritten with the information in the A register and the information in the flag register saved in the stack area 222 for specific control in step S6503 by a pop instruction (step S6504). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is transferred to the L register of the main CPU 63. overwritten in the register. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "LD A, L", the A register of the main CPU 63 is overwritten with the information in the L register of the main CPU 63 by the load instruction (step S6505). Since the L register has been overwritten with the flag register information of the main CPU 63 in step S6504, by overwriting the A register with the L register information, the A register is overwritten with the flag register information. Become. Then, as "LD (_FGBUF), A", the information in the A register of the main CPU 63 is saved in the FG buffer set in the specific control work area 221 by the load instruction (step S6506). Since the A register is overwritten with the information of the flag register in step S6505, the information of the flag register is saved in the work area 221 for specific control by executing step S6506.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in the storage area and the next storage area in the writing order for the storage area (step S6507). In this case, since the HL register has been overwritten with the information of the A register and the information of the flag register in step S6504, the information of the A register and the information of the flag register are saved in the stack area 222 for specific control in step S6507. I let you. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

After that, as "POP AF", the A register and the flag register of the main CPU 63 are overwritten with the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6507 by the pop instruction ( step S6508). In this case, the information in the H register saved in the stack area 222 for specific control overwrites the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control becomes the flag of the main CPU 63. overwritten in the register. The information in the H register saved in the stack area 222 for specific control is the information in the A register at the time of step S6503, and the information in the L register saved in the stack area 222 for specific control is the flag at the time of step S6503. This is register information. Therefore, by executing the process of step S6508, the states of the A register and the flag register of the main CPU 63 are restored to the states at the time of step S6503. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6502 is returned to the HL register of the main CPU 63 by a pop instruction (step S6509). As a result, the state of the HL register of the main CPU 63 is restored to the state at the time of step S6502. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, the management execution processing is started by reading out the subroutine program corresponding to the management execution processing set in the non-specific control program (step S6510). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push instruction. Then, when the management execution processing is completed, information for specifying the return address is read out by a pop instruction, and the program for management processing indicated by the return address is returned to.

In the management execution process, each information of the BC register, DE register, HL register, IX register and IY register of the main side CPU 63 is saved in the non-specific control work area 223 before the check process is started. Each piece of information saved in the non-specific control work area 223 is returned to the BC register, DE register, HL register, IX register and IY register of the main side CPU 63 after the check process is completed in the management execution process. As a result, the states of the BC register, DE register, HL register, IX register, and IY register of the main CPU 63 can be made the same before and after the check processing.

However, it is not limited to this, and the processing contents of the management execution processing may be the same as the management execution processing (FIG. 78) in the seventeenth embodiment. (FIG. 79), or the same configuration as the management execution process (FIG. 80) in the nineteenth embodiment.

When returning to the program for management processing after execution of the management execution processing, processing for returning the information in the flag register of the main CPU 63 to the state before the management execution processing is executed is executed. Specifically, first, as "PUSH HL", information in the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6511). After the push instruction is executed, the information of the stack pointer of the main CPU 63 is the information corresponding to the storage area in the order of writing next to the storage area where the information of the HL register is saved in the stack area 222 for specific control. Become.

After that, as "PUSH AF", each of the information of the A register and the information of the flag register of the main CPU 63 is stored corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The area and the storage area are saved in the next storage area in the order of writing (step S6512). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are separately stored for two storage areas with consecutive addresses. be evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places later in the write order in the stack area 222 for specific control.

Thereafter, as "POP HL", the HL register of the main CPU 63 is overwritten with the information in the A register and the information in the flag register saved in the stack area 222 for specific control in step S6512 by a pop instruction (step S6513). . In this case, the information in the A register saved in the stack area 222 for specific control is overwritten in the H register of the main CPU 63, and the information in the flag register saved in the stack area 222 for specific control is transferred to the L register of the main CPU 63. overwritten in the register. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, as "LD A, (_FGBUF)", the information in the flag register at the time of step S6503, which was saved in the FG buffer in the work area 221 for specific control in step S6506 by the load instruction, is transferred to the A register of the main CPU 63. (step S6514). Then, as "LD L, A", the L register of the main CPU 63 is overwritten with the information in the A register of the main CPU 63 by the load instruction (step S6515). Since the information in the flag register of the main CPU 63 at the time of step S6503 has been restored to the A register in step S6514, by overwriting the information in the A register on the L register, The information in the flag register is overwritten.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 is made to correspond to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by a push instruction. The data is saved in the storage area and in the next storage area in the writing order for the storage area (step S6516). In this case, since the information in the A register at the time of step S6512 was overwritten in the H register in step S6513, the information in the A register was saved in the stack area 222 for specific control in step S6516. Become. Since the L register is overwritten with the information of the flag register at the time of step S6503 in step S6515, the information of the flag register is saved in the stack area 222 for specific control in step S6516.

After that, as "POP AF", the A register and the flag register of the main CPU 63 are overwritten with the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6516 by the pop instruction ( step S6517). In this case, the information in the H register saved in the stack area 222 for specific control overwrites the A register of the main CPU 63, and the information in the L register saved in the stack area 222 for specific control becomes the flag of the main CPU 63. overwritten in the register. The information in the H register saved in the stack area 222 for specific control is the information in the A register at the time of step S6512, and the information in the L register saved in the stack area 222 for specific control is the flag at the time of step S6503. This is register information. Therefore, by executing the process of step S6517, the state of the A register of the main CPU 63 returns to the state of step S6512, and the state of the flag register returns to the state at the time of step S6503.

Incidentally, the A register of the main side CPU 63 is not used in the management execution process. Therefore, the state of the A register at step S6512 is the state of the A register at step S6508, and the state of the A register at step S6508 is the state of the A register at step S6503. Therefore, by executing the process of step S6517, the states of the A register and the flag register of the main CPU 63 are restored to the states at the time of step S6503. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

Thereafter, as "POP HL", the information in the HL register saved in the stack area 222 for specific control in step S6511 is returned to the HL register of the main CPU 63 by a pop instruction (step S6518). As a result, the state of the HL register of the main CPU 63 is restored to the state at the time of step S6511. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two places earlier in the writing order in the stack area 222 for specific control.

After that, in order to switch from the state in which the generation of timer interrupt processing (FIG. 69) is prohibited to the state in which it is permitted, interrupt permission is set (step S6519). This enables a new execution of timer interrupt processing.

According to the above configuration, the information in the flag register of the main CPU 63 can be directly overwritten from the flag register of the main CPU 63 to another register of the main CPU 63 by the load instruction. can be saved in the work area 221 for specific control.

It should be noted that the information in the flag register was overwritten by the load instruction as "LD (_FGBUF), L" after executing the processing of step S6504 instead of executing the processing of steps S6505 to S6508. By saving the information in the L register to the FG buffer, the information in the flag register may be saved in the work area 221 for specific control.

In addition, without executing the processing of steps S6514 and S6515, instead, after executing the processing of step S6513, as "L L, (_FGBUF)", the work area for specific control is loaded by a load instruction. The information of the flag register saved in 221 may be overwritten in the L register.

Further, the processing for saving the information of the flag register to the main RAM 65 may be executed by the processing corresponding to the non-specific control instead of the processing corresponding to the specific control. Further, instead of the configuration in which the processing for restoring the flag register information saved in the main RAM 65 to the flag register of the main CPU 63 is executed in the processing corresponding to the specific control, the processing corresponding to the non-specific control is performed. It may be configured to be executed.

<Thirtieth Embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration executed by the main CPU 63 . The configuration different from that of the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 100 is a flow chart showing main processing in this embodiment executed by the main CPU 63 . It should be noted that the processing of steps S6601 to S6621 in the main processing is executed using a specific control program and specific control data in the main CPU 63 .

First, power-on wait processing is executed (step S6601). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, one second) elapses after the main process is activated. The operation start and initial setting of the pattern display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S6602).

Thereafter, it is determined whether or not the power failure flag provided in the work area 221 for specific control in the main RAM 65 is set to "1" (step S6603). If the power failure flag is set to "1" (step S6603: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S6604).

Any method can be used to calculate the checksum, but for example, a method of adding all numerical values in the storage area to be used for checksum calculation can be used. This checksum calculation method is the same calculation method as the checksum calculation method in the power failure processing described later. The checksum calculated in the power failure processing described later is stored in the work area 221 for specific control. are excluded from the storage areas to be operated upon.

That is, when calculating the checksum, part of the storage areas in the work area 221 for specific control and the stack area 222 for specific control are subject to calculation. In the storage area to be operated, the checksum is calculated in the power failure processing when the supply of the operating power to the MPU 62 is stopped, and then the supply of the operating power to the MPU 62 is resumed and the process of step S6604 is executed. It is a storage area in which information is basically not rewritten when power supply such as backup power to the work area 221 for specific control and the stack area 222 for specific control is continued until it is rewritten. Therefore, the information in the work area 221 for specific control and the stack area 222 for specific control is not changed from when the supply of operating power to the MPU 62 is stopped to when the supply of operating power to the MPU 62 is restarted. In this case, the checksums for the specific control work area 221 and the specific control stack area 222 are the same as immediately before the supply of operating power to the MPU 62 is stopped. In addition, in the storage area to be calculated when calculating this checksum, an area (specifically, a setting value counter )It is included.

After that, the work area 221 for specific control and the stack area for specific control calculated in the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S6604 (step S6605). Then, it is determined whether or not the checksums match (step S6606).

Here, power failure information storage processing executed by the main CPU 63 will be described with reference to the flowchart of FIG. 101 . The power failure information storage process is executed in step S6801 in the timer interrupt process (FIG. 103) described later.

In the power failure information storage process, first, information of "10", which is the number of repetition times information for the power failure signal, is set in the repetition counter provided in the work area 221 for specific control (step S6701), and the work area for specific control is set. 221 is cleared to "0" (step S6702).

After that, the process of reading the power failure signal information received at the input port of the MPU 62 is executed (step S6703). In this case, when a power failure signal (low level power failure signal) corresponding to no power failure has been received, information "0" is stored as non-power failure information in the input port. When a power failure signal (HI level power failure signal) corresponding to power failure has been received, information "1" is stored in the input port as power failure occurrence information. In step S6703, a process of reading the power failure signal information into the register of the main CPU 63 is executed.

If the power failure signal information read in step S6703 corresponds to the occurrence of power failure (power failure) (step S6704: YES), 1 is added to the numerical information of the power failure detection counter (step S6705). If a negative determination is made in step S6704 or if the process of step S6705 is executed, 1 is subtracted from the numerical information of the repetition counter (step S6706). Then, it is determined whether or not the numerical information of the repetition counter after subtracting 1 is "0" (step S6707). If a negative determination is made in step S6707, the process returns to step S6703 to repeat the processing of steps S6703 to S6706. On the other hand, if an affirmative determination is made in step S6707, the process proceeds to step S6708.

In step S6708, it is determined whether or not the current numerical information of the power failure detection counter is greater than or equal to the trigger reference number corresponding to the occurrence of power failure. If it is less than the trigger reference number of times, this power failure information storage processing is terminated as it is. On the other hand, if it is equal to or greater than the trigger reference number of times, power failure processing of steps S6709 to S6712 is executed.

Specifically, first, the power failure flag provided in the work area 221 for specific control is set to "1" (step S6709). As a result, when the power failure processing is normally executed and information is stored and retained in the main RAM 65 normally, when the supply of operating power to the main CPU 63 is restarted, the specific control "1" is set to the power failure flag in the work area 221 of .

Thereafter, a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S6710). In this case, the storage areas in the work area 221 for specific control and the stack area 222 for specific control, which are subject to calculation when calculating the checksum, are subject to checksum calculation in step S6604 of the main process (FIG. 100). It is the same as the storage area in the work area 221 for specific control and the stack area 222 for specific control. In addition, in the storage area to be calculated when calculating this checksum, an area (specifically, a setting value counter )It is included. Then, the calculated checksum is stored in a storage area for storing the checksum in the work area 221 for specific control and excluded from checksum calculation targets.

After that, all output port information in the register of the main CPU 63 is set to "0" (step S6711), and access to the main RAM 65 is prohibited (step S6712). Then, the infinite loop continues until the power supply is completely cut off and processing cannot be executed.

By executing the power failure information storage process as the first process of the timer interrupt process, it is not necessary to execute the timer interrupt process from the middle after the power is restored. This eliminates the need to store the address of the process being executed at the time of power failure in the main RAM 65 as stack information, making it possible to reduce the processing load of the process at the time of power failure.

Returning to the description of the main processing (FIG. 100), if a negative determination is made in step S6603 or step S6606, clear processing during non-setting update is executed (step S6607). In the clear processing at the time of non-setting update, except for the area (specifically the setting value counter) where the information of the setting value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control, the specific control The work area 221 for is cleared to "0" and initialization is performed. As a result, the area indicating whether or not the winning lottery mode is the high probability mode is cleared to "0", so the winning lottery draws regardless of the winning lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. Mode is low probability mode. In addition, the game round is not executed, the open/close execution mode is not executed, and the normal diagram display section 38a is not displayed in a variable manner, and the general electric accessory 34a is in the closed state. situation. In addition, since the reservation storage area 65a and the general electricity reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display unit 37a is erased and the general figure display unit The pending information for 38a is deleted. In addition, in the clear processing at the time of non-setting update, the stack area 222 for specific control is cleared to "0" and initial setting is executed. In addition, in the clearing process at the time of non-setting update, the various registers of the main side CPU 63 are also cleared to "0", and then the initial setting is executed.

On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0" in the clear processing at the time of non-setting update. As a result, the work area 223 for non-specific control and the stack area 224 for non-specific control are set to "0" even if the power failure flag was not set to "1" because the power failure process was not executed normally. It is possible to prevent it from being cleared. Even if an abnormality occurs in the checksum of the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". It is possible to prevent it from being done.

If a negative determination is made in step S6603 or step S6606, after executing the clear processing at the time of non-setting update in step S6607, the value of the setting value counter in the work area 221 for specific control is checked to confirm the value of the pachinko machine. 10 is normal or not (step S6608). Specifically, if the set value set in the set value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is abnormal. Determine that there is. If the set value is abnormal (step S6608: NO), the processing for newly setting the set value (steps S6619 to S6621) to be described later is executed. As a result, it is possible to monitor whether or not the setting value is normal even when a negative determination is made in step S6603 or step S6606 and the clearing process (step S6607) at the time of non-setting update is executed. In addition, when the set value is abnormal, it is possible to reset the set value.

If the setting value is normal (step S6608: YES), power-on setting processing is executed (step S6609). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of a power failure flag is set to an initial value, and a command corresponding to the current game state is transmitted to the sound emission control device 81 .

Although the main CPU 63 is configured to periodically execute timer interrupt processing, the generation of timer interrupt processing is prohibited at the stage when the main processing is started. The state in which the generation of the timer interrupt process is prohibited is released at the timing before the process of step S6609 is completed and the process of step S6610 is executed, and execution of the timer interrupt process is permitted. As a result, when the supply of operating power to the main CPU 63 is started, the power-on setting process of step S6609 is completed, and the timer interrupt process is not executed until the stage before the process of step S6610 is started. Therefore, the main side CPU 63 does not start the processing for advancing the game until this situation is reached.

After that, the remaining processing of steps S6610 to S6613 is performed. In other words, although the main CPU 63 is configured to periodically execute timer interrupt processing, there is a remaining time between one timer interrupt processing and the next timer interrupt processing. This remaining time fluctuates according to the processing completion time of each timer interrupt processing, but the remaining processing of steps S6610 to S6613 is repeatedly executed using such irregular time. In this regard, it can be said that the remaining processes of steps S6610 to S6613 are irregular processes that are executed irregularly. In steps S6610 to S6613, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

As described above, in this embodiment, when the supply of operating power to the main CPU 63 is started, when the power failure flag of the work area 221 for specific control is not set to "1", or when the checksum does not match In this case, if the setting value is normal after executing the clear process at the time of non-setting update (step S6608: YES), the process proceeds to the process for progressing the game. As a result, even if the power failure flag was not set to "1" because the power failure process was not executed normally, the power supply is turned on again after the supply of operating power to the main CPU 63 is started. No need to turn it off. Even if an abnormality occurs in the checksum of the work area 221 for specific control and the stack area 222 for specific control, the power supply can be turned ON/OFF again after the supply of operating power to the main CPU 63 is started. No action required.

If both steps S6603 and S6606 result in an affirmative determination, it is determined whether or not the setting value of the pachinko machine 10 is normal by checking the value of the setting value counter in the work area 221 for specific control (step S6614). ). Specifically, if the set value set in the set value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is abnormal. Determine that there is. If the setting value is abnormal (step S6614: NO), the processing for newly setting the setting value (steps S6619 to S6621) to be described later is executed.

If the setting value is normal (step S6614: YES), it is determined whether or not the reset button 68c is pressed (step S6615), and whether or not the setting key insertion portion 68a is turned on using the setting key. It is determined whether or not (step S6616), it is determined whether or not the front door frame 14 is in an open state with respect to the inner frame 13 (step S6617), and the game machine main body 12 is in an open state with respect to the outer frame 11. It is determined whether or not there is (step S6618).

In this embodiment, a front door open sensor 95 for detecting whether or not the front door frame 14 is in an open state with respect to the inner frame 13 is electrically connected to the main side CPU 63. The detection result of 95 is input to the main side CPU 63 . In this case, when the front door frame 14 is closed with respect to the inner frame 13, the front door open sensor 95 transmits a close detection signal to the main side CPU 63, and the front door frame 14 is opened with respect to the inner frame 13. , the front door open sensor 95 transmits an open detection signal to the main CPU 63 . The main CPU 63 identifies that the front door frame 14 is in the closed state when receiving the closed detection signal from the front door open sensor 95 , and when receiving the open detection signal from the front door open sensor 95 . Identify that the front door frame 14 is in the open state.

In addition, in this embodiment, a main body open sensor 96 for detecting whether or not the gaming machine main body 12 is in an open state with respect to the outer frame 11 is electrically connected to the main side CPU 63. The detection result of 96 is input to the main side CPU 63 . In this case, when the gaming machine main body 12 is in the closed state with respect to the outer frame 11, the main body open sensor 96 transmits a closing detection signal to the main side CPU 63, and when the gaming machine main body 12 is in the open state with respect to the outer frame 11, In some cases, the body open sensor 96 transmits an open detection signal to the main side CPU 63 . The main CPU 63 determines that the gaming machine main body 12 is in the closed state when receiving the closed detection signal from the main body open sensor 96, and determines that the main CPU 63 is in the closed state when receiving the open detection signal from the main body open sensor 96. Identify that the main body 12 is in the open state.

If the reset button 68c is not pressed (step S6615: NO), the power-on setting process is executed in step S6609, and then the remaining processes of steps S6610 to S6613 are repeated. That is, when the reset button 68c is not pressed, the processing for controlling the progress of the game is performed without executing the clear processing of the work area 221 for specific control and the stack area 222 for specific control. .

If the reset button 68c is being pressed (step S6615: YES), and a negative determination is made in any of steps S6616 to S6618, after executing the clear processing at the time of non-setting update (step S6607 ), and on condition that the set value is normal (step S6608: YES), the process proceeds to control the progress of the game from step S6609 onwards. The processing contents of the clear processing at the time of non-setting update are as already explained.

If the reset button 68c is pressed (step S6615: YES) and all of steps S6616 to S6618 are affirmative, processing for updating the set values is executed. Also, if it is determined in step S6608 or step S6614 that the setting value is abnormal, processing for updating the setting value is executed.

Specifically, first, copy processing of the setting value is executed (step S6619). In the copy process, the information of the setting value counter used for specifying the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. . As a result, even if the information of the setting value counter is cleared to "0" in the setting update clearing process (step S6620) executed later, the main data before the setting value update clearing process is executed. It is possible to grasp the setting value of the pachinko machine 10 (that is, the setting value of the pachinko machine 10 before the supply of operating power to the pachinko machine 10 is stopped).

After that, clear processing at the time of setting update is executed (step S6620). In the clearing process at the time of setting update, the work area 221 for specific control is set to "0 ” and execute the initial setting. As a result, the game cycle is not executed, the open/close execution mode is not executed, and the normal diagram display section 38a is not displayed in a variable manner, and the normal electric accessory 34a is in the closed state. A situation arises. In addition, since the reservation storage area 65a and the general electricity reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display unit 37a is erased and the general figure display unit The pending information for 38a is deleted. In addition, in the clearing process at the time of setting update, the stack area 222 for specific control is cleared to "0" and initial setting is executed. In addition, in the clearing process at the time of setting update, the set value counter used to specify the set value of the pachinko machine 10 is cleared to "0". In addition, in the clearing process at the time of updating the settings, the various registers of the main CPU 63 are also cleared to "0", and then the initial settings are executed.

On the other hand, in the clearing process at the time of setting update, the area indicating whether the winning lottery mode is the high probability mode is not cleared to "0". can be maintained in the mode before the supply of operating power to the pachinko machine 10 is stopped. In addition, since the copy area is not cleared to "0" in the clear processing at the time of setting update, it is possible to specify the set value that was set before the execution of the clear processing at the time of setting update. In addition, it is not limited to the above configuration, and in the clearing process at the time of setting update, the setting value counter used for specifying the setting value of the pachinko machine 10 may not be cleared to "0". In the clear processing, the area indicating whether the lottery mode is the high-probability mode may be cleared to "0".

In the clear processing at the time of setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". Thereby, even if the setting value update process capable of changing the setting value of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

Then, in step S6621, set value update processing is executed. The contents of the set value update process are the same as those of the set value update process (FIG. 85) in the twenty-second embodiment. After executing the set value update process, the process moves to the process for controlling the progress of the game from step S6609 onwards.

According to the above configuration, when the set value is abnormal, the set value update process is started without requiring a special operation by the manager of the game hall. Then, when the set value update process is completed, the process shifts to the process for controlling the progress of the game. As a result, it is possible to play a game in a situation where normal setting values are set. On the other hand, in order to complete the setting value update process, it is necessary to turn off the setting key for the setting key inserting portion 68a by turning off the setting key. It is possible to prevent the occurrence of the phenomenon that the

Next, a configuration for forcibly stopping the progress of the game when the main CPU 63 cannot perform various processes normally will be described. FIG. 102(a) is a block diagram for explaining the configuration of the MPU 62. As shown in FIG.

As shown in FIG. 102( a ), the MPU 62 is provided with a main CPU 63 , a main ROM 64 and a main RAM 65 , as well as a reset signal output section 251 and a program monitor section 252 . The reset signal output unit 251 has a function of outputting a reset signal to the main CPU 63 . Specifically, the reset signal output unit 251 outputs the reset signal as a HI level signal when the operation power is supplied from the power supply/launch control device 78 and the output prohibition condition is not satisfied. Output to the CPU 63, and if the operating power is not supplied from the power supply/launch control device 78 or if the operating power is supplied but the output disapproval condition is satisfied, the main side CPU 63 do not output to The main CPU 63 executes various processes when operating power is supplied from the power supply/launch control device 78 and when a reset signal is received from the reset signal output unit 251. Even if the operating power is supplied, if the reset signal is not received from the reset signal output unit 251, various processes are not executed. In addition, when the main CPU 63 receives the reset signal from the reset signal output unit 251 while the operating power is supplied from the power supply/launch control device 78, the state switches to the state where the reset signal is received. , the main process (FIG. 100) is started.

The program monitoring unit 252 has a function of monitoring whether or not the main CPU 63 is in a state where various processes can be normally performed. Specifically, the program monitoring unit 252 monitors whether the value of the program counter provided in the main CPU 63 is an abnormal value. The program counter is for storing addresses where instructions to be executed in the main CPU 63 are stored. Possible values of the program counter are determined, and the program monitoring unit 252 monitors whether or not the value of the program counter is a value other than the possible values. Further, the program monitoring unit 252 monitors whether or not the address specified as the write destination area is an abnormal address when information is written to the specific control work area 221 by a load instruction. The program monitoring unit 252 may be configured to monitor whether or not an address designated as a read target area is an abnormal address when information is read from the specific control work area 221 by a load command.

When the program monitoring unit 252 determines that the value of the program counter is abnormal, or determines that the address specified when writing information by the load instruction is an abnormal address, the reset signal output unit 251 output a monitoring error signal. When the reset signal output unit 251 receives the monitoring abnormality signal from the program monitoring unit 252, even if the operating power is supplied from the power supply/launch control device 78, the output of the reset signal is temporarily stopped, and the stop continues. After stopping the output of the reset signal for a period of time, the output of the reset signal is restarted. The stop continuation period is a period sufficient for the main CPU 63 to identify that the output of the reset signal is stopped. As a result, when the value of the program counter becomes an abnormal value, or when the address specified when writing information by a load instruction becomes an abnormal address, the main CPU 63 is reset by turning the reset signal OFF/ON. , the main process is executed.

FIG. 102(b) is a time chart showing how the reset signal output section 251 outputs the reset signal. FIG. 102(b1) shows the period during which operating power is supplied from the power supply/emission control device 78, FIG. 102(b2) shows the period during which the reset signal is output from the reset signal output section 251, and FIG. b3) indicates the timing at which the program monitoring unit 252 outputs the monitoring abnormality signal.

First, a case where the program monitoring unit 252 does not output a monitoring abnormality signal will be described. , t2, the output of the reset signal from the reset signal output unit 251 is started as shown in FIG. 102(b). After that, at the timing of t3, as shown in FIG. 102(b1), the supply of operating power from the power supply/launch control device 78 to the MPU 62 is stopped, and at the timing of t4, as shown in FIG. 102(b2), it is reset. Output of the reset signal from the signal output unit 251 is stopped.

Next, the case where the program monitoring unit 252 outputs the monitoring abnormality signal will be described. At the timing of t5, as shown in FIG. As a result, the output of the reset signal from the reset signal output unit 251 is started at the timing of t6 as shown in FIG. 102(b). After that, at the timing of t7, the value of the program counter becomes an abnormal value or the address specified when writing information by the load instruction becomes an abnormal address. A monitoring abnormality signal is output from the unit 252 to the reset signal output unit 251 . As a result, as shown in FIG. 102(b2), the output of the reset signal from the reset signal output unit 251 is temporarily stopped at timing t7, and then restarted at timing t8.

In this case, the main CPU 63 stops executing various processes at the timing t7, and starts the main process (FIG. 100) at the timing t8 when the rise of the reset signal is confirmed. However, since the power failure process is not executed when the execution of various processes of the main CPU 63 is stopped, the main process (FIG. 100) is performed in a state where the power failure flag in the work area 221 for specific control is not set to "1". is started, main processing (FIG. 100) is started without saving checksums for the work area 221 for specific control and the stack area 222 for specific control. Therefore, in the main processing (FIG. 100), a negative determination is made in step S6603 or step S6606, and clear processing (step S6607) at the time of non-setting update is executed. As a result, when the value of the program counter becomes an abnormal value or the address specified when writing information by a load instruction becomes an abnormal address, and a monitoring abnormality signal is output from the program monitoring unit 252, It is possible to execute the clear processing at the time of non-setting update, in which a predetermined storage area of the work area 221 for specific control and the stack area 222 for specific control is cleared to "0". .

However, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0" in the clear processing at the time of non-setting update. As a result, even if a monitoring abnormality signal is output from the program monitoring unit 252 due to an abnormal program counter value or an abnormal address specified when information is written by a load instruction, It is possible to prevent the work area 223 for specific control and the stack area 224 for non-specific control from being cleared to "0".

Returning to the description of FIG. 102(b), after that, at the timing of t9, as shown in FIG. As shown in FIG. 102(b2), output of the reset signal from the reset signal output unit 251 is stopped.

Next, timer interrupt processing in this embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG. The timer interrupt process is executed periodically (for example, every 4 milliseconds) while the processes of steps S6610 to S6613 are being executed in the main process (FIG. 100). The program corresponding to timer interrupt processing is set as a program for specific control.

In steps S6801 to S6819, the same processes as steps S5201 to S5219 of the timer interrupt process (FIG. 86) in the twenty-second embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. Thereafter, setting monitoring processing is executed (step S6820). FIG. 104 is a flowchart showing setting monitoring processing.

By checking the value of the set value counter in the specific control work area 221, it is determined whether or not the set value of the pachinko machine 10 is normal (step S6901). Specifically, if the set value set in the set value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is abnormal. Determine that there is.

If the setting value is abnormal (step S6901: NO), the setting value is copied (step S6902). In the copy process, the information of the setting value counter used for specifying the setting value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. . As a result, it is possible to grasp the setting values of the pachinko machine 10 before execution of the setting value update processing which is executed thereafter.

Thereafter, an abnormality command indicating that an abnormality has occurred in the set value is transmitted to the sound emission control device 81 (step S6903). Upon receiving the abnormality command, the sound emission control device 81 causes the display light emitting unit 53 to emit light in a manner corresponding to the abnormality in the set value, and also emits a voice from the speaker unit 54 saying "Abnormality in the set value has been detected." output. In addition, the character image "abnormal setting value detected" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the notification, the manager of the game hall can grasp that the setting value abnormality has occurred.

Thereafter, set value update processing is executed (step S6904). That is, every time the timer interrupt process (FIG. 103) is executed, it is monitored whether or not an abnormality has occurred in the set value, and when the occurrence of an abnormality in the set value is specified, the set value of the pachinko machine 10 is reset. Execute the setting value update process to perform The contents of the set value update process are the same as those of the set value update process (FIG. 85) in the twenty-second embodiment. Therefore, each time the update button 68b is pressed once, the set value is updated by one step, and the set value being selected is determined by detecting the game ball with the out-hole detection sensor 48a. The set value that is being updated and the set value that has been finalized are displayed on the third notification display device 69c. After that, when the setting key insertion portion 68a is switched from the ON state to the OFF state, it is determined that the termination condition for the setting value updating process is met. After executing the set value update process, the process returns to the timer interrupt process (FIG. 103).

Here, in the setting value update process, it is not determined that the termination condition is met only by the setting key insertion portion 68a being in the OFF state, and the setting key insertion portion 68a is switched from the ON state to the OFF state. It is determined that the end condition is satisfied when When the setting value updating process is executed in the setting monitoring process, the setting key insertion part 68a is in the OFF state at the start of the setting value updating process. It is necessary to insert the setting key into the setting key inserting portion 68a, perform the ON operation once, and then perform the OFF operation. As a result, it is possible to prevent the set value update process from ending even though the manager of the game hall has not performed a normal operation.

When the setting key insertion unit 68a is switched from the ON state to the OFF state and the conditions for terminating the setting value update process are satisfied, step S5111 in the setting value update process (FIG. 85) is executed to It compares whether or not the set value stored in the copy area in the work area 221 for specific control and the set value currently set in the set value counter in the work area 221 for specific control are the same. In other words, it is determined whether or not the setting value set before execution of the setting value update process (step S6904) is the same as the setting value set in the current setting value update process. If both setting values are the same (step S5112: NO), the already explained setting maintenance notification is performed by executing the notification processing for non-change (step S5113). On the other hand, if both setting values are different (step S5112: YES), the already explained setting change notification is performed by executing the change notification processing (step S5114).

In a configuration in which set value update processing is executed when a set value abnormality occurs, the set value that was set before the set value update processing was executed and the set value that was set by the set value update processing. When the set value is the same as the set value, setting maintenance notification is performed. As a result, even if the setting value update process is executed due to a setting value abnormality, the setting maintenance notification will be performed by resetting the setting value that was set in the previous situation, and the setting value will be updated due to the setting value abnormality. It is possible to clearly show to the player that the set value has not changed even if the process is executed. By the way, since it is common to record the setting values of each pachinko machine 10 installed in the game hall, it is possible to execute the setting value update processing due to the setting value abnormality so that the recorded setting values are obtained. It is possible.

Returning to the description of the timer interrupt process (FIG. 103), after executing the setting monitoring process in step S6820, the management process is executed in step S6821. When executing the management process, a subroutine program corresponding to the management process set in the specific control program is executed. is written in the stack area 222 for specific control by a push instruction. Then, when the management process is completed, information for specifying the return address is read out by a pop instruction, and the program for the timer interrupt process indicated by the return address is returned to.

FIG. 105 is a flow chart showing management processing in this embodiment executed by the main CPU 63 . Note that the processing of steps S7001 to S7005 in the management processing is executed by the main CPU 63 using a program for specific control and data for specific control.

First, in order to prohibit the occurrence of timer interrupt processing (FIG. 103), interrupt prohibition is set (step S7001). This prevents timer interrupt processing (FIG. 103), which is processing corresponding to specific control, from being interrupted and started in the middle of management execution processing, which is processing corresponding to non-specific control, which will be described later. becomes possible.

Thereafter, as "LD (_PSWBUF), PSW", the information in the flag register of the main CPU 63 is saved in the PSW buffer set in the work area 221 for specific control by the load instruction (step S7002). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes according to the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving such flag register information before the program of the subroutine corresponding to the management execution process is started, the flag register in the state before the subroutine is called or changed after the subroutine is started. Information can be saved in the work area 221 for specific control.

After that, the management execution processing is started by reading out the subroutine program corresponding to the management execution processing set in the non-specific control program (step S7003). In this case, information for specifying the return address of the management process after execution of the management execution process is written in the specific control stack area 222 by the push instruction. Then, when the management execution process is completed, information for specifying the return address is read by the pop command, and the program for the management process indicated by the return address is returned to.

When returning to the management processing program after executing the management execution processing, it is saved in the PSW buffer in the work area 221 for specific control in step S7002 by the load instruction as "LD PSW, (_PSWBUF)". The information in the flag register is returned to the flag register of the main CPU 63 (step S7004). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S7002 was executed last time. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, in order to switch from the state in which the occurrence of timer interrupt processing (FIG. 103) is prohibited to the state in which it is permitted, interrupt permission is set (step S7005). This enables a new execution of timer interrupt processing.

FIG. 106 is a flow chart showing management execution processing in this embodiment executed by the main CPU 63 . The processing of steps S7101 to S7116 in the management execution processing is executed by the main CPU 63 using a non-specific control program and non-specific control data.

In steps S7101 to S7108 and steps S7110 to S7116, the same processes as steps S4501 to S4515 of the management execution process (FIG. 78) in the seventeenth embodiment are executed. Further, in step S7109, another monitoring process is executed. When executing the separate monitoring process, a subroutine program corresponding to the separate monitoring process set in the non-specific control program is executed. Information for specifying the return address of the management execution process in is written in the stack area 224 for non-specific control by a push instruction. Then, when the separate monitoring process is completed, information for specifying the return address is read by the pop command, and the program of the management execution process indicated by the return address is returned to.

FIG. 107 is a flow chart showing another monitoring process. The processing of steps S7201 to S7206 in the separate monitoring process is executed by the main CPU 63 using a non-specific control program and non-specific control data.

In the separate monitoring process, it is determined whether or not the value of the pointer indicating the processing position of the process being executed in the non-specific control program exceeds the normal numerical range (step S7201). In addition, the information stored in the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 provided in the non-specific control work area 223 is obviously abnormal information. (step S7202). For example, in the normal counter area 231, when the value of the normal winning counter 231a is 1000 or more while the value of the normal out counter 231e is "0", it is determined as abnormal. Also, it is determined whether or not the information stored in the calculation result storage area 234 provided in the non-specific control work area 223 is obviously abnormal information (step S7203). For example, if any of the 62nd to 64th parameters is not "0" even though the 61st parameter is "0", it is determined to be abnormal.

If an affirmative determination is made in any of steps S7201 to S7203, it is determined that an information abnormality has occurred in the non-specific control work area 223, and the non-specific control work area 223 is partially cleared. (Step S7204). In the partial clear processing, the storage areas other than the management start flag in the work area 223 for non-specific control are cleared to "0". In this case, the normal counter area 231, the open/close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

In addition, by preventing the management start flag from being cleared to "0", it is possible to maintain the state in which the management start flag has already been set to "1", and the pachinko machine 10 has already continued in the game hall. It is possible to prevent the pachinko machine 10 from being regulated at the shipping stage with respect to the collection of history information even though it is in use. However, the present invention is not limited to this, and the entire work area 223 for non-specific control including the management start flag may be cleared to "0" in step S7204.

Also, in step S7204, the stack area 224 for non-specific control is not cleared to "0". In the stack area 224 for non-specific control, information of various registers used in processing corresponding to specific control is saved in steps S7102 to S7107 in the management execution processing (FIG. 106). In this case, by not clearing the stack area 224 for non-specific control to "0", the information of various registers used in the processing corresponding to this specific control and the stack area for non-specific control It is possible to prevent the information saved in H.224 from being erased. In addition, the stack area 224 for non-specific control stores the information of the return address of the management execution process (FIG. 106) after the end of the separate monitoring process. By not clearing, it is possible to prevent the information of this return address from being erased.

After that, initialization processing is executed (step S7205). In the initialization process, initialization is performed for the storage area that was cleared to "0" in step S7204 in the work area 223 for non-specific control.

After that, clear notification processing is executed (step S7206). In the clear notification process, a command indicating that the non-specific control work area 223 has been cleared to "0" is transmitted to the sound emission control device 81 . Upon receiving the command, the audio light emission control device 81 causes the display light emission unit 53 to emit light in a mode corresponding to the forced clearing of the work area 223 for non-specific control, and also outputs “History information is forcibly cleared” from the speaker unit 54. It outputs a sound saying "I'm sorry. In addition, the character image "history information has been forcibly cleared" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, the notification is not limited to this, and the notification may be terminated when the notification termination operation is performed by the manager of the game hall. The notification end operation may be, for example, pressing the update button 68b or pressing the reset button 68c. By confirming the notification, the manager of the game hall can grasp that the work area 223 for non-specific control has been forcibly cleared.

If negative determinations are made in all of steps S7201 to S7203, or if the process of step S7206 is executed, the separate monitoring process is ended and the process returns to the monitoring execution process (FIG. 106).

According to this embodiment detailed above, the following excellent effects are obtained.

When the program monitoring unit 252 detects that the address specified when writing information by the load instruction is an abnormal address, the reset signal output unit 251 turns the reset signal from OFF to ON, thereby turning the main CPU 63 Then, the main processing (FIG. 100) is executed in the same manner as when the supply of operating power is newly started. When the reset signal is turned from OFF to ON, the power failure flag in the work area 221 for specific control is not set to "1" and the checksum at the time of power failure is stored in the work area 221 for specific control. Since it has not been updated, clear processing (step S6607) at the time of non-setting update is forcibly executed. In the clear processing at the time of non-setting update, the storage area other than the storage area in which the setting value of the pachinko machine 10 is stored in the work area 221 for specific control is cleared to "0" and the stack area 222 for specific control is cleared to " 0” is cleared, and initialization processing for these areas is executed. As a result, when there is a possibility that an information error has occurred in the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control and the stack area 222 for specific control By executing the "0" clearing process and the initial setting process, the information abnormality can be resolved.

When the program monitoring unit 252 identifies that the program counter value of the main CPU 63 is an abnormal value, the reset signal output unit 251 turns the reset signal from OFF to ON so that the operating power of the main CPU 63 is reduced. The main process (FIG. 100) is executed in the same way as when the supply is newly started. When the reset signal is turned from OFF to ON, the power failure flag in the work area 221 for specific control is not set to "1" and the checksum at the time of power failure is stored in the work area 221 for specific control. Since it has not been updated, clear processing (step S6607) at the time of non-setting update is forcibly executed. In the clearing process at the time of non-setting update, the internal storage area of the main side CPU 63 including various registers is cleared to "0" and the initial setting process is executed. As a result, if there is a possibility that an information abnormality has occurred in the internal storage area of the main CPU 63, the internal storage area of the main CPU 63 is cleared to "0" and the initial setting process is executed. It is possible to resolve information anomalies.

On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0" in the clear processing at the time of non-setting update. As a result, the internal storage area of the main CPU 63, the work area 221 for specific control, and the stack area 222 for specific control are cleared to "0" because the program monitoring unit 252 has identified an information abnormality as described above. Even when the initial setting process and the initial setting process are executed, it is possible to prevent the information of the game history from being erased, and to prevent the information of the management result of the game history from being erased. It becomes possible to

If the power failure flag is not set to "1" in the main process (FIG. 100) when the supply of operating power to the main CPU 63 is started, or if the checksums do not match, clear at the time of non-setting update. In the configuration in which the process (step S6607) is executed, if the program monitoring unit 252 identifies the occurrence of an information abnormality, the power failure flag is not set to "1" by turning the reset signal from OFF to ON. In addition, the main processing (FIG. 100) is executed in a situation where the checksum is not stored. This makes it possible to eliminate the information abnormality identified by the program monitoring unit 252 by using the configuration for eliminating the information abnormality when the supply of operating power is started.

In the configuration in which whether or not the checksum is normal is monitored in the main process (FIG. 100) when the supply of operating power to the main CPU 63 is started, the checksum calculation target is a specific control A work area 221 for specific control and a stack area 222 for specific control are included, and a work area 223 for non-specific control and a stack area 224 for non-specific control are not included. This makes it possible to specify whether or not information abnormality has occurred only in the storage area corresponding to the specific control in the main RAM 65 .

If it is identified that the checksum is abnormal in the main processing (FIG. 100) when the supply of operating power to the main CPU 63 is started, the clear processing (step S6607) at the time of non-setting update is executed. However, in the clearing process at the time of non-setting update, the work area 221 for the specific control and the stack area 222 for the specific control are cleared to "0" and the initial setting process is executed. On the other hand, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". This prevents the processing corresponding to the specific control from continuing to be executed in that state even though the information abnormality has occurred in the work area 221 for the specific control and the stack area 222 for the specific control. At the same time, with the information abnormality in the work area 221 for specific control and the stack area 222 for specific control as a trigger, even the storage area corresponding to the non-specific control in the main side RAM 65 is cleared to "0". It is possible to prevent

In the power failure processing (steps S6709 to S6712) of the power failure information storage processing (FIG. 101), the checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control. A checksum is not calculated for the storage area corresponding to the non-specific control. This makes it possible to prevent the processing period required to complete the power failure processing from becoming excessively long.

If an abnormality is identified in the information stored in the work area 223 for non-specific control in the separate monitoring process (FIG. 107) executed in the process corresponding to non-specific control, non-specific control is supported. In the separate monitoring process (FIG. 107), which is the process to be performed, the work area 223 for non-specific control is cleared to "0" and the initial setting process is executed. As a result, although some abnormality has occurred in the work area 223 for non-specific control, processing corresponding to the non-specific control is executed while the information in the work area 223 for non-specific control is held as it is. It is possible to prevent it from being lost. In addition, since the process of clearing the work area 223 for non-specific control to "0" and the initial setting process are executed in the process corresponding to non-specific control, regarding the update of the information in the work area 223 for non-specific control It is possible to prevent the processing corresponding to the specific control from intervening.

In the separate monitoring process (FIG. 107), which is a process corresponding to the non-specific control, it is monitored whether or not an abnormality has occurred in the work area 223 for non-specific control. , a process of clearing the work area 223 for non-specific control to "0" and a process of initializing are executed. As a result, the monitoring of whether or not an abnormality has occurred in the work area 223 for non-specific control and the execution of initialization of the work area 223 for non-specific control are performed as a series of processes in the process corresponding to non-specific control. can be executed as

When the occurrence of an abnormality is specified in the information stored in the work area 223 for non-specific control in another monitoring process (FIG. 107) executed in the process corresponding to non-specific control, the non-specific control Although the work area 223 is cleared to "0" and initialized, the stack area 224 for non-specific control is not cleared to "0" or initialized. As a result, while information anomalies in the work area 223 for non-specific control can be resolved, information and separate management of various registers used in processing corresponding to specific control saved in the stack area 224 for non-specific control It is possible to prevent the return address information from being erased after the processing is completed.

The process of clearing the specific control work area 221 and the specific control stack area 222 to "0" and initializing them is executed in the process corresponding to the specific control. The process of clearing and initializing is executed in the process corresponding to non-specific control. As a result, with regard to such initialization processing, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to the specific control, and the non-specific control It is possible to treat the work area 223 as a dedicated storage area for processing corresponding to non-specific control.

In the main processing (FIG. 100), it is configured to monitor whether or not the set values are normal in steps S6608 and S6614. It may be configured not to be executed. This makes it possible to reduce the processing load of the processing at the start of supply of operating power, which is executed when the supply of operating power to the main CPU 63 is started. In addition, even if monitoring of whether the set value is normal or not is not performed in the process at the start of supply of operating power, the timer interrupt executed after the process at the start of supply of the operating power is completed. Since the setting monitoring process (step S6820) of the process (FIG. 103) monitors whether or not the setting value is normal, it is possible to deal with the abnormal setting value.

Also, the setting monitoring process (step S6820) is not limited to the configuration in which it is executed each time the timer interrupt process (FIG. 103) is started. The configuration may be such that the setting monitoring process (step S6820) is executed each time it is executed a number of times (for example, 10000 times). In this case, it is possible to reduce the frequency of execution of the monitoring while periodically monitoring whether or not the set values are normal.

Alternatively, the setting monitoring process (step S6820) may be executed in the remaining processes (steps S6610 to S6613) in the main process (FIG. 100). In this case, it is possible to monitor whether or not the set value is normal by using idle time in a situation where timer interrupt processing is not being executed.

Further, the configuration may be such that the setting monitoring process (step S6820) is executed when a game round is newly started. More specifically, when a game round is newly started, the setting monitoring process (step S6820) may be executed before the success/failure determination process is executed. As a result, it is possible to prevent the validity determination process from being executed in a situation where the set value is abnormal.

In addition, when it is specified that the setting value is abnormal in the setting monitoring process (step S6820), instead of the configuration that shifts to the setting value update process (step S6904), the work area 221 for specific control The game stop flag may be set to "1". In this case, the process of steps S6808 to S6821 is not executed by making an affirmative determination in step S6807 in the timer interrupt process (FIG. 103), so if the set value is abnormal, the progress of the game is stopped. becomes. However, since the processing of steps S6801 to S6806 is executed, power failure monitoring is executed, and the hit random number counter C1, jackpot type counter C2, reach random number counter C3 and random number initial value counter CINI are updated, and further Fraud detection is performed. Further, when the game stop flag is set to "1", a notification indicating that the set value should be updated may be executed to prompt execution of the set value update process. In this case, the manager of the game hall who confirmed the notification performs the power OFF operation, and then performs the power ON operation in a manner in which the setting value update process is executed, so that the game stop flag is cleared to "0". As a result, the state in which the progress of the game is stopped is released, and the set value update process is executed to set the normal set values.

Further, when it is specified that the setting value is abnormal in the setting monitoring process (step S6820), the setting error flag provided in the work area 221 for specific control is set to "1" and 100), the progress of the game is stopped with the setting error flag set to "1", and in order to cancel the state in which the progress of the game is stopped, the power is turned off. A configuration requiring ON is also possible. In this case, even if no operation is performed in the main process (FIG. 100) to execute the set value update process, if the setting error flag is set to "1", the setting is forcibly set. By executing the value update process, it is possible to force the setting value to be newly set using the setting value update process set in the main process (FIG. 100).

When the program monitoring unit 252 identifies the occurrence of an information abnormality and the reset signal is forcibly turned from OFF to ON, the work area 221 for specific control is initialized. , the setting value of the pachinko machine 10 may be configured to be "setting 1". When the program monitoring unit 252 identifies the occurrence of an information abnormality and the reset signal is forcibly turned from OFF to ON, the work area 221 for specific control is initialized and then set. A configuration in which value update processing is executed may be employed.

Further, when the program monitoring unit 252 identifies the occurrence of an information abnormality, the reset signal is not forcibly turned from OFF to ON, and the clear processing (step S6607) at the time of non-setting update is executed. Alternatively, the clear processing (step S6620) and the setting value update processing (step S6621) at the time of setting update may be executed.

Also, in the clearing process (step S6607) at the time of non-setting update, the setting value of the pachinko machine 10 becomes "setting 1" by initializing the storage area for storing the setting value information in the work area 221 for specific control. A configuration may be employed, and a configuration having a predetermined set value other than "setting 1" may be employed. As a result, it is possible to use a predetermined setting value when the clearing process at the time of non-setting update is executed.

In addition, in the clearing process (step S6607) at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". good.

Also, in step S7204 in the separate monitoring process (FIG. 107), the management start flag is not cleared to "0", but the management start flag may be cleared to "0". In step S7204 in the separate monitoring process (FIG. 107), the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233 may not be cleared to "0", and the calculation result storage area may 234 may not be cleared to "0".

In addition, in step S7204 in the separate monitoring process (FIG. 107), not only the work area 223 for non-specific control but also the stack area 224 for non-specific control are cleared to "0" and initialized. may be configured. In this case, in the stack area 224 for non-specific control, the information of the return address of the management execution process after the end of the separate monitoring process is used in the process corresponding to the specific control saved in the stack area 224 for non-specific control. It is preferable not to erase the information in the various registers.

In the separate monitoring process (FIG. 107), it is monitored whether or not an abnormality has occurred in the stack area 224 for non-specific control. A configuration may be adopted in which the stack area 224 is cleared to “0” and initialized. In this case, it is preferable not to delete the information of the return address of the management execution process after the end of the separate monitoring process in the stack area 224 for non-specific control.

Further, the configuration is not limited to the configuration in which both the work area 221 for specific control and the stack area 222 for specific control are the checksum calculation target, and only the specific control work area 221 is the checksum calculation target. , or only the stack area 222 for specific control is subject to checksum calculation.

<Thirty-first embodiment>
This embodiment differs from the thirtieth embodiment in the processing configuration of the main process executed by the main CPU 63 . The configuration different from that of the thirtieth embodiment will be described below. The description of the same configuration as that of the thirtieth embodiment is basically omitted.

FIG. 108 is a flow chart showing main processing in this embodiment executed by the main CPU 63 . The processing of steps S7301 to S7322 in the main processing is executed using the program for specific control and the data for specific control in the main CPU 63. FIG.

First, power-on wait processing is executed (step S7301). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined wait time (specifically, one second) elapses after the main process is activated. The operation start and initial setting of the pattern display device 41 are completed during the execution period of the power-on wait process. Thereafter, access to the main RAM 65 is permitted (step S7302).

Thereafter, it is determined whether or not the power failure flag provided in the work area 221 for specific control in the main RAM 65 is set to "1" (step S7303). If the power failure flag is set to "1" (step S7303: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7304). The checksum calculation method is the same as step S6604 of the main process (FIG. 100) in the thirtieth embodiment.

After that, the work area 221 for specific control and the stack area for specific control calculated in the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S7304 (step S7305). Then, it is determined whether or not the checksums match (step S7306).

If an affirmative determination is made in step S7306, the processing of steps S7307 to S7320 is executed. In this case, the processing contents of steps S7307 to S7314 are the same as steps S6614 to S6621 of the main processing (FIG. 100) in the thirtieth embodiment. This is the same as steps S6609 to S6613 of the process (FIG. 100).

Further, if the reset button 68c is pressed (step S7308: YES), but a negative determination is made in any of steps S7309 to S7311, clear processing at non-setting update is executed (step S7308: YES). S7315). The processing contents of the clear processing at the time of non-setting update are the same as step S6607 of the main processing (FIG. 100) in the thirtieth embodiment. However, in the present embodiment, after executing the clear processing at the time of non-setting update, the processing proceeds to steps S7316 to S7320 without determining whether or not the setting values are normal. Only when a negative determination is made in any of steps S7309 to S7311, the clear processing (step S7315) at the time of non-setting update is executed. Since it is determined in step S7307 whether or not the setting value is normal, it is not necessary to determine whether or not the setting value is normal after executing the clear processing at the time of non-setting update.

If a negative determination is made in step S7303 or step S7306, that is, if the power failure flag in the work area 221 for specific control is not set to "1", or if a checksum error occurs, clear processing at the time of error is executed. (step S7321). FIG. 109 is a flow chart showing clear processing at the time of abnormality. The processing of steps S7401 to S7405 in the clear processing at the time of abnormality is executed by the main CPU 63 using the program for specific control and the data for specific control.

First, clear processing of the work area 221 for specific control is executed (step S7401). In the clearing process, except for the area (specifically, the set value counter) in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control, the work area for the specific control 221 is cleared to "0" and the area cleared to "0" is initialized. As a result, the area indicating whether or not the winning lottery mode is the high probability mode is cleared to "0", so the winning lottery draws regardless of the winning lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. Mode is low probability mode. In addition, the game round is not executed, the open/close execution mode is not executed, and the normal diagram display section 38a is not displayed in a variable manner, and the general electric accessory 34a is in the closed state. situation. In addition, since the reservation storage area 65a and the general electricity reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display unit 37a is erased and the general figure display unit The pending information for 38a is deleted.

Thereafter, clear processing of the stack area 222 for specific control is executed (step S7402). In the clear processing, the stack area 222 for specific control is cleared to "0" and initialized.

Thereafter, as "PUSH PSW", the information in the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S7403). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes according to the execution results of operation instructions, rotate instructions, input/output instructions, and the like. By saving the information in the flag register before the program of the subroutine corresponding to the clear processing for non-specific control is started, the flag in the state before changing after the subroutine is called or the subroutine is started. Register information can be saved in the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

After that, by reading out the subroutine program corresponding to the non-specific control clearing process set in the non-specific control program, the non-specific control clearing process is started (step S7404). In this case, information for identifying the return address of the clear processing in the event of an abnormality after execution of the clear processing for the non-specific control is written in the stack area 222 for specific control by the push instruction. When the clear processing for non-specific control ends, information for specifying the return address is read out by a pop instruction, and the program for the clear processing in the event of an abnormality indicated by the return address is returned.

After the execution of the clear processing for the non-specific control, when the program for the clear processing in the abnormal state is restored, the flag register saved in the stack area 222 for the specific control in step S7402 by the pop instruction as "POP PSW". information is returned to the flag register of the main side CPU 63 (step S7405). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S7402 was executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

FIG. 110 is a flow chart showing clear processing for non-specific control. The processing of steps S7501 to S7516 in the non-specific control clearing process is executed by the main CPU 63 using the non-specific control program and non-specific control data.

First, as "LD SP, Y(u+2)", Y(u+2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S7501). In this case, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, the information of the last address in the stack area 224 for non-specific control is set in the stack pointer.

Thereafter, as "LD (_WABUF), WA", the information in the WA register of the main CPU 63 is saved in the WA buffer set in the non-specific control work area 223 by the load instruction (step S7502). Also, as "LD (_BCBUF), BC", the information in the BC register of the main CPU 63 is saved in the BC buffer set in the non-specific control work area 223 by the load instruction (step S7503). Also, "LD
(_DEBUF), DE”, the information in the DE register of the main CPU 63 is saved in the DE buffer set in the non-specific control work area 223 by a load instruction (step S7504). Also, as "LD (_HLBUF), HL", the information in the HL register of the main CPU 63 is saved in the HL buffer set in the non-specific control work area 223 by the load instruction (step S7505). Also, as "LD (_IXBUF), IX", the information in the IX register of the main CPU 63 is saved in the IX buffer set in the non-specific control work area 223 by the load instruction (step S7506). Also, as "LD (_IYBUF), IY", the information in the IY register of the main CPU 63 is saved in the IY buffer set in the non-specific control work area 223 by the load instruction (step S7507).

The registers of the main CPU 63 include various general-purpose registers, auxiliary registers, and index registers in addition to the already-described flag registers. In this case, in steps S7502 to S7507, each information of the WA register, BC register, DE register, HL register, IX register and IY register, which are some of these various general purpose registers, auxiliary registers and index registers is saved in the corresponding buffer in the work area 223 for non-specific control. The amount of information in the WA register, BC register, DE register, HL register, IX register and IY register is all 2 bytes.

These WA register, BC register, DE register, HL register, IX register and IY register are processing corresponding to non-specific control, that is, partial clear processing (step S7508) of work area 223 for non-specific control and initialization processing (step S7508). This register is used in step S7509). The information set in such registers is saved in the non-specific control work area 223 prior to the execution of the non-specific control work area 223 partial clear processing (step S7508) and initialization processing (step S7509). By doing so, it is possible to save the information of these registers used for the specific control before the non-specific control is started. Therefore, even if these registers are overwritten during the non-specific control, the information saved in the work area 223 for non-specific control is returned to these registers when the non-specific control is terminated. can be returned to the state corresponding to the specific control before the non-specific control is executed.

In addition, instead of saving all information of various general-purpose registers, auxiliary registers, and index registers in the work area 223 for non-specific control, The information of the WA register, BC register, DE register, HL register, IX register and IY register to be used in the partial clear processing (step S7508) and the initialization processing (step S7509) is selectively used for non-specific control. By saving to the work area 223, it is possible to reduce the capacity to be secured for saving the register information in the work area 223 for non-specific control. Therefore, while securing a large capacity of the work area 223 for non-specific control that can be used in the partial clearing process (step S7508) and the initial setting process (step S7509) of the work area 223 for non-specific control, It is possible to save such register information. Of course, of the various general-purpose registers, auxiliary registers, and index registers in the main CPU 63, registers other than the WA register, BC register, DE register, HL register, IX register, and IY register support non-specific control. The information set before the start of the processing to be performed is stored and retained until the processing corresponding to the non-specific control ends and the processing corresponding to the specific control is restarted.

In addition, by saving register information in the work area 223 for non-specific control instead of saving it in the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be reduced accordingly. It becomes possible. Also, when using the stack area 224 for non-specific control, as already explained, information is written in the order in which later information is read out first. Otherwise, all subsequent read order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information to the non-specific control work area 223, it is possible to prevent the occurrence of the above event even when there is a large amount of information to be saved. .

After executing the processing of steps S7502 to S7507, the work area 223 for non-specific control is partially cleared (step S7508). In the partial clear processing, among the storage areas of the work area 223 for non-specific control, storage areas other than the storage area in which the information of various registers of the main CPU 63 used in the processing corresponding to the specific control are saved. to "0". Specifically, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer and IY buffer among the storage areas of the non-specific control work area 223 are not cleared to "0", while the storage other than these various buffers is not cleared. Clear the area to "0".

In this case, the normal counter area 231, open/close execution mode counter area 232, high frequency support mode counter area 233, calculation result storage area 234, and management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control. In addition, by not clearing the storage area in which the information of various registers of the main CPU 63 used in the processing corresponding to the specific control is saved to "0", the processing corresponding to the non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to restore the information used in the process corresponding to the specific control to various registers of the main CPU 63 .

Also, in step S7508, the stack area 224 for non-specific control is not cleared to "0". The stack area 224 for non-specific control stores the return address information of the clear processing (FIG. 109) at the time of abnormality after the completion of the clear processing for non-specific control. 224 is not cleared to "0", it is possible to prevent this return address information from being erased.

Thereafter, initialization processing is executed (step S7509). In the initial setting process, initial setting is performed for the storage area to be cleared to "0" in step S7508 in the work area 223 for non-specific control.

After that, as "LD SP, Y(r+α)", the load instruction returns to the specific control in the stack pointer of the main side CPU 63 as in step S3909 of the management execution processing (FIG. 71) in the fifteenth embodiment. Y(r+α) is set as a fixed address at time (step S7510). The address of Y(r+α) is set as an address between Y(r+8) and Y(s) in the stack area 222 for specific control.

Thereafter, as "LD WA, (_WABUF)", the WA register of the main CPU 63 is overwritten with the information saved in the WA buffer of the non-specific control work area 223 by the load instruction (step S7511). Also, as "LD BC, (_BCBUF)", the BC register of the main CPU 63 is overwritten with the information saved in the BC buffer of the non-specific control work area 223 by the load instruction (step S7512). Also, as "LD DE, (_DEBUF)", the DE register of the main CPU 63 is overwritten with the information saved in the DE buffer of the non-specific control work area 223 by the load instruction (step S7513). Also, as "LD HL, (_HLBUF)", the HL register of the main CPU 63 is overwritten with the information saved in the HL buffer of the non-specific control work area 223 by the load instruction (step S7514). Also, as "LD IX, (_IXBUF)", the IX register of the main CPU 63 is overwritten with the information saved in the IX buffer of the non-specific control work area 223 by the load instruction (step S7515). Also, as "LD IY, (_IYBUF)", the IY register of the main CPU 63 is overwritten with the information saved in the IY buffer of the non-specific control work area 223 by the load instruction (step S7516). By executing the processing of steps S7511 to S7516, processing corresponding to non-specific control is started for each information of the WA register, BC register, DE register, HL register, IX register and IY register of the main side CPU 63. It is possible to restore the information corresponding to the specific control immediately before the control.

According to the above configuration, when the power failure flag is not set to "1" or the checksum is abnormal in the main process (FIG. 108) executed when the supply of operating power to the main CPU 63 is started, In some cases, not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control are set to "0" by executing the clearing process at the time of abnormality (step S7321). ” is cleared and initialized. If an information error has occurred in the work area 221 for specific control, there is a possibility that an information error has also occurred in the work area 223 for non-specific control. By also initializing the work area 223 for non-specific control, the process corresponding to the non-specific control is not executed in that state even though the information abnormality has occurred in the work area 223 for non-specific control. It becomes possible to

Even if the process of clearing "0" and the process of initializing the non-specific control work area 223 in the error clearing process (step S7321) are executed, the non-specific control work area The information of various registers saved in 223 and used in the process corresponding to the specific control is not cleared to "0". As a result, processing for clearing the work area 223 for non-specific control to "0" while not erasing information used in processing corresponding to specific control after the processing corresponding to non-specific control is completed. and initialization processing can be executed.

Even if the process of clearing the work area 223 for non-specific control to "0" and the process of initializing the work area 223 for non-specific control are executed in the clear process at the time of abnormality (step S7321), the stack area 224 for non-specific control , the processing for clearing to "0" and the processing for initializing are not executed. This makes it possible to prevent the return address information from being erased after the clearing process for non-specific control (FIG. 110) is completed.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed in the process corresponding to the specific control, and the work area 223 for non-specific control is set to " 0" clearing process and initialization process are executed in the process corresponding to the non-specific control. As a result, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for the process corresponding to the specific control, even with respect to the process of clearing "0" and the process of initializing. It is possible to treat the work area 223 for specific control as a dedicated storage area for processing corresponding to non-specific control.

Note that the configuration is not limited to the configuration in which both the work area 221 for specific control and the stack area 222 for specific control are subject to checksum calculation, and only the work area 221 for specific control is subject to checksum calculation. , or only the stack area 222 for specific control is subject to checksum calculation.

Also, the non-specific control work area 223 may be configured to be the checksum calculation target. In this case, the work area 221 for specific control and the work area 223 for non-specific control may be configured to be checksum calculation targets, and the stack area 222 for specific control and the work area 223 for non-specific control are checked. The checksum may be calculated for the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control.

Also, the stack area 224 for non-specific control may be configured to be a checksum calculation target. In this case, the work area 221 for specific control and the stack area 224 for non-specific control may be configured to be checksum calculation targets, and the stack area 222 for specific control and the stack area 224 for non-specific control are checked. The checksum may be calculated for the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control.

Further, the work area 223 for non-specific control and the stack area 224 for non-specific control may be configured to be checksum calculation targets. In this case, the work area 221 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control may be configured to be checksum calculation targets. The work area 223 for specific control and the stack area 224 for non-specific control may be configured to be checksum calculation targets. The work area 223 and the stack area 224 for non-specific control may be configured to be checksum calculation targets.

In steps S7508 and S7509 in the clearing process for non-specific control (FIG. 110), not only the work area 223 for non-specific control but also the stack area 224 for non-specific control are cleared to "0". It may be configured to execute an initial setting process. In this case, it is preferable not to erase the information of the return address of the clear processing at the time of abnormality after the completion of the clear processing for non-specific control.

Also, in step S7508 in the clearing process for non-specific control (FIG. 110), the management start flag is cleared to "0", but the management start flag may not be cleared to "0". In step S7508 in the clearing process for non-specific control (FIG. 110), the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233 may not be cleared to "0". The calculation result storage area 234 may be configured not to be cleared to "0".

<Thirty-Second Embodiment>
This embodiment differs from the thirtieth embodiment in the processing configuration for monitoring information abnormality in the main RAM 65 using checksums. The configuration different from that of the thirtieth embodiment will be described below. The description of the same configuration as that of the thirtieth embodiment is basically omitted.

FIG. 111 is a flow chart showing power failure information storage processing in this embodiment executed by the main CPU 63 . The power failure information storage process is executed in step S6801 in the timer interrupt process (FIG. 103). Further, the processes of steps S7601 to S7613 in the power failure information storage process are executed by the main CPU 63 using a specific control program and specific control data.

Steps S7601 to S7608 in the power failure information storage process are the same as steps S6701 to S6708 in the power failure information storage process (FIG. 101) in the thirtieth embodiment. If the occurrence of a power failure is identified, an affirmative determination is made in step S7608, and power failure processing in steps S7609 to S7613 is executed.

Specifically, first, the power failure flag provided in the work area 221 for specific control is set to "1" (step S7609). As a result, when the power failure processing is normally executed and information is stored and retained in the main RAM 65 normally, when the supply of operating power to the main CPU 63 is restarted, the specific control "1" is set to the power failure flag in the work area 221 of .

Thereafter, a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7610). In this case, the storage areas in the work area 221 for specific control and the stack area 222 for specific control, which are subject to calculation when calculating the checksum for specific control, are stored in step S7701 of the checksum monitoring process (FIG. 112) described later. are the same as the storage areas in the work area 221 for specific control and the stack area 222 for specific control, which are the calculation targets of the checksum for specific control in . In addition, in the storage area to be calculated when calculating the checksum for this specific control, an area (specifically, is a set value counter). Then, the calculated checksum for the specific control is a storage area for storing the checksum for the specific control in the work area 221 for the specific control and is excluded from the checksum calculation target for the specific control. stored in the storage area where

After that, a checksum is calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7611). In this case, the storage areas in the work area 223 for non-specific control and the stack area 224 for non-specific control, which are subject to calculation when the checksum for non-specific control is calculated, are stored in the checksum monitoring process described later (FIG. 112). It is the same as the storage area in the work area 223 for non-specific control and the stack area 224 for non-specific control, which is the object of calculation of the checksum for non-specific control in step S7706. Then, the calculated checksum for non-specific control is excluded from a storage area for storing the checksum for non-specific control in the work area 221 for specific control and from the target of calculation of the checksum for specific control. stored in the stored storage area.

After that, all output port information in the register of the main CPU 63 is set to "0" (step S7612), and access to the main RAM 65 is prohibited (step S7613). Then, the infinite loop continues until the power supply is completely cut off and processing cannot be executed.

Next, the checksum monitoring process executed by the main CPU 63 will be described with reference to the flowchart of FIG. Note that the checksum monitoring process is executed instead of steps S6604 to S6606 in the main process (FIG. 100). Further, the processes of steps S7701 to S7711 in the checksum monitoring process are executed by the main CPU 63 using the specific control program and specific control data.

First, a checksum for specific control is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7701). The calculation method of the checksum for the specific control is the same as step S7610 in the power failure information storage process (FIG. 111). After that, the checksum for the specific control calculated in step S7610 of the power failure processing executed immediately before the supply of the operating power to the MPU 62 is stopped and stored in the work area 221 for the specific control is used as the checksum for the specific control. is read from the work area 221, and the read checksum for specific control is compared with the checksum for specific control calculated in step S7701 (step S7702). Then, it is determined whether or not the checksums for the specific control match (step S7703).

If the checksum for specific control does not match (step S7703: NO). Clear processing of the work area 221 for specific control is executed (step S7704). In the clearing process, except for the area (specifically, the set value counter) in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control, the work area for the specific control 221 is cleared to "0" and initial setting is executed. As a result, the area indicating whether or not the winning lottery mode is the high probability mode is cleared to "0", so the winning lottery draws regardless of the winning lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. Mode is low probability mode. In addition, the game round is not executed, the open/close execution mode is not executed, and the normal diagram display section 38a is not displayed in a variable manner, and the general electric accessory 34a is in the closed state. situation. In addition, since the reservation storage area 65a and the general electricity reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display unit 37a is erased and the general figure display unit The pending information for 38a is deleted. In addition, in the clearing process, the various registers of the main CPU 63 are also cleared to "0" and then initialized. Also, the stack area 222 for specific control is cleared to "0" and initialization is performed (step S7705).

If an affirmative determination is made in step S7703, or if the process of step S7705 is executed, the checksum for non-specific control is calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7706). The method of calculating the checksum for the non-specific control is the same as step S7611 in the power failure information storage process (FIG. 111). After that, the checksum for non-specific control calculated in step S7611 of the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control is used for specific control. In addition, the read checksum for non-specific control is compared with the checksum for non-specific control calculated in step S7706 (step S7707). Then, it is determined whether or not the non-specific control checksums match (step S7708).

If the checksums for non-specific control do not match (step S7708: NO), as "PUSH PSW", the information in the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction ( step S7709). The flag register includes a carry flag, a zero flag, a P/V flag, a sign flag, a half carry flag, and the like, and the information in the flag register changes according to the execution results of arithmetic instructions, rotate instructions, input/output instructions, and the like. By saving the information in the flag register before the program of the subroutine corresponding to the clear processing for non-specific control is started, the flag in the state before it changes after the subroutine is called or the subroutine is started. Register information can be saved in the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

After that, by reading out the subroutine program corresponding to the non-specific control clearing process set in the non-specific control program, the non-specific control clearing process is started (step S7710). In this case, information for specifying the return address of the checksum monitoring process after execution of the clear process for the non-specific control is written in the stack area 222 for specific control by the push instruction. When the clear processing for non-specific control ends, information for identifying the return address is read by the pop instruction, and the program returns to the checksum monitoring processing indicated by the return address.

After the execution of the clear processing for the non-specific control, when the program for the clear processing in the abnormal state is returned to, the flag register saved in the stack area 222 for the specific control in step S7709 by the pop instruction is set as "POP PSW". information is returned to the flag register of the main CPU 63 (step S7711). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S7709 was executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

FIG. 113 is a flow chart showing clear processing for non-specific control. The processing of steps S7801 to S7818 in the non-specific control clearing process is executed by the main CPU 63 using the non-specific control program and non-specific control data.

Steps S7801 to S7807 in the clearing process for non-specific control are the same as steps S7501 to S7507 in the clearing process for non-specific control (FIG. 110) in the thirty-first embodiment.

After that, the work area 223 for non-specific control is partially cleared (step S7808). In the partial clear processing, among the storage areas of the work area 223 for non-specific control, storage areas other than the storage area in which the information of various registers of the main CPU 63 used in the processing corresponding to the specific control are saved. to "0". Specifically, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer and IY buffer among the storage areas of the non-specific control work area 223 are not cleared to "0", while the storage other than these various buffers is not cleared. Clear the area to "0".

In this case, the normal counter area 231, open/close execution mode counter area 232, high frequency support mode counter area 233, calculation result storage area 234, and management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control. In addition, by not clearing the storage area in which the information of various registers of the main CPU 63 used in the processing corresponding to the specific control is saved to "0", the processing corresponding to the non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to restore the information used in the process corresponding to the specific control to various registers of the main CPU 63 .

After that, initialization processing is executed (step S7809). In the initial setting process, initial setting is performed for the storage area to be cleared to "0" in step S7808 in the work area 223 for non-specific control.

After that, the process of partially clearing the stack area 224 for non-specific control is executed (step S7810). In the partial clear processing, the information of the return address of the checksum monitoring processing (FIG. 112) after the completion of the clear processing for non-specific control is stored in each storage area of the stack area 224 for non-specific control. "0" clears the storage areas other than the stored storage area. As a result, information abnormality in the stack area 224 for non-specific control is prevented from being erased after the clear processing for non-specific control is completed, while information of the return address of the checksum monitoring processing (FIG. 112) is not erased. can be eliminated.

Thereafter, initialization processing is executed (step S7811). In the initialization process, initialization is performed for the storage area that was cleared to "0" in step S7810 in the stack area 224 for non-specific control.

After that, the processing of steps S7812 to S7818 is executed. These steps S7812 to S7818 are the same as steps S7510 to S7516 in the non-specific control clearing process (FIG. 110) in the thirty-first embodiment.

According to the above configuration, the checksum for the work area 221 for specific control and the stack area 222 for specific control, and the checksum for the work area 223 for non-specific control and the stack area 224 for non-specific control are Calculated separately. This makes it possible to individually specify an information abnormality for each of the storage area corresponding to the specific control in the main RAM 65 and the storage area corresponding to the non-specific control in the main RAM 65 .

If there is an abnormality in the checksum for the specific control, the work area 221 for the specific control and the stack area 222 for the specific control are cleared to "0" and initialized. If there is an abnormality in the checksum, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" and initialized. As a result, it is possible to narrow down the target for executing the "0" clearing process and the initial setting process to the area where the checksum abnormality has been identified.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed in the process corresponding to the specific control, and the work area 223 for non-specific control is set to " 0" clearing process and initialization process are executed in the process corresponding to the non-specific control. As a result, the work area 221 for the specific control and the stack area 222 for the specific control are treated as dedicated storage areas for the process corresponding to the specific control in the process of clearing "0" and the initial setting process as well. It is possible to treat the control work area 223 as a dedicated storage area for processing corresponding to non-specific control.

Although the management start flag is cleared to "0" in step S7808 in the clearing process for non-specific control (FIG. 113), the management start flag may not be cleared to "0". In step S7808 in the clearing process for non-specific control (FIG. 113), the normal counter area 231, the opening/closing execution mode counter area 232, and the high-frequency support mode counter area 233 may not be cleared to "0". The calculation result storage area 234 may be configured not to be cleared to "0".

<Thirty-third embodiment>
This embodiment differs from the fifteenth embodiment in the processing configuration executed by the main CPU 63 . The configuration that is different from the fifteenth embodiment will be described below. Note that the description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 114 is a flow chart showing main processing in this embodiment executed by the main CPU 63 . It should be noted that the processing of steps S7901 to S7924 in the main processing is executed using a program for specific control and data for specific control in the main CPU 63 .

First, power-on initialization processing is executed (step S7901). In the power-on initial setting process, for example, the process waits without proceeding to the next process until a predetermined waiting time (specifically, one second) has elapsed after the main process was activated. The operation start and initial setting of the pattern display device 41 are completed during this predetermined waiting period. Also, access to the main side RAM 65 is permitted.

Thereafter, internal function register setting processing is executed (step S7902). In the internal function register setting process, the interrupt period of the first timer interrupt process (Fig. 117), which is a process that is started by periodically interrupting the main process, is set to the first interrupt period (specifically, 4 milliseconds). , and set the interrupt cycle of the second timer interrupt process (FIG. 123), which is a process that is started by periodically interrupting the main process, to a second interrupt cycle that is a cycle shorter than the first interrupt cycle. (specifically 2 milliseconds).

In other words, in this embodiment, the first timer interrupt processing and the second timer interrupt processing exist as the timer interrupt processing so that the interrupt cycle is relatively long and short. Both the first timer interrupt process and the second timer interrupt process are started by interrupting the main process. Also, the second timer interrupt process is started by interrupting the first timer interrupt process. On the other hand, the first timer interrupt process is not activated by interrupting the second timer interrupt process. Also, if both the first interrupt cycle and the second interrupt cycle have passed in a situation where neither the first timer interrupt process nor the second timer interrupt process is executed, the second Timer interrupt processing is started first. In this respect, it can be said that the second timer interrupt process is started with priority over the first timer interrupt process.

In the internal function register setting process, the first interrupt period of the first timer interrupt process is set in a predetermined register of the main CPU 63, and the second interrupt period of the second timer interrupt process is set in a specific register of the main CPU 63. do. In the internal function register setting process, in addition to the setting of the first and second interrupt periods, the process of setting the numerical range of various counters such as the numerical range of the jackpot random number counter C1, for example, is executed.

After that, "1" is set to the start-up processing flag provided in the work area 221 for specific control (step S7903). The start-up processing flag indicates that even if the first timer interrupt process is started, the first timer interrupt process should be terminated without executing the various processes set in the first timer interrupt process. is a flag for specifying by the main CPU 63 . By setting the start-up processing flag to "1", even if the first timer interrupt process is started, the various processes set in the first timer interrupt process will not be executed and the first timer interrupt process will not be executed. The timer interrupt processing is terminated.

Thereafter, interrupt permission is set (step S7904). As a result, the first timer interrupt process (FIG. 117) is interrupted and started at the first interrupt cycle, and the second timer interrupt process (FIG. 123) is interrupted and started at the second interrupt cycle. However, since "1" is set in the start-up processing flag in step S7903, even if the first timer interrupt process is started, various processes set in the first timer interrupt process are executed. The first timer interrupt process is terminated without any interruption.

After that, it is determined whether or not the reset button 68c is pressed (step S7905). That is, it is determined whether or not the supply of operating power to the MPU 62 is started by performing the power ON operation of the pachinko machine 10 while the reset button 68c is being pressed. Here, in this embodiment, the main controller 60 is provided with the setting key insertion portion 68a and the reset button 68c, but is not provided with the update button 68b. Further, the main controller 60 is provided with the first to fourth notification display devices 201 to 204 as in the eleventh embodiment instead of the first to third notification display devices 69a to 69c.

If the reset button 68c is not pressed (step S7905: NO), it is determined whether or not the power failure flag provided in the work area 221 for specific control is set to "1" (step S7906). When power failure processing is executed in power failure information storage processing (step S8202) of first timer interrupt processing (FIG. 117), which will be described later, the power failure flag is set to "1". The power failure flag is a flag for the main CPU 63 to specify whether or not the power failure process was appropriately performed at the time of the previous power failure.

If the power failure flag is set to "1" (step S7906: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7907). The checksum calculation method is arbitrary, but the same calculation method as the calculation method when the checksum is calculated in the power failure processing in the power failure information storage processing (step S8202) of the first timer interrupt processing (FIG. 117) described later. It is a method. The checksum calculated in the power failure processing is stored in the work area 221 for specific control. Excluded from the storage area subject to calculation.

In other words, when calculating the checksum, some storage areas, which are part of the work area 221 for specific control and the stack area 222 for specific control, are subject to calculation. In the storage area to be operated, the checksum is calculated in the power failure processing when the supply of the operating power to the MPU 62 is stopped, and then the supply of the operating power to the MPU 62 is resumed and the process of step S7907 is executed. It is a storage area in which information is basically not rewritten when power supply such as backup power to the work area 221 for specific control and the stack area 222 for specific control is continued until it is rewritten. Therefore, the information in the work area 221 for specific control and the stack area 222 for specific control is not changed from when the supply of operating power to the MPU 62 is stopped to when the supply of operating power to the MPU 62 is restarted. In this case, the checksums for the specific control work area 221 and the specific control stack area 222 are the same as immediately before the supply of operating power to the MPU 62 is stopped. In addition, in the storage area to be calculated when calculating this checksum, an area (specifically, a setting value counter )It is included. Note that the work area 223 for non-specific control and the stack area 224 for non-specific control are not included in the checksum calculation target.

After that, the work area 221 for specific control and the stack area for specific control calculated in the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control 222 is read from the specific control work area 221, and the read checksum is compared with the checksum calculated in step S7907 (step S7908). Then, it is determined whether or not the checksums match (step S7909).

If a negative determination is made in step S7906 or step S7909, that is, if the power failure flag is not set to "1" or if the checksum does not match, the game stop flag provided in the work area 221 for specific control is set to "1" (step S7910). The game stop flag is a situation in which an affirmative determination is made in step S8207 in the first timer interrupt processing (FIG. 117) described later and the processing of steps S8208 to S8221 is not executed, that is, the execution of the processing for advancing the game is stopped. This flag is used by the main CPU 63 to specify whether or not the situation should be resolved. By setting the game stop flag to "1", the process of steps S8208 to S8221 is not executed by making an affirmative determination in step S8207 of the first timer interrupt process (FIG. 117) described later. As a result, if the power failure flag is not set to "1" because the power failure process was not properly performed at the time of the previous power failure, the progress of the game is stopped, and the specific control The progress of the game is stopped when the checksums do not match due to a change in the storage state of information in at least one of the work area 221 and the stack area 222 for specific control since the last power-off. state.

In this case, in the storage area to be calculated when calculating the checksum, as described above, the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (specifically, set value counter). Therefore, if a setting value abnormality occurs after the previous power shutdown, the checksums do not match, and the progress of the game is stopped.

On the other hand, even if the game stop flag is set to "1", the processing of steps S8202 to S8206 in the first timer interrupt processing (FIG. 117) is executed. Therefore, even when the progress of the game is stopped, power failure monitoring is executed, and the winning random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and furthermore, Fraud detection is performed.

Thereafter, an abnormality command indicating that an abnormality has occurred in the power failure flag or checksum at the start of supply of operating power is transmitted to the sound emission control device 81 (step S7911). Upon receiving the abnormality command, the sound emission control device 81 causes the display emission section 53 to emit light in a manner corresponding to the information abnormality occurring at the start of supply of operating power, and at the same time, the speaker section 54 outputs "Please change the setting. ” is output. Also, the character image "Please change the setting" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, even if the supply of the operating power to the pachinko machine 10 is temporarily stopped, the above-mentioned notification will be issued when the supply of the operating power to the pachinko machine 10 is resumed until the setting value update process (step S7918) is executed. It is good also as a structure which is continued.

When the progress of the game is stopped, the manager of the game hall confirms the above notification, temporarily stops the supply of the operating power to the pachinko machine 10, and then restarts the supply of the operating power to the pachinko machine 10.例文帳に追加If so, an operation is performed to execute the set value update process (step S7918). As a result, when an abnormality occurs in the power failure flag or checksum at the start of supply of operating power, it is possible to set a new set value in the set value update process (step S7918). .

In particular, in the storage area to be calculated when calculating the checksum, as described above, the area (specifically, the setting value counter) is included, so if there is an abnormality in the checksum, there is a possibility that an abnormality has occurred in the set value. On the other hand, when an abnormality occurs with respect to the checksum as described above, execution of the set value update process (step S7918) is prompted to prevent the game from being played with an abnormal set value. It becomes possible to

If the power failure flag is set to "1" and the checksum is normal (steps S7906 and S7909: YES), it is determined whether or not the setting key insertion unit 68a has been turned on using the setting key. Then (step S7912), it is determined whether or not the front door frame 14 is in an open state with respect to the inner frame 13 and the gaming machine body 12 is in an open state with respect to the outer frame 11 (step S7913). As in the thirtieth embodiment, the front door open sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13 . The main body open sensor 96 is used to detect whether or not it is in the open state, as in the thirtieth embodiment. The setting key insertion portion 68a is turned on using the setting key (step S7912: YES), and the front door frame 14 is in an open state with respect to the inner frame 13, and the game machine main body is in an open state with respect to the outer frame 11. 12 is open (step S7913: YES), a setting confirmation process is executed (step S7914). In the setting confirmation process, the current setting values of the pachinko machine 10 are confirmed on the first to fourth notification display devices 201 to 204 used to display various parameters that are the management results of the game history. A process for displaying the current setting value of the pachinko machine 10 is executed.

FIG. 115 is a flow chart showing the setting confirmation process. Note that the processing of steps S8001 to S8003 in the setting confirmation processing is executed using the specific control program and specific control data in the main CPU 63 .

First, the setting confirmation display flag provided in the work area 221 for specific control is set to "1" (step S8001). The setting confirmation display flag is a flag for the main side CPU 63 to specify that the current setting value of the pachinko machine 10 is being confirmed. When the setting confirmation display flag is set to "1", corresponding display control is performed on the first to fourth notification display devices 201 to 204 in the second timer interrupt processing (FIG. 123) described later. will be As a result, a display indicating that the current setting value of the pachinko machine 10 is being confirmed and a display indicating the current setting value of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. is done.

Thereafter, it is determined whether or not the setting key insertion unit 68a has been turned off using the setting key (step S8002). In this case, it may be configured to determine whether or not the setting key insertion portion 68a has been switched from the ON state to the OFF state, or may be configured to determine whether or not the setting key insertion portion 68a is in the OFF state. If the setting key insertion unit 68a has not been turned off (step S8002: NO), the process of step S8002 is repeated.

If the setting key insertion portion 68a is turned off (step S8002: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (step S8003). As a result, a display indicating that the current setting value of the pachinko machine 10 is being confirmed and a display indicating the current setting value of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. is canceled. In this case, the first to fourth notification display devices 201 to 204 start to display the management result of the game history.

As described above, in the present embodiment, the operation power of the pachinko machine 10 is turned on while the setting key insertion portion 68a is turned on by the setting key without pressing the reset button 68c. is started and the main process is started, the reset button 68c is not pressed and the setting key insertion portion 68a is turned ON, and the main process enables the progress of the game. The setting confirmation process is executed in a situation where the process at the time of supply start of the operating power is being executed, which is the situation before the execution. As a result, it is possible to check the set value even when no game is being played.

Assuming that the setting value is confirmed while the game is continuing, for example, if the setting value is confirmed during the execution of the game cycle, the setting value is confirmed during the confirmation process. There is a risk that the transition to the open/close execution mode may occur at In this case, there is a possibility that the game ball cannot be shot toward the special electric prize winning device 32 even though the opening/closing execution mode has been started. In addition, if the setting value is confirmed during execution of the opening/closing execution mode, the opening/closing execution mode will proceed under the condition that the setting value is being confirmed. There is a risk that the game ball cannot be shot toward the target.

Assuming that the progress of the game is stopped when the setting value is confirmed, if the confirmation of the setting value is started while the game is being played, the progress of the game is stopped in the middle. This may complicate the process for For example, if confirmation of a set value is started during execution of a game round and the progress of the game is to be stopped in the middle, processing for stopping the game round in the middle is required. In this case, when confirmation of the set values is started, the variable display of the symbols in the symbol display device 41 is stopped halfway, and when the confirmation of the set values is completed, the variable display of the symbols in the symbol display device 41 is resumed. To do so would require more complicated processing. Further, for example, if confirmation of set values is started during execution of the opening/closing execution mode and the progress of the game is to be stopped in the middle, processing for stopping the opening/closing execution mode in the middle is required. Also, if confirmation of the set value is started during execution of the variable display of the pattern in the normal pattern display section 38a and the progress of the game is to be stopped in the middle, processing for stopping the variable display of the pattern in the middle is performed. necessary. In addition, if confirmation of the set value is started during execution of the open execution state of the general electric accessory 34a and the progress of the game is to be stopped in the middle, processing for stopping the open execution state in the middle is required. Become. On the other hand, it is also conceivable to wait until all the games are completed before confirming the set value. It is necessary to wait until none of the release execution states of the object 34a is executed, and there is a possibility that the waiting time until confirmation of the setting value is started becomes long.

On the other hand, when the supply of operating power to the main CPU 63 is started, which is the situation before the process for enabling the progress of the game is executed in the main process executed when the supply of the operating power to the main CPU 63 is started. Since the setting confirmation process is executed while the process is being executed, the setting value is confirmed while the progress of the game is already stopped. As a result, it is possible to prevent the setting values from being checked while the game is in progress, and to stop the progress of the game midway or stop the progress of the game when checking the setting values. There is no need to wait until the confirmation of the set value. Therefore, it is possible to appropriately confirm the setting value.

Returning to the description of the main processing (FIG. 114), if the reset button 68c is pressed (step S7905: YES), RAM clear processing is executed (step S7915). In the RAM clearing process, except for the area (specifically, the set value counter) in which the setting value information indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control, the work area for the specific control 221 is cleared to "0" and initial setting is executed. As a result, the area indicating whether or not the winning lottery mode is the high probability mode is cleared to "0", so the winning lottery draws regardless of the winning lottery mode immediately before the supply of the operating power to the pachinko machine 10 is stopped. Mode is low probability mode. In addition, the game round is not executed, the open/close execution mode is not executed, and the normal diagram display section 38a is not displayed in a variable manner, and the general electric accessory 34a is in the closed state. situation. In addition, since the reservation storage area 65a and the general electricity reservation area 65c provided in the work area 221 for specific control are also cleared to "0", the reservation information for the special figure display unit 37a is erased and the general figure display unit The pending information for 38a is deleted. In addition, in the RAM clear processing, the stack area 222 for specific control is cleared to "0" and initial setting is executed. In addition, in the RAM clearing process, the various registers of the main CPU 63 are also cleared to "0" and then initialized. In this initial setting, the same processing as the internal function register setting processing (step S7902) of step S7902 is executed.

On the other hand, in the RAM clear processing, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". This makes it possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared to "0" by the clearing operation by the manager of the game hall.

After that, it is determined whether or not the setting key insertion portion 68a is turned on using the setting key (step S7916). It is determined whether or not the gaming machine body 12 is in the open state (step S7917). As in the thirtieth embodiment, the front door open sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13 . The main body open sensor 96 is used to detect whether or not it is in the open state, as in the thirtieth embodiment. The setting key insertion portion 68a is turned ON using the setting key (step S7916: YES), and the front door frame 14 is in an open state with respect to the inner frame 13, and the gaming machine main body is opened with respect to the outer frame 11. 12 is open (step S7917: YES), a set value update process is executed (step S7918).

FIG. 116 is a flowchart showing setting value update processing. The processes of steps S8101 to S8107 in the set value update process are executed using a specific control program and specific control data in the main CPU 63. FIG.

First, the setting update display flag provided in the work area 221 for specific control is set to "1" (step S8101). The setting update display flag is a flag for specifying in the main side CPU 63 that the setting values of the pachinko machine 10 are being updated. When the setting update display flag is set to "1", corresponding display control is performed on the first to fourth notification display devices 201 to 204 in the second timer interrupt processing (FIG. 123) to be described later. will be As a result, a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. will be

After that, it is determined whether or not the value of the set value counter provided in the work area 221 for specific control is 1 or more corresponding to "setting 1" and 6 or less corresponding to "setting 6" (step S8102). If the value of the set value counter is "0" or is 7 or more, a negative determination is made in step S8102, and "1" is set to the set value counter (step S8103). As a result, the setting value of the pachinko machine 10 becomes "setting 1".

If an affirmative determination is made in step S8102 or if the process of step S8103 is executed, it is determined whether or not the setting key insertion unit 68a has been turned off using the setting key (step S8104). In this case, it may be configured to determine whether or not the setting key insertion portion 68a has been switched from the ON state to the OFF state, or may be configured to determine whether or not the setting key insertion portion 68a is in the OFF state.

If the setting key insertion portion 68a has not been turned off (step S8104: NO), on condition that the reset button 68c has been pressed (step S8105: YES), the set value counter in the work area 221 for specific control is incremented by 1 (step S8106). As a result, each time the reset button 68c is pressed once, the set value is updated to a value one step higher. If the reset button 68c is not pressed (step S8105: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8102. If the value is determined to be 7 or more, "1" is set to the set value counter in step S8103. As a result, when the reset button 68c is pressed once in the state of "setting 6", the setting returns to "setting 1".

If the setting key insertion unit 68a is turned off (step S8104: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8107). As a result, a display indicating that the setting values of the pachinko machine 10 are being updated and a display indicating the current setting values of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. state is canceled. In this case, the first to fourth notification display devices 201 to 204 start to display the management result of the game history.

As described above, in the present embodiment, by performing the power ON operation of the pachinko machine 10 while pressing the reset button 68c, the supply of operating power to the main side CPU 63 is started and the main processing is started. The button 68c is pressed, and the RAM clearing process (step S7915) is executed regardless of whether the setting key insertion portion 68a is ON. As a result, the operation content of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clearing process (step S7915), and the RAM clearing process (step S7915) is executed. It is possible to make the content of the operation for generating the game easy to understand for the manager of the game hall.

Even if the RAM clearing process (step S7915) is executed, the set value counter in the work area 221 for specific control is not cleared to "0" and the information of the set value counter is not changed. This makes it possible to prevent the setting values from being changed even if the RAM clearing process (step S7915) is executed.

RAM clear processing is performed based on not only performing the power ON operation of the pachinko machine 10 while pressing the reset button 68c, but also performing the power ON operation of the pachinko machine 10 while performing the ON operation of the setting key insertion part 68a with the setting key. Not only (step S7915) but also set value update processing (step S7918) is executed. Also, as already described, the setting confirmation process (step S7914) is performed based on the power ON operation of the pachinko machine 10 while turning ON the setting key inserting portion 68a with the setting key without pressing the reset button 68c. executed. This makes it possible to share the ON operation for the setting key inserting portion 68a as the operation for executing the processing related to the setting value. Therefore, it is possible to make the contents of the operation for generating the processing related to the setting value easy for the manager of the game hall to understand.

Further, when the power ON operation of the pachinko machine 10 is performed while the setting key insertion portion 68a is ON-operated by the setting key, and the pressing operation of the reset button 68c is not added, the setting confirmation processing is executed, and the resetting is performed. When the pressing operation of the button 68c is added, set value update processing is executed. This makes it possible to differentiate between the setting confirmation process and the setting value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make it easy for the manager of the game hall to understand the operation contents for executing the desired processing out of the setting confirmation processing and the setting value update processing. In addition, by increasing the number of operations for executing the setting value updating process rather than the setting confirmation process, it is possible to make it particularly difficult to illegally perform the setting value updating process.

Returning to the description of the main processing (FIG. 114), if the processing of step S7911 is executed, if the determination in step S7912 or step S7913 is negative, if the processing of step S7914 is executed, the processing is negative in step S7916 or step S7917. When the determination is made or when the process of step S7918 is executed, the start-up processing flag in the work area 221 for specific control is cleared to "0" (step S7919). By clearing the start-up processing flag to "0", even if the first timer interrupt process is started, the state in which various processes set for the first timer interrupt process are not executed is released. In step S7919, the power failure flag in the work area 221 for specific control is also cleared to "0".

After that, a return command is transmitted to the sound emission control device 81 (step S7920). In the return command, information indicating the number of pending information for the special figure display unit 37a, information indicating the current success or failure lottery mode, information indicating the current support mode, indicating whether the opening and closing execution mode is in the middle of execution information, and information indicating whether or not a game cycle is in progress. These information are set based on the information stored in the work area 221 for specific control. Upon receiving the return command, the sound emission control device 81 changes the display content of the pattern display device 41, the light emission content of the display light emitting unit 53, and the sound output content of the speaker unit 54 to correspond to various information set in the return command. Contents to be done.

Here, when confirming the setting values of the pachinko machine 10, it is necessary to turn on the power of the pachinko machine 10 while turning on the setting key inserting portion 68a with the setting key. Then, for example, when it is necessary to check the set value during execution of the game round, the pachinko machine 10 is turned off during the execution of the game round, and then the setting key insertion portion 68a is operated by the setting key. The power ON operation of the pachinko machine 10 is performed while performing the ON operation. In this case, since backup power is not supplied to the RAM provided in the voice light emission control device 81, at the stage when the pachinko machine 10 is turned off, the RAM of the voice light emission control device 81 is used for the game play. The information for controlling is erased. On the other hand, since backup power is supplied to the main RAM 65 and clear processing of the main RAM 65 is not executed when confirming the setting value, the pachinko machine 10 is turned off during execution of the game round. After that, when the power ON operation of the pachinko machine 10 is performed while the setting key insertion portion 68a is ON-operated by the setting key, after the execution of the setting confirmation processing, the special figure display portion 37a displays the variation of the pattern. will be resumed. Then, a situation occurs in which the pattern display device 41 does not perform the variable display of the pattern even though the special figure display unit 37a performs the variable display of the pattern.

On the other hand, a return command is transmitted to the sound emission control device 81 after the setting confirmation process is completed, and the return command includes information indicating whether or not the game round is being executed. Then, when the sound emission control device 81 receives the return command, the pattern display device 41 starts the variable display of the pattern. As a result, it is possible to prevent the occurrence of a situation in which the pattern display device 41 does not perform the variable display of the pattern even though the variable display of the pattern is performed in the special figure display section 37a. . The variable display of the symbols is performed at a relatively high speed so that each symbol during the variable display becomes indistinguishable or difficult for the player. In addition, the return command does not include the result of the success/failure determination process and the result of the allocation determination process of the game round to be restarted, and does not include information indicating the end timing of the game round to be restarted. Therefore, when the sound emission control device 81 starts the variable display of symbols on the symbol display device 41 based on the return command, if the game round to be restarted corresponds to the loss result, the next game round is started. When a command to start the demo display or a command to start the demonstration display on the pattern display device 41 is received, the variable display of patterns based on the return command is terminated, and the display corresponding to the newly received command is started, and the restart target is restarted. If the game round corresponds to the result of the big win, when the opening command indicating the start of the opening/closing execution mode is received, the variable display of the pattern based on the return command is terminated and the opening performance is started.

Further, when the return command includes information indicating that the opening/closing execution mode is in the process of being executed, the sound emission control device 81 starts a display effect indicating that the opening/closing execution mode is being executed on the pattern display device 41. be done. This makes it possible for the player to recognize that the opening/closing execution mode is being executed.

After that, the remaining processing of steps S7921 to S7924 is performed. In other words, the main CPU 63 is configured to periodically execute the first timer interrupt processing (FIG. 117) and the second timer interrupt processing (FIG. 123). will have a residual time. This remaining time fluctuates according to the processing completion time of each timer interrupt process. Using such irregular time, the remaining process of steps S7921 to S7924 is repeatedly executed. In this regard, it can be said that the remaining processes of steps S7921 to S7924 are irregular processes that are executed irregularly. In steps S7921 to S7924, the same processes as steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

Next, the first timer interrupt processing executed by the main CPU 63 will be described with reference to the flowchart of FIG. As already explained, the first timer interrupt process is started periodically at a period of 4 milliseconds, which is the first interrupt period. Also, the program corresponding to the first timer interrupt process is set as a program for specific control.

First, it is determined whether or not "1" is set in the start-up processing flag in the work area 221 for specific control (step S8201). As already described, the start-up processing flag is set to "1" in step S7903 of the main processing (FIG. 114). If the start-up flag is set to "1" (step S8201: YES), the first timer interrupt process is terminated without executing the various processes of steps S8202 to S8221. As a result, when the supply of operating power to the pachinko machine 10 is started and the main process (FIG. 114) is started, the execution of the first timer interrupt process and the second timer interrupt process is permitted early. Even if there is, various processes for controlling the progress of the game are executed in the first timer interrupt process until the process for starting the supply of operating power is completed and the execution of the process for controlling the progress of the game is permitted. It is possible to prevent it from being executed.

As already described, the start-up processing flag is cleared to "0" in step S7919 when the processing for starting supply of operating power is completed in the main processing (FIG. 114). In the first timer interrupt processing, if the start-up processing flag is not set to "1" (step S8201: NO), the processing from step S8202 is executed.

In steps S8202 to S8219 and S8221, the same processes as steps S3701 to S3719 of the timer interrupt process (FIG. 69) in the fifteenth embodiment are executed. These processes are executed by the main CPU 63 using a program for specific control and data for specific control. In this case, as already described, if it is determined in the main processing (FIG. 114) that the power failure flag is not set to "1" (step S7906: NO) or if it is determined that the checksums do not match (step S7909: NO), the game stop flag in the work area 221 for specific control is set to "1" (step S7910). If the game stop flag is set to "1", the processing of steps S8201 to S8206 is executed in the first timer interrupt process, but the processing of steps S8208 to S8221 is performed by making an affirmative determination in step S8207. don't run As a result, if the power failure flag is not set to "1" because the power failure process was not properly performed at the time of the previous power failure, the progress of the game is stopped, and the specific control The progress of the game is stopped when the checksums do not match due to a change in the storage state of information in at least one of the work area 221 and the stack area 222 for specific control since the last power-off. state. For example, shooting of game balls is prohibited by not executing the process of step S8212. Further, execution of the game cycle and opening/closing execution mode is prohibited by not executing the process of step S8214. In addition, since the processing of step S8218 is not executed, the payout of game balls is prohibited.

On the other hand, even in such a situation where the progress of the game is stopped, power failure monitoring is executed in step S8202, and hit random number counter C1, jackpot type counter C2, and reach random number counter C3 in steps S8203 and S8204. And the random number initial value counter CINI is updated, and further fraud detection is performed in step S8206.

In the first timer interrupt process, setting monitoring process is executed in step S8220. FIG. 118 is a flowchart showing setting monitoring processing. The processing of steps S8301 to S8303 in the setting monitoring processing is executed using the program for specific control and the data for specific control in the main CPU 63. FIG.

By checking the value of the set value counter in the specific control work area 221, it is determined whether or not the set value of the pachinko machine 10 is normal (step S8301). Specifically, if the set value set in the set value counter is one of "setting 1" to "setting 6", it is determined to be normal, and if it is "0" or 7 or more, it is abnormal. Determine that there is.

If the set value is abnormal (step S8301: NO), the game stop flag in the work area 221 for specific control is set to "1" (step S8302), similarly to step S7910 in the main process (FIG. 114). By setting the game stop flag to "1", the process of steps S8208 to S8221 is not executed by making an affirmative determination in step S8207 of the first timer interrupt process (FIG. 117). As a result, when it is specified that the set value is abnormal, the progress of the game is stopped. On the other hand, since the processing of steps S8202 to S8206 in the first timer interrupt processing (FIG. 117) is executed even in the situation where the game stop flag is set to "1", the progress of the game is stopped. Power outage monitoring is executed even in a situation where the winning random number counter C1, jackpot type counter C2, reach random number counter C3 and random number initial value counter CINI are updated, and fraud detection is executed.

After that, an abnormality command indicating that the set value is abnormal is transmitted to the sound emission control device 81 (step S8303). Upon receiving the abnormality command, the sound emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the setting value abnormality, and causes the speaker unit 54 to output the sound "Please change the setting." . Also, the character image "Please change the setting" is displayed on the pattern display device 41. - 特許庁These notifications are maintained until the supply of operating power to the pachinko machine 10 is stopped, and are terminated when the supply of operating power to the pachinko machine 10 is stopped. However, even if the supply of operating power to the pachinko machine 10 is temporarily stopped, the supply of operating power to the pachinko machine 10 resumes until the set value update process (step S7918) of the main process (FIG. 114) is executed. It is also possible to adopt a configuration in which the notification is continued when the

The manager of the game hall confirming the above notification while the progress of the game is stopped temporarily suspends the supply of operating power to the pachinko machine 10, and then restarts the supply of operating power to the pachinko machine 10.例文帳に追加If so, an operation is performed to execute the set value update process (step S7918). As a result, when a setting value abnormality occurs, a new setting value can be set in the setting value update process (step S7918).

Here, the process of monitoring whether or not the set value is abnormal is executed by the first timer interrupt process (FIG. 117) which is started periodically. As a result, it is possible to monitor whether or not the set value is abnormal even while the game is being played. Therefore, it is possible to prevent the game from being continued even though the set value is abnormal. Moreover, the monitoring of whether or not the set value is abnormal is executed each time a monitoring opportunity occurs. This makes it possible to increase the frequency of monitoring whether the set value is abnormal.

The main process (FIG. 114) does not include any process for monitoring whether the set values are normal. If the processing for monitoring whether the set value is normal or not is set in the processing at the start of supply of operating power in the main processing (FIG. 114), the power failure flag and the checksum are set at the start of supply of operating power. In addition to monitoring whether the set values are normal or not, the monitoring load increases. Furthermore, when it is specified that the set value is abnormal at the start of supply of operating power, the RAM clear processing (step S7915) and the set value update processing (step S7918) are executed. becomes complicated. On the other hand, since the main process (FIG. 114) does not include a process for monitoring whether or not the set value is normal, the process configuration for the process at the start of supply of operating power is suitable. It becomes possible to do. Further, even if the process for monitoring whether the set value is normal or not is not set in the process at the start of supply of operating power, as described above, the first timer interrupt process (FIG. 117) Since the setting monitoring process (step S8220) is executed at the same time, if the setting value is abnormal, it can be dealt with.

In the configuration in which the first timer interrupt processing is executed as described above, in this embodiment, as already explained, the second timer interrupt processing (FIG. 123) is performed separately from the first timer interrupt processing (FIG. 117) as the timer interrupt processing. The second timer interrupt process is started by interrupting the first timer interrupt process even during execution of the first timer interrupt process. In this case, although illustration is omitted in the first timer interrupt process, prohibition and permission of timer interrupt process are performed before and after each process of steps S8201 to S8221. For example, the timer interrupt process is prohibited before the lottery random number update process (step S8203) is executed, and the timer interrupt process is permitted after the lottery random number update process (step S8203) is executed. As a result, it is possible to prevent the second timer interrupt processing from being interrupted and started while the random number update processing for lottery is being executed. In addition, the timer interrupt processing is prohibited before executing the special figure special electric control processing (step S8214), and the timer interrupt processing is permitted after the special figure special electric control processing (step S8214) is executed. As a result, it is possible to prevent the second timer interrupt processing from being interrupted and started while the special figure special electric control processing is being executed.

Next, a configuration for controlling the display of various display units by the main CPU 63 will be described. FIG. 119 is a block diagram for explaining the configuration for controlling the display of various display units by the main CPU 63. As shown in FIG.

As targets for which display control is performed by the main side CPU 63, the special figure display unit 37a, the special figure reservation display unit 37b, the general figure display unit 38a, the general figure reservation display unit 38b and the first to fourth notification display devices 201 to 204 exists. Each of these is provided as a segment display portion in which a plurality of segments for display by LEDs are arranged. These segment display portions are in a light-emitting state by setting data corresponding to the light-emitting state (for example, data "1" which is one of the binary data), and data corresponding to the light-off state (for example, binary data). Data of "0", which is the other of the two, is set to turn off the light.

The main control board 61 is provided with a first display circuit 261 corresponding to the special figure display unit 37a, and a second display circuit 262 is provided corresponding to the special figure reservation display unit 37b. A third display circuit 263 is provided in correspondence with the display unit 38a, a fourth display circuit 264 is provided in correspondence with the normal figure reservation display unit 38b, and the first to fourth notification display devices 201 to A fifth display circuit 265 is provided corresponding to 204 . In the eleventh embodiment, the main control board 61 is provided with the first to fourth display ICs 205 to 208 corresponding to the first to fourth notification display devices 201 to 204 one-to-one. However, these first to fourth display ICs 205 to 208 are not provided in this embodiment.

The first display circuit 261 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure display section 37a. As a result, each display segment of the special figure display section 37a becomes a light emitting state or a light emitting state in a mode corresponding to the display data provided to the first display circuit 261. In this case, the first display circuit 261 can store and hold the supplied display data for a predetermined period (for example, 16 milliseconds), but after the predetermined period elapses, the display data gradually become all "0". will approach the state of Therefore, the display segment of the special figure display unit 37a which is in the light emitting state by the display data provided to the first display circuit 261 has passed a predetermined period without new display data being provided to the first display circuit 261 By doing so, the lights gradually turn off. In addition, even if the display content of the special figure display unit 37a is not changed not only when the display content of the special figure display unit 37a is changed by such a configuration, the output processing of the previous display data The same display data as the first display circuit 261 is supplied to the first display circuit 261 .

The number of display segments provided in the special figure display portion 37a is eight. Therefore, 8-bit data is provided to the first display circuit 261 as display data for controlling the display of the special figure display unit 37a.

The second display circuit 262 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure reservation display section 37b. As a result, each display segment of the special figure reservation display section 37b becomes a light emitting state or an extinguished state in a manner corresponding to the display data provided to the second display circuit 262. In this case, the second display circuit 262 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but after the predetermined period elapses, the display data gradually becomes all "0". will approach the state of Therefore, the display segment of the special figure reservation display portion 37b that is in the light emitting state by the display data provided to the second display circuit 262 is not provided with new display data to the second display circuit 262, and a predetermined period of time elapses. As the time elapses, the light is gradually turned off. Also, with such a configuration, not only when the display content of the special figure reservation display unit 37b is changed, but also when the display content of the special figure reservation display unit 37b is not changed, the previous display data The same display data as the output processing time is supplied to the second display circuit 262 .

The number of display segments provided in the special figure reservation display portion 37b is four. Therefore, 4-bit data is provided to the second display circuit 262 as display data for controlling the display of the special figure reservation display unit 37b. However, since the display data is provided in 8-bit units, 8-bit data is provided even when the display data is provided to the second display circuit 262, of which 4 bits are the special figure reservation display section 37b is used as display data for controlling the display.

The third display circuit 263 provides data corresponding to the supplied display data to each of the plurality of display segments of the normal-diagram display section 38a. As a result, each display segment of the normal diagram display section 38a is turned on or off in a manner corresponding to the display data provided to the third display circuit 263. FIG. In this case, the third display circuit 263 can store and hold the supplied display data for a predetermined period (for example, 16 milliseconds), but after the predetermined period elapses, the display data gradually become all "0". will approach the state of Therefore, the display segment of the general pattern display unit 38a which is in the light emitting state due to the display data provided to the third display circuit 263 does not provide new display data to the third display circuit 263, and the predetermined period elapses. By doing so, the lights gradually turn off. In addition, due to such a configuration, even when the display contents of the normal pattern display unit 38a are not changed, as well as when the display contents of the normal pattern display unit 38a are not changed, the previous display data output process The same display data as the first is supplied to the third display circuit 263 .

The number of display segments provided in the normal map display portion 38a is eight. Therefore, 8-bit data is provided to the third display circuit 263 as display data for controlling the display of the normal-diagram display section 38a.

The fourth display circuit 264 provides data corresponding to the supplied display data to each of the plurality of display segments of the normal figure holding display section 38b. As a result, each display segment of the normal pattern holding display portion 38b is turned into a light emitting state or a light emitting state in a manner corresponding to the display data provided to the fourth display circuit 264. FIG. In this case, the fourth display circuit 264 can store and hold the supplied display data for a predetermined period (for example, 16 milliseconds), but after the predetermined period elapses, the display data gradually become all "0". will approach the state of Therefore, the display segment of the normal figure holding display section 38b which is in the light emitting state due to the display data provided to the fourth display circuit 264 does not provide new display data to the fourth display circuit 264 for a predetermined period of time. As the time elapses, the light is gradually turned off. In addition, due to such a configuration, not only when the display contents of the general pattern reservation display unit 38b are changed, but also when the display contents of the general pattern reservation display unit 38b are not changed, the previous display data The same display data as the output processing time is supplied to the fourth display circuit 264 .

The number of segments for display provided in the normal figure reservation display portion 38b is four. Therefore, 4-bit data is provided to the fourth display circuit 264 as display data for controlling the display of the normal map holding display section 38b. However, since the display data is provided in 8-bit units, 8-bit data is provided even when the display data is provided to the fourth display circuit 264, of which 4 bits are used for the general-purpose display unit. 38b is used as display data for controlling the display.

The fifth display circuit 265 provides data corresponding to the supplied display data to each of a plurality of display segments provided in each of the first to fourth notification display devices 201-204. As a result, each display segment of the first to fourth notification display devices 201 to 204 is brought into a light emitting state or a non-lighting state in a mode corresponding to the display data provided to the fifth display circuit 265 . In this case, the fifth display circuit 265 can store and hold the supplied display data for a predetermined period (for example, 16 milliseconds), but after the predetermined period elapses, the display data gradually become all "0". will approach the state of Therefore, the fifth display circuit 265 is provided with new display data for the display segments of the first to fourth notification display devices 201 to 204 which are in the light emitting state due to the display data provided to the fifth display circuit 265. After a predetermined period of time elapses, the light is gradually turned off. In addition, due to such a configuration, not only the display contents of the first to fourth notification display devices 201 to 204 are changed, but also the display contents of the first to fourth notification display devices 201 to 204 are changed. Even if it is not performed, the same display data as the output processing of the previous display data is supplied to the fifth display circuit 265 .

Each of the first to fourth notification display devices 201 to 204 is provided with seven display segments. On the other hand, display data is provided in units of 8 bits. When the display data of the first to fourth notification display devices 201 to 204 are provided to the fifth display circuit 265, the 7-bit display data corresponding to the first notification display device 201 are provided as 8-bit unit data. After that, 7-bit display data corresponding to the second notification display device 202 is provided as 8-bit unit data, and then 7-bit display data corresponding to the third notification display device 203 is provided as 8-bit unit data. Finally, 7-bit display data corresponding to the fourth notification display device 204 is provided as 8-bit unit data.

In the configuration provided with the first to fifth display circuits 261 to 265 as described above, the main CPU 63 supplies display data to the display IC 266 . In other words, the display ICs 266 are not provided in a one-to-one correspondence with the first to fifth display circuits 261 to 265, but one IC is provided so as to be common to all of the first to fifth display circuits 261 to 265. display IC 266 is provided. When supplying display data to the display IC 266, the main CPU 63 also supplies the display IC 266 with type data indicating which of the first to fifth display circuits 261 to 265 the display data corresponds to.

In detail, the electrical connection between the main CPU 63 and the display IC 266 is as follows. It is electrically connected using the line LN4. All of these signal lines LN1 to LN4 are signal lines for transmitting signals from the main side CPU 63 to the display IC 266 by one-way communication.

The type data is transmitted from the main side CPU 63 to the display IC 266 by serial communication using the type data signal line LN1. In this case, each 1-bit division of the type data by serial communication is indicated by the type clock signal transmitted from the main side CPU 63 to the display IC 266 using the type clock signal line LN2. The type data is data indicating which of the first to fifth display circuits 261 to 265 the display data to be transmitted corresponds to. The type data is transmitted as 5-bit data consisting of the 1st bit to the 5th bit. When the display data corresponds to the first display circuit 261, the first bit becomes HI level and the other bits become LOW level. When the display data corresponds to the second display circuit 262, the second bit becomes HI level and the other bits become LOW level. When the display data corresponds to the third display circuit 263, the third bit becomes HI level and the other bits become LOW level. When the display data corresponds to the fourth display circuit 264, the fourth bit becomes HI level and the other bits become LOW level. When the display data corresponds to the fifth display circuit 265, the fifth bit becomes HI level and the other bits become LOW level.

Display data is transmitted by serial communication from the main CPU 63 to the display IC 266 using the display data signal line LN3. In this case, each 1-bit division of display data by serial communication is indicated by a display clock signal transmitted from the main side CPU 63 to the display IC 266 using the display clock signal line LN4. The display data is transmitted in 8-bit units of 1st to 8th bits.

The main CPU 63 transmits display data corresponding to each of the first to fifth display circuits 261 to 265 to the display IC 266 in second timer interrupt processing (FIG. 123), which will be described later. In this case, in one processing cycle of the second timer interrupt processing, display data is transmitted to one of the first to fifth display circuits 261 to 265, and the nth display circuit→n+1th display is performed. The display circuits 261 to 265 to which the display data is to be transmitted are changed one by one each time a new processing cycle of the second timer interrupt processing occurs according to the circuit order. In addition, in the second timer interrupt processing in the processing cycle next to the processing cycle in which the display data corresponding to the fifth display circuit 265, which is the last sequence in the order, is transmitted, the first display circuit 261, which is the first sequence in the above sequence, Send the corresponding display data. In addition, only one 8-bit unit display data is transmitted in the processing cycle of the second timer interrupt processing for transmitting display data to any one of the first to fourth display circuits 261 to 264, but the fifth display circuit 265 In the processing cycle of the second timer interrupt processing for transmitting display data to , four 8-bit unit display data are transmitted corresponding to the number of the first to fourth notification display devices 201 to 204 .

In the configuration in which the main CPU 63 transmits display data as described above, the work area 221 for specific control and the work area 223 for non-specific control are various storage areas referred to by the main CPU 63 in order to transmit display data. is set. FIG. 120(a) is an explanatory diagram for explaining various buffers 271 to 275 provided in the work area 221 for specific control, and FIG. 120(b) is a FIG. 4 is an explanatory diagram for explaining various storage areas 234 and 276;

As shown in FIG. 120(a), the specific control work area 221 includes a first display data buffer 271, a second display data buffer 272, a third display data buffer 273, a fourth display data buffer 274, A fifth display data buffer 275 is provided.

Display data to be supplied to the first display circuit 261 is stored in the first display data buffer 271 . Since the first display circuit 261 is provided corresponding to the special figure display section 37a as already explained, the first display data buffer 271 has display data for causing the special figure display section 37a to perform a predetermined display. will be stored. In this case, the display data is stored in the first display data buffer 271 in the display control process (step S8216) based on the contents of the special figure special electric control process (step S8214) in the first timer interrupt process (FIG. 117). . When the second timer interrupt process (FIG. 123) for transmitting display data to the first display circuit 261 comes to process, only when the display data stored in the first display data buffer 271 is changed. Instead, the display data stored in the first display data buffer 271 is transmitted to the display IC 266 even if the display data has not been changed.

Display data to be supplied to the second display circuit 262 is stored in the second display data buffer 272 . Since the second display circuit 262 is provided corresponding to the special figure reservation display section 37b as already explained, the second display data buffer 272 displays the special figure reservation display section 37b for performing a predetermined display. data will be stored. In this case, the storage of the display data in the second display data buffer 272 is performed in the display control process (step S8216) based on the contents of the special figure special electric control process (step S8214) in the first timer interrupt process (FIG. 117). . When the second timer interrupt process (FIG. 123) for transmitting display data to the second display circuit 262 comes to process, only when the display data stored in the second display data buffer 272 is changed. Instead, the display data stored in the second display data buffer 272 is transmitted to the display IC 266 even if the display data has not been changed.

Display data to be supplied to the third display circuit 263 is stored in the third display data buffer 273 . Since the third display circuit 263 is provided corresponding to the normal map display section 38a as already explained, the third display data buffer 273 stores display data for causing the normal map display section 38a to perform a predetermined display. will be stored. In this case, the display data is stored in the third display data buffer 273 in the display control process (step S8216) based on the contents of the normal/universal power control process (step S8215) in the first timer interrupt process (FIG. 117). will be When the second timer interrupt process (FIG. 123) for transmitting display data to the third display circuit 263 comes to process, only when the display data stored in the third display data buffer 273 is changed. Instead, the display data stored in the third display data buffer 273 is transmitted to the display IC 266 even if the display data has not been changed.

Display data to be supplied to the fourth display circuit 264 is stored in the fourth display data buffer 274 . Since the fourth display circuit 264 is provided corresponding to the normal pattern reservation display section 38b as already explained, the fourth display data buffer 274 displays a display for causing the normal pattern reservation display section 38b to perform a predetermined display. data will be stored. In this case, the display data is stored in the fourth display data buffer 274 in the display control process (step S8216) based on the contents of the normal/universal power control process (step S8215) in the first timer interrupt process (FIG. 117). will be When the second timer interrupt process (FIG. 123) for transmitting display data to the fourth display circuit 264 comes to process, only when the display data stored in the fourth display data buffer 274 is changed. Instead, the display data stored in the fourth display data buffer 274 is transmitted to the display IC 266 even if the display data has not been changed.

Display data to be supplied to the fifth display circuit 265 is stored in the fifth display data buffer 275 . Since the fifth display circuit 265 is provided corresponding to the first to fourth notification display devices 201 to 204 as already described, the fifth display data buffer 275 stores the first to fourth notification display devices 201 204 to perform a predetermined display is stored. When it is time to process the second timer interrupt process for transmitting display data to the fifth display circuit 265, not only when the display data stored in the fifth display data buffer 275 is changed, but also when the display data is not changed, the display data stored in the fifth display data buffer 275 is transmitted to the display IC 266 .

Here, the display corresponding to the management result of the game history is performed on the first to fourth notification display devices 201 to 204, and the setting confirmation process (FIG. 115) or the setting value update process (FIG. 116) is executed. If so, the display corresponding to the current set value is performed. In this case, since the fifth display data buffer 275 is provided in the work area 221 for specific control, the process of storing the display data in the fifth display data buffer 275 is performed as a process corresponding to the specific control. On the other hand, the process for deriving the management result of the game history is performed as a process corresponding to non-specific control, and the 61st to 68th parameters, which are the management result of the game history, are displayed on the first to fourth notification display devices. 201 to 204 are sequentially displayed.

Therefore, as shown in FIG. 120(b), the non-specific control work area 223 includes not only the calculation result storage area 234 for storing the 61st to 68th parameters, but also the 61st to 68th parameters. A display target setting area 276 is provided for storing parameters to be displayed on the first to fourth notification display devices 201 to 204 among them. Even in this embodiment, as in the fifteenth embodiment, the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Each time a second elapses, the calculation results of the parameters to be displayed are read from the calculation result storage area 234 according to a predetermined display order, and the read parameter calculation results are stored in the display target setting area 276. be. Then, when the game history management result is displayed on the first to fourth notification display devices 201 to 204, in the second timer interrupt processing (FIG. 123) which is processing corresponding to specific control, , the display data stored in the display object setting area 276 is read, and the read display data is stored in the fifth display data buffer 275 .

On the other hand, when the setting confirmation process (FIG. 115) is being executed, the first to fourth notification displays are displayed in the second timer interrupt process (FIG. 123), which is the process corresponding to the specific control. Display data for displaying the status of confirming the current set values of the pachinko machine 10 in the devices 201 to 204 and displaying the current set values of the pachinko machine 10 are performed. It is stored in the display data buffer 275 . In addition, when the set value update process (Fig. 116) is being executed, the first to fourth information display The fifth display data is the display data for displaying that the setting values of the pachinko machine 10 are being updated in the devices 201 to 204 and displaying the current setting values of the pachinko machine 10. Stored in buffer 275 .

In the configuration in which the first to fifth display data buffers 271 to 275 are provided as described above, the main CPU 63 outputs the display data corresponding to each processing cycle of the second timer interrupt processing (FIG. 123). The display data is read out from the buffers 271-275, the read display data is transmitted to the display IC 266, and the type data indicating to which of the first to fifth display circuits 261-265 the display data corresponds. It transmits to display IC266. FIG. 121 is an explanatory diagram for explaining the electrical configuration of the display IC 266. As shown in FIG.

The display IC 266 includes a type data buffer 281, a selection signal output section 282, a display data buffer 283, and a display data output section 284, as shown in FIG. Display data received from the main CPU 63 is stored in the display data buffer 283 . The display data output unit 284 transmits the display data stored in the display data buffer 283 to the first to fifth display circuits 261-265. The type data buffer 281 stores the type data received from the main side CPU 63 . The selection signal output unit 282 outputs a selection signal for designating the display circuit 261 to 265 corresponding to the type data stored in the type data buffer 281 among the first to fifth display circuits 261 to 265 as the reception destination of the display data. to output

Specifically, as shown in FIG. 119, the display IC 266 and the first display circuit 261 are electrically connected using a display signal group 291 . The display signal group 291 is provided so as to enable 8-bit display data to be transmitted at once, and the 8-bit display data is transmitted from the display IC 266 by parallel communication. A branch signal group 292 is provided by branching from the display signal group 291 , and the branch signal group 292 includes a second display circuit 262 , a third display circuit 263 , a fourth display circuit 264 and a fifth display circuit 265 . are electrically connected to each of the Similar to the display signal group 291, the branch signal group 292 is provided so as to enable 8-bit display data to be transmitted at once, and the 8-bit display data is transmitted from the display IC 266 by parallel communication. be.

Since the display signal group 291 and the branch signal group 292 are provided as described above, when the display data stored in the display data buffer 283 is transmitted by the display data output unit 284, the display data is transferred to the first display data. to all of the fifth display circuits 261 to 265. In this case, first to fifth selection signal lines 301 to 305 are provided to receive the supplied display data and specify the display circuits 261 to 265 to be used.

The first selection signal line 301 is provided to electrically connect the display IC 266 and the first display circuit 261 . When the type data corresponding to the first display circuit 261 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the first display circuit 261 and used. , the selection signal output unit 282 of the display IC 266 transmits the first selection signal to the first display circuit 261 through the first selection signal line 301 . As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and branch signal group 292 are received and used only by the first display circuit 261 .

A second selection signal line 302 is provided to electrically connect the display IC 266 and the second display circuit 262 . When the type data corresponding to the second display circuit 262 is stored in the type data buffer 281, the second display circuit 262 receives and uses the display data supplied from the display data output unit 284. , the selection signal output unit 282 of the display IC 266 transmits the second selection signal to the second display circuit 262 through the second selection signal line 302 . As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and branch signal group 292 are received and used only by the second display circuit 262 .

A third selection signal line 303 is provided to electrically connect the display IC 266 and the third display circuit 263 . When the type data corresponding to the third display circuit 263 is stored in the type data buffer 281, the third display circuit 263 receives and uses the display data supplied from the display data output unit 284. , the selection signal output unit 282 of the display IC 266 transmits the third selection signal to the third display circuit 263 through the third selection signal line 303 . As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and branch signal group 292 are received and used only by the third display circuit 263 .

A fourth selection signal line 304 is provided to electrically connect the display IC 266 and the fourth display circuit 264 . When the type data corresponding to the fourth display circuit 264 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the fourth display circuit 264 and used. , the selection signal output unit 282 of the display IC 266 transmits the fourth selection signal to the fourth display circuit 264 through the fourth selection signal line 304 . As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and branch signal group 292 are received and used only by the fourth display circuit 264 .

A fifth selection signal line 305 is provided to electrically connect the display IC 266 and the fifth display circuit 265 . When the type data corresponding to the fifth display circuit 265 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the fifth display circuit 265 and used. , the selection signal output unit 282 of the display IC 266 transmits the fifth selection signal to the fifth display circuit 265 through the fifth selection signal line 305 . As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and branch signal group 292 are received and used only by the fifth display circuit 265 .

FIG. 122 shows how the main CPU 63 transmits the type data and the display data to the display IC 266 and how the display data transmitted from the display IC 266 is received by the first display circuit 261 or the second display circuit 262. It is a time chart. 122(a) shows the transmission period of the type data signal from the main side CPU 63 to the display IC 266, FIG. 122(b) shows the transmission period of the type clock signal from the main side CPU 63 to the display IC 266, and FIG. ) shows the transmission period of the display data signal from the main side CPU 63 to the display IC 266, FIG. 122(d) shows the transmission period of the display clock signal from the main side CPU 63 to the display IC 266, and FIG. to the first display circuit 261, FIG. 122(f) shows the transmission period of the second selection signal from the display IC 266 to the second display circuit 262, and FIG. It shows the transmission period of display data from the display IC 266 to the first to fifth display circuits 261 to 265. FIG. The same applies to the case where the third to fifth display circuits 263 to 265 receive the display data.

Type data from the main side CPU 63 to the display IC 266 at the timing of t1 after the supply of operating power to the pachinko machine 10 including the main side CPU 63, the display IC 266 and the first to fifth display circuits 261 to 265 is started. and transmission of display data is started. Specifically, as shown in FIG. 122(b), pulse type clock signals are transmitted at timings t1, t2, t3, t4, and t5. As shown in (a), the pulse type data signal is transmitted in correspondence with the transmission of the pulse type clock signal at the timing t1. As a result, information corresponding to the first display circuit 261 is stored in the type data buffer 281 of the display IC 266 .

Further, as shown in FIG. 122(d), pulse-like display clocks are generated at timings t1, t2, t3, t4, t5, t6, t7 and t8. As shown in FIG. 122(c), a pulsed display data signal is generated corresponding to the transmission of the pulsed display clock signal at timings t2, t3, t5, and t7. is sent. As a result, the display data buffer 283 of the display IC 266 stores the display data corresponding to the information format.

Then, at timing t9, as shown in FIG. 122(d), the transmission of the display clock signal for the 8th bit is completed, and at timing t9, as shown in FIG. The selection signal output unit 282 of the display IC 266 starts transmitting the first selection signal to the first display circuit 261 corresponding to the stored type data, and at the timing of t9, as shown in FIG. Then, the display data output unit 284 of the display IC 266 starts transmitting the display data stored in the display data buffer 283 . As a result, the display data is received and used by the first display circuit 261 .

After that, at the timing of t10, as shown in FIGS. 122(a) to 122(d), transmission of the type data and the display data from the main side CPU 63 to the display IC 266 is newly started. In this case, at the timing of t10, transmission of the first selection signal from the display IC 266 to the first display circuit 261 is stopped as shown in FIGS. Transmission of display data to the first to fifth display circuits 261 to 265 is stopped.

In detail, as shown in FIG. 122(b), pulse-like type clocks are generated at timings t10, t11, t12, t13, and t14 as shown in FIG. 122(b). Along with the transmission of the signal, a pulse type data signal is transmitted corresponding to the transmission of the pulse type type clock signal at the timing t11 as shown in FIG. 122(a). As a result, information corresponding to the second display circuit 262 is stored in the type data buffer 281 of the display IC 266 .

Also, as shown in FIG. 122(d), pulse-like display clocks are generated at timings t10, t11, t12, t13, t14, t15, t16 and t17. As shown in FIG. 122(c), as shown in FIG. 122(c), it corresponds to the transmission of pulsed display clock signals at timings t10, t11, t12, t15, t16 and t17. Then, a pulsed display data signal is transmitted. As a result, the display data buffer 283 of the display IC 266 stores the display data corresponding to the information format.

Then, at the timing of t18, as shown in FIG. 122(d), the transmission of the display clock signal of the 8th bit is completed, so that the data is stored in the type data buffer 281 as shown in FIG. 122(f) at the timing of t18. Transmission of the second selection signal is started by the selection signal output unit 282 of the display IC 266 toward the second display circuit 262 corresponding to the selected type data, and at the timing of t18, as shown in FIG. Transmission of the display data stored in the display data buffer 283 by the display data output unit 284 of the display IC 266 is started. As a result, the display data is received and used by the second display circuit 262 .

For the first to fourth display circuits 261 to 264, only one piece of display data is transmitted in the second timer interrupt processing (FIG. 123) to which display data is to be transmitted. In the second timer interrupt process (FIG. 123) to which the display data is to be transmitted, four pieces of display data are transmitted corresponding to the number of the first to fourth notification display devices 201 to 204. FIG. As already explained, the second timer interrupt processing (Fig. 123) is started at the second interrupt period (specifically, 2 milliseconds). Each processing time is set so that one processing is completed within the second interrupt period.

With the above configuration, it is possible to transmit display data to a plurality of display circuits 261 to 265 using one display IC 266 . Here, as already explained, each of the first to fifth display circuits 261 to 265 can store and hold the provided display data for a predetermined period (for example, 16 milliseconds), but the predetermined period has elapsed. Then, the display data gradually approaches the state of all "0". In this case, if the reception of display data in each display circuit 261 to 265 exceeds a predetermined period, the special figure display unit 37a, the special figure reservation display unit 37b, the general figure display unit 38a, the general figure reservation display unit 38b and the Even if the display contents are not changed in the first to fourth notification display devices 201 to 204, the display segments that are in the light emitting state will temporarily approach the extinguished state, and as a result, the light in the display segments will be reduced. blinking may occur. On the other hand, in this embodiment, apart from the first timer interrupt process (FIG. 117) started at the first interrupt period (specifically, 4 milliseconds), the second interrupt process, which is shorter than the first interrupt period, is executed. A second timer interrupt process (FIG. 123) that is started at a cycle (specifically, 2 milliseconds) is set, and transmission of display data to the display IC 266 is performed collectively in the second timer interrupt process. .

The second timer interrupt processing will be described below with reference to the flowchart of FIG. The processes of steps S8401 to S8413 in the second timer interrupt process are executed using the specific control program and specific control data in the main CPU 63. FIG.

First, interrupt inhibition is set to inhibit the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8401). By prohibiting the generation of the first timer interrupt process (Fig. 117), the first timer interrupt process (Fig. 117) interrupts the second timer interrupt process (Fig. 123) even if the first interrupt cycle has passed. It is possible to prevent it from being started with In addition, by prohibiting the occurrence of the second timer interrupt processing (FIG. 123), even if the second interrupt cycle has passed during execution of the second timer interrupt processing (FIG. 123), the second timer interrupt It is possible to prevent the process (FIG. 123) from being started redundantly.

Thereafter, it is determined whether or not the setting update display flag in the work area 221 for specific control is set to "1" (step S8402). The setting update display flag is a flag for the main CPU 63 to specify whether or not the setting value update process (FIG. 116) is being executed by the main CPU 63 . As already explained, the set value update process (FIG. 116) is executed in the main process (FIG. 114) when the supply of operating power to the main CPU 63 is started. However, since the second timer interrupt process (FIG. 123) is started by interrupting even when the process for starting supply of the operating power is being executed, the main CPU 63 sets Even if the value update process (FIG. 116) is being executed, the second timer interrupt process (FIG. 123) is interrupted and activated.

The situation in which "1" is set in the setting update display flag means that the setting value update process (FIG. 116) is being executed by the main side CPU 63 during the second timer interrupt process (FIG. 123) this time. It means that it is a processing time that was started by interrupting the situation. If an affirmative determination is made in step S8402, setting processing to the fifth display data buffer 275 during setting update is executed (step S8403). In the setting process, a display indicating that the setting value of the pachinko machine 10 is being updated and a display indicating the current setting value of the pachinko machine 10 are displayed on the first to fourth notification display devices 201 to 204. Display data to be displayed is stored in the fifth display data buffer 275 .

When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 display the description of FIG. 124(a). The display shown in the figure is performed. Specifically, when the first to fourth notification display devices 201 to 204 display that the setting values are being updated, the first to fourth notification display devices 201 to 204 In each, at least one display segment is in a luminous state. In other words, each of the first to fourth notification display devices 201 to 204 enters the display state. As a result, even when the display indicating that the setting value is being updated is performed, the game hall can confirm that the first to fourth notification display devices 201 to 204 are not out of order. The administrator can grasp it. Even when the management result of the game history is displayed, at least one display segment in each of the first to fourth information display devices 201 to 204 is in a light emitting state, and the first to fourth information display devices are displayed. Each of the display devices 201 to 204 enters the display state.

Details of the display contents of each of the first to fourth notification display devices 201 to 204 are as follows. becomes. Even when the game history management results are displayed on the first to fourth notification display devices 201 to 204, the center display segment of the first notification display device 201 can be in a light emitting state. The display contents of the first notification display device 201 when the management result of the game history is displayed does not include the display contents in which one display segment in the center is in a light-emitting state and the remaining display segments are in a light-out state. not As a result, the display content of the first notification display device 201 in the situation where the set value is being updated can be displayed as the game history while using the display segment that can be in the light emitting state even when the management result of the game history is displayed. It is possible to display content that is not displayed in the management result of

In the second notification display device 202, similarly to the first notification display device 201, one center display segment is in a light emitting state and the remaining display segments are in a non-lighting state. Even when the management result of the game history is displayed on the first to fourth information display devices 201 to 204, the center one display segment in the second information display device 202 can be in a light emitting state, The display contents of the second notification display device 202 when the management result of the game history is displayed does not include display contents in which one display segment in the center is in a light-emitting state and the remaining display segments are in a light-out state. not As a result, the display content of the second notification display device 202 in the situation where the setting value is being updated is displayed as the game history while using the display segment that can be in the light emitting state even when the management result of the game history is displayed. It is possible to display content that is not displayed in the management result of

In the third notification display device 203, some of the display segments are in a luminous state and the rest of the display segments are in a non-lit state so that the character "H" is displayed. In this case, the display segments that are in the luminous state can be in the luminous state even when the management results of the game history are displayed on the first to fourth notification display devices 201 to 204. The display content of the third notification display device 203 when displayed does not include the display content in which the letter "H" is displayed. As a result, even when the management result of the game history is displayed, the display content of the third notification display device 203 in the situation where the setting value is updated is displayed while using the display segment that can be in the light emitting state. It is possible to display content that is not displayed in the management result of Further, the display content of the third notification display device 203 when the set value is being checked does not include the display content in which the letter "H" is displayed. Thus, by displaying "H" on the third notification display device 203, it is possible to notify the manager of the game hall that the setting value is being updated.

In the fourth notification display device 204, some display segments are in a light emitting state and the remaining display segments are in a non-lighting state so that display corresponding to the current set value is performed. In the case of FIG. 124(a), the current set value is "setting 2", so "2" corresponding to "setting 2" is displayed on the fourth display device 204 for notification. By confirming the fourth notification display device 204, the manager of the gaming hall can grasp the current set values. It should be noted that the display contents of the fourth notification display device 204 when the set value is being updated can be displayed both when the management result of the game history is displayed and when the set value is being checked.

Returning to the description of the second timer interrupt processing (FIG. 123), if a negative determination is made in step S8402, it is determined whether or not the setting confirmation display flag in the work area 221 for specific control is set to "1". (Step S8404). The setting confirmation display flag is a flag for the main side CPU 63 to specify whether or not the setting confirmation process (FIG. 115) is being executed by the main side CPU 63 . As already explained, the setting confirmation process (FIG. 115) is executed in the main process (FIG. 114) when the supply of operating power to the main CPU 63 is started. However, since the second timer interrupt process (FIG. 123) is started by interrupting even when the process for starting supply of the operating power is being executed, the main CPU 63 sets Even if the confirmation process (FIG. 115) is being executed, the second timer interrupt process (FIG. 123) is interrupted and activated.

The situation in which the setting confirmation display flag is set to "1" means that the main side CPU 63 is executing the setting confirmation process (FIG. 115) during the second timer interrupt process (FIG. 123). It means that it is a processing time that was started by interrupting the situation. If an affirmative determination is made in step S8404, setting processing to the fifth display data buffer 275 during setting confirmation is executed (step S8405). In the setting process, a display indicating that the setting value of the pachinko machine 10 is being confirmed on the first to fourth notification display devices 201 to 204 and a display indicating the current setting value of the pachinko machine 10 are displayed. Display data to be displayed is stored in the fifth display data buffer 275 .

When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 display the description of FIG. 124(b). The display shown in the figure is performed. Specifically, when the first to fourth notification display devices 201 to 204 display that the setting values are being updated, the first to fourth notification display devices 201 to 204 In each, at least one display segment is in a luminous state. In other words, each of the first to fourth notification display devices 201 to 204 enters the display state. As a result, even when the display indicating that the setting value is being confirmed is being performed, the game hall can confirm that the first to fourth notification display devices 201 to 204 are not out of order. The administrator can grasp it.

Details of the display contents of each of the first to fourth notification display devices 201 to 204 are as follows. becomes. Even when the game history management results are displayed on the first to fourth notification display devices 201 to 204, the center display segment of the first notification display device 201 can be in a light emitting state. The display contents of the first notification display device 201 when the management result of the game history is displayed does not include the display contents in which one display segment in the center is in a light-emitting state and the remaining display segments are in a light-out state. not As a result, even when the management result of the game history is displayed, the display contents of the first notification display device 201 in the situation where the setting value is being checked are displayed while using the display segment that can be in the light emitting state. It is possible to display content that is not displayed in the management result of

In the second notification display device 202, similarly to the first notification display device 201, one center display segment is in a light emitting state and the remaining display segments are in a non-lighting state. Even when the management result of the game history is displayed on the first to fourth information display devices 201 to 204, the center one display segment in the second information display device 202 can be in a light emitting state, The display contents of the second notification display device 202 when the management result of the game history is displayed does not include display contents in which one display segment in the center is in a light-emitting state and the remaining display segments are in a light-out state. not As a result, the display content of the second notification display device 202 in the situation where the set value is being checked is displayed as the game history while using the display segment that can be in the light emitting state even when the management result of the game history is displayed. It is possible to display content that is not displayed in the management result of

Here, the display contents of the first notification display device 201 and the second notification display device 202 are the same regardless of whether the setting value is being updated or the setting value is being confirmed. As a result, the first notification display device 201 and the second notification display device 202 indicate that the display objects on the first to fourth notification display devices 201 to 204 are not the game history management results but the set values. By the display of , it is possible to clearly notify the manager of the game hall.

In the third notification display device 203, some of the display segments are in a light emitting state and the rest of the display segments are in a non-lighting state so that the letter "k" is displayed. In this case, the display segments that are in the luminous state can be in the luminous state even when the management results of the game history are displayed on the first to fourth notification display devices 201 to 204. The display content of the third notification display device 203 when displayed does not include the display content in which the letter "k" is displayed. As a result, even when the management result of the game history is displayed, the display content of the third notification display device 203 in the situation where the set value is being confirmed is displayed as the game history while using the display segment that can be in the light emitting state. It is possible to display content that is not displayed in the management result of Further, while "H" is displayed on the third notification display device 203 when the setting value is being updated, "k" is displayed on the third notification display device 203 when the setting value is being checked. ” is displayed. As a result, by confirming the display contents of the third notification display device 203, the manager of the game hall is notified of whether the setting value is being updated or the setting value is being confirmed. becomes possible.

In the fourth notification display device 204, some display segments are in a light emitting state and the remaining display segments are in a non-lighting state so that display corresponding to the current set value is performed. In the case of FIG. 124(b), the current set value is "setting 2", so "2" corresponding to "setting 2" is displayed on the fourth display device 204 for notification. By confirming the fourth notification display device 204, the manager of the gaming hall can grasp the current set value. Note that the display contents of the fourth notification display device 204 when the set value is being checked can be displayed both when the management result of the game history is displayed and when the set value is being updated.

Returning to the description of the second timer interrupt processing (FIG. 123), if a negative determination is made in step S8404, setting processing to the fifth display data buffer 275 in normal mode is executed (step S8406). In this case, information is read from the display target setting area 276 in the work area 223 for non-specific control, and parameters corresponding to the read information are displayed on the first to fourth notification display devices 201 to 204. Display data is stored in the fifth display data buffer 275 . By transmitting the display data to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 calculate the currently displayed parameters among the 61st to 68th parameters. Results are displayed.

When the processing of step S8403, step S8405, or step S8406 is executed, the transmission state of signals through the type data signal line LN1 and the type clock signal line LN2 is turned off (step S8407), and the display data signal line LN3 and the display data signal line LN3 are turned off. The signal transmission state through the clock signal line LN4 is turned off (step S8408). Thereafter, update processing of the type counter provided in the work area 221 for specific control is executed (step S8409).

The type counter is a counter for the main side CPU 63 to specify the transmission target of the display data among the first to fifth display data buffers 271 to 275 in the current processing of the second timer interrupt processing. When the type counter value is "1", the display data in the first display data buffer 271 is to be transmitted, and when the type counter value is "2", the display data in the second display data buffer 272 is to be transmitted. When the type counter value is "3", the display data in the third display data buffer 273 is to be transmitted, and when the type counter value is "4", the display data in the fourth display data buffer 274 is When the data is to be transmitted and the value of the type counter is "5", the display data in the fifth display data buffer 275 is to be transmitted. In the updating process of the type counter, 1 is added to the value of the type counter, and when the value of the type counter after the addition of 1 exceeds the upper limit value of "5", the value of the type counter is set to "1". . As a result, the transmission target of the display data is sequentially changed in the first to fifth display data buffers 271 to 275 for each processing of the second timer interrupt processing.

After that, the type data corresponding to the value of the type counter is read from the main ROM 64 (step S8410). Specifically, when the value of the type counter is "1", the type data corresponding to the first display circuit 261 is read from the main ROM 64, and when the value of the type counter is "2", the second The type data corresponding to the display circuit 262 is read from the main ROM 64, and when the value of the type counter is "3", the type data corresponding to the third display circuit 263 is read from the main ROM 64, and the value of the type counter is read. When the value of the type counter is "4", the type data corresponding to the fourth display circuit 264 is read from the main ROM 64. Read from the side ROM 64 .

After that, display data is read from the display data buffers 271 to 275 corresponding to the value of the type counter (step S8411). Specifically, when the type counter value is "1", the display data is read from the first display data buffer 271, and when the type counter value is "2", the display data is read from the second display data buffer 272. When the type counter value is "3", the display data is read from the third display data buffer 273, and when the type counter value is "4", the display data is read from the fourth display data buffer 274. When the display data is read and the value of the type counter is "5", the display data is read from the fifth display data buffer 275 .

Thereafter, transmission processing of various signals is executed (step S8412). In the transmission process, signals are output to the type data signal line LN1 and the type clock signal line LN2 so that the type data read out in step S8410 is transmitted to the display IC 266. FIG. Also, in the transmission process, signals are output to the display data signal line LN3 and the display clock signal line LN4 so that the display data read out in step S8411 is transmitted to the display IC 266. FIG.

Thereafter, interrupt permission is set to permit the generation of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8413).

According to this embodiment detailed above, the following excellent effects are obtained.

When the power supply of the pachinko machine 10 is turned on while the setting key insertion portion 68a is turned on by the setting key without pressing the reset button 68c, supply of operating power to the main side CPU 63 is started. When the main process (FIG. 114) is started, the reset button 68c is not pressed and the setting key insertion portion 68a is ON, and the main process is executed to allow the game to proceed. The setting confirmation process is executed in the situation where the process at the time of supply start of the operating power is being executed, which is the situation before the power supply is started. As a result, it is possible to make it difficult to perform an act of illegally checking the set value.

Assuming that the setting value is confirmed while the game is continuing to progress, for example, if the setting value is confirmed during the execution of the game, There is a risk that the transition to the open/close execution mode may occur at In this case, there is a possibility that the game ball cannot be shot toward the special electric prize winning device 32 even though the opening/closing execution mode has been started. In addition, if the setting value is confirmed during execution of the opening/closing execution mode, the opening/closing execution mode will proceed under the condition that the setting value is being confirmed. There is a risk that the game ball cannot be shot toward the target.

Assuming that the progress of the game is stopped when the setting value is confirmed, if the confirmation of the setting value is started while the game is being played, the progress of the game is stopped in the middle. This may complicate the process for For example, if confirmation of a set value is started during execution of a game round and the progress of the game is to be stopped in the middle, processing for stopping the game round in the middle is required. In this case, when confirmation of the set values is started, the variable display of the symbols in the symbol display device 41 is stopped halfway, and when the confirmation of the set values is completed, the variable display of the symbols in the symbol display device 41 is restarted. To do so would require more complicated processing. Further, for example, if confirmation of set values is started during execution of the opening/closing execution mode and the progress of the game is to be stopped in the middle, processing for stopping the opening/closing execution mode in the middle is required. Also, if confirmation of the set value is started during execution of the variable display of the pattern in the normal pattern display section 38a and the progress of the game is to be stopped in the middle, processing for stopping the variable display of the pattern in the middle is performed. necessary. In addition, if confirmation of the set value is started during execution of the open execution state of the general electric accessory 34a and the progress of the game is to be stopped in the middle, processing for stopping the open execution state in the middle is required. Become. On the other hand, it is also conceivable to wait until all the games are completed before confirming the set value. It is necessary to wait until none of the release execution states of the object 34a is executed, and there is a possibility that the waiting time until confirmation of the setting value is started becomes long.

On the other hand, when the supply of operating power to the main CPU 63 is started, which is the situation before the process for enabling the progress of the game is executed in the main process executed when the supply of the operating power to the main CPU 63 is started. Since the setting confirmation process is executed while the process is being executed, the setting value is confirmed while the progress of the game is already stopped. As a result, it is possible to prevent the setting values from being checked while the game is in progress, and to stop the progress of the game midway or stop the progress of the game when checking the setting values. There is no need to wait until the confirmation of the set value. Therefore, it is possible to appropriately confirm the setting value.

By turning on the power of the pachinko machine 10 while pressing the reset button 68c, the supply of operating power to the main side CPU 63 is started and the main process (FIG. 114) is started. is pressed, and RAM clear processing (step S7915) is executed regardless of whether or not the setting key insertion portion 68a is turned on. As a result, the operation content of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clearing process (step S7915), and the RAM clearing process (step S7915). It is possible to make the content of the operation for generating is easy to understand for the manager of the game hall.

Even if the RAM clearing process (step S7915) is executed, the set value counter in the work area 221 for specific control is not cleared to "0" and the information of the set value counter is not changed. This makes it possible to prevent the setting values from being changed even if the RAM clearing process (step S7915) is executed.

Not only is the power of the pachinko machine 10 turned on while pressing the reset button 68c, but also the power of the pachinko machine 10 is turned on while operating the setting key insertion portion 68a with the setting key. Not only the clearing process (step S7915) but also the setting value updating process (step S7918) is executed. Also, as already explained, the setting confirmation processing (step S7914) is performed based on the power ON operation of the pachinko machine 10 while the setting key inserting portion 68a is ON-operated by the setting key without pressing the reset button 68c. is executed. This makes it possible to share the ON operation for the setting key inserting portion 68a as the operation for executing the processing related to the setting value. Therefore, it is possible to make the contents of the operation for generating the processing related to the setting value easy for the manager of the game hall to understand.

When the power of the pachinko machine 10 is turned on while the setting key inserting portion 68a is turned on by the setting key, and when the reset button 68c is not pressed, a setting confirmation process is executed and the reset button is pressed. When the pressing operation of 68c is added, set value update processing is executed. This makes it possible to differentiate between the setting confirmation process and the setting value update process to be executed depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make it easy for the manager of the game hall to understand the operation contents for executing the desired process out of the setting confirmation process and the setting value update process. Further, by increasing the number of operations for executing the setting value updating process rather than the setting confirmation process, it is possible to make it particularly difficult to illegally perform the setting value updating process.

A process for monitoring whether or not the set value is abnormal is executed by the first timer interrupt process (FIG. 117) which is started periodically. As a result, it is possible to monitor whether or not the set value is abnormal even while the game is being played. Therefore, it is possible to prevent the game from being continued even though the set value is abnormal.

Monitoring as to whether or not the set value is abnormal is executed each time a monitoring trigger occurs. More specifically, it is executed each time the first timer interrupt process (FIG. 117) is activated. This makes it possible to increase the frequency of monitoring whether the set value is abnormal.

The main process (FIG. 114) does not include any process for monitoring whether the set values are normal. If the processing for monitoring whether the set value is normal or not is set in the processing at the start of supply of operating power in the main processing (FIG. 114), the power failure flag and the checksum are set at the start of supply of operating power. In addition to monitoring whether the set values are normal or not, the monitoring load increases. Furthermore, when it is specified that the set value is abnormal at the start of supply of operating power, the RAM clear processing (step S7915) and the set value update processing (step S7918) are executed. becomes complicated. On the other hand, since the main process (FIG. 114) does not include a process for monitoring whether or not the set value is normal, the process configuration for the process at the start of supply of operating power is suitable. It becomes possible to do. In addition, even if the process for monitoring whether the set value is normal or not is not set in the process at the start of supply of operating power, setting monitoring is performed by the first timer interrupt process (FIG. 117). Since it is configured to execute the processing (step S8220), it is possible to deal with an abnormality in the setting value.

As in the first embodiment, an update button 68b is provided, and in the setting value updating process (FIG. 116), the setting value may be updated by one step each time the reset button 68c is pressed. Alternatively, the setting value may be updated by one step each time the update button 68b is pressed. Further, positions corresponding to "setting 1" to "setting 6" are set as rotation operation positions when a setting key is inserted into the setting key insertion portion 68a and rotated. A configuration may be adopted in which a setting value corresponding to the rotational operation position of the portion 68a is set. In addition, the setting key inserting portion 68a is configured so that it can be turned further beyond the ON position, and each time the turning operation beyond the ON position is performed, the setting value in the process of updating is changed to the setting value of the next order. It may be configured to be updated.

In the setting value update process (FIG. 116), the setting key insertion portion 68a is turned off to confirm the selected setting value, and the reset button 68c is pressed to end the setting value update process. It may be configured to be Further, in the configuration provided with the update button 68b, in the setting value update process (FIG. 116), the setting key insertion portion 68a is turned off to confirm the selected setting value, and the update button 68b is pressed. The configuration may be such that the setting value update process is ended by being operated.

Further, as a condition for executing the setting value update process (FIG. 116), the configuration may be such that the condition that the gaming machine main body 12 is in an open state is not set, and the front door frame 14 is in an open state. The configuration may be such that the condition that the game machine main body 12 is in an open state and the condition that the front door frame 14 is in an open state are both not set.

Further, as a condition for executing the setting confirmation process (FIG. 115), the configuration may be such that the condition that the gaming machine main body 12 is in an open state is not set, and the front door frame 14 is in an open state. The configuration may be such that the condition that the game machine main body 12 is in an open state and the condition that the front door frame 14 is in an open state are both not set.

In addition, it is specified that the power failure flag is not set to "1" or the checksum is abnormal in the main process (FIG. 114) that is executed when the supply of operating power to the main CPU 63 is started. In this case, RAM clear processing (step S7915) may be executed. In this case, after the RAM clearing process (step S7915) is executed, the setting value updating process (step S7918) may be executed. is executed and the progress of the game is stopped, or the process for controlling the progress of the game is started.

In addition, in the main processing (FIG. 114), the setting confirmation processing (step S7914) is executed after the determination processing of whether the power failure flag is set to "1" and the checksum comparison processing. , may be configured to be executed before these processes. In this case, it is possible to give priority to the process for confirming the setting value.

Also, the setting monitoring process (step S8220) is not limited to the configuration in which it is executed each time the first timer interrupt process (FIG. 117) is activated. The configuration may be such that the setting monitoring process (step S8220) is executed each time a predetermined number of times (for example, 10000 times) is executed. In this case, it is possible to reduce the frequency of execution of the monitoring while periodically monitoring whether or not the set values are normal.

Alternatively, the setting monitoring process (step S8220) may be executed in the remaining processes (steps S7921 to S7924) in the main process (FIG. 114). In this case, it is possible to monitor whether or not the set value is normal by using idle time in a situation where the first timer interrupt processing (FIG. 117) and the second timer interrupt processing (FIG. 123) are not executed. It becomes possible.

Further, the configuration may be such that the setting monitoring process (step S8220) is executed when a game round is newly started. More specifically, when a game round is newly started, the setting monitoring process (step S8220) may be executed before the success/failure determination process is executed. As a result, it is possible to prevent the validity determination process from being executed in a situation where the set value is abnormal.

Further, when it is specified that the setting value is abnormal in the setting monitoring process (step S8220), it may be configured to move to the setting value update process (step S7918).

Further, when it is specified that the setting value is abnormal in the setting monitoring process (step S8220), the setting error flag provided in the work area 221 for specific control is set to "1" and 114), the progress of the game is stopped with the setting error flag set to "1", and in order to cancel the state in which the progress of the game is stopped, the power is turned off. A configuration requiring ON is also possible. In this case, even if the main process (FIG. 114) does not perform the operation for executing the set value update process, if the setting error flag is set to "1", the setting is forcibly set. By executing the value updating process, it is possible to force new setting of the setting value using the setting value updating process set in the main process (FIG. 114).

Further, the holding information acquired when the game ball enters the first operating port 33 and the holding information acquired when the game ball enters the second operating port 34 are stored separately, It is good also as a structure by which the 1st special-figure display part and the 2nd special-figure display part are provided as the special-figure display part 37a corresponding to those reservation information. In this case, the variation display of the pattern in the first special figure display unit and the variation display of the pattern in the second special figure display unit can be performed in an overlapping manner, and when a predetermined game state is reached, either one The duration of the variable display of the pattern in the special figure display section may be configured to be extremely long. In this configuration, waiting for confirmation of the set value until a situation in which no game is played results in a long waiting time. On the other hand, by executing the setting confirmation process (step S7914) in the process when the supply of operating power is started in the main CPU 63, the setting value can be changed without causing the waiting time as described above. can be confirmed.

In addition, in the low-frequency support mode, the duration of the variable display of the pattern in the general pattern display section 38a may be extremely long. In this configuration, waiting for confirmation of the set value until a situation in which no game is played results in a long waiting time. On the other hand, by executing the setting confirmation process (step S7914) in the process when the supply of operating power is started in the main CPU 63, the setting value can be changed without causing the standby time as described above. can be confirmed.

Further, the display contents of the first to fourth notification display devices 201 to 204 when the setting confirmation process (FIG. 115) is executed are not limited to the display contents in the above embodiment. Instead of displaying the letter "k" on the display device 203, only the central display segment may be in a light emitting state like the first display device 201 and the second display device 202. . Alternatively, the first to third information display devices 201 to 203 may be turned off, and the fourth information display device 204 may display a display corresponding to the current set value.

Further, the display contents of the first to fourth notification display devices 201 to 204 when the set value update process (FIG. 116) is executed are not limited to the display contents in the above embodiment. Instead of displaying the character "H" on the display device 203, only the central display segment may be in a light emitting state like the first display device 201 and the second display device 202. . Alternatively, the first to third information display devices 201 to 203 may be turned off, and the fourth information display device 204 may display a display corresponding to the current set value.

Further, instead of transmitting the type data and the display data to the display IC 266 at the same time, the main CPU 63 may be configured to start transmitting the display data after starting to transmit the type data. In this case, the transmission of the display data may be started during the transmission of the type data, or the transmission of the display data may be started after the transmission of the type data is completed. Alternatively, the transmission of the type data may be started after the transmission of the display data is started. In this case, the transmission of the type data may be started during the transmission of the display data, or the transmission of the type data may be started after the transmission of the display data is completed.

Further, the display IC 266 is not limited to the configuration in which only one display IC 266 is provided so as to be common to the first to fifth display circuits 261 to 265. A configuration in which they are provided in a one-to-one correspondence may be adopted. In this configuration, if the period for storing display data in each of the display ICs provided in one-to-one correspondence with the first to fifth display circuits 261 to 265 is short, the display data to each display IC is stored. Depending on the supply cycle, there is a risk that unintended blinking will occur in each display unit. On the other hand, by concentrating the processing for transmitting the display data to the second timer interrupt processing (FIG. 123) having a relatively short interrupt period as in the above embodiment, the display data to each display IC can be transferred. It is possible to shorten the supply cycle and prevent unintended blinking from occurring in each display unit.

Further, instead of the configuration in which the hit random number counter C1 is provided in the main RAM 65, a configuration in which a random number circuit for updating the random number acquired in the win/fail judgment process may be provided. In this case, in the internal function register setting process in the main process (FIG. 114), setting is made to associate the random number of the random number circuit with the random number obtained in the correctness determination process.

<Thirty-fourth Embodiment>
This embodiment differs from the thirty-third embodiment in the processing configuration of the setting value updating process executed by the main CPU 63 . The configuration different from that of the thirty-third embodiment will be described below. The description of the same configuration as that of the thirty-third embodiment is basically omitted. Further, in this embodiment, the main control board 61 is provided with an update button 68b as in the first embodiment.

FIG. 125 is a flow chart showing setting value update processing in this embodiment executed by the main CPU 63 . Note that the processing of steps S8501 to S8508 in the setting value update processing is executed using the program for specific control and the data for specific control in the main CPU 63. FIG.

First, the setting update display flag provided in the work area 221 for specific control is set to "1" (step S8501). Thereafter, it is determined whether or not the value of the set value counter provided in the work area 221 for specific control is 1 or more corresponding to "setting 1" and 6 or less corresponding to "setting 6" (step S8502). If the value of the set value counter is "0" or is 7 or more, a negative determination is made in step S8502, and "1" is set to the set value counter (step S8503). As a result, the setting value of the pachinko machine 10 becomes "setting 1".

If an affirmative determination is made in step S8502 or if the process of step S8503 is executed, it is determined whether or not the reset button 68c is pressed (step S8504). If the reset button 68c has not been pressed (step S8504: NO), on condition that the update button 68b has been pressed (step S8505: YES), the value of the set value counter in the work area 221 for specific control is incremented by 1 (step S8506). As a result, each time the update button 68b is pressed once, the set value is updated to a value one step higher. If the update button 68b is not pressed (step S8505: NO) or if the value of the set value counter is incremented by 1, the process returns to step S8502. If the value is determined to be 7 or more, "1" is set to the set value counter in step S8503. As a result, when the update button 68b is pressed once in the state of "setting 6", the setting returns to "setting 1".

If the reset button 68c has been pressed (step S8504: YES), the current set value is determined and the process proceeds to step S8507. In step S8507, it is determined whether or not the setting key insertion unit 68a has been turned off using the setting key. In this case, it may be configured to determine whether or not the setting key insertion portion 68a has been switched from the ON state to the OFF state, or may be configured to determine whether or not the setting key insertion portion 68a is in the OFF state. If the setting key insertion portion 68a has not been turned off (step S8507: NO), the process of step S8507 is executed again.

If the setting key insertion portion 68a is turned off (step S8507: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8508).

According to the above configuration, when the update button 68b is pressed to update the set value, the reset button 68c is pressed to confirm the set value, and the setting key insertion portion 68a is turned off. The set value update process is thereby terminated. That is, in order to end the setting value update processing after updating the setting values in the setting value update processing, it is necessary to press the reset button 68c as well as turn off the setting key insertion portion 68a. As a result, it is possible to make it difficult to perform the act of trying to play a game with the set values after illegally updating the set values.

<Other embodiments>
It should be noted that the present invention is not limited to the description of the above-described embodiment, and various modifications and improvements are possible without departing from the scope of the present invention. For example, it may be changed as follows. Incidentally, the configurations of the following different forms may be applied individually or in combination with the configuration of the above-described embodiment.

(1) In the above-described first to fourteenth embodiments, as a parameter indicating the frequency of occurrence of the opening and closing execution mode, the number of occurrences of the opening and closing execution mode per unit game time is calculated. Alternatively, the result obtained by dividing the number of occurrences of the opening/closing execution mode by the total number of game balls discharged from the game area PA may be calculated. In addition to or instead of this, a configuration for calculating the result obtained by dividing the number of occurrences of the opening/closing execution mode by the total number of balls entering the first operating opening 33 and the number of entering balls entering the second operating opening 34. may be Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(2) In the above first to fourteenth embodiments, as a parameter indicating the frequency of occurrence of the high-frequency support mode, the number of occurrences of the high-frequency support mode per unit game and the high-frequency support mode for the number of occurrences of the opening and closing execution mode However, in addition to or instead of this, it is also possible to calculate the result of dividing the number of occurrences of the high-frequency support mode by the total number of game balls discharged from the game area PA. good. In addition to or instead of this, the result obtained by dividing the number of occurrences of the high frequency support mode by the total number of the number of balls entering the first operating port 33 and the number of balls entering the second operating port 34 is calculated. may be configured. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(3) As a game result that triggers the opening/closing execution mode, not only the big win result but also the small win result may be present. Although the open/close execution mode is generated when a small winning result is obtained, the winning/failure lottery mode and the support mode are not changed before and after the opening/closing execution mode. In addition, in the opening and closing execution mode resulting in a small hit result, it may be configured to be a low frequency winning mode. In this case, when a large winning result occurs, the history information corresponding to the occurrence of the big winning result is stored in the history memory 117, and when a small winning result occurs, the history information corresponding to the occurrence of the small winning result is stored in the history memory 117. It may be configured to be stored in the memory 117 for use. Further, in this configuration, the history information stored in the history memory 117 may be used to calculate the parameter indicating the occurrence frequency of the big winning result and the parameter indicating the occurrence frequency of the small winning result. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

Further, the configuration may be such that the probability of winning a small winning result changes according to the setting state of the pachinko machine 10, or may be such a configuration that it does not change. When the probability of winning a small winning result changes according to the setting state of the pachinko machine 10, the higher the setting value, the higher the probability of winning a small winning result. A configuration with a low probability of occurrence may also be used.

In addition, in a configuration in which a small hit result exists, reservation information acquired when a game ball enters the first operating port 33 and acquired when a game ball enters the second operating port 34 In the case of a big win result with the holding information, the allocation ratio of the kind of the big win result is different, and when aiming to enter the first operation port 33, the variable display unit 36 is displayed in the game area PA. A shooting operation is performed so that the game ball flows down in the area on the left side, and when aiming to enter the second operation port 34, the game ball flows down in the area on the right side of the variable display unit 36 in the game area PA. In addition, it may be configured such that a small hit result can occur based on the hold information acquired when the game ball enters the first operating port 33 .

In this configuration, the following 51st parameter may be present as a result of managing the game history. It should be noted that the normal period is the sum of the execution period of the opening and closing execution mode triggered by the small hit result based on the ball entering the first operating opening 33 and the execution period of the low frequency support mode instead of the opening and closing execution mode. do. Also, the number of balls entering the outlet 24a during the normal period is defined as the number of balls entering K51, the number of balls entering the general winning hole 31 during the normal period is defined as the number of balls entering K52, and the number of balls entering the special electric prize winning device 32 during the normal period. The number of balls entered into the first operating port 33 during the normal period is defined as K54, and the number of balls entered into the second operating port 34 during the normal period is defined as K55.
51st parameter: total number of game balls paid out in the normal period (K52 x "number of prize balls for winning to general winning port 31" + K53 x "number of prize balls for winning to special electric winning device 32" + K54 x "first The ratio of the total number of game balls discharged from the game area PA during the normal period (K51+K52+K53+K54+K55) above In the configuration where the 51st parameter is calculated, when the winning probability of the small winning result varies according to the setting state of the pachinko machine 10, the normal value of the 51st parameter varies according to the setting state of the pachinko machine 10. becomes. Therefore, it is preferable that the history information used for calculating the 51st parameter is deleted when the setting state of the pachinko machine 10 is changed. On the other hand, when the winning probability of the small winning result does not change according to the setting state of the pachinko machine 10, the normal value of the 51st parameter does not change according to the setting state of the pachinko machine 10. - 特許庁Therefore, it is preferable that the history information used for calculating the 51st parameter is not erased even if the setting state of the pachinko machine 10 is changed.

(4) In the first to fourteenth embodiments, instead of the configuration in which the history information corresponding to the occurrence of the open/close execution mode is stored in the history memory 117 regardless of the type of jackpot result that occurs. Then, the history information corresponding to the type of the jackpot result may be stored in the history memory 117 . In this case, a configuration may be adopted in which a parameter indicating the occurrence frequency is calculated for each type of jackpot results. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(5) In the above first to fourteenth embodiments, various parameters (first to eighth parameters, eleventh to eighteenth parameters, twenty-first to twenty-sixth parameters, thirty-first parameters and forty-first to forty-second parameter) is calculated, but it is not limited to this. It may be configured to be, and may be configured such that various parameters are calculated when the supply of operating power to the pachinko machine 10 is stopped, and the number of game times executed becomes the number of calculation trigger times (for example, 1000 times). The configuration may be such that various parameters are calculated in some cases. In this case, the history memory 117 may be cleared to "0" at the timing when various parameters are calculated. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(6) In the above-described first to fourteenth embodiments, the first to eighth parameters, the eleventh to eighteenth parameters, the twenty-first to twenty-sixth parameters, the thirty-first parameters and the Although all of the 41st to 42nd parameters are calculated, it is not limited to this. A configuration may be adopted in which the parameter group to be operated on is sequentially changed. For example, the 1st to 8th parameters are calculated at one calculation timing, the 11th to 18th parameters are calculated at the next calculation timing, the 21st to 26th parameters are calculated at the next calculation timing, and the next calculation is performed. The 31st parameter and the 41st to 42nd parameters may be calculated at the timing, and thereafter, the change of the calculation object in the above order may be repeated every time the calculation timing comes. As a result, it is possible to reduce the processing load for calculating the parameters at one calculation timing. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(7) In the first to fourteenth embodiments, the configuration may be such that various parameters are calculated using the history information in the history memory 117 under the condition that a game is being played. For example, the configuration may be such that various parameters are calculated on the condition that game balls are supplied to the game area PA. As a result, it is possible to prevent the calculation of various parameters from being wastefully repeated even though the game is not being played. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(8) In the first to fourteenth embodiments, the configuration is not limited to the configuration in which the management IC 66 is provided separately from the main side CPU 63, and the function of the management IC 66 is performed by the main side CPU 63. may be configured. In this case, the correspondence information is stored in the main ROM 64 in advance. Alternatively, the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be provided separately from the main RAM 65. The configuration may be such that the function of the storage memory 171 is achieved. In the configuration in which the functions of the history memory 117, the calculation result memory 131, and the separate storage memory 171 are performed in the main RAM 65, when the main RAM 65 is cleared (steps S105 and S117), the history memory A part or all of the areas corresponding to the memory 117, the calculation result memory 131 and the separate storage memory 171 may be cleared to "0". The area corresponding to each of the memory 171 may be excluded from being cleared to "0", and may be cleared to "0" when the corresponding clear condition in each of the above embodiments is satisfied. Further, in the main RAM 65, the contents of the manual operation for executing the clear process may be different between the areas corresponding to the history memory 117, the calculation result memory 131, and the separate storage memory 171 and the other areas. good. Alternatively, the function of the management IC 66 may be implemented by the sound emission control device 81 .

(9) In the above-described first to fourteenth embodiments, when the setting state of the pachinko machine 10 is newly set, the history information in the history memory 117 is stored and held without being erased. Various parameters stored in the result memory 131 may be deleted. This makes it possible to prevent notification of various parameters calculated before the setting is performed after the setting state is newly set. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(10) In the third to fifth embodiments, even if the setting state of the pachinko machine 10 is newly set (that is, even if the setting value update process is executed by the main side CPU 63), the A configuration may be adopted in which the clearing process of the history memory 117 is not executed when the set value is not changed before and after the setting. This makes it possible to prevent the history information in the history memory 117 from being erased even though the set values have not been changed.

In this configuration, even if the area for storing the set values in the main RAM 65 is completely cleared (step S117), it is not cleared to "0", so that the set value update process ( Before and after step S118), it becomes possible for the main side CPU 63 to identify whether or not the set value has been changed. In this case, when the main CPU 63 determines that the setting value has not been changed, the management CPU 112 outputs a signal so that the management CPU 112 does not execute the setting update recognition process. may be configured to output a signal to the management side CPU 112 so that the management side CPU 112 executes the setting update recognition processing when it is specified that the setting value has been changed.

Further, when a signal indicating that the setting state of the pachinko machine 10 has been newly set is received from the main side CPU 63, the management side CPU 112 refers to the history information stored in the history memory 117. It may be configured to specify whether or not the setting value has been changed. In this case, if the management side CPU 112 identifies that the setting value has not been changed, the history memory 117 is not cleared, and the management side CPU 112 identifies that the setting value has been changed. In this case, it is possible to execute the clearing process of the history memory 117 .

(11) In the third to fifth embodiments, even if the setting state of the pachinko machine 10 is newly set (that is, even if the set value update process is executed by the main side CPU 63), the If the set value is not changed before and after the setting, a configuration may be adopted in which the arithmetic processing of various parameters is not executed with the new setting of the setting state as a trigger. This makes it possible to prevent various parameters from being calculated with a new setting of the setting state as a trigger even though the setting value has not been changed.

In this configuration, even if the area for storing the set values in the main RAM 65 is completely cleared (step S117), it is not cleared to "0", so that the set value update process ( Before and after step S118), it becomes possible for the main side CPU 63 to identify whether or not the set value has been changed. In this case, when the main CPU 63 determines that the setting value has not been changed, the management CPU 112 outputs a signal so that the management CPU 112 does not execute the setting update recognition process. may be configured to output a signal to the management side CPU 112 so that the management side CPU 112 executes the setting update recognition processing when it is specified that the setting value has been changed.

Further, when a signal indicating that the setting state of the pachinko machine 10 has been newly set is received from the main side CPU 63, the management side CPU 112 refers to the history information stored in the history memory 117. It may be configured to specify whether or not the setting value has been changed. In this case, if the management side CPU 112 identifies that the setting value has not been changed, the calculation of various parameters triggered by the new setting of the current setting state is not executed, and the management side CPU 112 sets When it is specified that the value has been changed, it is possible to execute the calculation of various parameters with the new setting of the current setting state as a trigger.

(12) In the third to fifth embodiments, when the setting state of the pachinko machine 10 is newly set, various parameters may be calculated in various calculation processes (step S1807) at that time. At that time, various parameters stored in the memory for calculation result 131 are stored in the area to be stored among the first to fifth separate storage areas 172 to 176 of the separate storage memory 171, and the calculation is performed. The information stored in the result memory 131 may be cleared to "0". In this case, since it is not necessary to calculate various parameters in the situation where the setting state of the pachinko machine 10 is newly set, it is possible to complete the storage of various parameters in the separate storage memory 171 early. Become.

(13) In the third to fifth embodiments, the contents of various parameters stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 are displayed by performing a predetermined display start operation. The information may be displayed on the first to third notification display devices 69a to 69c or another display device. The predetermined display start operation may be performed by operating a dedicated operation unit, or may be performed by performing a predetermined dedicated operation on an operation unit for performing other operations. This makes it possible to easily check various parameters stored in the separate storage memory 171 .

(14) All of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33, and the second operating port 34 are configured to be subject to storage of history information (or ball entry history). , and only a part of the out port 24a, the general prize winning port 31, the special electric prize winning device 32, the first operating port 33 and the second operating port 34 is the object of storing the history information may be For example, only the general winning opening 31, the special electric winning device 32, and the second operation opening 34 may be configured to store history information, or only the general winning opening 31 may be configured to store history information. It's okay. Even in this case, it is possible to grasp the manner in which game balls enter the ball-entering portion for which the history information is to be stored in a predetermined period.

(15) A signal path for transmitting information corresponding to the game ball entry result in association with each of the first winning opening detection sensor 42a, the second winning opening detection sensor 43a, and the third winning opening detection sensor 44a. 118a to 118c are set, but the present invention is not limited to this, and the information corresponding to the ball-entering result for the same type of ball-entering unit is provided when a plurality of the same type of ball-entering units exist. A configuration may be used in which a plurality of ball-entering detection sensors exist correspondingly, or a configuration in which one type of information is transmitted. This makes it possible to reduce the number of types of information transmitted from the main CPU 63 to the management IC 66 .

(16) In the first to fourteenth embodiments, the correspondence information indicating the correspondence between the types of information transmitted from the main CPU 63 to the management IC 66 and the buffers 122a to 122o is sent from the main CPU 63 for management. Although it is configured to be transmitted to the IC 66, it is not limited to this, and a configuration may be adopted in which the correspondence information is stored in advance in the management IC 66. FIG. In this case, there is no need to execute processing for making the management IC 66 recognize the correspondence information, so the processing load on the main CPU 63 can be reduced.

(17) In the first to fourteenth embodiments, correspondence information indicating the correspondence between the types of information transmitted from the main CPU 63 to the management IC 66 and the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Although the transmission to the main side CPU 63 is performed when the supply of operating power to the main side CPU 63 is started, the present invention is not limited to this. The correspondence information may be transmitted from the main CPU 63 to the management IC 66 when a signal requesting transmission of the correspondence information is received from the IC 66 . In this case, the correspondence memory 116 is provided as a non-volatile memory and is used for both reading and writing, and the correspondence information provided from the main side CPU 63 to the management IC 66 after the shipment of the pachinko machine 10 is sent to the main side CPU 63. Even if the supply of operating power is stopped, it is configured to be stored and held in the correspondence memory 116 . This makes it possible to reduce the frequency with which correspondence information is transmitted.

(18) In the first to fourteenth embodiments, correspondence information indicating the correspondence between the types of information transmitted from the main CPU 63 to the management IC 66 and the buffers 122a to 122o is transmitted from the main CPU 63 to the management IC 66. Although transmission to is performed using the signal paths 118a to 118g for transmitting information on the detection results of the respective ball detection sensors 42a to 48a, the present invention is not limited to this, and the corresponding relationship A configuration in which a dedicated signal path is provided for transmitting information from the main CPU 63 to the management IC 66 may be employed. Thereby, the management IC 66 can grasp which type of information is received from the main CPU 63 by the type of the buffers 122a to 122o that receive the information.

(19) In the first to fourteenth embodiments, information is transmitted from the main side CPU 63 to the management IC 66, while information is not transmitted from the management IC 66 to the main side CPU 63. However, the present invention is not limited to this. Instead, information may be transmitted from the management IC 66 to the main CPU 63 . For example, various parameters calculated by the management side CPU 112 based on history information may be transmitted to the main side CPU 63 . In this case, the main CPU 63 may be configured to directly execute the notification control of the notification means so as to perform notification corresponding to the contents of the received various parameters. By transmitting a command corresponding to the content of the parameter to the sound emission control device 81, the pattern display device 41, the display light emitting unit 53 and the speaker unit 54 are used to execute the notification corresponding to the content of the various parameters. It is good also as a structure which carries out.

(20) When the supply of operating power to the main CPU 63 is started in the first to fourteenth embodiments, the main CPU 63 or the management CPU 112 is notified based on the history information stored in the history memory 117. Various parameters may be calculated using the symbol display device 41, the display light emitting unit 53, the speaker unit 54, and the like. In this case, it becomes possible to confirm whether or not the game ball entry state in the game area PA was normal on the business day immediately before the opening of the game hall. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(21) In the first to fourteenth embodiments, if the various parameters calculated based on the history information stored in the history memory 117 are abnormal results, the pachinko machine 10 until the prohibition release operation is performed. It is good also as a structure which cannot start a game by . As a configuration that prevents the game from starting, for example, it may be configured to prohibit the shooting of game balls, or may be configured to disable the ball entry detection sensors 42a to 49a. A configuration may be adopted in which the winning/failure determination process is not executed even if a prize is won to the 33 or the second operating opening 34 . In addition, the prohibition release operation may be an operation of turning on the power of the pachinko machine 10 again while the reset button 68c is pressed. It is good also as operation of the operation means which becomes. As a result, it is possible to prevent the game from being played in a state where the game ball enters the game area PA in an abnormal manner. Further, it is possible to prevent the game from being played in a state where the frequency of occurrence of the opening/closing execution mode is abnormal. Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(22) In the first to fourteenth embodiments, the history information corresponding to the detection results of the entering ball detection sensors 42a to 48a is stored in the history memory 117, but the calculation of various parameters using the history information is It may be configured such that neither the main CPU 63 nor the management CPU 112 executes it. In this case, the history information may be read by an external device electrically connected to the reading terminal 68d, and various parameters may be calculated using the read history information by the operator of the reading operation. It is also possible to adopt a configuration in which various parameters are calculated using the read history information in an external device. In this case, it is possible to reduce the processing load on the main side CPU 63 and the management side CPU 112 . Also, this configuration may be applied to the fifteenth to thirty-fourth embodiments.

(23) In the first to fourteenth embodiments, the management IC 66 is provided with a separate power source from the main CPU 63, and even if the supply of operating power to the main CPU 63 is stopped, the management IC 66 may be configured to be capable of calculating various parameters using history information, and outputting information of history information or various parameters. As a result, even when the supply of operating power to the main CPU 63 is stopped, the history information and various parameters can be read by the external device.

(24) In the first to fourteenth embodiments, the reading terminal 68d used to read the program from the main ROM 64 is also used as a terminal used to read history information or various parameters in an external device. However, it is not limited to this, and the terminal used to read the history information or various parameters with an external device is the read terminal 68d for reading the program from the main ROM 64. It is good also as a structure provided separately. In this case, the terminals used for reading history information or various parameters may be provided on the MPU 62 or may be provided at a position different from the MPU 62 on the main control board 61 .

(25) In the first to fourteenth embodiments, the correspondence memory 116, the history memory 117, and the calculation result memory 131 are not limited to the configuration provided as non-volatile storage means such as flash memory. Instead, for example, one of these memories 116, 117, and 131 is provided as volatile storage means that requires power supply to store and hold information, and by supplying backup power to the memory, the main side The information may be stored and held even if the supply of operating power to the CPU 63 is stopped. In this case, a dedicated backup power device may be provided for the memory, and backup power may be supplied to the memory from the power supply/launch control device 78 that supplies backup power to the main RAM 65. good too.

(26) In the first to fourteenth embodiments, the management IC 66 includes the management side CPU 112 as a general-purpose CPU, and based on the programs and data stored in the management side ROM 113, performs storage processing of history information and arithmetic processing of various parameters. The configuration to be executed is not limited, and a configuration in which a hardware circuit designed to have these functions is formed in the management IC 66 may be employed. Specifically, for the configuration, for example, in the case of the first embodiment, the hardware circuit receives a signal from the main side CPU 63 indicating that the game ball has been detected by one of the detection sensors 42a to 48a. , the correspondence information corresponding to the buffer that received the signal is stored from the correspondence memory 116 to the history memory 117, and the information of the RTC 115 at that time is stored in the history memory 117. do. Further, for example, in the case of the sixth embodiment, when the hardware circuit receives a signal indicating that a game ball has been detected by one of the detection sensors 42a to 48a from the main side CPU 63, the signal is received. The value of the counter corresponding to the buffer is incremented by one. In addition, the hardware circuit calculates various parameters using history information at that point in time when a calculation trigger occurs in the first embodiment. Further, when an external output opportunity to the reading terminal 68d occurs, the hardware circuit externally outputs various parameters which are the calculation results and also outputs the history information.

(27) In the above first to fourteenth embodiments, the main CPU 63 and the management IC 66 may be provided as separate chips, may be provided as separate substrates, or may be provided as separate control devices. It is good also as a structure provided as.

(28) Regarding the number of game balls entering the out hole 24a, the number of balls entering the outlet 24a is counted. History information including RTC information may be stored with respect to ball entry into the privilege opportunity ball entry section, which triggers payout of prize balls and winning/failure determination processing. As a result, it is possible to calculate the frequency of game balls entering each privilege opportunity ball entry part with respect to the total number of discharged game balls while making it possible to extract the history of game balls entering the privilege opportunity ball entry part. Become.

(29) A configuration may be adopted in which a predetermined event that triggers storage of history information includes events other than those in the above embodiments. For example, at least one of the fact that the lower tray 56a has become full, the timing at which the full-tank state started, and the timing at which the full-tank state is canceled may be stored as history information. At least one of the no-ball state, the timing at which the no-ball state was started, and the timing at which the no-ball state was canceled may be stored as history information, and the dispensing device 76 was in an abnormal state. Alternatively, at least one of the timing at which the abnormal state of the dispensing device 76 was started and the timing at which the abnormal state of the dispensing device 76 was released may be stored as history information. In this case, it is possible to grasp the frequency of occurrence of these events.

(30) In the first embodiment, it is set in advance at the design stage of the management IC 66 that the 16th buffer 122p of the input port 121 in the management side I/F 111 corresponds to the output instruction signal. However, it is not limited to this, and the fact that the sixteenth buffer 122p corresponds to the output instruction signal is also recognized by the management IC 66 by transmitting a type identification command from the main CPU 63. may be Further, in the above-described first embodiment, it is set in advance at the design stage of the management IC 66 that the fifteenth buffer 122o of the input port 121 in the management side I/F 111 corresponds to the set value update signal. However, it is not limited to this, and the management IC 66 recognizes that the fifteenth buffer 122 o corresponds to the set value update signal by transmitting a type identification command from the main CPU 63 . may be configured. In this case, there is no need to set in advance in the management IC 66 the correspondence between the buffers 122a to 122p and the types of signals input to the buffers 122a to 122p.

(31) In the first to fourteenth embodiments, the management IC 66 may transmit a normal operation signal to the main CPU 63 when operating normally. In this case, the main CPU 63 can monitor whether the management IC 66 is operating normally.

(32) The display device that displays the set value being updated in the set value update process is not limited to the first to fourth notification display devices 201 to 204, and may be the pattern display device 41. A dedicated display device may be used. Further, the display device for displaying the set value in the setting confirmation process is not limited to the first to fourth notification display devices 201 to 204, and may be the pattern display device 41 or a dedicated display device. may be

(33) The operation unit operated to update the setting values in the setting value update process is not limited to the update button 68b, and may be the reset button 68c. Further, positions corresponding to "setting 1" to "setting 6" are set as rotation operation positions when a setting key is inserted into the setting key insertion portion 68a and rotated. A configuration may be adopted in which a setting value corresponding to the rotational operation position of the portion 68a is set. In addition, the setting key inserting portion 68a is configured so that it can be turned further beyond the ON position, and each time the turning operation beyond the ON position is performed, the setting value in the process of updating is changed to the setting value of the next order. It may be configured to be updated.

(34) In the first to tenth and fifteenth to twenty-first embodiments, the first to third notification display devices 69a to 69c are arranged side by side. They may be arranged side by side in a diagonal manner, or may be arranged side by side so as to form two upper and lower tiers. Further, in the eleventh to fourteenth embodiments, the first to fourth notification display devices 201 to 204 are arranged side by side, but they may be arranged vertically or diagonally. may be arranged side by side, or may be arranged side by side so as to form two upper and lower tiers. Further, in the fifteenth to twenty-first embodiments, the first to fourth notification display devices 201 to 204 may be used as the display devices for displaying the management results of the game history.

(35) History information used for calculating parameters whose normal values change according to the setting state of the pachinko machine 10 in the first to fourteenth embodiments (hereinafter referred to as history information to be changed) ) and history information used for calculating parameters whose normal values do not change according to the setting state of the pachinko machine 10 (hereinafter referred to as non-variable history information) are stored in different areas in the history memory 117. may be stored in the In this case, when the setting state of the pachinko machine 10 is newly set or when the setting state of the pachinko machine 10 is changed, the area in which the history information to be changed is stored in the history memory 117 is "0". While cleared, the area in which non-variable history information is stored in the history memory 117 may be configured not to be cleared to "0". As a result, the parameters whose normal values fluctuate according to the setting state of the pachinko machine 10 can be accurately calculated even after the setting values are changed, and the normal values do not fluctuate according to the setting state of the pachinko machine 10. The accuracy of parameter calculation can be improved. Also, this configuration may be applied to the fifteenth to twenty-first embodiments.

(36) In the fifteenth to twenty-first embodiments, the stack area 222 for specific control and the stack area 224 for non-specific control may not be specified in the main RAM 65 in advance. Even in this case, areas corresponding to these stack areas 222 and 224 are designated in the main RAM 65 at the design stage of the pachinko machine 10, but the area is designated beyond the storage capacity of the area. When information storage processing is executed, information that is not originally intended will be written in an area that is not originally intended.

(37) In the fifteenth to twenty-first embodiments, when the main RAM 65 is cleared (steps S105 and S117), the work area 221 for specific control and the stack area 222 for specific control are " 0” is cleared, but the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to “0”. In step S117), not only the specific control work area 221 and specific control stack area 222 but also the non-specific control work area 223 and non-specific control stack area 224 may be cleared to "0". . In the clearing process of the main RAM 65 (steps S105 and S117), not only the work area 221 for the specific control and the stack area 222 for the specific control, but also the normal counter area 231, the open/close execution mode counter area 232 and the high frequency The support mode counter area 233 may be cleared to "0", but the operation result storage area 234 may not be cleared to "0". In this case, the information stored in the calculation result storage area 234 can be protected.

(38) In the fifteenth to twenty-fifth embodiments, the operation for clearing the work area 221 for specific control and the stack area 222 for specific control to "0", the work area 223 for non-specific control and the non-specific control The operation for clearing the stack area 224 for specific control to "0" may be a different operation. For example, when the supply of operating power to the pachinko machine 10 is started while operating the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0", and the update button 68b is pressed. When the supply of operating power to the pachinko machine 10 is started while operating, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". This makes it possible to selectively erase each piece of information. Also, in the configuration, when the supply of operating power to the pachinko machine 10 is started while operating both the update button 68b and the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control , the non-specific control work area 223 and the non-specific control stack area 224 may all be cleared to "0". This makes it possible to improve the workability when collectively erasing the information in the areas 221 to 224 in the configuration that enables selective erasing as described above.

(39) In the fifteenth to eighteenth and twentieth embodiments, as in the nineteenth embodiment, at the start of processing corresponding to non-specific control, the information of the stack pointer of the main side CPU 63 is set to work for non-specific control. The information may be saved in the area 223 and the saved information may be returned to the stack pointer of the main CPU 63 when returning to the process corresponding to the specific control. As a result, even if the information of the stack pointer of the main side CPU 63 can fluctuate when the process corresponding to the non-specific control is started, when the process corresponding to the non-specific control ends, the main side It is possible to return the state of the stack pointer of the CPU 63 to the state before the processing corresponding to the non-specific control is started.

(40) In the fifteenth to twenty-fifth embodiments, processing for collecting game history information as processing corresponding to non-specific control, processing for calculating various parameters using the collected history information, and its Although the processing for notifying the calculation result is executed, only a part of these processing is executed as processing corresponding to non-specific control, and the rest is executed as processing corresponding to specific control. may be In addition to or in place of the processing for collecting game history information, the processing for calculating various parameters using the collected history information, and the processing for notifying the calculation results, The processing may be configured to be executed as processing corresponding to non-specific control. For example, at least one of fraud monitoring and notification of monitoring results may be configured to be executed as a process corresponding to non-specific control.

(41) In the fifteenth to twenty-fifth embodiments, when returning to the process corresponding to the specific control from the state in which the process corresponding to the non-specific control is being executed by the main CPU 63, the flag register of the main CPU 63, Although the stack pointer and various registers are not saved in the main RAM 65, instead of this, the main CPU 63 changes from a situation in which a process corresponding to non-specific control is being executed to a process corresponding to specific control. When returning, at least part of the information of the flag register, stack pointer, and various registers of the main CPU 63 is saved in the main RAM 65, and the saved information corresponds to the non-specific control, and the process is restarted. It may be configured such that it is returned to the corresponding storage area of the main side CPU 63 when it is necessary. As a result, it is possible to carry over and use the information of the main CPU 63 that is used in the processing corresponding to the non-specific control.

(42) In the fifteenth to twenty-fifth embodiments, when the total number of game balls ejected from the game area reaches 6000, various parameters are calculated. The total number of game balls may be greater than or less than 6000. For example, when the total number of game balls ejected from the game area reaches 60000, various parameters may be calculated. In this case, the storage capacity required to store the game history information is increased. By adopting a configuration for storing, it is possible to flexibly cope with an increase in the storage capacity.

(43) In the fifteenth to twenty-fifth embodiments, the 61st to 68th parameters are calculated as the game history management results. At least part of the parameters, the 41st parameter and the 42nd parameter may be calculated.

(44) In the fifteenth to twenty-fifth embodiments, when the process of newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control And not only the stack area 222 for specific control, but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". In this case, when the setting state of the pachinko machine 10 is newly set or when the setting state of the pachinko machine 10 is changed, the normal counter area 231, the open/close execution mode counter area 232, and the high frequency The support mode counter area 233 and the calculation result storage area 234 are cleared to "0".

In addition, when the processing for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, not only the work area 221 for specific control and the stack area 222 for specific control The normal counter area 231, the open/close execution mode counter area 232, and the high frequency support mode counter area 233 may be cleared to "0", but the calculation result storage area 234 may not be cleared to "0". In this case, the information stored in the calculation result storage area 234 can be protected.

Further, when the processing for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control and the stack area 222 for specific control are set to "0 The work area 223 for non-specific control and the stack area 224 for non-specific control, although cleared, may be configured not to be cleared to "0". In this case, it is possible to protect the information stored in the work area 223 for non-specific control and the stack area 224 for non-specific control.

Further, when the configuration of (43) is provided, when the processing for newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the first Although the history information for computing the 31st, 41st, and 42nd parameters in the embodiment of 1 is erased, the normal counter area 231, the open/close execution mode counter area 232, and the high-frequency support mode counter area 233 are erased. And the calculation result storage area 234 may be configured not to be cleared to "0".

(45) In the first to twenty-fifth embodiments, instead of using the total number of discharged game balls discharged from the game area PA to calculate various parameters, A configuration in which the total number of supplied game balls is used may be employed. In this case, for example, a detection sensor is provided so as to detect a game ball that is launched from the game ball launching mechanism 27 and reaches the game area PA, and the number of game balls supplied to the game area PA based on the detection result of the detection sensor is provided. It is good also as composition which counts the number. In this configuration, since it is not necessary to count the number of game balls discharged from the outlet 24a, the outlet detection sensor 48a may not be provided.

(46) In the fifteenth to twenty-fifth embodiments, at least part of the information of the various registers and the stack pointer of the main CPU 63 is stored in the stack area 222 for specific control or the stack area 224 for non-specific control. It may be configured to be saved by a load instruction. In this case, it is necessary to update the information of the stack pointer of the main CPU 63 when saving the information to the stack areas 222 and 224 . Also, the information saved in the stack areas 222 and 224 may be returned to the corresponding storage area of the main CPU 63 by a load instruction. In this case also, it is necessary to update the information of the stack pointer of the main CPU 63 when returning the information from the stack areas 222 and 224 .

(47) In each of the above-described embodiments, when the set value update process is executed, the notification corresponding to it may be performed by any one of the pattern display device 41, the display light emitting unit 53 and the speaker unit 54. As a result, the manager of the game hall can clearly grasp that the set value update process is being executed.

(48) In each of the above-described embodiments, the main RAM 65 may be configured to store a history of newly set values. A RAM provided in the sound emission control device 81 may store a history of new setting values. In this case, every time the setting value update process is completed, a command including the information of the setting value set in the setting value update process is transmitted from the main side CPU 63 to the sound emission control device 81, and the sound emission control device Each time the command 81 is received, information indicating that the set value is newly set and information indicating the set value at that time are cumulatively stored in the RAM of the sound emission control device 81.例文帳に追加In this configuration, the pattern display device 41 may display the setting history of the set values cumulatively stored in the RAM of the sound emission control device 81 when a predetermined operation is performed.

(49) In each of the above embodiments, the information indicating the number of game balls scheduled to be paid out stored in the payout control device 77 is not deleted when the set value is newly set in the set value update process. However, instead of this, the information indicating the number of game balls to be paid out may be deleted. Further, if the set value is not changed although the set value update process is executed, the information indicating the number of game balls scheduled to be paid out is not deleted, and if the set value is changed, the said scheduled payout value is changed. Information indicating the number of game balls may be erased.

(50) In each of the above-described embodiments, when the set value update process is executed but the set value is not changed, the areas 221 to 224 of the main RAM 65 are not cleared to "0", and the set value is At least some of the areas 221 to 224 of the main RAM 65 may be cleared to "0" when changed. For example, when the set value is changed, the area other than the set value counter in the work area 221 for specific control may be cleared to "0".

(51) In the 22nd to 25th embodiments, even if the main CPU 63 is executing the process for confirming the setting value in the setting confirmation process (FIG. 87), A configuration may be adopted in which the movement of the related movable object is continued. For example, the ball entering means that can be entered in the opening/closing execution mode is provided with a V zone and a non-V zone, and the game ball entering the ball entering means is distributed to either the V zone or the non-V zone. In the configuration including the distribution member, the operation of the distribution member may be continued even in a situation where the processing for confirming the setting value is being executed in the setting confirmation processing. In this case, even if an attempt is made to illegally cause a situation in which a process for confirming the set value is executed in the setting confirmation process to stop the operation of the sorting member, it is possible to make it impossible. In addition to the sorting member described above, the movable object that continues to operate even when the process for confirming the set value is executed in the setting confirmation process is the ball-entering means. A game ball is placed in either an advantageous hole for generating a round game after entering the game ball or a discharge hole for discharging the game ball entered by the ball-entering means without entering the advantageous hole. A distribution member for distributing is considered.

(52) In the twenty-second to twenty-fifth embodiments, at least one of the work area 223 for non-specific control and the stack area 224 for non-specific control may not be monitored for information abnormality. In this case, even if it is specified that an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area for non-specific control 224 is not cleared to "0", so as not to cause a situation in which the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" based on the occurrence of an information abnormality. It becomes possible to

(53) In the twenty-second to twenty-fifth embodiments, if there is an information abnormality in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control A configuration may be adopted in which the monitoring as to whether or not it has occurred is entirely executed in the process corresponding to the non-specific control. Further, the processing for clearing the areas 221 to 224 to "0" when an information abnormality occurs may be configured to be executed by the processing corresponding to the non-specific control.

(54) In each of the above embodiments, the main RAM 65 needs to be supplied with power in order to store and hold information, and backup power is supplied to the main RAM 65 even when the pachinko machine 10 is powered off. However, the main RAM 65 may be configured as a non-volatile memory that does not require power supply to store and retain information.

(55) In each of the above-described embodiments, in the various clearing processes of the main RAM 65, the target area of the main RAM 65 is initialized by executing the process of clearing "0" and the initial setting process for the target area. Alternatively, the target area may be initialized by executing the initialization process without executing the "0" clearing process.

(56) In each of the above-described embodiments, if the setting key insertion unit 68a is turned ON when the supply of operating power to the main CPU 63 is started, the setting value update process is executed without any other operation. It may be configured to be Further, instead of the setting key inserting portion 68a which is turned ON/OFF by the setting key, a setting switch which is directly turned ON/OFF by hand may be provided. Further, if the reset button 68c is pressed when the setting key insertion portion 68a is not provided and the supply of operating power to the main CPU 63 is started, the set value can be changed without any other operation. A configuration in which update processing is executed may be employed. In this case, a cover member may be provided so as to be switchable between a closed state that covers the reset button 68c and an open state that does not cover the reset button 68c. may be provided.

(57) In the setting value update process, if the setting key insertion unit 68a is kept in the OFF position for a predetermined period of time, the setting value being selected is confirmed and the setting value update process ends. may be Further, when the end reference period (for example, 5 minutes) has passed since the setting value update process was started, the setting value being selected may be automatically determined and the setting value update process may be terminated. Further, when the update button 68b or the reset button 68c is pressed for a period longer than the end reference period (for example, 10 seconds) in the set value update process, the set value being selected is confirmed and the set value update process is terminated. may be configured.

(58) The setting key insertion portion 68a is configured so that it can be turned further beyond the ON position, and each time the turning operation beyond the ON position is performed, the set value being updated is changed to the next set value. , the setting confirmation process that enables confirmation of the setting value starts when the supply of operating power to the main CPU 63 is started while the setting key insertion part 68a is operated to the ON position. The setting confirmation process may be terminated when the setting key insertion portion 68a is operated to the OFF position. In addition, when the supply of operating power to the main CPU 63 is started in a state where the update button 68b or the reset button 68c is pressed, a setting confirmation process that enables confirmation of the setting value is started. The setting confirmation process may be terminated when the pressing operation is released. In addition, in a configuration in which a setting switch that is directly turned ON/OFF by hand is provided instead of the setting key insertion portion 68a that is turned ON/OFF by the setting key, the main switch is turned ON/OFF when the setting switch is turned ON/OFF. When the supply of operating power to the side CPU 63 is started, a setting confirmation process that enables confirmation of the setting value is started, and when the setting switch is turned OFF or turned ON after the OFF operation. The configuration may be such that the setting confirmation process is ended. In addition, in a configuration in which a setting switch that is directly turned ON/OFF by hand is provided instead of the setting key insertion portion 68a that is turned ON/OFF by the setting key, the main switch is turned ON/OFF when the setting switch is turned ON/OFF. A configuration is provided in which the setting confirmation process that enables confirmation of the setting value is started when the supply of operating power to the side CPU 63 is started, and the setting confirmation process is terminated when the reset button 68c is pressed. good too.

(59) Display control based on a command sent from the main controller 60 instead of the configuration in which the display controller 82 is controlled by the sound emission control device 81 based on the command sent from the main controller 60 The device 82 may be configured to control the sound emission control device 81 . Further, instead of the configuration in which the sound emission control device 81 and the display control device 82 are provided separately, a configuration in which both control devices are provided as one control device may be used, and the function of one of these two control devices may be changed. may be integrated into the main controller 60 , or both functions of both controllers may be integrated into the main controller 60 . Also, the configuration of the command transmitted from the main control device 60 to the sound emission control device 81 and the configuration of the command transmitted from the sound emission control device 81 to the display control device 82 are arbitrary.

(60) Other types of pachinko machines different from the above embodiments, such as a pachinko machine in which an electric accessory is released a predetermined number of times when a game ball enters a specific area of a special device, or a game ball in a specific area of a special device The present invention can also be applied to a pachinko machine in which a right is generated and a jackpot is obtained when a coin is entered, a pachinko machine equipped with other accessories, an arrangement ball machine, a mahball, or the like.

In addition, a non-ball game machine, for example, equipped with a plurality of reels on which a plurality of types of patterns are attached in the circumferential direction, the rotation of the reels is started by inserting medals and operating the start lever, and the stop switch is operated. or after the reels are stopped by the lapse of a predetermined time, if a specific pattern or a combination of specific patterns is formed on an effective line that can be visually recognized from the display window, a privilege such as payout of medals is given to the player. The present invention can also be applied to slot machines.

In addition, the game machine main body which is openably and closably supported by the outer frame is provided with a storage portion and a take-in device, and after a predetermined number of game balls stored in the storage portion are taken in by the take-in device, the start lever is operated. The present invention can also be applied to a gaming machine that combines a pachinko machine and a slot machine, in which the reels start rotating.

When the present invention is applied to a slot machine or a gaming machine in which a pachinko machine and a slot machine are combined, for example, when one game is started based on the operation of the start lever, the result of the lottery process executed for the winning combination is stored as history information. , and the history information may be used to calculate the actual winning probability of each combination. The information may be used to calculate the actual probability of transition to the special game state, or the ratio of the number of staying games in the special game state to the total number of games played may be calculated. The history information and various parameters may be read by an external device, or the game machine itself may provide notification corresponding to the calculation results of the various parameters. In addition, it may be configured such that there are a plurality of setting states such as "Setting 1" to "Setting 6", and the probability of winning in the winning lottery process may be changed according to the setting state. In this case, the configuration in each of the above embodiments may be applied with respect to the handling of history information, the calculation of various parameters, and the handling of repetitive changes when a setting state setting is newly set or a setting value is changed. .

(61) The characteristic configurations of the first to thirty-fourth embodiments may be applied to each other in arbitrary combinations. For example, the characteristic configuration of the first embodiment, the characteristic configuration of the sixth embodiment, the characteristic configuration of the tenth embodiment, and the characteristic configuration of the thirtieth embodiment. The characteristic configuration of the second embodiment, the characteristic configuration of the fourth embodiment, the characteristic configuration of the eighth embodiment, and the eleventh embodiment may be combined. and the characteristic configuration of the thirty-third embodiment may be combined, and the characteristic configuration of the first embodiment and the characteristic configuration of the fifteenth embodiment may be combined. , the characteristic configuration of the twenty-first embodiment, the characteristic configuration of the twenty-ninth embodiment, and the characteristic configuration of the thirty-fourth embodiment may be combined. The characteristic configuration of the second embodiment, the characteristic configuration of the sixteenth embodiment, and the characteristic configuration of the twenty-second embodiment may be combined. In addition, any combination of the configurations of the different modes may be applied to the configuration in which the characteristic configurations of the first to thirty-fourth embodiments are applied in a predetermined combination.

<Invention groups extracted from the above embodiments>
Hereinafter, the features of the group of inventions extracted from each of the above-described embodiments will be described, showing effects and the like as necessary. In the following description, for ease of understanding, configurations corresponding to the above-described embodiments are appropriately shown in parentheses or the like, but are not limited to the specific configurations shown in parentheses or the like.

<Characteristic group A>
Feature A1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
Information erasing means (third The function of executing the processing of step S1809 in the management side CPU 112 in the embodiment, the function of executing the processing of step S2109 in the management side CPU 112 in the fifth embodiment, and the step S2306 to step S2306 in the management side CPU 112 in the sixth embodiment. a function of executing the processing of S2308 (a function of executing the processing of step S2608 in the management-side CPU 112 in the eighth embodiment);
A game machine characterized by comprising:

According to the feature A1, since the set value to be used is set from among the set values of a plurality of stages corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that Further, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information.

In this case, at least part of the history information stored in the history storage means is deleted under at least one condition that the setting value to be used is newly set. As a result, it is possible to adjust the contents of the history storage means so as to appropriately manage the frequency of occurrence of the predetermined event in the situation after the setting value to be used is newly set. .

Feature A2. A ball entry means (first operation port 33, second operation port 34) that allows a game ball flowing down the game area to enter,
Information acquiring means for acquiring special information based on the game ball entering the ball entering means (function for executing the processing of step S401 in the main side CPU 63);
Attachment determination means for determining whether or not the special information corresponds to attachment information (function for executing the processes of steps S503 and S504 in the main CPU 63);
Privilege granting means (step in the main CPU 63) that grants a privilege (opening/closing execution mode) to the player based on the granting correspondence result that the special information corresponds to the granting information in the granting determination A function to execute the processing of S409 to step S412),
The gaming machine according to feature A1, wherein a probability of the award correspondence result in the award determination varies according to the set value.

According to the feature A2, it is possible to change the probability of the award corresponding result according to the set value in a so-called pachinko machine. In this case, by providing the configuration of the feature A1, the history storage means can preferably manage the frequency of occurrence of the predetermined event in the situation after the probability of the grant correspondence result is changed. Content can be adjusted.

Feature A3. The information erasing means erases all of the history information stored in the history storing means under at least one condition that the setting value to be used has been set by the setting means. The gaming machine according to feature A1 or A2.

According to feature A3, when the setting value to be used is newly set, all the history information stored in the history storage means is deleted, so that the setting value to be used is set. It is possible to specify the occurrence frequency of the predetermined event based on the timing at which the is newly performed.

Feature A4. The information erasing means erases part of the history information stored in the history storage means under at least one condition that the setting value to be used has been set by the setting means, The gaming machine according to feature A1 or A2, wherein part of the history information stored in the history storage means is left.

According to the feature A4, when the setting value to be used is newly set, the history information unnecessary for managing the frequency of occurrence of the subsequent predetermined events is deleted, and the history information is deleted to manage the frequency of occurrence of the predetermined events thereafter. It becomes possible to leave necessary history information. As a result, it is possible to appropriately manage the occurrence frequency of the predetermined event after the setting value to be used is newly set.

Feature A5. The history information stored in the history storage means includes first history information (a history indicating that the opening/closing execution mode has occurred) in which the probability of occurrence of the predetermined event corresponding to the history information varies according to the set value. information) and second history information (history information indicating that the game ball has been discharged from the game area PA) that does not vary according to the set value,
The information erasing means erases the first history information stored in the history storing means under at least one condition that the setting value to be used has been set by the setting means, and The gaming machine according to feature A4, wherein the second history information stored in history storage means is left.

According to feature A5, when a setting value to be used is newly set, the first history information corresponding to the predetermined event whose occurrence probability varies according to the setting value is deleted, and the occurrence probability changes to the setting value. The second history information corresponding to the predetermined event that does not change depending on the time is not erased. As a result, when the first history information before the setting of the setting value to be used is newly set is inherited after the setting of the setting value is newly performed, a predetermined event corresponding to the first history information occurs. The first history information that is not preferable for specifying the frequency can be deleted when the setting value is newly set. On the other hand, since the second history information is not deleted even if the setting value to be used is newly set, it is referred to when specifying the occurrence frequency of the predetermined event corresponding to the second history information. Since it is possible to secure a large number of second history information, it is possible to accurately identify the occurrence frequency of the predetermined event corresponding to the second history information.

Feature A6. A ball entry means (first operation port 33, second operation port 34) that allows a game ball flowing down the game area to enter,
Information acquiring means for acquiring special information based on the game ball entering the ball entering means (function for executing the processing of step S401 in the main side CPU 63);
Attachment determination means for determining whether or not the special information corresponds to attachment information (function for executing the processes of steps S503 and S504 in the main CPU 63);
Privilege granting means (step in the main CPU 63) that grants a privilege (opening/closing execution mode) to the player based on the granting correspondence result that the special information corresponds to the granting information in the granting determination A function to execute the processing of S409 to step S412),
A configuration in which the probability of the grant correspondence result in the grant determination varies according to the set value,
The first history information includes information corresponding to the provision of the privilege,
The gaming machine according to feature A5, wherein the second history information includes information corresponding to ejection of game balls from the gaming area in a predetermined manner.

According to feature A6, since the probability of granting a privilege varies according to the setting value, the first history information is deleted when the setting value to be used is newly set. , it is possible to specify the privilege giving frequency under the circumstances of the newly set setting value. On the other hand, since the frequency with which game balls are ejected from the game area does not change according to the setting value, the second history information is not deleted even if the setting value to be used is newly set. It is possible to accurately specify the frequency with which game balls are discharged from the game area in a predetermined manner.

Feature A7. The information erasing means, when the set value to be used is set by the setting means, when a predetermined amount or more of the predetermined history information is stored in the history storage means, at least the history information is deleted. The gaming machine according to any one of features A1 to A6, characterized in that part of the game is erased.

According to feature A7, if the history storage means does not store a predetermined amount of history information or more, the history information is not deleted even if a new set value to be used is set. This makes it possible to prevent repeated erasure of the history information in the history storage means even if new setting values are repeatedly set in a situation in which no game is played.

Feature A8. Using the history information stored in the history storage means as at least one condition that the setting value to be used by the setting means has been set, the result of the game in a predetermined period is handled. information deriving means for deriving mode information to The gaming machine according to any one of features A1 to A7, characterized in that

According to the feature A8, at least a part of the history information stored in the history storage means is provided with the configuration of the feature A1, and under at least one condition that the setting value to be used is newly set. In the deleted configuration, when the setting value to be used is newly set, the history information stored in the history storage means is used to correspond to the result of the game in a predetermined period. Information is derived. As a result, even if at least part of the history information is erased when the setting value is changed, the management result of the game history such as the occurrence frequency of the predetermined event in the situation before the setting value is changed can be grasped. It becomes possible to

Feature A9. The gaming machine according to feature A8, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information deriving means.

According to feature A9, when a new set value to be used is set, the history information stored in the history storage means is used to generate mode information corresponding to the result of a game played during a predetermined period. is derived, the mode information is stored in the mode information storage means. Thereby, even if the setting value is changed, it is possible to grasp the management result of the game history in the situation before the setting value is changed at an arbitrary timing thereafter.

Feature A10. The gaming machine according to feature A9, wherein the mode information storage means can store a plurality of the mode information.

According to feature A10, since it is possible to store a plurality of mode information in the mode information storage means, the management results of the game history in a plurality of periods can be grasped based on the timing at which the setting value is newly set. It becomes possible to Further, even if new setting values are repeatedly set in a situation in which a game is not played, the mode information derived using the history information of a situation in which a game is actually played is retained by the mode information storage means. It is possible to increase the possibility of remaining in

Feature A11. The mode information storage means is capable of storing a predetermined number of the mode information,
This game machine has means for executing special processing when the setting of the setting value to be used by the setting means occurs the number of times exceeding the predetermined number under predetermined conditions (in the third embodiment, the management side CPU 112 A gaming machine according to feature A9 or A10, characterized in that it has a function of executing a repeated change monitoring process (in the fourth embodiment, a function of executing a repeated change monitoring process in the main CPU 63).

According to the feature A11, the set value is set in a situation in which a game is not played in order to prevent the mode information derived using the history information of the situation in which the game is actually being played from remaining in the mode information storage means. is repeated, special handling is performed on it. This makes it possible to deal with the act.

Feature A12. The gaming machine according to any one of features A8 to A11, wherein the information derivation means derives the mode information when a predetermined amount or more of the predetermined history information is stored in the history storage means. .

According to feature A12, mode information is derived when a predetermined amount or more of predetermined history information is stored in the history storage means, so that it is possible to prevent the mode information from being wastefully derived. .

Feature A13. The information erasing means erases the history information from when the set value to be used is set by the setting means until a predetermined amount or more of the history information is stored in the history storage means. before the setting value is set when the predetermined history information is stored in the history storage means in a specific amount or more after the setting value to be used is set by the setting means without The gaming machine according to any one of features A1 to A12, wherein the history information stored in the history storage means is erased.

According to feature A13, until a specific amount of predetermined history information is newly stored in the history storage means, even if a setting value to be used is newly set, it is stored before the setting is performed. history information that has been stored will not be deleted. This makes it possible to specify the management result of the game history in the predetermined period even if the setting value is newly set.

Feature A14. The history storage means includes first history storage means (first history memory 191) and second history storage means (second history memory 192),
The history storage executing means is
When the predetermined event occurs during a predetermined period from when the set value to be used is set by the setting means until the cancellation condition is satisfied, the history information corresponding to the event is stored in the first history storage means and means for storing in both of the second history storage means (function for executing the process of step S2604 in the management side CPU 112);
Means for storing the history information corresponding to the event in the one of the first history storage means and the second history storage means which is set as a storage target when the predetermined event occurs during a period other than the predetermined period. (a function of executing the processing of step S2603 in the management side CPU 112);
with
The information erasing means erases the history information stored in the one of the first history storage means and the second history storage means that has been set as the storage target until then, when the cancellation condition is satisfied. The game machine according to any one of features A1 to A13, characterized in that

According to feature A14, until a specific amount of history information is newly stored in the history storage means, even if a setting value to be used is newly set, it is not stored before the setting is performed. history information is not deleted. This makes it possible to specify the management result of the game history in the predetermined period even if the setting value is newly set. In addition, it is possible to produce the effect by simply changing the history storage means to store the history information between the first history storage means and the second history storage means.

Feature A15. Using the history information stored in one of the first history storage means and the second history storage means that is set as the storage object, the mode information corresponding to the result of the game in a predetermined period is derived. The gaming machine according to feature A14, characterized by comprising information deriving means (a function of executing the processing of step S2703 in the management side CPU 112).

According to feature A15, even in a situation where history information is stored in both the first history storage unit and the second history storage unit by setting a new set value, the mode of using the history information. It is possible to appropriately derive information.

For the configuration of features A1 to A15, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group B>
Feature B1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
with
The predetermined history information stored in the history storage means before the setting value to be used is set by the setting means is used to set the setting value to be used by the setting means. The game machine is characterized in that it is stored and held in the history storage means even after it has been played.

According to the feature B1, since the set value to be used is set from a plurality of stages of set values corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that Further, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to In addition, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information.

In this case, even if the setting value to be used is newly set, the history information stored in the history storage means is stored and held without being erased. As a result, even when the set value to be used is set, the history information up to that point can be continuously stored in the history storage means, and the history information can be accumulated in the history storage means over a long period of time. It becomes possible to specify the management result of the game history by using the history information obtained.

Feature B2. The history storage execution means stores the history information corresponding to the setting value to be used by the setting means in the history storage means (first memory execution means). In the embodiment, the function of executing the processing of step S1307 in the management-side CPU 112, and in the seventh embodiment, the function of executing the processing of step S2408 in the management-side CPU 112). machine.

According to the characteristic B2, in the configuration in which the history information is stored and held without being deleted even if the setting value to be used is newly set, the setting value to be used is newly set. History information corresponding to that is stored in the history storage means. This makes it possible to distinguish between the history information before the new setting of the setting value to be used and the history information after the setting.

Feature B3. When the setting value to be used is set by the setting unit, the memory execution unit at the time of setting stores information corresponding to the set value as the history information in the history storage unit. The gaming machine according to feature B2, characterized by:

According to feature B3, it is possible to specify the content of the setting value that was set in the past by referring to the history information.

Feature B4. The history storage means is provided with a plurality of corresponding history storage means (history memories 181 to 186 for settings 1 to 6) corresponding to each of the plurality of types of setting values that can be set by the setting means. The gaming machine according to any one of the characterizing features B1 to B3.

According to the feature B4, since the correspondence history storage means is provided corresponding to each setting value, it is possible to store the history information separately for each setting value.

Feature B5. When the setting value to be used is set by the setting means, the means (management side A gaming machine according to feature B4, characterized by comprising a function of executing the processing of step S2406 in the CPU 112.

According to feature B5, when a setting value to be used is newly set, the correspondence history storage means corresponding to that setting value is used as a storage target for subsequent history information. It becomes possible to store the history information separately.

Feature B6. Information derivation means for deriving mode information corresponding to game results in a predetermined period by using the history information stored in the correspondence history storage means (display output processing in management side CPU 112) A gaming machine according to feature B5, characterized by comprising a function of executing

According to feature B6, in a configuration in which history information is stored separately for each set value, it is possible to derive the mode information corresponding to the currently set set value.

Feature B7. A ball entry means (first operation port 33, second operation port 34) that allows a game ball flowing down the game area to enter,
Information acquiring means for acquiring special information based on the game ball entering the ball entering means (function for executing the processing of step S401 in the main side CPU 63);
Attachment determination means for determining whether or not the special information corresponds to attachment information (function for executing the processes of steps S503 and S504 in the main CPU 63);
Privilege granting means (step in the main CPU 63) that grants a privilege (opening/closing execution mode) to the player based on the granting correspondence result that the special information corresponds to the granting information in the granting determination A function to execute the processing of S409 to step S412),
The gaming machine according to any one of features B1 to B6, wherein a probability of the award correspondence result in the award determination varies according to the set value.

According to the feature B7, it is possible to vary the probability of the award corresponding result in accordance with the set value in a so-called pachinko machine.

For the configuration of features B1 to B7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group C>
Feature C1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
History storage execution means (function for executing history setting processing in the management side CPU 112) for storing history information of the corresponding game in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
post-setting handling means that does not erase the history information until at least a specified amount of the predetermined history information is stored in the history storage means after the setting value to be used is set by the setting means; (a function of executing the processing of steps S2506 and steps S2605 to S2609 in the management side CPU 112);
A game machine characterized by comprising:

According to the feature C1, since the set value to be used is set from among the set values of a plurality of stages corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that Further, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information.

In this case, until a specific amount of predetermined history information is newly stored in the history storage means, even if the setting value to be used is newly set, it is not stored before the setting is performed. history information is not deleted. This makes it possible to specify the management result of the game history in the predetermined period even if the setting value is newly set.

Feature C2. The post-setting handling means sets the set value when the history information stored in the history storage means is equal to or greater than the specific amount after the set value to be used is set by the setting means. The gaming machine according to feature C1, wherein the history information stored in the history storage means is erased before the is performed.

According to feature C2, when a specific amount of history information is stored in the history storage means, which makes it possible to specify the management result of the game history in a predetermined period after the setting value is newly set. , the history information stored in the history storage means before the new setting of the set value is performed is erased. This makes it possible to prevent useless history information from being continuously stored in the history storage means.

Feature C3. The history storage means includes first history storage means (first history memory 191) and second history storage means (second history memory 192),
The history storage executing means is
When the predetermined event occurs, means for storing the corresponding history information in the side set as the storage object of the first history storage means and the second history storage means (step S2603 in the management side CPU 112) function to execute the processing of
After the set value to be used is set by the setting unit, the predetermined history information is stored in the side of the first history storage unit and the second history storage unit that is not set as the storage object. Means (management side CPU 112) for storing the history information corresponding to the occurrence of the predetermined event in both the first history storage means and the second history storage means until the specific amount or more is stored. a function to execute the process of step S2604 in
with
The post-setting handling means includes:
After the set value to be used is set by the setting unit, the predetermined history information is stored in the side of the first history storage unit and the second history storage unit that is not set as the storage object. means for changing the storage target between the first history storage means and the second history storage means when the specified amount or more is stored (function for executing the process of step S2607 in the management-side CPU 112);
After the set value to be used is set by the setting unit, the predetermined history information is stored in the side of the first history storage unit and the second history storage unit that is not set as the storage object. Means for erasing the history information of the first history storage means and the second history storage means that has been set as the storage target until then (step S2608 in the management side CPU 112) function to execute the processing of
The gaming machine according to feature C1 or C2, characterized by comprising:

According to feature C3, until a specific amount of history information is newly stored in the history storage means, even if a setting value to be used is newly set, it is not stored before the setting is performed. history information is not deleted. This makes it possible to specify the management result of the game history in the predetermined period even if the setting value is newly set. In addition, it is possible to produce the effect by simply changing the history storage means to store the history information between the first history storage means and the second history storage means.

Feature C4. Using the history information stored in one of the first history storage means and the second history storage means that is set as the storage object, the mode information corresponding to the result of the game in a predetermined period is derived. The gaming machine according to feature C3, further comprising information deriving means (a function of executing the processing of step S2703 in the management side CPU 112).

According to the feature C4, even if the history information is stored in both the first history storage means and the second history storage means by setting a new setting value, the history information is used. It is possible to appropriately derive information.

Feature C5. A ball entry means (first operation port 33, second operation port 34) that allows a game ball flowing down the game area to enter,
Information acquiring means for acquiring special information based on the game ball entering the ball entering means (function for executing the processing of step S401 in the main side CPU 63);
Attachment determination means for determining whether or not the special information corresponds to attachment information (function for executing the processes of steps S503 and S504 in the main CPU 63);
Privilege granting means (step in the main CPU 63) that grants a privilege (opening/closing execution mode) to the player based on the granting correspondence result that the special information corresponds to the granting information in the granting determination A function to execute the processing of S409 to step S412),
The gaming machine according to any one of features C1 to C4, wherein a probability of the award correspondence result in the award determination varies according to the set value.

According to the feature C5, it is possible to change the probability of the award corresponding result in accordance with the set value in a so-called pachinko machine.

For the configuration of features C1 to C5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group D>
Feature D1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
Special execution means for executing special processing under at least one condition that the setting of the setting value to be used by the setting means is executed in a special situation (in the third embodiment, monitoring of repeated changes in the management side CPU 112 a function to execute processing, a function to execute repeated change monitoring processing in the main side CPU 63 in the fourth embodiment, a function to make a negative determination in step S2106 in the management side CPU 112 in the fifth embodiment);
A game machine characterized by comprising:

According to the feature D1, since the set value to be used is set from a plurality of stages of set values corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that In this case, the special processing is executed under at least one condition that the new setting of the setting value to be used is executed in a special situation. This makes it possible to deal with the case where the setting values are newly set under unfavorable circumstances.

Feature D2. Characteristic D1 characterized in that the special execution means executes the special process under at least one condition that the setting of the setting value to be used by the setting means has been executed more than a specific number of times in the special situation. The gaming machine described in .

According to feature D2, even if a new setting of a setting value to be used is executed in a special situation, if the number of times of execution is less than the specified number of times, special processing is not executed. As a result, it is possible to prevent the special processing from being executed even when the authorized worker performs the new setting of the set value less than a specific number of times in a special situation.

Feature D3. The special execution means sets, as the special situation, a situation in which no game has been played since the set value to be used was set by the setting means, or setting of the set value to be used by the setting means. executing the special processing under at least one condition that the set value to be used has been set by the setting means in a situation where a game of a predetermined standard or more has not been played since the The gaming machine according to the characterizing feature D1 or D2.

According to feature D3, special processing is executed when a new set value to be used is set in a situation where a game is not being played or a game is not substantially being played. If the act is done, it will be possible to deal with it.

Feature D4. The gaming machine according to any one of features D1 to D3, wherein the special execution means executes notification processing as the special processing.

According to feature D4, the notification process is executed under at least one condition that a new setting of the setting value to be used is executed in a special situation. This makes it possible to prompt the user to deal with the new setting of the setting value under unfavorable circumstances.

Feature D5. History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
Using the history information stored in the history storage means as at least one condition that the setting value to be used by the setting means has been set, the result of the game in a predetermined period is handled. information derivation means for deriving mode information (a function of executing the processing of step S1807 in the management side CPU 112 in the third embodiment, a function of executing the processing of step S2107 in the management side CPU 112 in the fifth embodiment);
The gaming machine according to any one of features D1 to D4, characterized by comprising:

According to feature D5, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information.

In this case, when the setting value to be used is newly set, the mode information corresponding to the result of the game in the predetermined period is obtained by using the history information stored in the history storage means. derived. As a result, it is possible to grasp the management result of the game history such as the occurrence frequency of the predetermined event in the situation before the setting value is changed.

Feature D6. The special execution means derives the mode information by the information derivation means as the special processing, under at least one condition that the setting of the setting value to be used by the setting means is executed in the special situation. The gaming machine according to feature D5, characterized in that it does not allow the game to be played.

According to the feature D6, even if the setting value to be used is newly set, if the setting is made in an unfavorable situation, the mode information is not derived. This makes it possible to prevent the mode information from being wastefully derived.

Feature D7. The gaming machine according to feature D5 or D6, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to the feature D7, when a new set value to be used is set, the history information stored in the history storage means is used to generate mode information corresponding to the result of the game during a predetermined period. is derived, the mode information is stored in the mode information storage means. Thereby, even if the setting value is changed, it is possible to grasp the management result of the game history in the situation before the setting value is changed at an arbitrary timing thereafter.

Feature D8. The gaming machine according to feature D7, wherein the mode information storage means can store a plurality of the mode information.

According to the characteristic D8, since it is possible to store a plurality of mode information in the mode information storage means, the management result of the game history in a plurality of periods can be grasped based on the timing at which the setting value is newly set. It becomes possible to Further, even if new setting values are repeatedly set in a situation in which a game is not played, the mode information derived using the history information of a situation in which a game is actually played is retained by the mode information storage means. It is possible to increase the possibility of remaining in

Feature D9. The mode information storage means is capable of storing a predetermined number of the mode information,
Characteristic D7, characterized in that the special execution means executes the special processing when the setting of the setting value to be used by the setting means occurs more than the predetermined number in the special situation. Or the gaming machine described in D8.

According to the feature D9, the setting value is set under a situation where a game is not played so that the mode information derived using the history information of the situation where the game is actually played does not remain in the mode information storage means. is repeated, special handling is performed on it. This makes it possible to deal with the act.

Feature D10. A ball entry means (first operation port 33, second operation port 34) that allows a game ball flowing down the game area to enter,
Information acquiring means for acquiring special information based on the game ball entering the ball entering means (function for executing the processing of step S401 in the main side CPU 63);
Attachment determination means for determining whether or not the special information corresponds to attachment information (function for executing the processes of steps S503 and S504 in the main CPU 63);
Privilege granting means (step in the main CPU 63) that grants a privilege (opening/closing execution mode) to the player based on the granting correspondence result that the special information corresponds to the granting information in the granting determination A function to execute the processing of S409 to step S412),
The gaming machine according to any one of features D1 to D9, wherein a probability of the award correspondence result in the award determination varies according to the set value.

According to the feature D10, it is possible to change the probability of the result corresponding to the award according to the set value in a so-called pachinko machine.

For the configuration of features D1 to D10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group E>
Feature E1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
Using the history information stored in the history storage means as at least one condition that the setting value to be used by the setting means has been set, the result of the game in a predetermined period is handled. information derivation means for deriving mode information (a function of executing the processing of step S1807 in the management side CPU 112 in the third embodiment, a function of executing the processing of step S2107 in the management side CPU 112 in the fifth embodiment);
A game machine characterized by comprising:

According to the feature E1, since the set value to be used is set from a plurality of stages of set values corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that Further, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information.

In this case, when the setting value to be used is newly set, the mode information corresponding to the result of the game in the predetermined period is obtained by using the history information stored in the history storage means. derived. As a result, it is possible to grasp the management result of the game history such as the occurrence frequency of the predetermined event in the situation before the setting value is changed.

Feature E2. The gaming machine according to feature E1, further comprising mode information storage means (separate storage memory 171) for storing the mode information derived by the information derivation means.

According to the feature E2, when the setting value to be used is newly set, the history information stored in the history storage means is used to generate the mode information corresponding to the result of the game in the predetermined period. is derived, the mode information is stored in the mode information storage means. Thereby, even if the setting value is changed, it is possible to grasp the management result of the game history in the situation before the setting value is changed at an arbitrary timing thereafter.

Feature E3. The gaming machine according to feature E2, wherein the mode information storage means can store a plurality of the mode information.

According to the feature E3, since a plurality of pieces of mode information can be stored in the mode information storage means, the management results of the game history in a plurality of periods can be grasped based on the timing at which the set value is newly set. It becomes possible to Further, even if new setting values are repeatedly set in a situation in which a game is not played, the mode information derived using the history information of a situation in which a game is actually played is retained by the mode information storage means. It is possible to increase the possibility of remaining in

Feature E4. The mode information storage means is capable of storing a predetermined number of the mode information,
This game machine has means for executing special processing when the setting of the setting value to be used by the setting means occurs the number of times exceeding the predetermined number under predetermined conditions (in the third embodiment, the management side CPU 112 A gaming machine according to feature E2 or E3, characterized in that it has a function of executing a repeated change monitoring process (in the fourth embodiment, a function of executing a repeated change monitoring process in the main CPU 63).

According to the feature E4, the set value is set under a situation in which a game is not played in order to prevent the mode information derived using the history information of the situation in which the game is actually being played from remaining in the mode information storage means. is repeated, special handling is performed on it. This makes it possible to deal with the act.

Feature E5. The gaming machine according to any one of characteristics E1 to E4, wherein the information derivation means derives the mode information when a predetermined amount or more of the predetermined history information is stored in the history storage means. .

According to feature E5, mode information is derived when a predetermined amount or more of predetermined history information is stored in the history storage means, so it is possible to prevent the mode information from being wastefully derived. Become.

Feature E6. A ball entry means (first operation port 33, second operation port 34) that allows a game ball flowing down the game area to enter,
Information acquiring means for acquiring special information based on the game ball entering the ball entering means (function for executing the processing of step S401 in the main side CPU 63);
Attachment determination means for determining whether or not the special information corresponds to attachment information (function for executing the processes of steps S503 and S504 in the main CPU 63);
Privilege granting means (step in the main CPU 63) that grants a privilege (opening/closing execution mode) to the player based on the granting correspondence result that the special information corresponds to the granting information in the granting determination A function to execute the processing of S409 to step S412),
The gaming machine according to any one of features E1 to E5, wherein the probability of the award corresponding result in the award determination varies according to the set value.

According to the characteristic E6, it is possible to change the probability of the result corresponding to the award according to the set value in a so-called pachinko machine.

For the configuration of features E1 to E6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions according to the feature group A, the feature group B, the feature group C, the feature group D, and the feature group E, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machines such as those exemplified above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this regard.

<Feature group F>
Feature F1. A ball entry means (first operation port 33, second operation port 34) that allows a game ball flowing down the game area to enter,
Information acquiring means for acquiring special information based on the game ball entering the ball entering means (function for executing the processing of step S401 in the main side CPU 63);
Attachment determination means for determining whether or not the special information corresponds to attachment information (function for executing the processes of steps S503 and S504 in the main CPU 63);
Privilege granting means (step in the main CPU 63) that grants a privilege (opening/closing execution mode) to the player based on the granting correspondence result that the special information corresponds to the granting information in the granting determination A function to execute the processing of S409 to step S412);
setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
with
The provision determination means has a high probability mode and a low probability mode as modes of the provision determination so that the probability of the provision correspondence result is relatively high and low,
A gaming machine characterized in that the probability of the award corresponding result varies at least in the low-probability mode according to the set value.

According to the feature F1, it is possible to vary the probability of a given corresponding result at least in the low-probability mode according to the set value in a so-called pachinko machine. As a result, even in a single gaming machine, it is possible to create a situation in which the probability of the award corresponding result is advantageous or disadvantageous in the low-probability mode. Therefore, it is possible to improve the interest of the game.

Feature F2. The gaming machine according to feature F1, wherein in the high probability mode, the probability of obtaining the award correspondence result does not vary according to the set value.

According to the feature F2, while the probability of the grant correspondence result in the low probability mode is changed according to the set value, the probability of the grant correspondence result in the high probability mode is not changed according to the set value. By doing so, it becomes possible to limit the influence of the setting value to the situation in the low-probability mode.

Feature F3. There are multiple types of benefits,
The gaming machine according to feature F1 or F2, wherein the mode of selection of the privilege does not change according to the set value.

According to the feature F3, the probability of obtaining a grant response result in the low-probability mode is varied according to the set value, while the selection mode of the privilege is not varied according to the set value, so that the influence of the set value can be restricted to situations in the low-probability mode.

For the configuration of features F1 to F3, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the characteristic group F, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machines such as those exemplified above, it is necessary to improve the interest in games, and there is still room for improvement in this respect.

<Characteristic group G>
Feature G1. History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
Information deriving means (steps S1402 to S1412 in the management side CPU 112 in the first embodiment) for deriving mode information corresponding to game results in a predetermined period by using the history information stored in the history storage means. , a function of executing the processing of step S1807 in the management side CPU 112 in the third embodiment, and a function of executing the processing of step S2107 in the management side CPU 112 in the fifth embodiment);
Information display means (first to third notification display devices 69a to 69c in the first to tenth embodiments, eleventh to third In the fourteenth embodiment, the first information display control means (function for executing display processing in the management side CPU 112) that controls the display of the first to fourth notification display devices 201 to 204),
Second information display control means (in the first to tenth embodiments, step S202 and step S208 in the main side CPU 63 In the eleventh embodiment, the function of executing the processes of steps S3101, S3103, and S3109 in the main CPU 63. In the twelfth embodiment, steps S3201, S3202, and S3204 in the main CPU 63. and a function of executing the process of step S3210, a function of executing an abnormality display process in the main CPU 63 in the thirteenth embodiment);
A game machine characterized by comprising:

According to the feature G1, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the mode information corresponding to the result of the game during the predetermined period is derived using the history information stored in the history storage means. Then, display corresponding to the mode information is performed by the information display means. As a result, it is possible to grasp the management result of the game history such as the occurrence frequency of the predetermined event. Further, in the information display means, not only the display corresponding to the mode information but also the display corresponding to other information is performed. This makes it possible to effectively use the information display means.

Feature G2. Characteristic feature G1 according to feature G1, characterized in that a period in which the display corresponding to the mode information is performed on the information display means and a period in which the display corresponding to the different information is performed on the information display means are distinguished. game machine.

According to feature G2, by grasping the status of display on the information display means, it is possible to determine which of the display corresponding to the mode information and the display corresponding to the other information is being performed on the information display means. can be specified.

Feature G3. The second information display control means controls the display of the information display means so that the display corresponding to the different information is displayed in a display mode different from the display mode when the display corresponding to the mode information is performed. The gaming machine according to feature G1 or G2, characterized in that

According to feature G3, by grasping the display mode of the information display means, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the other information is being performed in the information display means. It becomes possible.

Feature G4. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth In the embodiment, the game machine according to any one of features G1 to G3, characterized in that it comprises a plurality of first to fourth notification display devices 201 to 204).

According to the feature G4, it is possible to display a wide variety of mode information by using a plurality of individual information display means to display corresponding to the mode information. In addition, due to the presence of a plurality of individual information display means, it is possible to make the display mode significantly different between the case where the display corresponding to the mode information is performed and the case where the display corresponding to the other information is performed. .

Feature G5. The second information display control means, when displaying corresponding to the different information, controls a predetermined individual information displaying means that does not enter a non-display state when displaying corresponding to the mode information among the plurality of individual information displaying means. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201 in the eleventh and twelfth embodiments, second notification Characteristic G4 characterized in that the display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are in a non-display state. The gaming machine described in .

According to the feature G5, the predetermined individual information display means, which is not in a non-display state when the display corresponding to the mode information is performed, is in a non-display state when the display corresponding to the other information is performed. As a result, it is possible to clearly specify which of the display corresponding to the mode information and the display corresponding to the separate information is being performed only by grasping the type of the individual information display means in the non-display state. becomes possible.

Feature G6. The second information display control means, when displaying corresponding to the different information, selects a specific individual information display means (second 3rd notification display device 69c in 1st to 10th embodiments, 4th notification display device 204 in 11th and 12th embodiments, 3rd notification display device 203 and 4th notification in 13th embodiment display device 204) to be in the display state,
The display content of the specific individual information display means when the display corresponding to the different information is performed can be displayed on the specific individual information display means when the display corresponding to the mode information is performed. The gaming machine according to feature G5.

According to the feature G6, the display contents that can be displayed when the display corresponding to the mode information is performed in the specific individual information display means can also be displayed when the display corresponding to the different information is performed. It becomes possible not to restrict the display contents when the display corresponding to the information is performed. In addition, even if the specific individual information display means has a configuration that can display the same display content, it will not be in a non-display state if it has the configuration of feature G5 and displays corresponding to the mode information. Since predetermined individual information display means is in a non-display state when display corresponding to different information is performed, it is possible to specify which display is being performed in a plurality of individual information display means.

Feature G7. The gaming machine according to feature G5 or G6, wherein the first information display control means brings each of the plurality of individual information display means into a display state when performing display corresponding to the mode information.

According to feature G7, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state. It is possible to make a clear distinction from the case where display is performed.

Feature G8. The first information display control means sequentially changes the display of the mode information on the information display means. The game machine according to any one of features G5 to G7, characterized in that it is not maintained at

According to the feature G8, when the display corresponding to the mode information is performed, the predetermined individual information display means is not maintained in the non-display state. Thereby, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed in the plurality of individual information display means regardless of the timing of confirming the plurality of individual information display means. becomes possible.

Feature G9. The second information display control means controls one specific individual information display means among the plurality of individual information display means (in the first to tenth embodiments, the third notification display device 69c, the eleventh In the embodiment, any of the features G5 to G8 characterized in that the display corresponding to the separate information is performed on the fourth notification display device 204), and the remaining individual information display means are put into a non-display state. 1. The game machine according to 1.

According to feature G9, when the display corresponding to the separate information is performed, only one individual information display means is in the display state, so it is easy to grasp whether the display corresponding to the separate information is being performed. Become.

Feature G10. The plurality of individual information display means are arranged in a predetermined direction,
The gaming machine according to feature G9, wherein the specific individual information display means is present at an end in the predetermined direction among the plurality of individual information display means arranged in the predetermined direction.

According to feature G10, since one individual information display means for displaying information corresponding to different information is present at an end in a predetermined direction, it is possible to grasp whether or not displaying corresponding to different information is being performed. becomes easier.

Feature G11. The first information display control means is a part of the plurality of individual information display means, the individual information display means for type display (in the first to tenth embodiments, the first notification display device 69a, the eleventh In the 14th embodiment, a display corresponding to the type of the mode information to be displayed is performed on the first notification display device 201 and the second notification display device 202), and a plurality of the individual information display means Individual information display means for result display, which is a part of the results display device (second notification display device 69b and third notification display device 69c in the first to tenth embodiments, and the second notification display device 69c in the eleventh to fourteenth embodiments Display corresponding to the content of the mode information to be displayed on the 3rd notification display device 203 and the 4th notification display device 204) is performed,
The game machine according to any one of features G5 to G10, wherein the predetermined individual information display means corresponds to the individual information display means for the type display target.

According to the feature G11, when the display corresponding to the mode information is performed, the display corresponding to the type of the mode information to be displayed is performed in the individual information display means for the type display, and the individual information for the result display is displayed. The display corresponding to the content of the mode information to be displayed is performed by the means. This makes it easier to grasp the mode information to be displayed. In this case, when the display corresponding to the different information is performed, the individual information display means for the type display target is in the non-display state, so that the non-display state of the type display corresponds to the different information. If other information is displayed, it becomes easier to understand.

Feature G12. The information display means has a plurality of unit light emitting portions (display segments 201a to 201g, 202a to 202g), and performs a predetermined display by combining unit light emitting portions that are in a light emitting state among the plurality of unit light emitting portions. is a configuration that allows
The second information display control means responds to the different information by setting a unit light emitting portion that can be in a light emitting state when a display corresponding to the mode information is performed among the plurality of unit light emitting portions to a light emitting state. The combination of the unit light-emitting portions that are in a light-emitting state when the display corresponding to the different information is performed does not exist when the display corresponding to the mode information is performed. The game machine according to any one of the features G1 to G11, characterized in that it is designed to be combined.

According to the feature G12, the display corresponding to the other information is performed by setting the unit light-emitting portions that can be in the light-emitting state when the display corresponding to the mode information is performed to the light-emitting state, so that the display corresponding to the mode information is performed. In order to diversify the information, it is possible to limit the contents of the display corresponding to the mode information as little as possible. On the other hand, the combination of the unit light-emitting portions that are in the light-emitting state when the display corresponding to the different information is performed is a combination that does not exist when the display corresponding to the mode information is performed. Accordingly, by grasping the combination of the unit light-emitting portions that are in the light-emitting state, it is possible to grasp which of the display corresponding to the mode information and the display corresponding to the other information is being performed.

Feature G13. There are a plurality of display modes of display corresponding to the mode information on the information display means,
The game according to feature G12, characterized in that none of the plurality of unit light-emitting portions does not enter a light-emitting state even when all the displays corresponding to the mode information of the plurality of modes are performed. machine.

According to feature G13, when the display corresponding to the mode information is performed, any combination of the unit light-emitting portions is set to the light-emitting state. It is possible to limit the contents of the display corresponding to the information as little as possible.

Feature G14. Specific individual information display means which is the information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, the thirteenth In the embodiment, a plurality of individual information display means including the third notification display device 203 and the fourth notification display device 204) are provided,
The second information display control means, when displaying corresponding to the different information, controls a predetermined individual information displaying means that does not enter a non-display state when displaying corresponding to the mode information among the plurality of individual information displaying means. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201 in the eleventh and twelfth embodiments, second notification Characteristic G12 characterized in that the display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are put into a non-display state. Or the gaming machine described in G13.

According to the feature G14, the predetermined individual information display means, which is not in the non-display state when the display corresponding to the mode information is performed, is in the non-display state when the display corresponding to the other information is performed. As a result, it is possible to clearly specify which of the display corresponding to the mode information and the display corresponding to the separate information is being performed only by grasping the type of the individual information display means in the non-display state. becomes possible.

Feature G15. A setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage,
The gaming machine according to any one of features G1 to G14, wherein the second information display control means displays a display corresponding to the different information in a situation where the setting value can be changed.

According to the characteristic G15, it is possible to use the information display means for performing the display corresponding to the mode information also as the display means for notifying that the setting value can be changed.

Feature G16. The gaming machine according to feature G15, wherein the second information display control means displays information corresponding to the setting value currently selected as the display corresponding to the different information.

According to the feature G16, it is possible to use the information display means for displaying information corresponding to the mode information as a display means for displaying the set values that are being changed.

Feature G17. The gaming machine according to any one of features G1 to G16, wherein the second information display control means displays a display corresponding to an abnormal state of the gaming machine as a display corresponding to the different information.

According to the feature G17, the information display means for performing the display corresponding to the mode information can also be used as the display means for performing the display corresponding to the abnormal state of the gaming machine.

Feature G18. The second information display control means is characterized in that, when performing a display corresponding to the abnormal state in a situation where the abnormal state has not occurred, the display corresponding to the fact that the abnormal state has not occurred is performed. The gaming machine according to feature G17.

According to feature G18, it is possible to clearly specify whether or not an abnormal state has occurred by checking the information display means.

For the configuration of features G1 to G18, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group H>
Feature H1. History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
Information deriving means (steps S1402 to S1412 in the management side CPU 112 in the first embodiment) for deriving mode information corresponding to game results in a predetermined period by using the history information stored in the history storage means. , a function of executing the processing of step S1807 in the management side CPU 112 in the third embodiment, and a function of executing the processing of step S2107 in the management side CPU 112 in the fifth embodiment);
Information display means (first to third notification display devices 69a to 69c in the first to tenth embodiments, eleventh to third In the fourteenth embodiment, the first information display control means (function for executing display processing in the management side CPU 112) that controls the display of the first to fourth notification display devices 201 to 204),
Second information display control means (in the first to tenth embodiments, step S202 and step S208 in the main side CPU 63 In the eleventh embodiment, the function of executing the processes of steps S3101, S3103, and S3109 in the main CPU 63. In the twelfth embodiment, steps S3201, S3202, and S3204 in the main CPU 63. and a function of executing the process of step S3210, a function of executing an abnormality display process in the main CPU 63 in the thirteenth embodiment);
with
The information display means has a plurality of unit light emitting portions (display segments 201a to 201g, 202a to 202g), and performs a predetermined display by combining unit light emitting portions that are in a light emitting state among the plurality of unit light emitting portions. is a configuration that allows
The second information display control means responds to the different information by setting a unit light emitting portion that can be in a light emitting state when a display corresponding to the mode information is performed among the plurality of unit light emitting portions to a light emitting state. The combination of the unit light-emitting portions that are in a light-emitting state when the display corresponding to the different information is performed does not exist when the display corresponding to the mode information is performed. A gaming machine characterized in that it is designed to be combined.

According to feature H1, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the mode information corresponding to the result of the game during the predetermined period is derived using the history information stored in the history storage means. Then, display corresponding to the mode information is performed by the information display means. As a result, it is possible to grasp the management result of the game history such as the occurrence frequency of the predetermined event. Further, in the information display means, not only the display corresponding to the mode information but also the display corresponding to other information is performed. This makes it possible to effectively use the information display means.

In addition, display corresponding to other information is performed by setting the unit light-emitting portions that can be in the light-emitting state when the display corresponding to the mode information is performed to the light-emitting state, thereby diversifying the display corresponding to the mode information. It is possible to limit the contents of the display corresponding to the mode information as little as possible. On the other hand, the combination of the unit light-emitting portions that are in the light-emitting state when the display corresponding to the different information is performed is a combination that does not exist when the display corresponding to the mode information is performed. Accordingly, by grasping the combination of the unit light-emitting portions that are in the light-emitting state, it is possible to grasp which of the display corresponding to the mode information and the display corresponding to the other information is being performed.

Feature H2. There are a plurality of display modes of display corresponding to the mode information on the information display means,
The game according to feature H1, characterized in that none of the plurality of unit light emitting portions does not enter a light emitting state even if all of the display corresponding to the aspect information of the plurality of aspects is performed. machine.

According to the feature H2, when the display corresponding to the mode information is performed, any combination of the unit light-emitting portions is set to the light-emitting state. It is possible to limit the contents of the display corresponding to the information as much as possible.

Feature H3. Specific individual information display means which is the information display means (the third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, the thirteenth In the embodiment, a plurality of individual information display means including the third notification display device 203 and the fourth notification display device 204) are provided,
The second information display control means, when displaying corresponding to the different information, controls a predetermined individual information displaying means that does not enter a non-display state when displaying corresponding to the mode information among the plurality of individual information displaying means. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201 in the eleventh and twelfth embodiments, second notification Characteristic feature H1 characterized in that the display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are in a non-display state. Or the gaming machine described in H2.

According to the feature H3, the predetermined individual information display means, which is not in the non-display state when the display corresponding to the mode information is performed, is in the non-display state when the display corresponding to the different information is performed. As a result, it is possible to clearly specify which of the display corresponding to the mode information and the display corresponding to the separate information is being performed only by grasping the type of the individual information display means in the non-display state. becomes possible.

Feature H4. The gaming machine according to feature H3, wherein the first information display control means brings each of the plurality of individual information display means into a display state when performing display corresponding to the mode information.

According to the feature H4, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state. It is possible to make a clear distinction from the case where display is performed.

Feature H5. The first information display control means sequentially changes the display of the mode information on the information display means. The gaming machine according to feature H3 or H4, characterized in that it is not maintained at

According to the feature H5, when the display corresponding to the mode information is performed, the predetermined individual information display means is not maintained in the non-display state. Thereby, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the different information is being performed in the plurality of individual information display means regardless of the timing of confirming the plurality of individual information display means. becomes possible.

Feature H6. A setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage,
The gaming machine according to any one of features H1 to H5, wherein the second information display control means displays a display corresponding to the different information in a situation where the setting value can be changed.

According to feature H6, it is possible to use the information display means for performing display corresponding to the mode information as display means for notifying that the setting value can be changed.

Feature H7. The gaming machine according to feature H6, wherein the second information display control means displays information corresponding to the setting value currently selected as the display corresponding to the different information.

According to the feature H7, the information display means for displaying the mode information can also be used as the display means for displaying the set values that are being changed.

For the configuration of features H1 to H7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group I>
Features I1. History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
Information deriving means (steps S1402 to S1412 in the management side CPU 112 in the first embodiment) for deriving mode information corresponding to game results in a predetermined period by using the history information stored in the history storage means. , a function of executing the processing of step S1807 in the management side CPU 112 in the third embodiment, and a function of executing the processing of step S2107 in the management side CPU 112 in the fifth embodiment);
A first information display control means (management side a function of executing display processing in the CPU 112;
a second information display control means (function for executing abnormality display processing in the main side CPU 63) that controls the display of the information display means so that a display corresponding to an abnormal state of the gaming machine is performed;
A game machine characterized by comprising:

According to feature I1, when a predetermined event occurs, history information corresponding to that event is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the mode information corresponding to the result of the game during the predetermined period is derived using the history information stored in the history storage means. Then, display corresponding to the mode information is performed by the information display means. As a result, it is possible to grasp the management result of the game history such as the occurrence frequency of the predetermined event. Further, in the information display means, not only the display corresponding to the mode information but also the display corresponding to the abnormal state of the gaming machine is performed. This makes it possible to effectively use the information display means.

Feature I2. The second information display control means is characterized in that, when performing a display corresponding to the abnormal state in a situation where the abnormal state has not occurred, the display corresponding to the fact that the abnormal state has not occurred is performed. The gaming machine according to feature I1.

According to feature I2, it is possible to clearly specify whether or not an abnormal state has occurred by checking the information display means.

Feature I3. Characteristic I1 or I2, characterized in that a period during which the information display means performs display corresponding to the mode information and a period during which the information display means performs display corresponding to the abnormal state are distinguished. The game machine described.

According to feature I3, by grasping the status of display on the information display means, it is possible to determine which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed on the information display means. can be specified.

Feature I4. The second information display control means controls the display of the information display means so that the display corresponding to the abnormal state is displayed in a display mode different from the display mode when the display corresponding to the mode information is performed. The gaming machine according to feature G1 or G2, characterized in that

According to feature I4, by grasping the display mode of the information display means, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed in the information display means. It becomes possible.

Feature I5. Characteristics I1 to I4, characterized in that a plurality of individual information display means (first to fourth notification display devices 201 to 204) capable of performing a plurality of types of display are provided as the information display means. The gaming machine according to any one of 1.

According to the feature I5, it is possible to display a wide variety of mode information by using a plurality of individual information display means to display corresponding to the mode information. In addition, due to the presence of a plurality of individual information display means, it is possible to make the display mode significantly different between when the display corresponding to the mode information is performed and when the display corresponding to the abnormal state is performed. .

Feature I6. When the display corresponding to the abnormal state is performed, the second information display control means controls, among the plurality of individual information display means, a predetermined individual information display means that does not enter a non-display state when the display corresponding to the mode information is performed. The gaming machine according to feature I5, wherein the information display means (the first information display device 201 and the second information display device 202) are set to a non-display state.

According to feature I6, the predetermined individual information display means, which is not in the non-display state when the display corresponding to the mode information is performed, is in the non-display state when the display corresponding to the abnormal state is performed. Thus, it is possible to clearly specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed only by grasping the type of the individual information display means in the non-display state. becomes possible.

Feature I7. The second information display control means, when performing a display corresponding to the abnormal state, selects a specific individual information display means (second 3 notification display device 203 and 4th notification display device 204) to be in the display state,
The display content of the specific individual information display means when the display corresponding to the abnormal state is performed can be displayed on the specific individual information display means when the display corresponding to the mode information is performed. The gaming machine according to feature I6.

According to the feature I7, the display contents that can be displayed when the display corresponding to the mode information is performed in the specific individual information display means can also be displayed when the display corresponding to the abnormal state is performed. It becomes possible not to restrict the display contents when the display corresponding to the information is performed. In addition, even if the specific individual information display means has a configuration in which the same display contents can be displayed in this way, when the display corresponding to the mode information is performed with the configuration of the feature I7, the non-display state does not occur. When the display corresponding to the abnormal state is performed by the predetermined individual information display means, it is in a non-display state, so it is possible to specify which display is being performed by the plurality of individual information display means.

Feature I8. The gaming machine according to feature I6 or I7, wherein the first information display control means puts each of the plurality of individual information display means into a display state when performing display corresponding to the mode information.

According to feature I8, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state. It is possible to make a clear distinction from the case where display is performed.

Feature I9. The first information display control means sequentially changes the display of the mode information on the information display means. The gaming machine according to any one of features I6 to I8, characterized in that it is not maintained at

According to feature I9, when the display corresponding to the mode information is performed, the predetermined individual information display means is not maintained in the non-display state. Thereby, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is being performed in the plurality of individual information display means regardless of the timing of confirming the plurality of individual information display means. becomes possible.

For the configuration of features I1 to I9, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group J>
Feature J1. History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game )When,
Information deriving means (steps S1402 to S1412 in the management side CPU 112 in the first embodiment) for deriving mode information corresponding to game results in a predetermined period by using the history information stored in the history storage means. , a function of executing the processing of step S1807 in the management side CPU 112 in the third embodiment, and a function of executing the processing of step S2107 in the management side CPU 112 in the fifth embodiment);
Information display means (first to third notification display devices 69a to 69c in the first to tenth embodiments, eleventh to third In the fourteenth embodiment, the first information display control means (function for executing display processing in the management side CPU 112) that controls the display of the first to fourth notification display devices 201 to 204),
with
The first information display control means sequentially changes the display corresponding to the mode information on the information display means, and the information display means is non-display even when changing the display corresponding to the mode information. A gaming machine characterized by preventing a state from being maintained.

According to the feature J1, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the mode information corresponding to the result of the game during the predetermined period is derived using the history information stored in the history storage means. Then, display corresponding to the mode information is performed by the information display means. As a result, it is possible to grasp the management result of the game history such as the occurrence frequency of the predetermined event. Further, when the display corresponding to the mode information is performed, the information display means is not maintained in the non-display state. This makes it possible to specify the display corresponding to the mode information regardless of the timing of checking the information display means.

Feature J2. As the information display means, individual information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to fourteenth In the embodiment, the game machine according to feature J1, characterized in that it comprises a plurality of first to fourth notification display devices 201 to 204).

According to the feature J2, it is possible to display a wide variety of mode information by using a plurality of individual information display means to display corresponding to the mode information.

Feature J3. The gaming machine according to feature J2, wherein the first information display control means brings each of the plurality of individual information display means into a display state when displaying corresponding to the mode information.

According to the feature J3, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state, and even when the display corresponding to the mode information is changed, the display state is maintained. maintained. This makes it easier to grasp the mode information.

Feature J4. The first information display control means is a part of the plurality of individual information display means, the individual information display means for type display (in the first to tenth embodiments, the first notification display device 69a, the eleventh In the 14th embodiment, a display corresponding to the type of the mode information to be displayed is performed on the first notification display device 201 and the second notification display device 202), and a plurality of the individual information display means Individual information display means for result display, which is a part of the results display device (second notification display device 69b and third notification display device 69c in the first to tenth embodiments, and the second notification display device 69c in the eleventh to fourteenth embodiments The gaming machine according to feature J2 or J3, characterized in that display corresponding to the content of the mode information to be displayed is performed in the third notification display device 203 and the fourth notification display device 204).

According to the characteristic J4, when the display corresponding to the mode information is performed, the display corresponding to the type of the mode information to be displayed is performed in the individual information display means for the type display, and the individual information for the result display is displayed. The display corresponding to the content of the mode information to be displayed is performed by the means. This makes it easier to grasp the mode information to be displayed.

For the configuration of features J1 to J4, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group K>
Features K1. History storage execution means (function for executing history setting processing in management side CPU 112) for storing history information of the corresponding game in history storage means (history memory 117) when a predetermined event occurs due to the execution of the game ),
The history storage execution means is a means for not storing the history information in the history storage means even if the predetermined event occurs in a restricted situation (a function of making a negative determination in step S3501 in the main CPU 63). ) is provided.

According to the feature K1, when a predetermined event occurs, the history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. In addition, since the history information is not stored even if the predetermined event occurs in the restricted situation, it is possible to prevent the history information from being stored in a situation where it is undesirable to store the history information. .

Feature K2. The gaming machine according to feature K1, wherein the restriction condition can occur as a condition from when the supply of operating power to the history storage execution means is started until a restriction cancellation event occurs.

According to the characteristic K2, it is possible to prevent the occurrence of the predetermined event due to the operation check immediately after the supply of operating power is started from being stored as history information.

Feature K3. means for setting the restricted condition when the supply of operating power to the history storage execution means is started and the restriction condition is satisfied (function for executing the process of step S3610 in the main CPU 63); ,
Means for not setting the restricted condition when the supply of operating power to the history storage execution means is started and the restriction condition is not satisfied (function for executing the process of step S3621 in the main CPU 63) When,
The gaming machine according to feature K2, characterized by comprising:

According to the feature K3, depending on whether or not the limiting condition is satisfied, there are cases where the limited state is set and cases where it is not set. This makes it possible to prevent the restricted status from being set as necessary.

Feature K4. The limited situation is characterized in that it can occur as a situation from when the supply of operating power to the history storage execution means is started until the number of game balls discharged from the game area becomes equal to or greater than a predetermined reference number. The game machine according to any one of K1 to K3.

According to the feature K4, it is possible to prevent the history information from being stored until the number of game balls discharged from the game area reaches a predetermined reference number or more after the supply of operating power is started.

Feature K5. When a predetermined event occurs as a result of the game being executed, game history information corresponding to the event is stored in history storage means (normal counter area 231, open/close execution mode counter area 232, high-frequency support mode counter area 233). History storage execution means for storing (function for executing normal ball entry management processing in the main side CPU 63, ball entry management processing during the opening/closing execution mode, and ball entry management processing during the high-frequency support mode);
information deriving means for deriving mode information corresponding to the result of a game in a predetermined period by using the history information stored in the history storage means (function for executing the processing of step S4208 in the main side CPU 63);
with
The gaming machine, wherein the information deriving means does not derive the mode information in a restricted situation.

According to the feature K5, when a predetermined event occurs, history information corresponding to it is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the mode information corresponding to the result of the game during the predetermined period is derived using the history information stored in the history storage means. As a result, it is possible to grasp the management result of the game history such as the occurrence frequency of the predetermined event. In addition, even if the predetermined event occurs in the restricted situation, the mode information is not derived. Therefore, it is possible to prevent the mode information from being derived in a situation where it is not desirable to derive the mode information. .

Feature K6. The gaming machine according to feature K5, wherein the restriction situation can occur as a situation from when the supply of operating power to the history storage execution means is started until a restriction cancellation event occurs.

According to the characteristic K6, it is possible to prevent the mode information from being derived using the history information based on the occurrence of the predetermined event in the operation check immediately after the supply of the operating power is started.

Feature K7. The limited situation is characterized in that it can occur as a situation from when the supply of operating power to the history storage execution means is started until the number of game balls discharged from the game area becomes equal to or greater than a predetermined reference number. A gaming machine according to K5 or K6.

According to the feature K7, it is possible to prevent the mode information from being derived until the number of game balls ejected from the game area reaches a predetermined reference number or more after the supply of operating power is started.

For the configuration of features K1 to K7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions according to the feature group G, the feature group H, the feature group I, the feature group J, and the feature group K, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machines such as those exemplified above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this respect.

<Characteristic group L>
Feature L1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process executing means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined processing executing means for executing the second predetermined processing among the various types of processing (function for executing management execution processing by the main side CPU 63 in the 15th to 21st embodiments);
At least one stored in the internal storage means when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed or when the situation becomes the situation where the second predetermined process is executed Saving execution means (in the fifteenth embodiment, a function of executing the processing of steps S3802 and steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment; the sixteenth In the embodiment, the function of executing the processing of step S4402 in the main CPU 63, in the seventeenth embodiment, the function of executing the processing of steps S4502 to S4507 in the main CPU 63, and in the eighteenth embodiment, the steps in the main CPU 63 A function of executing the processing of S4602, a function of executing the processing of steps S4701 and S4703 in the main CPU 63 in the nineteenth embodiment);
When or after the second predetermined process is terminated, the predetermined information saved in the predetermined storage means is restored to the internal storage means (in the fifteenth embodiment, steps S3804 and A function of executing the processing of steps S3910 to S3915, a function of executing the processing of step S4404 in the main CPU 63 in the sixteenth embodiment, and executing the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment. a function to execute the processing of step S4605 in the main CPU 63 in the eighteenth embodiment, and a function to execute the processing of steps S4705 and S4706 in the main CPU 63 in the nineteenth embodiment);
A game machine characterized by comprising:

According to feature L1, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least part of the information is saved in a predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is terminated, the information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process. From the above, it becomes possible to suitably perform various controls.

Feature L2. The gaming machine according to feature L1, wherein the predetermined information is part of the information stored in the internal storage means.

According to feature L2, only a part of the information stored in the internal storage means is saved in the predetermined storage means. can be suppressed.

Feature L3. The internal storage means includes first storage areas (WA register, BC register, DE register, HL register, IX register and IY register) and second storage areas (WA register, BC register, DE register, HL register, IX register and register other than the IY register),
The second predetermined process executing means stores information in the first storage area in the second predetermined process, but does not store information in the second storage area,
The gaming machine according to feature L2, wherein the save execution means saves the information stored in the first storage area to the predetermined storage means.

According to feature L3, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the second predetermined process is stored in the internal storage means. , the information in the first storage area to be stored is saved in the predetermined storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before execution of the second predetermined process. It is possible to reduce the storage capacity required for saving information in the storage means.

Feature L4. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
with
The game machine according to any one of features L1 to L3, wherein the save executing means saves the predetermined information to the second predetermined storage area.

According to feature L4, the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area. It is possible to make a clear difference. This makes it possible to prevent the information used in one of the first predetermined process and the second predetermined process from being erased when the other process is executed. In this case, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, at least part of the data stored in the internal storage means information is saved in the second predetermined storage area. As a result, it is possible to save the information in the internal storage means immediately before the second predetermined process is started, and to save the information without using the first predetermined storage area.

Feature L5. The save execution means is
in the first predetermined process, the first predetermined information, which is a part of the information stored in the internal storage means, when the situation changes from the state in which the first predetermined process is being executed to the state in which the second predetermined process is to be executed; means for saving to the first predetermined storage area (function of executing the processing of step S3802 in the main CPU 63 in the fifteenth embodiment, function of executing the processing of step S4402 in the main CPU 63 in the sixteenth embodiment); ,
second predetermined information, which is a part of the information stored in the internal storage means, is transferred to the second predetermined process when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is to be executed; In the 15th embodiment, the means for saving to the second predetermined storage area (the function of executing the processing of steps S3902 to S3907 in the main CPU 63 in the 17th embodiment, the a function of executing processing, a function of executing the processing of step S4602 in the main CPU 63 in the eighteenth embodiment, and a function of executing the processing of steps S4702 and S4703 in the main CPU 63 in the nineteenth embodiment;
The gaming machine according to feature L4, characterized by comprising:

According to the characteristic L5, the first predetermined information, which is a part of the information stored in the internal storage means, is saved in the first predetermined storage area by the first predetermined process, and the part of the information stored in the internal storage means is stored. is saved in the second predetermined storage area in the second predetermined process. As a result, it becomes possible to save each piece of information stored in the internal storage means at a suitable timing, and the processing for saving the information is distributed between the first predetermined processing and the second predetermined processing and executed. becomes possible.

Feature L6. The gaming machine according to feature L5, wherein the first predetermined information is information in a flag register provided in the internal storage means.

According to feature L6, it is possible to appropriately save the information in the flag register in the situation where the first predetermined process is being executed.

Feature L7. The second predetermined storage area is
a stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
a work area (work area 223 for non-specific control) in which information can be written and read by a load instruction;
with
The game machine according to any one of features L4 to L6, wherein the save execution means saves the predetermined information to one of the stack area and the work area.

According to feature L7, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the stack area in the second predetermined storage area and work area, at least part of the information stored in the internal storage means is saved. As a result, it is possible to consolidate the save destinations of information, and it is possible to simplify the processing configuration for saving and the processing configuration for restoring.

Feature L8. The game machine according to feature L7, wherein the save execution means saves the predetermined information to the work area.

According to feature L8, since the save destination of at least part of the information stored in the internal storage means is the work area, the information can be saved without cumulatively changing the stack pointer. Become.

Feature L9. The first predetermined storage area can store and read information when the first predetermined process is executed, and can read information when the second predetermined process is executed. inability to remember information,
The second predetermined storage area can store and read information when the second predetermined process is executed, and can read information when the first predetermined process is executed. The gaming machine according to any one of features L4 to L8, wherein information cannot be stored.

According to feature L9, the first predetermined storage area can be treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area can be treated as a dedicated storage area for the second predetermined process. becomes.

Feature L10. The predetermined storage means is
a stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
a work area (work area 223 for non-specific control) in which information can be written and read by a load instruction;
with
The game machine according to any one of features L1 to L9, wherein the save execution means saves the predetermined information to one of the stack area and the work area.

According to the feature L10, it is possible to consolidate the save destinations of the predetermined information, and it is possible to simplify the processing configuration for saving the predetermined information and the processing configuration for restoring the predetermined information.

Feature L11. The gaming machine according to feature L10, wherein the retraction executing means retracts the predetermined information to the work area.

According to feature L11, since the predetermined information is saved in the work area, the information can be saved without cumulatively changing the stack pointer.

Feature L12. The predetermined information is a part of information stored in the internal storage means,
The saving execution means stores the internal storage means when a situation where the first prescribed process is being executed changes to a situation where the second prescribed process is executed, or when a situation where the second prescribed process is executed is changed. The gaming machine according to feature L11, characterized by comprising a means (a function of executing the processing of step S3802 in the main CPU 63) for saving the specific information, which is a part of the information stored in the stack area, to the stack area. .

According to feature L12, the specific information is saved in the stack area in the configuration in which the predetermined information is saved in the work area. As a result, the information stored in the internal storage means can be distributed and saved in the work area and the stack area.

Feature L13. The gaming machine according to feature L12, wherein the predetermined information has a larger amount of information than the specific information.

According to feature L13, the predetermined information having a larger amount of information than the specific information is saved in the work area, so that a large amount of information is accumulated in the stack area when saving the information stored in the internal storage means. It is possible to prevent it from being lost.

Feature L14. Information of a stack pointer provided in the internal storage means when the situation where the first prescribed process is being executed changes to the situation where the second prescribed process is executed or when the situation becomes the situation where the second prescribed process is executed is a configuration that becomes fixed information,
The game machine according to any one of features L1 to L13, wherein the stack pointer information provided in the internal storage means is not subject to saving by the saving execution means.

According to feature L14, since it is not necessary to secure a capacity for saving stack pointer information in the predetermined storage means, it is possible to reduce the capacity of the predetermined storage means. Also, even with such a configuration in which the information of the stack pointer is not saved, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation where the second predetermined process is executed is changed. If this happens, the stack pointer information becomes fixed information. Therefore, even if the stack pointer information is not saved as described above, the stack pointer information before the second predetermined process is started can be restored. It is possible.

Feature L15. Means for setting the fixed information in the stack pointer when or after the second predetermined process is terminated (in the fifteenth embodiment, the function of executing the process of step S3909 in the main CPU 63; The gaming machine according to feature L14, characterized in that it has a function of executing the processing of step S4509 in the main side CPU 63 in the embodiment, and a function of executing the processing of step S4604 in the main side CPU 63 in the eighteenth embodiment. .

According to feature L15, when or after the second predetermined process is terminated, it is possible to restore the information of the stack pointer before the second predetermined process is started.

Feature L16. When the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed, or when the situation changes to the situation in which the second predetermined process is executed, the stack pointer changes to the second predetermined process. Means for setting corresponding second correspondence start information (function of executing the processing of step S3901 in the main CPU 63 in the fifteenth embodiment, function of executing the processing of step S4501 in the main CPU 63 in the seventeenth embodiment, In the eighteenth embodiment, the gaming machine according to feature L14 or L15 is provided with a function of executing the process of step S4601 in the main side CPU 63 .

According to the feature L16, when the second predetermined process is started, the second correspondence start information corresponding to the second predetermined process is set in the stack pointer, so that the appropriate address is set in the second predetermined process. Information can be stored in the stack area.

Feature L17. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features L1 to L16, wherein the second predetermined process includes a process for managing game history.

According to the feature L17, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature L18. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
with
The second predetermined storage area is a history storage area (normal counter area 231, open/close execution mode counter area 232) in which game history information corresponding to a predetermined event that occurs as a game is played is stored. , and a high frequency support mode counter area 233).

According to feature L18, when a predetermined event occurs, history information corresponding to that event is stored in the history storage area. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature L19. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature L18, characterized by comprising a function of executing the processing of

According to the characteristic L19, by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the occurrence frequency of the predetermined event. It becomes possible to grasp the result.

Feature L20. The gaming machine according to feature L19, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the characteristic L20, when the mode information corresponding to the game result in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

For the configuration of features L1 to L20, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group M>
Feature M1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process executing means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined processing executing means for executing the second predetermined processing among the various types of processing (function for executing management execution processing by the main side CPU 63 in the 15th to 21st embodiments);
At least one stored in the internal storage means when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed or when the situation becomes the situation where the second predetermined process is executed Saving execution means for saving predetermined information, which is part information, to a predetermined storage means (main RAM 65) (in the fifteenth embodiment, a function of executing the processing of steps S3902 to S3907 in the main CPU 63; in the seventeenth embodiment, In the eighteenth embodiment, the function of executing step S4602 in the main CPU 63. In the nineteenth embodiment, the main CPU 63 performs step S4701 and step function to execute the processing of S4703);
When or after the second predetermined process is finished, the return executing means (in the fifteenth embodiment, steps S3910 to A function of executing the processing of step S3915, a function of executing the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment, a function of executing the processing of step S4605 in the main CPU 63 in the eighteenth embodiment, In the nineteenth embodiment, the function of executing the processing of steps S4705 and S4706 in the main CPU 63);
with
The game machine, wherein the save execution means saves the predetermined information to the predetermined storage means by a load command.

According to the characteristic M1, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the information is stored in the internal storage means. Predetermined information, which is at least part of the information, is saved in a predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is terminated, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process. When the situation where the first prescribed process is being executed changes to the situation where the second prescribed process is executed or the situation where the second prescribed process is executed, the prescribed information is saved in the prescribed storage means by the load command. . This makes it possible to save the predetermined information without changing the stack pointer.

Feature M2. The predetermined storage means is
a stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
a work area (work area 223 for non-specific control) in which information can be written and read by a load instruction;
with
The gaming machine according to feature M1, wherein the retraction executing means retracts the predetermined information to the work area.

According to the feature M2, the save destination of the predetermined information, which is at least part of the information stored in the internal storage means, is the work area, so that the information is saved without cumulatively changing the stack pointer. becomes possible.

Feature M3. The predetermined information is a part of information stored in the internal storage means,
The saving execution means stores the internal storage means when a situation where the first prescribed process is being executed changes to a situation where the second prescribed process is executed, or when a situation where the second prescribed process is executed is changed. The gaming machine according to feature M2, further comprising means for saving specific information, which is a part of the information stored in the stack area, to the stack area (function for executing the processing of step S3802 in the main CPU 63). .

According to the feature M3, the specific information is saved in the stack area in the configuration in which the predetermined information is saved in the work area. As a result, the information stored in the internal storage means can be distributed and saved in the work area and the stack area.

Feature M4. The gaming machine according to feature M3, wherein the predetermined information has a larger amount of information than the specific information.

According to feature M4, the predetermined information having a larger amount of information than the specific information is saved in the work area, so that a large amount of information is accumulated in the stack area when the information stored in the internal storage means is saved. It is possible to prevent it from being lost.

Feature M5. The work area is
a first work area (work area 221 for specific control) in which information is stored when the first predetermined process is executed;
a second work area (work area 223 for non-specific control) in which information is stored when the second predetermined process is executed;
with
The game machine according to any one of features M2 to M4, wherein the save execution means saves the predetermined information to the second work area.

According to feature M5, the first work area and the second work area are provided in the work area, so that the information storage destination in the work area is clearly different between the first predetermined process and the second predetermined process. becomes possible. This makes it possible to prevent the information used in one of the first predetermined process and the second predetermined process from being erased when the other process is executed. In this case, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, at least part of the data stored in the internal storage means information is saved in the second work area. As a result, it is possible to save the information in the internal storage means immediately before the second predetermined process is started, and to save the information without using the first work area.

Feature M6. The first work area can store and read information when the first predetermined process is executed, and can read information when the second predetermined process is executed. inability to remember information,
The second work area is capable of storing and reading information when the second predetermined process is executed, and is capable of reading information when the first predetermined process is executed. The gaming machine according to feature M5, which is characterized in that information cannot be stored.

According to feature M6, the first work area can be treated as a dedicated storage area for the first predetermined process, and the second work area can be treated as a dedicated storage area for the second predetermined process. .

Feature M7. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process executing means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined processing executing means for executing the second predetermined processing among the various types of processing (function for executing management execution processing by the main side CPU 63 in the 15th to 21st embodiments);
At least one stored in the internal storage means when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed or when the situation becomes the situation where the second predetermined process is executed Saving execution means for saving predetermined information, which is part information, to a predetermined storage means (main RAM 65) (in the fifteenth embodiment, a function of executing the processing of steps S3902 to S3907 in the main CPU 63; in the seventeenth embodiment, In the eighteenth embodiment, the function of executing step S4602 in the main CPU 63. In the nineteenth embodiment, the main CPU 63 performs step S4701 and step function to execute the processing of S4703);
When or after the second predetermined process is finished, the return executing means (in the fifteenth embodiment, steps S3910 to A function of executing the processing of step S3915, a function of executing the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment, a function of executing the processing of step S4605 in the main CPU 63 in the eighteenth embodiment, In the nineteenth embodiment, the function of executing the processing of steps S4705 and S4706 in the main CPU 63);
with
The predetermined storage means is
a stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
a work area (work area 223 for non-specific control) in which information can be written and read by a load instruction;
with
The gaming machine, wherein the save executing means saves the predetermined information to one of the stack area and the work area.

According to feature M7, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, Predetermined information, which is at least part of the information, is saved in a predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is terminated, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process.

Further, when the situation changes from the situation in which the first prescribed process is being executed to the situation in which the second prescribed process is executed, or when the situation is changed to the situation in which the second prescribed process is executed, one of the stack area and the work area in the predetermined storage means , the predetermined information is saved. As a result, it is possible to consolidate the save destinations of information, and it is possible to simplify the processing configuration for saving and the processing configuration for restoring.

For the configuration of features M1 to M7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic N group>
Feature N1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process execution means for executing the first predetermined process among the various processes (function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined processing executing means for executing the second predetermined processing among the various types of processing (function for executing management execution processing by the main CPU 63 in the fifteenth to twenty-first embodiments);
with
The information of the stack pointer provided in the internal storage means is fixed information when the situation changes from the situation in which the first predetermined process is being executed to the situation in which the second predetermined process is to be executed. game machine.

According to the feature N1, when the situation changes from the state in which the first predetermined process is being executed to the state in which the second predetermined process is to be executed, the information of the stack pointer provided in the internal storage means becomes fixed information. It is not necessary to save the information of the stack pointer when starting the predetermined process. This eliminates the need to secure a storage area for saving stack pointer information. In addition, when the situation changes from the situation in which the first predetermined process is being executed to the situation in which the second predetermined process is to be executed, the information of the stack pointer becomes fixed information. However, it is possible to restore the information of the stack pointer before the second predetermined process is started.

Feature N2. Means for setting the fixed information in the stack pointer when or after the second predetermined process is terminated (in the fifteenth embodiment, the function of executing the process of step S3909 in the main CPU 63; The gaming machine according to feature N1, characterized in that it has a function of executing the processing of step S4509 in the main side CPU 63 in the embodiment, and a function of executing the processing of step S4604 in the main side CPU 63 in the eighteenth embodiment. .

According to feature N2, when or after the second predetermined process is terminated, it is possible to restore the information of the stack pointer before the second predetermined process is started.

Feature N3. Means (15th The function of executing the processing of step S3901 in the main CPU 63 in the embodiment, the function of executing the processing of step S4501 in the main CPU 63 in the seventeenth embodiment, and the processing of step S4601 in the main CPU 63 in the eighteenth embodiment. A gaming machine according to feature N1 or N2, characterized by comprising a function of executing

According to the feature N3, when the second predetermined process is started, the second correspondence start information corresponding to the second predetermined process is set in the stack pointer, so that the appropriate address is set in the second predetermined process. Information can be stored in the stack area.

Feature N4. At least one stored in the internal storage means when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed or when the situation becomes the situation where the second predetermined process is executed Saving execution means (in the fifteenth embodiment, a function of executing the processing of steps S3802 and steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment; the sixteenth In the embodiment, the function of executing the processing of step S4402 in the main CPU 63, in the seventeenth embodiment, the function of executing the processing of steps S4502 to S4507 in the main CPU 63, and in the eighteenth embodiment, the steps in the main CPU 63 A function of executing the processing of S4602, a function of executing the processing of steps S4701 and S4703 in the main CPU 63 in the nineteenth embodiment);
When or after the second predetermined process is terminated, the predetermined information saved in the predetermined storage means is restored to the internal storage means (in the fifteenth embodiment, steps S3804 and A function of executing the processing of steps S3910 to S3915, a function of executing the processing of step S4404 in the main CPU 63 in the sixteenth embodiment, and executing the processing of steps S4510 to S4515 in the main CPU 63 in the seventeenth embodiment. a function to execute the processing of step S4605 in the main CPU 63 in the eighteenth embodiment, and a function to execute the processing of steps S4705 and S4706 in the main CPU 63 in the nineteenth embodiment);
with
The game machine according to any one of features N1 to N3, wherein the information of the stack pointer provided in the internal storage means is not subject to saving by the saving execution means.

According to feature N4, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the information is stored in the internal storage means. At least part of the information is saved in a predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is terminated, the information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process. Also, since the information of the stack pointer is not saved, it is not necessary to secure a capacity for saving the information of the stack pointer in the predetermined storage means. Therefore, it is possible to suppress the capacity of the predetermined storage means. Also, even with such a configuration in which the information of the stack pointer is not saved, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation where the second predetermined process is executed is changed. If this happens, the stack pointer information becomes fixed information. Therefore, even if the stack pointer information is not saved as described above, the stack pointer information before the second predetermined process is started can be restored. It is possible.

Feature N5. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
with
The gaming machine according to feature N4, wherein the save executing means saves the predetermined information to the second predetermined storage area.

According to feature N5, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the storage destination of the information in the predetermined storage means is determined by the first predetermined process and the second predetermined process. It is possible to make a clear difference. This makes it possible to prevent the information used in one of the first predetermined process and the second predetermined process from being erased when the other process is executed. In this case, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, at least part of the data stored in the internal storage means information is saved in the second predetermined storage area. As a result, it is possible to save the information in the internal storage means immediately before the second predetermined process is started, and to save the information without using the first predetermined storage area.

Feature N6. The first predetermined storage area is capable of storing and reading information when the first predetermined process is executed, and is capable of reading information when the second predetermined process is executed. Inability to remember information about things,
The second predetermined storage area is capable of storing and reading information when the second predetermined process is executed, and is capable of reading information when the first predetermined process is executed. The gaming machine according to feature N5, characterized in that it is impossible to store information on things.

According to feature N6, the first predetermined storage area can be treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area can be treated as a dedicated storage area for the second predetermined process. becomes.

For the configuration of features N1 to N6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group O>
Features O1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process executing means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined processing executing means for executing the second predetermined processing among the various types of processing (function for executing management execution processing by the main side CPU 63 in the 15th to 21st embodiments);
At least part of the storage in the internal storage means when the situation changes from the situation in which the first predetermined process is being executed to the situation in which the second predetermined process is executed, or when the situation is changed to the situation in which the second predetermined process is executed. First state setting means (main side CPU 63 performs steps S4803 to S4808) to set the state of predetermined storage areas (WA register, BC register, DE register, HL register, IX register and IY register) to predetermined states. function) and
a second state setting means (a function of executing the processing of steps S4903 to S4908 in the main CPU 63) that sets the state of the predetermined storage area to the predetermined state when or after the second predetermined process is finished;
A game machine characterized by comprising:

According to feature O1, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the predetermined storage area of the internal storage means is set to the predetermined state, and the state of the predetermined storage area is set to the predetermined state again when or after the second predetermined process is finished. As a result, the state of the predetermined storage area can be set to the predetermined state before and after the second predetermined process. Therefore, it is possible to prevent the state of the predetermined storage area due to one of the first predetermined process and the second predetermined process from affecting the other process. From the above, it becomes possible to suitably perform various controls.

Feature O2. The gaming machine according to feature O1, wherein the predetermined state is a state when supply of operating power to the control means is started.

According to the characteristic O2, the predetermined storage area is set to the state when the supply of operating power to the control means is started as the predetermined state, so that the processing configuration for setting the predetermined state is simplified. becomes possible.

Feature O3. The gaming machine according to feature O1 or O2, wherein the predetermined state is a state in which the predetermined storage area is cleared to "0".

According to feature O3, the predetermined storage area is set to a state cleared to "0" as the predetermined state, so the processing configuration for setting the predetermined state can be simplified.

Feature O4. The gaming machine according to any one of features O1 to O3, wherein the predetermined storage area is a partial storage area in the internal storage means.

According to feature O4, only a part of the storage area of the internal storage means is set to the predetermined state, so it is possible to reduce the processing load for setting the predetermined state.

Feature O5. The internal storage means comprises at least the predetermined storage area and another storage area (registers other than the WA register, BC register, DE register, HL register, IX register and IY register),
The second predetermined process executing means stores information in the predetermined storage area in the second predetermined process, but does not store information in the separate storage area,
The gaming machine according to feature O4, wherein the first state setting means and the second state setting means are configured so as not to change the state of the separate storage area.

According to feature O5, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the second predetermined process is stored in the internal storage means. , a predetermined storage area for storing information is set to a predetermined state. This makes it possible to prevent the state of the predetermined storage area resulting from the first predetermined process from affecting the second predetermined process. Further, since the state of the separate storage area is not changed, setting the predetermined state when the second predetermined processing is started does not affect the processing after the second predetermined processing is finished. It becomes possible.

Feature O6. The information in the predetermined storage area before the predetermined state is set by the first state setting means is information that is not used after the second predetermined process is completed. 1. The gaming machine according to any one of the above.

According to the feature O6, even if the predetermined storage area is set to the predetermined state in the case where the second predetermined process is to be executed, or the second predetermined process is to be executed, the second predetermined process ends. It is possible to avoid affecting the subsequent processing.

Feature O7. A portion stored in the internal storage means when the situation where the first prescribed process is being executed changes to the situation where the second prescribed process is executed or when the situation becomes the situation where the second prescribed process is executed Saving execution means (function for executing the process of step S4802 in the main CPU 63) for saving predetermined information (flag register information), which is the information of the
Return executing means for returning the predetermined information saved in the predetermined storage means to the internal storage means when or after the second predetermined process is terminated (function for executing the process of step S4810 in the main CPU 63) When,
The gaming machine according to any one of features O1 to O6, characterized by comprising:

According to feature O7, when the situation changes from the situation in which the first prescribed process is being executed to the situation in which the second prescribed process is executed, or when the situation is changed to the situation in which the second prescribed process is executed, the internal storage means stores Predetermined information, which is part of the information, is saved in a predetermined storage means. As a result, when the second predetermined process is executed, the information stored in the internal storage means upon execution of the first predetermined process, which is necessary for subsequent execution of the first predetermined process, is rewritten. It is possible to prevent Further, when or after the second predetermined process is terminated, the predetermined information saved in the predetermined storage means is restored to the internal storage means. Thereby, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process.

Feature O8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features O1 to O7, wherein the second predetermined process includes a process for managing a game history.

According to feature O8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature O9. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
with
The second predetermined storage area is a history storage area (normal counter area 231, open/close execution mode counter area 232) in which game history information corresponding to a predetermined event that occurs as a game is played is stored. , and a high frequency support mode counter area 233).

According to feature O9, when a predetermined event occurs, history information corresponding to that event is stored in the history storage area. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature O10. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature O9, characterized by comprising a function of executing the process of

According to the characteristic O10, by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the occurrence frequency of the predetermined event. It becomes possible to grasp the result.

Feature O11. The gaming machine according to feature O10, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the characteristic O11, when the mode information corresponding to the game result in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

For the configuration of features O1 to O11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic P group>
Feature P1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process executing means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-first embodiments);
a second predetermined processing executing means for executing the second predetermined processing among the various types of processing (function for executing management execution processing by the main side CPU 63 in the 15th to 21st embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
A game machine characterized by comprising:

According to feature P1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. This makes it possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when one of the first predetermined process and the second predetermined process is executed, it is possible to prevent the information used in the other process from being erased.

Feature P2. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to feature P1, wherein the second predetermined process includes a process for managing a game history.

According to the feature P2, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature P3. The second predetermined storage area is a history storage area (normal counter area 231, open/close execution mode counter area 232) in which game history information corresponding to a predetermined event that occurs as a game is played is stored. , and a high frequency support mode counter area 233).

According to feature P3, when a predetermined event occurs, history information corresponding to that event is stored in the history storage area. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature P4. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature P3, characterized in that it has a function of executing the processing of

According to the characteristic P4, by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the occurrence frequency of the predetermined event is performed. It becomes possible to grasp the result.

Feature P5. The gaming machine according to feature P4, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the feature P5, when the mode information corresponding to the result of the game in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

Feature P6. in the first predetermined process, the first predetermined information, which is a part of the information stored in the internal storage means, when the situation changes from the state in which the first predetermined process is being executed to the state in which the second predetermined process is to be executed; A first saving means for saving to the first predetermined storage area (a function of executing the processing of step S3802 in the main CPU 63 in the fifteenth embodiment, and executing the processing of step S4402 in the main CPU 63 in the sixteenth embodiment) function) and
second predetermined information, which is a part of the information stored in the internal storage means, is transferred to the second predetermined process when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is to be executed; , the second saving means for saving to the second predetermined storage area (in the fifteenth embodiment, the function of executing the processing of steps S3902 to S3907 in the main CPU 63; in the seventeenth embodiment, steps S4502 to S4502 in the main CPU 63 A function of executing the processing of step S4507, a function of executing the processing of step S4602 in the main CPU 63 in the eighteenth embodiment, and a function of executing the processing of steps S4701 and S4703 in the main CPU 63 in the nineteenth embodiment) When,
The gaming machine according to any one of features P1 to P5, characterized by comprising:

According to feature P6, the first predetermined information, which is part of the information stored in the internal storage means, is saved in the first predetermined storage area in the first predetermined process, and the part of the information stored in the internal storage means is stored. is saved in the second predetermined storage area in the second predetermined process. As a result, it becomes possible to save each piece of information stored in the internal storage means at a suitable timing, and the processing for saving the information is distributed between the first predetermined processing and the second predetermined processing and executed. becomes possible.

Feature P7. When or after the second predetermined processing is finished, a first restoration executing means (main in the fifteenth embodiment) for restoring the first predetermined information saved in the first predetermined storage area to the internal storage means. the function of executing the processing of step S3804 in the side CPU 63, the function of executing the processing of step S4404 in the main side CPU 63 in the sixteenth embodiment);
Second restoration execution means (main in the fifteenth embodiment) for restoring the second predetermined information saved in the second predetermined storage area to the internal storage means when or after the second predetermined processing is completed. A function of executing the processing of steps S3910 to S3915 in the side CPU 63; a function of executing processing (a function of executing the processing of steps S4705 and S4706 in the main CPU 63 in the nineteenth embodiment);
The gaming machine according to feature P6, characterized by comprising:

According to feature P7, when or after the second predetermined processing is finished, the first predetermined information saved in the first predetermined storage area is restored to the internal storage means, and the second predetermined information saved in the second predetermined storage area is returned to the internal storage means. Since the second predetermined information is restored to the internal storage means, it is possible to restore the state of the internal storage means to the state before the second predetermined process was started.

Feature P8. The gaming machine according to feature P6 or P7, wherein the first predetermined information includes information of a flag register provided in the internal storage means.

According to feature P8, it is possible to appropriately save the information in the flag register in the situation where the first predetermined process is being executed.

Feature P9. The gaming machine according to any one of features P6 to P8, wherein the second predetermined information includes information of all registers of the internal storage means.

According to feature P9, since the information of all the registers of the internal storage means is collectively saved, there is no need to selectively save the information of the registers.

Feature P10. The second predetermined storage area is
a stack area (stack area 224 for non-specific control) where information is written by a push instruction and information is read by a pop instruction;
a work area (work area 223 for non-specific control) in which information is written and read by a load instruction;
with
The gaming machine according to feature P9, wherein the second save execution means saves the second predetermined information to one of the stack area and the work area.

According to feature P10, information in all registers of the internal storage means is saved in one of the stack area and work area in the second predetermined storage area. As a result, it is possible to aggregate the save destinations of the information of all the registers, and it is possible to simplify the processing configuration for saving and the processing configuration for restoring.

Feature P11. The gaming machine according to feature P10, wherein the second saving executing means saves the second predetermined information to the stack area.

According to feature P11, it is possible to save information in all registers while not using the work area.

Feature P12. The gaming machine according to any one of features P6 to P11, wherein the second predetermined information includes information of a stack pointer of the internal storage means.

According to the feature P12, it is possible to appropriately save the information of the stack pointer in the situation where the first predetermined process is being executed.

For the configuration of features P1 to P12, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions relating to the feature group L, the feature group M, the feature group N, the feature group O, and the feature group P, the following problems can be solved.

Pachinko game machines, slot machines, and the like are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the game machines such as those exemplified above, it is necessary to perform various controls appropriately, and there is still room for improvement in this regard.

<Characteristic Q group>
Feature Q1. Control means (MPU 62) that executes various processes and temporarily stores information in internal storage means (registers of the main CPU 63) when executing the processes;
History storage means (management RAM 241) provided as a separate chip from the control means and capable of temporarily storing information;
with
The control means is a history storage execution means (ordinary ball entry management processing in the main side CPU 63, A gaming machine characterized by comprising a function of executing ball entry management processing during the opening/closing execution mode and ball entry management processing during the high-frequency support mode.

According to feature Q1, when a predetermined event occurs, history information corresponding to that event is stored in the history storage means. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Also, since the history storage means is provided as a separate chip from the control means, it is possible to increase the storage capacity for storing history information while using general-purpose control means.

Feature Q2. The game machine according to feature Q1, wherein the control means comprises predetermined storage means (main side RAM 65) for temporarily storing information when executing various kinds of processing.

According to feature Q2, in a configuration having history storage means provided as a separate chip from the control means in addition to the predetermined storage means provided in the control means, by storing history information in the history storage means It becomes possible to store and hold a large amount of history information.

Feature Q3. The gaming machine according to feature Q2, wherein the control means temporarily stores the information in the predetermined storage means when executing the processing related to the history information.

According to feature Q3, in a configuration in which history storage means for storing history information is provided as a chip separate from the control means, when executing processing related to the history information, the predetermined storage means provided in the control means Since the information is temporarily stored, it is possible to prevent the processing speed from being extremely lowered when executing the processing related to the history information.

Feature Q4. The control means utilizes the history information stored in the history storage means to derive the mode information corresponding to the result of the game during a predetermined period of time. The gaming machine according to any one of features Q1 to Q3, characterized in that it has a function of

According to the feature Q4, by using the history information stored in the history storage means to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the occurrence frequency of the predetermined event is performed. It becomes possible to grasp the result.

Feature Q5. The gaming machine according to feature Q4, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the feature Q5, when the mode information corresponding to the game result in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing.

For the configuration of features Q1 to Q5, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the characteristic group Q, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machines such as those exemplified above, it is necessary to appropriately manage the gaming machines, and there is still room for improvement in this regard.

<Characteristic group R>
Feature R1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
When the supply of operating power to the control means having the setting means is started, the use target by the setting means is based on the occurrence of a plurality of events including a first event and a second event. Situation generation means for making it possible to set a set value (in the twenty-second embodiment, a function of executing the processing of steps S5003 to S5006 in the main CPU 63; in another form, the main CPU 63 In the 23rd embodiment, the function of executing the processing of steps S5703 to S5705 and S5715 in the main CPU 63);
A game machine characterized by comprising:

According to the feature R1, since the set value to be used is set from a plurality of stages of set values corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that In this case, in order to set the set value to be used, a plurality of events including a first event and a second event occur when the supply of operating power to the control means is started. must have. As a result, it is possible to make it difficult to illegally force the user to set the setting value to be used.

Feature R2. Open grasping means for grasping that the opening/closing body (front door frame 14) is in the open state (in the twenty-second embodiment, the function of executing the processing of step S5005 in the main CPU 63; in another embodiment, the step A function of executing the processing of S5505, a function of executing the processing of step S5703 in the main CPU 63 in the twenty-third embodiment),
Characteristic feature R1 characterized in that the situation generating means specifies that the first event has occurred based on the fact that the open/close body is in an open state, which is grasped by the open grasping means. The gaming machine described in .

According to feature R2, the opening/closing member must be in an open state in order to set the set value to be used. As a result, when an act of illegally setting a setting value to be used is performed, the illegal act can be made conspicuous, and as a result, the illegal act can be easily discovered. .

Feature R3. Separate opening grasping means for grasping that the separate opening/closing body (game machine main body 12) is in the open state (in the twenty-second embodiment, the function of executing the processing of step S5006 in the main CPU 63; in another form, the main CPU 63 In the twenty-third embodiment, the function of executing step S5704 in the main CPU 63) is provided,
The situation generating means identifies that the second event has occurred based on the fact that the separate opening/closing body is in an open state, which is grasped by the separate opening grasping means. The gaming machine according to feature R2.

According to feature R3, in order to set the set value to be used, it is necessary to open not only the opening/closing body but also the other opening/closing body. As a result, it is possible to make it difficult to illegally force the user to set the setting values to be used, and to make the illegality conspicuous.

Feature R4. The setting means performs at least one of selection of the setting value to be used and setting of the setting value to be used based on the operation of the predetermined operation means (update button 68b, reset button 68c). is a configuration that does
The game machine according to feature R2 or R3, wherein the predetermined operating means is configured to be operable by opening the separate opening/closing body.

According to the characteristic R4, the set value to be used cannot be set unless the opening/closing body different from the separate opening/closing body that is opened to enable the operation of the predetermined operation means is opened. As a result, it is possible to make it difficult to illegally force the user to set the setting values to be used, and to make the illegality conspicuous.

Feature R5. The opening and closing body defines the front side of the game machine in the game area where the game ball flows down,
The game machine according to any one of features R2 to R4, wherein the game area is opened in front of the game machine by opening the opening/closing body.

According to the feature R5, in order to set the set value to be used, it is necessary to open the game area in front of the gaming machine by opening the opening/closing body. As a result, it is possible to make it difficult to illegally force the user to set the setting values to be used, and to make the illegality conspicuous.

Feature R6. The situation generating means identifies that one of the plurality of events has occurred based on the fact that a predetermined operation is performed on the setting key inserting portion (setting key inserting portion 68a) with the setting key. The gaming machine according to any one of features R1 to R5, characterized by:

According to the characteristic R6, in order to set the setting value to be used, it is necessary not only to perform a predetermined operation with the setting key in the setting key insertion section but also to generate an event other than that. be. As a result, it is possible to make it difficult to illegally force the user to set the setting value to be used.

Feature R7. The situation generation means generates the plurality of events based on the occurrence of a predetermined game event (operation of the shooting operation device 28, entry of the ball into the through gate 35) that occurs when a game is played. The gaming machine according to any one of features R1 to R6, wherein it is specified that one of the events is occurring.

According to the feature R7, in order to set the set value to be used, it is necessary not only to generate a predetermined game event that occurs when the game is played, but also to event must be generated. As a result, it is possible to make it difficult to illegally force the user to set the setting value to be used.

Feature R8. The situation generating means is based on the game ball being detected by the ball entering detection means (gate detection sensor 49a) for detecting that the game ball has entered a predetermined ball entering portion provided in the game area. , the gaming machine according to any one of features R1 to R7, wherein it is specified that one of the plurality of events has occurred.

According to the feature R8, in order to set the set value to be used, it is necessary to enter the game ball into a predetermined ball entering section, and to generate an event different from that. There is As a result, it is possible to make it difficult to illegally force the user to set the setting value to be used.

Feature R9. setting value notification means (function for executing setting confirmation processing in the main side CPU 63) that causes the notification means to notify the setting value to be used set by the setting means;
The set value notification means notifies the notification means of the set value to be used set by the setting means based on the occurrence of a plurality of events including the first event and the second event. The game machine according to any one of features R1 to R8, characterized in that it is notified by

According to the feature R9, it is possible to make it difficult to check the set value by fraud. In addition, the manager of the game hall can generate the first event and the second event regardless of whether the setting value to be used is set or the setting value is confirmed. It becomes easy to grasp each work because it is standardized.

Feature R10. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
A plurality of events including both that a predetermined operation is being performed by a setting key on a setting key insertion portion (setting key insertion portion 68a) and another event that is different from the predetermined operation by the setting key on the setting key insertion portion. Situation generation means (in the 22nd embodiment, the main side CPU 63 in the A function of executing the processes of steps S5003 to S5006, in another form, a function of executing the processes of steps S5503 to S5507 in the main CPU 63, and in the twenty-third embodiment, the functions of steps S5703 to S5705 and S5715 in the main CPU 63 function to perform processing) and
A game machine characterized by comprising:

According to the feature R10, since the set value to be used is set from a plurality of stages of set values corresponding to the player's advantage, the set value more advantageous to the player is used. It is expected that In this case, in order to set the setting value to be used, it is necessary to generate an event other than performing a predetermined operation with the setting key in the setting key insertion portion. As a result, it is possible to make it difficult to illegally force the user to set the setting value to be used.

Feature R11. Open grasping means for grasping that the opening/closing body (front door frame 14) is in the open state (in the twenty-second embodiment, the function of executing the processing of step S5005 in the main CPU 63; in another embodiment, the step A function of executing the processing of S5505, a function of executing the processing of step S5703 in the main CPU 63 in the twenty-third embodiment),
Characteristic feature R10, wherein the situation generating means specifies that the other event has occurred based on the fact that the opening grasping means grasps that the opening/closing body is in an open state. The game machine described.

According to the feature R11, the opening/closing member must be in an open state in order to set the set value to be used. As a result, when an act of illegally setting a setting value to be used is performed, the illegal act can be made conspicuous, and as a result, the illegal act can be easily discovered. .

Feature R12. Separate opening grasping means for grasping that the separate opening/closing body (game machine main body 12) is in the open state (in the twenty-second embodiment, the function of executing the processing of step S5006 in the main CPU 63; in another form, the main CPU 63 In the twenty-third embodiment, the function of executing step S5704 in the main CPU 63) is provided,
The situation generating means specifies that one of the plurality of events has occurred based on the fact that the separate opening/closing member is in an open state by the separate opening grasping means. The gaming machine according to feature R11, characterized by:

According to feature R12, in order to set the set value to be used, it is necessary to open not only the opening/closing body but also the other opening/closing body. As a result, it is possible to make it difficult to illegally force the user to set the setting values to be used, and to make the illegality conspicuous.

Feature R13. The setting means performs at least one of selection of the setting value to be used and setting of the setting value to be used based on the operation of the predetermined operation means (update button 68b, reset button 68c). is a configuration that does
The game machine according to feature R11 or R12, wherein the predetermined operating means is configured to be operable by opening the separate opening/closing body.

According to the feature R13, the set value to be used cannot be set unless the opening/closing body different from the separate opening/closing body that is opened in order to enable the operation of the predetermined operation means is opened. As a result, it is possible to make it difficult to illegally force the user to set the setting values to be used, and to make the illegality conspicuous.

Feature R14. The opening and closing body defines the front side of the game machine in the game area where the game ball flows down,
The game machine according to any one of features R11 to R13, wherein the game area is opened in front of the game machine by opening the opening/closing body.

According to the characteristic R14, in order to set the set value to be used, it is necessary to open the game area in front of the gaming machine by opening the opening/closing body. As a result, it is possible to make it difficult to illegally force the user to set the setting values to be used, and to make the illegality conspicuous.

Feature R15. The situation generation means generates the plurality of events based on the occurrence of a predetermined game event (operation of the shooting operation device 28, entry of the ball into the through gate 35) that occurs when a game is played. The gaming machine according to any one of features R10 to R14, wherein it is specified that one of the events has occurred.

According to the feature R15, in order to set the setting value to be used, not only is the predetermined operation performed by the setting key on the setting key insertion portion, but also the predetermined operation generated when the game is played is performed. game event must be generated. As a result, it is possible to make it difficult to illegally force the user to set the setting value to be used.

Feature R16. The situation generating means is based on the game ball being detected by the ball entering detection means (gate detection sensor 49a) for detecting that the game ball has entered a predetermined ball entering portion provided in the game area. , The gaming machine according to any one of the features R10 to R15, wherein it is specified that one of the plurality of events has occurred.

According to the characteristic R16, in order to set the setting value to be used, not only a predetermined operation is performed with the setting key for the setting key inserting portion, but also a game ball is inserted into a predetermined ball entering portion. I need to ball. As a result, it is possible to make it difficult to illegally force the user to set the setting value to be used.

Feature R17. setting value notification means (function for executing setting confirmation processing in the main side CPU 63) that causes the notification means to notify the setting value to be used set by the setting means;
The set value notifying means is configured to notify the setting means based on the occurrence of a plurality of events including both the predetermined operation by the setting key on the setting key insertion portion and the occurrence of the other event. The game machine according to any one of features R10 to R16, wherein the notifying means notifies the set value to be used set by the controller.

According to the feature R17, it is possible to make it difficult to check the set value by fraud. In addition, the manager of the game hall performs a predetermined operation with the setting key on the setting key insertion part and generates another event when setting the setting value to be used and when confirming the setting value. Therefore, the work is standardized and each work can be easily grasped.

For the configuration of features R1 to R17, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the characteristic group R, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machines such as those exemplified above, it is necessary to deal with fraudulent actions against the gaming machines, and there is still room for improvement in this respect.

<Feature S group>
Feature S1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
Situation generating means (in the twenty-second embodiment, step S5003 to step S5006 and step S5401 to A function of executing the processing of step S5408, in another form, a function of executing the processing of steps S5503 to S5507 in the main CPU 63, and in the twenty-third embodiment, executing the processing of steps S5703 to S5705 and S5715 in the main CPU 63 a function to execute the processing of steps S5801 to S5804 in the main CPU 63 in the twenty-fourth embodiment, and a function to execute the processing of steps S5901 to S5904 in the main CPU 63 in the twenty-fifth embodiment);
Setting value grasping means for grasping whether or not the setting value before the settable state is the same as the setting value set by the setting means (step S5017 in the main CPU 63 in the 22nd embodiment) and a function of executing the processing of steps S5111 to S5112, in another form a function of executing the processing of steps S5611 to S5612 in the main CPU 63);
A game machine characterized by comprising:

According to the feature S1, since the set value to be used is set from a plurality of stages of set values corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that In this case, it is determined whether or not the set value before entering the settable state and the set value set in the settable state are the same. This makes it possible to execute processing corresponding to whether or not the set values are the same across the settable state. Therefore, when the setting value to be used is set, it is possible to create a favorable situation for the setting result, and it is possible to suitably perform the work of setting the setting value.

Feature S2. When the set value grasping means grasps that the set value before the settable state is the same as the set value set by the setting means, simultaneous processing corresponding thereto is performed. Simultaneous means (a function of executing the process of step S5113 in the main side CPU 63 in the twenty-second embodiment, a function of executing the process of step S5613 in the main side CPU 63 in another form) to be executed The gaming machine according to feature S1, characterized by:

According to the feature S2, when the set values are the same across the settable state, simultaneous processing is executed, so that it is possible to create a favorable situation for the set values being the same. Become.

Feature S3. The gaming machine according to feature S2, wherein the simultaneous means executes, as the simultaneous processing, processing for notifying that the set value has not been changed.

According to the feature S3, it is possible to notify the manager of the game hall that the setting values are the same across the settable state.

Feature S4. When the set value grasping means grasps that the set value before the settable state is different from the set value set by the setting means, non-simultaneous processing corresponding thereto is executed. non-simultaneous means (in the twenty-second embodiment, a function of executing the processing of step S5114 in the main CPU 63; in another form, a function of executing the processing of step S5614 in the main CPU 63) The game machine according to any one of features S1 to S3, characterized by:

According to the feature S4, when the set values are not the same across the settable state, the non-simultaneous processing is executed, so that it is possible to create a favorable situation in response to the change of the set values. becomes.

Feature S5. The gaming machine according to feature S4, wherein the non-simultaneous time means executes, as the non-simultaneous time processing, a process for notifying that the set value has been changed. .

According to the feature S5, it is possible to notify the manager of the game hall that the set value has been changed across the settable state.

Feature S6. The situation generation means detects the setting value based on the necessity of erasing the information in the storage means for storing the setting value after the supply of operating power to the control means having the setting means is started. The gaming machine according to any one of features S1 to S5, characterized in that it is designed to make possible situations.

According to the feature S6, when it becomes necessary to erase the information in the storage means for storing the setting value, the setting becomes possible, so the game is not continued even though the information of the setting value is erased. It is possible to prevent In this case, with the configuration of feature S1, it is determined whether or not the set value before the settable state is the same as the set value set in the settable state. This makes it possible to execute processing corresponding to whether or not the set values are the same across the settable state.

Feature S7. The setting value is not changed based on the setting value grasping means grasping that the setting value before the settable state and the setting value set by the setting means are the same. (In the twenty-second embodiment, the function of executing the processing of step S5113 in the main CPU 63, in another form, the function of executing the processing of step S5613 in the main CPU 63) is provided. The gaming machine according to feature S6, characterized by comprising:

According to the feature S7, even if a setting enabled state occurs as a result of the erasing of the information in the storage means, the setting value is changed if the setting value remains the same across the setting enabled state. A notification corresponding to the failure is made. As a result, it is possible to inform the player that the set value has not been changed even if the setting becomes possible in the middle of the game, so that the player can feel safe even if the setting becomes possible in the middle of the game. It is possible to continue the game with care.

Feature S8. The situation generating means is
A first situation generation means (in the twenty-second embodiment, steps S5003 to A function of executing the processing of step S5006, in another form, a function of executing the processing of steps S5503 to S5507 in the main CPU 63, and in the twenty-third embodiment, executing the processing of steps S5703 to S5705 and S5715 in the main CPU 63 function) and
A second situation in which the settable situation is brought about based on the need to erase information in the storage means for storing the set value after the supply of operating power to the control means is started. Generation means (in the 22nd embodiment, the function of executing the processing of steps S5401 to S5408 in the main CPU 63; in the 24th embodiment, the function of executing the processing of steps S5801 to S5804 in the main CPU 63; In the embodiment, the function of executing the processing of steps S5901 to S5904 in the main CPU 63);
with
The set value grasping means, regardless of whether the settable situation is caused by the first situation generating means or the settable situation is caused by the second situation generating means, The gaming machine according to any one of features S1 to S7, characterized in that it is determined whether or not the set value in and the set value set by the setting means are the same.

According to the feature S8, when it becomes necessary to erase the information in the storage means for storing the setting value, the setting becomes possible, so the game is not continued even though the information of the setting value is erased. It is possible to prevent In this case, the same processing as in the case where the settable state is reached based on the start of supply of operating power to the control means is used to erase the settable state as the information in the storage means is erased. occurs, it is possible to execute processing corresponding to whether or not the set values are the same across the settable state.

In addition, for the configuration of features S1 to S8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the group of features S, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machine as exemplified above, when the set value that determines the advantage of the gaming machine is set, it is necessary to create a favorable situation for it. There is room for

<Characteristic T group>
Feature T1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process executing means for executing the first predetermined process among the various processes (a function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to twenty-fifth embodiments);
a second predetermined process executing means for executing the second predetermined process among the various processes (function for executing the management execution process by the main CPU 63 in the fifteenth to twenty-fifth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
First monitoring execution means for monitoring whether or not the first predetermined storage area is normal (in the twenty-second embodiment, the function of executing the processing of steps S5401 to S5404 in the main CPU 63; in the twenty-fourth embodiment, The function of executing the processing of steps S5801 to S5804 in the main CPU 63, the function of executing the processing of steps S5901 to S5904 in the main CPU 63 in the twenty-fifth embodiment, and the step S7701 in the main CPU 63 in the thirty-second embodiment. ~ a function to execute the processing of step S7703);
Second monitoring execution means for monitoring whether or not the second predetermined storage area is normal (in the twenty-second embodiment, the function of executing the processing of steps S5405 to S5408 in the main CPU 63; in the twenty-fourth embodiment, A function of executing the processes of steps S5809, S5810, S5812 and S5813 in the main CPU 63, a function of executing the processes of steps S6101, S6102, S6105 and S6106 in the main CPU 63 in the twenty-fifth embodiment, In the thirty-second embodiment, the function of executing the processing of steps S7706 to S7708 in the main CPU 63);
A game machine characterized by comprising:

According to feature T1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. This makes it possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when one of the first predetermined process and the second predetermined process is executed, it is possible to prevent the information used in the other process from being erased. Further, by monitoring whether the first predetermined storage area is normal and monitoring whether the second predetermined storage area is normal, the first predetermined processing and the second predetermined processing are performed. It is possible to specify whether or not the situation is such that each of the processes can be performed normally.

Feature T2. The game according to feature T1, wherein the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are executed in either one of the first predetermined process and the second predetermined process. machine.

According to feature T2, monitoring whether the first predetermined storage area is normal and monitoring whether the second predetermined storage area is normal are one of the first predetermined process and the second predetermined process. Executed in aggregate. This makes it possible to simplify the processing configuration compared to a configuration in which the monitoring of each storage area is performed separately for the first predetermined processing and the second predetermined processing.

Feature T3. The gaming machine according to feature T1 or T2, wherein the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are executed in the first predetermined process.

According to feature T3, it is possible to collectively execute the monitoring of whether the first predetermined storage area is normal and the monitoring of whether the second predetermined storage area is normal in the first predetermined process. becomes.

Feature T4. Predetermined erasing means for erasing information in the first predetermined storage area (main side in the 22nd embodiment) based on the fact that the first monitoring execution means specifies that the first predetermined storage area is abnormal The function of executing the processing of step S5410 in the CPU 63, the function of executing the processing of steps S5806, S5811 and S5814 in the main CPU 63 in the twenty-fourth embodiment, and the step S5906 in the main CPU 63 in the twenty-fifth embodiment. A gaming machine according to any one of features T1 to T3, characterized by comprising a function of executing the processing of S6103 and step S6107.

According to feature T4, when the first predetermined storage area is abnormal, the information in the first predetermined storage area is erased, so that the first predetermined process is executed while the first predetermined storage area is in an abnormal state. It is possible to prevent it from being lost.

Feature T5. The predetermined erasing means erases the information in the first predetermined storage area when the first monitoring execution means specifies that the first predetermined storage area is abnormal, and erases the information in the second predetermined storage area. The game machine according to feature T4, characterized by erasing the information of the area.

According to feature T5, when the first predetermined storage area is abnormal, not only the first predetermined storage area but also the second predetermined storage area are erased. Thereby, when there is a possibility that an abnormality has occurred in the second predetermined storage area, it is possible to erase the information in the second predetermined storage area regardless of the monitoring result by the second monitoring execution means.

Feature T6. The predetermined erasing means erases the information in the second predetermined storage area based on the fact that the second monitoring execution means specifies that the second predetermined storage area is abnormal. The game machine described in T4 or T5.

According to feature T6, when the first predetermined storage area is abnormal, the information in the first predetermined storage area is erased, so that the first predetermined process is executed while the first predetermined storage area is in an abnormal state. It is possible to prevent it from being lost.

Feature T7. The predetermined erasing means erases the information in the second predetermined storage area when the second monitoring execution means identifies that the second predetermined storage area is abnormal, and erases the information in the first predetermined storage area. The game machine according to feature T6, characterized by erasing the information of the area.

According to feature T7, when the second predetermined storage area is abnormal, not only the second predetermined storage area but also the first predetermined storage area is erased. Thereby, when there is a possibility that an abnormality has occurred in the first predetermined storage area, it is possible to erase the information in the first predetermined storage area regardless of the monitoring result by the first monitoring execution means.

Feature T8. According to any one of characteristics T4 to T7, the processing for erasing information by the predetermined erasing means is executed in either one of the first predetermined processing and the second predetermined processing. game machine.

According to feature T8, the process of erasing information in each predetermined storage area based on the identification of an abnormality is collectively executed in one of the first predetermined process and the second predetermined process. This makes it possible to simplify the processing configuration compared to a configuration in which the erasing of information in each storage area is performed separately in the first predetermined processing and the second predetermined processing.

Feature T9. The game machine according to any one of characteristics T4 to T7, wherein the process for erasing information by the predetermined erasing means is executed in the first predetermined process.

According to the feature T9, it is possible to collectively execute the processing of deleting the information in each predetermined storage area in the first predetermined processing based on the identification of the abnormality.

Feature T10. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features T1 to T9, wherein the second predetermined process includes a process for managing game history.

According to the feature T10, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature T11. The second predetermined storage area is a history storage area (normal counter area 231, open/close execution mode counter area 232) in which game history information corresponding to a predetermined event that occurs as a game is played is stored. , and a high frequency support mode counter area 233).

According to feature T11, when a predetermined event occurs, history information corresponding to that event is stored in the history storage area. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature T12. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature T11, characterized by comprising a function of executing the processing of

According to the characteristic T12, by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the occurrence frequency of the predetermined event is performed. It becomes possible to grasp the result.

Feature T13. The gaming machine according to feature T12, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the feature T13, when the mode information corresponding to the game result in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

For the configuration of features T1 to T13, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group U>
Features U1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process execution means for executing the first predetermined process among the various processes (function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process executing means for executing the second predetermined process among the various processes (a function of executing the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A flag register provided in the internal storage means when a situation where the first predetermined process is being executed changes to a situation where the second predetermined process is executed or when a situation where the second predetermined process is executed is changed. state to a specific state (function for executing the processing of steps S6202 to S6204 and step S6211 in the main CPU 63 in the twenty-sixth embodiment, step in the main CPU 63 in the twenty-seventh embodiment a function to execute the processing of steps S6302 to S6307 and step S6312);
A game machine characterized by comprising:

According to feature U1, when the situation changes from the situation in which the first predetermined process is being executed to the situation in which the second predetermined process is executed, or when the situation changes to the situation in which the second predetermined process is executed, the flag register of the internal storage means is changed. State is set to a specific state. This makes it possible to start the second predetermined process in a situation where the state of the flag register is in a predetermined specific state. Therefore, various controls can be preferably performed.

Feature U2. The gaming machine according to feature U1, wherein the specific state is a state when supply of operating power to the control means is started.

According to feature U2, since the flag register is set to the state when the supply of operating power to the control means is started as the specific state, the processing configuration for setting the specific state can be simplified. It becomes possible.

Feature U3. The gaming machine according to feature U1 or U2, wherein the specific state is a state in which the flag register is cleared to "0".

According to feature U3, the flag register is set to a state cleared to "0" as the specific state, so the processing configuration for setting the specific state can be simplified.

Feature U4. Means for setting the state of the flag register to the specific state when or after the second predetermined process (in the twenty-sixth embodiment, the processing of steps S6213 to S6218 in the main CPU 63 is executed function, in the twenty-seventh embodiment, the function of executing the processing of steps S6314 to S6322 in the main side CPU 63).

According to feature U4, the second predetermined process is executed not only when the situation changes from the situation in which the first predetermined process is being executed to the situation in which the second predetermined process is executed, or when the situation is changed to the situation where the second predetermined process is executed. The state of the flag register is set to a particular state when it terminates or when it terminates. This makes it possible to resume the first predetermined process in a situation where the state of the flag register is in a predetermined specific state. Also, it is possible to set the state of the flag register to the specific state before and after the second predetermined process. Therefore, it is possible to prevent the state of the flag register due to one of the first predetermined process and the second predetermined process from affecting the other process.

Feature U5. Predetermined storage means (main side RAM 65) for temporarily storing information when executing processing in the control means,
The state setting means
Means for making the state of a predetermined storage area in the predetermined storage means to be the specific state (in the twenty-sixth embodiment, the function of executing the processing of steps S6202 to S6204 in the main CPU 63; in the twenty-seventh embodiment, A function of executing the processing of steps S6302 to S6307 in the main side CPU 63);
Means for storing the information stored in the predetermined storage area in the flag register so that the state of the flag register becomes the specific state (in the twenty-sixth embodiment, the processing of step S6211 in the main CPU 63 is the function to be executed (in the twenty-seventh embodiment, the function of executing the process of step S6312 in the main CPU 63);
The gaming machine according to any one of features U1 to U4, characterized by comprising:

According to feature U5, even if the configuration is such that the state of the flag register cannot be directly set to a specific state as an instruction of the control means, the flag can be set by writing information to the predetermined storage means and reading the information. It is possible to set the state of a register to a specific state.

Feature U6. The predetermined storage means is
a stack area (specific control stack area 222) in which the control means can write information by a push command and in which the control means can read information by a pop command;
a work area (work area 221 for specific control) in which the control means can write and read information by a load command;
with
The gaming machine according to feature U5, wherein the predetermined storage area is provided in the stack area.

According to feature U6, even in a configuration in which information stored in the work area cannot be directly written to the flag register, the state of the flag register is specified by using the writing of information to the stack area and the reading of the information. state can be set.

Feature U7. a predetermined register provided in the internal storage means when a situation in which the first predetermined process is being executed changes to a situation in which the second predetermined process is to be executed or a situation in which the second predetermined process is to be executed; is set to a predetermined state (in the twenty-sixth embodiment, the function of executing the processing of steps S6205 to S6210 in the main CPU 63; in the twenty-seventh embodiment, the function to execute processing),
The state setting means according to any one of features U1 to U6, wherein the state of the flag register is set to the specific state after the state of the predetermined register is set to the predetermined state. game machine.

The state of the flag register can change each time various processes are executed in the control means. In this case, according to feature U7, the state of the flag register is set to the specific state after the state of the predetermined register is set to the predetermined state. It becomes possible to make

Feature U8. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means is means for setting the state of the flag register to a specific state (in the twenty-sixth embodiment, the function of executing the processing of steps S6202 to S6204 and step S6211 in the main CPU 63; in the twenty-seventh embodiment, a function of executing the processing of steps S6302 to S6307 and step S6312 in the main side CPU 63).

According to feature U8, it is possible to set the state of the flag register to a specific state as required.

For the configuration of features U1 to U8, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group V>
Feature V1. A control means (main side CPU 63) that executes various processes and temporarily stores information in internal storage means (a register of the main side CPU 63) when executing the process,
The control means are
a first predetermined process execution means for executing the first predetermined process among the various processes (function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process executing means for executing the second predetermined process among the various processes (a function of executing the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
A flag register provided in the internal storage means when a situation where the first predetermined process is being executed changes to a situation where the second predetermined process is executed or when a situation where the second predetermined process is executed is changed. information to a predetermined storage means (main-side RAM 65) (in the fifteenth embodiment, the function of executing the processing of step S3802 in the main-side CPU 63; in the sixteenth embodiment, the In the 20th embodiment, the function of executing the process of step S4802 in the main CPU 63; in the 28th embodiment, the function of executing the process of steps S6402 to S6405 in the main CPU 63; In the embodiment, the function of executing the processing of steps S6502 to S6509 in the main CPU 63);
When or after the second predetermined process is finished, the return executing means (step S3804 in the main CPU 63 in the fifteenth embodiment) restores the information of the flag register saved in the predetermined storage means to the flag register. in the 16th embodiment, the function of executing the process of step S4404 in the main CPU 63; in the 20th embodiment, the function of executing the process of step S4810 in the main CPU 63; the 28th embodiment Then, the function of executing the processing of steps S6407 to S6415 in the main side CPU 63, the function of executing the processing of steps S6511 to S6518 in the main side CPU 63 in the twenty-ninth embodiment);
A game machine characterized by comprising:

According to feature V1, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation changes to the situation where the second predetermined process is executed, the information in the flag register is stored in a predetermined manner. escaped by means. Thus, when the second predetermined process is executed, it is possible to prevent the information stored in the flag register from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined process is terminated, the information saved in the predetermined storage means is restored to the flag register. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process based on the state of the flag register before execution of the second predetermined process. From the above, it becomes possible to suitably perform various controls.

Feature V2. The predetermined storage means is
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
with
The game machine according to feature V1, wherein the saving execution means saves the information of the flag register to the first predetermined storage area.

According to feature V2, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the storage destination of the information in the predetermined storage means is determined by the first predetermined process and the second predetermined process. It is possible to make a clear difference. This makes it possible to prevent the information used in one of the first predetermined process and the second predetermined process from being erased when the other process is executed. In this case, when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed, or when the situation changes to the situation in which the second predetermined process is executed, the information in the flag register is stored in the first predetermined storage area. is evacuated to As a result, it is possible to save the information in the flag register immediately before the second predetermined process is started, and to save the information without using the second predetermined storage area.

Feature V3. The first predetermined storage area can store and read information when the first predetermined process is executed, and can read information when the second predetermined process is executed. inability to remember information,
The second predetermined storage area can store and read information when the second predetermined process is executed, and can read information when the first predetermined process is executed. The gaming machine according to feature V2, wherein information cannot be stored.

According to feature V3, the first predetermined storage area can be treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area can be treated as a dedicated storage area for the second predetermined process. becomes.

Feature V4. The predetermined storage means is
a stack area (stack area 222 for specific control) in which information can be written by a push instruction and information can be read by a pop instruction;
a work area (work area 221 for specific control) in which information can be written and read by a load instruction;
with
The game machine according to any one of features V1 to V3, wherein the save execution means saves the information of the flag register to one of the stack area and the work area.

According to feature V4, when the situation where the first predetermined process is being executed changes to the situation where the second predetermined process is executed, or when the situation becomes the situation where the second predetermined process is executed, the stack area in the second predetermined storage area and the work area, the information of the flag register is saved. As a result, it is possible to consolidate the save destinations of information, and it is possible to simplify the processing configuration for saving and the processing configuration for restoring.

Feature V5. The gaming machine according to feature V4, wherein the save execution means saves the information of the flag register to the work area.

According to feature V5, since the information of the flag register is saved to the work area, the information can be saved without cumulatively changing the stack pointer.

Feature V6. The save execution means is
Means for storing the information of the flag register in a predetermined register provided in the internal storage means (the function of executing the processing of steps S6402 and S6403 in the main CPU 63 in the twenty-eighth embodiment; the main CPU in the twenty-ninth embodiment; A function of executing the processing of steps S6502 to S6505 in the side CPU 63);
Means for storing the information of the flag register stored in the predetermined register in the predetermined storage means (in the twenty-eighth embodiment, the function of executing the processing of step S6404 in the main CPU 63; in the twenty-ninth embodiment, the main CPU 63 a function to execute the processing of step S6506 in
The gaming machine according to any one of features V1 to V5, characterized by comprising:

According to feature V6, even in a configuration in which the information in the flag register cannot be directly saved in the predetermined storage means as an instruction of the control means, the information is written to the predetermined register and the information stored in the predetermined register is stored in the predetermined register. The information in the flag register can be saved in the predetermined storage means by using the writing to the storage means.

For the configuration of features V1 to V6, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group W>
Feature W1. Equipped with control means (main side CPU 63) for executing various processes,
The control means are
a first predetermined process execution means for executing the first predetermined process among the various processes (function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process executing means for executing the second predetermined process among the various processes (a function of executing the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
abnormal event monitoring means (program monitoring unit 252) for monitoring whether an abnormal event has occurred;
It is possible to create a situation in which information erasure processing is executed for at least the first predetermined storage area based on the fact that the abnormal event has been identified by the abnormal event monitoring means. erasing status generation means (reset signal output unit 251) to
A game machine characterized by comprising:

According to feature W1, a first predetermined storage area and a second predetermined storage area are provided, and the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. This makes it possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when one of the first predetermined process and the second predetermined process is executed, it is possible to prevent the information used in the other process from being erased. Further, based on the identification of the occurrence of the abnormal event, the information erasing process is performed on at least the first predetermined storage area. As a result, it is possible to prevent the first predetermined process from being executed while the information in the first predetermined storage area is held as it is despite the occurrence of an abnormal event.

Feature W2. The control means is
Means for executing processing for storing power failure response information when the supply of operating power to the control means is stopped (in the thirtieth embodiment, a function for executing the processing of steps S6709 and S6710 in the main CPU 63 , in the 32nd embodiment, the function of executing the processing of steps S7609 to S7611 in the main side CPU 63);
When the supply of operating power to the control means is started in a situation where the power failure countermeasure information is not stored and the process at the time of supply start is executed, the erasing process of the information is performed on at least the first predetermined storage area. In the thirtieth embodiment, the function of executing the processing of step S6607 in the main CPU 63; In the embodiment, the function of executing the processing of steps S7704, S7705, S7808 and S7810 in the main CPU 63);
with
The erasing condition generation means causes the control means to start the supply in a situation where the power failure countermeasure information is not stored based on the occurrence of the abnormal event being identified by the abnormal event monitoring means. The gaming machine according to feature W1, characterized in that time processing is executed.

According to the feature W2, when the supply of operating power to the control means is started in a situation where the power failure handling information is not stored and the process at the time of supply start is executed, the information erasing process is performed at least at the first predetermined level. By executing the information in the storage area, the information in the first predetermined storage area is retained as it is when the supply of operating power to the control means is started in a situation where the power failure process is not properly performed. It is possible to prevent the first predetermined process from being executed in this state. In this case, based on the identification of the occurrence of the abnormal event, the control means executes the process at the time of supply start in a situation where the power failure countermeasure information is not stored. As a result, by using the configuration for executing the information erasing process when the process at the start of supply is executed by the control means in a situation where the power failure response information is not stored, An erasure process can be performed.

Feature W3. The control means executes various processes when a reset signal is received, and receives the reset signal from a state in which the reset signal is not received while operating power is being supplied. The process at the start of supply is started based on the fact that the
The erasing condition generation means causes the control means to stop receiving the reset signal based on the identification of the occurrence of the abnormal event by the abnormal event monitoring means. The gaming machine according to feature W2, characterized in that the reset signal is received by the game machine.

According to the feature W3, it is possible to obtain the above-described excellent effects by switching the reception state of the reset signal.

Feature W4. The control means is configured to temporarily store information in the internal storage means (register and program counter of the main CPU 63) when executing the process, and the information stored in the internal storage means is stored in the first predetermined storage means. It is a configuration that can be temporarily saved in an area,
The abnormal event monitoring means monitors whether or not an abnormality has occurred in the information stored in the internal storage means as the abnormal event,
Any one of features W1 to W3, wherein the erasure condition generation means generates a condition in which the information erasure processing is executed for at least both the first predetermined storage area and the internal storage means. The gaming machine described in .

According to feature W4, the information stored in the internal storage means can be temporarily saved in the first predetermined storage area. There is a possibility that an abnormality has also occurred in the information stored in the 1 predetermined storage area. In this case, when an abnormality occurs in the information stored in the internal storage means, the information erasing process is executed not only for the internal storage means but also for the first predetermined storage area. As a result, it is possible to prevent the first predetermined process from being executed in that state even though there is an abnormality in the information stored in the first predetermined storage area.

Feature W5. The erasing condition generating means prevents the information erasing process from being executed in the second predetermined storage area even if the abnormal event monitoring means identifies that the abnormal event has occurred. The gaming machine according to any one of features W1 to W4, characterized by:

According to feature W5, it is possible to store and hold information in the second predetermined storage area even if an abnormal event occurs.

Feature W6. The erasing condition generating means performs the information erasing process in the first predetermined storage area and the second predetermined storage area based on the occurrence of the abnormal event being identified by the abnormal event monitoring means. The gaming machine according to any one of features W1 to W4, characterized in that it creates a situation that is executed for both.

According to the feature W6, the information erasing process is executed for both the first predetermined storage area and the second predetermined storage area based on the identification that the abnormal event has occurred. As a result, it is possible to prevent the first predetermined process from being executed while the information in the first predetermined storage area is held as it is despite the occurrence of the abnormal event, and the occurrence of the abnormal event. It is possible to prevent the second predetermined process from being executed in a state in which the information in the second predetermined storage area is held as it is in spite of the fact that the second predetermined process has been performed.

Feature W7. The information erasing process for the first predetermined storage area is executed in the first predetermined process, and the information erasing process for the second predetermined storage area is executed in the second predetermined process. The gaming machine according to feature W6.

According to feature W7, regarding the information erasing process as well, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is treated as a dedicated storage area for the second predetermined process. It is possible to make it possible to

Feature W8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features W1 to W7, wherein the second predetermined process includes a process for managing a game history.

According to the feature W8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature W9. The second predetermined storage area is a history storage area (normal counter area 231, open/close execution mode counter area 232) in which game history information corresponding to a predetermined event that occurs as a game is played is stored. , and a high frequency support mode counter area 233).

According to feature W9, when a predetermined event occurs, history information corresponding to that event is stored in the history storage area. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature W10. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature W9, characterized by comprising a function of executing the processing of

According to the feature W10, by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the occurrence frequency of the predetermined event is performed. It becomes possible to grasp the result.

Feature W11. The gaming machine according to feature W10, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the characteristic W11, when the mode information corresponding to the game result in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

For the configuration of features W1 to W11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group X>
Feature X1. Equipped with control means (main side CPU 63) for executing various processes,
The control means are
a first predetermined process execution means for executing the first predetermined process among the various processes (function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process executing means for executing the second predetermined process among the various processes (a function of executing the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
with
The second predetermined process execution means is an erasure execution means ( In the twenty-fifth embodiment, the main side CPU 63 has a function of executing the processing of steps S6103 and S6107. In the thirtieth embodiment, the main side CPU 63 has a function of executing the processing of step S7204. In the thirty-first embodiment, the main side CPU 63 , and in the thirty-second embodiment, a function of executing the processing of steps S7808 and S7810 in the main side CPU 63).

According to feature X1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. This makes it possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when one of the first predetermined process and the second predetermined process is executed, it is possible to prevent the information used in the other process from being erased.

Further, when an erasure trigger occurs, the information is erased from the second predetermined storage area. It is possible to prevent the second predetermined process from being executed while the information of is held as it is. Further, since the erasing process of the information is executed in the second predetermined process, it is possible to prevent the first predetermined process from intervening in updating the information in the second predetermined storage area.

Feature X2. The erasure executing means executes the erasing process of the information in the second predetermined storage area while preventing non-erasure target information (management monitoring flag, return address information, information of various registers) from being erased. The game machine according to the characterizing feature X1.

According to the characteristic X2, the information erasing process for the second predetermined storage area is performed while the non-erasable information in the second predetermined storage area is not erased. This makes it possible to execute information erasing processing for the second predetermined storage area while preventing even necessary information from being erased.

Feature X3. The second predetermined process execution means performs the Storage executing means (in the thirtieth embodiment, The function of executing the processing of steps S7102 to S7107 in the main CPU 63, the function of executing the processing of steps S7502 to S7507 in the main CPU 63 in the 31st embodiment, and the step S7802 in the main CPU 63 in the 32nd embodiment. ~ a function to execute the processing of step S7807),
The game according to feature X2, wherein the erasure executing means executes the information erasing process for the second predetermined storage area while preventing the restoration correspondence information from being erased as the non-erasable information. machine.

According to the feature X3, when returning from the situation in which the second predetermined process is being executed to the situation in which the first predetermined process is being executed, even the recovery support information necessary for the situation is not erased. It becomes possible to execute information erasing processing for the storage area.

Feature X4. The storage executing means is characterized in that, as the return correspondence information, information of a return address of the program when the second predetermined processing is terminated and the program is returned to the first predetermined processing is stored in the second predetermined storage area. The game machine according to feature X3.

According to feature X4, the information erasing process is executed for the second predetermined storage area while preventing the information of the return address of the program from being erased when returning to the first predetermined process. Even if the information erasing process is executed for the memory, it is possible to return to the predetermined program in the first predetermined process when the second predetermined process ends.

Feature X5. The control means is configured to temporarily store information in the internal storage means (register of the main CPU 63) when executing the process,
The gaming machine according to feature X3 or X4, wherein the storage execution means stores information stored in the internal storage means in the second predetermined storage area as the return correspondence information.

According to feature X5, the information is erased from the second predetermined storage area while the information in the internal storage means used in the first predetermined process is not erased. On the other hand, even if the information erasing process is executed, it is possible to restore the information used in the first predetermined process to the internal storage means when the second predetermined process is finished.

Feature X6. The erasure execution means causes the information erasure process to be executed in the second predetermined storage area as the erasure opportunity based on the occurrence of an abnormality in the second predetermined storage area. The gaming machine according to any one of features X1 to X5, characterized by:

According to the feature X6, since the information erasing process is executed for the second predetermined storage area based on the occurrence of the abnormality in the second predetermined storage area, It is possible to prevent the second predetermined process from being executed while the user is in the state.

Feature X7. The second predetermined process execution means is a means for monitoring whether the second predetermined storage area is normal as the second predetermined process (in the thirtieth embodiment, steps S7201 to S7203 in the main CPU 63 are A gaming machine according to feature X6, characterized by comprising a function of executing processing.

According to feature X7, not only the erasing of information in the second predetermined storage area but also the monitoring of whether or not the second predetermined storage area is normal can be performed by the second predetermined processing without intervening the first predetermined processing. Therefore, it is possible to perform the monitoring of whether the second predetermined storage area is normal and the execution of the information erasing process for the second predetermined storage area as a series of processes in the second predetermined process. .

Feature X8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features X1 to X7, wherein the second predetermined process includes a process for managing game history.

According to the feature X8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature X9. The second predetermined storage area is a history storage area (normal counter area 231, open/close execution mode counter area 232) in which game history information corresponding to a predetermined event that occurs as a game is played is stored. , and a high frequency support mode counter area 233).

According to feature X9, when a predetermined event occurs, history information corresponding to that event is stored in the history storage area. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature X10. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. A gaming machine according to feature X9, characterized by comprising a function of executing the processing of

According to the characteristic X10, by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the occurrence frequency of the predetermined event. It becomes possible to grasp the result.

Feature X11. The gaming machine according to feature X10, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the feature X11, when the mode information corresponding to the game result in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

For the configuration of features X1 to X11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group Y>
Feature Y1. Equipped with control means (main side CPU 63) for executing various processes,
The control means are
a first predetermined process execution means for executing the first predetermined process among the various processes (function for executing processes other than the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a second predetermined process executing means for executing the second predetermined process among the various processes (a function of executing the management execution process by the main CPU 63 in the fifteenth to thirty-fourth embodiments);
a first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed;
a second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed;
First calculation means for calculating first reference numerical information corresponding to a plurality of pieces of information stored in the first predetermined storage area (in the thirtieth embodiment, the processing of steps S6604 and S6710 in the main CPU 63 is executed function, a function of executing the processing of step S7304 in the main CPU 63 in the 31st embodiment, a function of executing the processing of steps S7610 and S7701 in the main CPU 63 in the 32nd embodiment);
A game machine characterized by comprising:

According to feature Y1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. This makes it possible to clearly differentiate the storage destination of information in the predetermined storage means between the first predetermined process and the second predetermined process. Therefore, when one of the first predetermined process and the second predetermined process is executed, it is possible to prevent the information used in the other process from being erased. In this case, the first reference numerical value information corresponding to the plurality of information stored in the first predetermined storage area is calculated. By using the first reference numerical value information, it becomes possible to specify whether or not information abnormality has occurred only in the first predetermined storage area.

Feature Y2. Information erasing means for executing information erasing processing for the first predetermined storage area based on the occurrence of an abnormality in the first reference numerical information calculated by the first calculating means. (In the thirtieth embodiment, the function of executing the processing of step S6607 in the main CPU 63; in the thirty-first embodiment, the function of executing the processing of steps S7401 and S7402 in the main CPU 63; A gaming machine according to feature Y1, characterized in that it has a function of executing the processing of steps S7704 and S7705 in the CPU 63 .

According to feature Y2, when the occurrence of an abnormality in the first reference numerical information is identified, the information is erased from the first predetermined storage area. First, it is possible to prevent the first predetermined process from being executed while the information in the first predetermined storage area is held as it is.

Feature Y3. The first calculation means is
First power failure calculation means for calculating the first reference numerical information when the supply of operating power to the control means is stopped (in the thirtieth embodiment, a function of executing the processing of step S6710 in the main CPU 63, In the thirty-second embodiment, the function of executing the processing of step S7610 in the main CPU 63);
First power-on calculation means for calculating the first reference numerical value information when supply of operating power to the control means is started (in the thirtieth embodiment, a function of executing the processing of step S6604 in the main side CPU 63 , the function of executing the processing of step S7304 in the main CPU 63 in the 31st embodiment, the function of executing the processing of step S7701 in the main CPU 63 in the 32nd embodiment);
with
The information erasing means is based on the fact that the first reference numerical value information calculated by the first power failure time calculating means and the first reference numerical value information calculated by the first power supply time calculating means do not match. , the gaming machine according to feature Y2, wherein the erasing process of the information is executed for at least the first predetermined storage area.

According to the feature Y3, it is possible to specify whether or not the information in the first predetermined storage area is stored and held across the situation in which the supply of operating power is stopped, by calculating the first reference numerical value information. becomes. If the information in the first predetermined storage area is not stored and retained across the situation in which the supply of operating power is stopped, the information is erased from the first predetermined storage area. It is possible to prevent the first predetermined process from being executed in a state in which the information in the first predetermined storage area is held as it is despite the occurrence of

Feature Y4. The information erasing means does not execute the information erasing process for the second predetermined storage area even if an abnormality is identified with respect to the first reference numerical information calculated by the first calculating means. The gaming machine according to feature Y2 or Y3.

According to the feature Y4, when an abnormality is identified with respect to the first reference numerical value information, the information is erased from the first predetermined storage area, while the information is erased from the second predetermined storage area. No action is taken. As a result, it is possible to prevent even the information in the second predetermined storage area from being erased in a situation where an information abnormality has occurred in the first predetermined storage area.

Feature Y5. The gaming machine according to any one of features Y1 to Y4, wherein the first reference numerical information is information that does not change according to the information stored in the second predetermined storage area.

According to feature Y5, in a configuration in which a first predetermined storage area and a second predetermined storage area exist, it is possible to individually identify an information abnormality related to the first predetermined storage area using the first reference numerical information. It becomes possible.

Feature Y6. A second calculation means (a function of executing the processing of steps S7611 and S7706 in the main CPU 63) for calculating second reference numerical information corresponding to a plurality of pieces of information stored in the second predetermined storage area is provided. The gaming machine according to any one of features Y1 to Y5, characterized by:

According to feature Y6, second reference numerical information corresponding to a plurality of pieces of information stored in the second predetermined storage area is calculated. By using the second reference numerical value information, it becomes possible to specify whether or not an information abnormality has occurred only in the second predetermined storage area.

Feature Y7. Means ( The gaming machine according to feature Y6, characterized by comprising a function of executing the processing of steps S7808 and S7810 in the main side CPU 63 .

According to feature Y7, when the occurrence of an anomaly with respect to the second reference numerical information is identified, the information is erased from the second predetermined storage area. First, it is possible to prevent the second predetermined process from being executed while the information in the second predetermined storage area is held as it is.

Feature Y8. The first predetermined process includes a process for controlling the progress of the game,
The gaming machine according to any one of features Y1 to Y7, wherein the second predetermined process includes a process for managing game history.

According to feature Y8, the process for controlling the progress of the game is executed as the first predetermined process, and the process for managing the game history is executed as the second predetermined process, thereby controlling the progress of the game. It is possible to prevent the information used in the process for managing the game history from being rewritten when executing the process for managing the game history.

Feature Y9. The second predetermined storage area is a history storage area (normal counter area 231, open/close execution mode counter area 232) in which game history information corresponding to a predetermined event that occurs as a game is played is stored. , and a high frequency support mode counter area 233).

According to feature Y9, when a predetermined event occurs, history information corresponding to that event is stored in the history storage area. As a result, information for managing the number of occurrences or the frequency of occurrence of the predetermined event can be stored in the game machine, and the frequency of occurrence of the predetermined event can be appropriately managed by using this managed information. It becomes possible to go to Further, since the history information is stored in the game machine itself, it is possible to prevent unauthorized access to and unauthorized modification of the history information. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature Y10. The second predetermined process executing means is an information deriving means (step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature Y9, characterized by comprising a function of executing the process of

According to the feature Y10, by using the history information stored in the history storage area to derive the mode information corresponding to the result of the game in the predetermined period, the management of the game history such as the frequency of occurrence of the predetermined event. It becomes possible to grasp the result.

Feature Y11. The gaming machine according to feature Y10, wherein the second predetermined storage area includes a mode information storage area (computation result storage area 234) for storing the mode information derived by the information deriving means.

According to the characteristic Y11, when the mode information corresponding to the game result in the predetermined period is derived using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at any timing. Further, the processing for controlling the progress of the game is executed as the first predetermined processing, and the processing for managing the game history is executed as the second predetermined processing, whereby the processing for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

For the configuration of features Y1 to Y11, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions relating to the feature T group, the feature U group, the feature V group, the feature W group, the feature X group, and the feature Y group, the following problems can be solved.

Pachinko game machines, slot machines, and the like are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the game machines such as those exemplified above, it is necessary to perform various controls appropriately, and there is still room for improvement in this respect.

<Feature Z group>
Feature Z1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
Circumstance generation means (function for executing the processes of steps S7905, S7916 and S7917 in the main CPU 63) that enables setting of the setting value to be used by the setting means. When,
In a situation in which supply of operating power to the control means (main CPU 63) having the setting means is started and processing at the time of supply start is being executed, Setting notification means (function for executing setting confirmation processing in the main side CPU 63) that allows notification to be performed;
A game machine characterized by comprising:

According to the feature Z1, since the set value to be used is set from among the set values of a plurality of stages corresponding to the player's advantage, the set value that is more advantageous to the player is used. It is expected that In this case, in order to confirm the set value set as the object to be used, it is necessary to once stop the supply of the operating power to the control means and then restart the supply of the operating power to the control means. . As a result, it is possible to make it difficult to perform an act of illegally checking the set value. In addition, since the set value is notified while the supply start process is being executed, there is no need to notify the set value when the game is interrupted. Therefore, it is possible to appropriately notify the setting value.

Feature Z2. The gaming machine according to feature Z1, wherein the condition generating means causes the settable condition to occur in a condition in which the supply start processing is being executed.

According to feature Z2, a settable situation in which the set value to be used can be set and a situation in which the set value to be used is notified in a situation in which the set value to be used is not settable can be determined at the start of supply. It is possible to summarize the situation in which the process is being executed.

Feature Z3. A first specifying means for specifying the occurrence of the first trigger event (a function of executing the processing of steps S7912 and S7916 in the main CPU 63),
The setting notifying means detects the setting possible based on the fact that the process at the start of supply is being executed and the occurrence of the first trigger event is specified by the first specifying means. The game machine according to feature Z1 or Z2, wherein the set value to be used is notified in a situation other than the situation.

According to feature Z3, in order to notify the set value to be used, it is necessary to generate the first trigger event as well as to start supplying operating power to the control means. As a result, it is possible to make it difficult to perform an act of illegally checking the set value.

Feature Z4. The gaming machine according to feature Z3, wherein the first trigger event is that a predetermined operation is performed with a setting key on the setting key insertion portion (setting key insertion portion 68a).

According to feature Z4, it is necessary to perform a predetermined operation with the setting key on the setting key insertion portion in order to notify the setting of the use object. As a result, it is possible to make it difficult to perform an act of illegally checking the set value.

Feature Z5. The setting notification means satisfies a notification condition based on the fact that the process at the time of supply start is being executed and the occurrence of the first trigger event is specified by the first specifying means. in such a case, the set value to be used is notified in a situation in which the setting is not possible,
The condition generating means satisfies a setting condition based on the fact that the process at the time of supply start is being executed and the occurrence of the first trigger event is specified by the first specifying means. when the setting is possible,
The gaming machine according to feature Z3 or Z4, wherein the notification condition and the setting condition are different.

According to feature Z5, in both the case of generating the settable state and the case of notifying the set value to be used, not only is the supply of operating power to the control means started, but also the first trigger event is generated. need to occur. As a result, it is possible to make it difficult to perform both the act of fraudulently causing the setting value to be used and the act of fraudulently trying to confirm the setting value to be used. On the other hand, since the setting condition for generating the settable state and the notification condition for notifying the set value to be used are different, the settable state and the set value to be used are notified. It is possible to cause either one of

Feature Z6. A second identifying means for identifying the occurrence of the second trigger event (a function of executing the processing of step S7905 in the main CPU 63),
The setting condition is a situation in which the occurrence of the first trigger event is specified by the first specifying means in a situation in which the process at the time of supply start is being executed, and the second Established based on the fact that the occurrence of the triggering event is specified,
The notification condition is a situation in which the occurrence of the first trigger event is specified by the first specifying means in a situation where the process at the time of supply start is being executed, and the second The gaming machine according to feature Z5, which is established based on the fact that the occurrence of the trigger event is not specified.

According to feature Z6, in order to generate the settable state, it is necessary to start supplying operating power to the control means and generate not only the first trigger event but also the second trigger event. Thus, in both cases of setting the set value to be used and notifying the set value to be used, not only is the supply of operating power to the control means started, but also In a configuration where it is necessary to generate the first trigger event, it is possible to make the operation for generating the settable state more complicated. Therefore, it is possible to more intensively prevent an act of illegally setting a setting value to be used.

Feature Z7. The gaming machine according to feature Z6, wherein the second trigger event is that a predetermined operation means (reset button 68c) is operated.

According to feature Z7, in order to generate the settable state, it is necessary not only to start supplying operating power to the control means and to generate the first trigger event, but also to operate the predetermined operation means. As a result, it is possible to prevent an excessively complicated operation for properly generating a settable state while making it difficult to illegally set a setting value to be used. becomes possible.

Feature Z8. Information erasing means ( A gaming machine according to feature Z6 or Z7, characterized by comprising a function of executing the processing of step S7915 in the main side CPU 63.

According to feature Z8, the second trigger event necessary for executing the information erasing process is used to determine the conditions for generating a settable state and the set values to be used in situations where the settable state is not possible. It is possible to make the conditions for the notification to be different.

Feature Z9. The gaming machine according to feature Z8, wherein the information erasing means executes the information erasing process even when the setting possible state occurs.

According to feature Z9, it is possible to execute the information erasing process when the setting becomes possible.

Feature Z10. A situation in which the occurrence of the second trigger event is specified by the second specifying means in a situation where the process at the time of supply start is being executed, and the occurrence of the first trigger event is specified by the first specifying means The gaming machine according to feature Z8 or Z9, wherein when the setting is not set, the information erasing process is executed by the information erasing means even though the setting is not possible.

According to feature Z10, depending on whether or not the first trigger event is generated when the supply of operating power to the control means is started, the information erasing process is executed and the settable state is established; It is possible to select the case where the erasing process is executed but the setting is not possible.

For the configuration of features Z1 to Z10, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

<Characteristic group a>
Features a1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
Circumstance generation means (function for executing the processes of steps S7905, S7916 and S7917 in the main CPU 63) that enables setting of the setting value to be used by the setting means. When,
Information erasing means for executing information erasing processing (function for executing the processing of step S7915 in the main CPU 63);
setting notification means (function for executing setting confirmation processing in the main side CPU 63) for notifying the setting value to be used in a situation in which the setting is not possible;
a first identifying means for identifying the occurrence of the first trigger event (a function of executing the processing of steps S7912 and S7916 in the main CPU 63);
a second identifying means for identifying the occurrence of the second trigger event (a function of executing the processing of step S7905 in the main CPU 63);
with
The situation generation means identifies the occurrence of the first trigger event by the first identification means in a situation where the supply of operating power to the control means having the setting means is started and the process at the time of supply start is being executed. the settable situation based on the situation where the second trigger event is specified by the second specifying means, and
The information erasing means performs the information erasing process based on the fact that the occurrence of the second trigger event is specified by the second specifying means in a situation where the process at the time of supply start is being executed. and run
A situation in which the occurrence of the second trigger event is specified by the second specifying means in a situation where the process at the time of supply start is being executed, and the occurrence of the first trigger event is specified by the first specifying means if it is not set, the information erasure process is executed by the information erasing means even though the setting is not possible,
The setting notifying means is in a situation in which the occurrence of the first trigger event is specified by the first specifying means in a situation where the process at the time of supply start is being executed, and the second A gaming machine characterized in that notification of the setting value to be used in a situation in which the setting is not possible is performed based on the fact that the occurrence of the trigger event is not specified.

According to the feature a1, since the set value to be used is set from a plurality of stages of set values corresponding to the degree of advantage of the player, the set value that is more advantageous to the player is used. It is expected that In addition, since the information erasing process can be executed, it is possible to prevent the game from being played even though the information abnormality has occurred. In addition, since the setting value set to be used can be notified, it is possible to check the setting value.

In this case, in order to confirm the set value that is set to be used, it is necessary to start supplying operating power to the control means and to generate the first trigger event. As a result, it is possible to make it difficult to perform an act of illegally checking the set value.

In addition, in order to generate the settable state, it is necessary to start supplying operating power to the control means and generate not only the first trigger event but also the second trigger event. Thus, in both cases of setting the set value to be used and notifying the set value to be used, not only is the supply of operating power to the control means started, but also In a configuration where it is necessary to generate the first trigger event, it is possible to make the operation for generating the settable state more complicated. Therefore, it is possible to more intensively prevent an act of illegally setting a setting value to be used.

In addition, by using the second trigger event necessary for executing the information erasing process, the condition for generating the settable state and the set value to be used in the non-settable state are notified. It is possible to make the conditions to be different.

Depending on whether or not the first trigger event is generated when the supply of operating power to the control means is started, the information erasing process may be executed and the setting possible state may be established. It is possible to select whether or not it is possible to set what is executed.

Feature a2. The gaming machine according to feature a1, wherein the first trigger event is that a predetermined operation is performed with a setting key on a setting key insertion portion (setting key insertion portion 68a).

According to feature a2, it is necessary to perform a predetermined operation with the setting key on the setting key insertion portion in order to notify the setting of the use object. As a result, it is possible to make it difficult to perform an act of illegally checking the set value.

Feature a3. The gaming machine according to feature a1 or a2, wherein the second trigger event is operation of a predetermined operation means (reset button 68c).

According to feature a3, in order to generate the settable state, it is necessary not only to start supplying operating power to the control means and to generate the first trigger event but also to operate the predetermined operation means. As a result, it is possible to prevent an excessively complicated operation for properly generating a settable state while making it difficult to illegally set a setting value to be used. becomes possible.

For the configuration of features a1 to a3, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the inventions according to the group of features Z and the group of features a, the following problems can be solved.

Pachinko game machines, slot machines, and the like are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to the winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in the gaming machines such as those exemplified above, there is a demand for a configuration capable of suitably confirming the set values that determine the advantage of the gaming machine, and there is still room for improvement in this respect. .

<Characteristic group b>
Feature b1. setting means (function for executing setting value update processing in the main side CPU 63) for setting a setting value to be used from among a plurality of stages of setting values corresponding to the player's advantage;
Circumstance generation means (function for executing the processes of steps S7905, S7916 and S7917 in the main CPU 63) that enables setting of the setting value to be used by the setting means. When,
setting monitoring means for executing a setting monitoring process for monitoring whether or not the setting value to be used is abnormal (function for executing the process of step S8220 in the main CPU 63);
with
A game machine characterized in that the setting monitoring process is not included in the process at the start of supply, which is executed when the supply of operating power to the control means having the setting means is started.

According to the feature b1, since the set value to be used is set from a plurality of stages of set values corresponding to the degree of advantage of the player, the set value that is more advantageous to the player is used. It is expected that In addition, since the setting monitoring process is executed to monitor whether or not the setting value to be used is abnormal, if the setting value to be used is abnormal, it is possible to deal with it. In addition, since the setting monitoring process is not included in the process at the start of supply, it is possible to achieve the above-described excellent effects while preventing the processing load from increasing in the process at the start of supply.

Feature b2. The gaming machine according to feature b1, wherein the condition generating means generates the settable condition in a condition where the supply start processing is being executed.

According to the feature b2, the settable state occurs when the supply start process is being executed, so it is possible to set the set value to be used before the game is started. . In this case, since the set values to be used are set in the process at the start of supply, the processing load in the process at the start of supply increases accordingly. On the other hand, since the configuration of the feature b1 is provided and the setting monitoring process is not included in the process at the start of supply, the processing load of the process at the start of supply is not further increased. It becomes possible to monitor whether or not the set value is abnormal.

Feature b3. The gaming machine according to feature b1 or b2, wherein the setting monitoring means executes the setting monitoring process after the supply start process is completed.

According to the feature b3, since the setting monitoring process is executed after the process at the start of supply is completed, the setting value of the object to be used is abnormal while preventing the processing load from increasing at the time of the process at the start of supply. It is possible to monitor whether or not

Feature b4. The gaming machine according to feature b3, wherein the setting monitoring means executes the setting monitoring process each time a monitoring opportunity occurs after the supply start process is completed.

According to the characteristic b4, since the setting monitoring process is executed every time a monitoring trigger occurs after the process at the start of supply is completed, it becomes easy to identify that the set value to be used is abnormal.

Feature b5. Equipped with means for executing periodically activated interrupt processing (function for executing first timer interrupt processing in the main CPU 63),
The gaming machine according to any one of features b1 to b4, wherein the interrupt processing includes the setting monitoring processing.

According to the feature b5, since the setting monitoring process is executed every time it is started periodically, it is possible to increase the execution frequency of monitoring whether or not the setting value to be used is abnormal.

Feature b6. The setting monitoring means is means for regulating the progress of the game (steps S8207 and A gaming machine according to any one of features b1 to b5, characterized by comprising a function of executing the processing of step S8302.

According to the feature b6, when it is specified that the setting value for use is abnormal, the progress of the game is regulated. It is possible to prevent

Feature b7. The setting monitoring means notifies the player to recognize that the setting possible state should be generated based on the fact that the setting value of the object to be used is specified to be abnormal in the setting monitoring process. The gaming machine according to any one of features b1 to b6, characterized by comprising means for executing the processing (function for executing the processing of step S8303 in the main side CPU 63).

According to the feature b7, when it is specified that the set value of the object to be used is abnormal, the notification is executed so that the player can recognize that the setting possible state should be generated. When the value becomes abnormal, it is possible to urge the manager of the game hall to eliminate it.

For the configuration of features b1 to b7, features A1 to A15, features B1 to B7, features C1 to C5, features D1 to D10, features E1 to E6, features F1 to F3, features G1 to G18, features H1 to H7, features I1-I9, features J1-J4, features K1-K7, features L1-L20, features M1-M7, features N1-N6, features O1-O11, features P1-P12, features Q1-Q5, features R1- R17, features S1-S8, features T1-T13, features U1-U8, features V1-V6, features W1-W11, features X1-X11, features Y1-Y11, features Z1-Z10, features a1-a3, features b1- Any one or a plurality of configurations of b7 may be applied. As a result, it is possible to obtain a synergistic effect due to the combined configuration.

According to the invention according to the characteristic b group, the following problems can be solved.

Pachinko game machines, slot machines, and the like are known as game machines. For example, a pachinko game machine is provided with a plate storage portion for storing game balls given to a player in the front portion of the game machine, and the game balls stored in the plate storage portion are guided to a game ball launching device. , are shot toward the game area in accordance with the player's shooting operation. Then, for example, when a game ball enters a ball entry portion provided in the game area, the game ball is paid out from the payout device to the plate storage portion, for example. Further, in a pachinko game machine, there is also known a configuration in which an upper plate storage portion and a lower plate storage portion are provided as the plate storage portion. Surplus game balls in the upper tray storage section guided by the device are discharged to the lower tray storage section.

Further, in the slot machine, when the start lever is operated to start a new game while medals are bet, the control means executes the lottery process. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means Rotation of the reel is stopped by execution of rotation stop control. Then, when the stop result after the rotation of the reels is stopped corresponds to a winning combination in the lottery process, a privilege corresponding to the winning combination is given to the player.

Here, in gaming machines such as those exemplified above, it is necessary to appropriately manage the set values that determine the advantage of the gaming machine, and there is still room for improvement in this respect.

The basic configuration of a gaming machine to which each of the above features can be applied or to which each feature is applied is shown below.

Pachinko machine: an operation means operated by a player, a game ball shooting means for shooting game balls based on the operation of the operation means, a ball passage for guiding the shot game balls to a predetermined game area, and a game This game machine is provided with game parts arranged in an area, and gives a privilege to a player when a game ball passes through a predetermined passing part of the game parts.

A game machine such as a slot machine: equipped with a pattern display device for variably displaying a plurality of patterns, the variable display of the plurality of patterns is started by the operation of the start operation means, and the operation of the stop operation means is caused by the operation of the stop operation means. The game machine stops the variable display of the plurality of pictures after a predetermined period of time has passed, and gives a privilege to the player according to the pictures after the stop.

DESCRIPTION OF SYMBOLS 10... Pachinko machine 12... Game machine main body 14... Front door frame 28... Launch operation device 33... First operating opening 34... Second operating opening 35... Through gate 49a... Gate detection sensor 63... Main side CPU 65 Main side RAM 68a Setting key insertion unit 68b Update button 68c Reset button 69a First notification display device 69b Second notification display device 69c Third notification 112 Management side CPU 117 History memory 171 Separate storage memory 181 to 186 History memory for settings 1 to 6 191 First history memory 192 Second history memory 201 first notification display device 201a to 201g display segment 202 second notification display device 202a to 202g display segment 203 third notification display device 204 fourth Notification display device 221 Work area for specific control 222 Stack area for specific control 223 Work area for non-specific control 224 Stack area for non-specific control 231 Normal counter area 232... Opening/closing execution mode counter area, 233... High-frequency support mode counter area, 234... Calculation result storage area, 241... Management RAM, 251... Reset signal output unit, 252... Program monitoring unit.

Claims (1)

setting means for setting a set value corresponding to the player's advantage;
a situation generating means for creating a settable situation in which setting values can be set by the setting means;
information erasing means for executing information erasing processing;
setting notification means for notifying a setting value to be used in a situation in which the setting is not possible;
a first identification means for identifying that a predetermined operation is being performed using the setting key on the setting key insertion portion;
a second identifying means for identifying that the predetermined operating means is being operated;
a history storage execution means for storing history information of a game corresponding to a predetermined event occurring by executing a game in a history storage means;
information derivation means for deriving mode information corresponding to a game during a predetermined period by using the history information stored in the history storage means;
display control means for controlling display of the mode information derived by the information derivation means on the information display means in a predetermined mode display;
with
The situation generation means uses the setting key to the setting key insertion section in a situation where the supply of operating power to the control means having the setting means is started and the process at the time of supply start is being executed. Based on the fact that it is specified by the first specifying means that the predetermined operation is being performed and that the second specifying means is specifying that the predetermined operation means is being operated. , so as to be in the configurable state,
a situation in which it is not specified by the first specifying means that the predetermined operation is being performed using the setting key on the setting key insertion portion while the process at the time of supply start is being executed; Based on the fact that it is specified by the second specifying means that the predetermined operating means is being operated, the information deleting process is executed by the information deleting means even though the setting is not possible. ,
The setting notifying means specifies, by the first specifying means, that the predetermined operation is being performed using the setting key on the setting key insertion portion in a situation where the process at the time of supply start is being executed. and the operation of the predetermined operation means is not specified by the second specifying means, the setting value of the use object in the situation where the setting is not possible is performed. It is a configuration that allows notification to be performed,
The control means is
Predetermined internal storage means for temporarily storing information upon execution of processing;
In-area processing executing means for executing in-area processing, which is processing using a program stored in a storage area of a predetermined address range in the program storage means;
an out-of-area process execution means for executing an out-of-area process, which is a process using a program stored in a storage area of an address range outside the predetermined address range in the program storage means;
saving executing means for saving information stored in the predetermined internal storage means to a saving storage means when or after the out-of-area processing is started;
a return execution means for returning the information saved in the save storage means to the predetermined internal storage means when or after the out-of-area processing is finished;
with
When the supply start process is started by the control means, a process included in the intra-region process is executed,
The processing by the situation generating means, the processing by the setting notification means, and the information erasing process by the information erasing means are included in the intra-area process ,
A predetermined setting process for setting data that enables the display control means to perform the predetermined mode display is included in the outside area process,
The configuration is such that the information display means notifies the set value in the settable state,
The in-area process executing means comprises means for executing, as the in-area process, an output process for notifying the set value by the information display means in the settable state. Characteristic game machine.

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