JP6958126B2 - Pachinko machine - Google Patents

Description

The present invention relates to a gaming machine.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section (see, for example, Patent Document 1).

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Japanese Unexamined Patent Publication No. 2009-261415

Here, in a gaming machine such as the above example, it is necessary to make the configuration related to the setting and confirmation of the set value suitable, and there is still room for improvement in this respect.

The present invention has been made in view of the above-exemplified circumstances and the like, and an object of the present invention is to provide a gaming machine capable of making a configuration related to setting and confirmation of set values suitable.

The invention according to claim 1 in order to solve the above problems includes a setting means for setting a set value corresponding to a player's advantage and a setting means for setting a set value corresponding to the player's advantage.
A situation generating means for making it possible to set the set value by the setting means, and a situation generating means for making it possible to set the set value.
Information erasing means for executing information erasing processing and
A setting notification means for causing the notification of the set value set by the setting means to be performed in a situation other than the settable situation, and a setting notification means.
A first specific means for identifying that a predetermined operation is being performed using the setting key for the setting key insertion unit, and
A second specific means for identifying that a predetermined operation means is being operated, and
When a predetermined event occurs due to the execution of the game, the history storage execution means for storing the history information of the corresponding game in the history storage means, and the history storage execution means.
An information derivation means for deriving mode information corresponding to a game in a predetermined period by using the history information stored in the history storage means.
A display control means that controls the display of the mode information derived by the information derivation means on the information display means in a predetermined mode display, and
Equipped with a,
The situation generating means uses the setting key to the setting key insertion unit in a situation where the supply of operating power to the control means having the setting means is started and the processing at the start of supply is being executed. Based on the situation in which the predetermined operation is specified by the first specific means and the operation of the predetermined operation means is specified by the second specific means. , Make it possible to set the above
It is a situation in which the first specific means has not specified that the predetermined operation is performed by using the setting key for the setting key insertion unit in the situation where the processing at the start of supply is being executed. Based on the situation in which the operation of the predetermined operating means is specified by the second specific means, the information erasing process is executed by the information erasing means, although it does not become the settable situation. ,
It is a situation in which the first specific means specifies that the predetermined operation is performed by using the setting key for the setting key insertion unit in the situation where the processing at the start of supply is being executed. Based on the situation that the operation of the predetermined operating means is not specified by the second specific means, the setting notification means notifies the set value.
The setting notification means is such that the notification of the set value is performed by the information display means.
The control means
A predetermined internal storage means in which information is temporarily stored when the process is executed, and
In-area processing execution means for executing in-area processing, which is processing using a program stored in a storage area within a predetermined address range in the program storage means, and
An out-of-area processing execution means that executes an out-of-area processing that is a processing using a program stored in a storage area of an address range outside the predetermined address range in the program storage means.
When starting or after starting the out-of-area processing, a save execution means for saving the information stored in the predetermined internal storage means to the save storage means, and a save execution means.
A return execution means for returning the information saved in the save storage means to the predetermined internal storage means when or after the end of the out-of-area processing.
With
When the process at the start of supply is started by the control means, the process included in the intra-regional process is executed.
The processing by the situation generating means, the processing by the setting notification means, and the information erasing processing by the information erasing means are included in the intra-regional processing .

According to the present invention, it is possible to make a configuration related to setting and confirmation of set values suitable.

It is a perspective view which shows the pachinko machine in 1st Embodiment. It is a perspective view which shows the main structure of a pachinko machine by disassembling. It is a front view which shows the structure of the game board. It is explanatory drawing for demonstrating the composition concerning the discharge of the game ball which flowed down the game area. It is a front view of the main control device. It is a block diagram which shows the electric structure of a pachinko machine. It is explanatory drawing for demonstrating the contents of various counters used for a winning or failing lottery. It is explanatory drawing for demonstrating various tables stored in the main ROM. It is a flowchart which shows the main process executed by the main CPU. It is a flowchart which shows the setting value update process executed by the main CPU. It is a flowchart which shows the timer interrupt processing executed by the main CPU. It is a flowchart which shows the special figure special electric control process which is executed by the main CPU. It is a flowchart which shows the special figure variation start processing executed by the main CPU. It is explanatory drawing for demonstrating the configuration in which the detection result of the ball entry detection sensor is input to the main CPU. It is a flowchart which shows the ball entry detection process executed by the main CPU. It is a block diagram for demonstrating the electric structure of the payout control device and various devices communicating with the payout control device. It is a flowchart which shows the timer interrupt processing executed by the payout side CPU. It is a block diagram for demonstrating the electric structure of the management IC. It is explanatory drawing for demonstrating the configuration of the input port of management side I / F. It is explanatory drawing for demonstrating the configuration of the correspondence memory. It is explanatory drawing for demonstrating the structure of the history memory. It is a flowchart which shows the recognition process which is executed by the main CPU. It is a flowchart which shows the management process which is executed by the management side CPU. It is a time chart which shows how the information of the correspondence relation between the 1st to 15th buffers and a signal type is stored in the correspondence relation memory (a) to (d). It is a flowchart which shows the management output process executed by the main CPU. It is a flowchart which shows the history setting process executed by the management side CPU. (A) to (e) are time charts showing how history information is stored in the history memory. It is a flowchart which shows the output process of the setting value update signal executed by the main CPU. It is a flowchart which shows the setting update recognition processing executed by the management side CPU. It is a flowchart which shows the display output processing which is executed by the management side CPU. It is a flowchart which shows the display process which is executed by the management side CPU. (A) It is a flowchart which shows the data output process executed by the main CPU, and (b) is the flowchart which shows the external output process which is executed by the management CPU. It is explanatory drawing for demonstrating various tables stored in the main side ROM in 2nd Embodiment. It is explanatory drawing for demonstrating the structure of the separate storage memory in 3rd Embodiment. It is a flowchart which shows the setting update recognition processing executed by the management side CPU. It is a flowchart which shows the monitoring process of a repetitive change executed by the management side CPU. It is a flowchart which shows the monitoring process of the repetitive change executed by the main CPU in 4th Embodiment. It is a flowchart which shows the setting update recognition processing executed by the management side CPU in 5th Embodiment. It is explanatory drawing for demonstrating the structure of the history memory in 6th Embodiment. It is a flowchart which shows the history setting process executed by the management side CPU. It is a flowchart which shows the setting update recognition processing executed by the management side CPU. It is explanatory drawing for demonstrating the structure of the history memory in 7th Embodiment. It is a flowchart which shows the setting update recognition processing executed by the management side CPU. It is explanatory drawing for demonstrating the structure of the history memory in 8th Embodiment. It is a flowchart which shows the setting update recognition processing executed by the management side CPU. It is a flowchart which shows the history setting process executed by the management side CPU. It is a flowchart which shows the display output processing which is executed by the management side CPU. It is explanatory drawing for demonstrating the configuration of the input port of the management side I / F in 9th Embodiment. It is a flowchart which shows the recognition process which is executed by the main CPU. It is a flowchart which shows the management process which is executed by the management side CPU. It is a time chart which shows a mode that the information of the correspondence relation between the 1st to 12th buffers and a signal type is stored in the correspondence relation memory (a) to (h). It is a block diagram for demonstrating the structure of the signal path which transmits the detection result of each ball entry detection sensor in tenth embodiment to a main CPU and a management IC. It is a front view of the main control device in eleventh embodiment. It is a block diagram for demonstrating the electric structure for performing various displays in the 1st to 4th notification display devices based on the control of MPU. It is a flowchart which shows the display process which is executed by the management side CPU. It is a flowchart which shows the setting value update process executed by the main CPU. (A) It is explanatory drawing for demonstrating the display mode of the 1st to 4th notification display devices when the management result of a game history is displayed, and (b) when the setting state of a pachinko machine is changed. It is explanatory drawing for demonstrating the display mode of the 1st to 4th notification display devices. (A) to (h) is a time chart showing how the first to fourth notification display devices are in the display state. (A) is an explanatory diagram for explaining the configuration of the first notification display device in the twelfth embodiment, and (b) is an explanatory diagram for explaining the configuration of the second notification display device. The first notification display device when displaying the management result of the game history on the first to fourth notification display devices and when displaying that the setting state of the pachinko machine can be changed. It is explanatory drawing for demonstrating the display content of the 2nd notification display device. It is a flowchart which shows the setting value update process executed by the main CPU. It is explanatory drawing for demonstrating the structure of the abnormality display area in 13th Embodiment. It is a flowchart which shows the abnormality setting process executed by the main CPU. It is a flowchart which shows the abnormality display processing executed by the main CPU. It is a flowchart which shows the management output process which is executed by the main CPU in 14th Embodiment. It is a flowchart which shows the main process which is executed by the main CPU in another form. It is explanatory drawing for demonstrating the setting mode of the program and data of the main side ROM in 15th Embodiment. It is explanatory drawing for demonstrating the setting mode of each area in the main RAM. It is a flowchart which shows the timer interrupt processing executed by the main CPU. It is a flowchart which shows the management process which is executed by the main CPU. It is a flowchart which shows the management execution process which is executed by the main CPU. It is explanatory drawing for demonstrating various areas of the work area for non-specific control used for managing a game history. It is a flowchart which shows the check process executed by the main CPU. It is a flowchart which shows the normal ball entry management process which is executed by the main CPU. It is a flowchart which shows the result calculation processing executed by the main CPU. It is a flowchart which shows the display process which is executed by the main CPU. It is a flowchart which shows the management process which is executed by the main CPU in 16th Embodiment. It is a flowchart which shows the management execution process which is executed by the main CPU in 17th Embodiment. It is a flowchart which shows the management execution process which is executed by the main CPU in 18th Embodiment. It is a flowchart which shows the management execution process which is executed by the main CPU in 19th Embodiment. It is a flowchart which shows the management process which is executed by the main CPU in 20th Embodiment. It is a flowchart which shows the management execution process which is executed by the main CPU. It is explanatory drawing for demonstrating the electrical structure in 21st Embodiment. It is a flowchart which shows the main process which is executed by the main CPU in 22nd Embodiment. It is a flowchart which shows the setting value update process executed by the main CPU. It is a flowchart which shows the timer interrupt processing executed by the main CPU. It is a flowchart which shows the setting confirmation process executed by the main CPU. It is a flowchart which shows the RAM monitoring process executed by the main CPU. It is a flowchart which shows the main process which is executed by the main CPU in another form. It is a flowchart which shows the setting value update process executed by the main CPU in another form. It is a flowchart which shows the main process which is executed by the main CPU in 23rd Embodiment. It is a flowchart which shows the RAM monitoring process which is executed by the main CPU in 24th Embodiment. It is a flowchart which shows the RAM monitoring process which is executed by the main CPU in 25th Embodiment. It is a flowchart which shows the management execution process which is executed by the main CPU. It is a flowchart which shows the separate monitoring process executed by the main CPU. It is a flowchart which shows the management process which is executed by the main CPU in the 26th Embodiment. It is a flowchart which shows the management process which is executed by the main CPU in 27th Embodiment. It is a flowchart which shows the management process which is executed by the main CPU in 28th Embodiment. FIG. 5 is a flowchart showing a management process executed by the main CPU in the 29th embodiment. It is a flowchart which shows the main process which is executed by the main CPU in the thirtieth embodiment. It is a flowchart which shows the power failure information storage process executed by the main CPU. (A) It is a block diagram for explaining the structure of MPU, and (b) it is a time chart which shows the state of output of the reset signal by the reset signal output part. It is a flowchart which shows the timer interrupt processing executed by the main CPU. It is a flowchart which shows the setting monitoring process executed by the main CPU. It is a flowchart which shows the management process which is executed by the main CPU. It is a flowchart which shows the management execution process which is executed by the main CPU. It is a flowchart which shows the separate monitoring process executed by the main CPU. It is a flowchart which shows the main process which is executed by the main CPU in 31st Embodiment. It is a flowchart which shows the clear process at the time of abnormality executed by the main CPU. It is a flowchart which shows the clear process for non-specific control executed by the main CPU. It is a flowchart which shows the power failure information storage process executed by the main CPU in 32nd Embodiment. It is a flowchart which shows the checksum monitoring process executed by the main CPU. It is a flowchart which shows the clear process for non-specific control executed by the main CPU. It is a flowchart which shows the main process which is executed by the main CPU in 33rd Embodiment. It is a flowchart which shows the setting confirmation process executed by the main CPU. It is a flowchart which shows the setting value update process executed by the main CPU. It is a flowchart which shows the 1st timer interrupt processing executed by the main CPU. It is a flowchart which shows the setting monitoring process executed by the main CPU. It is a block diagram for demonstrating the configuration for display control of various display circuits by a main CPU. (A) An explanatory diagram for explaining various buffers provided in the work area for specific control, and (b) an explanatory diagram for explaining various storage areas provided in the work area for non-specific control. be. It is explanatory drawing for demonstrating the electrical structure of a display IC. (A) to (g) Indicates that the type data and the display data are transmitted from the main CPU to the display IC and the display data transmitted from the display IC is received by the first display circuit or the second display circuit. It is a time chart. It is a flowchart which shows the 2nd timer interrupt processing executed by the main CPU. (A) It is explanatory drawing for demonstrating the display content of the 1st to 4th notification display devices in the situation where a set value is updated, and (b) the 1st to 4th notifications in a situation where a set value is confirmed. It is explanatory drawing for demonstrating the display content of the display device. It is a flowchart which shows the setting value update process executed by the main CPU in 34th Embodiment. It is explanatory drawing for demonstrating the electrical structure of the calculation result storage area in 35th Embodiment. It is explanatory drawing for demonstrating the display content of the 1st to 4th notification display devices (a) to (d). It is explanatory drawing for demonstrating the display content of the 1st to 4th notification display devices (a) to (c). (A) to (e) is a time chart showing how the base values of various areas are notified by the first to fourth notification display devices. It is a flowchart which shows the result calculation processing executed by the main CPU. It is a flowchart which shows the display process which is executed by the main CPU. It is a flowchart which shows the main process executed by the main CPU. It is a flowchart which shows the 1st timer interrupt processing executed by the main CPU. It is a flowchart which shows the 2nd timer interrupt processing executed by the main CPU. It is a flowchart which shows the setting process in a normal time executed by the main CPU. It is a flowchart which shows the setting confirmation process executed by the main CPU. It is a flowchart which shows the setting value update process executed by the main CPU. (A) to (f) It is a time chart for demonstrating the display content of the 1st to 4th notification display devices at the time when the supply of the operating power to the main CPU is started. It is a flowchart which shows the main process which is executed by the main CPU in the 36th Embodiment. It is a flowchart which shows the main process which is executed by the main CPU in the 37th Embodiment. It is a flowchart which shows the setting process in a normal time executed by the main CPU in 38th Embodiment. It is explanatory drawing for demonstrating the setting correspondence storage area provided in the main side ROM in (a)-(d) 39th Embodiment. It is a flowchart which shows the reading process of the winning / failing table executed by the main CPU. It is a flowchart which shows the setting process to the 5th display data buffer during the setting update executed by the main CPU. It is explanatory drawing for demonstrating the setting correspondence storage area provided in the main side ROM in the 40th Embodiment (a)-(c). It is explanatory drawing for demonstrating (a) various display units provided in the area which can be seen from the front of a pachinko machine through the window panel in 41st Embodiment, and (b) the display content of a round display part is explained. It is explanatory drawing for this. It is a flowchart which shows the main process which is executed by the main CPU in 42nd Embodiment. It is a flowchart which shows the 1st timer interrupt processing executed by the main CPU.

<First Embodiment>
Hereinafter, a first embodiment of a pachinko gaming machine (hereinafter, referred to as “pachinko machine”), which is a type of gaming machine, will be described in detail with reference to the drawings. FIG. 1 is a perspective view of the pachinko machine 10, and FIG. 2 is a perspective view showing the main configurations of the pachinko machine 10 in an exploded manner. In FIG. 2, for convenience, the configuration of the pachinko machine 10 in the game area PA is omitted.

As shown in FIG. 1, the pachinko machine 10 includes an outer frame 11 forming an outer shell of the pachinko machine 10 and a game machine main body 12 rotatably attached to the outer frame 11 in the forward direction. Have. The outer frame 11 is formed by connecting wooden plates on all four sides and has a rectangular frame shape. The pachinko machine 10 is installed in the game hall by attaching and fixing the outer frame 11 to the island equipment. The outer frame 11 is not an indispensable configuration in the pachinko machine 10, and the outer frame 11 may be provided in the island equipment of the game hall.

As shown in FIG. 2, the gaming machine main body 12 includes an inner frame 13, a front door frame 14 arranged in front of the inner frame 13, and a back pack unit 15 arranged behind the inner frame 13. ing. The inner frame 13 of the gaming machine main body 12 is rotatably supported by the outer frame 11. Specifically, the inner frame 13 can rotate forward with the left side as the rotation base end side and the right side as the rotation tip side in front view.

The front door frame 14 is rotatably supported by the inner frame 13, and is rotatable forward with the left side as the rotation base end side and the right side as the rotation tip side in front view. Further, the back pack unit 15 is rotatably supported on the inner frame 13, and can be rotated rearward with the left side as the rotation base end side and the right side as the rotation tip side when viewed from the front.

The gaming machine main body 12 is provided with a locking device at its rotating tip, and has a function of locking the gaming machine main body 12 with respect to the outer frame 11 so as not to be openable. It has a function of locking the door frame 14 so that it cannot be opened with respect to the inner frame 13. Each of these locked states is released by performing an unlocking operation using the unlocking key on the cylinder lock 17 provided exposed on the front surface of the pachinko machine 10.

Next, the configuration of the front side of the gaming machine main body 12 will be described.

The inner frame 13 is mainly composed of a resin base 21 having an outer shape substantially the same as that of the outer frame 11. A substantially elliptical window hole 23 is formed in the central portion of the resin base 21. A game board 24 is detachably attached to the resin base 21. The game board 24 is made of plywood, and the game area PA formed on the front surface of the game board 24 is exposed to the front side of the inner frame 13 through the window hole 23 of the resin base 21.

Here, the configuration of the game board 24 will be described with reference to FIG. FIG. 3 is a front view of the game board 24.

An inner rail portion 25 and an outer rail portion 26 are attached to the game board 24 so as to partition a part of the outer edge of the game area PA, and the guiding means is provided by the inner rail portion 25 and the outer rail portion 26. The guide rail is configured as. The game ball launched from the game ball launch mechanism 27 (see FIG. 2) attached below the window hole 23 in the resin base 21 is guided to the upper part of the game area PA by the guide rail.

Incidentally, the game ball launch mechanism 27 has a launch rail 27a extending toward the guide rail, a ball feeding device 27b for supplying the game ball stored in the upper plate 55a described later onto the launch rail 27a, and a launch rail 27a. It is provided with a solenoid 27c, which is an electric actuator that launches the game ball supplied to the guide rail toward the guide rail. The solenoid 27c is driven and controlled by the rotation operation of the launch operation device (or operation handle) 28 provided on the front door frame 14, and the game ball is launched.

The game board 24 is formed with a plurality of large and small openings penetrating in the front-rear direction. Each opening is provided with a general winning opening 31, a special electric winning device 32, a first operating port 33, a second operating port 34, a through gate 35, a variable display unit 36, a special drawing unit 37, a normal drawing unit 38, and the like. ing. A total of four general winning openings 31 are provided, and one each is provided for the others.

Even if a ball enters the through gate 35, the game ball is not paid out. On the other hand, when a ball enters the general winning opening 31, the special electric winning device 32, the first operating port 33, and the second operating port 34, a predetermined number of game balls are paid out. Specifically, regarding the number of prize balls, when one game ball enters the first operating port 33 or when one game ball enters the second operating port 34. Is executed to pay out one prize ball, and when one game ball is entered into the general winning opening 31, 10 prize balls are paid out to the special electric winning device 32. When one of the game balls is entered, 15 prize balls are paid out.

The number of prize balls is arbitrary. For example, the number of prize balls in the second operating port 34 may be smaller than that in the first operating port 33, and the second operating port 34 is the first operating port. The number of prize balls may be larger than 33.

In addition, an out opening 24a is provided at the lowermost portion of the game board 24, and a game ball that does not enter various winning openings or the like is discharged from the game area PA through the out opening 24a. Further, on the game board 24, a large number of nails 24b are planted in order to appropriately disperse and adjust the falling direction of the game ball, and various members such as a windmill are arranged.

Here, the entry ball means that the game ball passes through the predetermined opening, and not only the mode in which the game ball is discharged from the game area PA after passing through the opening, but also from the game area PA after passing through the opening. A mode in which the flow of the game area PA is continued without being discharged is also included. However, in the following description, in order to clearly distinguish the ball from entering the game ball into the out port 24a, the general winning opening 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the through gate 35 The entry of a game ball into the game is also referred to as a prize.

The first operating port 33 and the second operating port 34 are unitized as an operating port device and installed on the game board 24. Both the first operating port 33 and the second operating port 34 are opened upward. Further, both operating ports 33 and 34 are arranged in the vertical direction so that the first operating port 33 faces upward. The second operating port 34 is provided with a universal electric accessory 34a as a guide piece composed of a pair of left and right movable pieces. In the closed state of the general electric accessory 34a, the game ball cannot win a prize in the second operating port 34, and when the general electric accessory 34a is in the open state, it becomes possible to win a prize in the second operating port 34.

A through gate 35 is provided on the upstream side of the second operating port 34 in the flow direction of the game ball. The through gate 35 has a through hole (not shown) penetrating in the vertical direction, and the game ball winning the through gate 35 flows down the game area PA after winning the prize. As a result, the game ball that has won the through gate 35 can win the second operating port 34.

Based on the winning of the through gate 35, the general electric accessory 34a of the second operating port 34 is switched from the closed state to the open state. Specifically, an internal lottery is performed triggered by winning a prize in the through gate 35, and a normal drawing display of the normal drawing unit 38 provided in the lower right corner, which is an area where the game ball does not pass in the game area PA. The variable display of the pattern is performed in the part 38a. Then, when the result of the internal lottery is the winning of the electric service opening, the stop result corresponding to the result is displayed, and the variable display of the general map display unit 38a is completed, the state shifts to the general electric opening state. In the open state of the general electric power, the general electric accessory 34a is in the open state in a predetermined mode.

The cathode ray display unit 38a is composed of a segment display in which a plurality of display segments by LEDs are arranged in a predetermined manner, but the present invention is not limited to this, and the liquid crystal display device and the organic EL are not limited thereto. It may be composed of a display device, a CRT, a dot matrix display, or other type of display device. In addition, as the pattern to be variablely displayed on the general map display unit 38a, a configuration in which a plurality of types of characters are variablely displayed, a configuration in which a plurality of types of symbols are variablely displayed, a configuration in which a plurality of types of characters are variablely displayed, or a configuration in which a plurality of types of characters are variablely displayed. A configuration in which multiple types of colors are switched and displayed can be considered.

In the normal drawing unit 38, a normal drawing holding display unit 38b is provided at a position adjacent to the normal drawing display unit 38a. The maximum number of game balls that have won a prize in the through gate 35 is held up to four, and the number of held balls is displayed by lighting the general drawing hold display unit 38b.

A winning lottery is performed triggered by winning a prize in the first operating port 33 or the second operating port 34. Then, the lottery result is clarified through the display effect in the symbol display device 41 of the special figure unit 37 and the variable display unit 36.

More specifically, the special figure unit 37 is provided with a special figure display unit 37a. The display area of the special figure display unit 37a is narrower than the display surface 41a of the symbol display device 41. In the special figure display unit 37a, a winning lottery is performed triggered by a prize in the first operating port 33 or a winning in the second operating port 34, so that a variable display or a predetermined display of the pattern is performed. Then, the result corresponding to the lottery result is displayed. The special figure display unit 37a is composed of a segment display in which a plurality of display segments by LEDs are arranged in a predetermined manner, but the present invention is not limited to this, and a liquid crystal display device and an organic EL are used. It may be composed of a display device, a CRT, a dot matrix display, or other type of display device. Further, as the pattern displayed on the special figure display unit 37a, a configuration in which a plurality of types of characters are displayed, a configuration in which a plurality of types of symbols are displayed, a configuration in which a plurality of types of characters are displayed, or a configuration in which a plurality of types of colors are displayed. Is displayed.

In the special figure unit 37, a special figure holding display unit 37b is provided at a position adjacent to the special figure display unit 37a. The number of winning game balls in the first operating port 33 or the second operating port 34 is reserved up to four, and the reserved number is displayed by lighting the special figure reservation display unit 37b.

Regarding the symbol display device 41 In detail, the symbol display device 41 is configured as a liquid crystal display device provided with a liquid crystal display, and the display content is controlled by a display control device described later. The symbol display device 41 is not limited to the liquid crystal display device, and may be another display device having a display screen such as a plasma display device, an organic EL display device, or a CRT, and is a dot matrix display device. You may.

In the symbol display device 41, when the special symbol display unit 37a performs a variable display or a predetermined display of the symbol based on the winning of the first operating port 33 or the winning of the second operating port 34, the symbol is displayed accordingly. A variable display or a predetermined display is performed. For example, on the display surface 41a of the symbol display device 41, three symbol rows of upper, middle, and lower rows are set as a plurality of display areas, and the numbers "1" to "9" are added to each symbol row. The symbols are scrolled and displayed in ascending or descending order. In this scroll display, the scroll display in all the symbol rows is started first, the scroll display is switched to the standby display in the order of the upper symbol row → the lower symbol row → the middle symbol row, and finally a predetermined value is specified in each symbol row. It ends with the symbol still displayed. Then, in the game round in which the game result is a big hit result, a predetermined combination of symbols is stopped and displayed on the effective line preset on the display surface 41a of the symbol display device 41. Specifically, the same odd-numbered symbol combination is stopped and displayed when the most advantageous jackpot result described later is obtained, and the same even-numbered symbol combination is stopped and displayed when the low-probability jackpot result described later is obtained. If the result is a low-winning high-accuracy jackpot, the combination of symbols that are not the same, but if the result is not a low-winning high-accuracy jackpot, the combination of symbols that is not stopped is displayed as a stop.

In the symbol display device 41, not only the display effect triggered by winning a prize in the first operating port 33 or the second operating port 34, but also the display effect in the open / close execution mode that shifts after winning is performed. It is said. Further, based on the winning of any of the operating ports 33 and 34, the display is started on the special figure display unit 37a and the symbol display device 41, and the game times 1 until the predetermined result is displayed and ended. Corresponds to times. Further, the mode of variable display of symbols in the symbol display device 41 is not limited to the above, and is arbitrary, such as the number of symbol rows, the direction of variable display of symbols in the symbol row, the number of symbols in each symbol row, and the like. Can be changed as appropriate. Further, the pattern to be variablely displayed by the symbol display device 41 is not limited to the above-mentioned symbol, and for example, only numbers may be variablely displayed as the symbol.

If a big hit is won in the winning lottery based on the winning of the first operating port 33 or the winning of the second operating port 34, the mode shifts to the opening / closing execution mode in which the special electric winning device 32 can be won. The special electric winning device 32 includes a large winning opening (not shown) leading to the back side of the game board 24, and also includes an opening / closing door 32a for opening and closing the large winning opening. The opening / closing door 32a is arranged in either the closed state or the open state. Specifically, the opening / closing door 32a is normally in a closed state in which the game ball cannot win a prize, and is switched to an open state in which the game ball can win a prize when the transition to the opening / closing execution mode is won in the internal lottery. It has become. By the way, the open / close execution mode is a mode in which the mode shifts when a hit result is obtained. It should be noted that, although it is not impossible to win a prize in the closed state, it may be configured in a state in which it is more difficult for the prize to occur than in the open state.

FIG. 4 is an explanatory diagram for explaining a configuration relating to discharge of a game ball that has flowed down the game area PA.

As described above, the game ball that has entered any of the general winning opening 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the out port 24a is discharged from the game area PA. In other words, the game ball launched from the game ball launching mechanism 27 and flowing into the game area PA is any one of the general winning opening 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the out port 24a. By entering the ball, the ball will be discharged from the game area PA. A game ball that has entered any of the general winning opening 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the out port 24a is guided to the back side of the game board 24.

On the back surface of the game board 24, discharge passage portions 42 to 48 are formed corresponding to each of the general winning opening 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the out port 24a. .. The game balls that have flowed into the discharge passages 42 to 48 are guided to the lower end of the game board 24 on the back side of the game board 24 by flowing down the flowed discharge passages 42 to 48, and become a discharge ball recovery part (not shown). Will be collected. Then, the game balls collected by the discharge ball collection unit are discharged to the ball circulation device of the island facility where the pachinko machine 10 is installed in the game hall.

Various detection sensors 42a to 48a for detecting the game ball are provided in the discharge passage portions 42 to 48. The discharge passage portions 42 to 48 and the detection sensors 42a to 48a will be described below. Since four general winning openings 31 are provided as described above, discharge passage portions 42 to 44 exist corresponding to each of the four general winning openings 31. In this case, one detection sensor 42a, one for each of the first discharge passage portion 42 corresponding to the leftmost general winning opening 31 and the second discharge passage portion 43 corresponding to the general winning opening 31 adjacent to the right. 43a is provided. Specifically, the first winning opening detection sensor 42a is provided so that the detection range exists in the middle position of the first discharge passage portion 42, and the detection range is provided in the middle position of the second discharge passage portion 43. The second winning opening detection sensor 43a is provided so as to exist. The game ball that has entered the leftmost general winning opening 31 is detected by the first winning opening detection sensor 42a on the way through the first discharge passage portion 42, and the game ball that has entered the general winning opening 31 to the right of the first winning opening detection sensor 42a. The ball is detected by the second winning opening detection sensor 43a on the way through the second discharge passage portion 43. Further, a third discharge passage portion 44 formed so as to join the two general winning openings 31 on the right side at an intermediate position is provided. The third discharge passage portion 44 has an inlet side region corresponding to each of the two general winning openings 31, and has one outlet side region when the inlet side regions merge in the middle. doing. The third winning opening detection sensor 44a is provided so that the detection range exists in the middle position of the outlet side region in the third discharge passage portion 44. The game ball that has entered any of the two general winning openings 31 on the right side is detected by the third winning opening detection sensor 44a on the way through the third discharge passage portion 44.

The fourth discharge passage portion 45 exists corresponding to the special electric winning device 32. The special electric power detection sensor 45a is provided so that the detection range exists in the middle position of the fourth discharge passage portion 45, and the game ball that has entered the special electric power winning device 32 is on the way through the fourth discharge passage portion 45. It is detected by the special electric detection sensor 45a. A fifth discharge passage portion 46 exists corresponding to the first operating port 33. The first operating port detection sensor 46a is provided so that the detection range exists in the middle position of the fifth discharging passage portion 46, and the game ball that has entered the first operating port 33 presses the fifth discharging passage portion 46. It is detected by the first operating port detection sensor 46a on the way. A sixth discharge passage portion 47 exists corresponding to the second operating port 34. The second operating port detection sensor 47a is provided so that the detection range exists in the middle position of the sixth discharging passage portion 47, and the game ball that has entered the second operating port 34 uses the sixth discharging passage portion 47. It is detected by the second operating port detection sensor 47a on the way. The seventh discharge passage portion 48 exists corresponding to the out port 24a. The out port detection sensor 48a is provided so that the detection range exists in the middle position of the seventh discharge passage portion 48, and the game ball that has entered the out port 24a is on the way through the seventh discharge passage portion 48. It is detected by the out port detection sensor 48a.

The game ball that is the target of detection by any one of the various detection sensors 42a to 48a is not the target of detection by the other detection sensors 42a to 48a. Further, the gate detection sensor 49a is also provided for the through gate 35, and the game ball passing through the through gate 35 while flowing down the game area PA is detected by the gate detection sensor 49a.

Electromagnetic induction type proximity sensors are used as the various detection sensors 42a to 49a, but any sensor can be used as long as the game balls can be individually detected. Further, the various detection sensors 42a to 49a are electrically connected to the main control device 60 described later, and the detection results of the various detection sensors 42a to 49a are output to the main control device 60. Specifically, the various detection sensors 42a to 49a output a LOW level signal when the game ball is not detected, and output a HI level signal when the game ball is detected. The relationship is not limited to this, and the relationship between HI and LOW may be reversed.

As shown in FIG. 2, the front door frame 14 is provided so as to cover the entire front surface side of the inner frame 13 formed by attaching the game board 24 having the above configuration to the resin base 21. As shown in FIG. 1, the front door frame 14 is formed with a window portion 51 so that almost the entire area of the game area PA can be visually recognized from the front. The window portion 51 has a substantially elliptical shape, and the window panel 52 is fitted therein. The window panel 52 is formed colorless and transparent by glass, but is not limited to this, and may be formed colorless and transparent by synthetic resin, and the gaming area PA is formed from the front of the pachinko machine 10 through the window panel 52. It may be formed to be colored and transparent as long as it is visible.

A display light emitting unit 53 is provided above the window unit 51. Further, a pair of left and right speaker units 54 for outputting sound effects and the like according to the game state are provided. Further, below the window portion 51, an upper bulging portion 55 bulging toward the front side and a lower bulging portion 56 are vertically arranged side by side. An upper plate 55a that opens upward is provided inside the upper bulging portion 55, and a lower plate 56a that also opens upward is provided inside the lower bulging portion 56. The upper plate 55a has a function of temporarily storing the game balls paid out from the payout device described later and guiding them to the game ball launching mechanism 27 side while arranging them in a row. Further, the lower plate 56a has a function of storing excess game balls in the upper plate 55a.

Next, the configuration on the back side of the gaming machine main body 12 will be described.

As shown in FIG. 2, a main control device 60 that controls the main control of the game is mounted on the back surface of the inner frame 13 (specifically, the game board 24). FIG. 5 is a front view of the main control device 60.

As shown in FIG. 5, the main control device 60 includes a main control board 61 housed in a board box 60a. The MPU 62 is mounted on the element mounting surface, which is one plate surface of the main control board 61. The substrate box 60a is transparently formed so that the MPU 62 housed in the substrate box 60a can be visually recognized from the outside of the substrate box 60a. Although the substrate box 60a is formed to be colorless and transparent, it may be formed to be colored and transparent as long as the MPU 62 housed in the substrate box 60a can be visually observed from the outside of the substrate box 60a. The main control device 60 is mounted on the back surface of the resin base 21 so that the facing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10 in the board box 60a. Therefore, by opening the gaming machine main body 12 to the front of the pachinko machine 10 with respect to the outer frame 11 to expose the back surface of the resin base 21, the facing wall portion 60b of the substrate box 60a can be visually observed. The MPU 62 can be visually observed through the facing wall portion 60b.

The substrate box 60a is formed by combining a plurality of case bodies 60c in the front-rear direction, and the plurality of case bodies 60c prevent the case bodies 60c from being separated and traces of the case bodies 60c when they are separated. A joint portion 60e is provided for leaving the above. A plurality of connecting portions 60e are arranged side by side on one side of the substantially rectangular parallelepiped substrate box 60a. As a result, even if the part of the connecting portion 60e is broken to separate the case body 60c in a state where the separation of the case body 60c is prevented by using a part of the connecting portion 60e, another coupling is subsequently performed. By putting the portion 60e in the coupled state, it is possible to prevent the case body 60c from being separated again. Further, when the case body 60c is separated, the joint portion 60e is destroyed and its trace remains, so that it is possible to grasp whether or not the case body 60c is illegally separated by visually checking the joint portion 60e. It will be possible. Further, a sealing sticker 60f is attached to the side of the substrate box 60a opposite to the side on which the connecting portions 60e are arranged side by side so as to straddle the boundary between the case bodies 60c. When the seal seal 60f is peeled off, an adhesive layer remains on the case body 60c. As a result, when the sealing seal 60f is peeled off when the case body 60c is separated, it is possible to leave a trace thereof.

In the main control device 60 having the above configuration, the main control board 61 is owned by the manager of the game hall in order to give an opportunity to change the setting state of the pachinko machine 10 in the range of "setting 1" to "setting 6". The setting key insertion unit 68a, in which the setting key is inserted and turned on, the update button 68b, which is operated to sequentially change the setting state of the pachinko machine 10 after the setting key insertion unit 68a is turned on, and the main control device. A reset button 68c operated to clear the data of the main RAM 65 provided in the MPU 62 of the 60, and the first to third notification display devices 69a to 69c for notifying the management result of the game history. , Are provided. Further, the MPU 62 mounted on the main control board 61 is connected to the connection terminal of the external device in order to read the management result of the game history or the information (program and data) stored in the main ROM 64 by the external device. A reading terminal 68d for the purpose is provided. The setting state of the pachinko machine 10 is not limited to the six stages of "setting 1" to "setting 6", and is arbitrary as long as there are a plurality of stages.

The setting key insertion unit 68a, the update button 68b, the reset button 68c, the reading terminal 68d (that is, the MPU 62), and the first to third notification display devices 69a to 69c are all provided on the element mounting surface of the main control board 61. ing. Further, the element mounting surface of the main control board 61 faces the facing wall portion 60b of the board box 60a as described above, but the setting key insertion section 68a, the update button 68b, the reset button 68c, and the reading terminal 68d face each other. Not covered by wall 60b. That is, the facing wall portion 60b has a region facing each of the setting key insertion portion 68a, the update button 68b, the reset button 68c, and the reading terminal 68d as individual openings. As a result, the setting key can be inserted into the setting key insertion unit 68a without the need to open the board box 60a, the update button 68b can be pressed, and the reset button 68c is pressed. It is possible to connect the connection terminal of the external device to the reading terminal 68d.

By inserting the setting key into the setting key insertion unit 68a and rotating the setting key in a predetermined direction, the setting key insertion unit 68a is turned on. By starting the supply of the operating power to the pachinko machine 10 in that state (that is, by starting the supply of the operating power to the MPU 62 of the main controller 60), it is possible to change the setting state of the pachinko machine 10. It becomes a changeable state. Then, each time the update button 68b is pressed once in this state, the setting state of the pachinko machine 10 is changed step by step in ascending order in the range of "setting 1" to "setting 6". If the update button 68b is operated in the state of "setting 6", it is updated to "setting 1". Further, the setting key insertion unit 68a is turned off by rotating the setting key inserted in the setting key insertion unit 68a in the direction opposite to the predetermined direction from the ON operation position to return to the initial position. Become. When the setting key insertion unit 68a is turned off, the changeable state ends, and the game can be played in the state of the set value at that time. That is, the set value cannot be changed even if the update button 68b is operated after the changeable state ends.

The ON operation for the setting key insertion unit 68a is valid only when the supply of the operating power to the pachinko machine 10 is started (that is, when the supply of the operating power to the MPU 62 of the main control device 60 is started). Therefore, even if the MPU 62 of the main control device 60 performs an ON operation on the setting key insertion unit 68a after the processing at the start of supplying the operating power is completed, the set value cannot be changed.

The setting state of the pachinko machine 10 determines the advantage per unit time in the pachinko machine 10, and the larger n of "setting n" (n is an integer of "1" to "6"), the larger the value (that is, the setting). (The higher the value), the higher the advantage. Although the details will be described later, there are a low probability mode in which the winning probability is relatively low and a high probability mode in which the winning probability is relatively high as a winning / losing lottery mode for determining the winning probability of the jackpot result. The higher the probability, the higher the winning probability of the jackpot result in the low probability mode. On the other hand, the winning probability of the jackpot result in the high probability mode is constant regardless of the set value.

The reset button 68c is operated to clear the data of the main RAM 65 as described above, but in order to generate the clearing of the data, the operating power is supplied to the pachinko machine 10 while the reset button 68c is pressed. (That is, it is necessary to start supplying the operating power to the MPU 62 of the main controller 60). The ON operation for the reset button 68c is valid only when the supply of the operating power to the pachinko machine 10 starts (that is, when the supply of the operating power to the MPU 62 of the main controller 60 starts). Therefore, even if the reset button 68c is pressed after the processing at the start of supplying the operating power in the MPU 62 of the main control device 60 is completed, the data in the main RAM 65 cannot be cleared.

As described above, the reading terminal 68d is connected to the connection terminal of the external device in order to read the management result of the game history or the information (program and data) stored in the main ROM 64 by the external device. In order to perform external output to the pachinko machine 10, it is necessary to start supplying operating power to the pachinko machine 10 with the connection terminal of the external device connected to the reading terminal 68d (that is, the operation of the main control device 60 to the MPU 62). It is necessary to start supplying power). The connection of the external device to the reading terminal 68d is valid only when the supply of the operating power to the pachinko machine 10 starts (that is, when the supply of the operating power to the MPU 62 of the main control device 60 starts). Therefore, even if the external device is connected to the reading terminal 68d after the processing at the start of supplying the operating power in the MPU 62 of the main control device 60 is completed, the external output to the external device is not performed.

The first to third notification display devices 69a to 69c are all segment display devices in which seven LED display segments are arranged, but the present invention is not limited to this, and a single multicolor light emitting type is used. It may be a light emitting body, a liquid crystal display device, or an organic EL display. The first to third notification display devices 69a to 69c are all installed so that their display surfaces face the direction in which the element mounting surface of the main control board 61 faces, and the facing wall portion 60b of the board box 60a provides. It is covered. In this case, since the substrate box 60a is transparently formed, the display surfaces of the first to third notification display devices 69a to 69c housed in the substrate box 60a are visually observed from the outside of the substrate box 60a. It becomes possible. Further, as described above, the main control device 60 is mounted on the back surface of the resin base 21 in the board box 60a so that the facing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10. Therefore, when the game machine main body 12 is opened to the front of the pachinko machine 10 with respect to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to third notifications are sent through the facing wall portion 60b. It is possible to visually check the display surfaces of the display devices 69a to 69c.

On the display surface of the first notification display device 69a, not only the numbers "0" to "9" but also various characters including alphabetic characters are displayed. On the other hand, the numbers "0" to "9" are displayed on the second notification display device 69b and the third notification display device 69c. The management result of the game history is notified by using the first to third notification display devices 69a to 69c, and the content of this notification will be described in detail later. Further, in the changeable state in which the setting state of the pachinko machine 10 can be changed, a value corresponding to the current set value is displayed on the third notification display device 69c. The value corresponding to the set value may be displayed on the first notification display device 69a, or may be displayed on the second notification display device 69b. Further, the set value before the changeable state is displayed on the notification display device of one of the first to third notification display devices 69a to 69c, and the current set value is the first to third notification. The display device may be configured to be displayed on another notification display device among the display devices 69a to 69c.

As shown in FIG. 2, the back pack unit 15 is installed so as to cover the back side of the inner frame 13 including the main control device 60. The back pack unit 15 includes a back pack 72 formed of a transparent synthetic resin, and the payout mechanism unit 73 and the control device collecting unit 74 are attached to the back pack 72.

The payout mechanism unit 73 includes a tank 75 in which game balls supplied from the island equipment of the game hall are sequentially replenished, and a payout device 76 for paying out the game balls stored in the tank 75. The game ball paid out from the payout device 76 is discharged to the upper plate 55a or the lower plate 56a through the payout passage provided on the downstream side of the payout device 76. The payout mechanism unit 73 is provided with, for example, a back pack board having a power switch for turning on and off the power supply while supplying a main power supply of 24 volts AC.

The control device collective unit 74 generates and outputs predetermined electric power required by the payout control device 77 having a function of controlling the payout device 76 and various control devices, and is accompanied by the operation of the launch operation device 28 by the player. It is equipped with a power supply / launch control device 78 that controls the launch of the game ball. The payout control device 77 and the power supply / launch control device 78 are arranged so as to be stacked in the front-rear direction so that the payout control device 77 is behind the pachinko machine 10.

<Electrical configuration of pachinko machine 10>
FIG. 6 is a block diagram showing an electrical configuration of the pachinko machine 10.

The main control device 60 includes a main control board 61 that controls the main control of the game, and a power failure monitoring board 67 that monitors the power supply. The MPU 62 is mounted on the main control board 61. In addition to the main CPU 63, which is an arithmetic processing unit including a control unit and an arithmetic unit, the MPU 62 includes a main ROM 64, a main RAM 65, and a management IC 66. In addition to the above elements, the MPU 62 has a built-in interrupt circuit, timer circuit, data input / output circuit, various counter circuits as a random number generator, and the like.

The main ROM 64 is a memory (that is, non-volatile storage means) that does not require external power supply for storage retention such as NOR type flash memory and NAND type flash memory, and is used as read-only. The main ROM 64 stores various control programs and fixed value data executed by the main CPU 63.

The main RAM 65 is a memory (that is, a volatile storage means) that requires external power supply for storage retention such as SRAM and DRAM, and is used for both reading and writing. The main RAM 65 can be randomly accessed, and the time required for reading is faster than that of the main ROM 64 when compared with the same data capacity. The main RAM 65 temporarily stores various data and the like for the execution of the control program stored in the main ROM 64.

The management IC 66 is a management device that manages the game history based on the information supplied from the main CPU 63. Although the details will be described later, the management IC 66 grasps the entry history of the game ball into the general winning opening 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the out port 24a. The frequency of entering balls into the general winning opening 31, the special electric winning device 32, the first operating opening 33, and the second operating opening 34 is grasped according to the grasped ball entering history. In addition, the management IC 66 grasps the frequency of occurrence of the open / close execution mode and the high frequency support mode, which will be described later.

The MPU 62 is provided with an input port and an output port, respectively. A power failure monitoring board 67 and a payout control device 77 provided in the main control device 60 are connected to the input side of the MPU 62. A power supply / emission control device 78 having a function of supplying operating power is connected to the power failure monitoring board 67, and operating power is supplied to the MPU 62 via the power failure monitoring board 67.

Various sensors such as ball entry detection sensors 42a to 49a are connected to the input side of the MPU 62. As described above, the ball entry detection sensors 42a to 49a include the first winning opening detection sensor 42a, the second winning opening detection sensor 43a, the third winning opening detection sensor 44a, the special electric detection sensor 45a, and the first operating port detection. A sensor 46a, a second operating port detection sensor 47a, an out port detection sensor 48a, and a gate detection sensor 49a are included. Based on the detection results of the ball entry detection sensors 42a to 49a, the main CPU 63 makes a ball entry determination to each ball entry unit. Further, in the main CPU 63, various lottery is executed based on the winning of the first operating port 33, and various lottery is executed based on the winning of the second operating port 34.

On the input side of the MPU 62, a setting key insertion portion 68a, an update button 68b, and a reset button 68c provided on the main control board 61 are provided. The setting key insertion unit 68a is provided with a sensor (not shown), and the sensor detects whether the setting key insertion unit 68a is located at the ON operation position or the OFF operation position. Then, the main CPU 63 specifies whether the setting key insertion unit 68a is located at the ON operation position or the OFF operation position based on the detection result from the sensor. The update button 68b is provided with a sensor (not shown), and the sensor detects whether or not the update button 68b is pressed. Then, the main CPU 63 specifies whether or not the update button 68b is pressed based on the detection result from the sensor. The reset button 68c is provided with a sensor (not shown), and the sensor detects whether or not the reset button 68c is pressed. Then, the main CPU 63 specifies whether or not the reset button 68c is pressed based on the detection result from the sensor.

A power failure monitoring board 67, a payout control device 77, and a voice emission control device 81 are connected to the output side of the MPU 62. The payout control device 77 outputs, for example, a prize ball command based on the fact that the game ball has entered the prize ball corresponding entry unit corresponding to the payout of the game ball in the above-mentioned entry unit. NS. Various commands such as a variation command, a type command, and an opening command are output to the voice emission control device 81.

On the output side of the MPU 62, there is a drive unit 32b for special electric power that opens and closes the opening / closing door 32a of the special electric winning device 32, and a drive unit 34b for general electric power that opens and closes the general electric accessory 34a of the second operating port 34. The drawing unit 37 and the drawing unit 38 are connected. Incidentally, the special figure unit 37 is provided with a special figure display unit 37a and a special figure hold display unit 37b, all of which are connected to the output side of the MPU 62. Similarly, the normal drawing unit 38 is provided with a normal drawing display unit 38a and a normal drawing holding display unit 38b, all of which are connected to the output side of the MPU 62. Various driver circuits are provided on the main control board 61, and the MPU 62 executes drive control of various drive units and various display units through the driver circuits.

That is, in the open / close execution mode, the drive control of the special electric drive unit 32b is executed by the main CPU 63 so that the special electric winning device 32 is opened and closed. Further, when the open state of the utility accessory 34a is won, the drive control of the drive unit 34b for the utility is executed by the main CPU 63 so that the utility accessory 34a is opened and closed. Further, at each game round, the display control of the special figure display unit 37a is executed by the main CPU 63. Further, when the lottery result of whether or not to open the general electric accessory 34a is clearly indicated, the display control of the general drawing display unit 38a is executed by the main CPU 63. Further, when a prize is generated in the first operating port 33 or the second operating port 34, or when the variable display is started in the special figure display unit 37a, the display control of the special figure holding display unit 37b is performed in the main CPU 63. Is executed, and when a prize is generated in the through gate 35, or when the variable display is started in the normal figure display unit 38a, the display control of the normal figure hold display unit 38b is executed in the main CPU 63.

The first to third notification display devices 69a to 69c are connected to the output side of the MPU 62. Further, the management result of the game history in the management IC 66 is notified through the display on the first to third notification display devices 69a to 69c. Further, when the setting state of the pachinko machine 10 is changed, the current set value is displayed on the third notification display device 69c. In this case, the first notification display device 69a and the second notification display device 69b are displayed and controlled by the management IC 66 and not displayed by the main CPU 63, whereas the third notification display device 69c is displayed by the main CPU 63. The display is controlled and the display is controlled by the management IC 66. For the display of the third notification display device 69c, the display control by the main CPU 63 has priority over the display control by the management IC 66.

However, the present invention is not limited to this, and the display control of the third notification display device 69c may be controlled by the management IC 66 and not by the main CPU 63. In this case, when the current set value is displayed on the third notification display device 69c when the setting state of the pachinko machine 10 is changed, the main CPU 63 instructs the management IC 66 to display the set value. good.

The MPU 62 is provided with a reading terminal 68d. The reading terminal 68d is provided with a sensor (not shown), and the sensor detects whether or not a connection terminal of an external device is connected to the reading terminal 68d. Then, the main CPU 63 specifies whether or not the connection terminal of the external device is connected to the reading terminal 68d based on the detection result from the sensor. When an external device is connected to the reading terminal 68d, the management result of the game history in the management IC 66 or the information (program and data) stored in the main ROM 64 is output to the external device.

The power failure monitoring board 67 relays between the main control board 61 and the power supply / emission control device 78, and monitors the DC stable 24 volt voltage, which is the maximum voltage output from the power supply / emission control device 78. The payout control device 77 controls the payout of prize balls and rental balls by the payout device 76 based on the prize ball command received from the main control device 60.

The power supply / launch control device 78 is connected to, for example, a commercial power supply (external power supply) in a game hall or the like. Then, based on the external power supplied from the commercial power source, the operating power required for each of the main control board 61, the payout control device 77, and the like is generated, and the generated operating power is supplied. By the way, the power supply / emission control device 78 is provided with a power supply unit for power failure such as a backup capacitor, and even when the power supply of the pachinko machine 10 is in the OFF state, the power supply unit for power failure is mainly used. Power for storing and holding is supplied to the main RAM 65 of the control device 60 and the payout control device 77. Further, the power supply / launch control device 78 is responsible for launch control of the game ball launch mechanism 27, and the game ball launch mechanism 27 is driven when predetermined launch conditions are met. Further, the payout mechanism unit 73 is provided with a power switch as described above, and when the power switch is turned on, the supply of operating power to the pachinko machine 10 is started, and the power switch is turned off. As a result, the supply of operating power to the pachinko machine 10 is stopped.

The voice emission control device 81 drives and controls the display light emission unit 53 and the speaker unit 54 provided on the front door frame 14 based on various commands received from the main control device 60, and also controls the display control device 82. Is. The display control device 82 executes the display control of the symbol display device 41 based on the command received from the voice emission control device 81.

<Electrical configuration for performing various lottery on the main CPU 63>
Next, an electrical configuration for performing various lottery by the main CPU 63 will be described with reference to FIG. 7.

The main CPU 63 uses various counter information during the game to perform a big hit generation lottery, a setting of the display of the special figure display unit 37a, a setting of the symbol display of the symbol display device 41, a setting of the display of the normal figure display unit 38a, and the like. Specifically, as shown in FIG. 7, the hit random number counter C1 used for the lottery for hit occurrence, the jackpot type counter C2 used for determining the jackpot type, and the symbol display device 41 are displaced and fluctuate. The reach random number counter C3 used for the reach generation lottery, the random number initial value counter CINI used for setting the initial value of the hit random number counter C1, and the display duration in the special figure display unit 37a and the symbol display device 41 are determined. The variable type counter CS is used. Further, the general electric accessory opening counter C4 used for the lottery as to whether or not the general electric accessory 34a of the second operating port 34 is set to the general electric accessory open state is used. The counters C1 to C3, CINI, CS, and C4 are provided in various counter areas 65b of the main RAM 65.

Each of the counters C1 to C3, CINI, CS, and C4 is a loop counter in which 1 is added to the previous value each time the counter is updated, and the counter returns to "0" after reaching the maximum value. Each counter is updated at short intervals. Information corresponding to the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is provided in the main RAM 65 as an acquisition information storage means when a prize is generated in the first operating port 33 or the second operating port 34. It is stored in the reserved storage area 65a.

The hold storage area 65a includes a hold area RE and an execution area AE. The holding area RE includes a first holding area RE1, a second holding area RE2, a third holding area RE3, and a fourth holding area RE4, and is used in the winning history of the first operating port 33 or the second operating port 34. At the same time, the combination of the numerical information of the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 is stored as the hold information in any of the hold areas RE1 to RE4.

In this case, in the first holding area RE1 to the fourth holding area RE4, when the first operating port 33 or the second operating port 34 is awarded a plurality of times in succession, the first holding area RE1 → the second Each numerical information is stored in the order of the holding area RE2 → the third holding area RE3 → the fourth holding area RE4 in chronological order. By providing the four holding areas RE1 to RE4 in this way, up to four winning histories of the game balls in the first operating port 33 or the second operating port 34 can be held and stored. ..

The number that can be stored on hold is not limited to 4, and may be any other number such as 2, 3, or 5 or more, or may be a single number.

The execution area AE is an area for moving each numerical information stored in the first holding area RE1 of the holding area RE when starting the variable display of the special figure display unit 37a, and is the start of one game. At that time, a hit / fail judgment is performed based on various numerical information stored in the execution area AE.

Each of the above counters will be described in detail.

First, the general electric utility opening counter C4 will be described. The general electric accessory opening counter C4 is configured to, for example, add 1 in order within the range of 0 to 250 and return to "0" after reaching the maximum value. The general electric accessory opening counter C4 is periodically updated, and is stored in the general electric holding area 65c of the main RAM 65 at the timing when the game ball wins the through gate 35. Then, at a predetermined timing, a lottery is performed as to whether or not to control the utility accessory 34a to the open state according to the value of the stored utility accessory opening counter C4.

In the pachinko machine 10, a plurality of types of support modes are set so that the modes of support by the general electric accessory 34a are different from each other. Specifically, in the support mode, the general electric accessory 34a of the second operating port 34 is opened per unit time when compared in the situation where the game ball is continuously launched in the game area PA in the same manner. A high-frequency support mode and a low-frequency support mode are set so that the frequency of states is relatively high or low.

In the high-frequency support mode and the low-frequency support mode, the probability of winning the general-purpose open state in the general-purpose open lottery using the general-purpose accessory release counter C4 is the same (for example, both are 4/5). In the high frequency support mode, the number of times the general electric accessory 34a is opened when the general electric power open state is won is set more than in the low frequency support mode, and one opening time is set longer. Has been done. In this case, in the high-frequency support mode, when the general electric power open state is won and the general electric accessory 34a is opened multiple times, from the end of one open state to the start of the next open state. The closing time is set shorter than the one-time opening time. Furthermore, in the high-frequency support mode, as compared with the low-frequency support mode, the minimum secured time is secured for the next public power opening lottery after one public power opening lottery is performed (that is, the general drawing). The duration of one display on the display unit 38a) is set short.

As described above, in the high frequency support mode, the probability that the second operating port 34 is won is higher than in the low frequency support mode. In other words, in the low frequency support mode, the probability of winning the first operating port 33 is higher than that of the second operating port 34, but in the high frequency support mode, the second operation is higher than the first operating port 33. The probability that a prize will be given to the mouth 34 increases. Then, when a prize is won in the second operating port 34, a predetermined number of game balls are paid out. Therefore, in the high frequency support mode, the player plays a game while not reducing the number of balls held so much. It can be carried out.

The configuration for increasing the frequency of the high-frequency support mode to be in the open state per unit time is higher than that of the low-frequency support mode. It may be configured to increase the probability of winning the open state. In addition, the reserved time secured for the next public electric opening lottery after one public electric opening lottery is performed (for example, is executed on the general drawing display unit 38a based on the winning of the through gate 35). In a configuration in which multiple types of variable display times are prepared, the high-frequency support mode is set so that a shorter reservation time is easier to select or the average reservation time is shorter than the low-frequency support mode. May be good. Furthermore, the number of times of opening is increased, the opening time is lengthened, and the securing time secured for the next public power opening lottery after one public power opening lottery is held is shortened. The advantage of the high frequency support mode over the low frequency support mode may be enhanced by applying any one of the conditions or any combination of the conditions of shortening the average time and increasing the winning probability.

Here, as described above, the pachinko machine 10 has the setting states of "setting 1" to "setting 6", but whichever the opening frequency and opening mode of the general electric accessory 34a in the low frequency support mode The set values are the same, and the opening frequency and opening mode of the pachinko machine 34a in the high frequency support mode are the same regardless of the set values. However, the present invention is not limited to this, and for at least one of the low-frequency support mode and the high-frequency support mode, at least one of the opening frequency and the opening mode of the general electric accessory 34a varies depending on the setting state of the pachinko machine 10. It may be configured. For example, the higher the set value, the higher the frequency of opening the utility accessory 34a in the low frequency support mode. In the low frequency support mode, the second operation when the utility accessory 34a is opened once. The configuration may be such that the probability of the game ball entering the mouth 34 is high. Further, the higher the set value, the higher the frequency of opening the utility accessory 34a in the high-frequency support mode. In the high-frequency support mode, the utility accessory 34a is opened once. The configuration may be such that the probability of the game ball entering the operating port 34 is high.

Next, the hit random number counter C1 will be described. The hit random number counter C1 is configured to be incremented by 1 in order within the range of 0 to 599, and return to "0" after reaching the maximum value. In particular, when the hit random number counter C1 makes one round, the value of the random number initial value counter CINI at that time is read as the initial value of the hit random number counter C1. The random number initial value counter CINI is a loop counter similar to the hit random number counter C1 (value = 0 to 599). The winning random number counter C1 is periodically updated, and is stored in the hold storage area 65a of the main RAM 65 at the timing when the game ball wins the first operating port 33 or the second operating port 34.

The value of the random number that wins the jackpot is stored in the main ROM 64 as a winning / failing table. FIG. 8 is an explanatory diagram for explaining various tables stored in the main ROM 64. As the hit / fail table, the low probability hit / fail tables 64a to 64f for the low probability mode and the high probability hit / miss table 64 g for the high probability mode are stored.

The low accuracy / rejection tables 64a to 64f are provided so as to correspond one-to-one with the setting states of "setting 1" to "setting 6". That is, the low accuracy table 64a for setting 1 that is referred to when the setting state of the pachinko machine 10 is "setting 1" and the setting that is referred to when the setting state of the pachinko machine 10 is "setting 2". The low accuracy table 64b for setting 2 and the low accuracy table 64c for setting 3 referred to when the setting state of the pachinko machine 10 is "setting 3", and the setting state of the pachinko machine 10 is "setting 4". The low accuracy table 64d for setting 4 referred to in the case of, the low accuracy table 64e for setting 5 referred to when the setting state of the pachinko machine 10 is "setting 5", and the pachinko machine 10 There is a low accuracy table 64f for setting 6 that is referred to when the setting state of is "setting 6".

These low probability / rejection tables 64a to 64f are set so that the higher the set value, the higher the winning probability of the jackpot result. Specifically, when the low accuracy table 64a for setting 1 is referred to, a big hit result is obtained at about 1/320, and when the low accuracy table 64b for setting 2 is referred to, about 1/310. When the low accuracy table 64c for setting 3 is referred to, the big hit result is obtained at about 1/300, and when the low accuracy table 64d for setting 4 is referred to, about 1/290. When the low accuracy table 64e for setting 5 is referred to, the big hit result is obtained at about 1/280, and when the low accuracy table 64f for setting 6 is referred to, about 1/270. Will result in a big hit. As a result, when the setting state of the pachinko machine 10 is a high setting value, a big hit result is likely to occur in the low probability mode, which is advantageous for the player.

On the other hand, only one type of the high-accuracy accuracy table 64g is provided so as to be common in any of the setting states of "setting 1" to "setting 6". The high probability winning / failing table 64g is set so that the winning probability of the jackpot result is higher than that of the low probability winning / failing tables 64a to 64f in any of the setting states of "setting 1" to "setting 6". Specifically, when the high accuracy table 64g is referred to, a big hit result is obtained at about 1/30. This makes it possible to make the high-probability mode more advantageous than the low-probability mode regardless of the setting state of the pachinko machine 10. In addition, even if the setting state is the lowest, "setting 1", it is possible to increase the probability of a jackpot result by setting the high probability mode as compared with the low probability mode of "setting 6", which is the highest setting state. Will be. Further, in the high probability mode, it is possible to prevent the advantage or disadvantage due to the setting state of the pachinko machine 10 from occurring, and the storage capacity for storing 64 g of the high probability accuracy table in advance in the main ROM 64 is suppressed. It becomes possible.

The jackpot type counter C2 is configured to add 1 in order within the range of 0 to 29 and return to "0" after reaching the maximum value. The jackpot type counter C2 is periodically updated, and is stored in the hold storage area 65a at the timing when the game ball wins the first operating port 33 or the second operating port 34.

In this pachinko machine 10, a plurality of jackpot results are set. These plurality of jackpot results are (1) an mode of opening / closing control of the special electric winning device 32 in the opening / closing execution mode, (2) a lottery mode in the winning / failing lottery means after the opening / closing execution mode ends, and (3) a third after the opening / closing execution mode ends. A plurality of jackpot results are set by providing differences in the three conditions of the support mode in the general electric accessory 34a of the two operating ports 34.

The mode of opening / closing control of the special electric winning device 32 in the opening / closing execution mode is high so that the frequency of winning the special electric winning device 32 from the start to the end of the opening / closing execution mode is relatively high or low. Frequent winning mode and low frequency winning mode are set. Specifically, in either the high-frequency winning mode or the low-frequency winning mode, the game is executed up to a predetermined number of round games.

A round game is a game that continues until either a predetermined upper limit duration elapses or a predetermined upper limit number of game balls wins a special electric winning device 32. That is. Further, the number of round games in the open / close execution mode triggered by the jackpot result is the same as the fixed number of rounds regardless of the type of jackpot result triggered by the transition. Specifically, the maximum number of round games is set to 15 rounds regardless of which jackpot result is obtained.

Further, in the pachinko machine 10, a plurality of types of one-time opening mode of the special electric winning device 32 are set with different opening durations from the opening to the closing of the special electric winning device 32. Specifically, a long-time mode in which the opening duration is set to 29 seconds, which is a long time, and a short-time mode in which the opening duration is set to 0.06 seconds, which is shorter than the long time, are used. Is set.

In the pachinko machine 10, when the launch operation device 28 is operated by the player, the game ball launch mechanism 27 is driven so that one game ball is launched toward the game area PA every 0.6 seconds. Be controlled. In addition, the maximum number of end conditions for round games is set to nine. Then, in the long-time mode of the above-mentioned opening modes, the opening duration is set to be longer than the product of the firing cycle of the game ball and one round game. On the other hand, in the short-time mode, the opening duration is set to be shorter than the product of the firing cycle of the game ball and one round game, and more specifically, the opening duration is shorter than the firing cycle of the game ball. Therefore, when the opening is performed once in the long-time mode, it is expected that the special electric winning device 32 will be awarded the maximum number of prizes in one round game, and 1 in the short-time mode. When the number of times is opened, it is expected that no prize will be generated for the special electric winning device 32, or even if a prize is generated, the number will be about one.

In the high-frequency winning mode, the special electric winning device 32 is opened once in each round game in a long-time mode. On the other hand, in the low-frequency winning mode, the special electric winning device 32 is opened once in each round game in a short-time mode.

The number of times the special electric winning device 32 is opened and closed in the high-frequency winning mode and the low-frequency winning mode, the number of round games, the opening duration for one opening, and the upper limit number in one round game are those in the high-frequency winning mode. Is not limited to the above values and is arbitrary as long as the frequency of winning the special electric winning device 32 from the start to the end of the opening / closing execution mode is higher than that of the low frequency winning mode. Is.

The distribution destination of the jackpot result with respect to the jackpot type counter C2 is stored in the main ROM 64 as the distribution table 64h as shown in FIG. Then, in the distribution table 64h, a low probability jackpot result, a low winning high probability jackpot result, and the most advantageous jackpot result are set as distribution destinations of the jackpot result when the jackpot result is obtained.

The low-probability jackpot result is a jackpot result in which the open / close execution mode becomes the high-frequency winning mode, and after the open / close execution mode ends, the winning / losing lottery mode becomes the low-probability mode and the support mode becomes the high-frequency support mode. However, this high-frequency support mode shifts to the low-frequency support mode when the number of games reaches the end reference number (specifically, 100 times) after the transition.

The low winning high probability jackpot result is a jackpot result in which the opening / closing execution mode becomes the low frequency winning mode, and after the opening / closing execution mode ends, the winning / failing lottery mode becomes the high probability mode and the support mode becomes the high frequency support mode. be. These high-probability mode and high-frequency support mode continue until the lottery result in the winning / losing lottery becomes a big hit state and the state shifts to the big hit state.

The most advantageous jackpot result is a jackpot result in which the open / close execution mode becomes the high-frequency winning mode, and after the open / close execution mode ends, the winning / losing lottery mode becomes the high-probability mode and the support mode becomes the high-frequency support mode. These high-probability mode and high-frequency support mode continue until the lottery result in the winning / losing lottery becomes a big hit state and the state shifts to the big hit state.

In relation to each of the above game states, the normal game state is not an open / close execution mode, but a state in which the winning / failing lottery mode is a low probability mode and the support mode is a low frequency support mode. Further, as a game result, a configuration in which a low winning high probability jackpot result is not set may be used. Further, in the open / close execution mode in the low winning high probability jackpot result, the number of round games may be smaller than that in the case of the low probability jackpot result and the most advantageous jackpot result.

In the distribution table 64h, among the values of the jackpot type counter C2 of "0 to 29", "0 to 9" corresponds to the low accuracy jackpot result, and "10 to 14" corresponds to the low winning high accuracy jackpot result. Corresponding, "15-29" corresponds to the most advantageous jackpot result.

Only one type of distribution table 64h is provided so as to be common in any of the setting states of "setting 1" to "setting 6". As a result, it is possible to prevent an advantage or disadvantage due to the setting state of the pachinko machine 10 in the distribution mode of the jackpot result, and a storage capacity for storing the distribution table 64h in the main ROM 64 in advance. Can be suppressed.

In addition, the distribution mode of the jackpot result may be different depending on the setting state of the pachinko machine 10. For example, the higher the set value, the higher the probability of being distributed to the most advantageous jackpot result, or the higher the set value, the higher the probability of being distributed to the most advantageous jackpot result or the low winning high probability jackpot result. In this case, the higher the set value, the higher the probability of entering the high probability mode after the jackpot result is obtained. In addition, the higher the setting value, the lower the probability of being distributed to the low winning high probability jackpot result. It may be configured so that it can be distributed to the jackpot results. In this case, the higher the set value, the higher the probability that the open / close execution mode of the high frequency winning mode will occur.

Next, the reach random number counter C3 will be described. The reach random number counter C3 is configured to be added one by one in order within the range of 0 to 238, and return to "0" after reaching the maximum value. In the pachinko machine 10, an expected effect is set as a kind of display effect in the symbol display device 41. The expected effect is a symbol display device 41 that includes a symbol display device 41 capable of displaying variable symbols, and in a gaming machine in which a final stop result is given as a result of a game that results in a predetermined jackpot. This is a display state for making the player think that the variable display state is likely to be the result of the above-mentioned grant correspondence before the stop result is derived and displayed after the variable display of the symbol in the above is started. Specifically, regarding the grant correspondence result, the combination of symbols with the same number on any of the effective lines is stopped and displayed.

Two types of expected effects are set: a reach display and a notice display for expecting the occurrence of the reach display and the occurrence of the grant response result in the stage before the reach display occurs.

In the reach display, a combination of reach symbols is displayed by stopping and displaying a part of the symbol rows among the plurality of symbol rows displayed on the display surface 41a of the symbol display device 41, and the remaining symbol rows are displayed in that state. A display state in which the symbol is displayed in a variable manner in the symbol row is included. In addition, while the combination of reach symbols is displayed as described above, the remaining symbol rows are displayed in a variable manner, and a predetermined character or the like is displayed as a moving image on the background screen to produce a reach effect. , A combination of reach symbols is reduced or hidden, and then a predetermined character or the like is displayed as a moving image on substantially the entire display surface 41a to perform a reach effect.

In the notice display, after the variable display of the symbol is started on the display surface 41a of the symbol display device 41, the symbol is variablely displayed in all the symbol rows, or a plurality of symbol rows. In the situation where the symbols are displayed in a variable manner in the symbol row of, the mode in which the character is displayed separately from the symbols on the symbol row is included. In addition, the background screen has a predetermined mode different from the previous mode, and the symbol on the symbol string has a predetermined mode different from the previous mode. Such a notice display may occur in any of the game times when the reach display is performed and when the reach display is not performed, but the case where the reach display is performed is higher than the case where the reach display is not performed. It is set to occur with probability.

The reach display is executed regardless of the value of the reach random number counter C3 in the game times when the combination of the same symbols is finally stopped and displayed. Further, in the game times corresponding to the jackpot result in which the combination of the same symbols is not stopped and displayed, the game is not executed regardless of the value of the reach random number counter C3. Further, in the game round corresponding to the deviation result, it is executed when the reach random number counter C3 acquired at a predetermined timing by referring to the reach table stored in the main ROM 64 corresponds to the occurrence of the reach display. ..

On the other hand, the determination as to whether or not to display the notice is not performed by the main control device 60, but by the voice emission control device 81. In this case, in the voice emission control device 81, the notice display is more likely to occur in the game times corresponding to any of the jackpot results than in the game times corresponding to the missed result, and the notice display having a low appearance rate is displayed. A lottery process for displaying a notice is executed so as to satisfy at least one of the conditions that are likely to occur. By the way, this lottery result is reflected when the effect for the game round is executed on the symbol display device 41.

Here, the probability that the reach display will occur in the game times that result in the deviation is the same regardless of the setting state of "setting 1" to "setting 6". As a result, it is possible to prevent the advantage or disadvantage due to the setting state of the pachinko machine 10 from occurring with respect to the probability that the reach display will occur in the game times that result in the deviation. However, the present invention is not limited to this, and the higher the set value, the higher the probability that the reach display will occur in the game times that results in deviation.

Next, the variable type counter CS will be described. The variation type counter CS is configured to be incremented by 1 in order within the range of 0 to 198, and return to "0" after reaching the maximum value. The variation type counter CS is used in the main CPU 63 to determine the display duration on the special symbol display unit 37a and the symbol display duration on the symbol display device 41. The variation type counter CS is updated once each time the timer interrupt process described later is executed, and is repeatedly updated even within the remaining time until the next timer interrupt process is executed. Then, the buffer value of the variation type counter CS is acquired when the variation display is started in the special symbol display unit 37a and when the variation pattern is determined by the symbol display device 41 at the start of the symbol variation.

<About the processing configuration of the main CPU 63>
Next, each process executed to advance the game on the main CPU 63 will be described. The processing of the main CPU 63 is roughly divided into a main processing that is started when the power is turned on and a timer interrupt processing that is started periodically (in this embodiment, at a cycle of 4 milliseconds).

<Main processing>
First, the main process will be described with reference to the flowchart of FIG.

First, the power-on wait process is executed (step S101). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. During the execution period of the power-on wait process, the operation start and initial setting of the symbol display device 41 are completed. After that, access to the main RAM 65 is permitted (step S102).

After that, it is determined whether or not the setting key insertion unit 68a is turned on (step S103). When the setting key insertion unit 68a is not turned on (step S103: NO), it is determined whether or not the reset button 68c is pressed (step S104). When the reset button 68c is pressed (step S104: YES), each area of the main RAM 65 is "" except for the area in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the main RAM 65. While clearing "0", the initial setting is performed for the area where "0" is cleared (step S105). That is, when the supply of the operating power to the pachinko machine 10 is started while pressing the reset button 68c without turning on the setting key insertion unit 68a, the information of the set value is operated to the pachinko machine 10. The clearing process of the main RAM 65 is executed while maintaining the state before the power supply is stopped, and the initial setting is performed for the storage area where the clearing process is executed. This makes it possible to initialize other areas of the main RAM 65 without requiring a change in the set value. In step S105, the initial settings are performed after the various registers of the main CPU 63 are also cleared to "0".

When the reset button 68c is not pressed (step S104: NO), it is determined whether or not the power failure flag is set to "1" (step S106). The power failure flag is provided in the main RAM 65, and when the supply of operating power to the main CPU 63 is stopped and the predetermined power failure process is normally executed, the power failure flag is set to "1". Will be set. When the power failure flag is set to "1", it is determined whether or not the checksum calculation result matches the checksum saved when the power is cut off, that is, the validity of the stored data is determined (step S107). .. When the process of step S105 is executed, or when an affirmative determination is made in step S107, it is determined whether or not the set value of the pachinko machine 10 is normal by checking the main RAM 65 (step S108). Specifically, when the set value is any one of "setting 1" to "setting 6", it is determined to be normal, and when it is "0" or 7 or more, it is determined to be abnormal.

If a negative determination is made in any of steps S106 to S108, the operation prohibition process is executed. In the operation prohibition process, an infinite loop occurs after the error notification process for notifying the hall manager or the like of the occurrence of an error is executed (step S109). The operation prohibition process is released by executing the all clear process (step S117) described later.

If an affirmative determination is made in all of steps S106 to S108, the power-on setting process is executed (step S110). In the power-on setting process, a predetermined area of the main RAM 65 such as initialization of the power failure flag is set as an initial value, and a command corresponding to the current gaming state is transmitted to the voice emission control device 81. Further, after executing the process of step S110, the recognition process for causing the management IC 66 to recognize various information (step S111) and the various data are output to the external device connected to the reading terminal 68d of the MPU 62. Data output processing for this purpose is executed (step S112). Details of these recognition processes and data output processes will be described later.

The main CPU 63 is configured to periodically execute the timer interrupt process, but the occurrence of the timer interrupt process is prohibited at the stage when the main process is started. The state in which the occurrence of the timer interrupt process is prohibited is released at the timing before the process of step S112 is completed and the process of step S113 is executed, and the execution of the timer interrupt process is permitted. As a result, when the supply of the operating power to the main CPU 63 is started, the data output processing in step S112 is completed, and the timer interrupt processing is not executed until the stage before the processing in step S113 is started. Therefore, until the situation is reached, the main CPU 63 does not start the process for advancing the game.

After that, the process proceeds to the residual processing of steps S113 to S116. That is, although the main CPU 63 is configured to periodically execute the timer interrupt processing, a residual time is generated between the timer interrupt processing of 1 and the next timer interrupt processing. This residual time varies depending on the processing completion time of each timer interrupt process, but the residual process of steps S113 to S116 is repeatedly executed by utilizing the irregular time. In this respect, it can be said that the residual processing in steps S113 to S116 is an irregular process that is executed irregularly.

In the residual processing, first, in step S113, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing. In the following step S114, the random number initial value update process for updating the random number initial value counter CINI is executed, and in step S115, the variation counter update process for updating the variation type counter CS is executed. In these update processes, the current numerical information is read from the corresponding counter of the main RAM 65, a process of adding 1 to the read numerical information is executed, and then a process of overwriting the read source counter is executed. In this case, when the counter value exceeds the maximum value, it is cleared to "0" respectively. After that, in step S116, the interrupt enable setting for switching from the state in which the occurrence of the timer interrupt process is prohibited to the state in which the occurrence of the timer interrupt process is permitted is set. When the process of step S116 is executed, the process returns to step S113, and the processes of steps S113 to S116 are repeated.

On the other hand, when the setting key insertion unit 68a is turned ON (step S103: YES), the main RAM 65 includes the area in which the setting value information indicating the setting state of the pachinko machine 10 is set in the main RAM 65. All areas are cleared to "0", and initial settings are made for the areas that have cleared "0" (step S117). That is, when the operation for changing the setting state of the pachinko machine 10 is performed, all the areas of the main RAM 65 are cleared to "0" even if the reset button 68c is not pressed, and the clearing is performed. Initial settings are made for the storage area where the processing was executed. Further, in step S117, the initial setting is performed after the various registers of the main CPU 63 are also cleared to "0". It should be noted that the present invention is not limited to this, and even if an operation for changing the setting state of the pachinko machine 10 is performed, if the reset button 68c is not pressed, the entire main RAM 65 is used. The clearing process may be executed when the operation for changing the setting state of the pachinko machine 10 is performed and the reset button 68c is pressed without executing the clearing process.

After that, the set value update process is executed in step S118, the set value update signal output process is executed in step S119, and then the process proceeds to step S110. The setting value update process will be described below. The output processing of the set value update signal will be described in detail later. FIG. 10 is a flowchart showing the set value update process.

First, "1" is set in the set value counter provided in the main RAM 65 (step S201). The set value counter is a counter for the main CPU 63 to specify which set value the set state of the pachinko machine 10 is. By setting "1" in the set value counter, when the set value update process is executed, the set value becomes "setting 1" regardless of the set values up to that point.

After that, the display start processing of the set value is executed (step S202). In the display start processing of the set value, the display control of the third notification display device 69c is performed so that the number “1” corresponding to “setting 1” is displayed. When changing the set value, the manager of the game hall can grasp the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

After that, on condition that the setting key insertion unit 68a has not been turned off (step S203: NO), it is determined whether or not the update button 68b has been pressed once (step S204). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S204, the process returns to the process of step S203, and it is determined whether or not the setting key insertion unit 68a is turned off.

When the update button 68b is pressed once (step S204: YES), the value of the set value counter of the main RAM 65 is added by 1 (step S205). When the value of the set value counter after 1 addition exceeds "6" (step S206: YES), "1" is set in the set value counter (step S207). As a result, each time the update button 68b is pressed once, it is updated to the set value one step higher, and when the update button 68b is pressed once in the situation of "setting 6", it is set to "setting 1". I will be back.

When a negative determination is made in step S206, or when the process of step S207 is executed, the display update process of the set value is executed (step S208). In the display update process of the set value, the display control of the third notification display device 69c is performed so that the number corresponding to the value of the set value counter of the main RAM 65 is displayed. By checking the third notification display device 69c, the manager of the game hall can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S208, the process returns to step S203, and it is determined whether or not the setting key insertion unit 68a is turned off. If the OFF operation has not been performed (step S203: NO), the processes after step S204 are executed again. When the OFF operation is performed (step S203: YES), the display end processing of the set value is executed (step S209). In the set value display end process, the display of the set value on the third notification display device 69c is ended.

<Timer interrupt processing>
Next, timer interrupt processing will be described with reference to the flowchart of FIG. Timer interrupt processing is executed periodically (for example, in a cycle of 4 milliseconds).

First, the power failure information storage process is executed (step S301). In the power failure information storage process, it is monitored whether or not a power failure signal corresponding to the occurrence of a power failure is received from the power failure monitoring board 67, and if the occurrence of a power failure is identified, an infinite loop occurs after executing the power failure process. Become. In the power failure processing, "1" is set in the power failure flag of the main RAM 65, a checksum is calculated, and the calculated checksum is saved.

After that, the lottery random number update process is executed (step S302). In the lottery random number update process, the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the universal utility release counter C4 are updated. Specifically, the current numerical information was sequentially read from the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the universal utility release counter C4, and the read numerical information was added by 1 to each of them. Later, a process of overwriting the read source counter is executed. In this case, when the counter value exceeds the maximum value, it is cleared to "0" respectively. After that, in step S303, the random number initial value update process is executed in the same manner as in step S114, and in step S304, the fluctuation counter update process is executed in the same manner as in step S115.

After that, a fraud detection process for monitoring whether or not a predetermined event set as a monitoring target for fraud has occurred is executed (step S305). In the fraud detection process, "1" is set in the game stop flag provided in the main RAM 65 by monitoring the occurrence of a plurality of types of events and confirming that a predetermined event has occurred. In the following step S306, it is determined whether or not the progress of the game is stopped by determining whether or not "1" is set in the game stop flag. If a negative determination is made in step S306, the processes after step S307 are executed.

In step S307, the port output process is executed. In the port output process, when the output information is set in the previous timer interrupt process, the process for outputting the output corresponding to the output information to the various drive units 32b and 34b is executed. For example, when the information to switch the special electric winning device 32 to the open state is set, the output of the drive signal to the drive unit 32b for the special electric is started, and when the information to switch to the closed state is set. Stops the output of the drive signal. Further, when the information for switching the utility accessory 34a of the second operating port 34 to the open state is set, the output of the drive signal to the drive unit 34b for the utility should be started and the state should be switched to the closed state. If the information is set, the output of the drive signal is stopped.

After that, the reading process is executed (step S308). In the reading process, signals other than the power failure signal and the winning signal are read, and the read information is stored for use in future processing.

After that, the ball entry detection process is executed (step S309). In the ball entry detection process, the signals received from the ball entry detection sensors 42a to 49a are read, and based on the read result, the out port 24a, the general winning opening 31, the special electric winning device 32, and the first operating port 33 are read. , The presence or absence of a ball entering the second operating port 34 and the through gate 35 is specified. The details of the ball entry detection process will be described later.

After that, a timer update process for collectively updating the numerical information of a plurality of types of timer counters provided in the main RAM 65 is executed (step S310). In this case, the timer counters that are updated by subtracting the stored numerical information are aggregated and handled, but both the subtraction type timer counter update and the addition type timer counter update are aggregated. It may be configured.

After that, a launch control process for controlling the launch of the game ball is executed (step S311). In a situation where the firing operation to the firing operation device 28 is continued, one game ball is launched every 0.6 seconds, which is a predetermined firing cycle. In the following step S312, as the input state monitoring process, the disconnection confirmation of the ball entry detection sensors 42a to 49a and the opening confirmation of the gaming machine main body 12 and the front door frame 14 are confirmed based on the information read in the reading process of step S308. I do.

After that, the special figure special electric control process for performing the execution control of the game times and the execution control of the open / close execution mode is executed (step S313). The special figure special electric control process will be described in detail later.

After that, the Fuzu Fuden control process is executed (step S314). In the Fuzu Fuden control process, when a prize has been won in the through gate 35, a process for acquiring the hold information on the Fuzu side is executed, and the hold information on the Fuzu side is stored. In addition, a release determination is made for the held information, and a process for performing an effect for a general drawing is executed with the release determination as an opportunity. Further, based on the result of the opening determination, a process of opening and closing the general electric accessory 34a of the second operating port 34 is executed. In this case, if the support mode is the low frequency support mode, the corresponding process is executed, and if the support mode is the high frequency support mode, the corresponding process is executed. Further, in the case of the open / close execution mode, even if the support mode immediately before that is the high frequency support mode, the low frequency support mode is set.

In the following step S315, based on the processing results of the immediately preceding steps S313 and S314, the output information for reflecting the increase / decrease in the number of reserved information related to the special figure display unit 37a on the special figure hold display unit 37b is set. , Set the output information for reflecting the increase / decrease number of the reserved information related to the normal figure display unit 38a in the normal figure hold display unit 38b. Further, in step S315, the output information for updating the display contents of the special figure display unit 37a is set based on the processing results of the immediately preceding steps S313 and S314, and the display contents of the normal figure display unit 38a are set. Set the output information to be updated.

After that, the contents of the command and the signal received from the payout control device 77 are confirmed, and the payout state reception process for performing the process corresponding to the check result is executed (step S316). In addition, a payout output process for setting the prize ball command as an output target is executed (step S317). Further, the external information setting process for controlling the start and end of the output of the external signal according to the processing results of the various processes executed in the timer interrupt process this time is executed (step S318). After that, the management output process for outputting the information corresponding to the entry result of the game ball in the game area PA to the management IC 66 is executed (step S319). The details of the management output processing will be described later.

Next, the special figure special electric control process of step S313 will be described with reference to the flowchart of FIG.

First, the pending information acquisition process is executed (step S401). In the hold information acquisition process, it is determined whether or not a prize has been generated in the first operation port 33 or the second operation port 34, and if a prize has been generated, the number of holds in the hold storage area 65a is the upper limit. It is determined whether or not it is less than the value (“4” in the present embodiment). If the number of holdings is less than the upper limit, the number of holdings is added by 1, and the numerical information of the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 updated in the previous step S302 is used for holding. It is stored in the first holding area of the free holding areas RE1 to RE4 of the area RE. When the first operating port 33 and the second operating port 34 are winning at the same time, the process for acquiring the hold information is performed within the range in which the hold information acquisition process is executed once. Run multiple times. Further, when a new acquisition of the hold information is performed, a corresponding acquisition command is transmitted to the voice emission control device 81. When the voice emission control device 81 receives the command, the voice emission control device 81 updates the display of the image indicating the number of hold information on the symbol display device 41 to the display content corresponding to the increase in the hold information.

After that, the information of the special figure special electric counter provided in the main RAM 65 is read (step S402), and the special figure special electric address table provided in the main ROM 64 is read (step S403). Then, the start address corresponding to the information of the special figure special electric counter is acquired from the special figure special electric address table (step S404), and the process jumps to the process indicated by the acquired start address among the processes of steps S406 to S412 (step S405). ). The special figure special electric counter is a counter for the main CPU 63 to grasp which of the various processes of steps S406 to S412 should be executed, and the special figure special electric address table is the special figure special electric counter. Corresponding to the numerical information, the start address of the program for executing the processes of steps S406 to S412 is set.

In step S406, the special figure variation start process is executed. FIG. 13 is a flowchart showing the special figure fluctuation start processing.

In the special figure fluctuation start process, the data setting process is executed on condition that the number of hold information stored in the hold area RE is 1 or more (step S501: YES) (step S502). In the data setting process, the number of holds is first subtracted by 1, and the data stored in the first hold area RE1 of the hold area RE is moved to the execution area AE. After that, the process of shifting the data stored in each of the holding areas RE1 to RE4 of the holding area RE is executed. This data shift process is a process of shifting the data stored in the first reserved area RE1 to the fourth reserved area RE4 in order to the lower area side. Specifically, the second reserved area RE2 → the first reserved area RE1 , 3rd holding area RE3 → 2nd holding area RE2, 4th holding area RE4 → 3rd holding area RE3, etc. After shifting the data in each area, the 4th holding area RE4 is cleared to “0”. At this time, a shift command for recognizing that the data in the hold area has been shifted is transmitted to the voice emission control device 81. When the voice emission control device 81 receives the command, the voice emission control device 81 updates the display of the image indicating the number of hold information on the symbol display device 41 to the display content corresponding to the decrease of the hold information.

After executing the data setting process, the pass / fail table is read from the main ROM 64 (step S503). Specifically, the current winning / failing lottery mode is grasped by first reading the information indicating the winning / failing lottery mode of the main RAM 65. In the high probability mode, the high probability accuracy table 64g is read from the main ROM 64. On the other hand, in the low probability mode, the setting state of the pachinko machine 10 is grasped by reading the value of the setting value counter of the main RAM 65. Then, the low accuracy / rejection tables 64a to 64f corresponding to the grasped set values are read from the main ROM 64.

After that, the pass / fail determination process is executed with reference to the pass / fail tables 64a to 64 g read in step S503 (step S504). In the hit / fail determination process, among the information stored in the execution area AE, the hit / fail determination information, that is, the numerical information related to the hit random number counter C1, is the jackpot numerical information set in the hit / miss tables 64a to 64 g read in step S503. To determine if it matches.

If the result of the hit / fail determination process is the jackpot winning result (step S505: YES), the distribution determination process is executed (step S506). In the distribution determination process, among the information stored in the execution area AE, the information for distribution determination, that is, the numerical information related to the jackpot type counter C2 is read out. Then, with reference to the distribution table 64h provided in the main ROM 64, it is specified which jackpot result corresponds to the numerical information related to the read jackpot type counter C2. Specifically, it is specified which of the low probability jackpot result, the low winning high probability jackpot result, and the most advantageous jackpot result corresponds to.

After that, the stop result setting process for the jackpot result is executed (step S507). Specifically, the information on the mode of the pattern to be finally stopped and displayed on the special figure display unit 37a in the game round related to the start of this fluctuation is obtained from the stop result table for the jackpot result stored in advance in the main ROM 64. It is specified, and the specified information is written to the main RAM 65. In the stop result table for the jackpot result, information on the mode of the pattern to be stopped and displayed on the special figure display unit 37a is set differently for each type of jackpot result.

After that, the flag setting process corresponding to the distribution determination result is executed (step S508). Specifically, the main RAM 65 is provided with a flag corresponding to each type of jackpot result, and in step S508, among the flags corresponding to each type of jackpot result, the distribution determination process of step S506 is performed. Set "1" to the flag corresponding to the result.

On the other hand, if it is determined in step S505 that the result is not the jackpot winning result, the stop result setting process for the loss result is executed (step S509). Specifically, the information on the mode of the pattern to be finally stopped and displayed on the special figure display unit 37a in the game round related to the start of this fluctuation is stored in advance in the main ROM 64 from the stop result table for the deviation result. It is specified, and the specified information is written to the main RAM 65. The information on the mode of the pattern selected in this case is different from the information on the mode of the pattern selected in the case of the jackpot result.

After executing any of the processes of step S508 and step S509, the process of grasping the duration of the game times is executed (step S510). In such processing, the numerical information of the variable type counter CS is acquired. In addition, it is determined whether or not the reach display is generated by the symbol display device 41 in this game round. Specifically, when the game times related to the start of the fluctuation this time are the low probability jackpot result or the most advantageous jackpot result, it is determined that the reach display occurs. Further, if it is not the result of any big hit and the numerical information related to the reach random number counter C3 stored in the execution area AE is the numerical information corresponding to the reach occurrence, it is determined that the reach display occurs.

When it is determined that the reach display will occur, the duration of the game times corresponding to the numerical information of the current variation type counter CS is acquired by referring to the reach generation duration table stored in the main ROM 64. .. On the other hand, when it is determined that the reach display does not occur, the continuation of the game times corresponding to the numerical information of the variation type counter CS this time is referred to by referring to the reach non-occurrence duration table stored in the main ROM 64. Get the period. Incidentally, the duration of the game times that can be acquired by referring to the reach non-occurrence duration table is different from the duration of the game times that can be acquired by referring to the reach generation duration table.

The duration of the game times when the reach does not occur is set so that the larger the number of hold information stored in the hold area RE, the shorter the duration of the game times. Also, in the situation where the support mode is the high frequency support mode, the duration of the shorter game times is selected as compared with the case where the number of pending information is the same as in the situation where the support mode is the low frequency support mode. A duration table for non-reach is set. However, the present invention is not limited to this, and the duration of the game may not change depending on the number of reserved information and the support mode, and the above relationship may be reversed. Furthermore, the above configuration may be applied to the duration of the game times when the reach occurs. Further, in the case of various jackpot results, the duration table may be set individually for each of the case of the out-of-reach case and the case of the out-of-reach non-occurrence case. In this case, the duration of the game is distributed according to the result of each game.

After that, the information on the duration of the game times acquired in step S510 is set in the special figure special electric timer counter provided in the main RAM 65 (step S511). The update of the numerical information set in the special figure special electric timer counter is executed in the timer update process (step S310). By the way, as an effect for the game round, the variable display of the pattern on the special symbol display unit 37a and the variable display of the symbol on the symbol display device 41 are performed, and when each of these variable displays is completed, the game round is performed. The final stop is displayed over the final stop period (for example, 0.5 seconds) in the state where the stop result of is displayed (in the symbol display device 41, a state in which a predetermined combination of symbols is waiting on the effective line). In this case, the duration of the game times acquired in step S510 is the total time for one game.

After that, the variation command and the type command are transmitted to the voice emission control device 81 (step S512). The variable command includes information on the duration of the game. Here, as described above, the duration of the game times acquired by referring to the reach non-occurrence duration table is different from the duration of the game times acquired by referring to the reach generation duration table. Even if the variation command does not include information on the presence or absence of reach occurrence, the voice emission control device 81 can specify the presence or absence of reach occurrence from the information on the duration of the game times. In this respect, it can be said that the variable command contains information indicating whether or not reach has occurred. Note that the variable command may include information that directly indicates whether or not reach has occurred. In addition, the type command includes information on the game result.

When the voice emission control device 81 receives the variation command and the type command from the main CPU 63, the display light emission unit 53, the speaker unit 54, and the symbol display device 41 execute the effect for game rotation. In this case, the effect for the game round is performed in a manner corresponding to the contents of the variable command and the type command. Further, in the symbol display device 41, a variable display of symbols is performed as an effect for the game round, and when the effect for the game round is completed, a combination of symbols corresponding to the results of the hit / miss determination process and the distribution determination process is performed. Stop is displayed.

After that, the variable display of the pattern on the special figure display unit 37a is started (step S513). Then, the special figure special electric counter is added by 1 (step S514). In this case, since the numerical information of the special figure special electric counter is "0" when the special figure fluctuation start processing is executed, the numerical information of the special figure special electric counter is "1". After that, "1" is set in the 11th output flag provided in the main RAM 65 (step S515). The eleventh output flag is a flag for the main CPU 63 to specify that the information output indicating that the game round has been started should be executed for the management IC 66.

Returning to the description of the special figure special electric control process (FIG. 52), in step S407, the special figure changing process is executed. In the special figure changing process, it is determined whether or not the timing is before the final stop display during the duration of the game round, and if it is before the final stop display, the display mode of the pattern on the special figure display unit 37a is ruled. Execute the process to change the target. When it is time to display the final stop, by adding 1 to the numerical information of the special figure special electric counter, the numerical information of the counter is changed from the one corresponding to the special figure changing process to the special figure fixing process. Update to one. In the present embodiment, the final stop command is not transmitted from the main CPU 63 to the voice emission control device 81.

In step S408, the process during the determination of the special figure is executed. In the process of determining the special figure, the display mode of the pattern on the special figure display unit 37a is set to the display mode corresponding to the lottery result of the current game. Further, in the process during the determination of the special figure, it is determined whether or not the final stop period has elapsed, and if the period has elapsed, it is determined whether or not the transition to the open / close execution mode occurs. If the transition to the open / close execution mode does not occur, the numerical information of the special figure special electric counter is cleared to "0". When the transition to the open / close execution mode occurs, the numerical information of the special figure special electric counter is added by 1, so that the numerical information of the counter is changed from the one corresponding to the special figure confirmation processing to the one corresponding to the special electric start processing. Update.

In step S409, the special electric power start process is executed. In the special electric power start processing, if the processing for starting the opening period in the opening / closing execution mode of this time has not been executed yet, the setting processing of the opening period is executed. Further, the opening command is transmitted to the voice emission control device 81. Upon receiving the opening command, the voice emission control device 81 causes the display / light emission unit 53, the speaker unit 54, and the symbol display device 41 to execute the opening effect. If the opening period has elapsed, the start process for starting the first round game is executed. In the start processing, the special electric winning device 32 is opened and the end condition of the round game is set. When setting this end condition, the upper limit duration when the special electric winning device 32 is kept in the open state in the first round game of this time is set, and the special electric winning device 32 can be won in the first round game of this time. The upper limit number of game balls is set in the winning number counter provided in the main RAM 65.

In step S410, the processing during the opening of the special electric power is executed. In the processing during the opening of the special electric power, it is determined whether or not the end condition of the round game is satisfied. If the end condition is satisfied, the special electric winning device 32 is closed. Then, if the round game ended this time is not the round game of the last execution time, the numerical information of the special figure special electric counter is added by 1 to change the numerical information of the counter from the one corresponding to the special electric opening processing to the special electric closing processing. If the round game that ended this time is the round game of the last execution time, the numerical information of the special figure special electric counter is added by 2 to correspond to the processing while the special electric is open. Update from the one corresponding to the special train end processing.

In step S411, the process during closing of the special electric train is executed. In the special electric closing processing, it is determined whether or not the interval period between round games has elapsed. The interval period is set when the previous round game ends. When the interval period has elapsed, the special electric winning device 32 is opened and the end condition of the round game is set. Then, by subtracting 1 from the numerical information of the special figure special electric counter, the numerical information of the counter is updated from the one corresponding to the special electric closing processing to the one corresponding to the special electric opening processing.

In step S412, the special electric power termination process is executed. In the special electric power termination process, if the process for starting the ending period in the opening / closing execution mode this time has not yet been executed, the ending period (for example, 5 seconds) is set and the ending command is transmitted to the voice emission control device 81. .. Upon receiving the ending command, the voice emission control device 81 causes the display / light emission unit 53, the speaker unit 54, and the symbol display device 41 to execute the ending effect. When the ending period has elapsed, each of the winning / failing lottery mode and the support mode after the end of the opening / closing execution mode is set to the mode corresponding to the jackpot result that triggered the start of the opening / closing execution mode this time.

Next, the main CPU 63, based on the detection results of the ball entry detection sensors 42a to 49a, the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the through. A configuration for specifying whether or not a game ball has entered the gate 35 will be described. FIG. 14 is an explanatory diagram for explaining a configuration in which the detection results of the ball entry detection sensors 42a to 49a are input to the main CPU 63.

The main CPU 63 is provided with an input port 63a. The input port 63a is configured as an 8-bit parallel interface so that eight types of signals can be handled at the same time. An area in which information of "0" or "1" is stored according to the voltage of each signal is provided in a one-to-one correspondence with each terminal. That is, the 0th bit D0 to the 7th bit D7 are provided as the area. Further, more than eight types of signals are input to the input port 63a, but in order to limit the targets to be input at the same time to eight types, the signal group to be input to the input port 63a depends on the driver IC. It can be switched through switching control.

In the ball entry detection process (step S309) of the timer interrupt process (FIG. 11), the signal group to be input to the input port 63a is set to the signal group from the ball entry detection sensors 42a to 49a. In the situation where such a setting is made, the 0th bit D0 stores the information corresponding to the detection signal from the first winning opening detection sensor 42a, and the first bit D1 corresponds to the detection signal from the second winning opening detection sensor 43a. The second bit D2 stores the information corresponding to the detection signal from the third winning opening detection sensor 44a, and the third bit D3 stores the information corresponding to the detection signal from the special electric detection sensor 45a. , The fourth bit D4 stores the information corresponding to the detection signal from the first actuating port detection sensor 46a, and the fifth bit D5 stores the information corresponding to the detection signal from the second actuating port detection sensor 47a. The 6-bit D6 stores information corresponding to the detection signal from the out-port detection sensor 48a, and the 7-bit D7 stores information corresponding to the detection signal from the gate detection sensor 49a.

When each of the above-mentioned ball entry detection sensors 42a to 49a does not detect the passage of the game ball, it outputs a LOW level signal indicating that the detection is not being performed as a detection signal, and detects the passage of the game ball. In the case, an HI level signal indicating that detection is being performed is output as a detection signal. Then, the input port 63a stores the information of "0" for the corresponding bit when the LOW level signal is received, and "1" for the corresponding bit when the HI level signal is received. Store information about. That is, in the situation where the passage of the game ball is not detected by the ball entry detection sensors 42a to 49a, the information of "0" corresponding to the information indicating that the corresponding bit is not detected is stored, and the passage of the game ball is performed. In the detected situation, the information of "1" corresponding to the information indicating that the bit is being detected is stored for the corresponding bit.

FIG. 15 is a flowchart showing a ball entry detection process executed in step S309 of the timer interrupt process (FIG. 11).

When it is confirmed that the situation in which the information of "0" is stored in the 0th bit D0 is switched to the situation in which the information of "1" is stored, one piece is displayed by the first winning opening detection sensor 42a. It is determined that the game ball has been detected (step S601: YES). In this case, "1" is set in the first output flag provided in the main RAM 65 (step S602), and the value of the 10 prize ball counters provided in the main RAM 65 is added by 1 (step S603). .. The first output flag is for the main CPU 63 to specify that the information output indicating that one game ball has been detected by the first winning opening detection sensor 42a should be executed for the management IC 66. It is a flag. The 10-prize ball counter is a counter for the main CPU 63 to specify the number of times to execute the payout of 10 game balls. When the value of the counter for 10 prize balls is 1 or more, the 10 prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the 10 prize balls are output to the payout control device 77. When the command is output once, the value of the 10 prize ball counter is subtracted by 1. When the payout control device 77 receives the 10 prize ball command, the payout control device 77 drives and controls the payout device 76 so that 10 game balls are paid out.

When it is confirmed that the situation in which the information of "0" is stored in the first bit D1 is switched to the situation in which the information of "1" is stored, one piece is used by the second winning opening detection sensor 43a. It is determined that the game ball has been detected (step S604: YES). In this case, "1" is set in the second output flag provided in the main RAM 65 (step S605), and the value of the 10 prize ball counters provided in the main RAM 65 is added by 1 (step S606). .. The second output flag is for the main CPU 63 to specify that the information output indicating that one game ball has been detected by the second winning opening detection sensor 43a should be executed for the management IC 66. It is a flag.

When it is confirmed that the situation in which the information of "0" is stored in the second bit D2 is switched to the situation in which the information of "1" is stored, one piece is displayed by the third winning opening detection sensor 44a. It is determined that the game ball has been detected (step S607: YES). In this case, "1" is set in the third output flag provided in the main RAM 65 (step S608), and the value of the 10 prize ball counters provided in the main RAM 65 is added by 1 (step S609). .. The third output flag is for the main CPU 63 to specify that the information output indicating that one game ball has been detected by the third winning opening detection sensor 44a should be executed for the management IC 66. It is a flag.

When it is confirmed that the situation in which the information of "0" is stored in the third bit D3 is switched to the situation in which the information of "1" is stored, one game ball is displayed by the special electric detection sensor 45a. It is determined that it has been detected (step S610: YES). In this case, "1" is set in the special electric winning flag provided in the main RAM 65 (step S611), "1" is set in the fourth output flag provided in the main RAM 65 (step S612), and further. The value of the 15 prize ball counters provided in the main RAM 65 is added by 1 (step S613). The special electric winning flag is a flag for the main CPU 63 to specify that one game ball has entered the special electric winning device 32 in the round game in the open / close execution mode. In the special figure special electric control process (step S313) of the timer interrupt process (FIG. 11), by confirming that "1" is set in the special electric winning flag, one game ball is inserted into the special electric winning device 32. It is specified that a ball has been generated, and the remaining number of balls that can be entered into the special electric winning device 32 in the round game is subtracted by 1. When the process of subtracting 1 from the number of balls that can be entered is executed, the special electric winning flag is cleared to "0". The fourth output flag is a flag for the main CPU 63 to specify that the information output indicating that one game ball has been detected by the special electric detection sensor 45a should be executed for the management IC 66. .. The 15 prize ball counter is a counter for the main CPU 63 to specify the number of times the 15 game balls should be paid out. When the value of the counter for 15 prize balls is 1 or more, the 15 prize ball commands are output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and the 15 prize balls are output to the payout control device 77. When the command is output once, the value of the 15 prize ball counters is subtracted by 1. When the payout control device 77 receives the 15 prize ball commands, the payout control device 77 drives and controls the payout device 76 so that 15 game balls are paid out.

When it is confirmed that the situation in which the information of "0" is stored in the 4th bit D4 is switched to the situation in which the information of "1" is stored, one operation port detection sensor 46a is used. It is determined that the game ball has been detected (step S614: YES). In this case, "1" is set in the first operation winning flag provided in the main RAM 65 (step S615), and "1" is set in the fifth output flag provided in the main RAM 65 (step S616). Further, the value of the one prize ball counter provided in the main RAM 65 is added by 1 (step S617). The first operation winning flag is a flag for the main CPU 63 to specify that one game ball has entered the first operation port 33. In the special figure special electric control process (step S313) of the timer interrupt process (FIG. 11), it is stored in the hold area RE of the hold storage area 65a by confirming that "1" is set in the first operation winning flag. The process of newly storing the pending information is executed on condition that the number of pending information being held is less than the upper limit of four. When it is confirmed that "1" is set in the first operation winning flag in the special electric special electric control process (step S313) and the process corresponding to the confirmation is executed, the first operation winning flag is cleared to "0". do. The fifth output flag is for the main CPU 63 to specify that the information output indicating that one game ball has been detected by the first operation port detection sensor 46a should be executed for the management IC 66. It is a flag. The one prize ball counter is a counter for the main CPU 63 to specify the number of times one game ball should be paid out. When the value of the counter for one prize ball is 1 or more, the one prize ball command is output to the payout control device 77 in the payout output process of step S317 in the timer interrupt process (FIG. 11), and one prize ball is output. When the command is output once, the value of one prize ball counter is decremented by 1. When the payout control device 77 receives one prize ball command, the payout control device 77 drives and controls the payout device 76 so that one game ball is paid out.

When it is confirmed that the situation in which the information of "0" is stored in the fifth bit D5 has been switched to the situation in which the information of "1" is stored, one piece is used by the second operation port detection sensor 47a. It is determined that the game ball has been detected (step S618: YES). In this case, "1" is set in the second operation winning flag provided in the main RAM 65 (step S619), and "1" is set in the sixth output flag provided in the main RAM 65 (step S620). Further, the value of the one prize ball counter provided in the main RAM 65 is added by 1 (step S621). The second operation winning flag is a flag for the main CPU 63 to specify that one game ball has entered the second operation port 34. In the special figure special electric control process (step S313) of the timer interrupt process (FIG. 11), by confirming that "1" is set in the second operation winning flag, it is stored in the hold area RE of the hold storage area 65a. The process of newly storing the pending information is executed on condition that the number of pending information being held is less than the upper limit of four. When it is confirmed that "1" is set in the second operation winning flag in the special electric special electric control process (step S313) and the process corresponding to the confirmation is executed, the second operation winning flag is cleared to "0". do. The sixth output flag is for the main CPU 63 to specify that the information output indicating that one game ball has been detected by the second operating port detection sensor 47a should be executed for the management IC 66. It is a flag.

When it is confirmed that the situation in which the information of "0" is stored in the 6th bit D6 is switched to the situation in which the information of "1" is stored, one game ball is used by the out-port detection sensor 48a. Is detected (step S622: YES). In this case, "1" is set in the 7th output flag provided in the main RAM 65 (step S623). The seventh output flag is a flag for the main CPU 63 to specify that information output indicating that one game ball has been detected by the out port detection sensor 48a should be executed for the management IC 66. be.

When it is confirmed that the situation in which the information of "0" is stored in the 7th bit D7 is switched to the situation in which the information of "1" is stored, one game ball is displayed by the gate detection sensor 49a. It is determined that it has been detected (step S624: YES). In this case, "1" is set in the gate winning flag provided in the main RAM 65 (step S625). The gate winning flag is a flag for the main CPU 63 to specify that one game ball has entered the through gate 35. By confirming that "1" is set in the gate winning flag in the normal power control process (step S314) of the timer interrupt process (FIG. 11), the normal power storage in the normal power holding area 65c is confirmed. Processing to store the numerical information of the current general-purpose utility release counter C4 in the general-purpose holding area 65c as the general-purpose holding information on the condition that the number of holding information on the side is less than four, which is the upper limit. To execute. It is confirmed that "1" is set in the gate winning flag in the Fuzu Fuden control process (step S314), and the gate winning flag is cleared to "0" when the process corresponding to the confirmation is executed.

Since the timer interrupt process (FIG. 11) is activated in a cycle of 4 milliseconds as described above, when the detection of one game ball is started by one ball entry detection sensor 42a to 49a, the said The main CPU 63 identifies that one game ball is detected by the ball entry detection sensors 42a to 49a in a situation where the ball entry detection sensors 42a to 49a continue to detect the one game ball. It will be done at. Therefore, it is sufficient that one of the first to seventh output flags is provided.

Next, the processing contents executed by the payout control device 77 will be described. First, the electrical configuration of the payout control device 77 and various devices that communicate with the payout control device 77 will be described with reference to the block diagram of FIG.

The payout control device 77 includes an MPU 91. The MPU 91 includes a payout side ROM 93, a payout side RAM 94, an interrupt circuit, a timer circuit, a data input / output circuit, and the like, in addition to the payout side CPU 92, which is an arithmetic processing unit including a control unit and an arithmetic unit.

The payout side ROM 93 is a memory (that is, non-volatile storage means) that does not require external power supply for storage retention such as NOR type flash memory and NAND type flash memory, and is used as read-only. The payout side ROM 93 stores various control programs and fixed value data executed by the payout side CPU 92.

The payout side RAM 94 is a memory (that is, a volatile storage means) that requires external power supply for storage retention such as SRAM and DRAM, and is used for both reading and writing. The payout side RAM 94 can be randomly accessed, and the time required for reading is faster than that of the payout side ROM 93 when compared with the same data capacity. The payout side RAM 94 temporarily stores various data and the like for the execution of the control program stored in the payout side ROM 93.

The payout side CPU 92 can perform bidirectional communication with the main side CPU 63. When the payout side CPU 92 receives the prize ball command from the main side CPU 63, the payout side CPU 92 drives and controls the payout device 76 so that the number of game balls corresponding to the prize ball command is paid out. Further, the payout side CPU 92 monitors whether or not the game ball can be paid out normally, and if it is determined that the game ball cannot be paid out normally, the payout side RAM 94 is set. The payout device 76 is stopped even in the situation where the information on the number of unpaid prize balls is stored. Further, the payout side CPU 92 transmits a payout restriction command indicating that the payout cannot be normally performed in this way to the main side CPU 63. When the main CPU 63 receives the payout restriction command, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 execute a notification indicating that the game ball cannot be paid out normally. A notification command is transmitted to the voice emission control device 81 so as to be performed. As a state in which it is not possible to pay out the game balls normally, there are a state in which the lower plate 56a is full with the game balls, a state in which the tank 75 is not replenished with the game balls, and a payout device 76. There are an abnormal payout state in which the machine does not operate normally, a main body open state in which the game machine main body 12 is released from the outer frame 11, and a front door open state in which the front door frame 14 is released from the inner frame 13. ..

A full tank detection sensor (not shown) is provided in the middle of the game ball passage leading from the payout device 76 to the lower plate 56a, and the detection result of the full tank detection sensor is input to the payout side CPU 92. The payout side CPU 92 identifies that the game ball is in a full tank state when the game ball is continuously detected by the full tank detection sensor, and the state in which the game ball is continuously detected by the full tank detection sensor is released. In the case, it is specified that the full tank state is released.

A ball non-detection sensor (not shown) is provided in the middle of the game ball passage leading from the tank 75 to the payout device 76, and the detection result of the ball non-detection sensor is input to the payout side CPU 92. The payout side CPU 92 identifies that the game ball is in a ballless state when the ball non-detection sensor does not continuously detect the game ball, and when the ball non-detection sensor cancels the state in which the game ball is not continuously detected. Identify that the ballless state has been released.

The payout device 76 is provided with a payout detection sensor (not shown) for detecting a game ball paid out from the payout device 76, and the detection result of the payout detection sensor is input to the payout side CPU 92. The payout side CPU 92 identifies that one game ball has been paid out from the payout device 76 when the game ball is detected by the payout detection sensor. Further, the payout side CPU 92 identifies that the payout is in an abnormal state when the payout detection sensor does not continuously detect the game ball even though the payout device 76 is driven and controlled so that the game ball is paid out. , It is specified that the payout abnormal state is canceled when the state in which the game ball is not continuously detected by the payout detection sensor is canceled.

A front door opening sensor 95 is provided on the front surface of the inner frame 13 (see FIG. 2), and the detection result of the front door opening sensor 95 is input to the payout side CPU 92. In this case, when the front door frame 14 is closed with respect to the inner frame 13, the front door opening sensor 95 transmits a closing detection signal to the payout side CPU 92, and the front door frame 14 is open with respect to the inner frame 13. In this case, the front door opening sensor 95 transmits an opening detection signal to the payout side CPU 92. When the payout side CPU 92 identifies that the front door frame 14 is in the closed state when receiving the closing detection signal from the front door opening sensor 95, and receives the opening detection signal from the front door opening sensor 95. It is specified that the front door frame 14 is in the open state. Further, the payout side CPU 92 transmits a front door opening command to the main side CPU 63 at the timing when the front door frame 14 is specified to be in the open state from the closed state, and specifies that the front door frame 14 is changed from the open state to the closed state. A front door closing command is transmitted to the main CPU 63 at the same timing. The main CPU 63 specifies that the front door frame 14 is in the open state when the front door opening command is received, and specifies that the front door frame 14 is in the closed state when the front door closing command is received.

A main body opening sensor 96 is provided on the front surface of the back pack unit 15 (see FIG. 2), and the detection result of the main body opening sensor 96 is input to the payout side CPU 92. In this case, when the gaming machine main body 12 is closed with respect to the outer frame 11, the main body opening sensor 96 transmits a closing detection signal to the payout side CPU 92, and the gaming machine main body 12 is open with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the payout side CPU 92. The payout side CPU 92 identifies that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and receives the opening detection signal from the main body opening sensor 96. It is specified that the main body 12 is in the open state. Further, the payout side CPU 92 transmits a main body opening command to the main CPU 63 at the timing when it is specified that the gaming machine main body 12 has changed from the closed state to the open state, and has specified that the gaming machine main body 12 has changed from the open state to the closed state. A main body closing command is transmitted to the main CPU 63 at the timing. The main CPU 63 specifies that the gaming machine main body 12 is in the open state when the main body opening command is received, and specifies that the gaming machine main body 12 is in the closed state when the main body closing command is received.

The timer interrupt process executed by the payout side CPU 92 will be described with reference to the flowchart of FIG. The timer interrupt process is repeatedly activated at a predetermined cycle (for example, 2 milliseconds).

First, the full tank process is executed (step S701). In the full tank processing, as described above, it is specified whether or not the tank is full based on the detection result of the full tank detection sensor, and if the tank is full, the payout of the game ball is stopped. Is executed, and a command indicating that the tank is full is transmitted to the main CPU 63. Further, when the full tank state is released, a process for enabling the payout of the game ball is executed, and a command indicating that the full tank state is released is transmitted to the main CPU 63.

After that, the ball useless process is executed (step S702). In the ball-free processing, as described above, it is specified whether or not the ball is in a ball-free state based on the detection result of the ball-free detection sensor, and if the ball is in a ball-free state, a process for stopping the payout of the game ball is performed. Along with the execution, a command indicating that the ball is in a state of no sphere is transmitted to the main CPU 63. Further, when the ball-free state is released, a process for enabling the payout of the game ball is executed, and a command indicating that the ball-free state is released is transmitted to the main CPU 63.

After that, the payout abnormality monitoring process is executed (step S703). In the payout abnormality monitoring process, as described above, it is specified whether or not the payout abnormality state is present based on the detection result of the payout detection sensor, and if the payout abnormality state is present, the process of stopping the payout of the game ball is executed. At the same time, a command indicating that the payout is in an abnormal state is transmitted to the main CPU 63. Further, when the payout abnormal state is canceled, a process for enabling the payout of the game ball is executed, and a command indicating that the payout abnormal state is canceled is transmitted to the main CPU 63.

After that, the front door opening monitoring process is executed (step S704). In the front door opening monitoring process, as described above, whether or not the front door frame 14 is in the open state is specified based on the detection result of the front door open sensor 95, and if the front door frame 14 is in the open state, A process of stopping the payout of the game ball is executed, and a front door opening command is transmitted to the main CPU 63. Further, when the front door frame 14 is closed, a process for enabling the payout of the game ball is executed, and a front door closing command is transmitted to the main CPU 63.

After that, the main body opening monitoring process is executed (step S705). In the main body open monitoring process, as described above, whether or not the game machine main body 12 is in the open state is specified based on the detection result of the main body open sensor 96, and if the game machine main body 12 is in the open state, the game ball. Is executed, and a main body release command is transmitted to the main CPU 63. Further, when the game machine main body 12 is closed, a process for enabling the payout of the game ball is executed, and a main body close command is transmitted to the main CPU 63.

After that, the command reading process is executed (step S706). In the command reading process, a process of reading the prize ball command transmitted by the main CPU 63 is executed, and the prize ball command is stored in the payout side RAM 94. Then, after executing the prize ball setting process for adding the number corresponding to the received prize ball command to the unpaid prize ball number information in the payout side RAM 94 (step S707), the game ball is paid out by the payout device 76. The payout control process for controlling the execution of the above is executed (step S708). In the payout control process, when the unpaid prize ball number information stored in the payout side RAM 94 is a value of 1 or more, the payout device 76 is driven and controlled, and one game ball is detected by the payout detection sensor. If so, the value of the prize ball number information is subtracted by 1. Then, when the value of the prize ball number information becomes "0", the drive control of the payout device 76 is stopped. After that, the external information setting process for controlling the start and end of the output of the external signal according to the processing results of the various processes executed in the timer interrupt process this time is executed (step S709).

Next, a configuration for externally outputting information from the pachinko machine 10 to the hall computer HC provided in the game hall will be described.

As shown in FIG. 2, the back pack unit 15 is provided with an external terminal plate 97. The external terminal plate 97 is provided with a large number of external terminals, and is a part of the external terminals in which the plurality of external terminals are electrically connected to the main CPU 63 and some of the external terminals. A plurality of external terminals are electrically connected to the payout side CPU 92. Since each of the main CPU 63 and the payout side CPU 92 is electrically connected to the external terminal plate 97 in this way, as shown in FIG. 16, the main side CPU 63 and the payout side CPU 92 externally send information to the hall computer HC. It is possible to output.

One external terminal of the external terminal plate 97 is electrically connected to the front door opening sensor 95, and one external terminal of the external terminal plate 97 is electrically connected to the main body opening sensor 96. In detail about the configuration of this electrical connection, a signal relay board 98 is provided at an intermediate position of the signal path from the front door opening sensor 95 to the payout side CPU 92. The signal relay board 98 is provided with a branch path SL2 branched from the signal path SL1 from the front door opening sensor 95 toward the payout side CPU 92. The branch path SL2 is connected to an external terminal for opening the front door of the external terminal plate 97. Therefore, the electric signal corresponding to the detection result of the front door opening sensor 95 is input not only to the payout side CPU 92 but also to the external terminal for opening the front door of the external terminal plate 97. As a result, it is possible to externally output a signal indicating whether or not the front door frame 14 is in the open state to the hall computer HC without the control of the payout side CPU 92.

Regarding the main body open sensor 96 in detail, the signal relay board 98 is provided with a branch path SL4 branched from the signal path SL3 from the main body open sensor 96 toward the payout side CPU 92. Then, the branch path SL4 is connected to an external terminal for opening the main body of the external terminal plate 97. Therefore, the electric signal corresponding to the detection result of the main body opening sensor 96 is input not only to the payout side CPU 92 but also to the external terminal for opening the main body of the external terminal plate 97. As a result, it is possible to externally output a signal indicating whether or not the gaming machine main body 12 is in the open state to the hall computer HC without the control of the payout side CPU 92.

Next, the contents of the information output externally from the main CPU 63 and the payout CPU 92 to the hall computer HC will be described. First, the contents of the information output externally from the main CPU 63 to the hall computer HC will be described.

The main CPU 63 sets the output of information to each external terminal assigned to the main CPU 63 on the external terminal board 97 in the external information setting process (step S318) in the timer interrupt process (FIG. 11). As the information output from the main CPU 63 to the external terminal board 97, the information indicating that the opening / closing execution mode is in progress, the information indicating that the support mode is in the high frequency support mode, and one game round are completed. Information indicating that, and a predetermined number (for example, 100) of game balls are ejected from the game area PA through any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. Information indicating that the ball has been discharged, information indicating that the game ball has entered the first operating port 33, and information indicating that the game ball has entered the second operating port 34 are included. ..

The payout side CPU 92 sets the output of information to each external terminal assigned to the payout side CPU 92 on the external terminal board 97 in the external information setting process (step S709) in the timer interrupt process (FIG. 17). The information output from the payout side CPU 92 to the external terminal board 97 includes information indicating that 10 game balls have been paid out.

In the hall computer HC, it is possible to grasp the execution mode of paying out the game ball in the pachinko machine 10 according to various information received from the pachinko machine 10 through the external terminal plate 97. for example,
-The payout rate, which is the ratio of the number of game balls to be paid out until 100 game balls are discharged from the game area PA of the pachinko machine 10. Ball rate (hereinafter, this ball output rate is referred to as "B")
-The ball ejection rate in the open / close execution mode-The ball ejection rate in the high-frequency support mode-The number of game times executed until 100 game balls are ejected from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as this ratio. "S")
B-S x "Number of prize balls for winning prizes in the first operating port 33 and the second operating port 34"
-The number of game balls entering the first operating port 33 generated before 100 game balls are discharged from the game area PA of the pachinko machine 10 (hereinafter, this ratio is referred to as "S1").
-The number of game balls entering the second operating port 34, which was generated before 100 game balls were discharged from the game area PA of the pachinko machine 10, (hereinafter, this ratio is referred to as "S2").
B- (S1 x "Number of prize balls for winning the first operating port 33" + S2 x "Number of prize balls for winning the second operating port 34")
-The probability of occurrence of the open / close execution mode per unit game round-The probability of occurrence of the high-frequency support mode per unit game round is calculated. This makes it possible for the hall computer HC to manage the entry mode of the game ball in the game area PA of the pachinko machine 10. The number of prize balls is the number of game balls to be paid out when one game ball enters the corresponding ball entry portion.

<Structure for managing the winning mode of the game ball>
Next, a configuration for managing the game history using the management IC 66 will be described. First, the electrical configuration of the management IC 66 will be described with reference to the block diagram of FIG.

As described above, the MPU 62 of the main control device 60 includes a main CPU 63, a main ROM 64, a main RAM 65, and a management IC 66. In addition to these, the MPU 62 includes an I / F 101 and a reading terminal 68d already described.

The I / F 101 is an interface for transmitting and receiving signals to and from an external device of the MPU 62. The I / F 101 is electrically connected to the main CPU 63 via the internal bus 103. The detection results from the sensors such as the ball entry detection sensors 42a to 49a and the commands from the payout side CPU 92 are input to the MPU 62 through the input port of the I / F 101, and based on the input detection results and the contents of the commands. As described above, the main CPU 63 executes various processes. Further, when various processes are executed by the main CPU 63 and a signal is output to a device such as a drive unit 32b for special electric power, the signal output is performed through the output port of the I / F 101 and the main side. When a command is output to the payout side CPU 92 and the voice emission control device 81 as a result of executing various processes in the CPU 63, the command output is performed through the output port of the I / F 101.

The management IC 66 includes a management side I / F 111, a management side CPU 112, a management side ROM 113, a management side RAM 114, an RTC 115, a correspondence relationship memory 116, a history memory 117, a calculation result memory 131, and the like. It has. Each of these devices is connected so as to be able to communicate in both directions through an internal bus 66a provided in the management IC 66.

The management side I / F 111 receives various signals from the main CPU 63 via the signal path group 118 for unidirectional communication built in the MPU 62, and also receives the signal path group 119 for unidirectional communication built in the MPU 62. This is an interface for transmitting various signals to the reading terminal 68d via the reading terminal 68d. Various signals from the main CPU 63 are input to the input port of the management side I / F 111, and various signals to the reading terminal 68d are output from the output port of the management side I / F 111. The main CPU 63 is electrically connected to the reading terminal 68d via the signal path group 120 for bidirectional communication built in the MPU 62.

The management side CPU 112 is an arithmetic processing unit including a control unit and an arithmetic unit. The management side ROM 113 is a memory (that is, non-volatile storage means) that does not require external power supply for storage retention such as NOR type flash memory and NAND type flash memory, and is used as read-only. The management side ROM 113 stores various control programs and fixed value data executed by the management side CPU 112. The management-side RAM 114 is a memory (that is, volatile storage means) that requires external power supply for storage retention of SRAM, DRAM, and the like, and is used for both reading and writing. The management side RAM 114 can be randomly accessed, and the time required for reading is faster than that of the management side ROM 113 when compared with the same data capacity. The management side RAM 114 temporarily stores various data and the like for the execution of the control program stored in the management side ROM 113.

The RTC 115 is a real-time clock that constantly measures the date and time information, and outputs the measured date and time information (hereinafter, also referred to as date and time information) according to the instruction from the management CPU 112. It is a possible configuration. The RTC 115 is provided with a backup power supply, and it is possible to measure the date information and the time information even while the power supply of the pachinko machine 10 is cut off.

The correspondence memory 116 is a memory (that is, a volatile storage means) that requires external power supply for storage retention such as SRAM and DRAM, and is used for both reading and writing. The correspondence memory 116 stores information on the correspondence between the buffers 122a to 122p provided in the input port 121 of the management side I / F 111 and the types of signals input to the buffers 122a to 122p. Used for. The details of the contents of the correspondence memory 116 will be described later.

The history memory 117 is a memory (that is, non-volatile storage means) that does not require external power supply for storage retention such as NOR type flash memory and NAND type flash memory, and is used for both reading and writing. The history memory 117 is used to store information regarding the game history received from the main CPU 63 through the management side I / F 111. The details of the contents of the history memory 117 will be described later.

The calculation result memory 131 is a memory (that is, non-volatile storage means) that does not require external power supply for storage retention such as NOR type flash memory and NAND type flash memory, and is used for both reading and writing. The calculation result memory 131 is used to sequentially store various parameters calculated by the management CPU 112 by using the history information stored in the history memory 117. The contents of various parameters stored in the calculation result memory 131 are sequentially displayed on the first to third notification display devices 69a to 69c, and are output to the external device connected to the reading terminal 68d.

Next, the configuration of the input port 121 provided on the management side I / F 111 will be described. FIG. 19 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I / F 111.

The input port 121 is provided with a plurality of buffers 122a to 122p. Specifically, the 1st to 16th buffers 122a to 122p are provided. One type of signal can be input to each of the first to 16th buffers 122a to 122p through the signal paths 118a to 118p, and each of the first to 16th buffers 122a to 122p is an input target signal. When is LOW level, the information of "0" is stored as the first data, and when the signal to be input is the HI level, the information of "1" is stored as the second data. The relationship between these LOW and HI and the first data and the second data may be reversed.

A first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a. In this case, the main CPU 63 outputs a LOW level first signal when a new game ball is not detected by the first winning opening detection sensor 42a, and one game is played by the first winning opening detection sensor 42a. When a sphere is detected, a first signal of HI level is output for a specific period. This specific period is a period sufficient for the management CPU 112 to specify that the HI level first signal is input to the first buffer 122a.

A second signal corresponding to the detection result of the second winning opening detection sensor 43a is input to the second buffer 122b. In this case, the main CPU 63 outputs a LOW level second signal when a new game ball is not detected by the second winning opening detection sensor 43a, and one game is played by the second winning opening detection sensor 43a. When a sphere is detected, a second signal of HI level is output for a specific period. This specific period is a period sufficient for the management CPU 112 to specify that the HI level second signal is input to the second buffer 122b.

A third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the third buffer 122c. In this case, the main CPU 63 outputs a LOW level third signal when a new game ball is not detected by the third winning opening detection sensor 44a, and one game is played by the third winning opening detection sensor 44a. When a sphere is detected, a third signal of HI level is output for a specific period. This specific period is a period sufficient for the management CPU 112 to specify that the HI level third signal is input to the third buffer 122c.

A fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. In this case, the main CPU 63 outputs a LOW level fourth signal when a new game ball is not detected by the special electric detection sensor 45a, and when one game ball is detected by the special electric detection sensor 45a. The HI level fourth signal is output over a specific period of time. This specific period is a period sufficient for the management CPU 112 to specify that the HI level fourth signal is input to the fourth buffer 122d.

A fifth signal corresponding to the detection result of the first operating port detection sensor 46a is input to the fifth buffer 122e. In this case, the main CPU 63 outputs a LOW level fifth signal when a new game ball is not detected by the first operating port detection sensor 46a, and one game is played by the first operating port detection sensor 46a. When a sphere is detected, a fifth signal of HI level is output for a specific period. This specific period is a period sufficient for the management CPU 112 to specify that the HI level fifth signal is input to the fifth buffer 122e.

A sixth signal corresponding to the detection result of the second operating port detection sensor 47a is input to the sixth buffer 122f. In this case, the main CPU 63 outputs a LOW level sixth signal when a new game ball is not detected by the second operating port detection sensor 47a, and one game is played by the second operating port detection sensor 47a. When a sphere is detected, a HI level sixth signal is output for a specific period of time. This specific period is a period sufficient for the management CPU 112 to specify that the HI level sixth signal is input to the sixth buffer 122f.

A seventh signal corresponding to the detection result of the out port detection sensor 48a is input to the seventh buffer 122g. In this case, the main CPU 63 outputs a LOW level 7th signal when a new game ball is not detected by the out port detection sensor 48a, and one game ball is detected by the out port detection sensor 48a. In that case, the HI level 7th signal is output over a specific period. This specific period is a period sufficient for the management CPU 112 to specify that the HI level 7th signal is input to the 7th buffer 122g.

An eighth signal corresponding to whether or not the opening / closing execution mode is in progress is input to the eighth buffer 122h. In this case, the main CPU 63 continuously outputs the LOW level 8th signal when it is not in the open / close execution mode, and continuously outputs the HI level 8th signal when it is in the open / close execution mode.

A ninth signal corresponding to whether or not the high frequency support mode is in progress is input to the ninth buffer 122i. In this case, the main CPU 63 continuously outputs the LOW level 9th signal when it is not in the high frequency support mode, and continuously outputs the HI level 9th signal when it is in the high frequency support mode.

A tenth signal corresponding to whether or not the front door frame 14 is open is input to the tenth buffer 122j. In this case, the main CPU 63 continuously outputs the LOW level 10th signal when the front door frame 14 is closed, and continues the HI level 10th signal when the front door frame 14 is open. And output.

The eleventh signal corresponding to whether or not the game round has been started is input to the eleventh buffer 122k. In this case, the main CPU 63 continuously outputs the LOW level 11th signal until the game round is started, and outputs the HI level 11th signal over a specific period when the game round is started. do. This specific period is a period sufficient for the management CPU 112 to specify that the HI level 11th signal is input to the 11th buffer 122k.

A set value update signal for causing the management side CPU 112 to recognize that the setting state of the pachinko machine 10 has been newly set by the main side CPU 63 is input to the 15th buffer 122o. In this case, the main CPU 63 outputs a LOW level setting value update signal when the setting state of the pachinko machine 10 is not newly set, and when the setting state of the pachinko machine 10 is newly set. The HI level set value update signal is maintained for a specific period of time, and a pulse signal is output for a number of minutes corresponding to the newly set set value. This specific period is a period sufficient for the management CPU 112 to specify that the HI level set value update signal is input to the 15th buffer 122o.

In the 16th buffer 122p, an output instruction signal for causing the management CPU 112 to recognize the opportunity to output the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 to the reading terminal 68d is transmitted to the 16th buffer 122p. Entered. In this case, the main CPU 63 outputs a LOW level output instruction signal when it is not necessary to output history information, and outputs an HI level output instruction signal over a specific period when it is necessary to output history information. do. This specific period is a period sufficient for the management CPU 112 to specify that the HI level output instruction signal is input to the 16th buffer 122p.

Although the 12th buffer 122l, the 13th buffer 122m, and the 14th buffer 122n can input signals from the main CPU 63, the pachinko machine 10 is blank in which a normal signal is not input. As described above, as the input port 121 of the management side I / F 111, the pachinko machine 10 is provided with a larger number of buffers 122a to 122p than the types of signals output from the main CPU 63 to the management IC 66. The management IC 66 can be diverted to a model different from the pachinko machine 10. This makes it possible to increase the versatility of the management IC 66. Incidentally, signal paths 118a to 118p are formed between the main CPU 63 and each of the 1st to 16th buffers 122a to 122p so as to have a one-to-one correspondence with the 1st to 16th buffers 122a to 122p. However, the present invention is not limited to this, and the signal paths 118l to 118n may not be formed between the buffers 122l to 122n to be blanked.

It is determined at the design stage of the management IC 66 that the set value update signal is input to the 15th buffer 122o and the output instruction signal is input to the 16th buffer 122p, and the instruction from the main CPU 63 is received. Instead, the management CPU 112 can specify that the set value update signal is input to the 15th buffer 122o and that the output instruction signal is input to the 16th buffer 122p. On the other hand, what kind of signal is input to the first to 14th buffers 122a to 122n is not determined at the design stage of the management IC 66, and the type of these signals receives an instruction from the main CPU 63. This is specified by the management side CPU 112. The specification of these signal types in the management side CPU 112 will be described in detail later, but when control is started in the main side CPU 63 and the management side CPU 112 with the start of supply of the operating power to the MPU 62, the main side CPU 63 to the management side CPU 112 This is done by sending a type identification command to. In this case, the information on the types of various signals provided by the type identification command is stored in the correspondence memory 116, and when the management side CPU 112 specifies the types of various signals in a situation where the operating power is supplied. The information stored in the correspondence memory 116 is referred to.

FIG. 20 is an explanatory diagram for explaining the configuration of the correspondence memory 116. The correspondence-related memory 116 has the first to 14th correspondence-related areas 123a to 123n having a one-to-one correspondence with the first to 14th buffers 122a to 122n provided in the input port 121 of the management side I / F 111. It is provided.

In the first correspondence area 123a, information indicating that the general winning opening 31 is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the first buffer 122a. Further, in the first correspondence area 123a, along with the information indicating that the general winning opening 31 is used, the information on the number of gaming balls (10) to be paid out when one gaming ball enters the general winning opening 31 is also provided. It is stored. In the second correspondence area 123b, information indicating that the general winning opening 31 is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the second buffer 122b. Further, in the second correspondence area 123b, along with the information indicating that the general winning opening 31 is used, the information on the number of gaming balls (10) to be paid out when one gaming ball enters the general winning opening 31 is also provided. It is stored. In the third correspondence area 123c, information indicating that the general winning opening 31 is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the third buffer 122c. Further, in the third correspondence area 123c, along with the information indicating that the general winning opening 31 is used, the information on the number of gaming balls (10) to be paid out when one gaming ball enters the general winning opening 31 is also provided. It is stored.

In the fourth correspondence area 123d, information indicating that the special electric winning device 32 is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the fourth buffer 122d. Further, in the fourth correspondence area 123d, along with the information indicating that the special electric winning device 32 is used, the information on the number of game balls (15) to be paid out when one game ball enters the special electric winning device 32 is also provided. It is stored. In the fifth correspondence area 123e, information indicating that the first operating port 33 is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the fifth buffer 122e. Further, in the fifth correspondence area 123e, information indicating that the first operating port 33 is provided and information on the number of game balls to be paid out when one game ball enters the first operating port 33 (one). ) Is also stored. In the sixth correspondence area 123f, information indicating that the second operating port 34 is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the sixth buffer 122f. Further, in the sixth correspondence area 123f, information indicating that the second operating port 34 is provided and information on the number of game balls to be paid out when one game ball enters the second operating port 34 (one). ) Is also stored. In the 7th correspondence area 123g, information indicating that the output port 24a is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the 7th buffer 122g.

In the eighth correspondence area 123h, information indicating that the open / close execution mode is set is stored as information for the management side CPU 112 to specify the type of the signal input to the eighth buffer 122h. In the ninth correspondence area 123i, information indicating that the high frequency support mode is set is stored as information for the management side CPU 112 to specify the type of the signal input to the ninth buffer 122i. In the tenth correspondence area 123j, information indicating that the front door frame 14 is stored is stored as information for the management side CPU 112 to specify the type of the signal input to the tenth buffer 122j. In the eleventh correspondence area 123k, information indicating that the game is started is stored as information for the management side CPU 112 to specify the type of the signal input to the eleventh buffer 122k.

In the twelfth correspondence area 123l, as information for specifying the type of the signal input to the twelfth buffer 122l by the management side CPU 112, information indicating that the blank does not correspond to any of them is stored. In the thirteenth correspondence area 123m, as information for specifying the type of the signal input to the thirteenth buffer 122m by the management side CPU 112, information indicating that the blank does not correspond to any of them is stored. In the 14th correspondence area 123n, as information for specifying the type of the signal input to the 14th buffer 122n by the management side CPU 112, information indicating that the blank does not correspond to any of them is stored.

As described above, what kind of signal is input to the first to 14th buffers 122a to 122n can be specified by the management side CPU 112 by receiving an instruction from the main side CPU 63. , The management IC 66 can be diverted to a model different from the pachinko machine 10. This makes it possible to increase the versatility of the management IC 66.

Further, each time the signals corresponding to the storage of the history information are output to the first to 14th buffers 122a to 122n, the information for recognizing the signal type is not output, but the signal type is recognized in advance. Information for specifying the type of signal input to the first to 14th buffers 122a to 122n by the management side CPU 112 based on the output information is stored in the correspondence memory 116. It is a configuration. As a result, as compared with the configuration in which the information for recognizing the type of the signal is output to the first to 14th buffers 122a to 122n each time the signal corresponding to the storage of the history information is output, the signal is mainly output each time. It is possible to suppress the amount of information output from the side CPU 63 to the management side CPU 112.

Further, the management side CPU 112 outputs the information for specifying the type of the signal input to the first to 14th buffers 122a to 122n when the supply of the operating power is started. Thereby, in the situation where the game is started by the pachinko machine 10, the type of the signal input to the first to 14th buffers 122a to 122n can be specified by the management side CPU 112.

Further, the information setting that the set value update signal is input to the 15th buffer 122o and the information setting that the output instruction signal is input to the 16th buffer 122p are performed at the design stage of the management IC 66. As a result, the 15th buffer 122o and the 16th buffer 122p are used for the set value update signal and the output instruction signal that are surely used not only in the pachinko machine 10 but also in other models of pachinko machines that use the management IC66. It is possible to omit the process for specifying the type of the signal input to. Therefore, it is possible to suppress the processing load of the processing for specifying the type of such a signal.

Next, the history memory 117 of the management IC 66 will be described. FIG. 21 is an explanatory diagram for explaining the configuration of the history memory 117.

The history memory 117 is provided with a history area 124 for sequentially storing history information. In the history area 124, a plurality of pointer information is set in sequence, and a history information storage area 125 is set in which each pointer information has a one-to-one correspondence. The history information storage area 125 can store a combination of RTC information and correspondence information. In this case, each history information storage area 125 has a data capacity of 2 bytes, and a data capacity of 1 byte is allocated as an area for storing RTC information, and as an area for storing correspondence information. One byte of data capacity is allocated. When it becomes necessary to store correspondence information according to the signal input to the first to fourth buffers 122a to 122n (actually, in the case of the pachinko machine 10, the first to eleventh buffers 122a to 122k). First, the date and time information measured in the current RTC 115 is stored in the area for storing the RTC information in the history information storage area 125 corresponding to the pointer information to be written in the current state. After that, the correspondence information corresponding to the buffers 122a to 122n that triggered the information storage this time is read from the correspondence areas 123a to 123n corresponding to the buffers 122a to 122n in the correspondence memory 116, and the read correspondence information is read. Is stored in the area for storing the correspondence information of the history information storage area 125 corresponding to the pointer information currently to be written.

Specifically, regarding the correspondence information stored in the history information storage area 125, signals corresponding to the detection results of the ball entry detection sensors 42a to 48a are input to the first to seventh buffers 122a to 122g as described above. Therefore, information corresponding to the types of the ball entry detection sensors 42a to 48a is stored in the first to seventh correspondence areas 123a to 123g in the correspondence memory 116. More specifically, the information corresponding to the type of the ball entry unit corresponding to each of the ball entry detection sensors 42a to 48a is stored in the first to seventh correspondence related areas 123a to 123g. In the pachinko machine 10, as described above, since the first to third winning opening detection sensors 42a to 44a all detect the game ball that has entered the general winning opening 31, these first to third winning openings Information indicating that each of the first to third correspondence areas 123a to 123c corresponding to the detection sensors 42a to 44a is a general winning opening 31 is stored. Further, the fourth correspondence area 123d stores information indicating that the special electric winning device 32 is used, and the fifth correspondence area 123e stores information indicating that the first operating port 33 is provided. , The sixth correspondence area 123f stores information indicating that it is the second operating port 34, and the seventh correspondence area 123g stores information indicating that it is the out port 24a. When the buffers 122a to 122n that triggered the information storage this time are any of the first to seventh buffers 122a to 122g, the information on the type of the ball entry portion corresponding to the buffers 122a to 122g is the first to first. It is read from any of the seventh correspondence areas 123a to 123g, and the read information on the type of the ball entry portion is stored as it is in the area for storing the correspondence information in the history information storage area 125.

On the other hand, the eighth buffer 122h is input with a signal indicating whether or not it is in the open / close execution mode, the ninth buffer 122i is input with a signal indicating whether or not it is in the high frequency support mode, and the tenth buffer 122j is input with a signal indicating whether or not it is in the high frequency support mode. A signal indicating whether or not the front door frame 14 is open is input, and a signal indicating whether or not the game round is started is input to the 11th buffer 122k. Therefore, the 8th correspondence area 123h stores information indicating that the open / close execution mode is in effect, the 9th correspondence area 123i stores information indicating that the high frequency support mode is in use, and the 10th correspondence area 123i stores information indicating that the mode is in the high frequency support mode. Information indicating that the front door frame 14 is stored is stored in 123j, and information indicating that the game is played is stored in the eleventh correspondence area 123k.

As described above, the main CPU 63 continuously outputs the LOW level 8th signal in the open / close execution mode, and continuously outputs the HI level 8th signal in the open / close execution mode. The side CPU 112 identifies that the open / close execution mode has started when the eighth signal changes from the LOW level to the HI level, and identifies that the open / close execution mode has ended when the eighth signal changes from the HI level to the LOW level. It becomes possible. Then, both when the eighth signal changes from the LOW level to the HI level and when the eighth signal changes from the HI level to the LOW level, the management side CPU 112 generates an opportunity to store the correspondence information in the history information storage area 125. Identify that. That is, when the 8th signal changes from the LOW level to the HI level, the history information storage area 125 includes not only the information indicating that the opening / closing execution mode is read from the 8th correspondence area 123h but also the start information. Store in the area for storing the correspondence information of. Further, when the 8th signal changes from the HI level to the LOW level, the history information storage area 125 includes not only the information indicating that the opening / closing execution mode is read from the 8th correspondence area 123h but also the end information. Store in the area for storing the correspondence information of.

As described above, the main CPU 63 continuously outputs the LOW level 9th signal when it is not in the high frequency support mode, and continuously outputs the HI level 9th signal when it is in the high frequency support mode. , The management CPU 112 identifies that the high frequency support mode is started when the 9th signal changes from the LOW level to the HI level, and ends the high frequency support mode when the 9th signal changes from the HI level to the LOW level. It becomes possible to identify that it has been done. Then, both when the ninth signal changes from the LOW level to the HI level and when the ninth signal changes from the HI level to the LOW level, the management side CPU 112 generates an opportunity to store the correspondence information in the history information storage area 125. Identify that. That is, when the 9th signal changes from the LOW level to the HI level, the history information storage area includes not only the information indicating that the high frequency support mode is read from the 9th correspondence area 123i but also the start information. It is stored in the area for storing the correspondence information of 125. Further, when the 9th signal changes from the HI level to the LOW level, the history information storage area includes not only the information indicating that the high frequency support mode is read from the 9th correspondence area 123i but also the end information. It is stored in the area for storing the correspondence information of 125.

As described above, the main CPU 63 continuously outputs the LOW level 10th signal when the front door frame 14 is closed, and outputs the HI level 10th signal when the front door frame 14 is open. In order to continuously output, the management side CPU 112 identifies that the front door frame 14 is opened when the 10th signal changes from the LOW level to the HI level, and when the 10th signal changes from the HI level to the LOW level. Can identify that the front door frame 14 has been closed. Then, regardless of whether the tenth signal changes from the LOW level to the HI level or from the HI level to the LOW level, the management side CPU 112 generates an opportunity to store the correspondence information in the history information storage area 125. Identify that. That is, when the 10th signal changes from the LOW level to the HI level, the history information is stored together with not only the information indicating that the front door frame 14 is read from the 10th correspondence area 123j but also the opening start information. It is stored in the area for storing the correspondence information of the area 125. Further, when the 10th signal changes from the HI level to the LOW level, the history information is stored together with not only the information indicating that the front door frame 14 is read from the 10th correspondence area 123j but also the opening end information. It is stored in the area for storing the correspondence information of the area 125.

As already explained, the main CPU 63 continuously outputs the LOW level 11th signal until the start timing of the game round, and when the start timing of the game round comes, the 11th HI level over a specific period. Output a signal. Therefore, the management side CPU 112 identifies that the game round is started when the 11th signal changes from the LOW level to the HI level. That is, when the 11th signal changes from the LOW level to the HI level, the information indicating that the game times are read from the 11th correspondence area 123k is stored in the history information storage area 125. Store in the area of.

The history information storage area 125 can store all the history information generated during the 10 consecutive business days in which the launch of the game ball in the pachinko machine 10 is continued from the opening to the closing of the store. It is provided for several minutes. For example, if history information is generated 60,000 times a day, more than 600,000 history information storage areas 125 are provided. As a result, all the history information can be stored and retained in the history memory 117 for at least 10 days.

The history memory 117 is provided with a pointer area 126 in addition to the history area 124. In the pointer area 126, information for specifying the pointer information currently to be written in the history memory 117 by the management CPU 112 is stored. Specifically, at the shipping stage of the pachinko machine 10, information for designating the pointer information of "0" as the writing target is set in the pointer area 126. Then, each time one history information is newly stored in the history information storage area 125, the information in the pointer area 126 is updated so that the value of the pointer information to be written is incremented by 1. When the pointer information of the last order is the writing target and the history information is stored in the history information storage area 125 corresponding to the pointer information of the last order, the pointer information of "0" is the writing target. The information in the area 126 is updated. As a result, when the number of history information that can be stored is exceeded and an opportunity to store the history information occurs, the new history information is overwritten in order from the history information storage area 125 in which the old history information is stored. Become.

Further, when the history information is read from the history memory 117 by the external device, all the history information storage areas 125 are cleared to "0" and the pointer information of "0" is to be written. The information in the pointer area 126 is updated. This makes it possible to prevent the history information that was once read as the read target from being read again.

Next, a specific processing configuration for managing the game history using the management IC 66 will be described. First, a processing configuration for storing information on the correspondence between the first to 14th buffers 122a to 122n provided in the input port 121 of the management side I / F 111 and the signal type in the correspondence memory 116 will be described. FIG. 22 is a flowchart showing a recognition process executed by the main CPU 63. The recognition process is executed in step S111 in the main process (FIG. 9).

First, "14" is set in the recognition output counter provided in the main RAM 65 (step S801). The recognition output counter is the rest of the information output for causing the management CPU 112 to recognize which type of signal the first to 14th buffers 122a to 122n of the input port 121 on the management side I / F 111 correspond to. It is a counter for specifying the required number of times by the main CPU 63. As described above, 14 of the 1st to 14th buffers 122a to 122n are the recognition targets of the signal type, so “14” is set in the recognition output counter.

After that, the output process of the identification start command is executed (step S802). The main CPU 63 outputs various commands to the management CPU 112 in order to make the management CPU 112 recognize which type of signal the first to 14th buffers 122a to 122n correspond to. In this command output, the first to eighth signals input to the first to eighth buffers 122a to 122h are used. That is, the first to fourth buffers 122a are used by using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h) used to instruct the management side CPU 112 to store the history information. A command output is performed to make the management CPU 112 recognize which type of signal the ~ 122n corresponds to. As a result, the number of signal paths can be reduced as compared with the configuration in which the signal paths for outputting the command are provided separately from the signal paths 118a to 118p for outputting signals to the first to 16th buffers 122a to 122p. It becomes possible to simplify the configuration. The identification start command has an 8-bit data capacity, and the data of each bit is input to the 1st to 8th buffers 122a to 122h as the 1st to 8th signals, respectively. Further, in the output processing of the identification start command, the output state of the ninth signal is switched to the HI level at the timing of starting the output of the identification start command in order to make the management CPU 112 recognize that the new command has been transmitted. Further, the output period of the identification start command and the period for maintaining the output state of the ninth signal at the HI level are set to a period sufficient for the management side CPU 112 to recognize the output state of the identification start command and the ninth signal. Has been done. Upon receiving the identification start command, the management CPU 112 should start the process for storing the information on the correspondence between the first to 14th buffers 122a to 122n and the signal type in the correspondence memory 116. Identify.

After that, the type identification command corresponding to the current value of the recognition output counter of the main RAM 65 is read from the main ROM 64 (step S803). In this case, the first buffer 122a corresponds to the first buffer 122a to 122n so that the first buffer 122a is the signal type setting target first, and then the n + 1 buffer is the signal type setting target next to the nth buffer. The recognition setting of the signal type to be performed is performed. Therefore, if the recognition output counter is "14" to "12", the general winning opening 31 and the type identification command indicating the number of prize balls are read, and if the recognition output counter is "11", the special electric prize is won. Read the type identification command indicating that the device is 32 and the number of prize balls, and if the recognition output counter is "10", read the type identification command indicating that the device is the first operating port 33 and the number of prize balls. If the recognition output counter is "9", it means that it is the second operating port 34, and if the recognition output counter is "8", it means that it is the out port 24a. Read the indicated type identification command, read the type identification command indicating that it is in the open / close execution mode if the recognition output counter is "7", and read the high frequency support mode if the recognition output counter is "6". If the recognition output counter is "5", the type identification command indicating that the front door frame is 14 is read, and if the recognition output counter is "4", the game is played. Is read, and if the recognition output counter is "3" to "1", the type identification command indicating that the counter is blank is read.

After that, the output process of the read type identification command is executed (step S804). The type identification command has an 8-bit data capacity like the identification start command, and the data of each bit is input to the 1st to 8th buffers 122a to 122h as the 1st to 8th signals, respectively. Further, in the output processing of the identification type command, the output state of the ninth signal is switched to the HI level at the timing when the output of the identification type command is started in order to make the management CPU 112 recognize that the new command has been transmitted. Further, the output period of the identification type command and the period for maintaining the output state of the ninth signal at the HI level are set to a period sufficient for the management side CPU 112 to recognize the output state of the identification type command and the ninth signal. Has been done. By receiving the identification type command, the management CPU 112 corresponds to the identification type command in the corresponding related areas 123a to 123n corresponding to the buffers to be set this time among the first to 14th buffers 122a to 122n. Store information to be used.

After that, the value of the recognition output counter of the main RAM 65 is subtracted by 1 (step S805), and it is determined whether or not the value of the recognition output counter after the subtraction is "0" (step S806). When the value of the recognition output counter is 1 or more (step S806: NO), the process for outputting the type identification command corresponding to the value of the recognition output counter after 1 subtraction is executed (step S803 and Step S804).

On the other hand, when the value of the recognition output counter is "0" (step S806: YES), the output process of the identification end command is executed (step S807). The identification end command has an 8-bit data capacity, and the data of each bit is input to the 1st to 8th buffers 122a to 122h as the 1st to 8th signals, respectively. Further, in the output processing of the identification end command, the output state of the ninth signal is switched to the HI level at the timing when the output of the identification end command is started in order to make the management CPU 112 recognize that the new command has been transmitted. Further, the output period of the identification end command and the period for maintaining the output state of the ninth signal at the HI level are set to a period sufficient for the management side CPU 112 to recognize the output state of the identification end command and the ninth signal. Has been done. By receiving the identification end command, the management CPU 112 identifies that the process for storing the information on the correspondence between the first to 14th buffers 122a to 122n and the signal type in the correspondence memory 116 has been completed. do.

Next, the management process executed by the management side CPU 112 will be described with reference to the flowchart of FIG. The management process is started when the supply of operating power to the management side CPU 112 is started. The processing speed of the management side CPU 112 is faster than the processing speed of the main side CPU 63, and the next timer interrupt processing (FIG. 11) is performed after one timer interrupt processing (FIG. 11) is started in the main side CPU 63. Is started, the combination of the processes after step S908 in the management process is executed 16 times or more.

First, it is determined whether or not the identification start command has been received from the main CPU 63 (step S901). If the identification start command has not been received (step S901: NO), the process returns to step S901 after executing the setting update recognition process (step S902). In the setting update recognition process, although the details will be described later, when a new setting of the setting state of the pachinko machine 10 is made by the main CPU 63, the corresponding process is executed.

When the identification start command is received from the main CPU 63 (step S901: YES), the value of the setting target counter provided in the management side RAM 114 is cleared to "0" (step S903). The setting target counter is a counter for the management side CPU 112 to specify the types of buffers 122a to 122n for which the signal type is set. The first buffer 122a is the signal type setting target first, and then the n + 1 buffer is the signal type setting target after the nth buffer.

After that, on condition that the type identification command is received from the main CPU 63 (step S904: YES), the correspondence setting process is executed (step S905). In the correspondence setting process, the type identification received this time in the correspondence area corresponding to the current value in the setting target counter of the management side RAM 114 among the first to 14th correspondence areas 123a to 123n of the correspondence memory 116. Stores information on the signal type set in the command. After that, the value of the setting target counter of the management side RAM 114 is added by 1 (step S906).

When a negative determination is made in step S904, or when the process of step S906 is executed, it is determined whether or not an identification end command has been received from the main CPU 63 (step S907). If the identification end command has not been received (step S907: NO), the process returns to step S904, and on condition that a new type identification command is received from the main CPU 63 (step S904: YES), steps S905 and S906 are performed. Execute the process again.

When the identification end command is received from the main CPU 63 (step S907: YES), the processes of steps S908 to S910 are repeatedly executed. Although the details will be described later in step S908, the history setting process for storing the history information corresponding to the type of the signal received from the main CPU 63 in the history memory 117 is executed. In step S909, although details will be described later, various parameters are calculated using the history information stored in the history memory 117, and the calculation results are notified by the first to third notification display devices 69a to 69c. Display output processing for. In step S910, although details will be described later, an external output process for outputting the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 to the reading terminal 68d is executed.

FIG. 24 is a time chart showing how the correspondence relationship information between the first to 14th buffers 122a to 122n and the types of signals input to these buffers 122a to 122n is stored in the correspondence relationship memory 116. FIG. 24A shows a period in which a command is output from the main CPU 63 to the management CPU 112 using the first to eighth signals (that is, the first to eighth signal paths 118a to 118h), and is shown in FIG. 24 (a). b) shows the period during which the output state of the ninth signal is at the HI level, and FIG. 24 (c) shows the types of signals input to the first to 14th buffers 122a to 122n and these buffers 122a to 122n. The execution period of the identification state in which the process for identifying the correspondence relationship is executed is shown, and FIG. 24D shows the timing when the correspondence relationship setting process (step S905) is executed by the management side CPU 112.

When the supply of the operating power to the main CPU 63 and the management CPU 112 is started, the output of the identification start command using the first to eighth signals is started at the timing of t1 as shown in FIG. 24 (a). NS. Further, at the timing of t1, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. 24 (b). After that, at the timing of t2, which is the situation where the output of the identification start command is continued, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. 24 (b). The management side CPU 112 identifies that the command is transmitted from the main side CPU 63 by confirming that the output state of the ninth signal has been changed from the HI level to the LOW level, and the first to eighth buffers 122a to 122h By confirming the information in, the content of the command received from the main CPU 63 can be grasped. In this case, since the identification start command has been received, the management side CPU 112 enters the identification state by making an affirmative determination in step S901 of the management process (FIG. 23). After that, at the timing of t3, the output of the identification start command is stopped as shown in FIG. 24 (a).

After that, at the timing of t4, as shown in FIG. 24A, the output of the first type identification command using the first to eighth signals is started. Further, at the timing of t4, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. 24 (b). After that, at the timing of t5, which is the situation where the output of the type identification command is continued, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. 24 (b). The management side CPU 112 identifies that the command has been transmitted from the main side CPU 63 by confirming that the output state of the ninth signal has been changed from the HI level to the LOW level, and the first to eighth buffers 122a to 122h By checking the information, the content of the command received from the main CPU 63 can be grasped. In this case, since the first type identification command is received, the management side CPU 112 executes the correspondence setting process as shown in FIG. 24D at the timing of t5. In the correspondence relationship setting process, information indicating that the general winning opening 31 is used and information on the number of prize balls are stored in the first correspondence relationship area 123a of the correspondence relationship memory 116. After that, at the timing of t6, the output of the type identification command is stopped as shown in FIG. 24 (a).

After that, in each of the timing of t7 to t9, the timing of t10 to the timing of t12, the timing of t13 to the timing of t15, and the timing of t16 to the timing of t18, the main timing is the same as the timing of t4 to t6. The management side CPU 112 executes the correspondence setting process corresponding to the type identification command output from the side CPU 63. In this case, the correspondence setting process corresponding to the 14th type identification command is completed from the timing of t16 to the timing of t18.

After that, at the timing of t19, as shown in FIG. 24A, the output of the identification end command using the first to eighth signals is started. Further, at the timing of t19, the output state of the ninth signal is changed from the LOW level to the HI level as shown in FIG. 24 (b). After that, at the timing of t20, which is the situation where the output of the identification end command is continued, the output state of the ninth signal is changed from the HI level to the LOW level as shown in FIG. 24 (b). The management side CPU 112 identifies that the command has been transmitted from the main side CPU 63 by confirming that the output state of the ninth signal has been changed from the HI level to the LOW level, and the first to eighth buffers 122a to 122h By checking the information, the content of the command received from the main CPU 63 can be grasped. In this case, since the identification end command is received, the identification state of the management side CPU 112 ends at the timing of t20 as shown in FIG. 24 (c). After that, at the timing of t21, the output of the identification end command is stopped as shown in FIG. 24 (a).

In order to instruct the management side CPU 112 to store the history information by making the management side CPU 112 recognize whether or not the command is being output using the ninth signal as described above. Clearly tell the management CPU 112 that the command is being output even if the command is output using the first to eighth signals (that is, the first to eighth signal paths) to be used. It becomes possible to recognize.

Next, a processing configuration for storing the history information in the history memory 117 will be described. FIG. 25 is a flowchart showing a management output process executed by the main CPU 63. The management output process is executed in step S319 in the timer interrupt process (FIG. 11).

First, "11" is set in the managed counter provided in the main RAM 65 (step S1001). The management target counter specifies whether or not there is a management target that is not a specific target of whether or not the signal output state to the management side CPU 112 should be changed in the current management output process by the main CPU 63. At the same time, it is a counter for the main CPU 63 to specify whether or not the signal output state to the management CPU 112 should be changed for any management target. The management targets for which the main CPU 63 specifies whether or not the signal output state to the management side CPU 112 should be changed in one management output process are the seven ball entry detection sensors 42a to 48a. There are a total of 11 cases: whether or not the opening / closing execution mode is executed, whether or not the high-frequency support mode is executed, whether or not the front door frame 14 is opened or closed, and whether or not the game round is started. Therefore, first, "11" is set in the managed counter.

After that, it is determined whether or not the output state of the signal to the management side CPU 112 for the management target corresponding to the value of the current management target counter is at the HI level (step S1002). When it is not the HI level (step S1002: NO), by determining whether or not the value of the managed target counter is 5 or more, the ball entry detection sensor 42a has seven managed targets corresponding to the value of the managed target counter. It is specified whether it is any of ~ 48a (step S1003).

When an affirmative determination is made in step S1003, it is determined whether or not "1" is set in the output flag of the main RAM 65 corresponding to the value of the managed counter (step S1004). Specifically, when the value of the managed counter is "11" and corresponds to the first winning opening detection sensor 42a, it is determined whether or not "1" is set in the first output flag. When the value of the managed counter is "10" and corresponds to the second winning opening detection sensor 43a, it is determined whether or not "1" is set in the second output flag, and the value of the managed counter is determined. Is "9" and corresponds to the third winning opening detection sensor 44a, it is determined whether or not "1" is set in the third output flag, and the value of the managed counter is "8". Yes When the special electric detection sensor 45a is supported, it is determined whether or not "1" is set in the fourth output flag, the value of the managed counter is "7", and the first operating port detection sensor 46a If it corresponds to, it is determined whether or not "1" is set in the fifth output flag, and the value of the management target counter is "6", which corresponds to the second operation port detection sensor 47a. In that case, it is determined whether or not "1" is set in the 6th output flag, and if the value of the managed counter is "5" and corresponds to the out port 24a, the 7th output flag is set to "1". It is determined whether or not "1" is set. As described above, the first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

When "1" is set in the output flag corresponding to the value of the managed counter (step S1004: YES), the output state of the signal corresponding to the value of the managed counter among the first to seventh signals is set to the HI level. (Step S1005). After that, the output flag corresponding to the value of the managed counter is cleared to "0" (step S1006).

When a negative determination is made in step S1003, it is determined whether or not an opportunity has occurred to switch the output state of the signal corresponding to the value of the managed counter to the HI level (step S1007). Specifically, when the value of the managed counter is "4", it is determined whether or not the transition to the open / close execution mode has occurred, and when the value of the managed counter is "3", it is high. It is determined whether or not the transition to the frequency support mode has occurred, and when the value of the managed object counter is "2", it is determined whether or not the front door frame 14 is in the open state, and the managed object counter When the value is "1", it is determined whether or not the game round has been started by determining whether or not "1" is set in the 11th output flag. If an affirmative determination is made in step S1007, the output state of the signal corresponding to the value of the managed counter is set to the HI level (step S1008). If the process of step S1008 is executed when the value of the managed counter is "1", the eleventh output flag is cleared to "0".

When an affirmative determination is made in step S1002, it is determined whether or not an opportunity has occurred to switch the output state of the signal corresponding to the value of the managed counter to the LOW level (step S1009). Specifically, when the value of the management target counter is 5 or more or "1" and the current management target is any of the ball entry detection sensors 42a to 48a or the start of the game round, the first to seventh signals And, it is determined whether or not the HI output duration (specifically, 10 milliseconds) has elapsed since the output state of the signal corresponding to the value of the managed counter among the 11th signals is switched from the LOW level to the HI level. .. This HI output continuation period is set in the management side CPU 112 to be longer than the longest processing interval of the history setting process (step S908) of the management process (FIG. 23), and the output of the signal switched from the LOW level to the HI level is set. It is a period during which the state can be reliably specified by the management side CPU 112. Further, when the value of the management target counter is "4" and the current management target is the open / close execution mode, it is determined whether or not the open / close execution mode has ended, and the value of the management target counter is "3". When the current management target is the high frequency support mode, it is determined whether or not the high frequency support mode has ended, the value of the management target counter is "2", and the current management target is the front door frame 14. In that case, it is determined whether or not the front door frame 14 is in the closed state. When an opportunity to switch the output state of the signal corresponding to the value of the managed counter to the LOW level has occurred (step S1009: YES), the output state of the signal corresponding to the value of the managed counter is set to the LOW level (step S1009: YES). Step S1010).

When a negative determination is made in step S1004, when the process of step S1006 is executed, when a negative determination is made in step S1007, when the process of step S1008 is executed, when a negative determination is made in step S1009, or in step When the process of S1010 is executed, the value of the managed counter of the main RAM 65 is subtracted by 1 (step S1011). Then, it is determined whether or not the value of the managed target counter after the subtraction of 1 is "0" (step S1012). When the value of the management target counter is 1 or more (step S1012: NO), the processes after step S1002 are executed for the management target corresponding to the value of the new management target counter.

Next, the history setting process executed by the management CPU 112 will be described with reference to the flowchart of FIG. The history setting process is executed in step S908 of the management process (FIG. 23).

First, the number of buffers to be confirmed by the management CPU 112 among the first to 14th buffers 122a to 122n is set in the confirmation target counter provided in the management side RAM 114 (step S1101). Specifically, the number of correspondence-related areas in the correspondence-relationship memory 116 in which information other than the information indicating that the correspondence-related areas 123a to 123n are blank is stored is specified, and the identification thereof is specified. Set the information of the specified number in the confirmation target counter. In the pachinko machine 10, information other than the information indicating that the pachinko machine 10 is blank is stored in the first to eleventh correspondence areas 123a to 123k as described above. Therefore, in step S1101, "11" is set in the confirmation target counter. do.

After that, it is confirmed whether or not the numerical information stored in the buffer corresponding to the value of the current confirmation target counter among the first to 14th buffers 122a to 122n has been changed from "0" to "1". Then, it is determined whether or not the output state of the input signal from the main CPU 63 to the buffer has been switched from the LOW level to the HI level (step S1102). When the value of the confirmation target counter is "n", the nth buffers 122a to 122n are the confirmation targets of the numerical information. For example, if the value of the confirmation target counter is "11", the 11th buffer 122k is the confirmation target of the numerical information, and if the value of the confirmation target counter is "5", the 5th buffer 122e is the confirmation target of the numerical information. ..

If an affirmative determination is made in step S1102, the RTC information which is the date information and the time information is read from the RTC 115 (step S1103). Then, the writing process to the history memory 117 is executed (step S1104). In the writing process, the pointer information of the history area 124 currently being written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S1103 is written in the history information storage area 125 of the history area 124. Further, the correspondence relation information is read from the correspondence relation areas 123a to 123n corresponding to the value of the current confirmation target counter, and the correspondence relation information is written in the history information storage area 125 corresponding to the pointer information to be written. Further, when the correspondence information is any one of the information indicating that the opening / closing execution mode is set, the information indicating that the high frequency support mode is set, and the information indicating that the front door frame 14 is set, the above Not only the correspondence information but also the start information is written in the history information storage area 125 corresponding to the pointer information to be written. When the value of the confirmation target counter is "n", the nth correspondence-related areas 123a to 123n are the targets for reading the correspondence-related information. For example, if the value of the confirmation target counter is "11", the 11th correspondence area 123k is the target for reading the correspondence information, and if the value of the confirmation target counter is "5", the 5th correspondence area 123e is the correspondence. Information is to be read out.

By executing the writing process as described above, the value of the counter to be confirmed is any one of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, the second operating port 34, and the game times. In the case of, the RTC information, the out port 24a, the general winning opening 31, the special electric winning device 32, the first operating port 33, and the second operating port 33 are stored in the history information storage area 125 corresponding to the pointer information to be written. The combination of the operation port 34 and the correspondence information indicating that the game is played is stored as history information. Further, when the value of the confirmation target counter is any of the open / close execution mode, the high frequency support mode, and the front door frame 14, the RTC information is stored in the history information storage area 125 corresponding to the pointer information to be written. The combination of the correspondence information indicating that the mode is one of the open / close execution mode, the high frequency support mode, and the front door frame 14 and the start information is stored as history information.

After that, the update process of the target pointer is executed (step S1105). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the 1 addition exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after 1 addition is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

When a negative determination is made in step S1102, or when the process of step S1105 is executed, whether or not the signal output has been switched to the LOW level is determined in the corresponding related areas 123a to 123n corresponding to the values of the current confirmation target counters. It is determined whether or not the correspondence information to be confirmed is stored (step S1106). Specifically, when the value of the current confirmation target counter is "8" to "10", the corresponding correspondence areas 123h to 123j are provided with information indicating that the opening / closing execution mode is used, and the high frequency support mode is used. Since either the information indicating that the door frame is present or the information indicating that the front door frame 14 is stored is stored, an affirmative determination is made in step S1106.

When an affirmative determination is made in step S1106, the numerical information stored in the buffer corresponding to the value of the current confirmation target counter among the first to 14th buffers 122a to 122n is changed from "1" to "0". By confirming whether or not the buffer has been output, it is determined whether or not the output state of the input signal from the main CPU 63 to the buffer has been switched from the HI level to the LOW level (step S1107). If an affirmative determination is made in step S1107, the RTC information is read out in the same manner as in step S1103 (step S1108), and the writing process to the history memory 117 is further executed (step S1109). In the writing process, the RTC information read in step S1108 is written in the history information storage area 125 of the history area 124 corresponding to the pointer information to be written. Further, the correspondence relation information is read from the correspondence relation areas 123a to 123n corresponding to the value of the current confirmation target counter, and the correspondence relation information is written in the history information storage area 125 corresponding to the pointer information to be written. Further, not only the correspondence information but also the end information is written in the history information storage area 125 corresponding to the pointer information to be written. By executing the writing process in this way, when the value of the confirmation target counter is any of the open / close execution mode, the high frequency support mode, and the front door frame 14, the pointer information to be written is supported. In the history information storage area 125 to be stored, a combination of RTC information, correspondence information indicating that the mode is one of the open / close execution mode, the high frequency support mode, and the front door frame 14, and the end information is stored as history information. It will be in the state of being done. After that, the update process of the target pointer is executed in the same manner as in step S1105 (step S1110).

When a negative determination is made in step S1106, a negative determination is made in step S1107, or the process of step S1110 is executed, the value of the confirmation target counter of the management side RAM 114 is subtracted by 1 (step S1111). Then, it is determined whether or not the value of the confirmation target counter after the subtraction of 1 is "0" (step S1112). When the value of the confirmation target counter is 1 or more (step S1112: NO), the processing after step S1102 is executed for the confirmation target corresponding to the value of the new confirmation target counter.

Next, the state in which the history information is stored in the history memory 117 will be described with reference to the time chart of FIG. 27. FIG. 27 (a) shows the period during which the HI level signal is input to any of the first to seventh and eleventh buffers 122a to 122g and 122k, and FIG. 27 (b) shows the HI level in the eighth buffer 122h. 27 (c) shows the period during which the HI level signal is input to the ninth buffer 122i, and FIG. 27 (d) shows the period during which the HI level signal is input to the tenth buffer 122j. 27 (e) shows the timing of writing the history information to the history memory 117.

At the timing of t1, as shown in FIG. 27A, the output state of the signal input to any of the first to seventh and eleventh buffers 122a to 122g and 122k is switched from the LOW level to the HI level. Therefore, the history information is written in the history memory 117 at the timing of t1 as shown in FIG. 27 (e). After that, at the timing of t2, as shown in FIG. 27 (a), the signal switched to the HI level at the timing of t1 is switched to the LOW level. However, since the signal is a signal input to any of the first to seventh and eleventh buffers 122a to 122g and 122k and the switching of the LOW level is not the storage target of the history information, the t2 At the timing, as shown in FIG. 27 (e), the writing of the history information is not executed.

After that, at the timing of t3, the timing of t5, the timing of t6, the timing of t9, the timing of t10, the timing of t13 and the timing of t14, as shown in FIG. The output state of the signal input to any of the 11 buffers 122a to 122g and 122k is switched from the LOW level to the HI level. Therefore, history information is written at each of these timings as shown in FIG. 27 (e).

As shown in FIG. 27B, the output state of the signal input to the eighth buffer 122h becomes the HI level from the timing of t4 to the timing of t7. The eighth buffer 122h corresponds to the presence / absence of the open / close execution mode. Therefore, as shown in FIG. 27 (e), the timing of t4, which is the timing at which the output state of the signal input to the eighth buffer 122h is switched to the HI level, and the timing at which the output state of the signal is switched to the LOW level. History information is written at each of the timings of t7. In this case, the history information written at the timing of t4 includes the start information, and the history information written at the timing of t7 includes the end information. As a result, it is possible to grasp the execution period of the open / close execution mode by checking the history information of the history memory 117.

Further, history information is written in the history memory 117 in the order of passage of time. Therefore, is the history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 in the open / close execution mode? It is possible to distinguish whether or not. Further, since the history information includes RTC information, any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 can be compared by comparing the RTC information. It is possible to distinguish whether or not the history information indicating that the ball has entered the slot is in the open / close execution mode.

As shown in FIG. 27 (c), the output state of the signal input to the ninth buffer 122i becomes the HI level from the timing of t8 to the timing of t11. The ninth buffer 122i corresponds to the presence or absence of the occurrence of the high frequency support mode. Therefore, as shown in FIG. 27 (e), the timing of t8, which is the timing at which the output state of the signal input to the ninth buffer 122i is switched to the HI level, and the timing at which the output state of the signal is switched to the LOW level. History information is written at each of the timings of t11. In this case, the history information written at the timing of t8 includes the start information, and the history information written at the timing of t11 includes the end information. As a result, it is possible to grasp the execution period of the high-frequency support mode by checking the history information of the history memory 117.

Further, history information is written in the history memory 117 in the order of passage of time. Therefore, the history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is in the high frequency support mode. It is possible to distinguish whether or not. Further, since the history information includes RTC information, any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 can be compared by comparing the RTC information. It is possible to distinguish whether or not the history information indicating that the ball has entered the ball is in the high frequency support mode.

As shown in FIG. 27 (d), the output state of the signal input to the 10th buffer 122j becomes the HI level from the timing of t12 to the timing of t15. The tenth buffer 122j corresponds to whether or not the front door frame 14 is opened. Therefore, as shown in FIG. 27 (e), the timing of t12, which is the timing at which the output state of the signal input to the 10th buffer 122j is switched to the HI level, and the timing at which the output state of the signal is switched to the LOW level. History information is written at each of the timings of t15. In this case, the history information written at the timing of t12 includes the start information, and the history information written at the timing of t15 includes the end information. As a result, it is possible to grasp the period during which the front door frame 14 is in the open state by checking the history information of the history memory 117.

Further, history information is written in the history memory 117 in the order of passage of time. Therefore, the history information indicating that a ball has entered any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is being opened in the front door frame 14. It is possible to distinguish whether it is a thing or not. Further, since the history information includes RTC information, any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 can be compared by comparing the RTC information. It is possible to distinguish whether or not the history information indicating that the ball has entered the door is the one in which the front door frame 14 is open.

Next, the output processing of the set value update signal executed when the setting state of the pachinko machine 10 is set by the main CPU 63 will be described. FIG. 28 is a flowchart showing an output process of a set value update signal executed by the main CPU 63. The output process of the set value update signal is executed in step S119 in the main process (FIG. 9).

A value corresponding to the set value of the pachinko machine 10 set this time is set in the pulse number counter provided in the main RAM 65 (step S1201). Specifically, the value of the set value counter of the main RAM 65 is set in the pulse number counter. After that, it is determined whether or not the set value update signal directed to the management side CPU 112 is at the HI level (step S1202). As described above, the set value update signal is input to the 15th buffer 122o of the input port 121 in the management IC 66. Here, the output process of the set value update signal is a process for causing the management CPU 112 to specify the type of the signal input to the first to 14th buffers 122a to 122n of the input port 121 in the main process (FIG. 9). It is executed at a timing before a certain recognition process. On the other hand, the input of the set value update signal to the 15th buffer 122o is set in the management IC 66 at the design stage of the pachinko machine 10, so that the set value update signal is output before the recognition process. Even if the processing is executed, it is possible for the management CPU 112 to specify that the signal input to the 15th buffer 122o is the set value update signal.

When a negative determination is made in step S1202, the value of the LOW level counter provided in the main RAM 65 is subtracted by 1 (step S1203), and whether or not the value of the LOW level counter after the subtraction is "0" is set. (Step S1204). The LOW level counter is a counter for the main CPU 63 to specify whether or not the set value update signal is maintained at the LOW level for a predetermined period while a plurality of pulses at which the set value update signal becomes the HI level are output. Is. When the value of the LOW level counter is "0" (step S1204: YES), it means that it is time to set the set value update signal to the HI level, so that the set value update signal is set to the HI level. Set (step S1205).

After that, "20" is set in the HI level counter provided in the main RAM 65 (step S1206). The HI level counter is a counter for the main CPU 63 to specify the period for maintaining the set value update signal at the HI level. Since the value set in the HI level counter is decremented by 1 in a cycle of about 10 microseconds, the set value update signal is maintained at the HI level for 200 microseconds when one pulse is output. This HI level maintenance period is a sufficient period for the management CPU 112 to specify that the set value update signal has been changed from the LOW level to the HI level.

When the set value update signal is at the HI level (step S1202: YES), the value of the HI level counter of the main RAM 65 is subtracted by 1 (step S1207), and the value of the HI level counter after the subtraction is "0". It is determined whether or not it is (step S1208). When the value of the HI level counter is "0" (step S1208: YES), it means that it is time to set the set value update signal to the LOW level, so the set value update signal is set to the LOW level. Set (step S1209).

After that, the value of the pulse number counter of the main RAM 65 is subtracted by 1 (step S1210), and it is determined whether or not the value of the pulse number counter after the 1 subtraction is "0" (step S1211). When the value of the pulse number counter is not "0" (step S1211: NO), the output of the pulse signal by the set value update signal for the number corresponding to the set value of the pachinko machine 10 set this time is completed. Since it means that there is no such thing, "20" is set in the LOW level counter of the main RAM 65 (step S1212). Since the value set in the LOW level counter is decremented by 1 in a cycle of about 10 microseconds, the value is maintained at the LOW level for 200 microseconds between a plurality of pulse outputs by the set value update signal. This LOW level maintenance period is a sufficient period for the management CPU 112 to specify that the set value update signal has been changed from the HI level to the LOW level.

When the value of the pulse number counter is "0" (step S1211: YES), the output of the pulse signal by the set value update signal for the number corresponding to the set value of the pachinko machine 10 set this time is completed. Therefore, the output process of the set value identification end command is executed (step S1213). The set value identification end command is a command for causing the management side CPU 112 to recognize that the output of the set value update signal for causing the management side CPU 112 to recognize the set value of the pachinko machine 10 set this time is completed. When outputting the set value identification end command, the first to eighth signals input to the first to eighth buffers 122a to 122h are used in the same manner as the identification start command, the type identification command, and the identification end command. However, the signal pattern of the set value identification end command is different from the identification start command, the type identification command, and the identification end command.

As described above, in the output processing of the set value update signal, the pulse signal by the set value update signal for several minutes corresponding to the set value of the pachinko machine 10 set at the start of the supply of the operating power this time is output to the management IC 66. do. The management side CPU 112 grasps the number of pulse signals by the set value update signal by executing the setting update recognition process, and grasps the set value of the pachinko machine 10 set this time based on the number of pulse signals.

FIG. 29 is a flowchart showing a setting update recognition process executed by the management side CPU 112. The setting update recognition process is executed in step S902 of the management process (FIG. 23).

It is determined whether or not the set value update signal input to the 15th buffer 122o of the input port 121 has switched from the LOW level to the HI level (step S1301). When an affirmative determination is made in step S1301, the value of the set value grasping counter provided in the management side RAM 114 is set to "1" (step S1302). The set value grasping counter is a counter for specifying the set value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the set value grasping counter is "1", it means "setting 1". If the value of the set value grasping counter is "6", it means that it is "setting 6".

After that, it is determined whether or not the set value update signal input to the 15th buffer 122o of the input port 121 has been switched from the LOW level to the HI level again (step S1303). When an affirmative determination is made in step S1303, the value of the set value grasping counter of the management side RAM 114 is added by 1 (step S1304). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

When a negative determination is made in step S1303 or when the process of step S1304 is executed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , It is determined whether or not the set value identification end command has been received from the main CPU 63 (step S1305). If a negative determination is made in step S1305, the process returns to step S1303.

When an affirmative determination is made in step S1305, the RTC information which is the date information and the time information is read from the RTC 115 (step S1306). Then, the writing process to the history memory 117 is executed (step S1307). In the writing process, the pointer information of the history area 124 currently being written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S1306 is written in the history information storage area 125 of the history area 124. Further, both the information for identifying the set value and the value information of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 is newly set, the RTC information corresponding to the date and time when the setting is made, and the information of the set value when the setting is made The combination is stored as history information.

After that, the update process of the target pointer is executed (step S1308). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the 1 addition exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after 1 addition is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

When the setting state of the pachinko machine 10 is newly set by executing the setting update recognition process as described above, the setting is made, the date and time when the setting is made, and the setting state. The combination of the set values when the settings are made is stored in the history area 124 as history information. As a result, by reading and analyzing the information stored in the history memory 117 using the external device connected to the reading terminal 68d, the date and time when the setting state of the pachinko machine 10 is newly set and the setting can be set. It is possible to grasp the contents of the set value when it is performed.

Here, even if the setting state of the pachinko machine 10 is newly set, the information stored in the history memory 117 is maintained as it is. This makes it possible to prevent the history information of the history memory 117 from being deleted even if the setting state of the pachinko machine 10 is newly set, and the various parameters described later are the timing of changing the setting state of the pachinko machine 10. It is calculated using the history information that exists before and after. In this case, since the date and time when the setting state of the pachinko machine 10 is newly set as described above is stored in the history memory 117, an external device is connected to the reading terminal 68d and stored in the history memory 117. By reading the information, it is possible to calculate various parameters during the period after the setting state of the pachinko machine 10 is newly set and the setting state is maintained.

Next, the display output process executed by the management CPU 112 will be described with reference to the flowchart of FIG. The display output process is executed in step S909 of the management process (FIG. 23).

First, it is determined whether or not it is the calculation timing (step S1401). If 51 seconds have passed since the supply of the operating power to the management side CPU 112 was started, or if 51 seconds have passed since the previous affirmative determination was made in step S1401, an affirmative determination is made in step S1401. If an affirmative decision is made in step S1401, the number of various balls entered during normal times is calculated (step S1402). Specifically, first, in the history area 124 of the history memory 117, the number of the history information storage areas 125 in which the correspondence information indicating that the out port 24a is stored is counted, so that the out port 24a can be reached. Calculate the number of balls entered. Further, by counting the number of the history information storage area 125 in which the correspondence information indicating that the general winning opening 31 is stored in the history area 124 of the history memory 117, the ball is entered into the general winning opening 31. Calculate the number. Further, by counting the number of history information storage areas 125 in which the correspondence information indicating that the special electric winning device 32 is stored is stored in the history area 124 of the history memory 117, the ball is entered into the special electric winning device 32. Calculate the number. Further, by counting the number of the history information storage areas 125 in which the correspondence information indicating that the operation port 33 is the first operation port 33 is stored in the history area 124 of the history memory 117, the first operation port 33 can be reached. Calculate the number of balls entered. Further, by counting the number of the history information storage areas 125 in which the correspondence information indicating that the second operation port 34 is stored in the history area 124 of the history memory 117, the second operation port 34 can be reached. Calculate the number of balls entered.

After that, in the history area 124 of the history memory 117, the history information storage area 125 in which the correspondence information and the start information indicating that the front door frame 14 is stored and the correspondence relationship indicating that the front door frame 14 is present. By referring to the history information storage area 125 existing in the period between the history information storage area 125 in which the information and the end information are stored, the out port generated in the situation where the front door frame 14 is in the open state. The number of balls entered into each of the 24a, the general winning opening 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is calculated (step S1403). In the history area 124 of the history memory 117, the history information storage area 125 in which the correspondence information and the start information indicating that the front door frame 14 is stored, the correspondence information indicating that the front door frame 14 is stored, and the correspondence information indicating that the front door frame 14 is used. The period between the end information and the history information storage area 125 is calculated from the RTC information stored in the history information storage area 125. Further, in the entire pointer information that is a serial number, the history information storage area 125 in which the correspondence information and the start information indicating that the front door frame 14 is stored and the correspondence relationship indicating that the front door frame 14 is used. If there are a plurality of sections with the history information storage area 125 in which the information and the end information are stored, the total number of balls entered for each section is calculated. Further, although the history information storage area 125 in which the correspondence information and the start information indicating that the front door frame 14 is stored exists, the RTC information corresponding to the time after the history information storage area 125 is present. If the history information storage area 125 in which is stored does not store the correspondence information and the end information indicating that the front door frame 14 is stored, the correspondence information and the start information indicating that the front door frame 14 is stored are stored. All the history information of the history information storage area 125 in which the RTC information corresponding to the time after the history information storage area 125 is stored is treated as if the front door frame 14 is in the open state.

After that, various parameters are calculated using the calculation results of steps S1402 and S1403 (step S1404). Specifically, first, from each number of balls entered in step S1402, the number of balls entered while the front door frame 14 calculated in step S1403 is open is subtracted. Then, the following first to eighth parameters are calculated by using each number of balls entered after the subtraction. The difference between the number of balls entered in the out port 24a calculated in step S1402 and the number of balls entered in the out port 24a calculated in step S1403 is defined as the number of balls entered K1, and the general winning opening 31 calculated in step S1402 is entered. The difference in the number of balls entered in the general winning opening 31 calculated in step S1403 with respect to the number of balls is defined as the number of balls entered K2, and the special electric winning device calculated in step S1403 with respect to the number of balls entered in the special electric winning device 32 calculated in step S1402. Let the difference in the number of balls entered in 32 be the number of balls K3, and the difference in the number of balls entered in the first operating port 33 calculated in step S1403 with respect to the number of balls entered in the first operating port 33 calculated in step S1402. The number of balls K4 is defined, and the difference between the number of balls entered in the second operating port 34 calculated in step S1402 and the number of balls entered in the second operating port 34 calculated in step S1403 is defined as the number of balls K5.
1st parameter: Total number of game balls to be paid out (K2 x "number of prize balls for winning the general winning opening 31" + K3 x "number of winning balls for winning the special electric winning device 32" + K4 x "first operating port 33""Number of prize balls for winning a prize" + K5 x "Number of prize balls for winning a prize in the second operating port 34") / Ratio of the total number of game balls discharged from the skill area PA (K1 + K2 + K3 + K4 + K5) D1 ")
-Second parameter: Total number of game balls entered into the general winning opening 31 K2 / Ratio of the total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) -Third parameter: Game balls to the special electric winning device 32 Total number of balls entered K3 / Ratio of total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) ・ Fourth parameter: Total number of game balls ejected into the first operating port 33 K4 / Discharged from the game area PA Ratio of the total number of game balls (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio is referred to as "D2")
Fifth parameter: Total number of game balls entering the second operating port 34 K5 / Ratio of the total number of game balls discharged from the game area PA (K1 + K2 + K3 + K4 + K5) (hereinafter, this ratio is referred to as "D3").
6th parameter: D1- (D2 x "number of prize balls for winning the first operating port 33" + D3 x "number of prize balls for winning the second operating port 34")
7th parameter: (K3 x "number of prize balls for winning the special electric winning device 32" + K5 x "number of prize balls for winning the second operating port 34") / total number of game balls paid out (K2 x "general""Number of prize balls for winning the prize opening 31" + K3 x "Number of prize balls for winning the special electric winning device 32" + K4 x "Number of prize balls for winning the first operating port 33" + K5 x "Number of prize balls for winning the first operating port 33" + K5 x "Second operating port 34" 8th parameter: K3 x "Number of prize balls for winning the special electric prize device 32" / Total number of game balls paid out (K2 x "For winning the general winning opening 31""Number of prize balls" + K3 x "Number of prize balls for winning the special electric winning device 32" + K4 x "Number of prize balls for winning the first operating port 33" + K5 x "Number of prize balls for winning the second operating port 34" ”) Ratio In step S1404, the first to eighth parameters, which are the calculation results, are stored in the normal time storage area in the calculation result memory 131. The first to eighth parameters stored in the normal storage area are stored and retained until the next step S1404 is executed. That is, when the next step S1404 is executed and the first to eighth parameters are calculated, the newly calculated first to eighth parameters are stored in the normal storage area. The previous calculation results of the first to eighth parameters stored in the normal storage area are overwritten.

After that, in the history area 124 of the history memory 117, the history information storage area 125 in which the correspondence information and the start information indicating the open / close execution mode are stored, the correspondence information indicating the open / close execution mode, and the correspondence information indicating that the open / close execution mode is set. By referring to the history information storage area 125 existing in the period between the history information storage area 125 in which the end information is stored, the out opening 24a and the general winning opening 31 that occur in the open / close execution mode. , The number of balls entered into each of the special electric winning device 32, the first operating port 33, and the second operating port 34 is calculated (step S1405). In the history area 124 of the history memory 117, the history information storage area 125 in which the correspondence information and the start information indicating the open / close execution mode are stored, and the correspondence information and the end information indicating the open / close execution mode are stored. The period between the history information storage area 125 and the history information storage area 125 is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, the history information storage area 125 in which the correspondence information and the start information indicating the open / close execution mode are stored, the correspondence information indicating the open / close execution mode, and the correspondence information indicating that the open / close execution mode is set. If there are a plurality of sections with the history information storage area 125 in which the end information is stored, the total number of balls in each section is calculated. Further, although there is a history information storage area 125 in which the correspondence information and the start information indicating that the open / close execution mode is stored exists, the RTC information corresponding to the time after the history information storage area 125 is available. If the stored history information storage area 125 does not store the correspondence information and the end information indicating that the open / close execution mode is set, the correspondence information and the start information indicating the open / close execution mode are stored. All the history information in the history information storage area 125 in which the RTC information corresponding to the time after the history information storage area 125 is stored is treated as in the open / close execution mode.

After that, during the period of the opening / closing execution mode specified in step S1405, the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the out port 24a, which occurred when the front door frame 14 was in the open state, The number of balls entering each of the second operating ports 34 is calculated (step S1406). The method of calculating the number of balls entered is the same as that of step S1403, except that the period of the opening / closing execution mode specified in step S1405 is premised.

After that, various parameters are calculated using the calculation results of steps S1405 and S1406 (step S1407). Specifically, first, from each number of balls entered in step S1405, the number of balls entered while the front door frame 14 calculated in step S1406 is open is subtracted. Then, the following 11th to 18th parameters are calculated by using each number of balls entered after the subtraction. The difference between the number of balls entered in the out port 24a calculated in step S1405 and the number of balls entered in the out port 24a calculated in step S1406 is defined as the number of balls K11, and the general winning opening 31 calculated in step S1405 is entered. The difference in the number of balls entered in the general winning opening 31 calculated in step S1406 with respect to the number of balls is defined as the number of balls K12, and the special electric winning device calculated in step S1406 with respect to the number of balls entered in the special electric winning device 32 calculated in step S1405. Let the difference in the number of balls entered in 32 be the number of balls K13, and the difference in the number of balls entered in the first operating port 33 calculated in step S1406 with respect to the number of balls entered in the first operating port 33 calculated in step S1405. The number of balls K14 is defined, and the difference between the number of balls entered in the second operating port 34 calculated in step S1405 and the number of balls entered in the second operating port 34 calculated in step S1406 is defined as the number of balls K15.
11th parameter: Total number of game balls to be paid out (K12 x "number of prize balls for winning the general winning opening 31" + K13 x "number of winning balls for winning the special electric winning device 32" + K14 x "first operating port 33""Number of prize balls for winning a prize" + K15 x "Number of prize balls for winning a prize in the second operating port 34") / Ratio of the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) D11 ")
・ 12th parameter: Total number of game balls entered into the general winning opening 31 K12 / Ratio of the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) ・ 13th parameter: Game ball to the special electric winning device 32 Total number of balls entered K13 / ratio of the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) ・ 14th parameter: Total number of game balls ejected into the first operating port 33 K14 / ejected from the game area PA Ratio of the total number of game balls (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio is referred to as "D12").
Fifteenth parameter: Total number of game balls entering the second operating port 34 K15 / Ratio of the total number of game balls discharged from the game area PA (K11 + K12 + K13 + K14 + K15) (hereinafter, this ratio is referred to as "D13").
16th parameter: D11- (D12 x "number of prize balls for winning the first operating port 33" + D13 x "number of prize balls for winning the second operating port 34")
17th parameter: (K13 x "Number of prize balls for winning the special electric winning device 32" + K15 x "Number of winning balls for winning the second operating port 34") / Total number of game balls paid out (K12 x "General""Number of prize balls for winning in the winning opening 31" + K13 x "Number of winning balls for winning in the special electric winning device 32" + K14 x "Number of winning balls for winning in the first operating port 33" + K15 x "Number of winning balls for winning in the first operating port 33" + K15 x "Second operating port 34" Percentage of prize balls for winning a prize) ・ 18th parameter: K13 x "Number of prize balls for winning a special electric prize device 32" / Total number of game balls paid out (K12 x "For winning a prize in the general winning opening 31""Number of prize balls" + K13 x "Number of prize balls for winning the special electric winning device 32" + K14 x "Number of prize balls for winning the first operating port 33" + K15 x "Number of winning balls for winning the second operating port 34" ”) Ratio In step S1407, the above 11th to 18th parameters, which are calculation results, are stored in the storage area for open / close execution mode in the calculation result memory 131. The 11th to 18th parameters stored in the storage area for the open / close execution mode are stored and retained until the next step S1407 is executed. That is, when the next step S1407 is executed and the 11th to 18th parameters are calculated, the newly calculated 11th to 18th parameters are stored in the storage area for the open / close execution mode. , The previous calculation results of the 11th to 18th parameters stored in the storage area for the open / close execution mode are overwritten.

After that, the history information storage area 125 in which the correspondence information and the start information indicating that the high frequency support mode is set in the history area 124 of the history memory 117 and the correspondence relationship indicating that the high frequency support mode is set are stored. By referring to the history information storage area 125 existing in the period between the history information storage area 125 in which the information and the end information are stored, the out port 24a generated in the high frequency support mode, general The number of balls entered into each of the winning opening 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 is calculated (step S1408). The history information storage area 125 in which the correspondence information and the start information indicating that the high frequency support mode is set in the history area 124 of the history memory 117, the correspondence information indicating that the high frequency support mode is set, and the correspondence information indicating that the high frequency support mode is set are stored. The period between the end information and the history information storage area 125 is calculated from the RTC information stored in the history information storage area 125. In addition, in the entire pointer information that is a serial number, the history information storage area 125 in which the correspondence information and the start information indicating that the high frequency support mode is stored and the correspondence relationship indicating that the high frequency support mode is used are provided. If there are a plurality of sections with the history information storage area 125 in which the information and the end information are stored, the total number of balls entered for each section is calculated. Further, although there is a history information storage area 125 in which correspondence information and start information indicating that the high frequency support mode is stored exists, RTC information corresponding to a time after the history information storage area 125 is present. If the history information storage area 125 in which is stored does not store the correspondence information and the end information indicating that the high frequency support mode is set, the correspondence information and the start information indicating that the high frequency support mode is stored are stored. All the history information of the history information storage area 125 in which the RTC information corresponding to the time after the history information storage area 125 is stored is treated as in the high frequency support mode.

After that, during the period of the high frequency support mode specified in step S1408, the out port 24a, the general winning port 31, the special electric winning device 32, and the first operating port 33 that occurred when the front door frame 14 was in the open state. And the number of balls entering each of the second operating ports 34 is calculated (step S1409). The method of calculating the number of balls entered is the same as that of step S1403, except that the period of the high frequency support mode specified in step S1408 is premised.

After that, various parameters are calculated using the calculation results of steps S1408 and S1409 (step S1410). Specifically, first, each number of balls entered while the front door frame 14 calculated in step S1409 is open is subtracted from each number of balls entered calculated in step S1408. Then, the following 21st to 26th parameters are calculated by using each number of balls entered after the subtraction. The difference between the number of balls entered in the out port 24a calculated in step S1408 and the number of balls entered in the out port 24a calculated in step S1409 is defined as the number of balls K21, and the general winning opening 31 calculated in step S1408 is entered. The difference in the number of balls entered in the general winning opening 31 calculated in step S1409 with respect to the number of balls is defined as the number of balls K22, and the special electric winning device calculated in step S1409 with respect to the number of balls entered in the special electric winning device 32 calculated in step S1408. Let the difference in the number of balls entered in 32 be the number of balls K23, and the difference in the number of balls entered in the first operating port 33 calculated in step S1409 with respect to the number of balls entered in the first operating port 33 calculated in step S1408. The number of balls K24 is defined, and the difference between the number of balls entered in the second operating port 34 calculated in step S1408 and the number of balls entered in the second operating port 34 calculated in step S1409 is defined as the number of balls K25.
21st parameter: Total number of game balls to be paid out (K22 x "number of prize balls for winning the general winning opening 31" + K23 x "number of winning balls for winning the special electric winning device 32" + K24 x "first operating port 33""Number of prize balls for winning a prize" + K25 x "Number of prize balls for winning a prize in the second operating port 34") / Ratio of the total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) D11 ")
22nd parameter: Total number of game balls entered into the general winning opening 31 K22 / Ratio of total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) ・ 23rd parameter: Game ball to the special electric winning device 32 Total number of balls entered K23 / ratio of the total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) ・ 24th parameter: Total number of game balls ejected into the first operating port 33 K24 / ejected from the game area PA Ratio of the total number of game balls (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio is referred to as "D22").
25th parameter: Total number of game balls entering the second operating port 34 K25 / Ratio of the total number of game balls discharged from the game area PA (K21 + K22 + K23 + K24 + K25) (hereinafter, this ratio is referred to as "D23").
26th parameter: D21- (D22 x "number of prize balls for winning the first operating port 33" + D23 x "number of prize balls for winning the second operating port 34")
In step S1410, the 21st to 26th parameters, which are the calculation results, are stored in the high frequency support mode storage area in the calculation result memory 131. The 21st to 26th parameters stored in the high frequency support mode storage area are stored and retained until the next step S1410 is executed. That is, when the next step S1410 is executed and the 21st to 26th parameters are calculated, the newly calculated 21st to 26th parameters are stored in the storage area for the high frequency support mode. Then, the calculation result of the previous 21st to 26th parameters stored in the storage area for the high frequency support mode is overwritten.

After that, the frequency of occurrence of the open / close execution mode is calculated and stored (step S1411). Specifically, the open / close execution mode is obtained by counting the number of the history information storage areas 125 in which the correspondence information and the start information indicating that the open / close execution mode is set are stored in the history area 124 of the history memory 117. Calculate the number of occurrences of. Further, the number of occurrences of the game times is calculated by counting the number of the history information storage areas 125 in which the correspondence information indicating the start of the game times is stored in the history area 124 of the history memory 117. .. Then, the number of occurrences of the open / close execution mode per unit game round is calculated. The number of occurrences of the open / close execution mode is defined as the number of occurrences K31, and the number of occurrences of the game round is defined as the number of occurrences K32.
-31st parameter: K31 / K32
In step S1411, the 31st parameter, which is the calculation result, is stored in the open / close execution mode frequency storage area in the calculation result memory 131. The 31st parameter stored in the open / close execution mode frequency storage area is stored and retained until the next step S1411 is executed. That is, when the next step S1411 is executed and the 31st parameter is calculated, the newly calculated 31st parameter is stored in the open / close execution mode frequency storage area, so that the open / close execution mode is up to that point. The previous calculation result of the 31st parameter stored in the frequency storage area is overwritten.

After that, the frequency of occurrence of the high frequency support mode is calculated and stored (step S1412). Specifically, by counting the number of the history information storage area 125 in which the correspondence information and the start information indicating that the high frequency support mode is set in the history area 124 of the history memory 117 are stored, the frequency is high. Calculate the number of times the support mode has occurred. Further, the number of occurrences of the game times is calculated by counting the number of the history information storage areas 125 in which the correspondence information indicating the start of the game times is stored in the history area 124 of the history memory 117. .. Then, the ratio of the number of occurrences of the high-frequency support mode to the number of occurrences of the open / close execution mode and the number of occurrences of the high-frequency support mode per unit game round is calculated. The number of occurrences of the high-frequency support mode is defined as the number of occurrences K41, the number of occurrences of game rounds is defined as the number of occurrences K42, and the number of occurrences of the open / close execution mode calculated in step S1411 is defined as the number of occurrences K43.
-41st parameter: K41 / K42
-42nd parameter: K41 / K43
In step S1412, the 41st to 42nd parameters, which are the calculation results, are stored in the high frequency support mode frequency storage area in the calculation result memory 131. The 41st to 42nd parameters stored in the high frequency support mode frequency storage area are stored and retained until the next step S1412 is executed. That is, when the next step S1412 is executed and the 41st to 42nd parameters are calculated, the newly calculated 41st to 42nd parameters are stored in the high frequency support mode frequency storage area. Then, the calculation result of the previous 41st to 42nd parameters stored in the high frequency support mode frequency storage area is overwritten.

When a negative determination is made in step S1401 or when the process of step S1412 is executed, the display process is executed (step S1413). FIG. 31 is a flowchart showing the display processing.

First, the value of the update timing counter provided in the management side RAM 114 is subtracted by 1 (step S1501). The update timing counter is a counter for the management side CPU 112 to specify that it is the timing to update the display contents of the management result of the game history in the first to third notification display devices 69a to 69c. The management side CPU 112 displays and controls the first to third notification display devices 69a to 69c to display and control the first to eighth parameters, the eleventh to eighteenth parameters, the 21st to 26th parameters, and the 31st. Notify the parameters and the calculation results of the 41st to 42nd parameters. In this case, the information corresponding to the type of the parameter to be notified is displayed on the first notification display device 69a. Further, among the values obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the ones place is displayed for the third notification. It is displayed on the device 69c. Then, in the 1st to 3rd notification display devices 69a to 69c, the 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter and the 41st to 41st parameters are used. The display corresponding to the calculation result of the 42nd parameter is sequentially switched according to a predetermined order, and after the calculation result of the 42nd parameter, which is the display target of the last order, is displayed, the display target of the first order is displayed. The calculation result of one parameter is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 2 seconds.

Here, the calculation cycle of the various parameters on the management side CPU 112 is 51 seconds. On the other hand, the number of various parameters is 25, and the period during which the calculation result of one parameter is continuously displayed is 2 seconds. Therefore, the various parameters calculated by the management side CPU 112 are to be displayed on the first to third notification display devices 69a to 69c at least once.

When the process of step S1501 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether or not the value of the update timing counter after 1 subtraction is "0". It is determined whether or not it is time to perform the operation (step S1502). When an affirmative determination is made in step S1502, the value of the display target counter provided in the management side RAM 114 is added by 1 (step S1503). Then, when the value of the display target counter after 1 addition exceeds the maximum value "24" (step S1504: YES), the value of the display target counter is cleared to "0" (step S1505).

The display target counter is a counter for the management side CPU 112 to specify the type of the parameter to be displayed in the first to third notification display devices 69a to 69c. The 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter, the 41st to 42nd parameters, and the counters to be displayed of "0" to "24". There is a one-to-one correspondence with the possible values. For example, when the value of the display target counter is "0", the first parameter to be displayed first becomes the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is "24". If, the 42nd parameter, which is the last display target, is the display target of the first to third notification display devices 69a to 69c.

When a negative determination is made in step S1504 or when the process of step S1505 is executed, the first notification display device 69a is displayed so that the information corresponding to the parameter type corresponding to the value of the display target counter is displayed. Control (step S1506). Further, the parameter corresponding to the value of the display target counter is read from the calculation result memory 131, the read parameter is multiplied by 100, and the number corresponding to the tens digit is displayed on the second notification display device 69b. The number corresponding to the ones digit is displayed on the third notification display device 69c (step S1507). The contents displayed on the first to third notification display devices 69a to 69c in steps S1506 and S1507 are continued until the next update timing or until the supply of operating power to the management side CPU 112 is stopped. NS. After that, a value corresponding to 2 seconds is set in the update timing counter of the management side RAM 114 as a value corresponding to the next update timing (step S1508).

When the supply of operating power to the management side CPU 112 is started by executing the display processing as described above, the management result of the game history is displayed on the first to third notification display devices 69a to 69c. Will be done. The management result of the game history is displayed regardless of whether or not the game is continued, and the game machine main body 12 is opened with respect to the outer frame 11 to open the main control device 60 from the front of the pachinko machine 10. It is done regardless of whether it is visible or not. By making the display control of the first to third notification display devices 69a to 69c executed regardless of the game situation and the state of the pachinko machine 10, the first to third notification display devices 69a It is possible to simplify the processing configuration for controlling the display of ~ 69c.

The display of the management result of the game history on the first to third notification display devices 69a to 69c is started after the supply of the operating power to the management side CPU 112 is started and after the identification end command is received from the main side CPU 63. Will be done. In this case, the information stored in the calculation result memory 131 is stored and retained even when the supply of operating power to the pachinko machine 10 is stopped, similar to the information stored in the history memory 117. Therefore, when the supply of the operating power to the management side CPU 112 is started, the management result of the game history calculated before the supply of the operating power to the management side CPU 112 is stopped is displayed.

When the setting state of the pachinko machine 10 is set when the supply of operating power to the main CPU 63 is started, the information corresponding to the set value being changed is displayed on the third notification display device 69c. However, while the information corresponding to the set value is displayed before the identification end command is transmitted from the main CPU 63, the game history in the first to third notification display devices 69a to 69c The display of the management result of is started after the identification end command is transmitted from the main CPU 63. As a result, even if the third notification display device 69c is also configured as a display device for displaying information corresponding to the set value and displaying the management result of the game history, the display of these displays is performed. It is possible to prevent the periods from overlapping.

Further, when the information corresponding to the set value is displayed, the first notification display device 69a and the second notification display device 69b are hidden. On the other hand, when the management result of the game history is displayed, the first notification display device 69a and the second notification display device 69b are not hidden. This makes it possible to identify which of the information corresponding to the set value and the management result of the game history is displayed on the third notification display device 69c.

Next, the processing configuration for outputting the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 to an external device electrically connected to the reading terminal 68d of the MPU 62. explain. FIG. 32A is a flowchart showing a data output process executed by the main CPU 63. The data output process is executed in step S112 in the main process (FIG. 9).

In the data output process, first, it is determined whether or not a connection signal indicating that an external device is electrically connected to the reading terminal 68d is received from the reading terminal 68d (step S1601). If a negative determination is made in step S1601, the data output process is terminated as it is. In this case, in order to execute the data output process, it is necessary to restart the supply of the operating power to the main CPU 63. As a result, in order to externally output the history information and various parameters, the supply of operating power to the main CPU 63 is started with the external device electrically connected to the reading terminal 68d. Need to be. Since the power switch for stopping and starting the supply of operating power to the main CPU 63 is provided in the payout mechanism 73 mounted on the back of the back pack unit 15, these stop and start operations can be performed. In order to do so, it is necessary to open the gaming machine main body 12 with respect to the outer frame 11 to expose the back surface of the back pack unit 15. Under such circumstances, in order to externally output the history information and various parameters, the supply of operating power to the main CPU 63 is started with the external device electrically connected to the reading terminal 68d. By making the configuration necessary, even if an operation for reading the history information and various parameters is performed by a person other than the manager of the game hall, it is possible to make it difficult to perform the operation.

When an affirmative determination is made in step S1601, it is determined whether or not a control information confirmation signal is being received from the reading terminal 68d, so that the connection of the external device to the reading terminal 68d this time is the main ROM 64. It is determined whether or not it corresponds to the confirmation of the control information (program and data) of (step S1602). The external device has a configuration that allows both confirmation of control information and confirmation of history information and various parameters. If confirmation of control information is selected by manual operation on the external device, the external device can be used. A signal for confirming control information is transmitted, and when confirmation of history information and various parameters is selected by a manual operation on the external device, a signal for confirming history is transmitted from the external device. The configuration is not limited to this, and the external device for checking the control information and the external device for checking the history may be separate. In this case, if an external device for checking control information is electrically connected to the reading terminal 68d, a signal for checking control information is transmitted from the external device, and an external device for checking history is sent to the reading terminal 68d. When the device is electrically connected, a history confirmation signal is transmitted from the external device.

If an affirmative determination is made in step S1602, output processing for confirming control information is executed (step S1603). In the output process, the program and data are read as control information from the main ROM 64, and the read control information is output to the reading terminal 68d. As a result, the control information can be read by an external device electrically connected to the reading terminal 68d, and it is confirmed whether or not the control information is legitimate or normal. Can be done.

If a negative determination is made in step S1602, an output instruction signal is transmitted to the management side CPU 112 (step S1604). Specifically, the output state of the output instruction signal is switched from the LOW level to the HI level. This HI level output state is continued for a specific period of time. This specific period is a period sufficient for the management CPU 112 to specify that the HI level output instruction signal is input to the 16th buffer 122p. When the output state of the output instruction signal is switched to the HI level, the management side CPU 112 executes a process for outputting history information.

Specifically, as shown in the flowchart of FIG. 32B, when the management side CPU 112 switches the output state of the output instruction signal input to the 16th buffer 122p of the input port 121 from the LOW level to the HI level. (Step S1701: YES), the history information stored in the history memory 117 and various parameters stored in the calculation result memory 131 are read, and the read history information and various parameters are output to the reading terminal 68d. (Step S1702). As a result, the history information and various parameters can be read by the external device electrically connected to the reading terminal 68d, and the information of the management result of the game history can be analyzed. Further, when the management side CPU 112 outputs the history information to the reading terminal 68d, the history memory 117 is cleared to "0" (step S1703). The history information in the history memory 117 is deleted only when the history information is read by an external device.

Returning to the description of the data output process (FIG. 32 (a)), when the process of step S1603 is executed or the process of step S1604 is executed, the electrical connection of the external device to the reading terminal 68d continues. It is determined whether or not it has been performed (step S1605). If it is continued (step S1605: YES), it waits in step S1605 as it is. As a result, it is possible to prevent the processes set in the execution order after the data output process from being executed until the connection of the external device to the read terminal 68d is released. When the connection of the external device to the reading terminal 68d is disconnected (step S1605: NO), the data output process ends.

According to the present embodiment described in detail above, the following excellent effects are obtained.

When a game ball enters any of the general winning opening 31, the special electric winning device 32, the first operating port 33, and the second operating port 34, the game ball is paid out, so that the player can use any of these entry sections. The game will be played while expecting the game ball to enter the ball. In this configuration, the game ball enters any of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 (hereinafter, also referred to as a history target ball entry section). When the occurrence occurs, the corresponding history information is stored in the history memory 117 of the management IC 66. As a result, the pachinko machine 10 can store and retain information for managing the number of game balls entered into each history target entry portion or the entry frequency, and this managed information is used. This makes it possible to appropriately manage the entry mode of the game ball into each history target entry section. Further, since the history information is stored and retained by the pachinko machine 10 itself, it is possible to prevent unauthorized access and unauthorized modification of the history information.

All the ball entry units that discharge the game ball from the game area PA are subject to execution of the memory processing of the history information and are subject to management using the history information. As a result, it becomes possible to manage the ball entry frequency for any history target ball entry unit by using the history information. Further, it is possible to manage the ratio of the number of game balls to each history target ball to the number of game balls discharged from the game area PA by using the history information.

The history information includes RTC information which is information corresponding to the timing when the game ball enters the history target ball entry portion which triggered the storage of the history information. As a result, by using the history information, it is possible to grasp in detail the ball entry history of the game ball into the history target ball entry section.

In the history memory 117, not only the history information corresponding to the entry of the game ball into the history target entry portion, but also the history information indicating whether or not the opening / closing execution mode is in the open / closed execution mode, and the high frequency support mode are in progress. History information indicating whether or not the door frame 14 is open and history information indicating whether or not the front door frame 14 is open are stored. As a result, it is possible to distinguish whether or not each of these situations is the case, and to manage the ball entry mode of the game ball into the history target ball entry section.

It is possible to output the history information stored in the history memory 117 to an external device which is an external device of the pachinko machine 10. This makes it possible to read the history information with an external device and use the read history information to analyze the ball entry mode of the game ball into the history target ball entry section.

The MPU 62 is provided with a reading terminal 68d, and a program can be read from the main ROM 64 by an external device electrically connected to the reading terminal 68d. This makes it possible to confirm whether or not the program is normal. In this configuration, the history information stored in the history memory 117 is externally output by using the reading terminal 68d for externally outputting the program. This makes it possible to output the history information to the outside while preventing the configuration from becoming complicated.

It is specified which of the program and the history information is the information to be output from the reading terminal 68d, and the information on the side corresponding to the specific result is externally output through the reading terminal 68d. As a result, in a configuration in which history information is output externally using the reading terminal 68d for externally outputting the program, the pachinko machine 10 determines whether the information to be output externally is the program or the history information. It is specified on the side, and the specified information is output to the outside. Therefore, even if the reading terminal 68d is also used, it is possible to read only the necessary information.

Based on the information received from the external device electrically connected to the reading terminal 68d, it is specified which of the program and the history information is the information to be output from the reading terminal 68d. This makes it possible to prevent the configuration related to the selection of information to be output externally from becoming complicated.

The MPU 62 having the main ROM 64 for storing the program in advance has the management IC 66 and the reading terminal 68d. As a result, the signal path for the reading terminal 68d can be integrated in the MPU 62. Therefore, it is possible to obtain the excellent effect as described above while making it difficult to illegally access the signal path to the reading terminal 68d.

The main CPU 63 that executes a process for paying out the game ball based on the entry of the game ball into any of the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. Separately, the management side CPU 112 is provided, and the management side CPU 112 executes a process for storing the history information in the history memory 117. As a result, it is possible to manage the ball entry mode of the game ball into each history target ball entry section while preventing the processing load of the main CPU 63 from being extremely increased.

The main CPU 63 and the management CPU 112 are provided on the same chip as the MPU 62. This makes it possible to prevent unauthorized access to the communication path between the main CPU 63 and the management CPU 112.

The main CPU 63 transmits information corresponding to the detection results of the ball entry detection sensors 42a to 48a to each buffer of the input port 121 of the management IC 66 by using the signal path corresponding to each of the ball entry detection sensors 42a to 48a. It is transmitted to 122a to 122g. As a result, the types of information transmitted from the main CPU 63 correspond to the buffers 122a to 122g (that is, each signal path), and the configuration for distinguishing each type of information on the management CPU 112 is simplified. It becomes possible to do.

The main CPU 63 has information corresponding to whether or not it is in the open / close execution mode, information corresponding to whether or not it is in the high frequency support mode, and information corresponding to whether or not the front door frame 14 is open. And the information corresponding to the start of the game round is transmitted to each buffer 122h to 122k of the input port 121 of the management IC 66 by using the signal path corresponding to each of these situations. As a result, the types of information corresponding to each of these situations correspond to the buffers 122h to 122k (that is, each signal path), and the configuration for distinguishing each type of information on the management side CPU 112 is simplified. It becomes possible.

The main CPU 63 transmits correspondence information indicating which type of information each buffer 122a to 122k (that is, each signal path 118a to 118k) corresponds to, to the management side CPU 112. As a result, it is not necessary to store the correspondence information in the management IC 66 in advance. Therefore, it is possible to increase the versatility of the management IC 66.

When the supply of the operating power to the main CPU 63 is started, the correspondence information is transmitted from the main CPU 63 to the management IC 66. As a result, in a situation where a game ball may enter the history target ball entry section, the correspondence relationship between the information transmitted from the main CPU 63 and the history target ball entry section can be specified by the management IC 66. It becomes possible to become.

Correspondence-related information is transmitted from the main CPU 63 to the management IC 66 by using the signal paths 118a to 118g for transmitting information indicating whether or not the game ball has entered the history target ball entry unit. This makes it possible to simplify the communication-related configuration as compared with the configuration in which a dedicated signal path for transmitting correspondence information is provided.

The management IC 66 is provided with a correspondence memory 116, and the correspondence information transmitted from the main CPU 63 to the management IC 66 is stored in the correspondence memory 116. As a result, every time the main CPU 63 transmits the information of the detection result of each of the ball entry detection sensors 42a to 48a, the information that enables the history target ball entry unit corresponding to the transmission target information to be specified by the management IC 66 is transmitted. No need to provide. Therefore, it is possible to suppress the amount of information of the detection result of each of the ball entry detection sensors 42a to 48a transmitted from the main CPU 63.

By switching the output state of the output instruction signal output from the main CPU 63 to the management IC 66 from the LOW level to the HI level, information is output from the management IC 66 to the reading terminal 68d. In this case, the fact that the signal path corresponding to the 16th buffer 122p corresponds to the output instruction signal can be specified by the management side CPU 112 without receiving the correspondence information from the main side CPU 63. .. This makes it possible to prevent the configuration related to the transmission of correspondence information from becoming extremely complicated.

The management IC 66 is provided with a number of buffers 122a to 122p capable of receiving information from the main CPU 63, which is larger than the number of types of information that need to be transmitted from the main CPU 63 to the management IC 66. Has been done. As a result, even if the number of types of the information increases or decreases depending on the model of the pachinko machine 10, it is possible to deal with it without changing the configuration of the buffers 122a to 122p. Therefore, it is possible to increase the versatility of the management IC 66.

When the history information is transmitted from the management IC 66 to the reading terminal 68d, each history information includes correspondence information indicating the type of the history target ball entry unit corresponding to the history information. As a result, it is possible to specify the ball entry mode of the game ball into each history target ball entry section by using the read history information.

By using the history information stored in the history memory 117 in the management IC 66, various parameters (first to eighth parameters, eleventh parameters) corresponding to the entry mode of the game ball in the game area PA in a predetermined period are used. ~ 18th parameter, 21st to 26th parameters, 31st parameter, 41st to 42nd parameters) are calculated. Then, various parameters of the calculated results are sequentially displayed on the first to third notification display devices 69a to 69c. This makes it possible for the pachinko machine 10 to notify various parameters that are the results of calculations using the history information.

Various parameters are calculated in a state where the history information corresponding to the situation where the front door frame 14 is open is excluded. This makes it possible to derive various parameters in a normal situation in which the front door frame 14 is in the closed state. In addition, various parameters corresponding to the situation of the open / close execution mode and the situation of the high frequency support mode are calculated. As a result, the manager of the game hall or the like can grasp the entry mode of the game ball according to each situation.

When the history information of the history memory 117 is output to the external device, the history memory 117 is initialized by executing the clearing process of the history memory 117. As a result, history information that exceeds the storage capacity of the history memory 117 becomes a storage target in the history memory 117, and the history information that should be stored and retained is erased by overwriting. Can be made less likely to occur.

History information is stored in the history memory 117 in a configuration in which when a game ball enters the first operating port 33 or the second operating port 34, the corresponding external output is performed through the external terminal plate 97. .. As a result, by using the information output externally through the external terminal plate 97, the history can be easily grasped while the number and frequency of game balls entering the first operating port 33 and the second operating port 34. By using the history information stored in the memory 117, it is possible to accurately grasp the number of game balls entering the history target entry portion and the entry frequency.

The probability of a jackpot result in the low probability mode varies depending on the setting state of the pachinko machine 10 of "setting 1" to "setting 6". As a result, even with a single pachinko machine 10, it is possible to create a situation in which the probability of a jackpot result is advantageous or disadvantageous in the low probability mode. Therefore, it is possible to improve the interest of the game.

The probability of a jackpot result in the low probability mode varies depending on the setting state of the pachinko machine 10 of "Setting 1" to "Setting 6", while the probability of a jackpot result in the high probability mode is the setting of the pachinko machine 10. It does not change depending on the condition. This makes it possible to limit the influence of the setting state of the pachinko machine 10 on the probability of a jackpot result to the situation in the low probability mode. Further, since it is possible to make the high probability accuracy table 64g referred to in the high probability mode common to any of the setting states of the pachinko machine 10, the accuracy tables 64a to 64g are set in advance in the main ROM 64. It is possible to suppress an increase in the storage capacity for storage.

The probability of a jackpot result in the low probability mode varies depending on the setting state of the pachinko machine 10 of "setting 1" to "setting 6", while the distribution mode of the type of jackpot result changes to the setting state of the pachinko machine 10. Does not fluctuate accordingly. This makes it possible to limit the influence of the setting state of the pachinko machine 10 to the situation in the low probability mode. Further, since the sorting table 64h referred to when sorting the types of jackpot results can be the same regardless of the setting state of the pachinko machine 10, the sorting table 64h in the main ROM 64 can be used. It is possible to suppress an increase in the storage capacity for storing in advance.

Even if a new setting of the setting state of the pachinko machine 10 is made, the history information stored in the history memory 117 is stored and retained without being erased. As a result, even if the setting state of the pachinko machine 10 is newly set, the history information up to that point can be continuously stored in the history memory 117, and the history memory can be stored for a long period of time. It is possible to specify the management result of the game history by using the history information accumulated in 117.

Even if the setting state of the pachinko machine 10 is newly set, the history information stored in the history memory 117 is not erased and is stored and held. In the configuration, the setting state of the pachinko machine 10 is newly set. When is performed, the history information corresponding to the above is stored in the history memory 117. This makes it possible to distinguish between the history information before the new setting of the setting state of the pachinko machine 10 is performed and the history information after the setting state is performed.

When the history information corresponding to the setting state of the pachinko machine 10 is newly set and the history information 117 corresponds to the setting state, the information corresponding to the set value is included in the history information. This makes it possible to specify the contents of the set values set in the past by referring to the history information.

When calculating various parameters at the calculation timing, the history information stored after that is used as a reference based on the history information corresponding to the new setting of the setting state of the pachinko machine 10 in the history memory 117. It may be configured to calculate various parameters. In this case, it is possible to derive the management result of the game history at the timing after the new setting of the setting state of the pachinko machine 10 is made as various parameters.

Further, when various parameters are calculated at the calculation timing, the history information corresponding to the new setting of the setting state of the pachinko machine 10 in the history memory 117 is referred to as the history information corresponding to the change of the set value. , It may be configured to calculate various parameters by using the history information stored after that. In this case, it is possible to derive the management result of the game history at the timing after the setting state of the pachinko machine 10 is changed as various parameters.

Further, although the board box 60a of the main control device 60 is provided with an opening for exposing the reading terminal 68d, the opening is not provided and the reading terminal 69d is located on the facing wall portion 60b. It may be a structure covered with. In this case, it is necessary to open the board box 60a in order to connect the external device to the reading terminal 68d.

<Second embodiment>
In the present embodiment, the contents of the pass / fail table corresponding to the set state of the pachinko machine 10 are different from those in the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 33 is an explanatory diagram for explaining various tables stored in the main ROM 64 in the present embodiment.

As shown in FIG. 33, the main ROM 64 has an area 161 for setting 1, an area 162 for setting 2, an area 163 for setting 3, an area 164 for setting 4, an area 165 for setting 5, and an area for setting 6. 166 and are provided. The setting 1 area 161 includes a low probability table 161a for setting 1 and a pachinko machine 10 which are referred to when the setting state of the pachinko machine 10 is "setting 1" and the winning / failing lottery mode is the low probability mode. The high-probability winning / failing table 161b for setting 1 which is referred to when the setting state of is "setting 1" and the winning / failing lottery mode is the high-probability mode is stored. The setting 2 area 162 includes a low probability table 162a for setting 2 and a pachinko machine 10 which are referred to when the setting state of the pachinko machine 10 is “setting 2” and the winning / failing lottery mode is the low probability mode. The high-probability winning / failing table 162b for setting 2 which is referred to when the setting state of is "setting 2" and the winning / failing lottery mode is the high-probability mode is stored. The setting 3 area 163 includes a low probability table 163a for setting 3 and a pachinko machine 10 which are referred to when the setting state of the pachinko machine 10 is "setting 3" and the winning / failing lottery mode is the low probability mode. The high-probability winning / failing table 163b for setting 3 which is referred to when the setting state of is "setting 3" and the winning / failing lottery mode is the high-probability mode is stored.

The setting 4 area 164 includes a low probability table 164a for setting 4 and a pachinko machine 10 which are referred to when the setting state of the pachinko machine 10 is "setting 4" and the winning / failing lottery mode is the low probability mode. The high-probability winning / failing table 164b for setting 4 which is referred to when the setting state of is "setting 4" and the winning / failing lottery mode is the high-probability mode is stored. The setting 5 area 165 includes a low probability table 165a for setting 5 and a pachinko machine 10 which are referred to when the setting state of the pachinko machine 10 is “setting 5” and the winning / failing lottery mode is the low probability mode. The high-probability winning / failing table 165b for setting 5 which is referred to when the setting state of is "setting 5" and the winning / failing lottery mode is the high-probability mode is stored. The setting 6 area 166 includes a low probability table 166a for setting 6 and a pachinko machine 10 which are referred to when the setting state of the pachinko machine 10 is "setting 6" and the winning / failing lottery mode is the low probability mode. The high-probability winning / failing table 166b for setting 6 is stored when the setting state of is "setting 6" and the winning / failing lottery mode is the high-probability mode.

The winning probabilities of the jackpot results set in each of the low probability / rejection tables 161a to 166a are different from each other. Specifically, when the low accuracy table 161a for setting 1 is referred to, a big hit result is obtained at about 1/320, and when the low accuracy table 162a for setting 2 is referred to, about 1/310. When the low accuracy table 163a for setting 3 is referred to, the big hit result is obtained at about 1/300, and when the low accuracy table 164a for setting 4 is referred to, about 1/290. When the low accuracy table 165a for setting 5 is referred to, the big hit result is obtained at about 1/280, and when the low accuracy table 166a for setting 6 is referred to, about 1/270. Will result in a big hit. As a result, when the setting state of the pachinko machine 10 is a high setting value, a big hit result is likely to occur in the low probability mode, which is advantageous for the player.

The winning probabilities of the jackpot results set in each of the high probability hit / fail tables 161b to 166b are different from each other. Specifically, when the high accuracy table 161b for setting 1 is referred to, a big hit result is obtained at about 1/45, and when the high accuracy table 162b for setting 2 is referred to, about 1/40. When the high accuracy table 163b for setting 3 is referred to, the big hit result is obtained at about 1/35, and when the high accuracy table 164b for setting 4 is referred to, about 1/30. When the high accuracy table 165b for setting 5 is referred to, the big hit result is obtained at about 1/25, and when the high accuracy table 166b for setting 6 is referred to, about 1/20. Will result in a big hit. As a result, when the setting state of the pachinko machine 10 is a high setting value, a big hit result is likely to occur in the high probability mode, which is advantageous for the player.

That is, in the first embodiment, the winning probability of the jackpot result in the low probability mode becomes higher as the setting state of the pachinko machine 10 is higher, while the winning probability of the jackpot result in the high probability mode is "setting 1". ~ The configuration is the same regardless of the setting state of "Setting 6", but in this embodiment, both the winning probability of the jackpot result in the low probability mode and the winning probability of the jackpot result in the high probability mode are pachinko. The higher the setting state of the machine 10, the higher the setting value. This makes it possible to increase the player's advantage over the fact that a high set value is set.

Further, even if the winning probability of the jackpot result in the low probability mode in the case of "setting 6" which is the highest setting state is, the winning of the jackpot result in the high probability mode in the case of "setting 1" which is the lowest setting state. It is set lower than the probability. This makes it possible to prevent the player's advantage when the setting state of the pachinko machine 10 is "setting 1" from becoming extremely low, and the setting state of the pachinko machine 10 is "setting". It is possible to prevent the player's advantage in the case of "6" from becoming extremely high.

On the other hand, as in the first embodiment, only one type of distribution table 64h is provided so as to be common in any of the setting states of "setting 1" to "setting 6". As a result, it is possible to prevent an advantage or disadvantage due to the setting state of the pachinko machine 10 in the distribution mode of the jackpot result, and a storage capacity for storing the distribution table 64h in the main ROM 64 in advance. Can be suppressed.

The winning probability of the jackpot result in the low probability mode is higher when the setting state of the pachinko machine 10 is higher, while the setting state of the pachinko machine 10 is higher for the winning probability of the jackpot result in the high probability mode. The set value may be lower. In this case, in the low probability mode, the higher the setting state of the pachinko machine 10 is, the more advantageous it is for the player, and in the high probability mode, the lower the setting state of the pachinko machine 10 is, the more advantageous it is for the player. It becomes possible.

Further, the winning probability of the jackpot result in the high probability mode is higher when the setting state of the pachinko machine 10 is higher, while the winning probability of the jackpot result in the low probability mode is "setting 1" to "setting 6". The configuration may be constant in the set state of. In this case, in the high probability mode, the higher the setting state of the pachinko machine 10 is, the more advantageous it is for the player, and in the low probability mode, it is possible to prevent the advantage or disadvantage due to the setting state of the pachinko machine 10 from occurring. Become.

<Third embodiment>
In the present embodiment, the handling of the management result of the game history when the setting state of the pachinko machine 10 is newly set is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

The management IC 66 is provided with a separate storage memory 171 as a memory for storing information in addition to each memory in the first embodiment. FIG. 34 is an explanatory diagram for explaining the separate storage memory 171. The separate storage memory 171 is a memory (that is, a non-volatile storage means) that does not require external power supply for storage holding such as a NOR type flash memory and a NAND type flash memory, and is used for both reading and writing.

The separate storage memory 171 is provided with a first separate storage area 172, a second separate storage area 173, a third separate storage area 174, a fourth separate storage area 175, and a fifth separate storage area 176. Information on the management result of the game history calculated when the setting state of the pachinko machine 10 is newly set in the first to fifth separate storage areas 172 to 176, more specifically, the first embodiment described above. The various parameters described in the above (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter, 41st to 42nd parameters) are sequentially stored. In this case, when the setting state of the pachinko machine 10 is newly set, various parameters are first stored in the first separate storage area 172, and then each time the setting state of the pachinko machine 10 is newly set, the nth order is specified. The storage target area is switched so that the storage area 172 to 176 → the n + 1 separate storage area 172 to 176. Then, when the setting state of the pachinko machine 10 is newly set after the various parameters are stored in the fifth separate storage area 176, the various parameters are stored again in the first separate storage area 172. At this time, various parameters already stored in the first separate storage area 172 are deleted. As a result, various parameters up to the time when the new setting of the setting state of the pachinko machine 10 is executed 5 times are stored in the separate storage memory 171, and the oldest various parameters are deleted for the portion exceeding 5 times. It is remembered by that.

Various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by the external device by connecting the external device to the reading terminal 68d. This makes it possible to grasp the management result of the game history before the new setting of the setting state is made in the pachinko machine 10.

Next, the setting update recognition process in the present embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. 35.

When the set value update signal input to the 15th buffer 122o of the input port 121 is switched from the LOW level to the HI level (step S1801: YES), the value of the set value grasping counter of the management side RAM 114 is set to "1". Set (step S1802). The set value grasping counter is a counter for specifying the set value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the set value grasping counter is "1", it means "setting 1". If the value of the set value grasping counter is "6", it means that it is "setting 6".

After that, it is determined whether or not the set value update signal input to the 15th buffer 122o of the input port 121 has been switched from the LOW level to the HI level again (step S1803). If an affirmative determination is made in step S1803, the value of the set value grasping counter of the management side RAM 114 is added by 1 (step S1804). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

When a negative determination is made in step S1803 or when the process of step S1804 is executed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , It is determined whether or not the set value identification end command has been received from the main CPU 63 (step S1805). If a negative determination is made in step S1805, the process returns to step S1803.

If an affirmative determination is made in step S1805, the repeated change monitoring process is executed (step S1806). The details of the repetitive change monitoring process will be described later, but when a new setting of the setting state of the pachinko machine 10 occurs repeatedly in a short period of time, a process for notifying the repetitive change is executed. In the configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the setting state of the pachinko machine 10 is made, the management result of the game history when the game is played over a predetermined period is intended. It is assumed that new settings of the setting state of the pachinko machine 10 are repeatedly performed in a short period of time in order to effectively erase the pachinko machines. On the other hand, by repeatedly executing the change monitoring process, when such an act is performed, the corresponding notification is executed.

After that, various arithmetic processes are executed (step S1807). In various arithmetic processes, the processes of steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter and 41st parameter are used by using the history information stored in the history memory 117 at that time. ~ 42nd parameter) is calculated.

After that, the various parameters calculated in step S1807 are stored in the area of the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 that is the current storage target (step S1808). In the separate storage memory 171, a pointer information area is set so that the management side CPU 112 can specify the area to be stored among the first to fifth separate storage areas 172 to 176. The information in the pointer information area is changed to the next area when various parameters are stored in the storage target areas of the 1st to 5th separate storage areas 172 to 176. Will be updated to. By executing the process of step S1808, various parameters at that time are stored in the separate storage memory 171 for the new setting of the setting state of the pachinko machine 10 this time.

After that, the history memory 117 is cleared to "0" (step S1809). That is, in the present embodiment, the history memory is not only when the history information is read by the external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set. The 117 history information is deleted.

After that, the RTC information which is the date information and the time information is read from the RTC 115 (step S1810). Then, the writing process to the history memory 117 is executed (step S1811). In the writing process, the pointer information of the history area 124 currently being written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S1810 is written in the history information storage area 125 of the history area 124. Further, both the information for identifying the set value and the value information of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 is newly set, the RTC information corresponding to the date and time when the setting is made, and the information of the set value when the setting is made The combination is stored as history information.

After that, the update process of the target pointer is executed (step S1812). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the 1 addition exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after 1 addition is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

Next, the monitoring process of the repetitive change executed in step S1806 will be described with reference to the flowchart of FIG.

First, it is determined whether or not the number of game times executed since the setting state of the pachinko machine 10 was set last time is within the reference number of times (specifically, 100 times) (step S1901). Specifically, the pachinko machine 10 is set by counting the number of the history information storage areas 125 in which the correspondence information indicating that the game is started is stored in the history area 124 of the history memory 117. The number of game times executed since the state was set last time is grasped, and it is determined whether or not the number of game times grasped is within the reference number of times (specifically, 100 times).

When an affirmative determination is made in step S1901, the value of the repetitive change counter provided in the separate storage memory 171 is added by 1 (step S1902). As described above, the separate storage memory 171 is a memory that does not require an external power supply for storage and retention, so that an external power supply is not required for storage and retention of the value of the repetitive change counter.

After that, it is determined whether or not the value of the repetitive change counter after 1 addition exceeds the notification reference value "5" (step S1903). The notification reference value corresponds to the number of the first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S1903, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without interposing the execution of the game times exceeding the reference number is the number of the first to fifth separate storage areas 172 to 176. It is judged whether or not it has been exceeded.

If an affirmative determination is made in step S1903, the display process of repeated changes is executed (step S1904). In the display process of repeated changes, the display contents of the first to third notification display devices 69a to 69c correspond to the fact that the new setting of the setting state of the pachinko machine 10 is repeated a number of times exceeding the notification reference value in a short period of time. The displayed content of repeated changes. The display content of the repeated change is a display content that displays "E" in all of the first to third notification display devices 69a to 69c, and this display content does not occur in other situations. Further, the state in which the display contents of the repeated changes are displayed on the first to third notification display devices 69a to 69c is continued until the repeated change flag provided in the separate storage memory 171 is cleared to "0". .. The repetitive change flag is a flag for the management side CPU 112 to specify that the display contents of the repetitive changes should be displayed on the first to third notification display devices 69a to 69c. Further, when "1" is set in the repeat change flag and the display contents of the repeat change are displayed on the first to third notification display devices 69a to 69c, the display process in the first embodiment is described above. (Fig. 31) is not executed. After that, "1" is set in the repeat change flag of the separate storage memory 171 (step S1905).

If a negative determination is made in step S1901, the value of the repetitive change counter of the separate storage memory 171 is cleared to "0" (step S1906). After that, on condition that "1" is set in the repetitive change flag of the separate storage memory 171 (step S1907: YES), the display contents of the repetitive changes in the first to third notification display devices 69a to 69c are displayed. The display is terminated (step S1908), and the repeat change flag is cleared to "0" (step S1909).

According to the present embodiment described in detail above, the following excellent effects are obtained.

When a new setting of the setting state of the pachinko machine 10 is made, the history information stored in the history memory 117 is deleted. As a result, it is possible to leave the history information of the game executed after the new setting of the setting state of the pachinko machine 10 is made in the history memory 117.

When a new setting of the setting state of the pachinko machine 10 is made, various parameters are calculated as a management result of the game history by using the history information of the history memory 117 at that time. This makes it possible to grasp the management result of the game history in the situation before the new setting of the setting state is performed in the pachinko machine 10. Further, even if the history information of the history memory 117 is deleted when the setting state of the pachinko machine 10 is newly set, it is possible to grasp the management result of the game history based on the history information to be deleted. It will be possible.

In a configuration in which various parameters are calculated using the history information of the history memory 117 at that time when a new setting of the set state is made in the pachinko machine 10, the calculated various parameters are stored separately. It is stored in 171. As a result, even if a new setting of the setting state is made in the pachinko machine 10, it is possible to grasp the management result of the game history in the situation before the setting is made at an arbitrary timing thereafter.

Since the separate storage memory 171 is provided with a plurality of separate storage areas 172 to 176, it is possible to store various parameters corresponding to the setting timings of the setting states for a plurality of times. As a result, it is possible to grasp the management result of the game history in a plurality of periods based on the timing when the new setting of the setting state is performed. Further, even if new settings of the setting state of the pachinko machine 10 are repeated in a situation where the game is not performed, various parameters calculated by using the history information of the situation in which the game is actually performed are displayed. It is possible to increase the possibility that the memory 171 for separate storage remains.

Various parameters stored in the first to fifth separate storage areas 172 to 176 can be read by the external device by connecting the external device to the reading terminal 68d. This makes it possible to grasp the management result of the game history before the new setting of the setting state is made in the pachinko machine 10.

In the configuration in which various parameters are stored in the separate storage memory 171 each time a new setting of the setting state of the pachinko machine 10 is made, the management result of the game history when the game is played over a predetermined period is intended. It is assumed that new settings of the setting state of the pachinko machine 10 are repeatedly performed in a short period of time in order to effectively erase the pachinko machines. On the other hand, by repeatedly executing the change monitoring process, when such an act is performed, the corresponding notification is executed. As a result, it is possible to notify the administrator or the like that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time.

Notification that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time is performed by the first to third notification display devices 69a to 69c. As a result, new setting of the setting state of the pachinko machine 10 was repeatedly performed in a short period of time by using the first to third notification display devices 69a to 69c for notifying the management result of the game history. It becomes possible to perform notification.

In a situation where it is necessary to notify that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time, the display contents of the repeated changes are continuously displayed on the first to third notification display devices 69a to 69c. , The notification of the management result of the game history in the normal time is not performed by the first to third notification display devices 69a to 69c. This makes it possible to emphasize the notification that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time.

In addition, when the number of game times executed after the new setting of the setting state of the pachinko machine 10 is made is within the reference number of times, the event in which the new setting is made continues beyond the notification reference value. However, the configuration is such that the notification corresponding to the above is executed, but the present invention is not limited to this, and the total discharge of the game balls discharged from the game area PA after the new setting state of the pachinko machine 10 is made. In a situation where the number is within the reference number, when the event for which the new setting is made continues to exceed the notification reference value, the corresponding notification may be executed. Further, after a new setting of the setting state of the pachinko machine 10 is made, any one of the predetermined ball entry portions (for example, the out port 24a, the general winning opening 31, the first operating port 33 and the second operating port 34, or a predetermined one) Even if the total number of gaming balls that have entered the combination) is within the reference number and the events for which the new setting is made continue to exceed the notification reference value, the corresponding notification is executed. good. In addition, an event is notified that the new setting is performed in a situation where the total number of history information newly stored in the history memory 117 after the new setting of the setting state of the pachinko machine 10 is within the reference number. When the reference value is exceeded and continuous, the corresponding notification may be executed.

Further, when the new setting of the setting state of the pachinko machine 10 exceeds the notification reference value within the monitoring reference period (for example, 600 seconds), the corresponding notification may be executed.

In addition, when the number of game times executed after the new setting of the setting state of the pachinko machine 10 is made is within the reference number of times, the event in which the new setting is made continues beyond the notification reference value. However, the setting value was changed in the situation where the number of game times executed after the new setting of the setting state of the pachinko machine 10 was made is within the reference number. When the events exceed the notification reference value and continue, the corresponding notification may be executed.

In addition, when the number of game times executed after the new setting of the setting state of the pachinko machine 10 is made is within the reference number of times, the event in which the new setting is made continues beyond the notification reference value. However, when the number of game times executed after the new setting of the setting state of the pachinko machine 10 is made is within the reference number, the new setting is triggered. When the events in which the various parameters are calculated continue to exceed the notification reference value, the corresponding notification may be executed.

In addition, when the number of game times executed after the new setting of the setting state of the pachinko machine 10 is made is within the reference number of times, the event in which the new setting is made continues beyond the notification reference value. In addition to or instead of the configuration in which the notification corresponding to the notification is executed, the progress of the game may be restricted over a predetermined period (for example, one hour).

<Fourth Embodiment>
This embodiment is different from the third embodiment in that the monitoring process of repeated changes is executed by the main CPU 63. Hereinafter, a configuration different from the third embodiment will be described. The description of the same configuration as that of the third embodiment is basically omitted.

FIG. 37 is a flowchart showing a monitoring process of repeated changes executed by the main CPU 63. The repetitive change monitoring process is executed when the set value update process (step S118) is executed in the main process (FIG. 9). That is, when the setting state of the pachinko machine 10 is newly set, the change monitoring process is repeatedly executed. However, the present invention is not limited to this, and the configuration may be such that the monitoring process of repeated changes is executed when the set value is changed.

First, it is determined whether or not the number of game times executed since the setting state of the pachinko machine 10 was set last time is within the reference number of times (specifically, 100 times) (step S2001). The main RAM 65 is provided with a game counter for measuring the number of game times executed after the setting state of the pachinko machine 10 is newly set, and the main CPU 63 newly executes the game times. The value of the game count counter is added by 1 each time. The game count counter is excluded from the target of "0" clearing even when the clearing process (step S105, step S117) of the main RAM 65 is executed.

When an affirmative determination is made in step S2001, the value of the repetitive change counter provided in the main RAM 65 is added by 1 (step S2002). The repetitive change counter is excluded from the target of "0" clearing even when the clearing process (step S105, step S117) of the main RAM 65 is executed.

After that, it is determined whether or not the value of the repetitive change counter after 1 addition exceeds the notification reference value "5" (step S2003). The notification reference value corresponds to the number of the first to fifth separate storage areas 172 to 176 provided in the separate storage memory 171. Therefore, in step S2003, the number of times the new setting of the setting state of the pachinko machine 10 is repeated without interposing the execution of the game times exceeding the reference number is the number of the first to fifth separate storage areas 172 to 176. It is judged whether or not it has been exceeded.

When an affirmative determination is made in step S2003, "1" is set in the repeat change flag provided in the main RAM 65 (step S2004). The repetitive change flag is a flag for the main CPU 63 to specify that the situation should be such that the repetitive change is notified. The repetitive change flag is excluded from the target of "0" clearing even when the clearing process (step S105, step S117) of the main RAM 65 is executed.

If a negative determination is made in step S2001, the value of the repeat change counter of the main RAM 65 is cleared to "0" (step S2005). After that, on condition that "1" is set in the repeat change flag of the main RAM 65 (step S2006: YES), the repeat change flag is cleared to "0" (step S2007).

In the repetitive change monitoring process, when "1" is set in the repetitive change flag of the main RAM 65 (step S2008: YES), the repetitive change notification command is transmitted to the voice emission control device 81 (step S2009). When the voice emission control device 81 receives the notification command of the repeated change, the symbol display device 41, the display light emitting unit 53, and the speaker unit 54 are made to notify the repeated change. The notification of the repeated change is continued until the supply of the operating power to the voice emission control device 81 is stopped.

According to the above configuration, it is possible to notify that the new setting of the setting state of the pachinko machine 10 has been repeatedly performed in a short period of time based on the control by the main CPU 63. Further, since the notification is performed by the symbol display device 41, the display light emitting unit 53, and the speaker unit 54, the pachinko machine 10 is in the set state without opening the game machine main body 12 forward with respect to the outer frame 11. It is possible to make the administrator aware that the new setting has been repeated in a short period of time.

When a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, in addition to or instead of the configuration in which the notification command for the repeated change is transmitted from the main CPU 63 to the voice emission control device 81, The configuration may be such that the corresponding external output is performed.

Further, the main CPU 63 may execute the repetitive change monitoring process according to the present embodiment, and the management CPU 112 may execute the repetitive change monitoring process according to the third embodiment. As a result, it becomes possible to strictly monitor whether or not the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time.

<Fifth Embodiment>
In the present embodiment, the processing configuration of the setting update recognition process in the management side CPU 112 is different from the third embodiment. Hereinafter, a configuration different from the third embodiment will be described. The description of the same configuration as that of the third embodiment is basically omitted.

FIG. 38 is a flowchart showing a setting update recognition process in the present embodiment executed by the management side CPU 112.

When the set value update signal input to the 15th buffer 122o of the input port 121 is switched from the LOW level to the HI level (step S2101: YES), the value of the set value grasping counter of the management RAM 114 is set to "1". Set (step S2102). The set value grasping counter is a counter for specifying the set value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the set value grasping counter is "1", it means "setting 1". If the value of the set value grasping counter is "6", it means that it is "setting 6".

After that, it is determined whether or not the set value update signal input to the 15th buffer 122o of the input port 121 has been switched from the LOW level to the HI level again (step S2103). When an affirmative determination is made in step S2103, the value of the set value grasping counter of the management side RAM 114 is added by 1 (step S2104). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

When a negative determination is made in step S2103 or the process of step S2104 is executed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , It is determined whether or not the set value identification end command has been received from the main CPU 63 (step S2105). If a negative determination is made in step S2105, the process returns to the process of step S2103.

When an affirmative determination is made in step S2105, it is determined whether or not a predetermined number or more of predetermined history information exists in the history memory 117 (step S2106). Specifically, the pachinko machine 10 is set by counting the number of the history information storage areas 125 in which the correspondence information indicating that the game is started is stored in the history area 124 of the history memory 117. The number of game times executed since the state was set last time is grasped, and it is determined whether or not the number of game times grasped exceeds the reference number (specifically, 100 times). However, the number is not limited to this, and the number of the history information storage area 125 in which the correspondence information indicating that the game ball has been discharged from the game area PA is stored is the reference number (specifically, 1000). May be configured to determine in step S2106 whether or not the above amount is exceeded. Correspondence-related information indicating that the game ball has entered a predetermined ball entry portion (for example, any one of the out port 24a, the general winning opening 31, the first operating port 33 and the second operating port 34, or a predetermined combination). In step S2106, it may be determined whether or not the number of history information storage areas 125 in which is stored exceeds the reference number (specifically, 1000). Further, it may be configured in step S2106 to determine whether or not the total number reference number (specifically, 1000) of the history information stored in the history memory 117 is exceeded.

In addition, when the number of game times executed after the new setting of the setting state of the pachinko machine 10 is made is within the reference number of times, the event in which the new setting is made continues beyond the notification reference value. However, the configuration is such that the notification corresponding to the above is executed, but the present invention is not limited to this, and the total discharge of the game balls discharged from the game area PA after the new setting state of the pachinko machine 10 is made. In a situation where the number is within the reference number, when the event for which the new setting is made continues to exceed the notification reference value, the corresponding notification may be executed. Further, after a new setting of the setting state of the pachinko machine 10 is made, any one of the predetermined ball entry portions (for example, the out port 24a, the general winning opening 31, the first operating port 33 and the second operating port 34, or a predetermined one) Even if the total number of gaming balls that have entered the combination) is within the reference number and the events for which the new setting is made continue to exceed the notification reference value, the corresponding notification is executed. good. In addition, an event is notified that the new setting is performed in a situation where the total number of history information newly stored in the history memory 117 after the new setting of the setting state of the pachinko machine 10 is within the reference number. When the reference value is exceeded and continuous, the corresponding notification may be executed.

If an affirmative determination is made in step S2106, various arithmetic processes are executed (step S2107). In various arithmetic processes, the processes of steps S1402 to S1412 of the display output process (FIG. 30) in the first embodiment are executed. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter and 41st parameter are used by using the history information stored in the history memory 117 at that time. ~ 42nd parameter) is calculated.

After that, the various parameters calculated in step S2107 are stored in the area of the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 that is the current storage target (step S2108). In the separate storage memory 171, a pointer information area is set so that the management side CPU 112 can specify the area to be stored among the first to fifth separate storage areas 172 to 176. The information in the pointer information area is changed to the next area when various parameters are stored in the storage target areas of the 1st to 5th separate storage areas 172 to 176. Will be updated to. By executing the process of step S2108, various parameters at that time are stored in the separate storage memory 171 for the new setting of the setting state of the pachinko machine 10 this time.

When a negative determination is made in step S2106, or when the process of step S2108 is executed, the history memory 117 is cleared to "0" (step S2109). That is, in the present embodiment, the history memory is not only when the history information is read by the external device connected to the reading terminal 68d, but also when the setting state of the pachinko machine 10 is newly set. The 117 history information is deleted.

After that, the RTC information which is the date information and the time information is read from the RTC 115 (step S2110). Then, the writing process to the history memory 117 is executed (step S2111). In the writing process, the pointer information of the history area 124 currently being written is specified by referring to the pointer area 126 of the history memory 117, and the pointer information corresponding to the pointer information to be written is specified. The RTC information read in step S2110 is written in the history information storage area 125 of the history area 124. Further, both the information for identifying the set value and the value information of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 is newly set, the RTC information corresponding to the date and time when the setting is made, and the information of the set value when the setting is made The combination is stored as history information.

After that, the update process of the target pointer is executed (step S2112). In the update process, the numerical information stored in the pointer area 126 of the history memory 117 is read and 1 is added. It is determined whether or not the pointer information after the 1 addition exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after 1 addition is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

According to the above configuration, when the setting state of the pachinko machine 10 is newly set, it is stored in the history memory 117 on condition that a predetermined number or more of the history information is stored in the history memory 117. Various parameters are calculated using the history information, and the various parameters are stored in the separate storage memory 171. As a result, even if the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, the information of the management result of the game history as a result of the game being substantially performed is stored in the separate storage memory 171. It is possible to store it.

The process of step S2109 may be executed on the condition that the process of step S2107 and step S2108 is executed. That is, the history information stored in the history memory 117 is deleted on condition that a predetermined number or more of the history information is stored in the history memory 117. As a result, even if a new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time, it is possible to prevent the history information of the history memory 117 from being erased.

<Sixth Embodiment>
In the present embodiment, the configuration of the history memory 117 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 39 is an explanatory diagram for explaining the configuration of the history memory 117 in the present embodiment.

The history memory 117 is provided with a total area 141, a first state area 142, a second state area 143, and a third state area 144. Each of these areas 141 to 144 is provided with first to 14th counters 141a to 141n, 142a to 142n, 143a to 143n, 144a to 144n. The first counters 141a to 144a of the areas 141 to 144 store information on the number of times the output state of the first signal input to the first buffer 122a is changed from the LOW level to the HI level. The second counters 141b to 144b of the areas 141 to 144 store information on the number of times the output state of the second signal input to the second buffer 122b is changed from the LOW level to the HI level. The third counters 141c to 144c of the areas 141 to 144 store information on the number of times the output state of the third signal input to the third buffer 122c is changed from the LOW level to the HI level. The fourth counters 141d to 144d of each area 141 to 144 store information on the number of times the output state of the fourth signal input to the fourth buffer 122d is changed from the LOW level to the HI level. The fifth counters 141e to 144e of each area 141 to 144 store information on the number of times the output state of the fifth signal input to the fifth buffer 122e is changed from the LOW level to the HI level. The sixth counters 141f to 144f of the areas 141 to 144 store information on the number of times the output state of the sixth signal input to the sixth buffer 122f is changed from the LOW level to the HI level. Information on the number of times the output state of the seventh signal input to the seventh buffer 122g is changed from the LOW level to the HI level is stored in the seventh counters 141g to 144g of each area 141 to 144. The eighth counters 141h to 144h of the areas 141 to 144 store information on the number of times the output state of the eighth signal input to the eighth buffer 122h is changed from the LOW level to the HI level. The ninth counters 141i to 144i of the areas 141 to 144 store information on the number of times the output state of the ninth signal input to the ninth buffer 122i is changed from the LOW level to the HI level. The tenth counters 141j to 144j of each area 141 to 144 store information on the number of times the output state of the tenth signal input to the tenth buffer 122j is changed from the LOW level to the HI level. The 11th counters 141k to 144k in each area 141 to 144 store information on the number of times the output state of the 11th signal input to the 11th buffer 122k is changed from the LOW level to the HI level. The 12th counters 141l to 144l of each area 141 to 144 store information on the number of times the output state of the 12th signal input to the 12th buffer 122l is changed from the LOW level to the HI level. The 13th counters 141m to 144m in each area 141 to 144 store information on the number of times the output state of the 13th signal input to the 13th buffer 122m is changed from the LOW level to the HI level. The 14th counters 141n to 144n of each area 141 to 144 store information on the number of times the output state of the 14th signal input to the 14th buffer 122n is changed from the LOW level to the HI level.

FIG. 40 is a flowchart showing a history setting process in the present embodiment executed by the management side CPU 112.

First, the number of buffers to be confirmed by the management CPU 112 among the first to 14th buffers 122a to 122n is set in the confirmation target counter of the management side RAM 114 (step S2201). Specifically, the number of correspondence-related areas in the correspondence-relationship memory 116 in which information other than the information indicating that the correspondence-related areas 123a to 123n are blank is stored is specified, and the identification thereof is specified. Set the information of the specified number in the confirmation target counter. In the pachinko machine 10, information other than the information indicating that the pachinko machine 10 is blank is stored in the first to eleventh correspondence areas 123a to 123k. Therefore, in step S2201, "11" is set in the confirmation target counter.

After that, it is determined whether or not the buffers 122a to 122n corresponding to the current confirmation target counters are buffers to which the state information signal is input (step S2202). Specifically, in the corresponding relation areas 123a to 123n corresponding to the values of the current confirmation target counters, as the correspondence relation information, information indicating that the open / close execution mode is set, information indicating that the high frequency support mode is set, and information indicating that the high frequency support mode is set. It is determined whether or not any of the information indicating that the front door frame 14 is stored is stored.

If an affirmative determination is made in step S2202, the state information setting process is executed (step S2203). In the setting process, when the output state of the eighth signal indicating whether or not the opening / closing execution mode is switched from the LOW level to the HI level, the management side manages the information of the first state indicating that the opening / closing execution mode is in progress. It is stored in the RAM 114, and when the output state of the eighth signal is switched from the HI level to the LOW level, the information of the first state is erased from the management side RAM 114. Further, when the output state of the ninth signal indicating whether or not the high frequency support mode is in progress is switched from the LOW level to the HI level, the information of the second state indicating that the high frequency support mode is in progress is stored in the management side RAM 114. When the output state of the ninth signal is switched from the HI level to the LOW level, the information of the second state is erased from the management side RAM 114. Further, when the output state of the tenth signal indicating whether or not the front door frame 14 is open is switched from the LOW level to the HI level, the information of the third state indicating that the front door frame 14 is open. Is stored in the management side RAM 114, and when the output state of the tenth signal is switched from the HI level to the LOW level, the information of the third state is erased from the management side RAM 114.

When a negative determination is made in step S2202 or when the process of step S2203 is executed, the numerical information stored in the buffer corresponding to the value of the current confirmation target counter among the first to 14th buffers 122a to 122n is displayed. By confirming whether or not the value has been changed from "0" to "1", it is determined whether or not the output state of the input signal from the main CPU 63 to the buffer has been switched from the LOW level to the HI level ( Step S2204). If the numerical information stored in the 8th buffer 122h is changed from "0" to "1" in a situation where the current value of the check target counter is a value corresponding to the 8th buffer 122h, step S2203 is performed. The information of the first state is stored in the management side RAM 114, and an affirmative determination is made in step S2204. Further, when the numerical information stored in the 9th buffer 122i is changed from "0" to "1" in the situation where the value of the current confirmation target counter is the value corresponding to the 9th buffer 122i, the step S2203 is performed. The information of the second state is stored in the management side RAM 114, and an affirmative determination is made in step S2204. Further, when the numerical information stored in the 10th buffer 122j is changed from "0" to "1" in the situation where the value of the current confirmation target counter is the value corresponding to the 10th buffer 122j, step S2203 is performed. The information of the third state is stored in the management side RAM 114, and an affirmative determination is made in step S2204.

If an affirmative determination is made in step S2204, the corresponding total counter addition process is executed (step S2205). In the addition process, the value of the counter corresponding to the current value of the confirmation target counter among the first to 14th counters 141a to 141n for totalization in the totalization area 141 of the history memory 117 is added by one. For example, if the value of the confirmation target counter is "11", the 11th counter 141k for total is the addition target, and if the value of the confirmation target counter is "5", the 5th counter 141e for total is the addition target. If the value of the confirmation target counter is "1", the first counter 141a for totaling is the addition target.

After that, by referring to the state information of the management side RAM 114, it is determined whether or not it is in the first state, that is, whether or not it is in the open / close execution mode (step S2206). In the case of the first state (step S2206: YES), the counter addition processing for the corresponding first state is executed (step S2207). In the addition process, the value of the counter corresponding to the value of the current confirmation target counter among the first to 14th counters 142a to 142n for the first state in the first state area 142 of the history memory 117 is added by one. .. For example, if the value of the confirmation target counter is "11", the 11th counter 142k for the first state is the addition target, and if the value of the confirmation target counter is "5", the fifth counter 142e for the first state is added. If the value of the confirmation target counter is "1", the first counter 142a for the first state is the addition target.

After that, by referring to the state information of the management side RAM 114, it is determined whether or not it is in the second state, that is, whether or not it is in the high frequency support mode (step S2208). If it is in the second state (step S2208: YES), the counter addition process for the corresponding second state is executed (step S2209). In the addition process, the value of the counter corresponding to the value of the current confirmation target counter among the first to 14th counters 143a to 143n for the second state in the second state area 143 of the history memory 117 is added by one. .. For example, if the value of the confirmation target counter is "11", the 11th counter 143k for the second state is the addition target, and if the value of the confirmation target counter is "5", the fifth counter 143e for the second state is the addition target. If the value of the confirmation target counter is "1", the addition target is the first counter 143a for the second state.

After that, by referring to the state information of the management side RAM 114, it is determined whether or not it is in the third state, that is, whether or not the front door frame 14 is open (step S2210). In the case of the third state (step S2210: YES), the counter addition processing for the corresponding third state is executed (step S2211). In the addition process, the value of the counter corresponding to the value of the current confirmation target counter among the first to 14th counters 144a to 144n for the third state in the third state area 144 of the history memory 117 is added by one. .. For example, if the value of the confirmation target counter is "11", the eleventh counter 144k for the third state is the addition target, and if the value of the confirmation target counter is "5", the fifth counter 144e for the third state is added. If the value of the confirmation target counter is "1", the addition target is the first counter 144a for the third state.

When a negative determination is made in step S2204, a negative determination is made in step S2210, or the process of step S2211 is executed, the value of the confirmation target counter of the management side RAM 114 is subtracted by 1 (step S2212). Then, it is determined whether or not the value of the confirmation target counter after the subtraction of 1 is "0" (step S2213). When the value of the confirmation target counter is 1 or more (step S2213: NO), the processing of step S2202 and subsequent steps is executed for the confirmation target corresponding to the value of the new confirmation target counter.

By executing the history setting process as described above, the number of times the game ball is inserted into the out port 24a, the general winning opening 31, the special electric winning device 32, the first operating port 33 and the second operating port 34, and the opening / closing execution are executed. The number of times the mode is generated, the number of times the high-frequency support mode is generated, and the number of times the game is played are stored as number-of-times information instead of being stored as history information as in the first embodiment. As a result, the storage capacity required in the history memory 117 can be suppressed as compared with the configuration in which each history information is individually stored.

Since the configuration is such that the number of times information is stored instead of the history information, it is not necessary to execute the process of deriving the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

Next, the setting update recognition process in the present embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. 41.

When the set value update signal input to the 15th buffer 122o of the input port 121 is switched from the LOW level to the HI level (step S2301: YES), the value of the set value grasping counter of the management side RAM 114 is set to "1". Set (step S2302). The set value grasping counter is a counter for specifying the set value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the set value grasping counter is "1", it means "setting 1". If the value of the set value grasping counter is "6", it means that it is "setting 6".

After that, it is determined whether or not the set value update signal input to the 15th buffer 122o of the input port 121 has been switched from the LOW level to the HI level again (step S2303). If an affirmative determination is made in step S2303, the value of the set value grasping counter of the management side RAM 114 is added by 1 (step S2304). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

When a negative determination is made in step S2303 or the process of step S2304 is executed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , It is determined whether or not the set value identification end command has been received from the main CPU 63 (step S2305). If a negative determination is made in step S2305, the process returns to step S2303.

When an affirmative judgment is made in step S2305, opening / closing execution is executed in the 11th counter 141k for total, which measures the number of times the game is executed in the total area 141 in the history memory 117, and in the total area 141 in the history memory 117. Each of the 8th counter 141h for total measuring the number of occurrences of the mode and the 9th counter 141i for total measuring the number of occurrences of the high frequency support mode in the total area 141 in the history memory 117 are used. Clear "0" (step S2306 to step S2308). As a result, the information on the number of times the game is executed, the number of times the open / close execution mode is generated, and the number of times the high-frequency support mode is generated is cleared to "0" when the pachinko machine 10 is newly set. Will be done. Therefore, the 31st parameter indicating the number of occurrences of the open / close execution mode per unit game, the 41st parameter indicating the number of occurrences of the high frequency support mode per unit game, and the high frequency support mode for the number of occurrences of the open / close execution mode. The calculation result of the 42nd parameter indicating the ratio of the number of occurrences corresponds to the game content after the new setting of the setting state of the pachinko machine 10. In a configuration in which the winning probability of the jackpot result is changed when the set value of the pachinko machine 10 is changed, the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are the setting state of the pachinko machine 10 as described above. By making it correspond to the game content after the new setting is made, the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are appropriate based on the current setting value. It becomes possible to judge whether or not.

On the other hand, even if the setting state of the pachinko machine 10 is newly set, the counters other than the 8th counter 141h for totaling, the 9th counter 141i for totaling, and the 11th counter 141k in the history memory 117 are " 0 "is not cleared. As a result, the number of game balls entered into each history target entry portion or the entry frequency is managed based on the long-term game history without being affected by the new setting of the setting state of the pachinko machine 10. It becomes possible.

According to the above configuration, the number of times the game ball enters the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33 and the second operating port 34, the number of times the opening / closing execution mode occurs, and the high frequency support. The number of times the mode is generated and the number of times the game is generated are stored as the number of times information, not as the history information as in the first embodiment. As a result, the storage capacity required in the history memory 117 can be suppressed as compared with the configuration in which each history information is individually stored.

Further, since the configuration is such that the number of times information is stored instead of the history information, it is not necessary to execute the process of deriving the number of times information from the history information when calculating various parameters. This makes it possible to reduce the processing load for calculating various parameters.

The information on the number of times the game is executed, the number of times the open / close execution mode is generated, and the number of times the high-frequency support mode is generated is cleared to "0" when the pachinko machine 10 is newly set. Therefore, the 31st parameter indicating the number of occurrences of the open / close execution mode per unit game, the 41st parameter indicating the number of occurrences of the high frequency support mode per unit game, and the high frequency support mode for the number of occurrences of the open / close execution mode. The calculation result of the 42nd parameter indicating the ratio of the number of occurrences corresponds to the game content after the new setting of the setting state of the pachinko machine 10. In a configuration in which the winning probability of the jackpot result is changed when the set value of the pachinko machine 10 is changed, the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are the setting state of the pachinko machine 10 as described above. By making it correspond to the game content after the new setting is made, the calculation results of the 31st parameter, the 41st parameter, and the 42nd parameter are appropriate based on the current setting value. It becomes possible to judge whether or not.

On the other hand, even if the setting state of the pachinko machine 10 is newly set, the counters other than the 8th counter 141h for totaling, the 9th counter 141i for totaling, and the 11th counter 141k in the history memory 117 are " 0 "is not cleared. As a result, the number of game balls entered into each history target entry portion or the entry frequency is managed based on the long-term game history without being affected by the new setting of the setting state of the pachinko machine 10. It becomes possible.

The configuration of the history memory 117 as in the present embodiment may be applied to the first to fifth embodiments described above and the embodiments described after the present embodiment. For example, when applied to the first embodiment, the information in the history memory 117 is maintained as it is even if the setting state of the pachinko machine 10 is newly set. Further, when applied to the third embodiment, when a new setting state of the pachinko machine 10 is made, the entire history memory 117 is cleared to "0".

Further, when the set value of the pachinko machine 10 is changed, the processes of steps S2306 to S2308 may be executed in the setting update recognition process (FIG. 41). As a result, even if the setting state of the pachinko machine 10 is newly set, if the set value is not changed before and after that, the information on the number of times the game is executed, the information on the number of times the open / close execution mode is generated, and high frequency support are provided. The information on the number of times the mode is generated is not cleared to "0", and when the set value of the pachinko machine 10 is changed, the information on the number of times the game is executed, the information on the number of times the open / close execution mode is generated, and the high-frequency support mode It is possible to make the information on the number of occurrences of "0" clear.

Further, in the setting update recognition process (FIG. 41), various parameters are calculated and calculated by using the counters 141 to 144 of the history memory 117 before the processes of steps S2306 to S2308 are executed. Various parameters may be stored in the calculation result memory 131.

<7th Embodiment>
In the present embodiment, the configuration of the history memory 117 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 42 is an explanatory diagram for explaining the configuration of the history memory 117 in the present embodiment.

As the history memory 117, history memories 181 to 186 corresponding to each of "setting 1" to "setting 6", which are the setting states of the pachinko machine 10, are provided. Specifically, the history memory 181 for setting 1 is provided corresponding to "setting 1", and the history memory 182 for setting 2 is provided corresponding to "setting 2". The history memory 183 for setting 3 is provided corresponding to "setting 3", and the history memory 184 for setting 4 is provided corresponding to "setting 4", and corresponds to "setting 5". A history memory 185 for setting 5 is provided, and a history memory 186 for setting 6 is provided corresponding to the “setting 6”.

Each of the history memories 181 to 186 for the settings 1 to 6 is provided with a combination of the history area 124 and the pointer area 126 of the history memory 117 according to the first embodiment. As a result, it is possible to store the history information corresponding to each of the setting states of the pachinko machines 10 of "setting 1" to "setting 6". In this case, when a new setting of the setting state of the pachinko machine 10 is made, the history memories 181 to 186 corresponding to the set value for which the new setting is made are stored as the storage target of the history information. , It is possible to store the history information separately for each set value without erasing the history information at the time of new setting of the setting state of the pachinko machine 10. Further, since various parameters are calculated using the history information corresponding to the setting state of the pachinko machine 10 currently set, it is possible to appropriately derive various parameters corresponding to each set value.

In addition, in each of the history memories 181 to 186 for the settings 1 to 6, the total area 141, the first state area 142, the second state area 143, and the third state area 144 in the sixth embodiment are described. The configuration may be such that the combination of is set.

Next, the setting update recognition process in the present embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. 43.

When the set value update signal input to the 15th buffer 122o of the input port 121 is switched from the LOW level to the HI level (step S2401: YES), the value of the set value grasping counter provided in the calculation result memory 131. Is set to "1" (step S2402). The set value grasping counter is a counter for specifying the set value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the set value grasping counter is "1", it means "setting 1". If the value of the set value grasping counter is "6", it means that it is "setting 6". Further, in the present embodiment, it is assumed that the supply of operating power to the management IC 66 is stopped because the set value grasping counter is provided in the calculation result memory 131, which is a memory that does not require external power supply for memory retention. However, the value stored in the set value grasping counter is stored and retained.

After that, it is determined whether or not the set value update signal input to the 15th buffer 122o of the input port 121 has been switched from the LOW level to the HI level again (step S2403). If an affirmative determination is made in step S2403, the value of the set value grasping counter of the calculation result memory 131 is added by 1 (step S2404). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

When a negative determination is made in step S2403 or when the process of step S2404 is executed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , It is determined whether or not the set value identification end command has been received from the main CPU 63 (step S2405). If a negative determination is made in step S2405, the process returns to step S2403.

When an affirmative determination is made in step S2405, the history memories 181-186 corresponding to the value of the set value grasping counter of the calculation result memory 131 are set as the storage target of the history information and the reference target at the time of calculation of various parameters ( Step S2406). Specifically, if the value of the set value grasping counter is "1", it means that the value is set to "setting 1". Therefore, the history memory 181 for setting 1 is used as the history information storage target and various parameters. Set as a reference target during calculation. Further, if the value of the set value grasping counter is "2", it means that the value is set to "setting 2". Therefore, the history memory 182 for setting 2 is used when the history information is stored and various parameters are calculated. Set as a reference target. Further, if the value of the set value grasping counter is "3", it means that the value is set to "setting 3". Therefore, the history memory 183 for setting 3 is used when the history information is stored and various parameters are calculated. Set as a reference target. Further, if the value of the set value grasping counter is "4", it means that the value is set to "setting 4". Therefore, the history memory 184 for setting 4 is used when the history information is stored and various parameters are calculated. Set as a reference target. Further, if the value of the set value grasping counter is "5", it means that the value is set to "setting 5". Therefore, the history memory 185 for setting 5 is used when the history information is stored and various parameters are calculated. Set as a reference target. Further, if the value of the set value grasping counter is "6", it means that the value is set to "setting 6". Therefore, the history memory 186 for setting 6 is used when the history information is stored and various parameters are calculated. Set as a reference target.

After that, the RTC information which is the date information and the time information is read from the RTC 115 (step S2407). Then, the writing process to the history memory 117 is executed (step S2408). In the writing process, among the history memories 181-186 for the settings 1 to 6, the history memories 181-186 set as the storage target of the history information in step S2406 are selected. Then, by referring to the pointer area 126 in the history memory 181 to 186 that is the storage target, the pointer information of the history area 124 that is the current write target is specified, and the pointer information becomes the write target. The RTC information read in step S2407 is written in the history information storage area 125 of the history area 124 corresponding to the existing pointer information. Further, the information for identifying the set value is written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the combination of the information indicating that the setting state of the pachinko machine 10 is newly set and the RTC information corresponding to the date and time when the setting is made is stored as the history information.

After that, the update process of the target pointer is executed (step S2409). In the update process, the history memories 181 to 186 set as the storage target of the history information in step S2406 are selected from the history memories 181 to 186 for the settings 1 to 6, and the history memories 181 to 186 are selected. The numerical information stored in the pointer area 126 is read out and added by 1. It is determined whether or not the pointer information after the 1 addition exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after 1 addition is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

According to the above configuration, as the history memory 117, the history memories 181 to 186 for the settings 1 to 6 are provided so as to correspond to each of the "settings 1" to "setting 6". As a result, it is possible to store the game history corresponding to each of the setting states of the pachinko machines 10 of "setting 1" to "setting 6". In this case, when a new setting of the setting state of the pachinko machine 10 is made, the history memories 181 to 186 corresponding to the set value for which the new setting is made are stored as the storage target of the history information. , It is possible to store the history information separately for each set value without erasing the history information at the time of new setting of the setting state of the pachinko machine 10. Further, since various parameters are calculated using the history information corresponding to the setting state of the pachinko machine 10 currently set, it is possible to appropriately derive various parameters corresponding to each set value.

The history memory 117 is not limited to a configuration in which six memories of the history memories 181 to 186 for settings 1 to 6 are provided, and one memory is used for setting 1. Corresponds to the area corresponding to the history memory 181 of the setting 2, the area corresponding to the history memory 182 for the setting 2, the area corresponding to the history memory 183 for the setting 3, and the history memory 184 for the setting 4. An area, an area corresponding to the history memory 185 for setting 5, and an area corresponding to the history memory 186 for setting 6 may be set.

<8th Embodiment>
In the present embodiment, the configuration of the history memory 117 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 44 is an explanatory diagram for explaining the configuration of the history memory 117 in the present embodiment.

As the history memory 117, a first history memory 191 and a second history memory 192 are provided. Each of the first history memory 191 and the second history memory 192 is provided with a combination of the history area 124 and the pointer area 126 of the history memory 117 according to the first embodiment. In this case, in a situation where history information is stored using one of the history memories 191 and 192 of the first history memory 191 and the second history memory 192, a new setting of the setting state of the pachinko machine 10 is performed. When is performed, the history information of one of the history memories 191, 192 is left without being erased until a predetermined number or more of the history information is stored in the other history memories 191, 192. It is possible to newly store the history information in both the history memories 191 and 192 until a predetermined number or more of the history information is stored in the other history memory 191 and 192. Become.

Next, the setting update recognition process in the present embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. 45.

When the set value update signal input to the 15th buffer 122o of the input port 121 is switched from the LOW level to the HI level (step S2501: YES), the value of the set value grasping counter provided in the management RAM 114 is set to ". 1 ”(step S2502). The set value grasping counter is a counter for specifying the set value of the pachinko machine 10 by the management side CPU 112. For example, if the value of the set value grasping counter is "1", it means "setting 1". If the value of the set value grasping counter is "6", it means that it is "setting 6".

After that, it is determined whether or not the set value update signal input to the 15th buffer 122o of the input port 121 has been switched from the LOW level to the HI level again (step S2503). If an affirmative determination is made in step S2503, the value of the set value grasping counter of the management side RAM 114 is added by 1 (step S2504). As a result, the set value of the pachinko machine 10 specified by the management side CPU 112 is increased by one step.

When a negative determination is made in step S2503 or when the process of step S2504 is executed, based on the input state of the first to eighth signals input to the first to eighth buffers 122a to 122h of the input port 121. , It is determined whether or not the set value identification end command has been received from the main CPU 63 (step S2505). If a negative determination is made in step S2505, the process returns to step S2503.

When an affirmative determination is made in step S2505, "1" is set in the setting change occurrence flag provided in the calculation result memory 131 (step S2506). The setting change occurrence flag has been set as the storage target of the history information among the first history memory 191 and the second history memory 192 after the setting state of the pachinko machine 10 is newly set. It is a flag for the management side CPU 112 to specify whether or not not only the history memory 191 and 192 but also the other history memory 191 and 192 are the situations in which the history information is to be stored. Further, since the setting change occurrence flag is provided in the calculation result memory 131, which is a memory that does not require external power supply for storage, the setting change occurs even if the supply of operating power to the management IC 66 is stopped. The value stored in the flag is stored in memory.

After that, the RTC information which is the date information and the time information is read from the RTC 115 (step S2507). Then, the writing process to each history memory 191 and 192 is executed (step S2508). In the writing process, first, the pointer information of the history area 124 that is the current writing target is specified by referring to the pointer area 126 of the first history memory 191, and the pointer information that is the writing target is specified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to the above. Further, both the information for identifying the set value and the value information of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 is newly set, the RTC information corresponding to the date and time when the setting is made, and the information of the set value when the setting is made The combination is stored in the first history memory 191 as history information. Further, in the writing process, the pointer information of the history area 124 that is the current writing target is specified by referring to the pointer area 126 of the second history memory 192, and the pointer that is the writing target is specified. The RTC information read in step S2507 is written in the history information storage area 125 of the history area 124 corresponding to the information. Further, both the information for identifying the set value and the value information of the set value grasping counter are written in the history information storage area 125 corresponding to the pointer information to be written. As a result, the information indicating that the setting state of the pachinko machine 10 is newly set, the RTC information corresponding to the date and time when the setting is made, and the information of the set value when the setting is made The combination is stored in the second history memory 192 as history information.

After that, the update process of each target pointer is executed (step S2509). In the update process, first, the numerical information stored in the pointer area 126 of the first history memory 191 is read and 1 is added. It is determined whether or not the pointer information after the 1 addition exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after 1 addition is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information. Further, in the update process, the numerical information stored in the pointer area 126 of the second history memory 192 is read and added by 1. It is determined whether or not the pointer information after the 1 addition exceeds the maximum value of the pointer information in the history area 124. If the maximum value is not exceeded, the pointer information after 1 addition is overwritten in the pointer area 126 as the pointer information to be newly written. If the maximum value is exceeded, the pointer area 126 is cleared to "0" so that the pointer information to be written becomes the first pointer information.

Next, the history setting process in the present embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG.

When "1" is not set in the setting change occurrence flag of the calculation result memory 131 (step S2601: NO), the side of the first history memory 191 and the second history memory 192 that is the storage target Only means that the situation is such that history information should be stored. In this case, first, the history memories 191 and 192, which are the current storage targets, are grasped (step S2602). The operation result memory 131 is provided with a storage target flag. When the value of the storage target flag is "0", the first history memory 191 becomes a storage target, and the value of the storage target flag is "1". If this is the case, the second history memory 192 is the storage target. Since the storage target flag is provided in the calculation result memory 131, which is a memory that does not require external power supply for storage retention, the storage target flag is stored even if the supply of operating power to the management IC 66 is stopped. The value of is stored in memory.

After that, the history setting execution process is executed for the history memories 191 and 192 that are the storage targets (step S2603). Specifically, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed for one of the history memories 191 and 192 that are to be stored. As a result, the history information is stored in one of the history memories 191, 192 which is the storage target.

On the other hand, when "1" is set in the setting change occurrence flag of the calculation result memory 131 (step S2601: YES), it is a storage target of the first history memory 191 and the second history memory 192. This means that the history information should be stored not only on the side but also on the other side. In this case, the history setting execution process is executed for both the history memories 191 and 192 (step S2604). Specifically, first, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed on the first history memory 191. As a result, the history information is stored in the first history memory 191. After that, the processes of steps S1101 to S1112 of the history setting process (FIG. 26) in the first embodiment are executed on the second history memory 192. As a result, the history information is stored in the second history memory 192.

When the process of step S2603 is executed or the process of step S2604 is executed, it is determined whether or not "1" is set in the setting change occurrence flag of the calculation result memory 131 (step S2605). When an affirmative determination is made in step S2605, it is determined whether or not a predetermined number or more of ball discharge histories exist in the non-storage target history memories 191 and 192 (step S2606). Specifically, when the value of the storage target flag of the calculation result memory 131 is "0", the first history memory 191 is the storage target, so that the game area PA is stored in the second history memory 192. It is determined whether or not a predetermined number (specifically, "1000") or more of history information indicating that the game ball has been ejected is stored. Further, when the value of the storage target flag of the calculation result memory 131 is "1", the second history memory 192 is the storage target, so that the first history memory 191 is stored in the game area PA from the game area PA. It is determined whether or not a predetermined number (specifically, "1000") or more of the history information indicating that the is discharged is stored. It should be noted that the game round was executed instead of determining whether or not the history information indicating that the game ball was discharged from the game area PA is stored in a predetermined number (specifically, "1000") or more. It may be configured to determine whether or not a predetermined number (specifically, "100") or more of the history information indicating the above is stored.

If an affirmative determination is made in step S2606, the storage target change process is executed (step S2607). In the storage target change process, the value of the storage target flag of the operation result memory 131 is set to a value different from the current value between the two values, so that the first history memory 191 and the second history memory 192 Change the side to be stored. Specifically, if the value of the storage target flag is "0", the storage target is changed from the first history memory 191 to the second history memory 192 by setting the storage target flag to "1". If the value of the storage target flag is "1", the storage target is changed from the second history memory 192 to the first history memory 191 by clearing the storage target flag "0". As a result, the history memories 191 and 192 in which only the history information of the game executed after the setting state of the pachinko machine 10 is newly set is set as the storage target. Then, various parameters are calculated using the history information of the newly stored history memories 191 and 192, so that the pachinko machine 10 is executed after the setting state of the pachinko machine 10 is newly set. It is possible to derive various parameters from the game.

After that, the clearing process of the side of the first history memory 191 and the second history memory 192 that has been stored until then is executed (step S2608). Specifically, if the value of the storage target flag is "0", the second history memory 192 is cleared to "0", and if the value of the storage target flag is "1", the first history memory 191 is set to "0". "0" is cleared. After that, the setting change occurrence flag of the calculation result memory 131 is cleared to "0" (step S2609).

Next, the display output process in the present embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. 47.

When the calculation timing is set (step S2701: YES), the side of the first history memory 191 and the second history memory 192 that is to be stored is grasped (step S2702). Specifically, if the value of the storage target flag of the operation result memory 131 is "0", the first history memory 191 is grasped as a storage target, and if the value of the storage target flag is "1", the second history memory 131 is grasped as a storage target. The history memory 192 is grasped as a storage target. After that, step S1402 to step S1412 of the display output process (FIG. 30) in the first embodiment is executed by using the history information stored in the history memory 191 and 192 of the storage target grasped in step S2702. As a result, various parameters (1st to 8th parameters, 11th to 18th parameters, 21st to 26th parameters, 31st parameter, 41st to 42nd parameters) are calculated, and the calculated various parameters are calculated. It is stored in the result memory 131 (step S2703). In this case, the history information is stored in both the first history memory 191 and the second history memory 192 because "1" is set in the setting change occurrence flag of the calculation result memory 131. Even if there is, various parameters are calculated by using one of the history memories 191 and 192 that are to be stored.

When a negative determination is made in step S2701, or when the process of step S2703 is executed, the display process is executed (step S2704). The processing content of the display processing is the same as the display processing (FIG. 31) in the first embodiment.

According to the above configuration, the first history memory 191 and the second history memory 192 are provided as the history memory 117, and when a new setting state of the pachinko machine 10 is made, until then. While the history memories 191 and 192 that were the storage targets are stored as they are, the history information is also stored in the history memories 191 and 192 on the side that is not the storage target. Then, when a predetermined number or more of the history information corresponding to the ejection of the game ball from the game area PA is stored in the history memories 191 and 192 on the side that is not the storage target, the storage target is not set. The history memory 191, 192 on the side is set as the storage target as it is, and the history memory 191, 192 on the side that has been the storage target until then is cleared to "0". As a result, when a new setting of the setting state of the pachinko machine 10 is made, it is possible to calculate various parameters using only the history information of the game played at the newly set setting value. Become.

On the other hand, according to the above configuration, even if the new setting of the setting state of the pachinko machine 10 is repeatedly performed in a short period of time in order to prevent the calculation of various parameters from being performed appropriately, it is for the history to be stored. The memories 191 and 192 are maintained unchanged. As a result, even if a new setting state of the pachinko machine 10 is repeatedly set in a short period of time, it is possible to appropriately derive the management result of the game history up to that point.

The history memory 117 is not limited to a configuration in which two memories, a first history memory 191 and a second history memory 192, are provided, and the first history is not limited to one memory. A configuration may be configured in which a first history area corresponding to the memory 191 and a second history area corresponding to the second history memory 192 are set.

Further, the configuration may be such that only one history memory 117 is provided. In this case, when the total number of game balls discharged from the game area PA exceeds a predetermined number after the new setting state of the pachinko machine 10 is set, the new setting state of the pachinko machine 10 is set. The history information before the timing is deleted, and the history information after the timing when the setting is made may be stored and retained without being deleted. As a result, at the timing when a predetermined number or more of the history information is accumulated after the new setting of the setting state of the pachinko machine 10 is made, the history before the timing when the new setting of the setting state of the pachinko machine 10 is made. It is possible to make the information erased. Further, by making the history information corresponding to the new setting of the setting state of the pachinko machine 10 stored in the history memory 117, the new setting of the above setting state is performed in the history memory 117. It is possible to distinguish between the history information before the timing when the above is performed and the history information after the timing.

Further, the timing of erasing the history information is limited to the case where the total number of game balls discharged from the game area PA becomes a predetermined number or more after the new setting state of the pachinko machine 10 is made. Instead, the number of game times executed after the new setting of the setting state of the pachinko machine 10 is made may be a predetermined number or more.

Further, even if a new setting of the setting state of the pachinko machine 10 is made, if the setting value is not changed before and after that, the change of the history memory 191 and 192 of the storage target and the history information as described above are performed. Erasing is not performed, and when a new setting of the setting state of the pachinko machine 10 is made and the setting value is changed before and after that, the history memory 191 and 192 of the storage target as described above are used. The configuration may be such that the change of the history information and the deletion of the history information are performed.

<9th embodiment>
In the present embodiment, among the first to 16th buffers 122a to 122p of the input port 121 on the management side I / F 111, the type of buffer whose input signal type is determined at the design stage of the management IC 66 is described above. It is different from the first embodiment. Further, the processing configuration executed by the main CPU 63 in order to make the management CPU 112 specify the type of the input signal is different from the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 48 is an explanatory diagram for explaining the configuration of the input port 121 of the management side I / F 111 in the present embodiment.

Signals of the same type as those in the first embodiment are input to the first to seventh buffers 122a to 122g and the 16th buffer 122p. Specifically, the first signal corresponding to the detection result of the first winning opening detection sensor 42a is input to the first buffer 122a, and the second buffer 122b corresponds to the detection result of the second winning opening detection sensor 43a. Two signals are input, a third signal corresponding to the detection result of the third winning opening detection sensor 44a is input to the third buffer 122c, and a fourth signal corresponding to the detection result of the special electric detection sensor 45a is input to the fourth buffer 122d. A signal is input, a fifth signal corresponding to the detection result of the first operating port detection sensor 46a is input to the fifth buffer 122e, and a fifth signal corresponding to the detection result of the second operating port detection sensor 47a is input to the sixth buffer 122f. The sixth signal is input, the seventh signal corresponding to the detection result of the out port detection sensor 48a is input to the seventh buffer 122g, and the output instruction signal is input to the sixteenth buffer 122p.

On the other hand, in the first embodiment, the signal corresponding to the open / close execution mode is input to the eighth buffer 122h as the eighth signal, and the signal corresponding to the high frequency support mode is input to the ninth buffer 122i as the ninth signal. The signal corresponding to the front door frame 14 is input to the 10th buffer 122j as the 10th signal, the signal corresponding to the start of the game round is input to the 11th buffer 122k as the 11th signal, and the set value update signal is the 15th buffer. Although it is configured to be input to 122o, in the present embodiment, the buffers to which these signals are input are different. Specifically, the signal corresponding to the start of the game round is input to the 11th buffer 122k as the game round signal, the set value update signal is input to the 12th buffer 122l, and the signal corresponding to the open / close execution mode is in the open / close execution mode. The signal corresponding to the 13th buffer 122m is input as a signal, the signal corresponding to the high frequency support mode is input to the 14th buffer 122n as the high frequency support mode medium signal, and the signal corresponding to the front door frame 14 is the 15th door opening signal. It is input to the buffer 122o.

The game round signal is input to the 11th buffer 122k, the set value update signal is input to the 12th buffer 122l, the open / close execution mode signal is input to the 13th buffer 122m, and the 14th buffer 122n is input. It was decided at the design stage of the management IC 66 that the high frequency support mode signal was input, the door opening signal was input to the 15th buffer 122o, and the output instruction signal was input to the 16th buffer 122p. The management side CPU 112 can specify that each of the above signals corresponding to the 11th to 16th buffers 122k to 122p is input to the 11th to 16th buffers 122k to 122p without receiving an instruction from the main side CPU 63. On the other hand, what kind of signal is input to the first to tenth buffers 122a to 122j is not determined at the design stage of the management IC 66, and the type of these signals receives an instruction from the main CPU 63. This is specified by the management side CPU 112. The process for specifying the type of the signal is executed when the supply of the operating power to the main CPU 63 and the management CPU 112 is started, as in the first embodiment.

FIG. 49 is a flowchart showing the recognition process of the present embodiment executed by the main CPU 63. The recognition process is executed in step S111 in the main process (FIG. 9) as in the first embodiment.

First, "10", which is the number of the first to tenth buffers 122a to 122j to be recognized for the signal type, is set in the recognition output counter of the main RAM 65 (step S2801). After that, the output processing of the identification start signal is executed (step S2802). In the output process, the output states of the first signal input to the first buffer 122a, the open / close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n, respectively. Is set to the HI level to start the output of the identification start signal. The period for maintaining these signals at the HI level is set to a period sufficient for the management CPU 112 to recognize the output state of these signals.

After that, the information on the number of outputs corresponding to the current value of the recognition output counter of the main RAM 65 is read from the main ROM 64, and the information on the number of outputs read is set in the output counter provided in the main RAM 65 ( Step S2803). The output count counter is a counter for specifying the output count of the type identification signal by the main CPU 63.

In the present embodiment, when the management side CPU 112 is made to recognize the type of the signal input to the first buffer 122a to the tenth buffer 122j, the number of prize balls set for the ball entry unit corresponding to the signal type. Outputs the type identification signal the same number of times as. The management side CPU 112 stores information corresponding to the number of times the type identification signal is received for each of the first buffer 122a to the tenth buffer 122j in the first to tenth correspondence relation areas 123a to 123j of the correspondence relation memory 116. .. That is, the type of the signal input to the first buffer 122a to the tenth buffer 122j is grasped as the number of prize balls set for the ball entry unit corresponding to the signal type.

In step S2803, when the value of the recognition output counter is any of "10", "9", and "8", "10" corresponding to the number of prize balls of the general winning opening 31 is set in the output count counter. .. When the value of the recognition output counter is "7", "15" corresponding to the number of prize balls of the special electric winning device 32 is set in the output number counter. When the value of the recognition output counter is "6", "1" corresponding to the number of prize balls in the first operating port 33 is set in the output count counter. When the value of the recognition output counter is "5", "1" corresponding to the number of prize balls in the second operating port 34 is set in the output count counter. Further, when the value of the recognition output counter is "4", the output number counter is not executed even if the game ball enters the out port 24a although it corresponds to the out port 24a. Set to "0". Further, when the value of the recognition output counter is any of "3" to "1", the corresponding ball entry portion does not exist and the ball is blank, so "0" is set in the output count counter.

After that, the output processing of the start trigger signal is executed (step S2804). In the output process, the output of the start trigger signal is started by setting the output state of the first signal input to the first buffer 122a to the HI level. The period for maintaining the first signal at the HI level is set to a period sufficient for the management CPU 112 to recognize the output state of the first signal.

After that, on the condition that the value of the output count counter of the main RAM 65 is not "0" (step S2805: YES), that is, on the condition that a value of 1 or more is set in the output count counter in step S2803. The process proceeds to step S2806. In step S2806, the output processing of the type identification signal is executed. In the output process, the output of the type identification signal is started by setting the output state of the second signal input to the second buffer 122b to the HI level. The period for maintaining the second signal at the HI level is set to a period sufficient for the management CPU 112 to recognize the output state of the second signal.

After that, the value of the output count counter of the main RAM 65 is subtracted by 1 (step S2807), and it is determined whether or not the value of the output count counter after the subtraction is "0" (step S2808). If the value of the output count counter is 1 or more (step S2808: NO), the process returns to step S2806.

If an affirmative determination is made in step S2805, or if an affirmative determination is made in step S2808, the end trigger signal output process is executed (step S2809). In the output process, the output of the end trigger signal is started by setting the output state of the third signal input to the third buffer 122c to the HI level. The period for maintaining the third signal at the HI level is set to a period sufficient for the management CPU 112 to recognize the output state of the third signal.

After that, the value of the recognition output counter of the main RAM 65 is subtracted by 1 (step S2810), and it is determined whether or not the value of the recognition output counter after the subtraction is "0" (step S2811). If the value of the recognition output counter is 1 or more (step S2811: NO), the process returns to step S2803 and the process for recognizing the signal type corresponding to the value of the recognition output counter after 1 subtraction is executed. do.

On the other hand, when the value of the recognition output counter is "0" (step S2811: YES), the output processing of the identification end signal is executed (step S2812). In the output processing, the output states of the third signal input to the third buffer 122c, the open / close execution mode signal input to the thirteenth buffer 122m, and the high frequency support mode signal input to the fourteenth buffer 122n, respectively. Is set to the HI level to start the output of the identification end signal. The period for maintaining these signals at the HI level is set to a period sufficient for the management CPU 112 to recognize the output state of these signals.

Next, the management process in the present embodiment executed by the management side CPU 112 will be described with reference to the flowchart of FIG. The management process is started when the supply of the operating power to the management side CPU 112 is started as in the first embodiment.

First, it is determined whether or not the reception of the identification start signal from the main CPU 63 has been completed (step S2901). If the identification start signal has not been received, the setting update recognition process is executed in step S2902, and then the process of step S2901 is executed again. The processing content of the setting update recognition process is the same as that of the first embodiment.

When the reception of the identification start signal from the main CPU 63 is completed (step S2901: YES), the value of the setting target counter of the management side RAM 114 is cleared to "0" (step S2903). After that, on condition that the start trigger signal is received from the main CPU 63 (step S2904: YES), the process proceeds to step S2905. In step S2905, it is determined whether or not a type identification signal is received from the main CPU 63. When the type identification signal is received (step S2905: YES), the value of the reception count counter provided in the management side RAM 114 is added by 1 (step S2906). The reception count counter is a counter for the management CPU 112 to specify the number of times the type identification signal has been received from the main CPU 63. The value of the reception count counter is cleared to "0" when an affirmative determination is made in step S2904.

When a negative determination is made in step S2905 or when the process of step S2906 is executed, it is determined whether or not an end trigger signal has been received from the main CPU 63 (step S2907). When the end trigger signal is not received (step S2907: NO), the process returns to step S2905, and when the end trigger signal is received (step S2907: YES), the correspondence setting process is executed (step S2908). In the correspondence setting process, the reception count is set in the correspondence area corresponding to the current value in the setting target counter of the management side RAM 114 among the first to tenth correspondence areas 123a to 123j of the correspondence memory 116. Stores the value that has been set. In this case, "10" corresponding to the number of prize balls of the general winning opening 31 is set in the first correspondence area 123a, the second correspondence area 123b, and the third correspondence area 123c, and the fourth correspondence area 123d is set. Is set to "15" corresponding to the number of prize balls of the special electric winning device 32, and "1" corresponding to the number of prize balls of the first operating port 33 is set in the fifth correspondence area 123e, and the sixth correspondence relationship. In the area 123f, "1" corresponding to the number of prize balls in the second operating port 34 is set. Further, "0" is set in the 7th to 12th correspondence related areas 123g to 123l. After that, the value of the setting target counter of the management side RAM 114 is added by 1 (step S2909).

When a negative determination is made in step S2904, or when the process of step S2909 is executed, it is determined whether or not the reception of the identification end signal from the main CPU 63 is completed (step S2910). If the reception of the identification end signal is not completed (step S2910: NO), the process returns to step S2904, and the processing after step S2905 is performed on condition that the start trigger signal is received from the main CPU 63 (step S2904: YES). Run. When the reception of the identification end signal from the main CPU 63 is completed (step S2910: YES), the history setting process in step S2911, the display output process in step S2912, and the external output process in step S2913 are repeatedly executed.

FIG. 51 is a time chart showing how the correspondence relationship information between the first to tenth buffers 122a to 122j and the types of signals input to these buffers 122a to 122j is stored in the correspondence relationship memory 116. FIG. 51 (a) shows a period during which the output state of the first signal is at the HI level, and FIG. 51 (b) shows a period during which the output state of the second signal is at the HI level. ) Indicates the period during which the output state of the third signal is at the HI level, FIG. 51 (d) indicates the period during which the output state of the signal during the open / close execution mode is at the HI level, and FIG. 51 (e) shows the period. The period during which the output state of the signal during the high frequency support mode is at the HI level is shown, and FIG. 51 (f) shows the types of signals input to the first to tenth buffers 122a to 122j and these buffers 122a to 122j. FIG. 51 (g) shows the execution period of the identification state in which the process for identifying the correspondence is executed, FIG. 51 (g) shows the timing when the value of the reception count counter of the management side RAM 114 is added by 1, and FIG. 51 (h) shows the timing. Indicates the timing at which the correspondence setting process (step S2908) is executed by the management side CPU 112.

When the supply of the operating power to the main CPU 63 and the management CPU 112 is started, the first signal is shown at the timing of t1 as shown in FIGS. 51 (a), 51 (d) and 51 (e). , The output state of the signal in the open / close execution mode and the signal in the high frequency support mode is changed from the LOW level to the HI level. As a result, the output of the identification start signal from the main CPU 63 to the management CPU 112 is started. After that, at the timing of t2, the output states of the first signal, the open / close execution mode signal, and the high frequency support mode signal are changed from the HI level to the LOW bell. As a result, the output of the identification start signal from the main CPU 63 to the management CPU 112 is stopped. At the timing of t2, the management side CPU 112 makes an affirmative determination in step S2901 of the management process (FIG. 50), so that the identification state is entered as shown in FIG. 51 (f).

After that, the output state of the first signal is maintained at the HI level from the timing of t3 to the timing of t4 as shown in FIG. 51 (a). As a result, the start trigger signal is output to the management side CPU 112. Then, as shown in FIG. 51 (b), the output state of the second signal is maintained at the HI level from the timing of t5 to the timing of t7. As a result, the type identification signal is output once to the management side CPU 112. In this case, at the timing of t6, the value of the reception count counter of the management side RAM 114 is incremented by 1 as shown in FIG. 51 (g).

After that, the output state of the third signal is maintained at the HI level from the timing of t8 to the timing of t10 as shown in FIG. 51 (c). As a result, the end trigger signal is output to the management side CPU 112. In this case, at the timing of t9, the management side CPU 112 executes the correspondence setting process as shown in FIG. 51 (h). Since the value of the reception count counter is "1" at the timing when the correspondence relationship setting process is executed, "1" is provided as the correspondence relationship information in the correspondence relation areas 123a to 123j to be set this time in the correspondence relation memory 116. ”Information is stored.

After that, the output state of the first signal is maintained at the HI level as shown in FIG. 51 (a) from the timing of t11 to the timing of t12. As a result, the start trigger signal is output to the management side CPU 112. Then, as shown in FIG. 51 (b), the timing of t13 to the timing of t15, the timing of t16 to the timing of t18, the timing of t19 to the timing of t21, and the timing of t22 to the timing of t24 are second. The signal output state is maintained at the HI level. As a result, the type identification signal is output once to the management side CPU 112. In this case, the value of the reception count counter of the management side RAM 114 is added by 1 at each of the timing of t14, the timing of t17, the timing of t20, and the timing of t23, as shown in FIG. 51 (g).

After that, the output state of the third signal is maintained at the HI level from the timing of t25 to the timing of t27 as shown in FIG. 51 (c). As a result, the end trigger signal is output to the management side CPU 112. In this case, at the timing of t26, the management side CPU 112 executes the correspondence setting process as shown in FIG. 51 (h). Since the value of the reception count counter is "10" at the timing when the correspondence relationship setting process is executed, "10" is provided as the correspondence relationship information in the correspondence relation areas 123a to 123j to be set this time in the correspondence relation memory 116. ”Information is stored.

After that, at the timing of t28, as shown in FIGS. 51 (c), 51 (d), and 51 (e), the output states of the third signal, the open / close execution mode signal, and the high frequency support mode signal are LOW. The level is changed to the HI level. As a result, the output of the identification end signal from the main CPU 63 to the management CPU 112 is started. After that, at the timing of t29, the output states of the third signal, the open / close execution mode signal, and the high frequency support mode signal are changed from the HI level to the LOW bell. As a result, the output of the identification end signal from the main CPU 63 to the management CPU 112 is stopped. At the timing of t29, the management side CPU 112 makes an affirmative determination in step S2910 of the management process (FIG. 50), so that the identification state is released as shown in FIG. 51 (f).

Since the information on the number of prize balls is stored as the correspondence information in the present embodiment, the history information stored in the history memory 117 includes the prize balls corresponding to the ball entry portion that triggered the storage of the history information. Information on the number of pieces is included as correspondence information. In this configuration, when there are a plurality of types of ball entry portions having the same number of prize balls, it is not possible to distinguish between the ball entry portions in the history information. Specifically, since the number of prize balls is one in each of the first operating port 33 and the second operating port 34, it is possible to distinguish between the first operating port 33 and the second operating port 34 in the history information. Can not. Under such circumstances, the number of prize balls may be different between the first operating port 33 and the second operating port 34. Thereby, even in the configuration in which the history information is stored as in the present embodiment, it is possible to distinguish between the first operating port 33 and the second operating port 34 in the history information.

According to the present embodiment described in detail above, not only the set value update signal and the output instruction signal, but also the information corresponding to whether or not the game round has been started, and the information corresponding to whether or not the opening / closing execution mode is in progress. The main CPU 63 also indicates that the information corresponding to whether or not the high frequency support mode is in and the information corresponding to whether or not the front door frame 14 is open is a signal path corresponding to such information. It is possible for the management side CPU 112 to specify the correspondence even if the correspondence information of the above is not received. In this case, only the information corresponding to the detection results of the ball entry detection sensors 42a to 48a is the information that the main CPU 63 needs to make the management CPU 112 recognize the correspondence relationship between each information and each signal path 118a to 118j. Become. Then, when the management side CPU 112 is made to recognize the correspondence information, the same number of pulse signals as the number of prize balls corresponding to the ball entry detection sensors 42a to 48a are generated from the main side CPU 63 to the management side CPU 112 by using the second signal. Is output to. This makes it possible to simplify the configuration related to the transmission of correspondence information.

<10th Embodiment>
In the present embodiment, the configuration for providing the information of each ball entry result to the management IC 66 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 52 is an explanatory diagram for explaining the configuration of a signal path for inputting the detection results of the ball entry detection sensors 42a to 48a to the main CPU 63 and the management IC 66.

The detection result of the first winning opening detection sensor 42a is input to the main CPU 63 through the first signal path SL11. Further, the detection result of the second winning opening detection sensor 43a is input to the main CPU 63 through the second signal path SL12. Further, the detection result of the third winning opening detection sensor 44a is input to the main CPU 63 through the third signal path SL13. Further, the detection result of the special electric detection sensor 45a is input to the main CPU 63 through the fourth signal path SL14. Further, the detection result of the first operating port detection sensor 46a is input to the main CPU 63 through the fifth signal path SL15. Further, the detection result of the second operating port detection sensor 47a is input to the main CPU 63 through the sixth signal path SL16. Further, the detection result of the out port detection sensor 48a is input to the main CPU 63 through the seventh signal path SL17.

The first branch path SL21 is formed so as to branch from an intermediate position of the first signal path SL11, and the first branch path SL21 is electrically connected to the management IC 66. Further, the second branch path SL22 is formed so as to branch from an intermediate position of the second signal path SL12, and the second branch path SL22 is electrically connected to the management IC 66. Further, the third branch path SL23 is formed so as to branch from an intermediate position of the third signal path SL13, and the third branch path SL23 is electrically connected to the management IC 66. Further, the fourth branch path SL24 is formed so as to branch from an intermediate position of the fourth signal path SL14, and the fourth branch path SL24 is electrically connected to the management IC 66. Further, the fifth branch path SL25 is formed so as to branch from an intermediate position of the fifth signal path SL15, and the fifth branch path SL25 is electrically connected to the management IC 66. Further, the sixth branch path SL26 is formed so as to branch from an intermediate position of the sixth signal path SL16, and the sixth branch path SL26 is electrically connected to the management IC 66. Further, the 7th branch path SL27 is formed so as to branch from an intermediate position of the 7th signal path SL17, and the 7th branch path SL27 is electrically connected to the management IC 66.

With the above configuration, the detection results of the ball entry detection sensors 42a to 48a are input to the management IC 66 without intervening processing by the main CPU 63. As a result, the main CPU 63 executes a process for causing the management side CPU 112 to recognize the ball entry results of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. Therefore, it is possible to reduce the processing load of the main CPU 63.

Further, the branch points of the branch paths SL21 to SL27 from the signal paths SL11 to SL17 exist in the MPU 62. As a result, it becomes possible to make it difficult to access the branch point and each branch route SL21 to SL27 from the outside, and it is possible to prevent fraudulent acts in which an abnormal ball entry result is input only to the management IC 66. ..

<11th Embodiment>
In the present embodiment, the configuration of the display device for displaying the management result of the game history is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 53 is a front view of the main control device 60 in this embodiment.

In the first embodiment, the main control device 60 is provided with the first notification display device 69a, the second notification display device 69b, and the third notification display device 69c, but in the present embodiment, the first notification display device 69c is provided. A display device 201, a second notification display device 202, a third notification display device 203, and a fourth notification display device 204 are provided. These first to fourth notification display devices 201 to 204 are provided side by side on the element mounting surface of the main control board 61.

The first to fourth notification display devices 201 to 204 are all segment display devices in which seven LED display segments are arranged, but the present invention is not limited to this, and a single multicolor light emitting type is used. It may be a light emitting body, a liquid crystal display device, or an organic EL display. All of the first to fourth notification display devices 201 to 204 are installed so that their display surfaces face the direction in which the element mounting surface of the main control board 61 faces, and the facing wall portion 60b of the board box 60a provides. It is covered. In this case, since the substrate box 60a is transparently formed, the display surfaces of the first to fourth notification display devices 201 to 204 housed in the substrate box 60a are visually inspected from the outside of the substrate box 60a. It becomes possible. Further, since the main control device 60 is mounted on the back surface of the resin base 21 in the board box 60a so that the facing wall portion 60b facing the element mounting surface of the main control board 61 faces the rear of the pachinko machine 10. When the main body 12 is opened to the front of the pachinko machine 10 with respect to the outer frame 11 and the back surface of the resin base 21 is exposed to the front of the pachinko machine 10, the first to fourth notification display devices 201 are exposed through the facing wall portion 60b. It becomes possible to visually check the display surface of ~ 204.

Alphabets such as "A", "E", "H", "L", and "O" are displayed on the display surface of the first notification display device 201. On the other hand, in the second notification display device 202, the third notification display device 203, and the fourth notification display device 204, numbers are displayed in the range of "0" to "9". The management result of the game history is notified by using the first to fourth notification display devices 201 to 204. In this case, the management result of the game history that is the target of notification in the first notification display device 201 and the second notification display device 202 (the first to eighth parameters in the first embodiment, the eleventh to the eighteenth). Display corresponding to the types of parameters, 21st to 26th parameters, 31st parameters, 41st to 42nd parameters) is performed, and the third notification display device 203 and the fourth notification display device 204 are notification targets. The display corresponding to the content of the management result of the game history of the type is displayed.

Specifically, as the types of game history management results, the 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter and the 41st to 42nd parameters in the first embodiment are described. Exists. In the first notification display device 201, a display corresponding to the type of the parameter group to be notified is performed. Specifically, when any of the first to eighth parameters is the notification target, "A" is displayed on the first notification display device 201, and any of the eleventh to eighteenth parameters is displayed. When it is a notification target, "E" is displayed on the first notification display device 201, and when any of the 21st to 26th parameters is a notification target, the first notification display device When "H" is displayed in 201 and any of the 31st parameters is the notification target, "L" is displayed in the first notification display device 201, and the 41st to 42nd parameters are notified. If it is the target, "O" is displayed on the first notification display device 201.

The second notification display device 202 displays the order corresponding to the type of the management result of the game history that is the notification target among the arrangement order of the management results of the game history in the parameter group that is the notification target. Explaining the parameter group of the first to eighth parameters as an example, when the first parameter is the notification target, "1" is displayed on the second notification display device 202, and the second parameter is If it is a notification target, "2" is displayed on the second notification display device 202, and if the third parameter is a notification target, "3" is displayed on the second notification display device 202. Is displayed, "4" is displayed on the second notification display device 202 when the fourth parameter is the notification target, and when the fifth parameter is the notification target, the second notification is displayed. When "5" is displayed on the display device 202 and the sixth parameter is the notification target, "6" is displayed on the second notification display device 202 and the seventh parameter is the notification target. If so, "7" is displayed on the second notification display device 202, and "8" is displayed on the second notification display device 202 when the eighth parameter is the notification target. Further, explaining the parameter group of the 21st to 26th parameters as an example, when the 21st parameter is the notification target, "1" is displayed on the second notification display device 202, and the 22nd parameter is displayed. When the parameter is the notification target, "2" is displayed on the second notification display device 202, and when the 23rd parameter is the notification target, "2" is displayed on the second notification display device 202. 3 ”is displayed, and when the 24th parameter is the notification target,“ 4 ”is displayed on the second notification display device 202, and when the 25th parameter is the notification target, the second "5" is displayed on the notification display device 202, and "6" is displayed on the second notification display device 202 when the 26th parameter is the notification target.

Regarding the display contents of the third notification display device 203 and the fourth notification display device 204, the number corresponding to the tens place among the values obtained by multiplying the parameters to be notified by 100 is for the third notification. It is displayed on the display device 203, and the number corresponding to the ones digit is displayed on the fourth notification display device 204.

In the first to fourth notification display devices 201 to 204, the first to eighth parameters, the eleventh to eighteenth parameters, the 21st to 26th parameters, the 31st parameter, and the 41st to 42nd parameters are present. The display corresponding to the parameter calculation result is sequentially switched according to a predetermined order, and after the calculation result of the 42nd parameter, which is the display target of the last order, is displayed, the first parameter, which is the display target of the first order, is displayed. The calculation result of is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 2 seconds. On the other hand, the calculation cycle of the various parameters in the management side CPU 112 is 51 seconds, and the number of various parameters is 25. Therefore, the various parameters calculated by the management side CPU 112 are to be notified by the first to fourth notification display devices 201 to 202 at least once.

In the first to fourth notification display devices 201 to 204, not only the notification of the management result of the game history but also the changeable state in which the setting state of the pachinko machine 10 can be changed is possible as in the first embodiment. In, the value corresponding to the current set value is displayed. Specifically, in the changeable state, the first to third notification display devices 201 to 203 are turned off, whereas the side-by-side first to fourth notification display devices 204 are present at the right end. A value corresponding to the current set value is displayed on the fourth notification display device 204. That is, when "setting 1" is selected in the changeable state, "1" is displayed on the fourth notification display device 204, and when "setting 2" is selected in the changeable state, "setting 2" is selected. "2" is displayed on the 4th notification display device 204, and when "Setting 3" is selected in the changeable state, "3" is displayed on the 4th notification display device 204 and can be changed. When "setting 4" is selected in the state, "4" is displayed on the fourth notification display device 204, and when "setting 5" is selected in the changeable state, the fourth notification is used. “5” is displayed on the display device 204, and “6” is displayed on the fourth notification display device 204 when “setting 6” is selected in the changeable state.

Next, an electrical configuration for performing various displays on the first to fourth notification display devices 201 to 204 based on the control of the MPU 62 will be described. FIG. 54 is a block diagram for explaining an electrical configuration for performing various displays in the first to fourth notification display devices 201 to 204 based on the control of the MPU 62.

As described above, the main control board 61 is provided with the MPU 62 and the first to fourth notification display devices 201 to 204. Further, the main control board 61 is provided with a first display IC 205, a second display IC 206, a third display IC 207, and a fourth display IC 208.

The first display IC 205 is provided corresponding to the first notification display device 201, and is electrically connected to the MPU 62 by the signal path SL31 and electrically connected to the first notification display device 201 by the signal path SL32. It is connected. The first display IC 205 is provided with a storage buffer for storing the display data received from the MPU 62, and the display control of the first notification display device 201, that is, each display, is performed according to the display data stored in the storage buffer. Controls the light emission of the segment. The first display IC 205 can store and hold the display data stored in the storage buffer when the operating power is supplied, and the display content corresponding to the stored display data is displayed on the first notification display device. It is continuously displayed on 201. Then, when the display data is changed by the MPU 62, the display of the first notification display device 201 is changed to the display content corresponding to the changed display data. Further, in the situation where the display data is not set by the MPU 62 after the supply of the operating power to the first display IC 205 is started, the display data becomes all "0" data, but in this case, The first notification display device 201 is in a non-display state, that is, in a light-off state.

However, the configuration is not limited to this, and even if the supply of operating power to the pachinko machine 10 is stopped due to the backup power being supplied to the first display IC 205, the first display IC 205 displays the data. The data may be stored and retained. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display displayed on the first notification display device 201 immediately before the supply of the operating power of the pachinko machine 10 is stopped is the relevant display. It will be started by the first notification display device 201.

The second display IC 206 is provided corresponding to the second notification display device 202, and is electrically connected to the MPU 62 by the signal path SL33 and electrically connected to the second notification display device 202 by the signal path SL34. It is connected. The second display IC 206 is provided with a storage buffer for storing the display data received from the MPU 62, and the display control of the second notification display device 202, that is, each display, is performed according to the display data stored in the storage buffer. Controls the light emission of the segment. The second display IC 206 can store and hold the display data stored in the storage buffer when the operating power is supplied, and the display content corresponding to the stored display data is displayed by the second notification display device. It is continuously displayed on 202. Then, when the display data is changed by the MPU 62, the display of the second notification display device 202 is changed to the display content corresponding to the changed display data. Further, in the situation where the display data is not set by the MPU 62 after the supply of the operating power to the second display IC 206 is started, the display data becomes all "0" data, but in this case, The second notification display device 202 is in a non-display state, that is, in a light-off state.

However, the configuration is not limited to this, and even if the supply of operating power to the pachinko machine 10 is stopped due to the backup power being supplied to the second display IC 206, the second display IC 206 displays the data. The data may be stored and retained. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display displayed on the second notification display device 202 immediately before the supply of the operating power of the pachinko machine 10 is stopped is the relevant display. It will be started by the second notification display device 202.

The third display IC 207 is provided corresponding to the third notification display device 203, and is electrically connected to the MPU 62 by the signal path SL35 and electrically connected to the third notification display device 203 by the signal path SL36. It is connected. The third display IC 207 is provided with a storage buffer for storing the display data received from the MPU 62, and the display control of the third notification display device 203, that is, each display, is performed according to the display data stored in the storage buffer. Controls the light emission of the segment. The third display IC 207 can store and hold the display data stored in the storage buffer when the operating power is supplied, and displays the display contents corresponding to the stored display data in the third notification display device. It is continuously displayed on 203. Then, when the display data is changed by the MPU 62, the display of the third notification display device 203 is changed to the display content corresponding to the changed display data. Further, in the situation where the display data is not set by the MPU 62 after the supply of the operating power to the third display IC 207 is started, the display data becomes all "0" data. In this case, The third notification display device 203 is in a non-display state, that is, in a light-off state.

However, the configuration is not limited to this, and even if the supply of operating power to the pachinko machine 10 is stopped due to the backup power being supplied to the third display IC 207, the third display IC 207 displays the data. The data may be stored and retained. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display displayed on the third notification display device 203 immediately before the supply of the operating power of the pachinko machine 10 is stopped is the relevant display. It will be started by the third notification display device 203.

The fourth display IC 208 is provided corresponding to the fourth notification display device 204, and is electrically connected to the MPU 62 by the signal path SL37 and electrically connected to the fourth notification display device 204 by the signal path SL38. It is connected. The fourth display IC 208 is provided with a storage buffer for storing the display data received from the MPU 62, and the display control of the fourth notification display device 204, that is, each display, is performed according to the display data stored in the storage buffer. Controls the light emission of the segment. The fourth display IC 208 can store and hold the display data stored in the storage buffer when the operating power is supplied, and the display content corresponding to the stored display data is displayed on the fourth notification display device. It is displayed continuously on 204. Then, when the display data is changed by the MPU 62, the display of the fourth notification display device 204 is changed to the display content corresponding to the changed display data. Further, in the situation where the display data is not set by the MPU 62 after the supply of the operating power to the fourth display IC 208 is started, the display data becomes all "0" data, but in this case, The fourth notification display device 204 is in a non-display state, that is, in a light-off state.

However, the configuration is not limited to this, and even if the supply of operating power to the pachinko machine 10 is stopped due to the backup power being supplied to the fourth display IC 208, the display is displayed on the fourth display IC 208. The data may be stored and retained. In this case, when the supply of the operating power to the pachinko machine 10 is started, the display displayed on the fourth notification display device 204 immediately before the supply of the operating power of the pachinko machine 10 is stopped is the relevant display. It will be started by the fourth notification display device 204.

The output of the display data to the first to fourth display ICs 205 to 208 is performed by the MPU 62, and the output setting of the display data is performed by the main CPU 63 and the management side CPU 112, respectively. That is, the main CPU 63 executes the display control of the first to fourth notification display devices 201 to 204, and the management side CPU 112 executes the display control of the first to fourth notification display devices 201 to 204. In this case, the period for which the display data output setting is performed is adjusted so that the main CPU 63 and the management side CPU 112 do not perform the display data output setting at the same time. Specifically, the output setting of the display data is performed by the main CPU 63 in the changeable state in which the setting state of the pachinko machine 10 can be changed after the supply of the operating power to the MPU 62 is started. However, the management side CPU 112 does not set the output of the display data. On the other hand, in the state where the set value cannot be changed, the management side CPU 112 sets the display data output, whereas the main side CPU 63 does not set the display data output.

If the display data output setting by the main CPU 63 and the display data output setting by the management CPU 112 are performed at the same time, the display data output setting by the main CPU 63 has priority. However, the present invention is not limited to this, and the output setting of the display data by the management CPU 112 may be prioritized.

Next, the display process in the present embodiment executed by the management CPU 112 will be described with reference to the flowchart of FIG. 55.

First, the value of the update timing counter of the management side RAM 114 is subtracted by 1 (step S3001). The update timing counter is a counter for the management side CPU 112 to specify that it is the timing to update the display contents of the management result of the game history in the first to fourth notification display devices 201 to 204. After that, by determining whether or not the value of the update timing counter after 1 subtraction is "0", it is time to update the display contents of the first to fourth notification display devices 201 to 204. Is determined (step S3002).

If an affirmative determination is made in step S3002, the value of the display target counter of the management side RAM 114 is added by 1 (step S3003). Then, when the value of the display target counter after 1 addition exceeds the maximum value "24" (step S3004: YES), the value of the display target counter is cleared to "0" (step S3005). The display target counter is a counter for the management side CPU 112 to specify the type of the parameter to be displayed in the first to fourth notification display devices 201 to 204. The 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter, the 41st to 42nd parameters, and the counters to be displayed of "0" to "24". There is a one-to-one correspondence with the possible values. For example, when the value of the display target counter is "0", the first parameter to be displayed first becomes the display target of the first to fourth notification display devices 201 to 204, and the value of the display target counter is "24". If, the 42nd parameter, which is the last display target, is the display target of the first to fourth notification display devices 201 to 204.

When a negative determination is made in step S3004 or the process of step S3005 is executed, the display data corresponding to the parameter type corresponding to the value of the display target counter is read from the management side ROM 113 (step S3006). Then, the display data setting process corresponding to the first notification display device 201 is executed (step S3007), and the display data setting process corresponding to the second notification display device 202 is executed (step S3008). For example, if the value of the display target counter is "0" and the first parameter is the display target, the display data for displaying "A" on the first notification display device 201 is displayed on the first display IC 205. At the same time, the display data for displaying "1" on the second notification display device 202 is output to the second display IC 206. Further, for example, if the value of the display target counter is "24" and the 42nd parameter is the display target, the display data for displaying "O" on the first notification display device 201 is first displayed. In addition to outputting to the IC 205, display data for displaying "2" on the second notification display device 202 is output to the second display IC 206.

After that, the parameter corresponding to the value of the display target counter is read from the operation result memory 131, and the display data corresponding to the tens place and the display data corresponding to the ones place as a result of multiplying the read parameter by 100 are read. Read from the management side ROM 113 (step S3009). Then, the display control of the third notification display device 203 is controlled so that the number corresponding to the tens place of the result is displayed (step S3010), and the number corresponding to the ones place is displayed. Display control of the notification display device 204 (step S3011). For example, when the result of multiplying by 100 is "53", the display data for displaying "5" on the third notification display device 203 is output to the third display IC 207 and is output to the fourth notification display device 204. The display data for displaying "3" is output to the fourth display IC 208.

After that, a value corresponding to 2 seconds is set in the update timing counter of the management side RAM 114 as a value corresponding to the next update timing (step S3012).

By executing the display process as described above, the management result of the game history is displayed on the first to fourth notification display devices 201 to 204. The management result of the game history is displayed regardless of whether or not the game is continued, and the game machine main body 12 is opened with respect to the outer frame 11 to open the main control device 60 from the front of the pachinko machine 10. It is done regardless of whether it is visible or not. By making the display control of the first to fourth notification display devices 201 to 204 executed in this way regardless of the game situation and the state of the pachinko machine 10, the first to fourth notification display devices 201 It is possible to simplify the processing configuration for controlling the display of ~ 204.

The display of the management result of the game history in the first to fourth notification display devices 201 to 204 is started after the supply of the operating power to the management side CPU 112 is started and after the identification end command is received from the main side CPU 63. Will be done. In this case, the information stored in the calculation result memory 131 is stored and retained even when the supply of operating power to the pachinko machine 10 is stopped, similar to the information stored in the history memory 117. Therefore, when the supply of the operating power to the management side CPU 112 is started, the management result of the game history calculated before the supply of the operating power to the management side CPU 112 is stopped is displayed.

The first to fourth display ICs 205 to 208 store and hold the display data output from the MPU 62 while the operating power is being supplied, and the corresponding display devices for the first to fourth notifications 2001 to 204 according to the display data. Display control. Therefore, after the display of the management result of the game history is started, the first to fourth notification display devices 201 to 204 are not turned off (that is, hidden), and are turned on (that is, hidden) corresponding to some display. That is, it is in the display state).

Next, the set value update process in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG. 56.

First, the extinguishing process of the first to third notification display devices 201 to 203 is executed (step S3101). Specifically, the display data that is all "0" is output to the first to third display ICs 205 to 207. As a result, all the display segments of the first to third notification display devices 201 to 203 are turned off, and the first to third notification display devices 201 to 203 are in the non-display state. Immediately after the supply of operating power to the pachinko machine 10 is started, all the display segments of the first to fourth notification display devices 201 to 204 are in the off state, and the first to fourth notification display devices 201 ~ 204 is a hidden state. Therefore, step S3101 is a process for maintaining the first to third notification display devices 201 to 203 in the non-display state, and at the same time, any one of the first to third notification display devices 201 to 203 may have some influence. If it is in the display state, it is a process to hide it.

After that, "1" is set in the set value counter of the main RAM 65 (step S3102). The set value counter is a counter for the main CPU 63 to specify which set value the set state of the pachinko machine 10 is. By setting "1" in the set value counter, when the set value update process is executed, the set value becomes "setting 1" regardless of the set values up to that point.

After that, the display start processing of the set value in the fourth display notification device 204 is executed (step S3103). In the display start processing of the set value, the display data for displaying "1" is output to the fourth display IC 208. As a result, the number "1" corresponding to "setting 1" is displayed on the fourth notification display device 204.

After that, on condition that the setting key insertion unit 68a has not been turned off (step S3104: NO), it is determined whether or not the update button 68b has been pressed once (step S3105). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3105, the process returns to the process of step S3104, and it is determined whether or not the setting key insertion unit 68a is turned off.

When the update button 68b is pressed once (step S3105: YES), the value of the set value counter of the main RAM 65 is added by 1 (step S3106). When the value of the set value counter after 1 addition exceeds "6" (step S3107: YES), "1" is set in the set value counter (step S3108). As a result, each time the update button 68b is pressed once, it is updated to the set value one step higher, and when the update button 68b is pressed once in the situation of "setting 6", it is set to "setting 1". I will be back.

When a negative determination is made in step S3107, or when the process of step S3108 is executed, the display update process of the set value in the fourth notification display device 204 is executed (step S3109). In the display update process of the set value, the display data for displaying the numerical value corresponding to the value of the set value counter of the main RAM 65 is output to the fourth display IC 208. As a result, the number corresponding to the current set value is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the manager of the game hall can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S3109, the process returns to step S3104, and it is determined whether or not the setting key insertion unit 68a is turned off. If the OFF operation has not been performed (step S3104: NO), the processes after step S3105 are executed again. When the OFF operation is performed (step S3104: YES), the display start processing of the management result in the first to fourth notification display devices 201 to 204 is executed (step S3110).

In the display start process, a management result display start command is transmitted from the main CPU 63 to the management CPU 112. The management CPU 112 that has received the management result display start command executes a process for displaying the first parameter among the various parameters stored in the calculation result memory 131. The processing content in this case is the same as in steps S3006 to S3012 in the display processing (FIG. 55). As a result, the display corresponding to the first parameter calculated immediately before the operating power of the pachinko machine 10 is stopped last time is displayed on the first to fourth notification display devices 201 to 204.

Next, the display modes of the first to fourth notification display devices 201 to 204 will be described when the management result of the game history is displayed and when the setting state of the pachinko machine 10 is updated. FIG. 57 (a) is an explanatory diagram for explaining the display mode of the first to fourth notification display devices 201 to 204 when the management result of the game history is displayed, and FIG. 57 (b) is a pachinko machine. It is explanatory drawing for demonstrating the display mode of the 1st to 4th notification display devices 201-204 when the setting state of 10 is changed.

When the management result of the game history is displayed, at least one display segment is in the light emitting state in each of the first to fourth notification display devices 201 to 204 as shown in FIG. 57 (a). That is, each of the first to fourth notification display devices 201 to 204 is in the display state. And this is the same even if any of the 1st to 8th parameters, the 11th to 18th parameters, the 21st to 26th parameters, the 31st parameter and the 41st to 42nd parameters is to be notified. .. As a result, the manager of the game hall visually inspects that all of the first to fourth notification display devices 201 to 204 are in the display state, so that the first to fourth notification display devices 201 to 204 can be used. It is possible to grasp that the management result of the game history is displayed.

On the other hand, when the setting state of the pachinko machine 10 is changed, all the display segments of the first to third notification display devices 201 to 203 are turned off as shown in FIG. 57 (b). That is, each of the first to third notification display devices 201 to 203 is in a non-display state. Further, any one of "1" to "6" is displayed on the fourth notification display device 204. In this way, any one of "1" to "6" is displayed on the fourth notification display device 204, and each of the first to third notification display devices 201 to 203 is hidden. The manager of the game hall can grasp that the display corresponding to the set value is performed on the first to fourth notification display devices 201 to 204, and clearly grasps the current set value. It becomes possible.

Next, a state in which the first to fourth notification display devices 201 to 204 are in the display state will be described with reference to the time charts of FIGS. 58 (a) to 58 (h). FIG. 58 (a) shows the period of the changeable state in which the setting state of the pachinko machine 10 can be changed, and FIG. 58 (b) shows the update of the setting display in the first to fourth notification display devices 201 to 204. The timing is shown, FIG. 58 (c) shows a period for displaying the management result of the game history on the first to fourth notification display devices 201 to 204, and FIG. 58 (d) shows the first to fourth notification display devices. The display update timing corresponding to the management result of the game history in 201 to 204 is shown, FIG. 58 (e) shows the period during which the first notification display device 201 is in the display state, and FIG. 58 (f) shows the th. 2 The period in which the notification display device 202 is in the display state is shown, FIG. 58 (g) shows the period in which the third notification display device 203 is in the display state, and FIG. 58 (h) shows the fourth notification. Indicates the period during which the display device 204 is in the display state.

When the supply of operating power to the pachinko machine 10 is started while the setting key insertion unit 68a is turned on, the setting state of the pachinko machine 10 is changed at the timing of t1 as shown in FIG. 58 (a). Is in a changeable state. At the timing of t1, the setting display is updated as shown in FIG. 58 (b), the fourth notification display device 204 is in the display state as shown in FIG. 58 (h), and the display state is continued. In this case, since "setting 1" is selected, "1" is displayed on the fourth notification display device 204. On the other hand, at the timing of t1, as shown in FIGS. 58 (e) to 58 (g), the first to third notification display devices 201 to 203 are in a non-display state, that is, all display segments are turned off. Be maintained.

After that, the set value is changed by operating the update button 68b at each of the timing of t2, the timing of t3, the timing of t4, and the timing of t5, and as shown in FIG. 58 (b), each of these timings is performed. It becomes the update timing of the set value display. In this case, as shown in FIG. 58 (h), in the fourth notification display device 204, the display content is switched to the number corresponding to the set value after the change at each of these timings, and the display content is switched. The fourth notification display device 204 is maintained in the display state including each timing at which the above is performed. On the other hand, as shown in FIGS. 58 (e) to 58 (g), the first to third notification display devices 201 to 203 are in a non-display state, that is, for all displays, even at each of the update timings of the set value display. The segment remains off.

After that, when the setting key insertion unit 68a is turned off at the timing of t6, the changeable state is terminated as shown in FIG. 58 (a). In this case, at the timing of t6, the display period of the management result of the game history is started as shown in FIG. 58 (c). Specifically, the display of the first parameter stored in the calculation result memory 131 is started. Therefore, at the timing of t6, as shown in FIGS. 58 (e) to 58 (g), the first to third notification display devices 201 to 203 are switched from the non-display state to the display state, and the fourth notification display is displayed. The display content of the device 204 is changed, but the display state is maintained.

After that, the timing of t7, the timing of t8, the timing of t9, the timing of t10, the timing of t11 and the timing of t12 are the update timings of the display of the management result of the game history as shown in FIG. 58 (d). In this case, as shown in FIGS. 58 (e) to 58 (h), in the first to fourth notification display devices 201 to 204, the display contents corresponding to the management result of the game history after the update are displayed at each of these timings. Although it will be switched, all of the first to fourth notification display devices 201 to 204 are maintained in the display state including the timing at which the display contents are switched.

According to the present embodiment described in detail above, the following excellent effects are obtained.

In the configuration in which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, the setting state of the pachinko machine 10 can be changed, and the corresponding display is displayed in the changeable state. This is performed by the first to fourth notification display devices 201 to 204. As a result, the first to fourth notification display devices 201 to 204 can be used not only for displaying the management result of the game history but also as a display device for displaying the corresponding display in the changeable state. ..

Corresponds to the period during which the game history management result is displayed on the first to fourth notification display devices 201 to 204 and the state in which the set value can be changed on the first to fourth notification display devices 201 to 204. It is distinguished from the period during which the display is made. As a result, by grasping the situation in which the display is performed on the first to fourth notification display devices 201 to 204, any display is performed on the first to fourth notification display devices 201 to 204. It is possible to identify whether or not it is present.

When the display corresponding to the changeable state of the set value is performed, the first to fourth notification display devices 201 to 204 are displayed so as to be different from the display mode when the management result of the game history is displayed. The display is controlled. Thereby, by grasping the display mode of the first to fourth notification display devices 201 to 204, it is possible to specify which display is performed on the first to fourth notification display devices 201 to 204. It becomes possible.

A plurality of notification display devices 201 to 204 are provided. This makes it possible to display a wide variety of displays corresponding to the management results of the game history. Further, since a plurality of notification display devices 201 to 204 are present, the display mode is greatly increased depending on whether the management result of the game history is displayed or the display corresponding to the changeable state of the set value is performed. It is possible to make a difference.

When the display corresponding to the changeable state of the set value is performed, the first to third notification display devices 201 to 203, which are not in the non-display state when displaying the management result of the game history, are in the non-display state. As a result, only by confirming whether or not the first to third notification display devices 201 to 203 are in the non-display state, the display of the management result of the game history and the display corresponding to the changeable state of the set value are displayed. It is possible to clearly specify which of these is performed by the first to fourth notification display devices 201 to 204.

When the display corresponding to the changeable state of the set value is performed, the fourth notification display device 204 is in the display state, and the display content is the fourth notification display device 204 when displaying the management result of the game history. It is a display content that can be displayed in. By allowing the display contents of the fourth notification display device 204 to be duplicated in this way, the management result of the game history is displayed and the display corresponding to the changeable state of the set value is performed, respectively. It is possible not to impose restrictions on the display contents of. Further, even if the display contents of the fourth notification display device 204 can be duplicated in this way, if the display corresponding to the changeable state of the set value is performed, the first to third notification display devices Since 201 to 203 are in the non-display state, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204.

When the management result of the game history is displayed, each of the first to fourth notification display devices 201 to 204 is in the display state. As a result, the display modes of the first to fourth notification display devices 201 to 204 are clearly different between the case where the management result of the game history is displayed and the case where the display corresponding to the changeable state of the set value is performed. It becomes possible.

When the game history management result is displayed, the first to fourth notification display devices 201 to 204 are not maintained in the hidden state even if the type of the game history management result to be displayed is changed. .. As a result, it is possible to specify the management result of the game history regardless of the timing at which the first to fourth notification display devices 201 to 204 are confirmed in the situation where the management result of the game history is displayed. In addition, regardless of the timing at which the first to fourth notification display devices 201 to 204 are confirmed, the game history management results can be displayed and the set values can be changed on the first to fourth notification display devices 201 to 204. It is possible to identify which of the corresponding displays is being performed.

When the display corresponding to the changeable state of the set value is performed, only one of the fourth notification display devices 204 is in the display state. This makes it easier to understand whether or not the display corresponding to the changeable state of the set value is performed.

In the configuration in which the first to fourth notification display devices 201 to 204 are arranged in the horizontal direction, the display corresponding to the changeable state of the set value is displayed by using only the fourth notification display device 204 arranged at the right end. Will be done. This makes it easier to understand whether or not the display corresponding to the changeable state of the set value is performed.

When the management result of the game history is displayed, the display corresponding to the type of the management result of the game history to be displayed is displayed by using the first notification display device 201 and the second notification display device 202. The display corresponding to the content of the management result of the game history is performed by using the third notification display device 203 and the fourth notification display device 204. This makes it easier to grasp the management result of the game history. In this case, in the changeable state of the set value, both the first notification display device 201 and the second notification display device 202, which display the type of the management result of the game history, are in the non-display state. As a result, the non-display state of the first and second notification display devices 201 and 202 for displaying the type corresponds to the changeable state of the set value, and corresponds to the changeable state of the set value. It becomes easier to understand that the display is being performed.

Further, when the display corresponding to the changeable state of the set value is performed, not only the first notification display device 201 and the second notification display device 202 that display the type of the management result of the game history, but also the game. The third notification display device 203, which displays the contents of the history management result, is also hidden. This makes it easier to understand that the display corresponding to the changeable state of the set value is performed.

Display data is output from the MPU 62 to the first to fourth display ICs 205 to 208, and the first to fourth display ICs 205 to 208 perform predetermined display on the first to fourth notification display devices 201 to 204 according to the display data. The display data is stored and held in the first to fourth display ICs 205 to 208 in the configuration. As a result, even if the execution of the process for advancing the game is stopped in the main CPU 63 due to, for example, a radio wave detection abnormality or a vibration detection abnormality (when an affirmative determination is made in step S306). It is possible to maintain the display of the management result of the game history in the first to fourth notification display devices 201 to 204.

Among the first to fourth notification display devices 201 to 204, the targets that are in the non-display state (all off state) in the changeable state in which the setting state of the pachinko machine 10 can be changed are the first to first. It is not limited to the third notification display devices 201 to 203, and may be the first and second notification display devices 201 and 202. In this case, a predetermined display (for example, "5") different from the content of the current set value is displayed on the third notification display device 203, and the current set value is displayed on the fourth notification display device 204. The number corresponding to the above may be displayed, and the fourth notification display device 204 performs a predetermined display (for example, display of “5”) different from the content of the current set value, and the third notification is displayed. The display device 203 may be configured to display a number corresponding to the current set value. Further, the first notification display device 201 and the third notification display device 203 are in a non-display state (all off state), and the second notification display device 202 and the fourth notification display device 204 are in a display state. The first notification display device 201 and the fourth notification display device 204 are in a non-display state (all off state), and the second notification display device 202 and the third notification display device 203 are in the display state. The second notification display device 202 and the third notification display device 203 are in a non-display state (all off state), and the first notification display device 201 and the fourth notification display device 204 are displayed. The second notification display device 202 and the fourth notification display device 204 may be in a non-display state (all off state), and the first notification display device 201 and the third notification display device 203 may be in a state. May be configured to be in the display state.

Further, in the changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be in the non-display state (all off state), and the second notification display device 201 may be in the non-display state (all off state). Only the display device 202 may be in a non-display state (all off state), or only the third notification display device 203 may be in a non-display state (all off state), and the fourth notification display device may be in a non-display state. The configuration may be such that only 204 is in the non-display state (all off state).

Further, in the changeable state in which the setting state of the pachinko machine 10 can be changed, only the first notification display device 201 may be in the display state, and only the second notification display device 202 is displayed. The configuration may be such that only the third notification display device 203 is in the display state.

<12th Embodiment>
In the present embodiment, the display contents of the first notification display device 201 and the second notification display device 202 in the changeable state of the set value are different from those of the eleventh embodiment. Hereinafter, a configuration different from the eleventh embodiment will be described. The description of the same configuration as that of the eleventh embodiment is basically omitted.

FIG. 59 (a) is an explanatory diagram for explaining the configuration of the first notification display device 201, and FIG. 59 (b) is an explanatory diagram for explaining the configuration of the second notification display device 202.

As shown in FIG. 59 (a), the first notification display device 201 includes seven first to seventh display segments 201a to 201g. The first to seventh display segments 201a to 201g are all formed in a rod shape, and have a light emitting body such as an LED inside. These seven first to seventh display segments 201a to 201g are arranged so that the first notification display device 201 becomes a so-called 7-segment display.

As shown in FIG. 59B, the second notification display device 202 includes seven first to seventh display segments 202a to 202g. The first to seventh display segments 202a to 202g are all formed in a rod shape, and have a light emitting body such as an LED inside. These seven first to seventh display segments 202a to 202g are arranged so that the second notification display device 202 becomes a so-called 7-segment display.

FIG. 60 shows a case where the management result of the game history is displayed on the first to fourth notification display devices 201 to 204 and a case where the setting state of the pachinko machine 10 is in a changeable state. It is explanatory drawing for demonstrating the display contents of the 1st notification display device 201 and the 2nd notification display device 202 in the above.

The display contents of the first notification display device 201 and the second notification display device 202 when displaying the management result of the game history are the same as those in the eleventh embodiment. Therefore, any one of "A", "E", "H", "L", and "O" is displayed on the first notification display device 201, and "1" to "8" on the second notification display device 202. "Is displayed.

In this case, each of the first to seventh display segments 201a to 201g of the first notification display device 201 is "A", "E", "H", "L", in the first notification display device 201. At least one of the "O" indications is the target of light emission. That is, the display segments 201a to 201g that are not subject to light emission regardless of which of "A", "E", "H", "L", and "O" is displayed on the first notification display device 201 Does not exist.

Similarly, for the second notification display device 202, each of the first to seventh display segments 202a to 202g of the second notification display device 202 is "1" to "8" in the second notification display device 202. It is a light emitting target in at least one kind of display among the displays of. That is, no matter which of "1" to "8" is displayed on the second notification display device 202, the display segments 202a to 202g that are not the target of light emission do not exist.

In the changeable state in which the setting state of the pachinko machine 10 can be changed, the second display segment 201b and the fifth display segment 201e are in the light emitting state in the first notification display device 201. As described above, the second display segment 201b and the fifth display segment 201e may be in a light emitting state when the game history management result is displayed on the first notification display device 201. Furthermore, in any case where the management result of the game history is displayed on the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in the light emitting state. On the other hand, the display content of the first notification display device 201 in which only the second display segment 201b and the fifth display segment 201e are in the light emitting state among the first to seventh display segments 201a to 201g is the management of the game history. It does not exist when displaying the result. As a result, in the state where the set value can be changed, the display that is not displayed when the game history management result is displayed while using the display segments 201b and 201e that can be in the light emitting state when the game history management result is displayed. The mode can be displayed on the first notification display device 201. Therefore, while the display segments 201a to 201g used when displaying the management result of the game history are also used, the display corresponding to the changeable state of the set value can be displayed on the first notification display device 201. It will be possible.

In the state in which the set value can be changed, the third display segment 202c is in the light emitting state in the second notification display device 202. As described above, the third display segment 202c may be in a light emitting state when the game history management result is displayed on the second notification display device 202. On the other hand, the display content of the second notification display device 202 in which only the third display segment 202c out of the first to seventh display segments 202a to 202g is in the light emitting state exists when displaying the management result of the game history. Not done. As a result, in the state where the set value can be changed, the display mode that is not displayed when the game history management result is displayed while using the display segment 202c which can be in the light emitting state when the game history management result is displayed. It becomes possible to display on the second notification display device 202. Therefore, while the display segments 202a to 202g used when displaying the management result of the game history are also used, the display corresponding to the changeable state of the set value can be displayed on the second notification display device 202. It will be possible.

Next, the set value update process in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG.

First, the start processing of the set value display in the first and second notification display devices 201 and 202 is executed (step S3201). Specifically, regarding the first notification display device 201, the second display segment 201b and the fifth display segment 201e are in the light emitting state, and the other display segments 201a, 201c, 201d, 201f, and 201g are in the off state. Display data is output to the first display IC 205. Further, regarding the second notification display device 202, the display data in which the third display segment 202c is in the light emitting state and the other display segments 202a, 202b, 202d to 202g are in the off state is output to the second display IC 206. As a result, the display for notifying that the setting state of the pachinko machine 10 is in a changeable state is started by the first notification display device 201 and the second notification display device 202.

After that, the extinguishing process of the third notification display device 203 is executed (step S3202). Specifically, the display data that is all "0" is output to the third display IC 207. As a result, all the display segments of the third notification display device 203 are turned off, and the third notification display device 203 is in a non-display state.

After that, "1" is set in the set value counter of the main RAM 65 (step S3203). The set value counter is a counter for the main CPU 63 to specify which set value the set state of the pachinko machine 10 is. By setting "1" in the set value counter, when the set value update process is executed, the set value becomes "setting 1" regardless of the set values up to that point.

After that, the display start processing of the set value in the fourth notification display device 204 is executed (step S3204). In the display start processing of the set value, the display data for displaying "1" is output to the fourth display IC 208. As a result, the number "1" corresponding to "setting 1" is displayed on the fourth notification display device 204.

After that, on condition that the setting key insertion unit 68a has not been turned off (step S3205: NO), it is determined whether or not the update button 68b has been pressed once (step S3206). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S3206, the process returns to the process of step S3205, and it is determined whether or not the setting key insertion unit 68a is turned off.

When the update button 68b is pressed once (step S3206: YES), the value of the set value counter of the main RAM 65 is added by 1 (step S3207). When the value of the set value counter after 1 addition exceeds "6" (step S3208: YES), "1" is set in the set value counter (step S3209). As a result, each time the update button 68b is pressed once, it is updated to the set value one step higher, and when the update button 68b is pressed once in the situation of "setting 6", it is set to "setting 1". I will be back.

When a negative determination is made in step S3208, or when the process of step S3209 is executed, the display update process of the set value in the fourth notification display device 204 is executed (step S3210). In the display update process of the set value, the display data for displaying the numerical value corresponding to the value of the set value counter of the main RAM 65 is output to the fourth display IC 208. As a result, the number corresponding to the current set value is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the manager of the game hall can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S3210, the process returns to step S3205, and it is determined whether or not the setting key insertion unit 68a is turned off. If the OFF operation has not been performed (step S3205: NO), the processes after step S3206 are executed again. When the OFF operation is performed (step S3205: YES), the display start processing of the management result in the first to fourth notification display devices 201 to 204 is executed (step S3211).

In the display start process, a management result display start command is transmitted from the main CPU 63 to the management CPU 112. The management CPU 112 that has received the management result display start command executes a process for displaying the first parameter among the various parameters stored in the calculation result memory 131. The processing content in this case is the same as in steps S3006 to S3012 in the display processing (FIG. 55). As a result, the display corresponding to the first parameter calculated immediately before the operating power of the pachinko machine 10 is stopped last time is displayed on the first to fourth notification display devices 201 to 204.

According to the present embodiment described in detail above, the following excellent effects are obtained.

The set value can be changed by setting the display segments 201a to 201g and 202a to 202g of the first and second notification display devices 201 and 202, which can be in the light emitting state when the management result of the game history is displayed, in the light emitting state. The display corresponding to the status is performed. This makes it possible to minimize restrictions on the content of the display corresponding to the management result of the game history in order to diversify the display of the management result of the game history. On the other hand, for each of the first notification display device 201 and the second notification display device 202, the display segments 201a to 201g, 202a to be in the light emitting state when the display corresponding to the changeable state of the set value is performed. The combination of 202 g is a combination that does not exist when the management result of the game history is displayed. As a result, by grasping the combinations of the display segments 201a to 201g and 202a to 202g that are in the light emitting state for each of the first notification display device 201 and the second notification display device 202, the management result of the game history is displayed. It is possible to grasp which of the displays corresponding to the changeable state of the set value is being performed.

For each of the first notification display device 201 and the second notification display device 202, there are display segments 201a to 201g and 202a to 202g that do not emit light even if all patterns of display of the game history management result are performed. Not done. As a result, in order to diversify the display corresponding to the management result of the game history, it is possible to minimize the restriction on the display content of the management result of the game history.

When the display corresponding to the changeable state of the set value is performed, the third notification display device 203, which is not in the non-display state when displaying the management result of the game history, is in the non-display state. As a result, not only the display contents of the first notification display device 201 and the second notification display device 202 but also the game history can be confirmed by checking whether or not the third notification display device 203 is in the non-display state. It is possible to clearly specify which of the display of the management result and the display corresponding to the changeable state of the set value is performed by the first to fourth notification display devices 201 to 204.

It should be noted that the configuration is limited to a configuration in which only one type of display content corresponding to the changeable state in which the setting state of the pachinko machine 10 in the first and second notification display devices 201 and 202 can be changed is set. It may be configured in which a plurality of types are set. In this case, the display order of the plurality of types of display contents is predetermined, and the display contents to be displayed may be changed according to the display order each time the changeable state is newly executed. Even if there are a plurality of types of display contents corresponding to the changeable state of the set value in this way, those display contents are in the display segment 201a which is in the light emitting state when displaying the management result of the game history. The display content is displayed using ~ 201 g and 202a to 202 g, and is not displayed when displaying the management result of the game history.

Further, in one of the case of displaying the management result of the game history and the case of displaying the changeable state in which the setting state of the pachinko machine 10 can be changed, the first and second notification display devices are used. A blinking display may be performed at 201 and 202, and a display that maintains lighting may be performed on the other side. In this case, since the manager of the game hall can specify which of the display of the management result of the game history and the display corresponding to the changeable state depending on whether the display is blinking or lit, the change is made. The combination of the display segments 201a to 201g and 202a to 202g, which are in the light emitting state in the display corresponding to the possible state, may be the combination used when displaying the game history management result, and the game history management. It may be a combination that is not used when displaying the result. Further, the lighting period and the extinguishing period in the blinking display may be configured to coincide with each other in the first notification display device 201 and the second notification display device 202, or may be completely deviated from each other. , It may be configured so that only a part of it overlaps.

<13th Embodiment>
In the present embodiment, when an abnormal state occurs in the pachinko machine 10, the corresponding display is performed using the first to fourth notification display devices 201 to 204, which is different from the eleventh embodiment. There is. Hereinafter, a configuration different from the eleventh embodiment will be described. The description of the same configuration as that of the eleventh embodiment is basically omitted.

FIG. 62 is an explanatory diagram for explaining the configuration of the abnormality display area 211 provided in the main RAM 65.

The abnormality display area 211 is an area for storing information on an abnormal state to be displayed by the first to fourth notification display devices 201 to 204. The abnormality display area 211 is provided with a plurality of unit areas 211a to 211d. Specifically, the first unit area 211a, the second unit area 211b, the third unit area 211c, and the fourth unit area 211d are provided. It is possible to store one piece of information on the abnormal state of the pachinko machine 10 in each of the first to fourth unit areas 211a to 211d. That is, in the abnormality display area 211, up to four pieces of information on the abnormal state of the pachinko machine 10 can be stored and held.

Here, in the present embodiment, all the information of the abnormal state generated in the pachinko machine 10 is specified by the main CPU 63. For example, when an abnormality related to the payout of the game ball (for example, the lower plate 56a is full, the tank 75 has no ball, or the payout device 76 has an abnormality in payout) occurs, the command corresponding to the occurrence of the abnormality is issued to the payout side CPU 92. Is transmitted to the main CPU 63. Further, the pachinko machine 10 is provided with a radio wave detection sensor and a vibration detection sensor (not shown), and when an illegal radio wave is detected by the radio wave detection sensor, an abnormal signal corresponding to the radio wave detection sensor is transmitted to the main CPU 63, resulting in an abnormality. When the vibration detection sensor detects the vibration, the corresponding abnormal signal is transmitted to the main CPU 63. Further, based on specifying that normal signals are not transmitted from the ball entry detection sensors 42a to 49a, the occurrence of disconnection abnormality of the ball entry detection sensors 42a to 49a is specified.

The type of abnormal state specified by the main CPU 63 is a number larger than the maximum number of information on the abnormal state that can be stored in the abnormality display area 211. Then, when a large number of abnormal states occur at the same time, it is assumed that new abnormal states are generated even though the maximum number of abnormal state information is already stored in the abnormality display area 211. On the other hand, for the information on the abnormal state, the storage priority is set at the setting stage of the pachinko machine 10, and the information on the abnormal state is newly stored in the abnormality display area 211 in the situation where the maximum number of information on the abnormal state is already stored. When an abnormal state occurs in the above, information on the abnormal state having a high memory priority is left in the abnormality display area 211. As a result, it is possible to give priority to the notification of the abnormal state having a high memory priority.

Next, the abnormality setting process executed by the main CPU 63 will be described with reference to the flowchart of FIG. 63. The abnormality setting process is executed as the first process of the timer interrupt process (FIG. 11).

First, it is determined whether or not an abnormality display target has occurred (step S3301). The types of abnormality display targets include a full tank of the lower plate 56a, no ball in the tank 75, a payout abnormality by the payout device 76, a radio wave detection abnormality, a vibration detection abnormality, and a disconnection abnormality of the ball entry detection sensors 42a to 49a. The number of types of the abnormality display target is larger than the number of the first to fourth unit areas 211a to 211d provided in the abnormality display area 211.

When an affirmative determination is made in step S3301, whether or not the information on the abnormal state corresponding to the abnormal display target generated this time is already stored in any of the first to fourth unit areas 211a to 211d of the abnormal display area 211. Is determined (step S3302). If it is already stored, the information on the abnormal state corresponding to the abnormal display target generated this time is not stored in the abnormal display area 211. As a result, it is possible to prevent information on the same type of abnormal state from being duplicately stored in the abnormal display area 211.

When a negative determination is made in step S3302, it is determined whether or not the value of the abnormality target counter provided in the main RAM 65 is the maximum value (specifically, “4”) (step S3303). The abnormality target counter is a counter for the main CPU 63 to specify the number of areas in which the information on the abnormal state is stored in the first to fourth unit areas 211a to 211d in the abnormality display area 211.

When the value of the abnormality target counter is the maximum value (step S3303: YES), the priority comparison process is executed (step S3304). In the priority comparison process, first, among the information on the abnormal state stored in the first to fourth unit areas 211a to 211d of the abnormality display area 211, the information on the abnormal state having the lowest storage priority is specified. The memory priority is predetermined at the design stage of the pachinko machine 10. Specifically, the lower plate 56a is full → there is no ball in the tank 75 → vibration detection abnormality → payout abnormality by the payout device 76 → ball entry detection sensor 42a. The memory priority increases in the order of disconnection abnormality of ~ 49a → radio wave detection abnormality. In the priority comparison process, either the information of the abnormal state having the lowest storage priority stored in the first to fourth unit areas 211a to 211d and the abnormality display target generated this time has the higher memory priority. Is compared and judged.

When the storage priority of the abnormal display target generated this time is lower (step S3305: NO), the information of the abnormal state corresponding to the abnormal display target generated this time is not stored in the abnormal display area 211. As a result, in a configuration in which the number of types of abnormal display targets is larger than the number of the first to fourth unit areas 211a to 211d provided in the abnormal display area 211, information on the abnormal state having a high storage priority can be obtained. It is possible to leave it in the abnormality display area 211.

When the memory priority of the abnormality display target generated this time is higher (step S3305: YES), the setting process of the abnormality display area 211 is executed (step S3306). In the setting process of the abnormality display area 211 executed when the affirmative determination is made in step S3305, this time occurs in the unit areas 211a to 211d specified to store the information of the abnormality state having the lowest storage priority. Overwrites the information of the abnormal state corresponding to the abnormal display target.

On the other hand, when the value of the abnormality target counter of the main RAM 65 has not reached the maximum value (step S3303: NO), after adding 1 to the value of the abnormality target counter (step S3307), the setting process of the abnormality display area 211 is performed. Is executed (step S3306). In the setting process, one area is selected from the unit areas 211a to 211d in which the abnormal state information is not stored in the abnormal display area 211, and the abnormal state corresponding to the abnormal display target generated this time in the selected area is selected. Store information about.

In step S3306, when there is only one abnormal state information stored in the abnormal display area 211, the abnormal state information is stored in the first unit area 211a, and the abnormal state information 211 is stored in the first unit area 211a. When there is a plurality of abnormal state information stored in, the abnormal state information is stored in order from the area where the value of "n" in the nth unit areas 211a to 211b is small.

In the abnormality setting process, it is determined whether or not a cancellation event of the abnormality display target has occurred (step S3308). For example, whether or not a command has been received from the payout side CPU 92 indicating that the lower plate 56a has been cleared, that the tank 75 has no balls, or that the payout abnormality by the payout device 76 has been cleared. judge. In addition, whether or not the abnormality release operation was performed for the occurrence of the radio wave detection abnormality, whether or not the abnormality release operation was performed for the occurrence of the vibration detection abnormality, or whether or not the abnormality release operation was performed for the occurrence of the disconnection abnormality. judge.

If an affirmative determination is made in step S3308, the abnormality display area 211 is erased (step S3309). In the erasing process, it is specified whether or not the information on the abnormal state corresponding to the abnormal display target to be released this time is stored in any of the first to fourth unit areas 211a to 211d of the abnormal display area 211. , If it is stored, the information of the abnormal state is deleted by clearing the stored area to "0". In this case, if there is only one abnormal state information stored in the abnormal display area 211 after erasing, the abnormal state information is stored in the first unit area 211a, and the abnormal state is stored after erasing. When there are a plurality of abnormal state information stored in the display area 211, the abnormal state information is stored in order from the area where the value of "n" in the nth unit areas 211a to 211b is small. Further, the value of the abnormality target counter of the main RAM 65 is subtracted by 1 (step S3310).

In the abnormality setting process, it is determined whether or not the operation to start the abnormality display has occurred (step S3311). To start the abnormality display, press the update button 68b with the gaming machine main body 12 opened forward with respect to the outer frame 11 in a situation where the setting state of the pachinko machine 10 cannot be changed. It is done by manipulating.

When an affirmative determination is made in step S3311, it is determined whether or not one or more abnormal state information is stored in the abnormality display area 211 (step S3312). If the information on the abnormal state is not stored, the abnormal display on the first to fourth notification display devices 201 to 204 is not started. This makes it possible to prevent the abnormal display from starting even though the information on the abnormal state to be notified does not exist.

When an affirmative determination is made in step S3312, "1" is set in the abnormality display flag provided in the main RAM 65 (step S3313). The abnormality display flag stops the display corresponding to the management result of the game history, and displays the display corresponding to the abnormal state information stored in the abnormality display area 211 from the first to fourth notification display devices 201 to 204. This is a flag for the main CPU 63 to specify that the situation should be performed in. Even if the abnormality display start operation is performed in a situation where the abnormality display flag is already set to "1", a negative determination is made in step S3311.

After that, the cancellation setting process of displaying the management result is executed (step S3314). In the stop setting process, the display stop command is transmitted to the management side CPU 112 to temporarily stop the update of the display of the game history management result in the first to fourth notification display devices 201 to 204. Upon receiving the display stop command, the management CPU 112 stops the execution of the display process (FIG. 55). However, even if the management side CPU 112 receives the display stop command, the management side CPU 112 does not set the display data which is all "0" data in the first to fourth display ICs 205 to 208. Therefore, until the display data is transmitted from the main CPU 63 to the first to fourth display ICs 205 to 208, the display of the management result of the game history at that time is continued in the first to fourth notification display devices 201 to 204. NS.

In the abnormality setting process, it is determined whether or not an operation to end the abnormality display has occurred (step S3315). To end the abnormality display, press the reset button 68c with the gaming machine main body 12 opened forward with respect to the outer frame 11 in a situation where the setting state of the pachinko machine 10 cannot be changed. It is done by manipulating. If an affirmative determination is made in step S3315, the error display flag of the main RAM 65 is cleared to "0" (step S3316). Even if the abnormality display end operation is performed in a situation where the value of the abnormality display flag is already "0", a negative determination is made in step S3315.

After that, the cancellation / cancellation process of displaying the management result is executed (step S3317). In the cancel release process, by transmitting a cancel release command to the management side CPU 112, the update of the display of the game history management result in the first to fourth notification display devices 201 to 204 is stopped. unlock. Upon receiving the cancel release command, the management CPU 112 resumes the execution of the display process (FIG. 55). However, even if the management side CPU 112 receives the cancel release command, the management side CPU 112 does not set the display data which is all "0" data in the first to fourth display ICs 205 to 208. Therefore, until the display data is transmitted from the management side CPU 112 to the first to fourth display ICs 205 to 208, the abnormality display at that time is continued in the first to fourth notification display devices 201 to 204. Further, the management side CPU 112 continues to store the history information and calculate various parameters even when the update of the display of the management result of the game history is stopped, and the result of performing the calculation of various parameters is calculated. It is stored in the result memory 131. Therefore, when the state in which the update of the display of the game history management result is canceled is canceled, the display of the latest game history management result is immediately displayed on the first to fourth notification display devices 201 to 204. It will be restarted.

In the abnormality setting process, when "1" is set in the abnormality display flag of the main RAM 65 (step S3318: YES), the abnormality display process is executed (step S3319). FIG. 64 is a flowchart showing the abnormality display process.

First, the extinguishing process of the first and second notification display devices 201 and 202 is executed (step S3401). Specifically, the display data that is all "0" is output to the first and second display ICs 205 and 206. As a result, all the display segments of the first and second notification display devices 201 and 202 are turned off, and the first and second notification display devices 201 and 202 are hidden.

After that, the value of the update timing counter provided in the main RAM 65 is subtracted by 1 (step S3402). The update timing counter is a counter for the main CPU 63 to specify that it is the timing to update the display content of the abnormality display in the first to fourth notification display devices 201 to 204. If the value of the update timing counter is already "0", that state is maintained. After that, by determining whether or not the value of the update timing counter is "0", it is determined whether or not it is time to update the display contents of the first to fourth notification display devices 201 to 204 ((). Step S3403).

If an affirmative determination is made in step S3403, the display target counter provided in the main RAM 65 is updated (step S3404). In the update process, if this is the first process of the error display process after the error display flag of the main RAM 65 is set to "1", the display target counter is set to "0". The value of the display target counter corresponds to the first to fourth unit areas 211a to 211d of the abnormality display area 211, and specifically, the value of "0" of the display target counter corresponds to the first unit area 211a. The value of "1" of the display target counter corresponds to the second unit area 211b, the value of "2" of the display target counter corresponds to the third unit area 211c, and the value of the display target counter "3". The value of "corresponds to the fourth unit area 211d. In the update process, if this is not the first process of the error display process after the error display flag of the main RAM 65 is set to "1", the value of the display target counter is added by 1.

After that, it is determined whether or not the abnormal state information is stored in the area corresponding to the current value of the display target counter among the first to fourth unit areas 211a to 211d (step S3405). Here, as described above, when only one abnormal state information is stored, the abnormal state information is stored in the first unit area 211a, and a plurality of abnormal state information is stored. In this case, the information on the abnormal state is stored in order from the area where the value of "n" in the nth unit areas 211a to 211b is small. Therefore, if the abnormal state information is not stored in the area corresponding to the current value of the display target counter, the abnormal state information is also stored in the area corresponding to the value larger than the value of the display target counter. There will be no. If the value of the display target counter after 1 addition exceeds the maximum value of "3", the corresponding area does not exist in the first place, and the information on the abnormal state is treated as not being stored. ..

When an affirmative determination is made in step S3405, the value of the display target counter of the main RAM 65 is cleared to "0" (step S3406). Here, it is assumed that all the abnormal states that are the targets of the abnormal display are released in the situation where the abnormal display is performed. In this case, even if the abnormality display processing is executed, the abnormality display area 211 does not store the information on the abnormality state. In such a situation, the third and fourth notification display devices 203 and 204 display that the information on the abnormal state is not stored.

When a negative determination is made in step S3405 or the process of step S3406 is executed, the display target display data corresponding to the value of the display target counter of the main RAM 65 is read from the main ROM 64 (step S3407). Specifically, the information stored in the area corresponding to the value of the display target counter of the main RAM 65 is read out of the first to fourth unit areas 211a to 211d of the abnormality display area 211. Then, the display data corresponding to the information is read from the main ROM 64. The display data is set so as to have a one-to-one correspondence with the abnormal state information, and the display contents of the third and fourth notification display devices 203 and 204 based on the display data are set for each type of abnormal state information. It is different. In addition, there is display data corresponding to the absence of information on the abnormal state, and this display data is different from the display data corresponding to the information on the abnormal state. Therefore, when the information on the abnormal state does not exist, the display contents of the third and fourth notification display devices 203 and 204 are different from the display contents when the information on the abnormal state exists.

On the other hand, the display contents of the display corresponding to the information of the abnormal state in the third and fourth notification display devices 203 and 204 and the display contents of the display corresponding to the absence of the information of the abnormal state are the third and third. 4. The display content when the game history management result is displayed on the notification display devices 203 and 204 and the display content of the set value on the fourth notification display device 204 overlap. On the other hand, when displaying the management result of the game history, all of the first to fourth notification display devices 201 to 204 are in the display state, and the setting state of the pachinko machine 10 can be changed. In the state, the first to third notification display devices 201 to 203 are in the non-display state, and the fourth notification display device 204 is in the display state. When an abnormality is displayed, the first and second notification display devices are displayed. Since 201 and 202 are in the non-display state and the third and fourth notification display devices 203 and 204 are in the display state, any situation is supported even if the display contents are duplicated as described above. It becomes possible for the manager of the game hall to grasp whether it is a display.

After that, the display control of the third notification display device 203 is performed according to the display data read in step S3407 (step S3408), and the display control of the fourth notification display device 204 is performed (step S3409). In this case, the display device 203 for the third notification and the display device for the fourth notification are used regardless of whether the display corresponds to the information of the abnormal state or the display corresponding to the absence of the information of the abnormal state. None of the display devices 204 are in the non-display state (that is, they are not in the all-off state), and are in some display state.

After that, a value corresponding to 2 seconds is set in the update timing counter of the main RAM 65 as a value corresponding to the next update timing (step S3410).

According to the present embodiment described in detail above, the following excellent effects are obtained.

In the configuration in which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, the display corresponding to the abnormal state of the pachinko machine 10 is displayed on the first to fourth notification display devices 201 to 204. Is done. As a result, the first to fourth notification display devices 201 to 204 can be used not only for displaying the management result of the game history but also as a display device for displaying the abnormal state.

When the pachinko machine 10 does not have an abnormal state and the first to fourth notification display devices 201 to 204 display the display corresponding to the abnormal state, the first to fourth notification display devices 201 to 204 A display corresponding to the fact that no abnormal condition has occurred is displayed. This makes it possible to clearly identify whether or not an abnormal state has occurred in the pachinko machine 10 by checking the first to fourth notification display devices 201 to 204.

The period during which the management result of the game history is displayed on the first to fourth notification display devices 201 to 204 and the display corresponding to the abnormal state of the pachinko machine 10 on the first to fourth notification display devices 201 to 204 are displayed. It is distinguished from the period of time. As a result, by grasping the situation in which the display is performed on the first to fourth notification display devices 201 to 204, any display is performed on the first to fourth notification display devices 201 to 204. It is possible to identify whether or not it is present.

When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first to fourth notification display devices 201 to 204 are displayed so as to be different from the display mode when the management result of the game history is displayed. The display is controlled. Thereby, by grasping the display mode of the first to fourth notification display devices 201 to 204, it is possible to specify which display is performed on the first to fourth notification display devices 201 to 204. It becomes possible.

A plurality of notification display devices 201 to 204 are provided. This makes it possible to display a wide variety of displays corresponding to the management results of the game history. Further, since a plurality of notification display devices 201 to 204 are present, the display mode is greatly increased depending on whether the management result of the game history is displayed or the display corresponding to the abnormal state of the pachinko machine 10 is performed. It is possible to make a difference.

When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first and second notification display devices 201 and 202, which are not in the non-display state when displaying the management result of the game history, are in the non-display state. As a result, only by confirming whether or not the first and second notification display devices 201 and 202 are in the non-display state, the display of the management result of the game history and the display corresponding to the abnormal state of the pachinko machine 10 are displayed. It is possible to clearly specify which of these is performed by the first to fourth notification display devices 201 to 204.

When the display corresponding to the abnormal state of the pachinko machine 10 is performed, the third and fourth notification display devices 203 and 204 are in the display state, and the display content is the third when displaying the management result of the game history. , The display contents that can be displayed on the fourth notification display devices 203 and 204. By allowing the display contents of the third and fourth notification display devices 203 and 204 to be duplicated in this way, the display corresponding to the management result of the game history and the abnormal state of the pachinko machine 10 can be displayed. It is possible not to impose restrictions on each display content when it is performed. Further, even if the display contents of the third and fourth notification display devices 203 and 204 can be duplicated in this way, if the display corresponding to the abnormal state of the pachinko machine 10 is performed, the first and first displays are performed. (2) Since the notification display devices 201 and 202 are in the non-display state, it is possible to specify which display is being performed on the first to fourth notification display devices 201 to 204.

If the error display start operation is performed in a situation where the error state information is not stored in the abnormality display area 211, the abnormality state information is displayed on the first to fourth notification display devices 201 to 204 at that time. It may be configured so that the display corresponding to the fact that is not stored may be performed.

<14th Embodiment>
In the present embodiment, the processing configuration of the management output process executed by the main CPU 63 is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

FIG. 65 is a flowchart showing a management output process in the present embodiment executed by the main CPU 63.

First, it is determined whether or not "1" is set in the management start flag provided in the main RAM 65 (step S3501). The management start flag is a flag for the main CPU 63 to specify whether or not the history information should be stored in the history memory 117. In the present embodiment, the total number of game balls discharged from the game area PA after the supply of the operating power to the pachinko machine 10 is started (that is, after the supply of the operating power to the MPU 62 is started) is the management start reference. When the total number of game balls discharged from the game area PA exceeds the number corresponding to the management start reference value without storing the history information in the history memory 117 until the number corresponds to the value or more. The storage of the history information in the history memory 117 is started. At the shipping stage of the pachinko machine 10, the operation of the pachinko machine 10 may be checked before shipping. At that time, a game ball is maintained at each entry portion and the subsequent operation is checked. On the other hand, the history information is not stored in the history memory 117 until the total number of game balls discharged from the game area PA exceeds the management start reference value after the start of supplying the operating power to the pachinko machine 10. By setting this, it is possible to prevent the ball entry result and the like at the time of the above-mentioned operation check from being stored as history information.

If a negative determination is made in step S3501, "7" is set in the start-time management counter provided in the main RAM 65 (step S3502). The start-time management counter determines which of the seven ball entry detection sensors 42a to 48a is in a situation where the detection state of the game ball is specified in a situation where "1" is not set in the management start flag. It is a counter for specifying by the main CPU 63.

After that, it is determined whether or not "1" is set in the output flag of the main RAM 65 corresponding to the value of the start time management counter (step S3503). Specifically, when the value of the start management counter is "7" and corresponds to the first winning opening detection sensor 42a, it is determined whether or not "1" is set in the first output flag. , When the value of the start time management counter is "6" and corresponds to the second winning opening detection sensor 43a, it is determined whether or not "1" is set in the second output flag, and the start time management is performed. When the value of the counter is "5" and corresponds to the third winning opening detection sensor 44a, it is determined whether or not "1" is set in the third output flag, and the value of the start management counter is set. When it is "4" and corresponds to the special electric detection sensor 45a, it is determined whether or not "1" is set in the fourth output flag, and the value of the start management counter is "3" and the first When it corresponds to the operation port detection sensor 46a, it is determined whether or not "1" is set in the fifth output flag, and the value of the start management counter is "2", and the second operation port detection sensor. When it corresponds to 47a, it is determined whether or not "1" is set in the sixth output flag, and when the value of the start management counter is "1" and it corresponds to the out port 24a. Determines whether or not "1" is set in the seventh output flag. As described above, the first to seventh output flags are set to "1" in the ball entry detection process (FIG. 15).

If an affirmative determination is made in step S3503, the output flag corresponding to the value of the start management counter is cleared to "0" (step S3504). After that, the value of the discharge number counter provided in the main RAM 65 is added by 1 (step S3505). The discharge number counter is a counter for the main CPU 63 to specify the total number of game balls discharged from the game area PA in a situation where "1" is not set in the management start flag of the main RAM 65.

After that, it is determined whether or not the value of the discharge number counter is equal to or higher than the management start reference value (step S3506). The management start reference value is set to "300", but the present invention is not limited to this, and the number may be less than "300" or more than "300". ..

When a negative determination is made in step S3503 or a negative determination is made in step S3506, the value of the start-time management counter of the main RAM 65 is subtracted by 1 (step S3507). Then, it is determined whether or not the value of the start-time management counter after the subtraction of 1 is "0" (step S3508). If a negative determination is made in step S3508, the process returns to step S3503, and if an affirmative determination is made in step S3508, the management output process is terminated as it is.

On the other hand, when the value of the discharge number counter of the main RAM 65 is equal to or higher than the management start reference value (step S3506: YES), “1” is set in the management start flag of the main RAM 65 (step S3509). After that, the management process is executed (step S3510). Further, even when "1" is set in the management start flag and an affirmative determination is made in step S3501, the management process is executed (step S3510). The processing content of the management process is the same as that of steps S1001 to S1012 of the management output process (FIG. 25) in the first embodiment.

According to the above configuration, the total number of game balls discharged from the game area PA is managed after the supply of the operating power to the pachinko machine 10 is started (that is, after the supply of the operating power to the MPU 62 is started). The total number of game balls discharged from the game area PA is equal to or greater than the number corresponding to the management start reference value without storing the history information in the history memory 117 until the number corresponds to the start reference value or more. In this case, the storage of the history information in the history memory 117 is started. At the shipping stage of the pachinko machine 10, the operation of the pachinko machine 10 may be checked before shipping. At that time, a game ball is maintained at each entry portion and the subsequent operation is checked. On the other hand, the history information is not stored in the history memory 117 until the total number of game balls discharged from the game area PA exceeds the management start reference value after the start of supplying the operating power to the pachinko machine 10. By setting this, it is possible to prevent the ball entry result and the like at the time of the above-mentioned operation check from being stored as history information.

Here, for history until the total number of game balls discharged from the game area PA after the supply of operating power to the pachinko machine 10 is started as described above becomes equal to or more than the number corresponding to the management start reference value. In the configuration in which the history information is not stored in the memory 117, the management result of the game history during that period cannot be calculated. Therefore, in such a situation, the first to fourth notification display devices 201 to 204 may be configured to perform the display corresponding to the situation. For example, in each of the first to fourth notification display devices 201 to 204, all the display segments may be in a light emitting state. The display content is not displayed in either the case of displaying the management result of the game history or the case of displaying the changeable state in which the setting state of the pachinko machine 10 can be changed. By checking the first to fourth notification display devices 201 to 204, it is possible to specify whether or not the history information is not stored as described above.

It should be noted that the setting mode of the management start flag information of the main RAM 65 differs depending on whether or not the setting state of the pachinko machine 10 can be changed after the start of supplying the operating power to the pachinko machine 10. It may be configured to be used. FIG. 66 is a flowchart showing the main process in the other form executed by the main CPU 63. In steps S3601 to S3609, the same processes as in steps S101 to S109 of the main process (FIG. 9) in the first embodiment are executed, and in steps S3611 to S3620, the main process in the first embodiment (FIG. 9). The same process as in steps S110 to S119 of 9) is executed. On the other hand, in the present alternative mode, when an affirmative determination is made in step S3608, the management start flag of the main RAM 65 is cleared to "0" (step S3610), the process of step S3620 is executed, and then the management start flag of the main RAM 65 is executed. Is set to "1" (step S3621). According to this configuration, when the process for newly setting the setting state of the pachinko machine 10 is not executed, the total number of game balls discharged from the game area PA after the start of supplying the operating power to the pachinko machine 10. The history information is not stored in the history memory 117 until the value exceeds the management start reference value, and when the process for newly setting the setting state of the pachinko machine 10 is executed, the pachinko machine 10 is moved to. History information is stored in the history memory 117 regardless of the number of game balls ejected after the start of supply of operating power. As a result, in a situation where there is a high possibility that the operation check at the shipping stage of the pachinko machine 10 does not apply, it is possible to manage the game history immediately after the start of supplying the operating power to the pachinko machine 10.

Further, the history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA becomes equal to or more than the management start reference value after the supply of the operating power to the pachinko machine 10 is started. Instead of the configuration without the history memory 117, an area for storing history information may be provided until the total number of game balls exceeds the management start reference value. This makes it possible to specify the management result of the game history in the situation.

Further, the history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA becomes equal to or more than the management start reference value after the supply of the operating power to the pachinko machine 10 is started. As a condition for the occurrence of such a situation, a condition may be added in which the supply of operating power to the pachinko machine 10 is started in a situation where the history information is not stored in the history memory 117. In this case, when the supply of operating power to the pachinko machine 10 is started in the situation where the history information is already stored in the history memory 117, the total number of game balls discharged from the game area PA is the management start reference. The history information is stored in the history memory 117 from the beginning regardless of whether or not the value is equal to or greater than the value.

Further, the history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA becomes equal to or more than the management start reference value after the supply of the operating power to the pachinko machine 10 is started. In addition to or instead of the configuration that does not exist, when an abnormal state such as a radio wave detection abnormality or a vibration detection abnormality occurs, the history information may not be stored in the history memory 117 until the abnormal state is cleared. This makes it possible to prevent the history information from being stored for the event that occurred in the abnormal state.

Further, the history information is stored in the history memory 117 until the total number of game balls discharged from the game area PA becomes equal to or more than the management start reference value after the supply of the operating power to the pachinko machine 10 is started. In addition to or instead of the configuration, history information may not be stored in the history memory 117 in a situation where the gaming machine main body 12 or the front door frame 14 is open. As a result, it is possible to prevent the history information from being stored for the event that occurred in the situation where the gaming machine main body 12 or the front door frame 14 is open.

<Fifteenth Embodiment>
In the present embodiment, the execution subject of the process for managing the game history is different from that of the first embodiment. Hereinafter, a configuration different from the first embodiment will be described. The description of the same configuration as that of the first embodiment is basically omitted.

In the first embodiment, the MPU 62 is provided with the management IC 66, but in the present embodiment, the MPU 62 is not provided with the management IC 66. Instead of providing the management IC 66, in the present embodiment, the process for managing the game history is executed by the main CPU 63. Further, in the present embodiment, the main CPU 63 executes various controls by distinguishing between specific control and non-specific control. Specifically, the control related to the management of the game history is defined as non-specific control, and the control other than the non-specific control is defined as specific control including the control for advancing the game based on the game operation by the player.

Regarding the specific control, in detail, all the controls by the main process (FIG. 9) executed when the supply of the operating power to the main CPU 63 is started are included in the specific control. In this embodiment, among the main processes (FIG. 9) in the first embodiment, the recognition process (step S111), the data output process (step S112), and the set value update signal output process (step S119) are performed. Not executed. Further, even in the present embodiment, the timer interrupt processing is periodically executed so as to interrupt the processing of steps S113 to S116 in the main processing (FIG. 9), but various processing of the timer interrupt processing is performed. Of these, all processes other than the management process described later are included in the specific control. In addition, some of the management processes are included in the specific control.

FIG. 67 is an explanatory diagram for explaining a program and data setting mode in the main ROM 64. Corresponding to the fact that the control executed by the main CPU 63 is distinguished between the specific control and the non-specific control, as shown in FIG. 67, the main ROM 64 also has a program for specific control and a program for specific control. The address of the area where the data and the program for non-specific control and the data for non-specific control are stored is clearly distinguished.

Specifically, programs for specific control are aggregated and stored in a continuous area of each address within the range of addresses X (1) to X (k + 2). Further, the addresses X (k + 3) to X (k + 5) consecutive to the addresses X (1) to X (k + 2) are the addresses of the unused areas where the data is not stored, and the addresses X (k + 2) are subsequently followed by the addresses X (k + 2). Data for specific control is aggregated and stored in a continuous area of each address within the range of k + 6) to X (m + 2). Further, the addresses X (m + 3) to X (m + 5) consecutive to the addresses X (k + 6) to X (m + 2) are the addresses of the unused areas where the data is not stored, and the addresses X (m + 2) are subsequently followed. Non-specific control programs are aggregated and stored in consecutive address areas within the range of m + 6) to X (n + 2). Further, the addresses X (n + 3) to X (n + 5) consecutive to the addresses X (m + 6) to X (n + 2) are the addresses of the unused areas where the data is not stored, and the addresses X (n + 2) are subsequently followed by the addresses X (n + 5). Data for non-specific control is aggregated and stored in a continuous area of each address within the range of n + 6) to X (p + 2). The relationship between the program and data and the address as described above is set in both the physical address in the main ROM 64 and the logical address on the memory map recognized by the main CPU 63.

As described above, the program for specific control and the data for specific control and the program for non-specific control and the data for non-specific control are irrespective of the execution order of the processes for executing the corresponding control. By being stored in areas of addresses in different ranges, for example, when checking only the program for specific control and the data for specific control, the address where the program for specific control and the data for specific control are stored. It is only necessary to check the area of the range. For example, when checking only the program for non-specific control and the data for non-specific control, the address where the program for non-specific control and the data for non-specific control are stored. You only need to check the area of the range. Therefore, it is possible to efficiently perform the work when the program and the data are checked separately for the specific control and the non-specific control. In addition, it becomes possible to efficiently perform the work when the program and the data are distinguished and modified by the specific control and the non-specific control accordingly.

No data is stored between the address range of the area where the program for specific control and the data for specific control are stored and the address range of the area where the program for non-specific control and the data for non-specific control are stored. Since the address range of the unused area that has not been set is set, it becomes easy to grasp the boundary between the address range for specific control and the address range for non-specific control during the check work.

In each of the address range for specific control and the address range for non-specific control, the program and the data are stored in the address areas of different ranges regardless of the execution order of the processes for executing the corresponding control. By doing so, it is possible to efficiently perform the work when checking the program and the data separately. In addition, the address range of the unused area where no data is stored is set between the address range of the area where the program is stored and the address range of the area where the data is stored. It becomes easier to grasp the boundary between the address range and the data address range during the check work.

FIG. 68 is an explanatory diagram for explaining a setting mode of each area in the main RAM 65. Corresponding to the fact that the control executed by the main CPU 63 is distinguished between the specific control and the non-specific control, as shown in FIG. 68, the main RAM 65 also has the work area 221 for specific control and the specific control. The address range of the stack area 222 for non-specific control and the address range of the work area 223 for non-specific control and the stack area 224 for non-specific control are clearly distinguished.

Specifically, a continuous area of each address within the range of addresses Y (1) to Y (r + 2) is set as a work area 221 for specific control. Further, the addresses Y (r + 3) to Y (r + 5) consecutive to the addresses Y (1) to Y (r + 2) are the addresses of the unused areas, followed by the addresses Y (r + 6) to Y (s + 2). ) Is set as a stack area 222 for specific control. Further, addresses Y (s + 3) to Y (s + 5) consecutive to addresses Y (r + 6) to Y (s + 2) are addresses of unused areas, followed by addresses Y (s + 6) to Y (t + 2). ) Is set as a work area 223 for non-specific control. Further, the addresses Y (t + 3) to Y (t + 5) consecutive to the addresses Y (s + 6) to Y (t + 2) are the addresses of the unused areas, followed by the addresses Y (t + 6) to Y (u + 2). ) Is set as a stack area 224 for non-specific control. The relationship between each area and the address as described above is set in both the physical address in the main RAM 65 and the logical address on the memory map recognized by the main CPU 63.

When the work area 221 for specific control and the work area 223 for non-specific control are set separately as described above, the case where the specific control is executed and the case where the non-specific control is executed in the main CPU 63 As a result, different areas of the main RAM 65 are used when executing various operations and the like. As a result, when one of the specific control and the non-specific control is executed, it is possible to make it difficult for an event such as the information of the main RAM 65 required for the other to be erased to occur. Incidentally, when writing information to each work area 221,223 and reading information from each work area 221,223, a load instruction is issued by the main CPU 63.

Since the stack area 222 for specific control and the stack area 224 for non-specific control are set separately, the main CPU 63 may execute specific control or non-specific control. Different areas of the main RAM 65 are used when saving the information stored in the register of the side CPU 63 and when storing the information of the return address on the program. As a result, it is used in the case where the information stored in the register of the main CPU 63 is saved in the situation where one of the specific control and the non-specific control is being executed, and when the information of the return address in the program is stored in the other. It is possible to make it difficult for an event such as the information to be deleted to occur. Incidentally, when writing information to each stack area 222,224, a push instruction is issued by the main CPU 63, and when reading information from each stack area 222,224, a pop instruction is issued by the main CPU 63. Further, when reading information from each stack area 222 or 224, the writing order to the stack areas 222 and 224 is read first from the later information.

Here, when the main CPU 63 executes the process corresponding to the specific control, the main CPU 63 can write information to the work area 221 for the specific control and the stack area 222 for the specific control. Information can be read from the work area 221 for specific control and the stack area 222 for specific control. On the other hand, when the main CPU 63 executes the process corresponding to the specific control, the main CPU 63 can read the information from the work area 223 for the non-specific control and the stack area 224 for the non-specific control. , Information cannot be written to the work area 223 for non-specific control and the stack area 224 for non-specific control. This makes it possible to prevent accidentally erasing the information used in the process corresponding to the non-specific control in the situation where the process corresponding to the specific control is being executed.

Further, when the main CPU 63 executes the process corresponding to the non-specific control, the main CPU 63 can write information to the work area 223 for the non-specific control and the stack area 224 for the non-specific control. At the same time, information can be read from the work area 223 for non-specific control and the stack area 224 for non-specific control. On the other hand, when the main CPU 63 executes a process corresponding to the non-specific control, the main CPU 63 can read information from the work area 221 for the specific control and the stack area 222 for the specific control. Information cannot be written to the work area 221 for specific control and the stack area 222 for specific control. This makes it possible to prevent the information used in the process corresponding to the specific control from being accidentally deleted in the situation where the process corresponding to the non-specific control is being executed.

The backup power is supplied to the main RAM 65 even after the power of the pachinko machine 10 is cut off, and the backup power is the work area 221 for specific control, the stack area 222 for specific control, and the non-specific control. It is supplied to all of the work area 223 for non-specific control and the stack area 224 for non-specific control. As a result, the information stored in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control is used to shut off the power of the pachinko machine 10. Even after that, the memory is retained while the backup power is supplied.

Next, the timer interrupt processing in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG. 69. The timer interrupt process is executed periodically (for example, in a cycle of 4 milliseconds) in a situation where the processes of steps S113 to S116 are executed in the main process (FIG. 9) as in the first embodiment. The program corresponding to the timer interrupt processing is set as the program for specific control.

In steps S3701 to S3718, the same processing as in steps S301 to S318 of the timer interrupt processing (FIG. 11) in the first embodiment is executed. These processes are executed in the main CPU 63 by using the program for specific control and the data for specific control. In step S3719 in the timer interrupt processing, management processing is executed. When executing the management process, the program of the subroutine corresponding to the management process set in the specific control program is executed, but when executing the program of the subroutine, after the execution of the management process. Information for specifying the return address of the timer interrupt processing in the above is written in the stack area 222 for specific control by the push instruction. Then, when the management process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process program indicated by the return address.

FIG. 70 is a flowchart showing the management process. The processes of steps S3801 to S3805 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S3801). This prevents the timer interrupt process (FIG. 69), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "PUSH PSW", the information of the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S3802). The flag register includes a carry flag, a zero flag, a P / V flag, a sine flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution result of an arithmetic instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of such a flag register before the program of the subroutine corresponding to the management execution process is started, the information of the flag register in the state before the call of the subroutine or the change after the start of the subroutine can be obtained. It is possible to save the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

After that, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S3803). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

When the program returns to the management processing program after the management execution processing is executed, the information of the flag register saved in the stack area 222 for specific control in step S3802 by the pop instruction as "POP PSW" is stored in the main CPU 63. It returns to the flag register of (step S3804). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S3802 is executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 69) is prohibited to the state in which the timer interrupt process (FIG. 69) is permitted (step S3805). This enables new execution of timer interrupt processing.

FIG. 71 is a flowchart showing the management execution process. The processes of steps S3901 to S3915 in the management execution process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

First, as "LD SP, Y (u + 2)", Y (u + 2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S3901). The stack pointer is an area in which the address information for specifying the storage area for writing the information by the push instruction in the stack areas 222 and 224 is set by the main CPU 63. Each time a push instruction is issued, the stack pointer information is updated to the information of the storage area to be written in the next order, and each time a pop instruction is issued, the stack pointer information is written in the previous order. It is updated to the information of the address of the storage area that becomes. Further, when the stack area 224 for non-specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 224 for non-specific control, and each time the information to be stored is added. The storage area of the storage destination is changed toward the first address side in the stack area 224 for non-specific control. Therefore, in step S3901, the information of the last address in the stack area 224 for non-specific control is set in the stack pointer. The fact that information is stored from the storage area of the last address to the storage area of the first address in this way is the same for the stack area 222 for specific control.

By the way, in both the stack area 222 for specific control and the stack area 224 for non-specific control, when the push instruction is additionally executed even though the information is set in all the storage areas, the push instruction is executed. The entire area of the main RAM 65 is cleared to "0" as if an abnormality has occurred in the storage process. As a result, it is possible to prevent the game from proceeding as it is even though an abnormality has occurred in the memory processing.

After that, as "LD (_WABUF), WA", the information of the WA register of the main CPU 63 is saved in the WA buffer set in the work area 223 for non-specific control by the load instruction (step S3902). Further, as "LD (_BCBUF), BC", the information of the BC register of the main CPU 63 is saved in the BC buffer set in the work area 223 for non-specific control by the load instruction (step S3903). Further, as "LD (_DEBUF), DE", the information of the DE register of the main CPU 63 is saved in the DE buffer set in the work area 223 for non-specific control by the load instruction (step S3904). Further, as "LD (_HLBUF), HL", the information of the HL register of the main CPU 63 is saved in the HL buffer set in the work area 223 for non-specific control by the load instruction (step S3905). Further, as "LD (_IXBUF), IX", the information of the IX register of the main CPU 63 is saved in the IX buffer set in the work area 223 for non-specific control by the load instruction (step S3906). Further, as "LD (_IYBUF), IY", the information of the IY register of the main CPU 63 is saved in the IY buffer set in the work area 223 for non-specific control by the load instruction (step S3907).

In addition to the flag register described above, various general-purpose registers, auxiliary registers, and index registers are present in the registers of the main CPU 63. In this case, in steps S3902 to S3907, information on WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers. Is saved in the corresponding buffer in the work area 223 for non-specific control. The amount of information in the WA register, BC register, DE register, HL register, IX register, and IY register is 2 bytes.

These WA registers, BC registers, DE registers, HL registers, IX registers, and IY registers are registers used in the check process (step S3908), which is a process corresponding to non-specific control. By saving the information set in such registers to the work area 223 for non-specific control prior to the execution of the check process (step S3908), the information of these registers used in the specific control is non-specifically controlled. Can be evacuated before is started. Therefore, even if these registers are overwritten during the non-specific control, when the non-specific control is terminated, the information saved in the work area 223 for the non-specific control is returned to these registers to return the state of these registers. Can be returned to the state corresponding to the specific control before the non-specific control is executed.

Further, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers in the work area 223 for non-specific control, WA to be used in the check process, which is a process corresponding to non-specific control. By selectively saving the information of the register, BC register, DE register, HL register, IX register and IY register to the work area 223 for non-specific control, the register information is saved in the work area 223 for non-specific control. It is possible to reduce the capacity to be secured for this purpose. Therefore, it is possible to save the register information as described above while securing a large capacity of the work area 223 for non-specific control that can be used in the check process. As a matter of course, among various general-purpose registers, auxiliary registers and index registers in the main CPU 63, registers other than WA register, BC register, DE register, HL register, IX register and IY register correspond to non-specific control. The information set before the start of the process to be performed is stored and retained until the process corresponding to the non-specific control ends and the process corresponding to the specific control is restarted.

Further, by saving the register information in the work area 223 for non-specific control instead of saving it in the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be suppressed to a small size. It will be possible. Further, when the stack area 224 for non-specific control is used, the writing order of the information is read first from the later information as described above, so that the reading order of the information is deviated due to some noise or the like. If this happens, all the subsequent read order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information in the work area 223 for non-specific control, it is possible to prevent the above-mentioned event from occurring even when there is a large amount of information to be saved. ..

After executing the processes of steps S3902 to S3907, a check process is executed (step S3908). When the check process is executed, the subroutine program corresponding to the check process set in the non-specific control program is executed. However, when the subroutine program is executed, the management after the check process is executed. Information for specifying the return address of the execution process is written in the stack area 224 for non-specific control by the push instruction. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management execution process program indicated by the return address. The details of the check process will be described later.

After executing the check process, Y (r + α) is set as “LD SP, Y (r + α)” in the stack pointer of the main CPU 63 as a fixed address when returning to the specific control by the load instruction (step S3909). ). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

Immediately before the subroutine of the management execution process is executed in step S3803 of the management process (FIG. 70), the amount of information stored in the stack area 222 for specific control is always constant, and accordingly, the main information at the relevant timing is used. The information of the stack pointer of the side CPU 63 (that is, the value of the stack pointer) is constant. In this case, the information stored in the stack area 222 for specific control includes, for example, the information of the return address of the management process (FIG. 70) after the management execution process (FIG. 71) is completed, and the management process (FIG. 70). Information on the return address of the timer interrupt process (FIG. 69) after the end of FIG. 70) can be mentioned. The above-mentioned constant information of the stack pointer is Y (r + α). Therefore, when the check process, which is the process corresponding to the non-specific control, is completed and the process returns to the process corresponding to the specific control, Y (r + α), which is a certain amount of information, is set in the stack pointer of the main CPU 63. This makes it possible to restore the information of the stack pointer to the information immediately before the processing corresponding to the non-specific control is started. By setting fixed information in the stack pointer in this way, the information of the stack pointer is restored to the information immediately before the processing corresponding to the non-specific control is started, so that the processing corresponding to the non-specific control is started. It is not necessary to save the stack pointer information of the main CPU 63 corresponding to the specific control to the main RAM 65 before starting. Therefore, the processing load can be reduced, and it is not necessary to secure the area for saving in the main RAM 65.

After that, as "LD WA, (_WABUF)", the information saved in the WA buffer of the work area 223 for non-specific control is overwritten in the WA register of the main CPU 63 by the load instruction (step S3910). Further, as "LD BC, (_BCBUF)", the information saved in the BC buffer of the work area 223 for non-specific control is overwritten in the BC register of the main CPU 63 by the load instruction (step S3911). Further, as "LD DE, (_DEBUF)", the information saved in the DE buffer of the work area 223 for non-specific control is overwritten in the DE register of the main CPU 63 by the load instruction (step S3912). Further, as "LD HL, (_HLBUF)", the information saved in the HL buffer of the work area 223 for non-specific control is overwritten in the HL register of the main CPU 63 by the load instruction (step S3913). Further, as "LD IX, (_IXBUF)", the information saved in the IX buffer of the work area 223 for non-specific control is overwritten in the IX register of the main CPU 63 by the load instruction (step S3914). Further, as "LD IY, (_IYBUF)", the information saved in the IY buffer of the work area 223 for non-specific control is overwritten in the IY register of the main CPU 63 by the load instruction (step S3915). By executing the process of step S391-10 to step S3915, the process corresponding to the non-specific control of each information of the WA register, BC register, DE register, HL register, IX register and IY register of the main CPU 63 is started. It is possible to return to the information corresponding to the specific control immediately before the operation.

Here, the information stored in the flag register and various registers of the main CPU 63 when the process corresponding to the non-specific control is executed is not saved in the main RAM 65 when the process corresponding to the specific control is restarted. .. As a result, it is not necessary to secure a storage area for saving the above information in the work area 221 for specific control and the stack area 222 for specific control.

Further, when the process corresponding to the non-specific control is executed, the information stored in the flag register and various registers of the main CPU 63 is subjected to the process corresponding to the non-specific control after returning to the process corresponding to the specific control. Information that will not be used if it is restarted. That is, the information required for a plurality of processing times of the processing corresponding to the non-specific control executed with the processing corresponding to the specific control in between is the work area 223 for the non-specific control or the stack area for the non-specific control. It is stored in 224, and is not stored in the flag register and various registers of the main CPU 63. Therefore, even if the information stored in the flag register and various registers of the main CPU 63 is not saved in the main RAM 65 when the process corresponding to the non-specific control is executed, the process corresponding to the non-specific control is executed. Does not cause any problems.

Next, the check process executed by calling the subroutine program in step S3908 will be described. In the check process, a process for collecting game history information, a process for deriving a game history management result, and a process for notifying the management result are executed. That is, the process for collecting the game history information, the process for deriving the game history management result, and the process for notifying the management result are executed as the processes corresponding to the non-specific control.

Prior to the explanation of the check process, the contents of various areas 231 to 234 of the work area 223 for non-specific control used for managing the game history will be described. FIG. 72 is an explanatory diagram for explaining various areas 231 to 234 of the work area 223 for non-specific control used for managing the game history.

The work area 223 for non-specific control is provided with a normal counter area 231, an open / close execution mode counter area 232, and a high frequency support mode counter area 233. In each of these areas 231 to 233, the general winning counters 231a, 232a, 233a, the special electric winning counters 231b, 232b, 233b, the first operating counters 231c, 232c, 233c, the second operating counters 231d, 232d, 233d, and Out counters 231e, 232e, and 233e are provided. The general winning counters 231a, 232a, and 233a are counters for measuring the number of game balls entering the general winning opening 31 from a predetermined measurement start trigger. The special electric winning counters 231b, 232b, and 233b are counters for measuring the number of game balls entering the special electric winning device 32 from a predetermined measurement start trigger. The first operation counters 231c, 232c, and 233c are counters for measuring the number of game balls entering the first operation port 33 from a predetermined measurement start trigger. The second operation counters 231d, 232d, and 233d are counters for measuring the number of game balls entering the second operation port 34 from a predetermined measurement start trigger. The out counters 231e, 232e, and 233e are counters for measuring the number of game balls entering the out port 24a from a predetermined measurement start trigger.

Each of the counters 231a to 231e of the normal counter area 231 is a target ball entry portion 24a, in a situation where the front door frame 14 is in a closed state and is neither an open / close execution mode nor a high frequency support mode. It is used to measure the number of game balls that have entered 31 to 34. The counters 232a to 232e of the counter area 232 for the open / close execution mode enter the ball entry portions 24a, 31 to 34, which are the targets in the situation where the front door frame 14 is in the closed state and the open / close execution mode is in the open / close execution mode. It is used to measure the number of game balls that have been balled. Each of the counters 233a to 233e in the counter area 233 for the high frequency support mode is a ball entry portion 24a, 31 to 34, which is a target in a situation where the front door frame 14 is in a closed state and is in the high frequency support mode. It is used to measure the number of game balls that have entered the door.

The situation where the front door frame 14 is in the open state is not subject to measurement because the game ball enters the ball entry portions 24a, 31 to 34 with the front door frame 14 open. This is to exclude the number of balls entered from the measurement target when the ball is entered. However, the present invention is not limited to this, and the situation in which the front door frame 14 is in the open state may be configured to be measured in the same manner as in the situation in which the front door frame 14 is in the closed state.

The work area 223 for non-specific control is provided with a calculation result storage area 234 in addition to the normal counter area 231 and the open / close execution mode counter area 232 and the high frequency support mode counter area 233. The calculation result storage area 234 is an area for storing information on the management result of the game history calculated by using the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233. .. The game history management result information stored in the calculation result storage area 234 is stored and retained until the newly calculated information is overwritten by newly calculating the game history management result information.

FIG. 73 is a flowchart showing a check process executed by calling the subroutine program in step S3908. The processing of steps S4001 to S4008 in the check processing, including the processing of the subroutine, is executed by the main CPU 63 using the program for non-specific control and the data for non-specific control. When executing the processing of the subroutine, the information of the return address after the execution of the processing of the subroutine is written in the storage area corresponding to the current stack pointer value of the main CPU 63 in the stack area 224 for non-specific control. At the same time, the value of the stack pointer is updated to the information of the address of the storage area to be stored in the next order. When the subroutine processing is completed, the return address information is read from the storage area corresponding to the value in the previous order with respect to the current stack pointer value of the main CPU 63, and the return address information is supported. At the same time as returning to the program, the value of the stack pointer is updated to the information of the address of the storage area from which the information of the return address is read.

In the check process, when the front door frame 14 is in the open state (step S4001: YES), the normal ball entry management process (step S4004), the ball entry management process in the open / close execution mode (step S4005), and the high frequency. The result calculation process (step S4007) and the display process (step S4008), which will be described later, are executed without executing any of the ball entry management processes (step S4006) in the support mode. Since the game area PA is formed by the space partitioned in the front-rear direction by the back surface of the window panel 52 provided on the front door frame 14 and the front surface of the game board 24, when the front door frame 14 is opened, Even if the game area PA is opened toward the front and the game ball is launched toward the game area PA in that situation, the game ball cannot normally flow down the game area PA. In addition, when the front door frame 14 is in the open state and the game ball enters the ball entry portions 24a, 31 to 34, it is determined by the manager of the game hall for maintenance and to solve the problem. This is a case where the front door frame 14 is opened and the game ball enters due to maintenance or the like. Since the entry of such a game ball is not the entry of a game ball in the normal game execution status, it is not necessary to manage the entry of such a game ball. Therefore, in the check process, when the front door frame 14 is in the open state as described above, none of the processes of steps S4004 to S4006 is executed.

When the front door frame 14 is in the closed state and is neither in the open / close execution mode nor the high frequency support mode (steps S4001 to S4003: NO), a normal ball entry management process is executed (step S4004). Further, when the front door frame 14 is in the closed state and is in the open / close execution mode (step S4001: NO, step S4002: YES), the ball entry management process in the open / close execution mode is executed (step S4005). Further, when the front door frame 14 is in the closed state and is in the high frequency support mode (step S4001: NO, step S4003: YES), the ball entry management process in the high frequency support mode is executed (step S4006).

FIG. 74 is a flowchart showing a normal ball entry management process in step S4004.

When it is determined that one game ball is detected by the first winning opening detection sensor 42a (step S4101: YES), that is, the signal received from the first winning opening detection sensor 42a is cut from the LOW level to the HI level. When it is confirmed that the change has been made, when it is determined that one game ball has been detected by the second winning opening detection sensor 43a (step S4103: YES), that is, the signal received from the second winning opening detection sensor 43a. Is confirmed to have switched from the LOW level to the HI level, or when it is determined that one game ball has been detected by the third winning opening detection sensor 44a (step S4105: YES), that is, the third winning opening When it is confirmed that the signal received from the detection sensor 44a has been switched from the LOW level to the HI level, the value of the general winning counter 231a for normal use is added by 1 (step S4102, step S4104, step S4106).

If the ball entry management process is in the open / close execution mode, the value of the general winning counter 232a for the open / close execution mode is added by 1 as the process corresponding to step S4102, step S4104, and step S4106, and the entry in the high frequency support mode is entered. In the case of the ball management process, the value of the general winning counter 233a for the high frequency support mode is added by 1 as the process corresponding to step S4102, step S4104, and step S4106. Further, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, the detection results of the first to third winning opening detection sensors 42a to 44a are also monitored, and the first When it is determined that one game ball is detected by any of the 1st to 3rd prize opening detection sensors 42a to 44a, a process for paying out the number of game balls corresponding to the general winning opening 31. To execute.

When it was determined that one game ball was detected by the special electric detection sensor 45a (step S4107: YES), that is, it was confirmed that the signal received from the special electric detection sensor 45a was switched from the LOW level to the HI level. In this case, the value of the special electric winning counter 231b for normal use is added by 1 (step S4108).

If it is a ball entry management process in the open / close execution mode, the value of the special electric winning counter 232b for the open / close execution mode is added by 1 as a process corresponding to step S4108, and if it is a ball entry management process in the high frequency support mode. As a process corresponding to step S4108, the value of the special electric winning counter 233b for the high frequency support mode is added by 1. Further, the detection result of the special electric power detection sensor 45a is also monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, and one special electric power detection sensor 45a is used. When it is determined that the game balls have been detected, a process for ensuring that the number of game balls corresponding to the special electric winning device 32 is paid out is executed, and a process for specifying the end timing of the round game is executed.

When it is determined that one game ball is detected by the first operating port detection sensor 46a (step S4109: YES), that is, the signal received from the first operating port detection sensor 46a is cut from the LOW level to the HI level. When it is confirmed that the change has been made, the value of the normal first operation counter 231c is added by 1 (step S4110).

If the ball entry management process is in the open / close execution mode, the value of the first operation counter 232c for the open / close execution mode is added by 1 as the process corresponding to step S4110, and the ball entry management process is in the high frequency support mode. For example, as a process corresponding to step S4110, the value of the first operation counter 233c for the high frequency support mode is added by 1. Further, the detection result of the first operation port detection sensor 46a is also monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, and the first operation port detection sensor. When it is determined that one game ball is detected in 46a, a process is executed so that the number of game balls corresponding to the first operating port 33 is paid out, and the holding information for the special figure is acquired. Execute the process to identify the trigger.

When it is determined that one game ball is detected by the second operating port detection sensor 47a (step S4111: YES), that is, the signal received from the second operating port detection sensor 47a is cut from the LOW level to the HI level. When it is confirmed that the change has been made, the value of the second operation counter 231d for normal use is added by 1 (step S4112).

If the ball entry management process is in the open / close execution mode, the value of the second operation counter 232d for the open / close execution mode is added by 1 as the process corresponding to step S4112, and the ball entry management process is in the high frequency support mode. For example, as a process corresponding to step S4112, the value of the second operation counter 233d for the high frequency support mode is added by 1. Further, the detection result of the second operation port detection sensor 47a is also monitored in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, and the second operation port detection sensor. When it is determined that one game ball is detected in 47a, a process is executed so that the number of game balls corresponding to the second operating port 34 is paid out, and the hold information for the special figure is acquired. Execute the process to identify the trigger.

When it is determined that one game ball is detected by the out-port detection sensor 48a (step S4113: YES), that is, the signal received from the out-port detection sensor 48a is switched from the LOW level to the HI level. If confirmed, the value of the normal out counter 231e is added by 1 (step S4114).

If the ball entry management process is in the open / close execution mode, the value of the out counter 232e for the open / close execution mode is added by 1 as the process corresponding to step S4114, and if the ball entry management process is in the high frequency support mode, the step As a process corresponding to S4114, the value of the out counter 233e for the high frequency support mode is added by 1. Further, in the ball entry detection process (step S3709) of the timer interrupt process (FIG. 69) executed as the process corresponding to the specific control, the detection result of the out port detection sensor 48a is not monitored.

By executing the processes of steps S4004 to S4006 as described above, the number of game balls entered into the general winning opening 31 is measured using the general winning counters 231a, 232a, and 233a, and the special electric winning device 32 The number of game balls entering the first operation port 33 is measured using the special electric winning counters 231b, 232b, 233b, and the number of game balls entering the first operation port 33 uses the first operation counters 231c, 232c, 233c. The number of game balls entering the second operating port 34 is measured using the second operating counters 231d, 232d, and 233d, and the number of game balls entering the out port 24a is the out counter 231e, It is measured using 232e and 233e. As a result, it becomes possible for the main CPU 63 to grasp the history of ball entry into each of the ball entry units 24a, 31 to 34. Further, since the counter area 231 for normal use, the counter area 232 for open / close execution mode, and the counter area 233 for high frequency support mode are provided separately, the situation is such that neither the open / close execution mode nor the high frequency support mode is provided. It is possible for the main CPU 63 to grasp the history of ball entry into each of the ball entry units 24a, 31 to 34 by distinguishing between the situation of the open / close execution mode and the situation of the high frequency support mode.

Returning to the explanation of the check process (FIG. 73), when an affirmative determination is made in step S4001, the process of step S4004 is executed, the process of step S4005 is executed, or the process of step S4006 is executed, the step The result calculation process is executed in S4007, and the display process is executed in step S4008.

FIG. 75 is a flowchart showing the result calculation process of step S4007.

First, it is determined whether or not "1" is set in the management start flag provided in the work area 223 for non-specific control (step S4201). The management start flag is a flag for the main CPU 63 to specify whether or not the game history collection for calculating the game history management result should be executed. In the present embodiment, when the supply of the operating power to the pachinko machine 10 is started for the first time after the pachinko machine 10 is manufactured (that is, when the supply of the operating power to the MPU 62 is started), the game discharged from the game area PA. Until the total number of balls exceeds the number corresponding to the management start reference value, the total number of game balls discharged from the game area PA without collecting the game history for calculating the management result of the game history. When is equal to or greater than the number corresponding to the management start reference value, the game history is collected to calculate the management result of the game history. At the shipping stage of the pachinko machine 10, the operation of the pachinko machine 10 may be checked before shipping. At that time, a game ball is maintained at each entry portion and the subsequent operation is checked. On the other hand, a game for calculating the management result of the game history until the total number of game balls discharged from the game area PA after the start of supplying the operating power to the pachinko machine 10 becomes equal to or more than the management start reference value. By not executing the collection of the history, it is possible to prevent the ball entry result at the time of the above-mentioned operation check from being collected as the game history for calculating the management result of the game history. Become.

Here, when the supply of the operating power to the pachinko machine 10 is started for the first time after the pachinko machine 10 is manufactured (that is, when the supply of the operating power to the MPU 62 is started), the value of the management start flag is "0". It has become. In this case, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the counter area 232 for the open / close execution mode, and the values of the counters 233a to 233e of the counter area 233 for the high frequency support mode. Is also "0". On the other hand, in the situation where the value of the management start flag is "1", the supply of the operating power to the pachinko machine 10 is stopped, and then in the situation where the backup power is supplied to the main RAM 65, the operating power to the pachinko machine 10 is supplied. When the supply of is started, the value of the management start flag remains "1". In this case, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the counter area 232 for the open / close execution mode, and the values of the counters 233a to 233e of the counter area 233 for the high frequency support mode. Is maintained in the state before the supply of the operating power to the pachinko machine 10 is stopped. When the value of the management start flag is "0" due to the above configuration, the values of the counters 231a to 231e of the normal counter area 231 and the values of the counters 232a to 232e of the counter area 232 for the open / close execution mode. The values of the counters 233a to 233e in the counter area 233 for the high frequency support mode are also "0".

By the way, when the clearing process of the main RAM 65 is executed in step S105 or step S117 in the main process (FIG. 9), the target of the clearing process is the work area 221 for specific control and the stack for specific control. Area 222, the work area 223 for non-specific control and the stack area 224 for non-specific control are excluded from the target of clear processing. As a result, the manager of the game hall cannot intentionally clear the work area 223 for non-specific control and the stack area 224 for non-specific control by "0".

Further, the main CPU 63 confirms whether or not an abnormality has occurred in the work area 223 for non-specific control and the stack area 224 for non-specific control in the timer interrupt process (FIG. 69) described later, and the occurrence of an abnormality occurs. When is confirmed, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". As a result, when an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, it is possible to initialize the work area 223 and the stack area 224 for non-specific control. Further, when an abnormality occurs in the work area 223 for non-specific control in the configuration, the work area 223 for non-specific control is cleared to "0" without clearing the stack area 224 for non-specific control to "0". However, when an abnormality occurs in the stack area 224 for non-specific control, the stack area 224 for non-specific control is cleared to "0" without clearing the work area 223 for non-specific control to "0". May be good. Further, even if an abnormality occurs in the work area 223 for non-specific control and the stack area 224 for non-specific control, the calculation result storage area 234 may be excluded from the target of clearing "0".

When a negative determination is made in step S4201, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the counter area 232 for the open / close execution mode, and the counter area 233 for the high frequency support mode. The total number is calculated by summing all the values of the counters 233a to 233e (step S4202). Then, it is determined whether or not the calculated total number is larger than the management start reference value "300" (step S4203).

When an affirmative determination is made in step S4203, "1" is set in the management start flag of the work area 223 for non-specific control (step S4204). Further, the counters 231a to 231e of the normal counter area 231, the counters 232a to 232e of the counter area 232 for the open / close execution mode, and the counters 233a to 233e of the counter area 233 for the high frequency support mode are all cleared to "0". (Step S4205). As a result, the total number of game balls discharged from the game area PA after the supply of the operating power to the pachinko machine 10 is started (that is, after the supply of the operating power to the MPU 62 is started) is the management start reference value. All the information of the game history collected up to the number corresponding to or more than the above will be deleted. Therefore, after the start of supplying the operating power to the pachinko machine 10, the collection of the game history for calculating the management result of the game history until the total number of the game balls discharged from the game area PA becomes equal to or more than the management start reference value. Can be prevented from being executed.

If an affirmative determination is made in step S4201, the total number of arithmetic processes is executed in the same manner as in step S4202 (step S4206). That is, the values of the counters 231a to 231e of the normal counter area 231, the values of the counters 232a to 232e of the counter area 232 for the open / close execution mode, and the values of the counters 233a to 233e of the counter area 233 for the high frequency support mode are used. The total number is calculated by summing all of them. Then, it is determined whether or not the calculated total number is equal to or greater than the calculation reference number "6000" (step S4207).

If an affirmative determination is made in step S4207, arithmetic processing of various parameters is executed (step S4208). Specifically, the values of the various counters 231a to 231e of the normal counter area 231 are set to K61 to K65, and the values of the various counters 232a to 232e of the counter area 232 for the open / close execution mode are set to K71 to K75, for the high frequency support mode. When the values of the various counters 233a to 233e in the counter area 233 are set to K81 to K85, the following 61st and 68th parameters are calculated.
61st parameter: Total number of game balls paid out ("K61 + K71 + K81" x "number of prize balls for winning the general winning opening 31" + "K62 + K72 + K82" x "number of prize balls for winning the special electric winning device 32" + "K63 + K73 + K83""X" Number of prize balls for winning the first operating port 33 "+" K64 + K74 + K84 "x" Number of prize balls for winning the second operating port 34 ") / Total number of game balls discharged from the skill area PA ( Percentage of K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) × "Number of prize balls for winning the first operating port 33" + K64 × "Number of prize balls for winning the second operating port 34") / Total number of game balls discharged from the skill area PA in the normal state (K61 + K62 + K63 + K64 + K65) )-63rd parameter: Total number of game balls to be paid out in the open / close execution mode (K71 x "number of prize balls for winning the general winning opening 31" + K72 x "number of prize balls for winning the special electric winning device 32" + K73 x "Number of prize balls for winning the first operating port 33" + K74 x "Number of prize balls for winning the second operating port 34") / Total number of game balls discharged from the skill area PA in the open / close execution mode Ratio of the number (K71 + K72 + K73 + K74 + K75) -64th parameter: Total number of game balls to be paid out in the high frequency support mode (K81 x "Number of prize balls for winning the general winning opening 31" + K82 x "For winning the special electric winning device 32""Number of prize balls" + K83 x "Number of prize balls for winning the first operating port 33" + K84 x "Number of prize balls for winning the second operating port 34") / Discharged from the skill area PA in the high frequency support mode Ratio of total number of game balls (K81 + K82 + K83 + K84 + K85) -65th parameter: Total number of game balls entered into the general winning opening 31 (K61 + K71 + K81) / Total number of game balls discharged from the game area PA (K61 + K62 + K63 + K64 + K65 + K75 + K83 + K85 + K83 + 66th parameter: Total number of game balls entered into the first operating port 33 (K63 + K73 + K8) 3) / Ratio of the total number of game balls discharged from the game area PA (K61 + K62 + K63 + K64 + K65 + K71 + K72 + K73 + K74 + K75 + K81 + K82 + K83 + K84 + K85) 2 Number of prize balls for winning in the operating port 34 ") / Total number of game balls paid out ("K61 + K71 + K81" x "Number of prize balls for winning in general winning opening 31" + "K62 + K72 + K82" x "To special electric winning device 32" Ratio of "Number of prize balls for winning" + "K63 + K73 + K83" x "Number of prize balls for winning in the first operating port 33" + "K64 + K74 + K84" x "Number of prize balls for winning in the second operating port 34") 68th Parameters: "K62 + K72 + K82" x "Number of prize balls for winning the special electric winning device 32" / Total number of game balls paid out ("K61 + K71 + K81" x "Number of prize balls for winning the general winning opening 31" + "K62 + K72 + K82" x ""Number of prize balls for winning the special electric winning device 32" + "K63 + K73 + K83" x "Number of prize balls for winning the first operating port 33" + "K64 + K74 + K84" x "Number of prize balls for winning the second operating port 34" ) Then, the 61st to 68th parameters calculated in step S4208 are overwritten in the calculation result storage area 234 (step S4209). In this case, the 61st to 68th parameters of the calculation result in the previous processing times already stored in the calculation result storage area 234 are deleted. Even if the supply of the operating power to the pachinko machine 10 is stopped, the backup power is supplied to the main RAM 65. Therefore, if the backup power is supplied, the pachinko machine 10 is supplied. Information on the 61st to 68th parameters calculated before the supply of the operating power to the pachinko machine 10 is stopped is stored in the calculation result storage area 234 even immediately after the start of the supply of the operating power of.

After that, the counters 231a to 231e in the normal counter area 231, the counters 232a to 232e in the open / close execution mode counter area 232, and the counters 233a to 233e in the high frequency support mode counter area 233 are all cleared to "0". (Step S4210). As a result, the game history information can be temporarily deleted at that time when the 61st to 68th parameters are calculated.

Immediately after the management start flag is set to "1", if the total number of game balls discharged from the game area PA is equal to or greater than the value obtained by subtracting the management start reference value from the calculation reference number, steps S4208 to The process of step S4210 may be executed, and then the processes of steps S4208 to S4210 may be executed when the total number of game balls discharged from the game area PA becomes equal to or more than the calculation reference number.

FIG. 76 is a flowchart showing the display process of step S4008 in the check process (FIG. 73).

First, the value of the update timing counter provided in the work area 223 for non-specific control is subtracted by 1 (step S4301). The update timing counter is a counter for the main CPU 63 to specify that it is the timing to update the display contents of the management result of the game history in the first to third notification display devices 69a to 69c. The main CPU 63 notifies the calculation results of the 61st to 68th parameters by controlling the display of the first to third notification display devices 69a to 69c. In this case, the information corresponding to the type of the parameter to be notified is displayed on the first notification display device 69a. Further, among the values obtained by multiplying the parameter to be notified by 100, the number corresponding to the tens place is displayed on the second notification display device 69b, and the number corresponding to the ones place is displayed for the third notification. It is displayed on the device 69c. Then, in the first to third notification display devices 69a to 69c, the displays corresponding to the calculation results of the 61st to 68th parameters are sequentially switched according to a predetermined order, and are the display targets in the final order. After the calculation result of the 68th parameter is displayed, the calculation result of the 61st parameter, which is the display target in the first order, is displayed. In this case, the period during which the calculation result of one parameter is continuously displayed is 10 seconds.

Here, the operation cycle of the 61st to 68th parameters in the main CPU 63 is 60 minutes at the shortest. On the other hand, the number of the 61st to 68th parameters is eight, and the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Therefore, the 61st to 68th parameters calculated by the main CPU 63 are displayed at least once by the first to third notification display devices 69a to 69c.

When the process of step S4301 is executed, the display contents of the first to third notification display devices 69a to 69c are updated by determining whether or not the value of the update timing counter after 1 subtraction is "0". It is determined whether or not it is time to perform the operation (step S4302). When an affirmative determination is made in step S4302, the value of the display target counter provided in the work area 223 for non-specific control is added by 1 (step S4303). Then, when the value of the display target counter after 1 addition exceeds the maximum value "7" (step S4304: YES), the value of the display target counter is cleared to "0" (step S4305).

The display target counter is a counter for the main CPU 63 to specify the type of the parameter to be displayed in the first to third notification display devices 69a to 69c. There is a one-to-one correspondence between the 61st to 68th parameters and the possible values of the display target counters "0" to "7". For example, when the value of the display target counter is "0", the 61st parameter, which is the first display target, becomes the display target of the first to third notification display devices 69a to 69c, and the value of the display target counter is "7". In the case of, the 68th parameter, which is the last display target, is the display target of the first to third notification display devices 69a to 69c.

When a negative determination is made in step S4304 or when the process of step S4305 is executed, the first notification display device 69a is displayed so that the information corresponding to the parameter type corresponding to the value of the display target counter is displayed. Control (step S4306). Further, the parameter corresponding to the value of the display target counter is read from the calculation result storage area 234, the read parameter is multiplied by 100, and the number corresponding to the tens digit is displayed on the second notification display device 69b. The number corresponding to the ones digit is displayed on the third notification display device 69c (step S4307).

Here, display ICs are provided corresponding to each of the first to third notification display devices 69a to 69c. In step S4306, the main CPU 63 outputs display data to the display IC corresponding to the first notification display device 69a, and in step S4307, the main CPU 63 outputs the display IC corresponding to the second notification display device 69b and the third notification. Display data is output to each of the display ICs corresponding to the display device 69c. These display ICs can store and hold display data when operating power is supplied, and the display contents corresponding to the stored display data are continuously stored in the corresponding notification display devices 69a to 69c. Display it. Then, when the display data is changed by the main CPU 63, the display of the notification display devices 69a to 69c is changed to the display content corresponding to the changed display data. As a result, even after the management execution process (FIG. 71), which is the process corresponding to the non-specific control, is completed and the process returns to the process corresponding to the specific control, the setting is made in the execution status of the process corresponding to the non-specific control. The display corresponding to the display data will be continued on the first to third notification display devices 69a to 69c.

After that, a value corresponding to 10 seconds is set in the update timing counter of the work area 223 for non-specific control as a value corresponding to the next update timing (step S4308).

When the supply of operating power to the main CPU 63 is started by executing the display process as described above, the game history management results are displayed on the first to third notification display devices 69a to 69c. Will be done. The management result of the game history is displayed regardless of whether or not the game is continued, and the game machine main body 12 is opened with respect to the outer frame 11 to open the main control device 60 from the front of the pachinko machine 10. It is done regardless of whether it is visible or not. By making the display control of the first to third notification display devices 69a to 69c executed regardless of the game situation and the state of the pachinko machine 10, the first to third notification display devices 69a It is possible to simplify the processing configuration for controlling the display of ~ 69c.

According to the present embodiment described in detail above, the following excellent effects are obtained.

The main RAM 65 is provided with a work area 221 for specific control and a stack area 222 for specific control, and a work area 223 for non-specific control and a stack area 224 for non-specific control. Then, in the work area 221 for the specific control and the stack area 222 for the specific control, when the process corresponding to the specific control is executed by the main CPU 63 by using the program for the specific control and the data for the specific control. While it is possible to store information and read information, the main CPU 63 executes a process corresponding to the non-specific control by using the program for the non-specific control and the data for the non-specific control. In some cases, the information can be read, but the information cannot be stored. Further, the work area 223 for non-specific control and the stack area 224 for non-specific control can store and read information when the process corresponding to the non-specific control is executed by the main CPU 63. On the other hand, when the process corresponding to the specific control is executed by the main CPU 63, the information can be read but the information cannot be stored. As a result, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to specific control, and the work area 223 for non-specific control and the stack area for non-specific control are handled. The 224 can be treated as a dedicated storage area for processing corresponding to non-specific control. Therefore, the storage destination of the information in the main RAM 65 can be clearly different between the process corresponding to the specific control and the process corresponding to the non-specific control. Therefore, it is possible to prevent the information used in the other process from being deleted when one of the processes corresponding to the specific control and the process corresponding to the non-specific control is executed.

The process corresponding to the specific control includes a process for controlling the progress of the game, and the process corresponding to the non-specific control includes a process for managing the game history. As described above, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to specific control, and the work area 223 for non-specific control and the stack area 222 for non-specific control are used. The stack area 224 of is treated as a dedicated storage area for processing corresponding to non-specific control. As a result, when executing the process for controlling the progress of the game, the information used in the process for managing the game history, for example, the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode. It is possible to prevent the information stored in the counter area 233 and the calculation result storage area 234 from being rewritten.

The main RAM 65 is provided with a normal counter area 231 for storing information for managing the game history, a counter area 232 for the open / close execution mode, a counter area 233 for the high frequency support mode, and a calculation result storage area 234. This makes it possible for the main CPU 63 to complete the process for managing the game history. In addition, it is possible to prevent unauthorized access and unauthorized modification of the game history information and the information of various parameters calculated by using the game history information.

When the situation in which the process corresponding to the specific control is executed changes to the situation in which the process corresponding to the non-specific control is executed or the situation in which the process corresponding to the non-specific control is executed, various types of the main CPU 63 Register information is saved in the main RAM 65. As a result, when the process corresponding to the non-specific control is executed, it is possible to prevent the information stored in the various registers of the main CPU 63 from being rewritten when the process corresponding to the specific control is executed. Become. Further, when or after the processing corresponding to the non-specific control is completed, the information saved in the main RAM 65 is returned to various registers of the main CPU 63. As a result, when the process corresponding to the non-specific control is completed, it is possible to execute the process corresponding to the specific control from the state of various registers of the main CPU 63 before the execution of the process corresponding to the non-specific control. Become.

When the situation in which the process corresponding to the specific control is executed changes to the situation in which the process corresponding to the non-specific control is executed or the situation in which the process corresponding to the non-specific control is executed, various registers of the main CPU 63 The information of some of the registers is saved in the main RAM 65. As a result, it is possible to suppress the storage capacity required for saving the register information of the main CPU 63 in the main RAM 65.

When the situation in which the process corresponding to the specific control is executed changes to the situation in which the process corresponding to the non-specific control is executed or the situation in which the process corresponding to the non-specific control is executed, various registers of the main CPU 63 Of these, the information of the register whose information is to be stored is saved in the main RAM 65 in the process corresponding to the non-specific control. As a result, when the process corresponding to the non-specific control is completed, the process corresponding to the specific control can be restarted from the state of the register of the main CPU 63 before the execution of the process corresponding to the non-specific control. It is possible to suppress the storage capacity required for saving the register information of the main CPU 63 in the main RAM 65.

When the process corresponding to the non-specific control is started, the information of the flag register of the main CPU 63 is saved in the stack area 222 for the specific control in the process corresponding to the specific control, and the WA register, BC register, etc. of the main CPU 63 are saved. The information of the DE register, the HL register, the IX register, and the IY register is saved in the work area 223 for the non-specific control in the process corresponding to the non-specific control. As a result, it is possible to save the information stored in the various registers of the main CPU 63 at a preferable timing, and the processing for saving the information corresponds to the processing corresponding to the specific control and the non-specific control. It is possible to distribute and execute with processing.

The flag register includes a carry flag, a zero flag, a P / V flag, a sine flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution result of an arithmetic instruction, a rotate instruction, an input / output instruction, and the like. In this case, the information in the flag register is saved in the stack area 222 for specific control in the process corresponding to the specific control before the process corresponding to the non-specific control is started. As a result, it is possible to save the information of the subroutine call corresponding to the non-specific control and the flag register information in the state before the change after the subroutine is started in the stack area 222 for the specific control.

By saving the information of the WA register, BC register, DE register, HL register, IX register, and IY register to the work area 223 for non-specific control instead of saving it to the stack area 224 for non-specific control, the information is not saved. It is possible to keep the capacity of the stack area 224 for specific control small. Further, when the stack area 224 for non-specific control is used, the writing order of the information is read first from the later information, so if the reading order of the information is deviated due to some noise or the like, it will be read. All subsequent read order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information in the work area 223 for non-specific control, it is possible to prevent the above-mentioned event from occurring even when there is a large amount of information to be saved. ..

The stack pointer of the main CPU 63 when the process corresponding to the specific control is executed to the situation where the process corresponding to the non-specific control is executed, or when the process corresponding to the non-specific control is executed. The information of is fixed information, and the information of the stack pointer is not saved in the main RAM 65 at the start of the process corresponding to the non-specific control. As a result, it is not necessary to secure a capacity for saving the stack pointer information in the main RAM 65, so that the storage capacity of the main RAM 65 can be suppressed accordingly. In addition, even if the stack pointer information is not saved in this way, the situation changes from the situation where the process corresponding to the specific control is executed to the situation where the process corresponding to the non-specific control is executed, or the non-specific control. Since the stack pointer information of the main CPU 63 is fixed information when the corresponding process is executed, the process corresponding to the non-specific control can be performed without saving the stack pointer information as described above. When it ends, it is possible to return to the information of the stack pointer before the process corresponding to the non-specific control is started.

Note that the information in the flag register of the main CPU 63 is saved in the main RAM 65 in the process corresponding to the specific control when the process corresponding to the non-specific control is executed, but the configuration is limited to this. Instead, the information of the flag register may be saved in the main RAM 65 in the process corresponding to the non-specific control. Further, after the processing corresponding to the non-specific control is completed, the information is returned to the flag register of the main CPU 63 in the processing corresponding to the specific control, but the present invention is not limited to this. The configuration may be such that the return of information to the flag register is performed in the process corresponding to the non-specific control.

Further, after the information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 has started the process corresponding to the non-specific control, the process corresponding to the non-specific control is mainly performed. Although the configuration is such that the information is saved in the side RAM 65, the present invention is not limited to this, and the information in these registers may be saved in the main RAM 65 in the process corresponding to the specific control. Further, when the process corresponding to the non-specific control is completed, the information is returned to each of the above registers by the process corresponding to the non-specific control, but the present invention is not limited to this, and each of the above is not limited. The information may be returned to the register in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<16th Embodiment>
In the present embodiment, the processing configuration of the management process is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 77 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. The processes of steps S4401 to S4405 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S4401). This prevents the timer interrupt process (FIG. 69), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "LD (_PSWBUF), PSW", the information of the flag register of the main CPU 63 is saved in the PSW buffer set in the work area 221 for specific control by the load instruction (step S4402). The flag register includes a carry flag, a zero flag, a P / V flag, a sine flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution result of an arithmetic instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of such a flag register before the program of the subroutine corresponding to the management execution process is started, the flag register in the state before the call of the subroutine or the change after the start of the subroutine is performed. The information can be saved in the work area 221 for specific control.

After that, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S4403). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

When the program returns to the management processing program after the management execution processing is executed, it is saved as "LD PSW, (_PSWBUF)" in the PSW buffer in the work area 221 for specific control in step S4402 by a load instruction. The information of the flag register is returned to the flag register of the main CPU 63 (step S4404). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S4402 was last executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 69) is prohibited to the state in which the timer interrupt process (FIG. 69) is permitted (step S4405). This enables new execution of timer interrupt processing.

According to the above configuration, the information of the flag register of the main CPU 63 immediately before switching from the specific control to the non-specific control is saved in the work area 221 for the specific control instead of the stack area 222 for the specific control. As a result, it is possible to save the information of the flag register while suppressing the capacity of the stack area 222 for specific control.

The PSW buffer in the work area 221 for specific control is reserved as a dedicated area, but is not limited to this, and may be configured as a dual-purpose area in which other information can be written. That is, since it is not necessary to save the information of the flag register of the main CPU 63 corresponding to the specific control in the situation where the management process is not executed, it is predetermined in the process corresponding to the specific control in the situation where the management process is not executed. The configuration may be such that a combined area that is also used as a PSW buffer is used when executing arithmetic processing. In this case, since the shared area is surely used to save the flag register information when the management process is executed, the information other than the flag register information is used before the management process is executed. It is necessary to configure the configuration in which unnecessary information is written in the dual-purpose area.

<17th Embodiment>
In the present embodiment, the processing configuration of the management execution process is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 78 is a flowchart showing the management execution process in the present embodiment executed by the main CPU 63. The processes of steps S4501 to S4515 in the management execution process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

First, at the start of non-specific control on the stack pointer of the main CPU 63 by a load instruction as "LD SP, Y (u + 2)" as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment. Y (u + 2) is set as the fixed address in (step S4501).

After that, as "PUSH WA", the information of the WA register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control by a push instruction (step). S4502). In this case, the WA register information is saved in the storage area corresponding to the fixed address set in the stack pointer of the main CPU 63 in step S4501. Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH BC", the information of the BC register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control by a push instruction (step). S4503). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH DE", the information of the DE register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control by a push instruction (step). S4504). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH HL", the information of the HL register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control by a push instruction (step). S4505). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH IX", the information of the IX register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control by a push instruction (step). S4506). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After that, as "PUSH IY", the information of the IY register of the main CPU 63 is saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control by the push instruction (step). S4507). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order.

After executing the processes of steps S4502 to S4507, the check process is executed (step S4508). When the check process is executed, the subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after the check process is executed is transmitted by a push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management execution process program indicated by the return address. The content of the check process is the same as that of the fifteenth embodiment.

After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, as "LD SP, Y (r + α)", when the stack pointer of the main CPU 63 is returned to the specific control by the load instruction. Y (r + α) is set as the fixed address in (step S4509). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

After that, as "POP IY", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is stored by the pop instruction. The IY register of the main CPU 63 is overwritten (step S4510). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP IX", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is stored by the pop instruction. The IX register of the main CPU 63 is overwritten (step S4511). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP HL", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is stored by the pop instruction. The HL register of the main CPU 63 is overwritten (step S4512). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP DE", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is stored by the pop instruction. The DE register of the main CPU 63 is overwritten (step S4513). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP BC", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is stored by the pop instruction. The BC register of the main CPU 63 is overwritten (step S4514). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

After that, as "POP WA", the information saved in the storage area corresponding to the information in the previous order with respect to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control is stored by the pop instruction. The WA register of the main CPU 63 is overwritten (step S4515). Further, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the previous order.

By executing the processes of steps S451 to S4515, the processes corresponding to the non-specific control of each information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are started. It is possible to return to the information corresponding to the specific control immediately before the operation.

In addition to the flag register, various general-purpose registers, auxiliary registers, and index registers are present in the registers of the main CPU 63. In this case, in steps S4502 to S4507, information on WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers. Is saved in the stack area 224 for non-specific control. These WA registers, BC registers, DE registers, HL registers, IX registers, and IY registers are registers used in the check process (step S4508), which is a process corresponding to non-specific control. By saving the information set in such registers to the stack area 224 for non-specific control prior to the execution of the check process (step S4508), the information of these registers used for specific control is non-specifically controlled. Can be evacuated before is started. Therefore, even if these registers are overwritten during the non-specific control, when the non-specific control is terminated, the information saved in the stack area 224 for the non-specific control is returned to these registers to return the status of these registers. Can be returned to the state corresponding to the specific control before the non-specific control is executed.

Further, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers in the stack area 224 for non-specific control, WA to be used in the check process, which is a process corresponding to non-specific control. By selectively saving the information of the register, BC register, DE register, HL register, IX register and IY register to the stack area 224 for non-specific control, the register information is saved in the stack area 224 for non-specific control. It is possible to reduce the capacity to be secured for this purpose. Therefore, it is possible to save the register information as described above while securing a large capacity of the stack area 224 for non-specific control that can be used in the check process.

<18th embodiment>
In the present embodiment, the processing configuration of the management execution process is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 79 is a flowchart showing the management execution process in the present embodiment executed by the main CPU 63. The processes of steps S4601 to S4605 in the management execution process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

First, at the start of non-specific control on the stack pointer of the main CPU 63 by a load instruction as "LD SP, Y (u + 2)" as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment. Y (u + 2) is set as the fixed address in (step S4601).

After that, as "LD (_ALLBUF), ALL", the information of all the registers of the main CPU 63 is saved in the ALL buffer set in the work area 223 for non-specific control by the load instruction (step S4602). As a result, not only the WA register, BC register, DE register, HL register, IX register and IY register used in the check process, which is the process corresponding to the non-specific control, but also other registers are included. The register information is collectively saved in the ALL buffer of the work area 223 for non-specific control. By saving all the registers of the main CPU 63 in the work area 223 for non-specific control in this way, it is not necessary to selectively save the register information of the main CPU 63.

Here, the register to be saved includes the flag register. The flag register information is saved in the stack area 222 for specific control in step S3802 of the management process (FIG. 70), but in step S4602, the flag register information is saved in the work area 223 for non-specific control. Will be done. As a result, it is not necessary to selectively save the register information of the main CPU 63 including the flag register information. Further, even if the flag register information is duplicated and saved in this way, after the management execution process is completed, the special control stack area 222 to the main CPU 63 in step S3804 of the management process (FIG. 70). Since the information is returned to the flag register of, when returning to the process corresponding to the specific control, it is possible to return the information of the flag register of the main CPU 63 to the state immediately before the management execution process is executed. It becomes.

After that, the check process is executed (step S4603). When the check process is executed, the subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after the check process is executed is transmitted by a push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management execution process program indicated by the return address. The content of the check process is the same as that of the fifteenth embodiment.

After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, as "LD SP, Y (r + α)", when the stack pointer of the main CPU 63 is returned to the specific control by the load instruction. Y (r + α) is set as the fixed address in (step S4604). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

After that, as "LD ALL, (_ALLBUF)", the information saved in the ALL buffer of the work area 223 for non-specific control is overwritten in the register corresponding to each of the main CPU 63 by the load instruction (step S4605). As a result, it is possible to restore each information of all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

According to the above configuration, the register information of the main CPU 63 is not saved in the stack area 224 for non-specific control, but is saved in the work area 223 for non-specific control, so that the stack area for non-specific control is saved. It is possible to keep the capacity of 224 small. Further, when the stack area 224 for non-specific control is used, the writing order of the information is read first from the later information, so if the reading order of the information is deviated due to some noise or the like, it will be read. All subsequent read order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information in the work area 223 for non-specific control, it is possible to prevent the above-mentioned event from occurring even when there is a large amount of information to be saved. ..

Further, when the register information of the main CPU 63 is saved in the work area 223 for non-specific control, the WA register, BC register, DE register, and HL register used in the check process, which is the process corresponding to the non-specific control. , Not only the IX register and the IY register, but also the other registers, the information of all the registers is collectively saved in the ALL buffer of the work area 223 for non-specific control. By saving all the registers of the main CPU 63 in the work area 223 for non-specific control in this way, it is not necessary to selectively save the register information of the main CPU 63.

It should be noted that, after the information of all the registers of the main CPU 63 is started in the process corresponding to the non-specific control, the information is saved in the main RAM 65 in the process corresponding to the non-specific control, but the configuration is limited to this. However, the information of all the registers may be saved in the main RAM 65 in the process corresponding to the specific control. Further, when the process corresponding to the non-specific control is completed, the information is returned to all the registers by the process corresponding to the non-specific control, but the configuration is not limited to this, and the information is returned to all the registers. The information may be restored in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<19th embodiment>
In the present embodiment, the processing configuration of the management execution process is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 80 is a flowchart showing a management execution process in the present embodiment executed by the main CPU 63. The processes of steps S4701 to S4706 in the management execution process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

First, as "LD (_SPBUF), SP", the stack pointer information of the main CPU 63 is saved in the SP buffer set in the work area 223 for non-specific control by a load instruction (step S4701). As a result, the information of the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started is saved in the work area 223 for the non-specific control.

After that, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, as "LD SP, Y (u + 2)", when the stack pointer of the main CPU 63 is started from non-specific control by a load instruction. Y (u + 2) is set as the fixed address in (step S4702).

After that, as "PUSH ALL", the information of all the registers of the main CPU 63 is transferred from the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control and the storage area by a push instruction. It is saved in a continuous storage area (step S4703). In this case, since the information of all the registers of the main CPU 63 cannot be stored in one storage area in the stack area 224 for non-specific control, the current state of the main CPU 63 in the stack area 224 for non-specific control as described above. The storage area corresponding to the stack pointer information of the above and the storage area continuous from the storage area are set as the save destination of the register information. Further, when saving the information of all the registers, the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order with respect to the storage area in which the last information is stored.

After that, the check process is executed (step S4704). When the check process is executed, the subroutine program corresponding to the check process set in the non-specific control program is executed. When executing the program of the subroutine, information for specifying the return address of the management execution process after the check process is executed is transmitted by a push instruction to the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control. Write to the storage area corresponding to the information. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management execution process program indicated by the return address. The content of the check process is the same as that of the fifteenth embodiment.

After that, as "POP ALL", the information saved in the storage area corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 224 for non-specific control and the information saved in the continuous storage area from the storage area by the pop instruction. Is overwritten in the register corresponding to each of the main CPU 63 (step S4705). As a result, it is possible to restore the information of all the registers of the main CPU 63 to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

After that, as "LD SP, (_SPBUF)", the information saved in the SP buffer of the work area 223 for non-specific control is overwritten on the stack pointer of the main CPU 63 by the load instruction (step S4706). As a result, the information of the stack pointer of the main CPU 63 is restored to the information corresponding to the specific control immediately before the process corresponding to the non-specific control is started.

According to the above configuration, when the register information of the main CPU 63 is saved in the stack area 224 for non-specific control, the WA register, BC register, and DE used in the check process, which is the process corresponding to the non-specific control. Not only the registers, the HL register, the IX register, and the IY register, but also the other registers, the information of all the registers is collectively saved in the stack area 224 for non-specific control. By saving all the registers of the main CPU 63 in the stack area 224 for non-specific control in this way, it is not necessary to selectively save the register information of the main CPU 63.

The information of the stack pointer corresponding to the specific control immediately before the process corresponding to the non-specific control is started is saved in the work area 223 for the non-specific control. As a result, even if the stack pointer information corresponding to the specific control is configured to fluctuate immediately before the process corresponding to the non-specific control is started, the process corresponding to the non-specific control is completed and the specific control is started. When returning to the corresponding processing, it is possible to return the information of the stack pointer of the main CPU 63 to the information corresponding to the specific control immediately before the processing corresponding to the non-specific control is started.

It should be noted that, after the information of all the registers of the main CPU 63 is started in the process corresponding to the non-specific control, the information is saved in the main RAM 65 in the process corresponding to the non-specific control, but the configuration is limited to this. However, the information of all the registers may be saved in the main RAM 65 in the process corresponding to the specific control. Further, when the process corresponding to the non-specific control is completed, the information is returned to all the registers by the process corresponding to the non-specific control, but the configuration is not limited to this, and the information is returned to all the registers. The information may be restored in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

<20th Embodiment>
In the present embodiment, the processing configurations of the management process and the management execution process are different from those of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 81 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. The processes of steps S4801 to S4811 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S4801). This prevents the timer interrupt process (FIG. 69), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "PUSH PSW", the information of the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S4802). The flag register includes a carry flag, a zero flag, a P / V flag, a sine flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution result of an arithmetic instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of such a flag register before the program of the subroutine corresponding to the management execution process is started, the flag register in the state before the call of the subroutine or the change after the start of the subroutine is performed. Information can be saved in the stack area 222 for specific control.

After that, as “LD WA, 0”, the WA register of the main CPU 63 is cleared to “0” by the load instruction (step S4803). Further, as “LD BC, 0”, the BC register of the main CPU 63 is cleared to “0” by the load instruction (step S4804). Further, as “LD DE, 0”, the DE register of the main CPU 63 is cleared to “0” by the load instruction (step S4805). Further, as "LD HL, 0", the HL register of the main CPU 63 is cleared to "0" by the load instruction (step S4806). Further, as "LD IX, 0", the IX register of the main CPU 63 is cleared to "0" by the load instruction (step S4807). Further, as “LD IY, 0”, the IY register of the main CPU 63 is cleared to “0” by the load instruction (step S4808).

In addition to the flag register, various general-purpose registers, auxiliary registers, and index registers are present in the registers of the main CPU 63. In this case, in steps S4803 to S4808, each of the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, is used. Clear "0". These WA registers, BC registers, DE registers, HL registers, IX registers, and IY registers are registers used in the check process (step S4902), which is a process corresponding to non-specific control. By clearing "0" prior to the execution of the management execution process (step S4809), which is a process corresponding to the non-specific control, such registers are set to the state of these registers before the process corresponding to the non-specific control is started. In addition, it is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

Further, the information of the WA register, BC register, DE register, HL register, IX register, and IY register before the processing corresponding to the non-specific control is started is after the processing corresponding to the non-specific control is completed. This information is unnecessary in the process corresponding to the specific control. Therefore, even if the information of these registers is cleared to "0" without being saved, there is no problem in the process corresponding to the specific control returned after the process corresponding to the non-specific control is completed.

After executing the processes of steps S4803 to S4808, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S4809). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

When the program returns to the management processing program after the management execution processing is executed, the information of the flag register saved in the stack area 222 for specific control in step S4802 by the pop instruction as "POP PSW" is stored in the main CPU 63. Return to the flag register of (step S4810). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S4802 was last executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 69) is prohibited to the state in which the timer interrupt process (FIG. 69) is permitted (step S4811). This enables new execution of timer interrupt processing.

FIG. 82 is a flowchart showing the management execution process in the present embodiment executed by the main CPU 63. The processes of steps S4901 to S4909 in the management execution process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

First, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment, as "LD SP, Y (u + 2)", a load instruction is given to the stack pointer of the main CPU 63 at the start of non-specific control. Y (u + 2) is set as the fixed address (step S4901).

After that, the check process is executed (step S4902). When the check process is executed, the subroutine program corresponding to the check process set in the non-specific control program is executed. However, when the subroutine program is executed, the management after the check process is executed. Information for specifying the return address of the execution process is written in the stack area 224 for non-specific control by the push instruction. Then, when the check process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management execution process program indicated by the return address. The content of the check process is the same as that of the fifteenth embodiment.

After that, the WA register of the main CPU 63 is cleared to "0" by a load instruction as "LD WA, 0" (step S4903). Further, as "LD BC, 0", the BC register of the main CPU 63 is cleared to "0" by the load instruction (step S4904). Further, as “LD DE, 0”, the DE register of the main CPU 63 is cleared to “0” by the load instruction (step S4905). Further, as "LD HL, 0", the HL register of the main CPU 63 is cleared to "0" by the load instruction (step S4906). Further, as "LD IX, 0", the IX register of the main CPU 63 is cleared to "0" by the load instruction (step S4907). Further, as "LD IY, 0", the IY register of the main CPU 63 is cleared to "0" by the load instruction (step S4908).

These WA registers, BC registers, DE registers, HL registers, IX registers, and IY registers are registers used in the check process (step S4902), which is a process corresponding to non-specific control as described above. By clearing "0" prior to returning such registers from the process corresponding to the non-specific control to the process corresponding to the specific control, the states of these registers are mainly returned to the process corresponding to the specific control. It is possible to set the state immediately after the supply of the operating power to the side CPU 63 is started.

Further, the information of the WA register, BC register, DE register, HL register, IX register, and IY register before the processing corresponding to the specific control is started is not specified after the processing corresponding to the specific control is completed. This information is unnecessary in the processing corresponding to the control. Therefore, even if the information of these registers is cleared to "0" without being saved, there is no problem in the process corresponding to the non-specific control returned after the process corresponding to the specific control is completed.

After that, as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment, as "LD SP, Y (r + α)", when the stack pointer of the main CPU 63 is returned to the specific control by the load instruction. Y (r + α) is set as the fixed address in (step S4909). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

According to the above configuration, when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is executed, the WA register, the BC register, the DE register, the HL register, and the IX register of the main CPU 63 are started. And the configuration is such that the IY register is cleared to "0". As a result, it is not necessary to save the information of each of these registers to the main RAM 65. Therefore, it is not necessary to secure a capacity for saving each of these pieces of information.

Also, when returning from the situation where the process corresponding to the non-specific control is executed to the process corresponding to the specific control, the WA register, BC register, DE register, HL register, IX register and IY register of the main CPU 63 are used. It is a configuration that clears "0". As a result, when returning to the process corresponding to the specific control, it is possible to return the state of each of these registers to the state immediately before the process corresponding to the non-specific control is started.

The state in which each of the above registers is cleared to "0" is a state in which the supply of operating power to the MPU 62 is started. This makes it possible to simplify the processing configuration for setting each of the above registers to a predetermined state when starting the processing corresponding to the non-specific control and when returning to the processing corresponding to the specific control. ..

When starting the process corresponding to the non-specific control and returning to the process corresponding to the specific control, the registers to be executed for clearing "0" are some of the various registers of the main CPU 63. As a result, it is possible to reduce the processing load for setting each of the above registers to a predetermined state when starting the process corresponding to the non-specific control and when returning to the process corresponding to the specific control.

In a configuration in which the WA register, BC register, DE register, HL register, IX register, and IY register are cleared to "0" when starting the process corresponding to the non-specific control and returning to the process corresponding to the specific control. Registers other than are not cleared to "0". This makes it possible to prevent the information required in the process corresponding to the specific control from being deleted at the start of the process corresponding to the non-specific control.

Further, the information of the registers other than the WA register, BC register, DE register, HL register, IX register and IY register is not saved in the main RAM 65 at the start of the process corresponding to the non-specific control. As a result, it is not necessary to secure an area for saving such information in the main RAM 65.

The information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 before the processing corresponding to the non-specific control is started is after the processing corresponding to the non-specific control is completed. This information is not used in the processing corresponding to the specific control. As a result, even if each of the above registers is cleared to "0" when the process corresponding to the non-specific control is started, the specific control is supported after the process corresponding to the non-specific control is completed. It is possible to prevent the processing from being affected.

In addition, instead of the configuration in which the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are cleared to "0" in steps S4803 to S4808 in the management process (FIG. 81), these are used. It may be configured to initialize the register. That is, when the supply of the operating power to the MPU 62 is started, the information of each register is set so as to be in the initial state after each register of the main CPU 63 is once cleared to "0". In step S4808, each register may be set so as to be in this initial state. In this case, each register is set so as to be in the initial state in steps S4903 to S4908, so that the state of each register is not specified when returning to the process corresponding to the specific control. It is possible to return to the state immediately before the processing corresponding to the control is started.

Further, instead of the configuration in which the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are cleared to "0" in steps S4803 to S4808 in the management process (FIG. 81), these are used. It may be configured to set "1" to all the registers. In this case, also in steps S4903 to S4908, by setting "1" in all of the above registers, when returning to the process corresponding to the specific control, the state of each of these registers is changed to the process corresponding to the non-specific control. It is possible to return to the state immediately before the start of.

Further, when the process corresponding to the non-specific control is executed, the information of the flag register of the main CPU 63 is saved in the main RAM 65 in the process corresponding to the specific control, but the configuration is limited to this. Instead, the information of the flag register may be saved in the main RAM 65 in the process corresponding to the non-specific control. Further, after the processing corresponding to the non-specific control is completed, the information is returned to the flag register of the main CPU 63 in the processing corresponding to the specific control, but the present invention is not limited to this. The configuration may be such that the return of information to the flag register is performed in the process corresponding to the non-specific control.

Further, the process of clearing the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 to "0" is the process corresponding to the specific control before the process corresponding to the non-specific control is started. However, the configuration is not limited to this, and the process of clearing these registers to "0" may be executed by the process corresponding to the non-specific control. Further, when the process corresponding to the non-specific control is completed, the process of clearing each of the above registers to "0" is performed by the process corresponding to the non-specific control, but the present invention is not limited to this. The process of clearing each of the above registers to "0" may be performed in the process corresponding to the specific control after the process corresponding to the non-specific control is completed.

Further, in the management process (FIG. 81), the process of "PUSH PSW" in step S4802 is executed before setting "0" in each register in steps S4803 to S4808. , The process of "PUSH PSW" in step S4802 is executed after setting "0" in each register in steps S4803 to S4808 and before the program of the subroutine corresponding to the management execution process is read in step S4809. It may be configured to be. As a result, it is possible to save the information of the flag register after the change by the load instruction of steps S4803 to S4808 to the stack area 222 for specific control.

<21st Embodiment>
In this embodiment, the configuration for collecting game history information is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 83 is an explanatory diagram for explaining the electrical configuration in the present embodiment.

The MPU 62 is provided with a main CPU 63, a main ROM 64, and a main RAM 65, as in the fifteenth embodiment. Further, unlike the fifteenth embodiment, the MPU 62 is electrically connected to the management RAM 241. That is, a management RAM 241 is provided separately from the main RAM 65 built in the MPU 62, and the management RAM 241 is externally attached to the MPU 62.

The main RAM 65 is provided with a work area 221 for specific control, a stack area 222 for specific control, a work area 223 for non-specific control, and a stack area 224 for non-specific control, as in the fifteenth embodiment. ing. Therefore, when the main CPU 63 executes the process corresponding to the specific control by using the program for the specific control in the main ROM 64 and the data for the specific control, the work area 221 for the specific control in the main RAM 65 and the work area 221 and the specific control are executed. When the stack area 222 for specific control is used and the main CPU 63 executes the process corresponding to the non-specific control by using the program for non-specific control and the data for non-specific control in the main ROM 64. The work area 223 for non-specific control and the stack area 224 for non-specific control in the main RAM 65 are used.

The management RAM 241 is provided with a normal counter area 231, an open / close execution mode counter area 232, a high frequency support mode counter area 233, and a calculation result storage area 234. The contents of each of these areas 231 to 234 are the same as those in the fifteenth embodiment. Also in this embodiment, a management execution process including a check process is executed as a process corresponding to the non-specific control in the main CPU 63. Then, in the check process, the game history is collected by updating the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233, as in the fifteenth embodiment. The 61st to 68th parameters calculated by using the collected game history are written in the calculation result storage area 234. That is, since the management RAM 241 is used when the main CPU 63 executes the process corresponding to the non-specific control, the management RAM 241 is used as a work area for the non-specific control.

Further, when the game history is collected and the 61st to 68th parameters are calculated by using the collected history information, the work area 223 for non-specific control and the stack area 224 for non-specific control of the main RAM 65 are used. It will be used as appropriate.

According to the above configuration, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are provided in the management RAM 241 externally attached to the MPU 62. As a result, it is possible to store the collected game history information while not increasing the storage capacity required in the work area 223 for non-specific control in the main RAM 65, and the game history is used. It is possible to store the calculated 61st to 68th parameters. Further, while using the general-purpose MPU 62, it is possible to increase the storage capacity for storing the game history information.

The work area 223 for non-specific control and the stack area 224 for non-specific control of the main RAM 65 are appropriately used when collecting game history and calculating the 61st to 68th parameters using the collected history information. Will be done. This makes it possible to prevent the processing speed from being extremely reduced when the processing related to the history information is executed.

In addition to or in place of the configuration in which the management RAM 241 is provided with the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234, the first embodiment is described above. A storage area corresponding to the history memory 117 in the form or the like may be set. In this case, it is necessary to increase the storage capacity required for storing the history information, but the management RAM 241 externally attached to the MPU 62 is used as a storage means for storing the history information. Therefore, it is possible to flexibly cope with the increase in the storage capacity.

<22nd Embodiment>
In the present embodiment, the processing configuration executed by the main CPU 63 is different from the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 84 is a flowchart showing the main process in the present embodiment executed by the main CPU 63. The processes of steps S5001 to S5019 in the main process are executed by the main CPU 63 using the program for specific control and the data for specific control.

First, the power-on wait process is executed (step S5001). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. During the execution period of the power-on wait process, the operation start and initial setting of the symbol display device 41 are completed. After that, access to the main RAM 65 is permitted (step S5002).

After that, it is determined whether or not the reset button 68c is pressed (step S5003), and whether or not the setting key insertion unit 68a is turned on by using the setting key (step S5004), and the inner frame is determined. It is determined whether or not the front door frame 14 is in the open state with respect to 13 (step S5005), and whether or not the gaming machine main body 12 is in the open state with respect to the outer frame 11 (step S5006).

In the present embodiment, the front door opening sensor 95 for detecting whether or not the front door frame 14 is in the open state with respect to the inner frame 13 is electrically connected to the main CPU 63, and the front door opening sensor The detection result of 95 is input to the main CPU 63. In this case, when the front door frame 14 is closed with respect to the inner frame 13, the front door opening sensor 95 transmits a closing detection signal to the main CPU 63, and the front door frame 14 is open with respect to the inner frame 13. In this case, the front door opening sensor 95 transmits an opening detection signal to the main CPU 63. The main CPU 63 identifies that the front door frame 14 is in the closed state when receiving the closing detection signal from the front door opening sensor 95, and receives the opening detection signal from the front door opening sensor 95. It is specified that the front door frame 14 is in the open state.

Further, in the present embodiment, the main body opening sensor 96 for detecting whether or not the gaming machine main body 12 is in the open state with respect to the outer frame 11 is electrically connected to the main CPU 63, and the main body opening sensor 96 is electrically connected. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is closed with respect to the outer frame 11, the main body opening sensor 96 transmits a closing detection signal to the main CPU 63, and the gaming machine main body 12 is open with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the main CPU 63. The main CPU 63 identifies that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and the gaming machine when receiving the opening detection signal from the main body opening sensor 96. It is specified that the main body 12 is in the open state.

If the reset button 68c is pressed (step S5003: YES) and a negative determination is made in any of steps S5004 to S5006, the clearing process at the time of non-setting update is executed (step S5007). .. In the clearing process at the time of non-setting update, the specific control is performed except for the area (specifically, the set value counter) in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control. The work area 221 for the purpose is cleared to "0", and the initial setting is performed for the area where the "0" is cleared. As a result, the area indicating whether or not the winning / failing lottery mode is the high probability mode is cleared to "0", so that the winning / losing lottery is performed regardless of the winning / failing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game times are not executed, the open / close execution mode is not executed, and the normal map display unit 38a is not variablely displayed, and the general electric accessory 34a is closed. It becomes a situation. Further, since the hold storage area 65a and the normal electric hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is deleted and the normal figure display unit is deleted. The hold information for 38a is deleted. Further, in the clearing process at the time of non-setting update, the stack area 222 for specific control is cleared to "0". Further, in the clearing process at the time of non-setting update, the initial setting is performed after clearing "0" in various registers of the main CPU 63.

In the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if the supply of operating power to the pachinko machine 10 is started while the reset button 68c is pressed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

When the reset button 68c is not pressed (step S5003: NO), it is determined whether or not the power failure flag is set to "1" (step S5008). The power failure flag is provided in the work area 221 for specific control, and when the supply of operating power to the main CPU 63 is stopped and the predetermined power failure processing is normally executed, the power failure flag is concerned. Will be set to "1". When the power failure flag is set to "1", it is determined whether or not the checksum calculation result matches the checksum saved when the power is turned off, that is, the validity of the stored data is determined (step S5009). .. When the clearing process at the time of non-setting update is executed in step S5007, or when a positive judgment is made in step S5009, the pachinko machine 10 is set by checking the value of the set value counter in the work area 221 for specific control. It is determined whether or not the value is normal (step S5010). Specifically, when the set value set in the set value counter is any of "setting 1" to "setting 6", it is determined to be normal, and when it is "0" or 7 or more, it is abnormal. Judge that there is.

If a negative determination is made in any of steps S5008 to S5010, the operation prohibition process is executed. In the operation prohibition process, an infinite loop occurs after the error notification process for notifying the hall manager or the like of the occurrence of an error is executed (step S5011). The operation prohibition process is released by executing the clear process (step S5018) at the time of setting update, which will be described later.

If an affirmative determination is made in all of steps S5008 to S5010, the power-on setting process is executed (step S5012). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of the power failure flag is set as an initial value, and a command corresponding to the current gaming state is transmitted to the voice emission control device 81.

The main CPU 63 is configured to periodically execute the timer interrupt process, but the occurrence of the timer interrupt process is prohibited at the stage when the main process is started. The state in which the occurrence of the timer interrupt process is prohibited is released at the timing before the process of step S5012 is completed and the process of step S5013 is executed, and the execution of the timer interrupt process is permitted. As a result, when the supply of the operating power to the main CPU 63 is started, the power-on setting process in step S5012 is completed, and the timer interrupt process is not executed until the stage before the process in step S5013 is started. Therefore, until the situation is reached, the main CPU 63 does not start the process for advancing the game.

After that, the process proceeds to the residual processing of steps S5013 to S5016. That is, although the main CPU 63 is configured to periodically execute the timer interrupt processing, a residual time is generated between the timer interrupt processing of 1 and the next timer interrupt processing. This residual time varies depending on the processing completion time of each timer interrupt process, and the residual process of steps S5013 to S5016 is repeatedly executed by utilizing the irregular time. In this respect, it can be said that the residual processing in steps S5013 to S5016 is an irregular process that is executed irregularly. In steps S5013 to S5016, the same processes as in steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

On the other hand, when the reset button 68c is pressed (step S5003: YES) and an affirmative determination is made in all of steps S5004 to S5006, a process for updating the set value is executed. Specifically, first, the copy process of the set value is executed (step S5017). In the copy process, the information of the set value counter used for specifying the set value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. .. As a result, even if the information of the set value counter is cleared to "0" in the clear process at the time of setting update (step S5018) executed after that, the book before the clear process at the time of updating the set value is executed. It is possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of the operating power to the pachinko machine 10 is stopped).

After that, the clearing process at the time of setting update is executed (step S5018). In the clearing process at the time of setting update, the work area 221 for specific control is set to "0" except for the area indicating whether or not the winning / fail lottery mode in the work area 221 for specific control is the high probability mode and the copy area. "Clear and make initial settings for the area where" 0 "is cleared. As a result, the game times are not executed, the open / close execution mode is not executed, and the normal map display unit 38a is not variablely displayed, and the normal electric accessory 34a is closed. There is a situation. Further, since the hold storage area 65a and the normal electric hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is deleted and the normal figure display unit is deleted. The hold information for 38a is deleted. Further, in the clearing process at the time of setting update, the stack area 222 for specific control is cleared by "0", and the initial setting is performed for the area where the "0" is cleared. Further, in the clearing process at the time of setting update, the setting value counter used for specifying the setting value of the pachinko machine 10 is cleared to "0". Further, in the clearing process at the time of setting update, the initial setting is performed after clearing "0" in various registers of the main CPU 63.

On the other hand, in the clearing process at the time of setting update, the area indicating whether or not the winning / failing lottery mode is the high probability mode is not cleared to "0", so even if the setting value updating process (step S5019) is executed, the winning / failing lottery mode Can be maintained in the mode before the supply of the operating power to the pachinko machine 10 is stopped. Further, since the copy area is not cleared by "0" in the clear process at the time of setting update, it is possible to specify the set value set before the clear process at the time of setting update is executed.

In the clear process at the time of setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if the set value update process that can change the set value of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

Then, after executing the set value update process in step S5019, the process proceeds to step S5012. The setting value update process will be described below. FIG. 85 is a flowchart showing the set value update process. The process of steps S511 to S5114 in the set value update process is executed by the main CPU 63 by using the program for specific control and the data for specific control.

First, "1" is set in the set value counter provided in the work area 221 for specific control (step S5101). The set value counter is a counter for the main CPU 63 to specify which set value the set state of the pachinko machine 10 is. By setting "1" in the set value counter, when the set value update process is executed, the set value becomes "setting 1" regardless of the set values up to that point.

After that, the display start processing of the set value is executed (step S5102). In the display start processing of the set value, the display control of the third notification display device 69c is performed so that the number “1” corresponding to “setting 1” is displayed. When changing the set value, the manager of the game hall can grasp the current setting state of the pachinko machine 10 by checking the third notification display device 69c.

After that, it is determined whether or not one game ball is detected by the out port detection sensor 48a (step S5103). Specifically, it is determined whether or not the signal received from the outlet detection sensor 48a has switched from the LOW level to the HI level. When a negative determination is made in step S5103, it is determined whether or not the update button 68b has been pressed once (step S5104). Specifically, it is determined whether or not the signal from the sensor that detects the pressing operation of the update button 68b has switched from the LOW level to the HI level. If a negative determination is made in step S5104, the process returns to step S5103, and it is determined whether or not one game ball is detected by the out-port detection sensor 48a.

When the update button 68b is pressed once (step S5104: YES), the value of the set value counter in the work area 221 for specific control is incremented by 1 (step S5105). When the value of the set value counter after 1 addition exceeds "6" (step S5106: YES), "1" is set in the set value counter (step S5107). As a result, each time the update button 68b is pressed once, it is updated to the set value one step higher, and when the update button 68b is pressed once in the situation of "setting 6", it is set to "setting 1". I will be back.

When a negative determination is made in step S5106, or when the process of step S5107 is executed, the display update process of the set value is executed (step S5108). In the display update process of the set value, the display control of the third notification display device 69c is performed so that the number corresponding to the value of the set value counter in the work area 221 for specific control is displayed. By checking the third notification display device 69c, the manager of the game hall can grasp the setting state of the pachinko machine 10 after pressing the update button 68b.

After executing the process of step S5108, the process returns to step S5103, and it is determined whether or not one game ball is detected by the out port detection sensor 48a. When one game ball is not detected by the out port detection sensor 48a (step S5103: NO), the processes after step S5104 are executed again. When one game ball is detected by the out port detection sensor 48a (step S5103: YES), it is determined whether or not the setting key insertion unit 68a has switched from the ON state to the OFF state (step S5109). In this case, it is not specified whether or not the setting key insertion unit 68a is in the OFF state, but whether or not a switch from the ON state to the OFF state has occurred is specified, and the switch is said to have occurred. If specified, an affirmative determination is made in step S5109.

If the state has not been switched to the OFF state (step S5109: NO), the process of step S5109 is executed again. As a result, the progress of the process is waited until the setting key insertion unit 68a is turned off. When the state is switched to the OFF state (step S5109: YES), the display end processing of the set value is executed (step S5110). In the set value display end process, the display of the set value on the third notification display device 69c is ended. In this case, the display of the information of various parameters stored in the calculation result storage area 234 provided in the work area 223 for non-specific control is started by the first to third notification display devices 69a to 69c.

After that, the set value comparison process is executed (step S5111). In the set value comparison process, it is determined whether or not the information of the set value counter in the work area 221 for specific control matches the information stored in the copy area in the work area 221 for specific control. That is, it is determined whether or not the set value set before the supply of the operating power to the pachinko machine 10 is stopped and the set value set in the current set value update process are the same.

When the set value set before the supply of operating power to the pachinko machine 10 is stopped and the set value set in the current set value update process are the same (step S5112: NO), it is not. The notification process at the time of change is executed (step S5113). A setting maintenance command indicating that the set value has not been changed in the notification process at the time of non-change is transmitted to the voice emission control device 81. By receiving the setting maintenance command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the setting maintenance, and outputs a voice "setting maintenance" from the speaker unit 54. In addition, the character image "Maintaining the setting" is displayed on the symbol display device 41.

These notifications are maintained until the notification execution period (for example, 10 seconds) elapses after the setting maintenance command is transmitted, and ends when the notification execution period elapses. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the set value has been maintained. In the notification process at the time of non-change, the set value was maintained by setting the display content on at least one display device of the first to third notification display devices 69a to 69c to the display content corresponding to the setting maintenance. It may be configured to notify that, or it may be configured to output an external output indicating that the set value has been maintained.

If the set value set before the supply of operating power to the pachinko machine 10 is stopped and the set value set in the current set value update process are not the same (step S5112: YES), the change is made. The time notification process is executed (step S5114). In the notification process at the time of change, a setting change command indicating that the set value has been changed is transmitted to the voice emission control device 81. Upon receiving the setting change command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the setting change, and outputs a voice "setting change" from the speaker unit 54. In addition, the character image "The setting has been changed." Is displayed on the symbol display device 41.

These notifications are maintained until the notification execution period (for example, 10 seconds) elapses after the setting change command is transmitted, and ends when the notification execution period elapses. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the set value has been changed. In the notification process at the time of change, the set value was changed by setting the display content on at least one display device of the first to third notification display devices 69a to 69c to the display content corresponding to the setting change. May be configured to notify, or may be configured to output an external output indicating that the set value has been changed.

As described above, in order to execute the set value update process in the present embodiment, not only the setting key insertion unit 68a is turned on, but also the reset button 68c is pressed, and the front door frame 14 is in the open state. It is necessary that the gaming machine main body 12 is in the open state. This makes it difficult to execute the setting value update process illegally.

Further, in order for the set value update process to be executed, the front door frame 14 and the gaming machine main body 12 need to be in the open state. As a result, even if an attempt is made to illegally execute the setting value update process, the fraudulent activity becomes conspicuous because the front door frame 14 and the gaming machine main body 12 are in the open state, and the manager of the gaming hall is concerned. It makes it easier to detect cheating.

In particular, in order for the set value update process to be executed, not only the opening operation of the gaming machine main body 12 necessary for exposing the main control device 60 but also the opening operation of the front door frame 14 is required. The work of the fraudulent activity can be complicated, and the fraudulent activity can be made conspicuous.

In addition, in a configuration that does not return to the process for advancing the game when the set value update process is not completed, in order to confirm the set value selected in the set value update process and end the set value update process. It is necessary to insert the game ball into the out port 24a, cause the out port detection sensor 48a to detect the game ball, and then turn off the setting key insertion unit 68a. As a result, even if the set value update process is illegally executed, it is possible to make it difficult to perform an operation for ending the set value update process and returning to the process for advancing the game.

Further, the set value set before the supply of the operating power to the pachinko machine 10 is stopped is compared with the set value selected in the set value update process, and whether or not both set values are the same. The notification corresponding to the crab is executed. As a result, the manager of the game hall can easily grasp whether or not the set value can be changed by the set value update process.

FIG. 86 is a flowchart showing timer interrupt processing in the present embodiment executed by the main CPU 63. The timer interrupt process is executed periodically (for example, in a cycle of 4 milliseconds) in the situation where the processes of steps S5013 to S5016 are executed in the main process (FIG. 84). The program corresponding to the timer interrupt processing is set as the program for specific control.

In steps S5201 to S5205, the same processing as in steps S301 to S305 of the timer interrupt processing (FIG. 11) in the first embodiment is executed. These processes are executed in the main CPU 63 by using the program for specific control and the data for specific control.

After that, the setting confirmation process is executed (step S5206). When the setting confirmation process is executed, the subroutine program corresponding to the setting confirmation process set in the specific control program is executed. However, when the setting confirmation process is executed, the setting confirmation process is executed. Information for specifying the return address of the timer interrupt processing after the execution of is written in the stack area 222 for specific control by the push instruction. Then, when the setting confirmation process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process program indicated by the return address.

FIG. 87 is a flowchart showing the setting confirmation process. The processes of steps S5301 to S5312 in the setting confirmation process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, it is determined whether or not the set value corresponding to the information of the set value counter in the work area 221 for specific control is displayed on the third notification display device 69c (step S5301). When a negative determination is made in step S5301, it is determined whether or not the game is in either the game times or the open / close execution mode (step S5302), and the fluctuation display times of the pattern on the normal figure display unit 38a and the general electric accessory 34a are opened. It is determined whether or not the front door frame 14 is in the open state with respect to the inner frame 13 (step S5303), and it is determined whether or not the front door frame 14 is in the open state (step S5304). It is determined whether or not the gaming machine main body 12 is in the open state with respect to 11 (step S5305), and whether or not the setting key insertion unit 68a is turned on (step S5306). Whether or not the front door frame 14 is in the open state is determined based on the detection result of the front door open sensor 95 as in step S5005 in the main process (FIG. 84), and whether or not the gaming machine main body 12 is in the open state. The determination is made based on the detection result of the main body opening sensor 96 as in step S5006 in the main process (FIG. 84).

If a negative determination is made in any of steps S5302 to S5306, the setting confirmation process ends without executing the processes of steps S5307 to S5309. If an affirmative determination is made in all of steps S5302 to S5306, the set value display start process is executed (step S5307). In the set value display start process, the display control of the third notification display device 69c is performed so that the numerical value of the set value corresponding to the information of the set value counter in the work area 221 for specific control is displayed. When confirming the set value, the manager of the game hall can grasp the current setting state of the pachinko machine 10 by visually observing the third notification display device 69c.

After that, "1" is set in the game stop flag provided in the work area 221 for specific control (step S5308). The game stop flag is a situation in which an affirmative determination is made in step S5207 in the timer interrupt process (FIG. 86) and the processes of steps S5208 to S5221 are not executed, that is, the execution of the process for advancing the game should be stopped. This is a flag for the main CPU 63 to specify whether or not there is a flag. When the game stop flag is set to "1", affirmative determination is made in step S5207 of the timer interrupt process (FIG. 86), so that the processes of steps S5208 to S5221 are not executed. As a result, the set value is confirmed in the situation where the execution of the process for advancing the game is stopped. However, even if the game stop flag is set to "1", the processing of steps S5201 to S5205 in the timer interrupt processing (FIG. 86) is executed, so that the set value is confirmed. Even so, the power failure monitoring is executed, the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and fraud detection is further executed.

After that, the confirmation notification start command is transmitted to the voice emission control device 81 (step S5309). By receiving the confirmation notification start command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a corresponding manner during the setting confirmation, and outputs the voice "setting confirmation is being performed" from the speaker unit 54. .. In addition, the character image "Setting is being confirmed." Is displayed on the symbol display device 41. These notifications are continued until a confirmation notification end command is received from the main CPU 63. It should be noted that the configuration may be such that an external output is performed to indicate that the set value is being confirmed.

As described above, it is neither a game time nor an open / close execution mode, and further, on condition that it is neither a variable display time of a pattern on the normal figure display unit 38a nor a normal electric open state in which the general electric accessory 34a can be opened. By making the display for confirming the set value performed on the third notification display device 69c, it is possible to prevent the confirmation work of the set value from being performed in the situation where the game is being performed. It will be possible.

Further, in order for the display for confirming the set value to be displayed on the third notification display device 69c, not only the setting key insertion unit 68a is turned on, but also the front door frame 14 is in the open state. It is necessary that the game machine main body 12 is in the open state. This makes it difficult to display the set value for confirmation even if it is attempted to be performed illegally.

Further, in order for the display for confirming the set value to be displayed on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to illegally display the set value for confirmation, the fraudulent activity becomes conspicuous because the front door frame 14 and the gaming machine main body 12 are in the open state, and the management of the gaming hall A person is more likely to discover the fraudulent activity.

In particular, in order for the display for confirming the set value to be performed on the third notification display device 69c, not only the opening operation of the gaming machine main body 12 necessary for exposing the main control device 60 but also the opening operation is performed. By also requiring the opening operation of the front door frame 14, the work of the fraudulent act can be complicated, and the fraudulent act can be made conspicuous.

When an affirmative determination is made in step S5301, it is determined whether or not the setting key insertion unit 68a is turned off (step S5310). When the OFF operation is performed (step S5310: YES), the game stop flag in the work area 221 for specific control is cleared to "0" (step S5311). As a result, the processing of steps S5208 to S5221 is executed by making a negative determination in step S5207 of the timer interrupt processing (FIG. 86). As a result, the state in which the execution of the process for advancing the game is stopped is released.

After that, the confirmation notification end command is transmitted to the voice emission control device 81 (step S5312). By receiving the confirmation notification end command, the voice emission control device 81 ends the notification indicating that the set values in the symbol display device 41, the display light emission unit 53, and the speaker unit 54 are being confirmed.

Returning to the description of the timer interrupt process (FIG. 86), after completing the setting confirmation process in step S5206, it is determined whether or not the game is stopped (step S5207). In this case, if "1" is set in the game stop flag in the work area 221 for specific control in the setting confirmation process in step S5206, an affirmative determination is made in step S5207 and steps S5208 to S5221 are performed. Do not execute the process. Further, even when the occurrence of fraud is detected by the fraud detection process in step S5205, an affirmative determination is made in step S5207 and the processes of steps S5208 to S5221 are not executed.

In steps S5208 to S5219, the same processing as in steps S307 to S318 of the timer interrupt processing (FIG. 11) in the first embodiment is executed. These processes are executed in the main CPU 63 by using the program for specific control and the data for specific control. Further, in step S5221, the same processing as in step S3719 of the timer interrupt processing (FIG. 69) in the fifteenth embodiment is executed.

On the other hand, in step S5220, the RAM monitoring process is executed. When the RAM monitoring process is executed, the subroutine program corresponding to the RAM monitoring process set in the specific control program is executed. However, when the subroutine program is executed, after the RAM monitoring process is executed. Information for specifying the return address of the timer interrupt processing in the above is written in the stack area 222 for specific control by the push instruction. Then, when the RAM monitoring process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process program indicated by the return address.

FIG. 88 is a flowchart showing the RAM monitoring process. The process of steps S5401 to S5412 in the RAM monitoring process is executed by the main CPU 63 by using the specific control program and the specific control data.

First, the monitoring process of the work area 221 for specific control is executed (step S5401). In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the work area 221 for specific control due to noise or the like. This monitoring method is arbitrary, but for example, in the work area 221 for specific control, whether or not the state of the storage area in which information is not written by various controls in the main CPU 63 is different from the initial state. There is a method of monitoring and determining that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is a value of "0", it is determined that an abnormality has occurred when "1" is stored in the storage area, and the initial state of the storage area is "1". When the value is set to "0", it is determined that an abnormality has occurred when the storage area has a value of "0". In addition to the above monitoring method, if the value of the predetermined byte is different from the value that can be set in the normal state, it may be determined that an abnormality has occurred.

If it is determined in step S5401 that there is an abnormality (step S5402: YES), the processes of steps S5409 to S5412 are executed. If it is not determined in step S5401 that there is an abnormality (step S5402: NO), the process proceeds to step S5403.

In step S5403, the monitoring process of the stack area 222 for specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the stack area 222 for specific control due to noise or the like. This monitoring method is arbitrary, but for example, whether or not the state of the storage area in which information is not written by various controls in the main CPU 63 in the stack area 222 for specific control is different from the initial state. There is a method of monitoring and determining that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is a value of "0", it is determined that an abnormality has occurred when "1" is stored in the storage area, and the initial state of the storage area is "1". When the value is set to "0", it is determined that an abnormality has occurred when the storage area has a value of "0". In addition to the above monitoring method, if the value of the predetermined byte is different from the value that can be set in the normal state, it may be determined that an abnormality has occurred.

If it is determined in step S5403 that there is an abnormality (step S5404: YES), the processes of steps S5409 to S5412 are executed. If it is not determined in step S5403 that there is an abnormality (step S5404: NO), the process proceeds to step S5405.

In step S5405, the monitoring process of the work area 223 for non-specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the work area 223 for non-specific control due to noise or the like. This monitoring method is arbitrary, but for example, in the work area 223 for non-specific control, whether or not the state of the storage area in which information is not written by various controls in the main CPU 63 is different from the initial state. There is a method of monitoring this and determining that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is a value of "0", it is determined that an abnormality has occurred when "1" is stored in the storage area, and the initial state of the storage area is "1". When the value is set to "0", it is determined that an abnormality has occurred when the storage area has a value of "0". In addition to the above monitoring method, if the value of the predetermined byte is different from the value that can be set in the normal state, it may be determined that an abnormality has occurred.

If it is determined in step S5405 that there is an abnormality (step S5406: YES), the processes of steps S5409 to S5412 are executed. If it is not determined in step S5405 that there is an abnormality (step S5406: NO), the process proceeds to step S5407.

In step S5407, the monitoring process of the stack area 224 for non-specific control is executed. In the monitoring process, it is monitored whether or not an abnormality has occurred in the information stored in the stack area 224 for non-specific control due to noise or the like. This monitoring method is arbitrary, but for example, in the stack area 224 for non-specific control, whether or not the state of the storage area in which information is not written by various controls in the main CPU 63 is different from the initial state. There is a method of monitoring the above and determining that an abnormality has occurred when the state is different from the initial state. In this case, if the initial state of the storage area is a value of "0", it is determined that an abnormality has occurred when "1" is stored in the storage area, and the initial state of the storage area is "1". When the value is set to "0", it is determined that an abnormality has occurred when the storage area has a value of "0". In addition to the above monitoring method, if the value of the predetermined byte is different from the value that can be set in the normal state, it may be determined that an abnormality has occurred.

If it is determined in step S5407 that there is an abnormality (step S5408: YES), the processes of steps S5409 to S5412 are executed. Specifically, first, the copy process of the set value is executed (step S5409). In the copy process, the information of the set value counter used for specifying the set value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. .. As a result, even if the set value counter information is cleared to "0" in the abnormal clearing process (step S5410) executed after that, the pachinko machine 10 before the abnormal clearing process is executed. It becomes possible to grasp the set value of.

After that, the clearing process at the time of abnormality is executed (step S5410). In the clear processing at the time of abnormality, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control, the work area 223 for non-specific control, and the stack for non-specific control are cleared. Clear area 224 to "0". Also, after clearing "0", the initial setting is performed. That is, in the RAM monitoring process, an abnormality occurs in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. When it is specified, the work area 221 for specific control is cleared to "0" except for the copy area, and the stack area 222 for specific control, the work area 223 for non-specific control, and the work area 223 for non-specific control are specified. Clear the stack area 224 of "0". As a result, if there is a possibility that some information abnormality has occurred in the main RAM 65, neither the process corresponding to the specific control nor the process corresponding to the non-specific control is executed as it is. It becomes possible to do so.

When the stack area 222 for specific control is cleared to "0", the information of the return address after the execution of the RAM monitoring process is also deleted. Therefore, when the stack area 222 for specific control is cleared to "0", the program is uniquely returned to the predetermined program after the process of step S5412 is completed. Specifically, the configuration is such that the process uniquely returns to the process of step S5013 in the main process (FIG. 22). However, the program that uniquely returns is not limited to step S5013, and may be step S5221 in the timer interrupt processing (FIG. 86). Further, when the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 222 for specific control.

After that, an abnormal command indicating that the clearing process at the time of abnormality has occurred is transmitted to the voice emission control device 81 (step S5411). Upon receiving the abnormal command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to forced clearing, and outputs the voice "forced clearing" from the speaker unit 54. In addition, the character image "Forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the main RAM 65 has been forcibly cleared.

After that, the set value update process is executed (step S5412). That is, when the clearing process at the time of abnormality occurs, the clearing of "0" including the set value counter in the work area 221 for specific control is executed. Therefore, the set value of the pachinko machine 10 is reset. Execute the setting value update process to perform. The processing content of the set value update processing is the same as that of step S5019 of the main processing (FIG. 84). Therefore, each time the update button 68b is pressed once, the set value is updated step by step, and the selected set value is determined by detecting the game ball with the out-port detection sensor 48a. The set value during the update and the set value confirmed are displayed on the third notification display device 69c. After that, when the setting key insertion unit 68a is switched from the ON state to the OFF state, it is determined that the end condition of the set value update process is satisfied.

Here, it is not determined that the end condition is satisfied only when the setting key insertion unit 68a is in the OFF state, and the end condition is set when the setting key insertion unit 68a is switched from the ON state to the OFF state. Judge that it was established. When the set value update process is executed in the RAM monitoring process (FIG. 88), the setting key insertion unit 68a is in the OFF state at the start of the set value update process, so that the end condition of the set value update process is set. In order to establish the setting key, it is necessary to insert the setting key into the setting key insertion unit 68a, perform the ON operation once, and then perform the OFF operation. As a result, it is possible to prevent the setting value update process from ending even though the regular operation by the game hall administrator has not been performed.

When the setting key insertion unit 68a is switched from the ON state to the OFF state and the end condition of the set value update process is satisfied, step S5111 in the set value update process (FIG. 85) is executed. It is compared whether or not the set value stored in the copy area in the work area 221 for specific control and the set value set this time in the set value counter in the work area 221 for specific control are the same. That is, it is determined whether or not the set value set before the clear process (step S5410) at the time of abnormality is executed and the set value set in the set value update process this time are the same. When both setting values are the same (step S5112: NO), the setting maintenance notification already described is performed by executing the notification process (step S5113) at the time of non-change. On the other hand, when both setting values are different (step S5112: YES), the setting change notification already described is performed by executing the notification processing at the time of change (step S5114).

According to the present embodiment described in detail above, the following excellent effects are obtained.

In order for the set value update process to be executed when the supply of operating power to the pachinko machine 10 is started, not only the setting key insertion unit 68a is turned on, but also the reset button 68c is pressed. , The front door frame 14 needs to be in the open state, and the gaming machine main body 12 needs to be in the open state. This makes it difficult to execute the setting value update process illegally.

In order for the set value update process to be executed, the front door frame 14 and the gaming machine main body 12 need to be in the open state. As a result, even if an attempt is made to illegally execute the setting value update process, the fraudulent activity becomes conspicuous because the front door frame 14 and the gaming machine main body 12 are in the open state, and the manager of the gaming hall is concerned. It makes it easier to detect cheating.

In particular, in order for the set value update process to be executed, not only the opening operation of the gaming machine main body 12 necessary for exposing the main control device 60 but also the opening operation of the front door frame 14 is required. The work of the fraudulent activity can be complicated, and the fraudulent activity can be made conspicuous.

In a configuration that does not return to the process for advancing the game when the set value update process is not completed, in order to confirm the set value selected in the set value update process and end the set value update process, an out port is used. It is necessary to insert the game ball into the 24a so that the out port detection sensor 48a detects the game ball, and then turn off the setting key insertion unit 68a. As a result, even if the set value update process is illegally executed, it is possible to make it difficult to perform an operation for ending the set value update process and returning to the process for advancing the game.

The set value that was set before the supply of operating power to the pachinko machine 10 was stopped is compared with the set value selected in the set value update process, and whether or not both set values are the same. The corresponding notification is executed. As a result, the manager of the game hall can easily grasp whether or not the set value can be changed by the set value update process.

The set value is set on the condition that it is neither the game time nor the open / close execution mode, and it is neither the variable display time of the pattern on the normal figure display unit 38a nor the normal electric open state in which the general electric accessory 34a can be in the open state. By making the display for confirmation be performed on the third notification display device 69c, it is possible to prevent the confirmation work of the set value from being performed in the situation where the game is being performed. ..

In order for the display for confirming the set value to be displayed on the third notification display device 69c, not only the setting key insertion unit 68a is turned on, but also the front door frame 14 is opened. Therefore, it is necessary that the gaming machine main body 12 is in the open state. This makes it difficult to display the set value for confirmation even if it is attempted to be performed illegally.

In order for the display for confirming the set value to be displayed on the third notification display device 69c, the front door frame 14 and the gaming machine main body 12 need to be in an open state. As a result, even if an attempt is made to illegally display the set value for confirmation, the fraudulent activity becomes conspicuous because the front door frame 14 and the gaming machine main body 12 are in the open state, and the management of the gaming hall A person is more likely to discover the fraudulent activity.

In particular, in order for the display for confirming the set value to be performed on the third notification display device 69c, not only the opening operation of the gaming machine main body 12 necessary for exposing the main control device 60 but also the opening operation is performed. By also requiring the opening operation of the front door frame 14, the work of the fraudulent act can be complicated, and the fraudulent act can be made conspicuous.

When it is specified that an abnormality has occurred in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. Clears the work area 221 for specific control to "0" except for the copy area, and sets the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control to "0". "clear. As a result, when there is a possibility that some information abnormality has occurred in the main RAM 65, both the processing corresponding to the specific control and the processing corresponding to the non-specific control are executed as they are. It is possible to prevent it from being stowed.

In the process corresponding to the specific control, an information error occurs not only in the work area 221 for the specific control and the stack area 222 for the specific control, but also in the work area 223 for the non-specific control and the stack area 224 for the non-specific control. Whether or not it is done is monitored. As a result, it is possible to simplify the processing configuration as compared with the configuration for monitoring whether or not an information abnormality has occurred separately for the processing corresponding to the specific control and the processing corresponding to the non-specific control.

When it is specified that an abnormality has occurred in any one of the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. In the process corresponding to the specific control, not only the work area 221 for the specific control and the stack area 222 for the specific control but also the work area 223 for the non-specific control and the stack area 224 for the non-specific control are set to "0". It will be cleared. As a result, it is possible to simplify the processing configuration as compared with the configuration in which the processing corresponding to the specific control and the processing corresponding to the non-specific control are separately cleared to "0".

If the clear processing at the time of abnormality is executed due to the occurrence of an information error, the setting value update processing is executed. This makes it possible to prevent the game from progressing even though the set value is not set. In this case, when the set value set before the clear process at the time of abnormality is executed and the set value set in the set value update process after the clear process at the time of abnormality is executed are the same. Is set maintenance notification. As a result, even if the clear processing at the time of abnormality is executed, the setting maintenance notification is performed by resetting the setting value set in the previous situation, and it is assumed that the clear processing at the time of abnormality is executed. It is possible to clearly indicate to the player that the set value has not changed. By the way, since it is common to record the set value of each pachinko machine 10 installed in the game hall, the set value update process after executing the clear process at the time of abnormality so as to be the recorded set value. It is possible to execute.

The conditions for executing the set value update process when the supply of the operating power to the pachinko machine 10 is started may be different from the above-described embodiment. FIG. 89 is a flowchart showing a main process of another form. In the main process, the same process as in steps S5001 to S5019 of the main process (FIG. 84) in the above embodiment is executed in steps S5501 to S5506 and steps S5508 to S5520. On the other hand, in the main process, it is determined in step S5507 whether or not the operation handle of the launch operation device 28, which is operated to launch the game ball into the game area PA, is rotated from the initial rotation position. Then, the reset button 68c is pressed (step S5503: YES), the setting key insertion unit 68a is turned ON (step S5504: YES), and the front door frame 14 is open with respect to the inner frame 13. (Step S5505: YES), the gaming machine main body 12 is in an open state with respect to the outer frame 11 (step S5506: YES), and the operation handle of the launch operation device 28 is rotated from the initial rotation position. If so (step S5507: YES), the set value update process (step S5520) is executed. As a result, in order for the set value update process to be executed when the supply of operating power to the pachinko machine 10 is started, not only the setting key is inserted into the setting key insertion unit 68a and the ON operation is performed, but also the firing is performed. It becomes necessary to start supplying the operating power to the pachinko machine 10 in a state where the operation handle of the operating device 28 is rotated. Therefore, it is possible to make it difficult to perform an act of illegally changing the set value. In step S5507, it is not determined whether or not the operation handle of the launch operation device 28 is rotated from the initial rotation position, but it is determined whether or not the launch operation device 28 is touched by the player. It may be configured.

Further, as a condition for executing the set value update process when the supply of the operating power to the pachinko machine 10 is started, the front door frame 14 is open with respect to the inner frame 13 and the outside Although both conditions that the gaming machine main body 12 is in the open state are set with respect to the frame 11, a configuration in which only one of these conditions is set may be set.

Further, as a condition for executing the set value update process when the supply of the operating power to the pachinko machine 10 is started, the condition that the reset button 68c is pressed is set. However, the configuration may be such that the condition is not set.

Further, as a condition for executing the set value update process when the supply of the operating power to the pachinko machine 10 is started, the operation to the pachinko machine 10 is performed in a situation where the game ball is detected by the gate detection sensor 49a. The configuration may be such that the condition that the power supply has been started is set. As a result, in order to execute the set value update process when the supply of operating power to the pachinko machine 10 is started, not only the setting key is inserted into the setting key insertion unit 68a and the ON operation is performed, but also through. It is necessary to start supplying the operating power to the pachinko machine 10 with the game ball staying at the gate 35. Therefore, it is possible to make it difficult to perform an act of illegally changing the set value.

Further, the content of the operation for determining the set value in the set value update process may be different from the content of the above embodiment. FIG. 90 is a flowchart showing a set value update process of another form. In the set value update process, the same processes as in steps S5101 to S5102 and steps S5104 to S5114 of the set value update process (FIG. 85) in the above embodiment are executed in steps S5601 to S5602 and steps S5604 to S5614. .. On the other hand, in the set value update process, in step S5603, the ON signal is continuously output from the gate detection sensor 49a instead of determining whether or not the game ball is detected by the out port detection sensor 48a. It is determined whether or not the ON continuation period is equal to or longer than the end reference period (specifically, 5 seconds). Then, when an affirmative determination is made in step S5603, the selected set value is confirmed and the process proceeds to step S5609. According to this configuration, in order to determine the selected set value, it is necessary to intentionally allow the game ball to stay in the through gate 35 for an end reference period or longer. It does not occur in the situation where the normal game is performed that the game ball stays in the through gate 35 for more than the end reference period. As a result, it is possible to make it difficult for the condition for determining the selected set value to be satisfied or difficult to be satisfied in a situation where a normal game is performed. Further, even if the set value update process is started due to an improper operation, it is possible to make it difficult to perform an operation for confirming the set value selected in the set value update process.

Further, in the set value update process, the set value being selected may be determined when the operation handle of the launch operation device 28 is rotated from the initial rotation position, and the launch operation device 28 is touched by the player. When this is done, the set value being selected may be fixed.

Further, in the set value update process, the selected set value is determined when the special electric power detection sensor 45a detects that the game ball has entered the special electric power winning device 32 provided with the opening / closing member. Often, the set value being selected may be determined when the second operating port detection sensor 47a detects that the game ball has entered the second operating port 34 provided with the opening / closing member. In this case, in order to confirm the selected set value, it is necessary to manually open the target ball entry portion and then maintain the game ball, which makes it difficult to illegally change the set value. It becomes possible.

Further, in the set value update process, the selection is made based on the fact that it is detected that the game ball has entered the second entry portion after the detection that the game ball has entered the first entry portion. It may be configured such that the set value in is fixed. In this case, in order to determine the selected set value, it is necessary to enter the game ball into a plurality of ball entry portions in a predetermined order by maintenance, so that it is difficult to illegally change the set value. Is possible. In this case, by setting both the first ball entry part and the second ball entry part as the ball entry parts without the opening / closing member, the workability of the regular work is not extremely deteriorated. It becomes possible to do.

Further, in the set value update process, by switching the setting key insertion unit 68a from the ON state to the OFF state, the selected set value may be fixed and the end condition of the set value update process may be satisfied.

Further, in the set value update process, the operation for updating the set value by one step is not limited to the configuration of pressing the update button 68b, and the set value is set by one step by pressing the reset button 68c. It may be an updated configuration.

Further, when the reset button 68c is being pressed and the setting key insertion unit 68a is being turned on by the setting key, the supply of operating power to the pachinko machine 10 is started. When the front door frame 14 is not open with respect to the frame 13 or when the gaming machine main body 12 is not open with respect to the outer frame 11, the clearing process (step S5007) at the time of non-setting update is executed. The configuration is not limited, and the clearing process at the time of non-setting update may not be executed. As a result, it is possible to prevent the clearing process at the time of non-setting update from being executed against the intention of the game hall administrator.

Further, when the reset button 68c is pressed and the setting key insertion unit 68a is not turned on by the setting key, the supply of operating power to the pachinko machine 10 is started. When the front door frame 14 is not open with respect to the frame 13 or when the gaming machine main body 12 is not open with respect to the outer frame 11, the clearing process (step S5007) at the time of non-setting update is executed. The configuration is not limited, and the clearing process at the time of non-setting update may not be executed. This makes it difficult to execute the clearing process at the time of non-setting update illegally.

<23rd Embodiment>
In this embodiment, the processing configuration of the main processing is different from that of the 22nd embodiment. Hereinafter, a configuration different from the 22nd embodiment will be described. The description of the same configuration as that of the 22nd embodiment is basically omitted.

FIG. 91 is a flowchart showing the main process in the present embodiment executed by the main CPU 63. The processes of steps S5701 to S5720 in the main process are executed by the main CPU 63 using the program for specific control and the data for specific control.

First, the power-on wait process is executed (step S5701). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. During the execution period of the power-on wait process, the operation start and initial setting of the symbol display device 41 are completed. After that, access to the main RAM 65 is permitted (step S5702).

After that, it is determined whether or not the front door frame 14 is in the open state with respect to the inner frame 13 based on the detection result of the front door opening sensor 95 (step S5703), and the outer frame 11 is determined based on the detection result of the main body opening sensor 96. It is determined whether or not the gaming machine main body 12 is in the open state (step S5704), and whether or not the reset button 68c is pressed (step S5705). If a negative determination is made in any of steps S5703 to S5705, the processes of steps S5706 to S5714 are executed. The processes of steps S5706 to S5714 are the same as those of steps S5008 to S5016 of the main process (FIG. 84) in the 22nd embodiment.

If an affirmative determination is made in all of steps S5703 to S5705, the selection process is executed (step S5715). In the selection process, either the situation where the clear process at the time of non-setting update is executed and the setting value update process is not executed, or the situation where the clear process at the time of setting update is executed and the setting value update process is executed is defined. The process of determining whether or not to play is executed based on the selection operation by the manager of the game hall. Specifically, each time the update button 68b is pressed once, the state in which one of the above situations is selected is switched to the state in which the other situation is selected. The selection operation may be performed by operating the reset button 68c, or may be performed by operating another operation unit. Further, when the clear processing at the time of non-setting update is executed and the situation where the setting value update processing is not executed is selected, "O" is displayed on the first notification display device 69a and the second notification display device 69b. When the third notification display device 69c is turned off and the status for executing the clear processing at the time of setting update and the setting value update processing is selected, "O" is displayed on the second notification display device 69b. Is displayed, and the first notification display device 69a and the third notification display device 69c are turned off. Further, when the reset button 68c is continuously pressed for a confirmation selection period (specifically, 10 seconds) or longer, the status of the selected side among the above situations is confirmed as the selection target this time. do.

When the update button 68b is continuously pressed for a confirmation selection period (specifically, 10 seconds) or longer, the status of the selected side among the above situations is confirmed as the selection target this time. It may be configured, and when another operation unit is continuously pressed for a fixed selection period (specifically, 10 seconds) or more, the situation of the selected side among the above situations is selected this time. It may be a configuration that is determined as a target. Further, the operation handle of the launch operation device 28 may be rotated to determine the situation on the selected side among the above situations as the selection target this time.

In the selection process, when the situation in which the clear process at the time of non-setting update is executed and the setting value update process is not executed is determined as the selection target this time (step S5716: NO), the clear process at the time of non-setting update is executed. (Step S5717). The processing content of the clear processing at the time of non-setting update is the same as step S5007 of the main processing (FIG. 84) in the 22nd embodiment.

In the selection process, when the status of executing the setting value update process as well as the clear process at the time of setting update is determined as the selection target this time (step S5716: YES), the set value copy process is executed (step). S5718), the clearing process at the time of setting update is executed (step S5719), and the setting value updating process is executed (step S5720). The processing contents of these steps S5718 to S5720 are the same as those of steps S5017 to S5019 of the main processing (FIG. 84) in the 22nd embodiment.

According to the above configuration, even if the setting key insertion unit 68a is not provided, the clear processing at the time of non-setting update is executed and the setting value update processing is not executed, and the clear processing at the time of setting update is executed. At the same time, the manager of the game hall can select which of the situations in which the set value update process is executed.

Further, not only when the set value update process is executed but also when the clear process at the time of non-setting update is executed, the operating power is supplied to the pachinko machine 10 when the reset button 68c is pressed. In addition to starting, it is necessary to open the front door frame 14 with respect to the inner frame 13 and open the gaming machine main body 12 with respect to the outer frame 11. This makes it difficult to execute the clearing process at the time of non-setting update illegally.

As conditions for executing the selection process when the supply of operating power to the pachinko machine 10 is started, the front door frame 14 is open with respect to the inner frame 13 and the outer frame is open. Although both conditions that the gaming machine main body 12 is in the open state are set with respect to 11, the configuration may be such that only one of these conditions is set.

Further, as a condition for executing the selection process when the supply of the operating power to the pachinko machine 10 is started, the condition that the launch handle of the launch operation device 28 is rotated is added. The configuration may be such that the launch operation device 28 is touched, or the condition that the game ball is detected by the gate detection sensor 49a is added. May be good.

<24th Embodiment>
In this embodiment, the processing configuration of the RAM monitoring process is different from that of the 22nd embodiment. Hereinafter, a configuration different from the 22nd embodiment will be described. The description of the same configuration as that of the 22nd embodiment is basically omitted.

FIG. 92 is a flowchart showing the RAM monitoring process in the present embodiment executed by the main CPU 63. The processes of steps S5801 to S5814 in the RAM monitoring process are executed by the main CPU 63 using the specific control program and the specific control data.

First, the monitoring process of the work area 221 for specific control is executed (step S5801). The content of the monitoring process is the same as step S5401 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. If it is determined in step S5801 that there is an abnormality (step S5802: YES), the processes of steps S5805 to S5808 are executed.

If it is not determined in step S5801 that there is an abnormality (step S5802: NO), the monitoring process of the stack area 222 for specific control is executed (step S5803). The content of the monitoring process is the same as step S5403 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. If it is determined in step S5803 that there is an abnormality (step S5804: YES), the processes of steps S5805 to S5808 are executed.

For details on the processes of steps S5805 to S5808, first, a copy process of the set value is executed (step S5805). In the copy process, the information of the set value counter used for specifying the set value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. .. As a result, even if the set value counter information is cleared to "0" in the abnormal clearing process (step S5806) executed after that, the pachinko machine 10 before the abnormal clearing process is executed. It becomes possible to grasp the set value of.

After that, the clearing process at the time of abnormality is executed (step S5806). In the clearing process at the time of abnormality, the work area 221 for specific control is cleared to "0" and the stack area 222 for specific control is cleared to "0" except for the copy area. Also, after clearing "0", the initial setting is performed. On the other hand, "0" clearing of the work area 223 for non-specific control and the stack area 224 for non-specific control is not executed. That is, in the RAM monitoring process in the present embodiment, when it is specified that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the specific control is performed except for the copy area. The work area 221 for specific control is cleared to "0", and the stack area 222 for specific control is cleared to "0". As a result, if there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control is executed as it is. It is possible to prevent it from being pushed. Further, even if an information abnormality occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". By not doing so, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" due to an information abnormality in the work area 221 for specific control or the stack area 222 for specific control. It is possible to avoid it.

When the stack area 222 for specific control is cleared to "0", the information of the return address after the execution of the RAM monitoring process is also deleted. Therefore, when the stack area 222 for specific control is cleared to "0", the program is uniquely returned to the predetermined program after the processing of step S5808 is completed. Specifically, the configuration is such that the process uniquely returns to the process of step S5013 in the main process (FIG. 22). However, the program that uniquely returns is not limited to step S5013, and may be step S5221 in the timer interrupt processing (FIG. 86). Further, when the stack area 222 for specific control is cleared to "0", the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 222 for specific control.

After that, an abnormal command indicating that the clearing process at the time of abnormality has occurred is transmitted to the voice emission control device 81 (step S5807). Upon receiving the abnormal command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to forced clearing, and outputs the voice "forced clearing" from the speaker unit 54. In addition, the character image "Forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the work area 221 for the specific control and the stack area 222 for the specific control have been forcibly cleared.

After that, the set value update process is executed (step S5808). The processing content of the set value update processing is the same as step S5412 in the RAM monitoring processing (FIG. 88) in the 22nd embodiment.

When it is not determined that there is an abnormality in both step S5801 and step S5803 (step S5802 and step S5804: NO), the monitoring process of the work area 223 for non-specific control is executed (step S5809). The content of the monitoring process is the same as step S5405 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. When it is determined in step S5809 that there is an abnormality (step S5810: YES), the work area 223 for non-specific control is cleared to "0" and the initial setting is performed (step S5811). In this case, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

On the other hand, in step S5811, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control become "" for that reason. It is possible to prevent "0" from being cleared.

In step S5811, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are cleared by "0", but the management start flag is not cleared by "0". It may be configured. Further, in step S5811, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the management start flag are cleared by "0", but the calculation result storage area 234 is not cleared by "0". It may be configured. Further, in step S5811, although the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 are cleared by "0", the calculation result storage area 234 and the management start flag are not cleared by "0". It may be configured.

When a negative determination is made in step S5810 or the process of step S5811 is executed, the monitoring process of the stack area 224 for non-specific control is executed (step S5812). The content of the monitoring process is the same as step S5407 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. When it is determined in step S5812 that there is an abnormality (step S5813: YES), the stack area 224 for non-specific control is cleared to "0" and the initial setting is performed (step S5814). This makes it possible to eliminate the information abnormality in the stack area 224 for non-specific control.

On the other hand, in step S5814, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are set to "for that reason. It is possible to prevent "0" from being cleared.

According to the above configuration, when it is specified that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control is excluded except for the copy area. Is cleared to "0", and the stack area 222 for specific control is cleared to "0". As a result, if there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control is executed as it is. It is possible to prevent it from being pushed.

Even if an information error occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0" due to an information abnormality in the work area 221 for specific control or the stack area 222 for specific control. It becomes possible to do so.

Even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are prevented from being cleared to "0" due to an information abnormality in the work area 223 for non-specific control. It becomes possible.

Even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are prevented from being cleared to "0" due to an information abnormality in the stack area 224 for non-specific control. It becomes possible.

If an information error has occurred in the work area 221 for specific control, the work area 221 for specific control is cleared to "0" except for the copy area, while the stack area 222 for specific control is "0". It may be configured so that "0" is not cleared.

Further, when an information abnormality has occurred in the stack area 222 for specific control, the stack area 222 for specific control is cleared to "0", while the work area 221 for specific control is not cleared to "0". May be. In this case, even if the stack area 222 for specific control is cleared to "0", the process of steps S5805 to S5808 may not be executed.

<25th Embodiment>
In the present embodiment, the processing configuration for monitoring whether or not an information abnormality has occurred in each area 221 to 224 of the main RAM 65 is different from the 22nd embodiment. Hereinafter, a configuration different from the 22nd embodiment will be described. The description of the same configuration as that of the 22nd embodiment is basically omitted.

FIG. 93 is a flowchart showing the RAM monitoring process in the present embodiment executed by the main CPU 63. The processes of steps S5901 to S5908 in the RAM monitoring process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, the monitoring process of the work area 221 for specific control is executed (step S5901). The content of the monitoring process is the same as step S5401 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. If it is determined in step S5901 that there is an abnormality (step S5902: YES), the processes of steps S5905 to S5908 are executed.

If it is not determined in step S5901 that there is an abnormality (step S5902: NO), the monitoring process of the stack area 222 for specific control is executed (step S5903). The content of the monitoring process is the same as step S5403 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. If it is determined in step S5903 that there is an abnormality (step S5904: YES), the processes of steps S5905 to S5908 are executed.

For details on the processing of steps S5905 to S5908, first, a copy processing of the set value is executed (step S5905). In the copy process, the information of the set value counter used for specifying the set value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. .. As a result, even if the set value counter information is cleared to "0" in the abnormal clearing process (step S5906) executed after that, the pachinko machine 10 before the abnormal clearing process is executed. It becomes possible to grasp the set value of.

After that, the clearing process at the time of abnormality is executed (step S5906). In the clearing process at the time of abnormality, the work area 221 for specific control is cleared to "0" and the stack area 222 for specific control is cleared to "0" except for the copy area. Also, after clearing "0", the initial setting is performed. On the other hand, "0" clearing of the work area 223 for non-specific control and the stack area 224 for non-specific control is not executed. That is, in the RAM monitoring process in the present embodiment, when it is specified that an abnormality has occurred in either the work area 221 for specific control or the stack area 222 for specific control, the specific control is performed except for the copy area. The work area 221 for specific control is cleared to "0", and the stack area 222 for specific control is cleared to "0". As a result, if there is a possibility that some information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the process corresponding to the specific control is executed as it is. It is possible to prevent it from being pushed. Further, even if an information abnormality occurs in the work area 221 for specific control or the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". By not doing so, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0" due to an information abnormality in the work area 221 for specific control or the stack area 222 for specific control. It is possible to avoid it.

After that, an abnormal command indicating that the clearing process at the time of abnormality has occurred is transmitted to the voice emission control device 81 (step S5907). Upon receiving the abnormal command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to forced clearing of the work area 221 for specific control and the stack area 222 for specific control, and the speaker unit 54. Outputs the voice "Forced clearing has been executed for specific control." In addition, the character image "Forced clearing has been executed for specific control" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the work area 221 for the specific control and the stack area 222 for the specific control have been forcibly cleared.

After that, the set value update process is executed (step S5908). The processing content of the set value update processing is the same as step S5412 in the RAM monitoring processing (FIG. 88) in the 22nd embodiment.

In the RAM monitoring process executed by using the program for specific control and the data for specific control as described above, information abnormality monitoring is executed for the work area 221 for specific control and the stack area 222 for specific control. However, information abnormality monitoring is not executed for the work area 223 for non-specific control and the stack area 224 for non-specific control. Monitoring of information abnormalities in the work area 223 for non-specific control and the stack area 224 for non-specific control is a process corresponding to the non-specific control in which the program for non-specific control and the data for non-specific control are used. Is executed.

FIG. 94 is a flowchart showing the management execution process in the present embodiment executed by the main CPU 63. The management execution process is executed by reading the subroutine program in the management process (FIG. 70) as in the fifteenth embodiment. Further, the processes of steps S6001 to S6016 in the management execution process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

In steps S6001 to S6008 and steps S601 to S6016, the same processes as steps S3901 to S3915 of the management execution process (FIG. 71) in the fifteenth embodiment are executed. Further, in step S6009, another monitoring process is executed. When executing the separate monitoring process, the program of the subroutine corresponding to the separate monitoring process set in the program for non-specific control is executed, but when executing the program of the relevant subroutine, the separate monitoring process is executed. Information for specifying the return address of the management execution process later is written in the stack area 224 for non-specific control by the push instruction. Then, when the separate monitoring process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management execution process program indicated by the return address.

FIG. 95 is a flowchart showing another monitoring process. The processes of steps S6101 to S6108 in the separate monitoring process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

First, the monitoring process of the work area 223 for non-specific control is executed (step S6101). The content of the monitoring process is the same as step S5405 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. When it is determined in step S6101 that there is an abnormality (step S6102: YES), the work area 223 for non-specific control is cleared to "0" and the initial setting is performed (step S6103). In this case, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

On the other hand, in step S6103, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the work area 223 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control become "" for that reason. It is possible to prevent "0" from being cleared.

In step S6103, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are cleared by "0", but the management start flag is not cleared by "0". It may be configured. Further, in step S6103, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the management start flag are cleared by "0", but the calculation result storage area 234 is not cleared by "0". It may be configured. Further, in step S6103, the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 are cleared by "0", but the calculation result storage area 234 and the management start flag are not cleared by "0". It may be configured.

After that, the clear notification process is executed (step S6104). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to "0" is transmitted to the voice emission control device 81. Upon receiving the command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the forced clearing of the work area 223 for non-specific control, and the speaker unit 54 “forces the history information to be cleared. The voice "I did." Is output. In addition, the character image "History information has been forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the work area 223 for non-specific control has been forcibly cleared.

When a negative determination is made in step S6102 or the process of step S6104 is executed, the monitoring process of the stack area 224 for non-specific control is executed (step S6105). The content of the monitoring process is the same as step S5407 of the RAM monitoring process (FIG. 88) in the 22nd embodiment. When it is determined in step S6105 that there is an abnormality (step S6106: YES), the stack area 224 for non-specific control is cleared to "0" and the initial setting is performed (step S6107). This makes it possible to eliminate the information abnormality in the stack area 224 for non-specific control.

On the other hand, in step S6107, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are not cleared to "0". As a result, even if an information abnormality occurs in the stack area 224 for non-specific control, the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control are set to "for that reason. It is possible to prevent "0" from being cleared.

After that, the clear notification process is executed (step S6108). In the clear notification process, a command indicating that the stack area 224 for non-specific control has been cleared to "0" is transmitted to the voice emission control device 81. Upon receiving the command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the forced clearing of the stack area 224 for non-specific control, and the speaker unit 54 "is a stack of non-specific control. Forcibly cleared. ”Is output. In addition, the character image "The stack of non-specific control has been forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the stack area 224 for non-specific control has been forcibly cleared.

When the stack area 224 for non-specific control is forcibly cleared, the address of the program in step S6010 in the management execution process (FIG. 94) is uniquely set as the return address information after the execution of the separate monitoring process. .. As a result, even if the stack area 224 for non-specific control is forcibly cleared, it is possible to return to the program that should be restored in the management execution process. When the stack area 224 for non-specific control is forcibly cleared, the stack pointer of the main CPU 63 is also set to the address of the first storage area in the storage order in the stack area 224 for non-specific control.

According to the above configuration, monitoring of whether or not an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control is executed in the process corresponding to the specific control in the main CPU 63, and is not performed. Monitoring of whether or not an information abnormality has occurred in the work area 223 for specific control and the stack area 224 for non-specific control is executed in the process corresponding to the non-specific control in the main CPU 63. As a result, not only the areas 221 to 224 of the main RAM 65 to be used are clearly distinguished between the processing corresponding to the specific control and the processing corresponding to the non-specific control, but also the area of the main RAM 65 to be monitored is observed. 221 to 224 can also be clearly distinguished.

When the work area 223 for non-specific control is cleared to "0", it is the information of various registers of the main CPU 63 used in the processing corresponding to the specific control and is set to the work area 223 for non-specific control. The saved information is also cleared to "0". In this case, even if the process corresponding to the non-specific control ends and returns to the process corresponding to the specific control, it may not be possible to return to the state before the process corresponding to the non-specific control is started. Therefore, when the work area 2223 for non-specific control is cleared to "0", the work area 221 for specific control and the stack area 222 for specific control may also be cleared to "0". Further, in the configuration, the set value counter in the work area 221 for specific control is also cleared to "0". Therefore, when the process corresponding to the non-specific control returns to the process corresponding to the specific control, the specific control is changed. As the corresponding process, the setting value update process may be executed first.

<26th Embodiment>
In the present embodiment, the processing configuration of the management process is different from that of the twentieth embodiment. Hereinafter, a configuration different from the 20th embodiment will be described. The description of the same configuration as that of the twentieth embodiment is basically omitted.

FIG. 96 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. The processes of steps S6201 to S6219 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6201). This prevents the timer interrupt process (FIG. 69), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "LD HL, SP", the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by the load instruction (step S6202). In this case, since the amount of information of the stack pointer is 16 bits and the amount of information of each of the H register and the L register is 8 bits, the 8-bit information continuous from the upper side of the stack pointer is the H register. Is overwritten, and 8-bit information continuous from the lower side of the stack pointer is overwritten in the L register.

After that, as "LD (HL), 0", the 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control is set to "0" by the load instruction. Clear (step S6203). The HL register of the main CPU 63 is overwritten with the information of the stack pointer of the main CPU 63 in step S6202, and the information of the stack pointer of the main CPU 63 is updated by the time the process of step S6203 is executed. Since this has not been performed, in step S6203, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

After that, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by the load instruction. (Step S6204). When the stack area 222 for specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and every time the information to be stored is added, the information to be stored is for specific control. The storage area of the storage destination is changed toward the first address side in the stack area 222 of. Therefore, in step S6204, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area on the side where the address is smaller by one in the stack area 222 for specific control. By executing the process of step S6204, the storage area in the next order is set as the storage target of the information by the next push command with respect to the storage area cleared "0" in step S6203, and in step S6203. The storage area cleared with "0" is set as the target for reading information by the next pop instruction.

After that, as “LD WA, 0”, the WA register of the main CPU 63 is cleared to “0” by the load instruction (step S6205). Further, as "LD BC, 0", the BC register of the main CPU 63 is cleared to "0" by the load instruction (step S6206). Further, as “LD DE, 0”, the DE register of the main CPU 63 is cleared to “0” by the load instruction (step S6207). Further, as “LD HL, 0”, the HL register of the main CPU 63 is cleared to “0” by the load instruction (step S6208). Further, as “LD IX, 0”, the IX register of the main CPU 63 is cleared to “0” by the load instruction (step S6209). Further, as “LD IY, 0”, the IY register of the main CPU 63 is cleared to “0” by the load instruction (step S6210).

In addition to the flag register, various general-purpose registers, auxiliary registers, and index registers are present in the registers of the main CPU 63. In this case, in steps S6205 to S6210, each of the WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, is used. Clear "0". These WA registers, BC registers, DE registers, HL registers, IX registers, and IY registers are registers used in the management execution process (step S6212), which is a process corresponding to non-specific control. By clearing "0" prior to the execution of the management execution process (step S6212), which is a process corresponding to the non-specific control, such registers are set to the state of these registers before the process corresponding to the non-specific control is started. In addition, it is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

Further, the information of the WA register, BC register, DE register, HL register, IX register, and IY register before the processing corresponding to the non-specific control is started is after the processing corresponding to the non-specific control is completed. This information is unnecessary in the process corresponding to the specific control. Therefore, even if the information of these registers is cleared to "0" without being saved, there is no problem in the process corresponding to the specific control returned after the process corresponding to the non-specific control is completed.

After that, as "POP PSW", the information is read from the storage area in the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by the pop instruction. The read information is overwritten in the flag register of the main CPU 63 (step S6211). The information of the stack pointer of the main CPU 63 immediately before the pop instruction of step S6211 is executed is the storage area of the next writing order with respect to the storage area in the stack area 222 for specific control that cleared "0" in step S6203. It is the information corresponding to. Therefore, the storage area in the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control becomes the storage area cleared with "0" in step S6203. .. Then, by overwriting the information read from this storage area with the flag register of the main CPU 63, the flag register is cleared to "0". One storage area in the stack area 222 for specific control has an amount of information of 8 bits (1 byte), and the flag register of the main CPU 63 also has an amount of information of 8 bits (1 byte). .. By clearing the flag register to "0" prior to the execution of the management execution process (step S6212), which is the process corresponding to the non-specific control, the status of the flag register is changed to the state before the process corresponding to the non-specific control is started. It is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

After that, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S6212). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

The processing content of the management execution process is the same as that of the management execution process (FIG. 82) in the twentieth embodiment. Therefore, after the check process is completed in the management execution process, the WA register, BC register, DE register, HL register, IX register, and IY register are cleared to "0". As a result, these registers are cleared to "0" prior to returning from the process corresponding to the non-specific control to the process corresponding to the specific control, and the state of these registers is set before returning to the process corresponding to the specific control. It is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

When the program returns to the management processing program after the management execution processing is executed, the processing for clearing the flag register of the main CPU 63 to "0" is executed. Specifically, first, as "PUSH HL", the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6213). After the execution of the push instruction, the stack pointer information of the main CPU 63 is the information corresponding to the storage area of the next writing order with respect to the storage area in which the HL register information is saved in the stack area 222 for specific control. Become.

After that, as "LD HL, SP", the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by the load instruction (step S6214). In this case, since the amount of information of the stack pointer is 16 bits and the amount of information of each of the H register and the L register is 8 bits, the 8-bit information continuous from the upper side of the stack pointer is the H register. Is overwritten, and 8-bit information continuous from the lower side of the stack pointer is overwritten in the L register.

After that, as "LD (HL), 0", the 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control is set to "0" by the load instruction. Clear (step S6215). The HL register of the main CPU 63 is overwritten with the information of the stack pointer of the main CPU 63 in step S6214, and the information of the stack pointer of the main CPU 63 is updated by the time the process of step S6215 is executed. Since this has not been performed, in step S6215, the 1-byte storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is cleared to "0".

After that, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by the load instruction. (Step S6216). When the stack area 222 for specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and every time the information to be stored is added, the information to be stored is for specific control. The storage area of the storage destination is changed toward the first address side in the stack area 222 of. Therefore, in step S6216, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area on the side where the address of one stack in the stack area 222 for specific control is smaller. By executing the process of step S6216, the storage area in the next order is set as the storage target of the information by the next push command with respect to the storage area cleared "0" in step S6215, and in step S6215. The storage area cleared with "0" is set as the target for reading information by the next pop instruction.

After that, as "POP PSW", the information is read from the storage area in the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by the pop instruction. The read information is overwritten in the flag register of the main CPU 63 (step S6217). The information of the stack pointer of the main CPU 63 immediately before the pop instruction of step S6217 is executed is the storage area of the next writing order with respect to the storage area in the stack area 222 for specific control that cleared "0" in step S6215. It is the information corresponding to. Therefore, the storage area in the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is for specific control in which "0" is cleared in step S6215. It becomes a storage area in the stack area 222. Then, by overwriting the information read from this storage area with the flag register of the main CPU 63, the flag register is cleared to "0". One storage area in the stack area 222 for specific control has an amount of information of 8 bits (1 byte), and the flag register of the main CPU 63 also has an amount of information of 8 bits (1 byte). .. By clearing "0" after executing the management execution process (step S6212), which is a process corresponding to the non-specific control, the flag register is changed to the status of the flag register after the process corresponding to the non-specific control is completed. It is possible to set the state immediately after the supply of the operating power to the power is started. Further, when the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area immediately before the writing order in the stack area 222 for specific control.

After that, as "POP HL", the information of the HL register saved in the stack area 222 for specific control in step S6213 is returned to the HL register of the main CPU 63 by the pop instruction (step S6218). Since the HL register is cleared to "0" immediately before the management execution process (step S6212) is completed, the information cleared by "0" is saved in the stack area 222 for specific control in step S6213. At the same time, in step S6218, the information cleared by "0" is returned to the HL register of the main CPU 63, and as a result, the HL register of the main CPU 63 is cleared by "0". When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 69) is prohibited to the state in which the timer interrupt process (FIG. 69) is permitted (step S6219). This enables new execution of timer interrupt processing.

According to the above configuration, the following effects can be obtained in addition to the effects described in the twentieth embodiment.

The configuration is such that the flag register of the main CPU 63 is cleared to "0" when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is being executed. As a result, it is not necessary to save the information of the flag register used in the process corresponding to the specific control in the main RAM 65 in the situation where the process corresponding to the non-specific control is being executed. Therefore, it is not necessary to secure a capacity for saving the information.

Further, the flag register of the main CPU 63 is cleared to "0" even when the process corresponding to the specific control is returned to the process corresponding to the specific control from the situation where the process corresponding to the non-specific control is being executed. As a result, when returning to the process corresponding to the specific control, it is possible to return the state of the flag register to the state immediately before the process corresponding to the non-specific control is started.

The state in which the flag register is cleared to "0" is the state in which the supply of operating power to the MPU 62 is started. As a result, it is possible to simplify the processing configuration for setting the flag register to a predetermined state when starting the processing corresponding to the non-specific control and when returning to the processing corresponding to the specific control.

The information in the flag register of the main CPU 63 before the process corresponding to the non-specific control is started is the information that is not used in the process corresponding to the specific control after the process corresponding to the non-specific control is completed. As a result, even if the flag register is cleared to "0" when the process corresponding to the non-specific control is started, the process corresponding to the specific control after the process corresponding to the non-specific control is completed can be performed. It is possible to prevent the influence.

The predetermined storage area of the stack area 222 for specific control is cleared by "0", and the information of the storage area cleared by "0" is overwritten in the flag register by the pop instruction to clear the flag register by "0". It is a composition. As a result, it is possible to clear the flag register by "0" even if the configuration is regulated so that the flag register is cleared "0" directly by the load instruction.

Instead of the configuration in which the flag register is cleared to "0", the configuration in which the flag register is initialized may be used. That is, when the supply of the operating power to the MPU 62 is started, the flag register of the main CPU 63 is once cleared to "0", and then the information is set so as to be in the initial state. In step S6211, the flag register may be set so as to be in this initial state. In this case, the flag register is set so as to be in the initial state in steps S6213 to S6218 as well, so that the state of the flag register is non-specifically controlled when returning to the process corresponding to the specific control. It is possible to return to the state immediately before the processing corresponding to is started.

Further, in steps S6202 to S6204 and step S6211, instead of the configuration in which the flag register of the main CPU 63 is cleared to "0", "1" may be set in all of the flag registers. In this case, by setting "1" in all of the flag registers in steps S6213 to S6218, the process corresponding to the non-specific control starts when the status of the flag register is returned to the process corresponding to the specific control. It is possible to return to the state immediately before being done.

Further, instead of the processing of steps S6202 to S6204 and step S6211, the flag register of the main CPU 63 may be directly cleared to "0" by a load instruction as "LD PSW, 0". Further, instead of the processing of steps S6213 to S6218, the flag register of the main CPU 63 may be directly cleared to "0" by a load instruction as "LD PSW, 0".

Further, instead of the configuration for executing the processes of steps S6213 and S6218, the configuration may be such that the HL register is cleared to "0" by the load instruction as "LD HL, 0". Even in this case, it is possible to return the state of the HL register to the state immediately before the management execution process, which is the process corresponding to the non-specific control, is executed.

Further, instead of the configuration in which the process of clearing the flag register "0" is executed in the process corresponding to the specific control, the configuration may be executed in the process corresponding to the non-specific control.

<27th Embodiment>
In the present embodiment, the processing configuration of the management process is different from that of the twentieth embodiment. Hereinafter, a configuration different from the 20th embodiment will be described. The description of the same configuration as that of the twentieth embodiment is basically omitted.

FIG. 97 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. The processes of steps S6301 to S6323 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6301). This prevents the timer interrupt process (FIG. 69), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "PUSH AF", the information of the A register and the information of the flag register of the main CPU 63 are stored by a push instruction corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control. The area and the storage area are saved in each of the storage areas in the next writing order (step S6302). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are individually obtained for two storage areas having consecutive addresses. It is evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "POP HL", the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6302 are overwritten in the HL register of the main CPU 63 by the pop instruction (step S6303). .. In this case, the information of the A register saved in the stack area 222 for specific control is overwritten by the H register of the main CPU 63, and the information of the flag register saved in the stack area 222 for specific control is L of the main CPU 63. The register is overwritten. The H register and the L register of the main CPU 63 each have an amount of information of 8 bits (1 byte). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, as “LD A, 0”, the A register of the main CPU 63 is cleared to “0” by the load instruction (step S6304). Then, as "LD L, A", the information in the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by the load instruction (step S6305), and as "LD H, A", by the load instruction. The information in the A register of the main CPU 63 is overwritten in the H register of the main CPU 63 (step S6306). Since the A register is cleared to "0" in step S6304, each of the L register and the H register is cleared to "0" by overwriting the information of the A register to each of the L register and the H register. It becomes.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by the push instruction. The storage area and the storage area are saved in each of the storage areas in the next writing order (step S6307). Since the H register and the L register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the H register and the information of the L register are individually obtained for two storage areas having consecutive addresses. It is evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, the BC register of the main CPU 63 is cleared to "0" by the load instruction as "LD BC, 0" (step S6308). Further, as “LD DE, 0”, the DE register of the main CPU 63 is cleared to “0” by the load instruction (step S6309). Further, as “LD IX, 0”, the IX register of the main CPU 63 is cleared to “0” by the load instruction (step S6310). Further, as “LD IY, 0”, the IY register of the main CPU 63 is cleared to “0” by the load instruction (step S6311).

In addition to the flag register, various general-purpose registers, auxiliary registers, and index registers are present in the registers of the main CPU 63. In this case, in steps S6308 to S6311, each of the BC register, DE register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers, is cleared to "0". Further, the HL register is cleared to "0" in step S6305 and step S6306. These BC registers, DE registers, HL registers, IX registers, and IY registers are registers used in the management execution process (step S6313), which is a process corresponding to non-specific control. By clearing "0" prior to the execution of the management execution process (step S6313), which is a process corresponding to the non-specific control, such registers are set to the state of these registers before the process corresponding to the non-specific control is started. In addition, it is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

Further, each information of the BC register, DE register, HL register, IX register, and IY register before the processing corresponding to the non-specific control is started is used for the specific control after the processing corresponding to the non-specific control is completed. This is unnecessary information in the corresponding process. Therefore, even if the information of these registers is cleared to "0" without being saved, there is no problem in the process corresponding to the specific control returned after the process corresponding to the non-specific control is completed.

After that, as "POP AF", the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6307 are overwritten on the A register and the flag register of the main CPU 63 by the pop instruction ( Step S6312). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten by the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is the flag of the main CPU 63. The register is overwritten. Since the information of the H register and the information of the L register saved in the stack area 222 for specific control are all "0" information, the A register of the main CPU 63 is changed by executing the process of step S6312. The state in which "0" is cleared and the flag register of the main CPU 63 are cleared in "0". As a result, the state of the flag register can be set to the state immediately after the supply of the operating power to the main CPU 63 is started before the processing corresponding to the non-specific control is started. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S6313). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

After the check process is completed in the management execution process, the BC register, DE register, HL register, IX register, and IY register are cleared to "0". As a result, these registers are cleared to "0" prior to returning from the process corresponding to the non-specific control to the process corresponding to the specific control, and the state of these registers is set before returning to the process corresponding to the specific control. It is possible to set the state immediately after the supply of the operating power to the main CPU 63 is started.

When the program returns to the management processing program after the management execution processing is executed, the processing for clearing the flag register of the main CPU 63 to "0" is executed. Specifically, first, as "PUSH HL", the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6314). After the execution of the push instruction, the stack pointer information of the main CPU 63 is the information corresponding to the storage area of the next writing order with respect to the storage area in which the HL register information is saved in the stack area 222 for specific control. Become.

After that, as "PUSH AF", the information of the A register and the information of the flag register of the main CPU 63 are stored by a push instruction corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control. The area and the storage area are saved in each of the storage areas in the next writing order (step S6315). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are individually obtained for two storage areas having consecutive addresses. It is evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "POP HL", the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6315 are overwritten on the HL register of the main CPU 63 by the pop instruction (step S6316). .. In this case, the information of the A register saved in the stack area 222 for specific control is overwritten by the H register of the main CPU 63, and the information of the flag register saved in the stack area 222 for specific control is L of the main CPU 63. The register is overwritten. The H register and the L register of the main CPU 63 each have an amount of information of 8 bits (1 byte). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, as “LD A, 0”, the A register of the main CPU 63 is cleared to “0” by the load instruction (step S6317). Then, as "LD L, A", the information in the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by the load instruction (step S6318), and as "LD H, A", by the load instruction. The information in the A register of the main CPU 63 is overwritten in the H register of the main CPU 63 (step S6319). Since the A register is cleared to "0" in step S6317, each of the L register and the H register is cleared to "0" by overwriting the information of the A register to each of the L register and the H register. It becomes.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by the push instruction. The storage area and the storage area are saved in each of the storage areas in the next writing order (step S6320). Since the H register and the L register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the H register and the information of the L register are individually obtained for two storage areas having consecutive addresses. It is evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "POP AF", the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6320 are overwritten on the A register and the flag register of the main CPU 63 by the pop instruction ( Step S6321). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten by the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is the flag of the main CPU 63. The register is overwritten. Since the information of the H register and the information of the L register saved in the stack area 222 for specific control are all "0" information, the A register of the main CPU 63 is changed by executing the process of step S6321. The state in which "0" is cleared and the flag register of the main CPU 63 are cleared in "0". By clearing "0" after executing the management execution process (step S6313), which is the process corresponding to the non-specific control, the flag register is changed to the status of the flag register after the process corresponding to the non-specific control is completed. It is possible to set the state immediately after the supply of the operating power to the power is started. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, as "POP HL", the information of the HL register saved in the stack area 222 for specific control in step S6314 is returned to the HL register of the main CPU 63 by the pop instruction (step S6322). Since the HL register is cleared to "0" immediately before the management execution process (step S6313) is completed, the information cleared to "0" is saved in the stack area 222 for specific control in step S6314. At the same time, in step S6322, the information cleared by "0" is returned to the HL register of the main CPU 63, and as a result, the HL register of the main CPU 63 is cleared by "0". When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 69) is prohibited to the state in which the timer interrupt process (FIG. 69) is permitted (step S6323). This enables new execution of timer interrupt processing.

According to the above configuration, it is possible to clear the flag register of the main CPU 63 by "0" without executing the process of clearing the predetermined storage area in the stack area 222 for specific control by the load instruction. It becomes. As a result, the flag register of the main CPU 63 is cleared to "0" even in a configuration in which it is restricted to clear "0" for a predetermined storage area in the stack area 222 for specific control by a load instruction. Is possible.

Instead of the configuration in which the flag register is cleared to "0", the configuration in which the flag register is initialized may be used. That is, when the supply of the operating power to the MPU 62 is started, the flag register of the main CPU 63 is once cleared to "0", and then the information is set so as to be in the initial state. In step S6312, the flag register may be set so as to be in this initial state. In this case, the flag register is set so as to be in the initial state in steps S6314 to S6322, so that the state of the flag register is non-specifically controlled when returning to the process corresponding to the specific control. It is possible to return to the state immediately before the processing corresponding to is started.

Further, in steps S6302 to S6307 and step S6312, instead of the configuration in which the flag register of the main CPU 63 is cleared to "0", "1" may be set in all of the flag registers. In this case, by setting "1" in all of the flag registers in steps S6314 to S6322, the process corresponding to the non-specific control starts when the status of the flag register is returned to the process corresponding to the specific control. It is possible to return to the state immediately before being done.

Further, the process of step S6302 and step S6303 may not be executed. In this case, the processing configuration can be simplified.

Further, the process of step S6315 and step S6316 may not be executed. In this case, the processing configuration can be simplified.

Further, instead of the configuration for executing the processes of steps S6302 to S6306, as "LD HL, 0", after clearing the HL register "0" by the load instruction, the HL register cleared "0" is pushed. The flag register of the main CPU 63 may be cleared to "0" by returning the saved information to the AF register by a pop instruction after saving the stack area 222 for specific control.

Further, instead of the configuration in which the process of clearing the flag register "0" is executed in the process corresponding to the specific control, the configuration may be executed in the process corresponding to the non-specific control.

<28th Embodiment>
In the present embodiment, the processing configuration of the management process is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 98 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. The processes of steps S6401 to S6416 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6401). This prevents the timer interrupt process (FIG. 69), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "PUSH WA", the information of the WA register (that is, the W register and the A register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by the push instruction. The storage area and the storage area are saved in each of the storage areas in the next writing order (step S6402). Since the W register and the A register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the W register and the A register is individually saved for two storage areas having consecutive addresses. NS. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "LDA, PSW", the information of the flag register of the main CPU 63 is overwritten in the A register of the main CPU 63 by the load instruction (step S6403). In this case, the amount of information in both the flag register and the A register is 8 bits (1 byte). Then, as "LD (_FGBUF), A", the information of the A register of the main CPU 63 is saved in the FG buffer set in the work area 221 for specific control by the load instruction (step S6404). Since the information of the flag register is overwritten in the A register in step S6403, the information of the flag register is saved in the work area 221 for specific control by executing step S6404.

After that, as "POP WA", the information of the WA register saved in the stack area 222 for specific control in step S6402 is returned to the WA register of the main CPU 63 by the pop instruction (step S6405). As a result, even if the A register is used to save the information of the flag register to the work area 221 for specific control, the state of the A register can be returned to the state before the saving is performed. Become. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S6406). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

The processing content of the management execution process is the same as that of the management execution process (FIG. 71) in the fifteenth embodiment. Therefore, each information of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 is saved in the work area 223 for non-specific control before the check process is started in the management execution process. At the same time, each information saved in the work area 223 for non-specific control after the check process is completed in the management execution process is the WA register, BC register, DE register, HL register, IX register and IY register of the main CPU 63. Is returned to. As a result, the states of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 can be made the same before and after the check process.

However, the present invention is not limited to this, and the processing content of the management execution process may be the same as that of the management execution process (FIG. 78) in the 17th embodiment. The configuration may be the same as that of FIG. 79, or the configuration may be the same as that of the management execution process (FIG. 80) in the 19th embodiment.

When the program returns to the management process program after the management execution process is executed, a process for returning the information of the flag register of the main CPU 63 to the state before the management execution process is executed is executed. Specifically, first, as "PUSH HL", the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6407). After the execution of the push instruction, the stack pointer information of the main CPU 63 is the information corresponding to the storage area of the next writing order with respect to the storage area in which the HL register information is saved in the stack area 222 for specific control. Become.

After that, as "PUSH WA", the information of the WA register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6408). After the execution of the push instruction, the stack pointer information of the main CPU 63 is the information corresponding to the storage area of the next writing order with respect to the storage area in which the WA register information is saved in the stack area 222 for specific control. Become.

After that, as "LD HL, SP", the information of the stack pointer of the main CPU 63 is overwritten in the HL register of the main CPU 63 by the load instruction (step S6409). In this case, since the amount of information of the stack pointer is 16 bits and the amount of information of each of the H register and the L register is 8 bits, the 8-bit information continuous from the upper side of the stack pointer is the H register. Is overwritten, and 8-bit information continuous from the lower side of the stack pointer is overwritten in the L register.

After that, as "LDA, (_FGBUF)", the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6406 is overwritten in the A register of the main CPU 63 by the load instruction (step). S6410). Then, as "LD (HL), A", the main side is moved to the 1-byte storage area corresponding to the stack pointer information stored in the HL register of the main CPU 63 in the stack area 222 for specific control by the load instruction. The information of the A register of the CPU 63 is stored (step S6411). As a result, the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is saved in the stack area 222 for specific control.

After that, as "LD SP, SP-1", the information of the stack pointer of the main CPU 63 is updated to the information of the address of the storage area to be written in the next order in the stack area 222 for specific control by the load instruction. (Step S6412). When the stack area 222 for specific control is used, the information to be stored is stored from the storage area of the last address in the stack area 222 for specific control, and every time the information to be stored is added, the information to be stored is for specific control. The storage area of the storage destination is changed toward the first address side in the stack area 222 of. Therefore, in step S6412, the information of the stack pointer of the main CPU 63 is updated to the information of the address corresponding to the storage area on the side where the address is smaller by one in the stack area 222 for specific control. By executing the process of step S6412, the storage area in the next order is set as the storage target of the information by the next push instruction with respect to the storage area in which the information of the A register is saved in step S6411, and the step In S6411, the storage area in which the A register information is saved is set as the information read target by the next pop instruction.

After that, as "POP PSW", the information is read from the storage area in the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control by the pop instruction. The read information is overwritten in the flag register of the main CPU 63 (step S6413). The information of the stack pointer of the main CPU 63 immediately before the pop instruction of step S6413 is executed is the information corresponding to the storage area of the next writing order with respect to the storage area in which the information of the A register is saved in step S6411. It has become. Therefore, the storage area of the writing order immediately before the storage area corresponding to the information of the stack pointer of the main CPU 63 in the stack area 222 for specific control is the storage in which the information of the A register is saved in step S6411. It becomes an area. Then, by overwriting the information read from this storage area with the flag register of the main CPU 63, the information of the flag register saved in the FG buffer in the work area 221 for specific control in step S6404 is the flag of the main CPU 63. It will be returned to the register. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area immediately before the writing order in the stack area 222 for specific control.

After that, as "POP WA", the information of the WA register saved in the stack area 222 for specific control in step S6408 is returned to the WA register of the main CPU 63 by the pop instruction (step S6414). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control. Further, as "POP HL", the information of the HL register saved in the stack area 222 for specific control in step S6407 is returned to the HL register of the main CPU 63 by the pop instruction (step S6415). When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 69) is prohibited to the state in which the timer interrupt process (FIG. 69) is permitted (step S6416). This enables new execution of timer interrupt processing.

According to the above configuration, when the process corresponding to the non-specific control is started from the situation where the process corresponding to the specific control is executed, the information of the flag register of the main CPU 63 is not the stack area 222 for the specific control. It is possible to evacuate to the work area 221 for specific control. Then, when the process corresponding to the specific control is returned from the situation in which the process corresponding to the non-specific control is executed, the information of the flag register saved in the work area 221 for the specific control is the flag of the main CPU 63. Returned to the register. As a result, the information may be returned from the storage area of the work area 221 for specific control specified on the program to the flag register of the main CPU 63 without referring to the information of the stack pointer of the main CPU 63. Even if the information of the stack pointer of the side CPU 63 is rewritten due to noise or the like, the information can be restored to the flag register of the main CPU 63.

Further, instead of the configuration in which the process of saving the information of the flag register in the main RAM 65 is executed in the process corresponding to the specific control, the configuration may be executed in the process corresponding to the non-specific control. Further, instead of the configuration in which the process of returning the information of the flag register saved in the main RAM 65 to the flag register of the main CPU 63 is executed in the process corresponding to the specific control, the process corresponding to the non-specific control is used. It may be a configuration to be executed.

<29th Embodiment>
In the present embodiment, the processing configuration of the management process is different from that of the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 99 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. The processes of steps S6501 to S6519 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 69) (step S6501). This prevents the timer interrupt process (FIG. 69), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by the push instruction. The storage area and the storage area are saved in each of the storage areas in the next writing order (step S6502). Since the H register and the L register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the H register and the L register is individually saved for two storage areas having consecutive addresses. NS. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "PUSH AF", the information of the A register and the information of the flag register of the main CPU 63 are stored by a push instruction corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control. The area and the storage area are saved in each of the storage areas in the next writing order (step S6503). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are individually obtained for two storage areas having consecutive addresses. It is evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "POP HL", the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6503 are overwritten in the HL register of the main CPU 63 by the pop instruction (step S6504). .. In this case, the information of the A register saved in the stack area 222 for specific control is overwritten by the H register of the main CPU 63, and the information of the flag register saved in the stack area 222 for specific control is L of the main CPU 63. The register is overwritten. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, as "LD A, L", the information of the L register of the main CPU 63 is overwritten in the A register of the main CPU 63 by the load instruction (step S6505). Since the information of the flag register of the main CPU 63 is overwritten in the L register in step S6504, the information of the flag register is overwritten in the A register by overwriting the information of the L register in the A register. Become. Then, as "LD (_FGBUF), A", the information of the A register of the main CPU 63 is saved in the FG buffer set in the work area 221 for specific control by the load instruction (step S6506). Since the information of the flag register is overwritten in the A register in step S6505, the information of the flag register is saved in the work area 221 for specific control by executing step S6506.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by the push instruction. The storage area and the storage area are saved in each of the storage areas in the next writing order (step S6507). In this case, since the A register information and the flag register information are overwritten in the HL register in step S6504, the A register information and the flag register information are saved in the stack area 222 for specific control in step S6507. I was allowed to do it. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "POP AF", the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6507 are overwritten on the A register and the flag register of the main CPU 63 by the pop instruction ( Step S6508). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten by the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is the flag of the main CPU 63. The register is overwritten. The information of the H register saved in the stack area 222 for specific control is the information of the A register at the time of step S6503, and the information of the L register saved in the stack area 222 for specific control is the information of the flag at the time of step S6503. Register information. Therefore, when the process of step S6508 is executed, the states of the A register and the flag register of the main CPU 63 are returned to the states at the time of step S6503. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, as "POP HL", the information of the HL register saved in the stack area 222 for specific control in step S6502 is returned to the HL register of the main CPU 63 by the pop instruction (step S6509). As a result, the state of the HL register of the main CPU 63 returns to the state at the time of step S6502. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S6510). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

In the management execution process, the BC register, DE register, HL register, IX register, and IY register information of the main CPU 63 are saved in the work area 223 for non-specific control before the check process is started. After the check process is completed in the management execution process, each information saved in the work area 223 for non-specific control is returned to the BC register, DE register, HL register, IX register, and IY register of the main CPU 63. As a result, the states of the BC register, DE register, HL register, IX register, and IY register of the main CPU 63 can be made the same before and after the check process.

However, the present invention is not limited to this, and the processing content of the management execution process may be the same as that of the management execution process (FIG. 78) in the 17th embodiment. The configuration may be the same as that of FIG. 79, or the configuration may be the same as that of the management execution process (FIG. 80) in the 19th embodiment.

When the program returns to the management process program after the management execution process is executed, a process for returning the information of the flag register of the main CPU 63 to the state before the management execution process is executed is executed. Specifically, first, as "PUSH HL", the information of the HL register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S6511). After the execution of the push instruction, the stack pointer information of the main CPU 63 is the information corresponding to the storage area of the next writing order with respect to the storage area in which the HL register information is saved in the stack area 222 for specific control. Become.

After that, as "PUSH AF", the information of the A register and the information of the flag register of the main CPU 63 are stored by a push instruction corresponding to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control. The area and the storage area are saved in each of the storage areas in the next writing order (step S6512). Since the A register and the flag register of the main CPU 63 each have an amount of information of 8 bits (1 byte), the information of the A register and the information of the flag register are individually obtained for two storage areas having consecutive addresses. It is evacuated. When the push instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area after the writing order in the stack area 222 for specific control is two.

After that, as "POP HL", the information of the A register and the information of the flag register saved in the stack area 222 for specific control in step S6512 are overwritten on the HL register of the main CPU 63 by the pop instruction (step S6513). .. In this case, the information of the A register saved in the stack area 222 for specific control is overwritten by the H register of the main CPU 63, and the information of the flag register saved in the stack area 222 for specific control is L of the main CPU 63. The register is overwritten. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, as "LD A, (_FGBUF)", the information of the flag register at the time of step S6503 saved in the FG buffer in the work area 221 for specific control in step S6506 by the load instruction is stored in the A register of the main CPU 63. (Step S6514). Then, as "LD L, A", the information in the A register of the main CPU 63 is overwritten in the L register of the main CPU 63 by the load instruction (step S6515). Since the information of the flag register of the main CPU 63 at the time of step S6503 is restored to the A register in step S6514, the information of the A register is overwritten on the L register to the L register at the time of step S6503. The information in the flag register is overwritten.

After that, as "PUSH HL", the information of the HL register (that is, the H register and the L register) of the main CPU 63 corresponds to the information of the current stack pointer of the main CPU 63 in the stack area 222 for specific control by the push instruction. The storage area and the storage area are saved in each of the storage areas in the next writing order (step S6516). In this case, since the information of the A register at the time of the step S6512 is overwritten in the H register in step S6513, the information of the A register is saved in the stack area 222 for specific control in step S6516. Become. Further, since the information of the flag register at the time of step S6503 is overwritten in the L register in step S6515, the information of the flag register is saved in the stack area 222 for specific control in step S6516.

After that, as "POP AF", the information of the H register and the information of the L register saved in the stack area 222 for specific control in step S6516 are overwritten on the A register and the flag register of the main CPU 63 by the pop instruction ( Step S6517). In this case, the information of the H register saved in the stack area 222 for specific control is overwritten by the A register of the main CPU 63, and the information of the L register saved in the stack area 222 for specific control is the flag of the main CPU 63. The register is overwritten. The information of the H register saved in the stack area 222 for specific control is the information of the A register at the time of step S6512, and the information of the L register saved in the stack area 222 for specific control is the information of the flag at the time of step S6503. Register information. Therefore, by executing the process of step S6517, the state of the A register of the main CPU 63 returns to the state of step S6512, and the state of the flag register returns to the state at the time of step S6503.

Incidentally, the A register of the main CPU 63 is not used in the management execution process. Therefore, the state of the A register at the time of step S6512 is the state of the A register at the time of step S6508, and the state of the A register at the time of step S6508 is the state of the A register at the time of step S6503. Therefore, when the process of step S6517 is executed, the states of the A register and the flag register of the main CPU 63 are returned to the states at the time of step S6503. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, as "POP HL", the information of the HL register saved in the stack area 222 for specific control in step S6511 is returned to the HL register of the main CPU 63 by the pop instruction (step S6518). As a result, the state of the HL register of the main CPU 63 is restored to the state at the time of step S6511. When the pop instruction is executed, the information of the stack pointer of the main CPU 63 is updated to the information corresponding to the storage area two times before the writing order in the stack area 222 for specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 69) is prohibited to the state in which the timer interrupt process (FIG. 69) is permitted (step S6519). This enables new execution of timer interrupt processing.

According to the above configuration, the information of the flag register of the main CPU 63 is not executed by the load instruction to directly overwrite the information of the flag register from the flag register of the main CPU 63 to the other registers of the main CPU 63. Can be retracted to the work area 221 for specific control.

The flag register information was overwritten by the load instruction as "LD (_FGBUF), L" after executing the process of step S6504 instead of executing the process of step S6505 to step S6508. By saving the information of the L register in the FG buffer, the information of the flag register may be saved in the work area 221 for specific control.

Further, instead of executing the processes of step S6514 and step S6515, after executing the process of step S6513, the work area for specific control is given as "LDL, (_FGBUF)" by a load instruction. The L register may be overwritten with the information of the flag register saved in 221.

Further, instead of the configuration in which the process of saving the information of the flag register in the main RAM 65 is executed in the process corresponding to the specific control, the configuration may be executed in the process corresponding to the non-specific control. Further, instead of the configuration in which the process of returning the information of the flag register saved in the main RAM 65 to the flag register of the main CPU 63 is executed in the process corresponding to the specific control, the process corresponding to the non-specific control is used. It may be a configuration to be executed.

<30th embodiment>
In the present embodiment, the processing configuration executed by the main CPU 63 is different from the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 100 is a flowchart showing a main process in the present embodiment executed by the main CPU 63. The processes of steps S6601 to S6621 in the main process are executed by using the program for specific control and the data for specific control in the main CPU 63.

First, the power-on wait process is executed (step S6601). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. During the execution period of the power-on wait process, the operation start and initial setting of the symbol display device 41 are completed. After that, access to the main RAM 65 is permitted (step S6602).

After that, it is determined whether or not "1" is set in the power failure flag provided in the work area 221 for specific control in the main RAM 65 (step S6603). When "1" is set in the power failure flag (step S6603: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S6604).

The checksum calculation method is arbitrary, and examples thereof include a calculation method in which all the numerical values of the storage area for which the checksum is calculated are added. The checksum calculation method is the same as the checksum calculation method in the power failure processing described later. The checksum calculated in the power failure processing described later is stored in the work area 221 for specific control, and the storage area of the work area 221 for specific control in which this checksum is stored is the calculation of the checksum. At this time, it is excluded from the storage area to be calculated.

That is, when calculating the checksum, a part of the storage areas in the work area 221 for specific control and the stack area 222 for specific control are the calculation targets. In the storage area to be calculated, the checksum is calculated in the power failure process when the supply of the operating power to the MPU 62 is stopped, and then the supply of the operating power to the MPU 62 is restarted and the process of step S6604 is executed. Until this is done, the storage area is basically a storage area where information is not rewritten when power supply such as backup power to the work area 221 for specific control and the stack area 222 for specific control is continued. Therefore, the information of the work area 221 for specific control and the stack area 222 for specific control has not been changed between the time when the supply of the operating power to the MPU 62 is stopped and the time when the supply of the operating power to the MPU 62 is restarted. In this case, the checksums for the work area 221 for specific control and the stack area 222 for specific control are the same as immediately before the supply of operating power to the MPU 62 is stopped. In the storage area to be calculated when calculating this checksum, an area (specifically, a set value counter) in which information on a set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control is set. )It is included.

After that, the work area 221 for specific control and the stack area for specific control calculated in the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control The checksum for 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S6604 (step S6605). Then, it is determined whether or not the checksums match (step S6606).

Here, the power failure information storage process executed by the main CPU 63 will be described with reference to the flowchart of FIG. The power failure information storage process is executed in step S6801 in the timer interrupt process (FIG. 103) described later.

In the power failure information storage process, first, the information of "10" which is the repetition count information for the power failure signal is set in the repetition counter provided in the work area 221 for the specific control (step S6701), and the work area for the specific control is set. The power failure detection counter provided in 221 is cleared to "0" (step S6702).

After that, the process of reading the information of the power failure signal received in the input port of the MPU 62 is executed (step S6703). In this case, when a power failure signal (LOW level power failure signal) corresponding to the fact that the power is not cut off is received, "0" information is stored in the input port as non-power failure information. When a power failure signal (HI level power failure signal) corresponding to the occurrence of power cutoff is received, the information "1" is stored in the input port as the power failure occurrence information. In step S6703, a process of reading the information of the power failure signal into the register of the main CPU 63 is executed.

When the information of the power failure signal read in step S6703 corresponds to the occurrence of power failure (occurrence of power failure) (step S6704: YES), the numerical information of the power failure detection counter is added by 1 (step S6705). When a negative determination is made in step S6704 or the process of step S6705 is executed, the numerical information of the repetition counter is decremented by 1 (step S6706). Then, it is determined whether or not the numerical information of the repetition counter after the 1 subtraction is "0" (step S6707). If a negative determination is made in step S6707, the process returns to step S6703 and the processes of steps S6703 to S6706 are repeated. On the other hand, if an affirmative determination is made in step S6707, the process proceeds to step S6708.

In step S6708, it is determined whether or not the current numerical information of the power failure detection counter is equal to or greater than the trigger reference number of times corresponding to the occurrence of the power failure. If the number of triggers is less than the reference number, the power failure information storage process is terminated as it is. On the other hand, if the number of triggers is equal to or greater than the reference number of times, the power failure processing in steps S6709 to S6712 is executed.

Specifically, first, "1" is set in the power failure flag provided in the work area 221 for specific control (step S6709). As a result, when the power failure processing is normally executed and the information is normally stored and retained in the main RAM 65, the specific control is used when the supply of the operating power to the main CPU 63 is restarted. This means that "1" is set in the power failure flag of the work area 221 of.

After that, checksums are calculated for the work area 221 for specific control and the stack area 222 for specific control (step S6710). In this case, the storage areas in the work area 221 for specific control and the stack area 222 for specific control, which are the calculation targets when calculating the checksum, are the calculation targets of the checksum in step S6604 of the main process (FIG. 100). It is the same as the storage area in the work area 221 for specific control and the stack area 222 for specific control. Further, in the storage area to be calculated when calculating this checksum, an area (specifically, a set value counter) in which information of a set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control is set. )It is included. Then, the calculated checksum is stored in the storage area for storing the checksum in the work area 221 for specific control, which is excluded from the checksum calculation target.

After that, all the information of the output ports in the registers of the main CPU 63 is set to "0" (step S6711), and access to the main RAM 65 is prohibited (step S6712). Then, the infinite loop is continued until the power supply is completely cut off and the process cannot be executed.

By executing the power failure information storage process as the first process of the timer interrupt process, it is not necessary to execute the timer interrupt process from the middle after the power is restored. As a result, it is not necessary to store the address of the processing executed at the time of the power failure in the main RAM 65 as stack information, and it is possible to reduce the processing load of the processing at the time of the power failure.

Returning to the description of the main process (FIG. 100), if a negative determination is made in step S6603 or step S6606, the clear process at the time of non-setting update is executed (step S6607). In the clearing process at the time of non-setting update, the specific control is performed except for the area (specifically, the set value counter) in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control. Clear the work area 221 for "0" and execute the initial setting. As a result, the area indicating whether or not the winning / failing lottery mode is the high probability mode is cleared to "0", so that the winning / losing lottery is performed regardless of the winning / failing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game times are not executed, the open / close execution mode is not executed, and the normal map display unit 38a is not variablely displayed, and the general electric accessory 34a is closed. It becomes a situation. Further, since the hold storage area 65a and the normal electric hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is deleted and the normal figure display unit is deleted. The hold information for 38a is deleted. Further, in the clearing process at the time of non-setting update, the stack area 222 for specific control is cleared to "0" and the initial setting is executed. Further, in the clearing process at the time of non-setting update, the initial setting is executed after clearing "0" in various registers of the main CPU 63.

On the other hand, in the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if the power failure flag is not set to "1" due to the power failure processing not being executed normally, the work area 223 for non-specific control and the stack area 224 for non-specific control are set to "0". It is possible to prevent it from being cleared. Further, even if an abnormality occurs in the checksums of the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control are cleared to "0". It is possible to prevent it from being done.

When a negative determination is made in step S6603 or step S6606, after executing the clearing process at the time of non-setting update in step S6607, the pachinko machine is checked by checking the value of the set value counter in the work area 221 for specific control. It is determined whether or not the set value of 10 is normal (step S6608). Specifically, when the set value set in the set value counter is any of "setting 1" to "setting 6", it is determined to be normal, and when it is "0" or 7 or more, it is abnormal. Judge that there is. When the set value is abnormal (step S6608: NO), the process for newly setting the set value described later (step S6619 to step S6621) is executed. As a result, it is possible to monitor whether or not the set value is normal even when a negative determination is made in step S6603 or step S6606 and the clear process (step S6607) at the time of non-setting update is executed. At the same time, if the set value is abnormal, it is possible to reset the set value.

When the set value is normal (step S6608: YES), the power-on setting process is executed (step S6609). In the power-on setting process, a predetermined area of the work area 221 for specific control such as initialization of the power failure flag is set as an initial value, and a command corresponding to the current gaming state is transmitted to the voice emission control device 81.

The main CPU 63 is configured to periodically execute the timer interrupt process, but the occurrence of the timer interrupt process is prohibited at the stage when the main process is started. The state in which the occurrence of the timer interrupt process is prohibited is released at the timing before the process of step S6609 is completed and the process of step S6610 is executed, and the execution of the timer interrupt process is permitted. As a result, when the supply of the operating power to the main CPU 63 is started, the power-on setting process of step S6609 is completed, and the timer interrupt process is not executed until the stage before the process of step S6610 is started. Therefore, until the situation is reached, the main CPU 63 does not start the process for advancing the game.

After that, the process proceeds to the residual processing of steps S661 to S6613. That is, although the main CPU 63 is configured to periodically execute the timer interrupt processing, a residual time is generated between the timer interrupt processing of 1 and the next timer interrupt processing. This residual time varies depending on the processing completion time of each timer interrupt process, and the residual process of steps S661 to S6613 is repeatedly executed by utilizing the irregular time. In this respect, it can be said that the residual processing in steps S661 to S6613 is an irregular process that is executed irregularly. In steps S661 to S6613, the same processes as in steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

As described above, in the present embodiment, when the supply of the operating power to the main CPU 63 is started, the power failure flag of the work area 221 for specific control is not set to "1", or the checksums do not match. In this case, after executing the clearing process at the time of non-setting update, if the set value is normal (step S6608: YES), the process proceeds to the process for advancing the game. As a result, even if the power failure flag is not set to "1" due to the power failure processing not being executed normally, the power is turned on again after the supply of operating power to the main CPU 63 is started. There is no need to perform an OFF operation. Further, even if an abnormality occurs in the checksum of the work area 221 for specific control and the stack area 222 for specific control, the power is turned on / off again after the supply of operating power to the main CPU 63 is started. No operation required.

When an affirmative determination is made in both step S6603 and step S6666, it is determined whether or not the set value of the pachinko machine 10 is normal by checking the value of the set value counter in the work area 221 for specific control (step S6614). ). Specifically, when the set value set in the set value counter is any of "setting 1" to "setting 6", it is determined to be normal, and when it is "0" or 7 or more, it is abnormal. Judge that there is. When the set value is abnormal (step S6614: NO), the process for newly setting the set value described later (step S6619 to step S6621) is executed.

When the set value is normal (step S6614: YES), it is determined whether or not the reset button 68c is pressed (step S6615), and whether the setting key insertion unit 68a is turned on by using the setting key. It is determined whether or not (step S6616), it is determined whether or not the front door frame 14 is in the open state with respect to the inner frame 13 (step S6617), and the gaming machine main body 12 is in the open state with respect to the outer frame 11. It is determined whether or not there is (step S6618).

In the present embodiment, the front door opening sensor 95 for detecting whether or not the front door frame 14 is in the open state with respect to the inner frame 13 is electrically connected to the main CPU 63, and the front door opening sensor The detection result of 95 is input to the main CPU 63. In this case, when the front door frame 14 is closed with respect to the inner frame 13, the front door opening sensor 95 transmits a closing detection signal to the main CPU 63, and the front door frame 14 is open with respect to the inner frame 13. In this case, the front door opening sensor 95 transmits an opening detection signal to the main CPU 63. The main CPU 63 identifies that the front door frame 14 is in the closed state when receiving the closing detection signal from the front door opening sensor 95, and receives the opening detection signal from the front door opening sensor 95. It is specified that the front door frame 14 is in the open state.

Further, in the present embodiment, the main body opening sensor 96 for detecting whether or not the gaming machine main body 12 is in the open state with respect to the outer frame 11 is electrically connected to the main CPU 63, and the main body opening sensor 96 is electrically connected. The detection result of 96 is input to the main CPU 63. In this case, when the gaming machine main body 12 is closed with respect to the outer frame 11, the main body opening sensor 96 transmits a closing detection signal to the main CPU 63, and the gaming machine main body 12 is open with respect to the outer frame 11. In some cases, the main body open sensor 96 transmits an open detection signal to the main CPU 63. The main CPU 63 identifies that the gaming machine main body 12 is in the closed state when receiving the closing detection signal from the main body opening sensor 96, and the gaming machine when receiving the opening detection signal from the main body opening sensor 96. It is specified that the main body 12 is in the open state.

When the reset button 68c is not pressed (step S6615: NO), the power-on setting process is executed in step S6609, and then the residual process of steps S661 to S6613 is repeated. That is, when the reset button 68c is not pressed, the process shifts to the process of controlling the progress of the game without executing the clear process of the work area 221 for the specific control and the stack area 222 for the specific control. ..

If the reset button 68c is pressed (step S6615: YES) and a negative determination is made in any of steps S6616 to S6618, after executing the clearing process at the time of non-setting update (step S6607). ), On condition that the set value is normal (step S6608: YES), the process proceeds to the process for controlling the progress of the game in step S6609 and thereafter. The processing content of the clearing process at the time of non-setting update is as described above.

When the reset button 68c is pressed (step S6615: YES) and an affirmative determination is made in all of steps S6616 to S6618, a process for updating the set value is executed. Further, even when it is determined in step S6608 or step S6614 that the set value is abnormal, a process for updating the set value is executed.

Specifically, first, the copy process of the set value is executed (step S6619). In the copy process, the information of the set value counter used for specifying the set value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. .. As a result, even if the information of the set value counter is cleared to "0" in the clear process at the time of setting update (step S6620) executed after that, the book before the clear process at the time of updating the set value is executed. It is possible to grasp the set value of the pachinko machine 10 (that is, the set value of the pachinko machine 10 before the supply of the operating power to the pachinko machine 10 is stopped).

After that, the clearing process at the time of setting update is executed (step S6620). In the clearing process at the time of setting update, the work area 221 for specific control is set to "0" except for the area indicating whether or not the winning / fail lottery mode in the work area 221 for specific control is the high probability mode and the copy area. Clear and perform the initial settings. As a result, the game times are not executed, the open / close execution mode is not executed, and the normal map display unit 38a is not variablely displayed, and the normal electric accessory 34a is closed. There is a situation. Further, since the hold storage area 65a and the normal electric hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is deleted and the normal figure display unit is deleted. The hold information for 38a is deleted. Further, in the clearing process at the time of setting update, the stack area 222 for specific control is cleared to "0" and the initial setting is executed. Further, in the clearing process at the time of setting update, the setting value counter used for specifying the setting value of the pachinko machine 10 is cleared to "0". Further, in the clearing process at the time of setting update, the initial setting is executed after clearing "0" in various registers of the main CPU 63.

On the other hand, in the clearing process at the time of setting update, the area indicating whether or not the winning / failing lottery mode is the high probability mode is not cleared to "0". Therefore, even if the setting value updating process (step S6621) is executed, the winning / failing lottery mode Can be maintained in the mode before the supply of the operating power to the pachinko machine 10 is stopped. Further, since the copy area is not cleared by "0" in the clear process at the time of setting update, it is possible to specify the set value set before the clear process at the time of setting update is executed. It should be noted that the configuration is not limited to the above, and the setting value counter used for specifying the setting value of the pachinko machine 10 may not be cleared by "0" in the clearing process at the time of setting update. In the clearing process, the area indicating whether or not the winning / failing lottery mode is the high probability mode may be cleared by "0".

In the clear process at the time of setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, even if the set value update process that can change the set value of the pachinko machine 10 is executed, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". It becomes possible to do so.

After that, the set value update process is executed in step S6621. The processing content of the set value update process is the same as the set value update process (FIG. 85) in the 22nd embodiment. After executing the set value update process, the process proceeds to the process for controlling the progress of the game after step S6609.

According to the above configuration, when the set value is abnormal, the set value update process is started without requiring a special operation by the manager of the game hall. Then, when the set value update process is completed, the process shifts to the process for controlling the progress of the game. This makes it possible to play the game in a situation set to a normal set value. On the other hand, in order to complete the setting value update process, it is necessary to perform an OFF operation with the setting key for the setting key insertion unit 68a, so that the setting value is arbitrarily set by a person other than the manager of the game hall and the game is started. It is possible to prevent the occurrence of the event that the key is lost.

Next, a configuration for forcibly stopping the progress of the game when various processes cannot be normally performed by the main CPU 63 will be described. FIG. 102A is a block diagram for explaining the configuration of the MPU 62.

As shown in FIG. 102 (a), the MPU 62 is provided with a main CPU 63, a main ROM 64, and a main RAM 65, as well as a reset signal output unit 251 and a program monitoring unit 252. The reset signal output unit 251 has a function of outputting a reset signal to the main CPU 63. Specifically, the reset signal output unit 251 uses the reset signal as the HI level signal on the main side when the operating power is supplied from the power supply / emission control device 78 and the output disabling condition is not satisfied. It outputs to the CPU 63, and if the operating power is not supplied from the power supply / launch control device 78, or even if the operating power is supplied, the reset signal is sent to the main CPU 63 if the output disabling condition is satisfied. Do not output to. The main CPU 63 executes various processes when the operating power is supplied from the power supply / emission control device 78 and the reset signal is received from the reset signal output unit 251, and is executed from the power supply / emission control device 78. Even when the operating power is supplied, if the reset signal is not received from the reset signal output unit 251, various processes are not executed. Further, when the main CPU 63 switches from the situation where the reset signal output unit 251 does not receive the reset signal to the situation where the reset signal is received when the operating power is supplied from the power supply / emission control device 78. The main process (FIG. 100) is started at.

The program monitoring unit 252 has a function of monitoring whether or not the main CPU 63 can normally perform various processes. Specifically, the program monitoring unit 252 monitors whether or not the value of the program counter provided in the main CPU 63 is an abnormal value. The program counter is for storing an address in which an instruction to be executed is stored in the main CPU 63. A possible value is determined for the program counter, and the program monitoring unit 252 monitors whether or not the value of the program counter is a value other than the possible value. Further, when the program monitoring unit 252 writes the information to the work area 221 for specific control by the load instruction, the program monitoring unit 252 monitors whether or not the address designated as the writing destination area is an abnormal address. The program monitoring unit 252 may be configured to monitor whether or not the address designated as the area to be read is an abnormal address when reading information from the work area 221 for specific control by a load instruction.

When the program monitoring unit 252 determines that the value of the program counter is an abnormal value, or determines that the address specified when writing information by the load instruction is an abnormal value, the reset signal output unit 251 Outputs a monitoring error signal to. When the reset signal output unit 251 receives the monitoring abnormality signal from the program monitoring unit 252, the reset signal output unit 251 temporarily stops the output of the reset signal even when the operating power is supplied from the power supply / emission control device 78, and continues to stop. After stopping the output of the reset signal for a period of time, the output of the reset signal is restarted. The stop duration is a period sufficient for the main CPU 63 to specify that the output of the reset signal is stopped. As a result, if the value of the program counter becomes an abnormal value, or if the address specified when writing information by the load instruction becomes an abnormal address, the main CPU 63 is turned on and off by the reset signal. The main process will be executed at.

FIG. 102B is a time chart showing the state of output of the reset signal by the reset signal output unit 251. FIG. 102 (b1) shows the period during which the operating power is supplied from the power supply / emission control device 78, and FIG. 102 (b2) shows the period during which the reset signal is output from the reset signal output unit 251. b3) indicates the timing at which the monitoring abnormality signal is output from the program monitoring unit 252.

First, the case where the monitoring abnormality signal is not output from the program monitoring unit 252 will be described. As shown in FIG. 102 (b1), the supply of operating power from the power supply / emission control device 78 to the MPU 62 is started at the timing of t1. At the timing of t2, the output of the reset signal from the reset signal output unit 251 is started as shown in FIG. 102 (b). After that, as shown in FIG. 102 (b1), the supply of operating power from the power supply / emission control device 78 to the MPU 62 is stopped at the timing of t3, so that the reset is performed at the timing of t4 as shown in FIG. 102 (b2). The output of the reset signal from the signal output unit 251 is stopped.

Next, a case where a monitoring abnormality signal is output from the program monitoring unit 252 will be described. At the timing of t5, supply of operating power from the power supply / emission control device 78 to the MPU 62 is started as shown in FIG. 102 (b1). As a result, the output of the reset signal from the reset signal output unit 251 is started at the timing of t6 as shown in FIG. 102 (b). After that, at the timing of t7, the value of the program counter becomes an abnormal value, or the address specified when writing information by the load instruction becomes an abnormal address, so that the program is monitored as shown in FIG. 102 (b3). A monitoring abnormality signal is output from the unit 252 to the reset signal output unit 251. As a result, as shown in FIG. 102 (b2), the output of the reset signal from the reset signal output unit 251 is temporarily stopped at the timing of t7, and then restarted at the timing of t8 thereafter.

In this case, the main CPU 63 stops executing various processes at the timing of t7, and starts the main process (FIG. 100) at the timing of t8, which is the timing at which the rise of the reset signal is confirmed. However, since the power failure processing is not executed when the execution of various processes of the main CPU 63 is stopped, the main processing is performed in a situation where the power failure flag in the work area 221 for specific control is not set to "1" (FIG. 100). Is started, and the main process (FIG. 100) is started without saving the checksums for the work area 221 for specific control and the stack area 222 for specific control. Therefore, in the main process (FIG. 100), a negative determination is made in step S6603 or step S6606, and the clear process (step S6607) at the time of non-setting update is executed. As a result, when the value of the program counter becomes an abnormal value or the address specified when writing information by the load instruction becomes an abnormal address and a monitoring abnormality signal is output from the program monitoring unit 252, the monitoring abnormality signal is output. It is possible to execute the clearing process at the time of non-setting update in which the predetermined storage area of the work area 221 for specific control and the stack area 222 for specific control is cleared to "0". ..

However, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0" in the clear process at the time of non-setting update. As a result, even if a monitoring abnormality signal is output from the program monitoring unit 252 due to an abnormal value of the program counter or an abnormal address specified when writing information by a load instruction, it is not possible. It is possible to prevent the work area 223 for specific control and the stack area 224 for non-specific control from being cleared by "0".

Returning to the description of FIG. 102 (b), after that, as shown in FIG. 102 (b1), the supply of operating power from the power supply / emission control device 78 to the MPU 62 is stopped at the timing of t9, so that the supply of operating power to the MPU 62 is stopped at the timing of t10. As shown in FIG. 102 (b2), the output of the reset signal from the reset signal output unit 251 is stopped.

Next, the timer interrupt processing in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG. 103. The timer interrupt process is executed periodically (for example, in a cycle of 4 milliseconds) in the situation where the process of steps S661 to S6613 is executed in the main process (FIG. 100). The program corresponding to the timer interrupt processing is set as the program for specific control.

In steps S6801 to S6819, the same processing as in steps S5201 to S5219 of the timer interrupt processing (FIG. 86) in the 22nd embodiment is executed. These processes are executed in the main CPU 63 by using the program for specific control and the data for specific control. After that, the setting monitoring process is executed (step S6820). FIG. 104 is a flowchart showing the setting monitoring process.

By checking the value of the set value counter in the work area 221 for specific control, it is determined whether or not the set value of the pachinko machine 10 is normal (step S6901). Specifically, when the set value set in the set value counter is any of "setting 1" to "setting 6", it is determined to be normal, and when it is "0" or 7 or more, it is abnormal. Judge that there is.

When the set value is abnormal (step S6901: NO), first, the set value copy process is executed (step S6902). In the copy process, the information of the set value counter used for specifying the set value of the pachinko machine 10 in the work area 221 for specific control is stored in the copy area provided in the work area 221 for specific control. .. As a result, it is possible to grasp the set value of the pachinko machine 10 before the execution of the set value update process executed after that.

After that, an abnormality command indicating that an abnormality of the set value has occurred is transmitted to the voice emission control device 81 (step S6903). Upon receiving the abnormality command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the set value abnormality, and the speaker unit 54 emits a voice saying "an abnormality in the set value has been detected." Output. In addition, the character image "Abnormality of the set value has been detected" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the set value abnormality has occurred.

After that, the set value update process is executed (step S6904). That is, every time the timer interrupt process (FIG. 103) is executed, it is monitored whether or not an abnormality has occurred in the set value, and if the occurrence of the set value abnormality is identified, the set value of the pachinko machine 10 is reset. Execute the setting value update process to perform. The processing content of the set value update process is the same as the set value update process (FIG. 85) in the 22nd embodiment. Therefore, each time the update button 68b is pressed once, the set value is updated step by step, and the selected set value is determined by detecting the game ball with the out-port detection sensor 48a. The set value during the update and the set value confirmed are displayed on the third notification display device 69c. After that, when the setting key insertion unit 68a is switched from the ON state to the OFF state, it is determined that the end condition of the set value update process is satisfied. After executing the set value update process, the process returns to the timer interrupt process (FIG. 103).

Here, in the setting value update process, it is not determined that the end condition is satisfied only when the setting key insertion unit 68a is in the OFF state, and the setting key insertion unit 68a is switched from the ON state to the OFF state. If so, it is determined that the end condition is satisfied. When the set value update process is executed in the setting monitor process, the setting key insertion unit 68a is in the OFF state at the start of the set value update process, so that the end condition of the set value update process is satisfied. It is necessary to insert the setting key into the setting key insertion unit 68a, perform the ON operation once, and then perform the OFF operation. As a result, it is possible to prevent the setting value update process from ending even though the regular operation by the game hall administrator has not been performed.

When the setting key insertion unit 68a is switched from the ON state to the OFF state and the end condition of the set value update process is satisfied, step S5111 in the set value update process (FIG. 85) is executed. It is compared whether or not the set value stored in the copy area in the work area 221 for specific control and the set value set this time in the set value counter in the work area 221 for specific control are the same. That is, it is determined whether or not the set value set before the set value update process (step S6904) is executed and the set value set in the current set value update process are the same. When both setting values are the same (step S5112: NO), the setting maintenance notification already described is performed by executing the notification process (step S5113) at the time of non-change. On the other hand, when both setting values are different (step S5112: YES), the setting change notification already described is performed by executing the notification processing at the time of change (step S5114).

In a configuration in which the setting value update process is executed when an error occurs in the setting value, the setting value set before the setting value update process is executed and the setting value set in the setting value update process are set. If the set value is the same, the setting maintenance notification is performed. As a result, even if the setting value update process is executed due to the setting value abnormality, the setting maintenance notification is performed by resetting the setting value set in the previous situation, and the setting value update due to the setting value abnormality. It is possible to clearly indicate to the player that the set value has not changed even if the process is executed. By the way, since it is common to record the set value of each installed pachinko machine 10 in the game hall, it is possible to execute the set value update process due to an abnormality in the set value so as to be the recorded set value. It is possible.

Returning to the description of the timer interrupt process (FIG. 103), after executing the setting monitoring process in step S6820, the management process is executed in step S6821. When executing the management process, the program of the subroutine corresponding to the management process set in the specific control program is executed, but when executing the program of the subroutine, after the execution of the management process. Information for specifying the return address of the timer interrupt processing in the above is written in the stack area 222 for specific control by the push instruction. Then, when the management process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the timer interrupt process program indicated by the return address.

FIG. 105 is a flowchart showing a management process in the present embodiment executed by the main CPU 63. The processes of steps S7001 to S7005 in the management process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of timer interrupt processing (FIG. 103) (step S7001). This prevents the timer interrupt process (FIG. 103), which is the process corresponding to the specific control, from being interrupted and started in the middle of the management execution process, which is the process corresponding to the non-specific control, which will be described later. Is possible.

After that, as "LD (_PSWBUF), PSW", the information of the flag register of the main CPU 63 is saved in the PSW buffer set in the work area 221 for specific control by the load instruction (step S7002). The flag register includes a carry flag, a zero flag, a P / V flag, a sine flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution result of an arithmetic instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of such a flag register before the program of the subroutine corresponding to the management execution process is started, the flag register in the state before the call of the subroutine or the change after the start of the subroutine is performed. The information can be saved in the work area 221 for specific control.

After that, the management execution process is started by reading the subroutine program corresponding to the management execution process set in the non-specific control program (step S7003). In this case, the information for specifying the return address of the management process after the execution of the management execution process is written in the stack area 222 for the specific control by the push instruction. Then, when the management execution process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management process program indicated by the return address.

When the program returns to the management processing program after the management execution processing is executed, it is saved as "LD PSW, (_PSWBUF)" in the PSW buffer in the work area 221 for specific control in step S7002 by a load instruction. The information of the flag register is returned to the flag register of the main CPU 63 (step S7004). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S7002 was last executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

After that, the interrupt enable setting is set in order to switch from the state in which the occurrence of the timer interrupt process (FIG. 103) is prohibited to the state in which the timer interrupt process (FIG. 103) is permitted (step S7005). This enables new execution of timer interrupt processing.

FIG. 106 is a flowchart showing the management execution process in the present embodiment executed by the main CPU 63. The processes of steps S7101 to S7116 in the management execution process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

In steps S7101 to S7108 and steps S710 to S7116, the same processes as in steps S4501 to S4515 of the management execution process (FIG. 78) in the 17th embodiment are executed. Further, in step S7109, another monitoring process is executed. When the separate monitoring process is executed, the subroutine program corresponding to the separate monitoring process set in the non-specific control program is executed, but when the program of the subroutine is executed, after the separate monitoring process is executed. Information for specifying the return address of the management execution process in is written in the stack area 224 for non-specific control by the push instruction. Then, when the separate monitoring process is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the management execution process program indicated by the return address.

FIG. 107 is a flowchart showing another monitoring process. The processes of steps S7201 to S7206 in the separate monitoring process are executed by the main CPU 63 using the program for non-specific control and the data for non-specific control.

In the separate monitoring process, it is determined whether or not the value of the pointer indicating the processing position of the process being executed in the non-specific control program exceeds the normal numerical range (step S7201). Further, the information stored in the normal counter area 231 provided in the work area 223 for non-specific control, the counter area 232 for the open / close execution mode, and the counter area 233 for the high frequency support mode is clearly abnormal information. It is determined whether or not (step S7202). For example, in the normal counter area 231, if the value of the normal out counter 231e is "0" but the value of the normal general winning counter 231a is 1000 or more, it is determined as abnormal. Further, it is determined whether or not the information stored in the calculation result storage area 234 provided in the work area 223 for non-specific control is clearly abnormal information (step S7203). For example, if any of the 62nd to 64th parameters is not "0" even though the 61st parameter is "0", it is determined to be abnormal.

When an affirmative determination is made in any of steps S7201 to S7203, it is assumed that an information abnormality has occurred in the work area 223 for non-specific control, and a partial clear process of the work area 223 for non-specific control is executed. (Step S7204). In the partial clearing process, the storage area other than the management start flag is cleared to "0" in the work area 223 for non-specific control. In this case, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, and the calculation result storage area 234 are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control.

In addition, by not clearing the management start flag "0", it is possible to maintain the state in which "1" is already set in the management start flag, and the pachinko machine 10 has already been continuously used in the game hall. It is possible to prevent the pachinko machine 10 from being restricted at the shipping stage regarding the collection of history information even though it is used. However, the present invention is not limited to this, and in step S7204, the entire work area 223 for non-specific control including the management start flag may be cleared to "0".

Further, in step S7204, the stack area 224 for non-specific control is not cleared to "0". In the stack area 224 for non-specific control, information of various registers used in the process corresponding to the specific control in steps S7102 to S7107 in the management execution process (FIG. 106) is saved. In this case, by not clearing the stack area 224 for non-specific control to "0", the information of various registers used in the processing corresponding to this specific control is the stack area for non-specific control. It is possible to prevent the information saved in 224 from being erased. Further, the stack area 224 for non-specific control stores information on the return address of the management execution process (FIG. 106) after the separate monitoring process is completed, but the stack area 224 for non-specific control is set to "0". By not clearing it, it is possible to prevent the information of this return address from being erased.

After that, the initial setting process is executed (step S7205). In the initial setting process, in the work area 223 for non-specific control, the initial setting is performed for the storage area for which "0" is cleared in step S7204.

After that, the clear notification process is executed (step S7206). In the clear notification process, a command indicating that the work area 223 for non-specific control has been cleared to "0" is transmitted to the voice emission control device 81. Upon receiving the command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the forced clearing of the work area 223 for non-specific control, and the speaker unit 54 “forces the history information to be cleared. The voice "I did." Is output. In addition, the character image "History information has been forcibly cleared" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, the present invention is not limited to this, and the notification may be terminated when the notification end operation is performed by the manager of the game hall. As the notification end operation, for example, the update button 68b may be pressed, or the reset button 68c may be pressed. By confirming the above notification, the manager of the game hall can grasp that the work area 223 for non-specific control has been forcibly cleared.

When a negative determination is made in all of steps S7201 to S7203, or when the process of step S7206 is executed, another monitoring process is terminated and the process returns to the monitoring execution process (FIG. 106).

According to the present embodiment described in detail above, the following excellent effects are obtained.

When the program monitoring unit 252 identifies that the address specified when writing information by the load instruction is an abnormal address, the reset signal output unit 251 turns the reset signal from OFF to ON, so that the main CPU 63 Then, the main process (FIG. 100) is executed in the same manner as when the supply of the operating power is newly started. When the reset signal is turned from OFF to ON, the power failure flag in the work area 221 for specific control is not set to "1" and the checksum at the time of power failure is stored in the work area 221 for specific control. Since this has not been done, the clearing process (step S6607) at the time of non-setting update is forcibly executed. In the clearing process at the time of non-setting update, the storage area other than the storage area in which the set value of the pachinko machine 10 is stored is cleared to "0" in the work area 221 for specific control, and the stack area 222 for specific control is set to "0". "0" is cleared, and the initial setting process of these areas is executed. As a result, when there is a possibility that an information abnormality has occurred in the work area 221 for specific control or the stack area 222 for specific control, the work area 221 for specific control and the stack area 222 for specific control are set. On the other hand, by executing the "0" clearing process and the initial setting process, it is possible to eliminate the information abnormality.

When the program monitoring unit 252 identifies that the value of the program counter of the main CPU 63 is an abnormal value, the reset signal output unit 251 turns the reset signal from OFF to ON, so that the operating power of the main CPU 63 is increased. The main process (FIG. 100) is executed in the same manner as when the supply is newly started. When the reset signal is turned from OFF to ON, the power failure flag in the work area 221 for specific control is not set to "1" and the checksum at the time of power failure is stored in the work area 221 for specific control. Since this has not been done, the clearing process (step S6607) at the time of non-setting update is forcibly executed. In the clearing process at the time of non-setting update, the internal storage area of the main CPU 63 including various registers is cleared to "0" and the initial setting process is executed. As a result, if there is a possibility that an information error has occurred in the internal storage area of the main CPU 63, the internal storage area of the main CPU 63 is cleared to "0" and the initial setting process is executed. It is possible to eliminate the information abnormality.

On the other hand, in the clearing process at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, since the information abnormality is identified in the program monitoring unit 252 as described above, "0" is cleared for the internal storage area of the main CPU 63, the work area 221 for specific control, and the stack area 222 for specific control. And even when the initial setting process is executed, it is possible to prevent the game history information from being deleted, and to prevent the game history management result information from being deleted. It becomes possible to do.

If the power failure flag is not set to "1" in the main process (FIG. 100) when the supply of operating power to the main CPU 63 is started, or if the checksums do not match, it is cleared at the time of non-setting update. In the configuration in which the process (step S6607) is executed, when the program monitoring unit 252 identifies the occurrence of an information abnormality, the power failure flag is not set to "1" by turning the reset signal from OFF to ON. At the same time, the main process (FIG. 100) is executed in a situation where the checksum is not stored. As a result, it is possible to eliminate the information abnormality specified by the program monitoring unit 252 by using the configuration for eliminating the information abnormality at the start of supplying the operating power.

In a configuration in which whether or not the checksum is normal is monitored in the main process (FIG. 100) when the supply of operating power to the main CPU 63 is started, the checksum is calculated for specific control. The work area 221 and the stack area 222 for specific control are included, and the work area 223 for non-specific control and the stack area 224 for non-specific control are not included. This makes it possible to specify whether or not an information abnormality has occurred only in the storage area corresponding to the specific control in the main RAM 65.

When it is specified that the checksum is abnormal in the main process (FIG. 100) when the supply of operating power to the main CPU 63 is started, the clear process (step S6607) at the time of non-setting update is executed. However, in the clearing process at the time of non-setting update, the process of clearing "0" and the initial setting process are executed in the work area 221 for specific control and the stack area 222 for specific control. On the other hand, the process of clearing "0" is not executed in the work area 223 for non-specific control and the stack area 224 for non-specific control. As a result, even though an information error has occurred in the work area 221 for specific control and the stack area 222 for specific control, the processing corresponding to the specific control is not continuously executed as it is. In addition to being able to be set to, "0" is cleared up to the storage area corresponding to the non-specific control of the main RAM 65 triggered by the information abnormality of the work area 221 for the specific control and the stack area 222 for the specific control. It is possible to prevent it.

In the power failure processing (steps S6709 to S6712) of the power failure information storage process (FIG. 101), the checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control, whereas the checksum is calculated for the main RAM 65. The checksum is not calculated for the storage area corresponding to the non-specific control of. This makes it possible to prevent the processing period required to complete the power failure processing from becoming excessively long.

When an abnormality is identified in the information stored in the work area 223 for non-specific control in another monitoring process (FIG. 107) executed in the process corresponding to non-specific control, non-specific control is supported. In the separate monitoring process (FIG. 107), which is the process to be performed, the work area 223 for non-specific control is cleared to "0" and the initial setting process is executed. As a result, even though some abnormality has occurred in the work area 223 for non-specific control, the process corresponding to the non-specific control is executed while the information of the work area 223 for non-specific control is retained as it is. It is possible to prevent it from happening. Further, since the process of clearing the work area 223 for non-specific control to "0" and the process of initializing are executed by the process corresponding to the non-specific control, regarding the update of the information of the work area 223 for non-specific control. It is possible to prevent the processing corresponding to the specific control from intervening.

In another monitoring process (FIG. 107), which is a process corresponding to non-specific control, monitoring is executed to see if an abnormality has occurred in the work area 223 for non-specific control, and when an abnormality has occurred. Is executed a process of clearing the work area 223 for non-specific control to "0" and a process of initializing the work area 223. As a result, a series of processes in the process corresponding to the non-specific control, monitoring whether or not an abnormality has occurred in the work area 223 for the non-specific control and executing the initialization of the work area 223 for the non-specific control. It becomes possible to execute as.

When an abnormality is identified in the information stored in the work area 223 for non-specific control in another monitoring process (FIG. 107) executed in the process corresponding to non-specific control, it is used for non-specific control. Although the process of clearing "0" and the process of initial setting are executed for the work area 223, the process of clearing "0" and the process of initial setting are not executed for the stack area 224 for non-specific control. This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control, while managing the information of various registers used in the processing corresponding to the specific control saved in the stack area 224 for non-specific control and separate management. It is possible to prevent the return address information from being deleted after the processing is completed.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control and initializing them is executed by the process corresponding to the specific control, and the work area 223 for non-specific control is set to "0". The process of clearing and initializing is executed by the process corresponding to the non-specific control. As a result, regarding such initialization processing, the work area 221 for specific control and the stack area 222 for specific control are treated as dedicated storage areas for processing corresponding to specific control, and are used for non-specific control. The work area 223 can be treated as a dedicated storage area for processing corresponding to non-specific control.

In the main process (FIG. 100), the configuration is such that monitoring of whether or not the set values are normal is executed in steps S6608 and S6614, but the process of monitoring whether or not these set values are normal is performed. It may be a configuration that is not executed. As a result, it is possible to reduce the processing load of the processing at the start of supplying the operating power, which is executed when the supply of the operating power to the main CPU 63 is started. Further, even if the processing at the start of supplying the operating power does not monitor whether the set value is normal or not, the timer interrupt executed after the processing at the start of supplying the operating power is completed. Since the setting monitoring process (step S6820) of the process (FIG. 103) monitors whether or not the set value is normal, if the set value is abnormal, it is possible to deal with it.

Further, the setting monitoring process (step S6820) is not limited to the configuration in which the timer interrupt process (FIG. 103) is executed every time the timer interrupt process (FIG. 103) is started. The setting monitoring process (step S6820) may be executed every time the number of times (for example, 10,000 times) is executed. In this case, it is possible to suppress the execution frequency of the monitoring while periodically monitoring whether or not the set value is normal.

Further, the setting monitoring process (step S6820) may be executed in the residual process (steps S661 to S6613) in the main process (FIG. 100). In this case, it is possible to monitor whether or not the set value is normal by using the free time in the situation where the timer interrupt processing is not executed.

Further, the setting monitoring process (step S6820) may be executed when the game round is newly started. More specifically, when the game round is newly started, the setting monitoring process (step S6820) may be executed before the hit / fail determination process is executed. This makes it possible to prevent the hit / fail determination process from being executed in a situation where the set value is abnormal.

Further, when it is specified in the setting monitoring process (step S6820) that the set value is abnormal, the work area 221 for specific control is provided instead of the configuration for shifting to the set value update process (step S6904). The game stop flag may be set to "1". In this case, since the processing of steps S6808 to S6821 is not executed by making an affirmative determination in step S6807 in the timer interrupt processing (FIG. 103), the progress of the game is stopped when the set value is abnormal. It becomes. However, since the processes of steps S6801 to S6806 are executed, the power failure monitoring is executed, the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further. Fraud detection is executed. Further, when the game stop flag is set to "1", the notification indicating that the set value should be updated may be executed to prompt the execution of the set value update process. In this case, the manager of the game hall who confirmed the notification clears the game stop flag by "0" by performing the power ON operation in such a manner that the set value update process is executed after the power OFF operation is performed. Then, the state in which the progress of the game is stopped is released, and the set value update process is executed to set the normal set value.

If it is specified in the setting monitoring process (step S6820) that the set value is abnormal, the main process (main process) with "1" set in the setting error flag provided in the work area 221 for specific control (step S6820). FIG. 100) may be configured to start, and in order to stop the progress of the game with the setting abnormality flag set to "1" and to release the stopped state of the progress of the game, the power is turned off → It may be a configuration that requires ON. In this case, even if the main process (FIG. 100) does not perform an operation for executing the set value update process, it is forcibly set when the setting error flag is set to "1". By executing the value update process, it is possible to forcibly set a new set value by using the set value update process set in the main process (FIG. 100).

Further, when the program monitoring unit 252 identifies the occurrence of an information abnormality and the reset signal is forcibly turned from OFF to ON, the initialization process is executed for the work area 221 for specific control. , The setting value of the pachinko machine 10 may be "setting 1". If the program monitoring unit 252 identifies the occurrence of an information error and the reset signal is forcibly turned from OFF to ON, it is set after the initialization process is executed for the work area 221 for specific control. The value update process may be executed.

Further, when the program monitoring unit 252 identifies the occurrence of an information abnormality, the reset signal is not forcibly turned off and then turned on, and the clearing process (step S6607) at the time of non-setting update is executed. In some cases, the clearing process (step S6620) and the setting value updating process (step S6621) at the time of setting update may be executed.

Further, in the clear process (step S6607) at the time of non-setting update, the set value of the pachinko machine 10 becomes "setting 1" by initializing the storage area for storing the set value information in the work area 221 for specific control. It may be a configuration, or may be a configuration having a predetermined set value other than “setting 1”. As a result, when the clearing process at the time of non-setting update is executed, it is possible to set a predetermined setting value.

Further, in the clearing process (step S6607) at the time of non-setting update, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared by "0", but "0" may be cleared. good.

Further, although the management start flag is not cleared by "0" in step S7204 in the separate monitoring process (FIG. 107), the management start flag may be cleared by "0". Further, in step S7204 in the separate monitoring process (FIG. 107), the normal counter area 231 and the open / close execution mode counter area 232 and the high frequency support mode counter area 233 may not be cleared to "0", and the calculation result storage area may be used. The configuration may be such that 234 is not cleared to "0".

Further, in step S7204 in another monitoring process (FIG. 107), "0" clear processing and initial setting processing are executed not only for the work area 223 for non-specific control but also for the stack area 224 for non-specific control. It may be configured. In this case, it is used in the information of the return address of the management execution process after the end of the separate monitoring process in the stack area 224 for non-specific control and in the process corresponding to the specific control saved in the stack area 224 for non-specific control. It is preferable not to erase the information of various registers.

Further, in another monitoring process (FIG. 107), whether or not an abnormality has occurred in the stack area 224 for non-specific control is monitored, and if it is identified that an abnormality has occurred, it is used for non-specific control. The stack area 224 may be configured to execute the process of clearing "0" and the initial setting process. In this case, it is preferable not to delete the information of the return address of the management execution process after the end of the separate monitoring process in the stack area 224 for non-specific control.

Further, both the work area 221 for specific control and the stack area 222 for specific control are not limited to the configuration in which the checksum is calculated, and only the work area 221 for specific control is the checksum calculation target. The checksum may be calculated only in the stack area 222 for specific control.

<31st Embodiment>
In the present embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the thirtieth embodiment. Hereinafter, a configuration different from the thirtieth embodiment will be described. The description of the same configuration as that of the thirtieth embodiment is basically omitted.

FIG. 108 is a flowchart showing a main process in the present embodiment executed by the main CPU 63. The processes of steps S7301 to S7322 in the main process are executed by using the program for specific control and the data for specific control in the main CPU 63.

First, the power-on wait process is executed (step S7301). In the power-on wait process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. During the execution period of the power-on wait process, the operation start and initial setting of the symbol display device 41 are completed. After that, access to the main RAM 65 is permitted (step S7302).

After that, it is determined whether or not "1" is set in the power failure flag provided in the work area 221 for specific control in the main RAM 65 (step S7303). When "1" is set in the power failure flag (step S7303: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7304). The checksum calculation method is the same as step S6604 of the main process (FIG. 100) in the thirtieth embodiment.

After that, the work area 221 for specific control and the stack area for specific control calculated in the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control The checksum for 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S7304 (step S7305). Then, it is determined whether or not the checksums match (step S7306).

If an affirmative determination is made in step S7306, the processes of steps S7307 to S7320 are executed. In this case, the processing contents of steps S7307 to S7314 are the same as those of steps S6614 to S6621 of the main processing (FIG. 100) in the thirtieth embodiment, and steps S7316 to S7320 are the main processes in the thirtieth embodiment. It is the same as step S6609 to step S6613 of the process (FIG. 100).

Further, while the reset button 68c is pressed (step S7308: YES), if a negative determination is made in any of steps S7309 to S7311, the clearing process at the time of non-setting update is executed (step). S7315). The processing content of the clear processing at the time of non-setting update is the same as step S6607 of the main processing (FIG. 100) in the thirtieth embodiment. However, in the present embodiment, after the clearing process at the time of non-setting update is executed, the process proceeds to the processes of steps S7316 to S7320 without determining whether or not the set value is normal. The clearing process (step S7315) at the time of non-setting update is executed only when a negative determination is made in any of steps S7309 to S7311, but before the processing of steps S7309 to S7311 is executed. Since it is determined in step S7307 whether or not the set value is normal, it is not necessary to determine whether or not the set value is normal after executing the clearing process at the time of non-setting update.

If a negative determination is made in step S7303 or step S7306, that is, if "1" is not set in the power failure flag in the work area 221 for specific control, or if a checksum error occurs, clear processing at the time of abnormality is executed. (Step S7321). FIG. 109 is a flowchart showing a clearing process when an abnormality occurs. The process of steps S7401 to S7405 in the clear process at the time of abnormality is executed by the main CPU 63 by using the program for specific control and the data for specific control.

First, the clearing process of the work area 221 for specific control is executed (step S7401). In the clearing process, the work area for specific control is excluded from the area (specifically, the set value counter) in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control. Clear "0" of 221 and make initial settings for the area where "0" is cleared. As a result, the area indicating whether or not the winning / failing lottery mode is the high probability mode is cleared to "0", so that the winning / losing lottery is performed regardless of the winning / failing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game times are not executed, the open / close execution mode is not executed, and the normal map display unit 38a is not variablely displayed, and the general electric accessory 34a is closed. It becomes a situation. Further, since the hold storage area 65a and the normal electric hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is deleted and the normal figure display unit is deleted. The hold information for 38a is deleted.

After that, the clearing process of the stack area 222 for specific control is executed (step S7402). In the clearing process, the stack area 222 for specific control is cleared to "0" and the initial setting is performed.

After that, as "PUSH PSW", the information of the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction (step S7403). The flag register includes a carry flag, a zero flag, a P / V flag, a sine flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution result of an arithmetic instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of such a flag register before the program of the subroutine corresponding to the clear processing for non-specific control is started, the flag of the state before the call of the subroutine or the change after the start of the subroutine is performed. The register information can be saved in the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

After that, the clear process for the non-specific control is started by reading the program of the subroutine corresponding to the clear process for the non-specific control set in the program for the non-specific control (step S7404). In this case, information for specifying the return address of the clear process at the time of abnormality after the execution of the clear process for the non-specific control is written in the stack area 222 for the specific control by the push instruction. Then, when the clear processing for non-specific control is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the clear processing program at the time of abnormality indicated by the return address.

When returning to the program for clear processing at the time of abnormality after executing the clear processing for non-specific control, the flag register saved in the stack area 222 for specific control in step S7402 by a pop instruction as "POP PSW". Is returned to the flag register of the main CPU 63 (step S7405). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S7402 is executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

FIG. 110 is a flowchart showing a clear process for non-specific control. The processes of steps S7501 to S7516 in the clear process for non-specific control are executed by the main CPU 63 by using the program for non-specific control and the data for non-specific control.

First, as "LD SP, Y (u + 2)", Y (u + 2) is set as a fixed address at the start of non-specific control in the stack pointer of the main CPU 63 by a load instruction (step S7501). In this case, the information of the last address in the stack area 224 for non-specific control is set in the stack pointer, as in step S3901 of the management execution process (FIG. 71) in the fifteenth embodiment.

After that, as "LD (_WABUF), WA", the information of the WA register of the main CPU 63 is saved in the WA buffer set in the work area 223 for non-specific control by the load instruction (step S7502). Further, as "LD (_BCBUF), BC", the information of the BC register of the main CPU 63 is saved in the BC buffer set in the work area 223 for non-specific control by the load instruction (step S7503). Further, as "LD (_DEBUF), DE", the information of the DE register of the main CPU 63 is saved in the DE buffer set in the work area 223 for non-specific control by the load instruction (step S7504). Further, as "LD (_HLBUF), HL", the information of the HL register of the main CPU 63 is saved in the HL buffer set in the work area 223 for non-specific control by the load instruction (step S7505). Further, as "LD (_IXBUF), IX", the information of the IX register of the main CPU 63 is saved in the IX buffer set in the work area 223 for non-specific control by the load instruction (step S7506). Further, as "LD (_IYBUF), IY", the information of the IY register of the main CPU 63 is saved in the IY buffer set in the work area 223 for non-specific control by the load instruction (step S7507).

In addition to the flag register described above, various general-purpose registers, auxiliary registers, and index registers are present in the registers of the main CPU 63. In this case, in steps S7502 to S7507, information on WA register, BC register, DE register, HL register, IX register, and IY register, which are some of these various general-purpose registers, auxiliary registers, and index registers. Is saved in the corresponding buffer in the work area 223 for non-specific control. The amount of information in the WA register, BC register, DE register, HL register, IX register, and IY register is 2 bytes.

These WA register, BC register, DE register, HL register, IX register, and IY register are a process corresponding to the non-specific control, which is a partial clear process (step S7508) and an initial setting process (step S7508) of the work area 223 for the non-specific control. This is a register used in step S7509). The information set in such a register is saved in the work area 223 for non-specific control prior to the execution of the partial clear processing (step S7508) and the initial setting process (step S7509) of the work area 223 for non-specific control. By doing so, it is possible to save the information of these registers used in the specific control before the non-specific control is started. Therefore, even if these registers are overwritten during the non-specific control, when the non-specific control is terminated, the information saved in the work area 223 for the non-specific control is returned to these registers to return the state of these registers. Can be returned to the state corresponding to the specific control before the non-specific control is executed.

Further, instead of saving all the information of various general-purpose registers, auxiliary registers, and index registers in the work area 223 for non-specific control, the work area 223 for non-specific control, which is a process corresponding to non-specific control, Information of WA register, BC register, DE register, HL register, IX register and IY register to be used in partial clear processing (step S7508) and initial setting processing (step S7509) is selectively used for non-specific control. By saving to the work area 223, it is possible to suppress the capacity reserved for saving the register information in the work area 223 for non-specific control. Therefore, while ensuring a large capacity of the work area 223 for non-specific control that can be used in the partial clearing process (step S7508) and the initial setting process (step S7509) of the work area 223 for non-specific control, the above It is possible to save the information of such a register. As a matter of course, among various general-purpose registers, auxiliary registers and index registers in the main CPU 63, registers other than WA register, BC register, DE register, HL register, IX register and IY register correspond to non-specific control. The information set before the start of the process to be performed is stored and retained until the process corresponding to the non-specific control ends and the process corresponding to the specific control is restarted.

Further, by saving the register information in the work area 223 for non-specific control instead of saving it in the stack area 224 for non-specific control, the capacity of the stack area 224 for non-specific control can be suppressed to a small size. It will be possible. Further, when the stack area 224 for non-specific control is used, the writing order of the information is read first from the later information as described above, so that the reading order of the information is deviated due to some noise or the like. If this happens, all the subsequent read order information will be returned to different registers. The probability of occurrence of such an event increases as the amount of information saved in the stack area 224 for non-specific control increases. On the other hand, by saving the register information in the work area 223 for non-specific control, it is possible to prevent the above-mentioned event from occurring even when there is a large amount of information to be saved. ..

After executing the processes of steps S7502 to S7507, a partial clearing process of the work area 223 for non-specific control is executed (step S7508). In the partial clear processing, of each storage area of the work area 223 for non-specific control, a storage area other than the storage area in which information of various registers of the main CPU 63 used in the processing corresponding to the specific control is saved. Is cleared to "0". Specifically, among the storage areas of the work area 223 for non-specific control, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer, and IY buffer do not clear "0", while storage other than these various buffers. Clear the area "0".

In this case, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control. Further, by not clearing the storage area in which the information of various registers of the main CPU 63 used in the process corresponding to the specific control is saved to "0", the process corresponding to the non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to return the information used in the process corresponding to the specific control to various registers of the main CPU 63.

Further, in step S7508, the stack area 224 for non-specific control is not cleared to "0". The stack area 224 for non-specific control stores information on the return address of the clear process (FIG. 109) in the event of an abnormality after the clear process for non-specific control is completed, but the stack area for non-specific control By not clearing "0" of 224, it is possible to prevent the information of this return address from being erased.

After that, the initial setting process is executed (step S7509). In the initial setting process, in the work area 223 for non-specific control, the initial setting is performed for the storage area for which "0" is cleared in step S7508.

After that, as “LD SP, Y (r + α)”, the load instruction returns the stack pointer of the main CPU 63 to the specific control in the same manner as in step S3909 of the management execution process (FIG. 71) in the fifteenth embodiment. Y (r + α) is set as the fixed address at the time (step S7510). The address of Y (r + α) is set as an address between Y (r + 8) and Y (s) in the stack area 222 for specific control.

After that, as "LD WA, (_WABUF)", the information saved in the WA buffer of the work area 223 for non-specific control is overwritten in the WA register of the main CPU 63 by the load instruction (step S7511). Further, as "LD BC, (_BCBUF)", the information saved in the BC buffer of the work area 223 for non-specific control is overwritten in the BC register of the main CPU 63 by the load instruction (step S7512). Further, as "LD DE, (_DEBUF)", the information saved in the DE buffer of the work area 223 for non-specific control is overwritten in the DE register of the main CPU 63 by the load instruction (step S7513). Further, as "LD HL, (_HLBUF)", the information saved in the HL buffer of the work area 223 for non-specific control is overwritten in the HL register of the main CPU 63 by the load instruction (step S7514). Further, as "LD IX, (_IXBUF)", the information saved in the IX buffer of the work area 223 for non-specific control is overwritten in the IX register of the main CPU 63 by the load instruction (step S7515). Further, as "LD IY, (_IYBUF)", the information saved in the IY buffer of the work area 223 for non-specific control is overwritten in the IY register of the main CPU 63 by the load instruction (step S7516). By executing the processes of steps S7511 to S7516, the processes corresponding to the non-specific control of the WA register, BC register, DE register, HL register, IX register, and IY register of the main CPU 63 are started. It is possible to return to the information corresponding to the specific control immediately before the operation.

According to the above configuration, when the power failure flag is not set to "1" in the main process (FIG. 108) executed when the supply of operating power to the main CPU 63 is started, or the checksum is abnormal. In some cases, by executing the clearing process (step S7321) at the time of abnormality, not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control is set to "0". It is cleared and initialized. If an information error has occurred in the work area 221 for specific control, there is a possibility that an information error has also occurred in the work area 223 for non-specific control. Work area 223 is also initialized so that the process corresponding to non-specific control is not executed as it is even though an information error has occurred in the work area 223 for non-specific control. It becomes possible to do.

Even when the process of clearing "0" and the process of initializing the work area 223 for non-specific control are executed in the clear process at the time of abnormality (step S7321), the work area for non-specific control is executed. The information of various registers used in the process corresponding to the specific control saved in 223 is not cleared to "0". As a result, the process of clearing "0" for the work area 223 for non-specific control while not erasing the information used in the process corresponding to the specific control after the process corresponding to the non-specific control is completed. And it becomes possible to execute the process of initial setting.

Even when the process of clearing "0" and the process of initializing the work area 223 for non-specific control are executed in the clear process at the time of abnormality (step S7321), the stack area 224 for non-specific control is executed. For this, the process of clearing "0" and the process of initializing are not executed. This makes it possible to prevent the return address information from being erased after the clearing process for non-specific control (FIG. 110) is completed.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed by the process corresponding to the specific control, and the work area 223 for non-specific control is set to "0". The process of clearing "0" and the process of initial setting are executed by the process corresponding to the non-specific control. As a result, regarding the process of clearing "0" and the process of initial setting, the work area 221 for specific control and the stack area 222 for specific control are treated as a dedicated storage area for the process corresponding to the specific control, and are not. The work area 223 for specific control can be treated as a dedicated storage area for processing corresponding to non-specific control.

Note that both the work area 221 for specific control and the stack area 222 for specific control are not limited to the configuration in which the checksum is calculated, and only the work area 221 for specific control is the checksum calculation target. The checksum may be calculated only in the stack area 222 for specific control.

Further, the work area 223 for non-specific control may be configured to be the checksum calculation target. In this case, the work area 221 for specific control and the work area 223 for non-specific control may be configured to calculate the checksum, and the stack area 222 for specific control and the work area 223 for non-specific control are checked. The configuration may be a configuration in which the sum is calculated, or the work area 221 for specific control, the stack area 222 for specific control, and the work area 223 for non-specific control may be the configuration for which the checksum is calculated.

Further, the stack area 224 for non-specific control may be configured to be the checksum calculation target. In this case, the work area 221 for specific control and the stack area 224 for non-specific control may be configured to calculate the checksum, and the stack area 222 for specific control and the stack area 224 for non-specific control are checked. The configuration may be a configuration in which the sum is calculated, or the work area 221 for specific control, the stack area 222 for specific control, and the stack area 224 for non-specific control may be the configuration for which the checksum is calculated.

Further, the work area 223 for non-specific control and the stack area 224 for non-specific control may be configured to calculate the checksum. In this case, the work area 221 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control may be configured to calculate the checksum, and the stack area 222 for specific control, non-specific control. The work area 223 for specific control and the stack area 224 for non-specific control may be configured to calculate the checksum, and the work area 221 for specific control, the stack area 222 for specific control, and the stack area 222 for non-specific control may be used. The work area 223 and the stack area 224 for non-specific control may be configured to calculate the checksum.

Further, in step S7508 and step S7509 in the clear process for non-specific control (FIG. 110), not only the work area 223 for non-specific control but also the stack area 224 for non-specific control is cleared with "0". It may be configured to execute the initial setting process. In this case, it is preferable not to erase the information of the return address of the clearing process at the time of abnormality after the completion of the clearing process for non-specific control.

Further, in step S7508 in the clearing process for non-specific control (FIG. 110), the management start flag is cleared to "0", but the management start flag may not be cleared to "0". Further, in step S7508 in the clearing process for non-specific control (FIG. 110), the normal counter area 231 and the open / close execution mode counter area 232 and the high frequency support mode counter area 233 may not be cleared to "0". The calculation result storage area 234 may not be cleared to "0".

<32nd Embodiment>
In the present embodiment, the processing configuration for monitoring the information abnormality of the main RAM 65 using the checksum is different from that of the thirtieth embodiment. Hereinafter, a configuration different from the thirtieth embodiment will be described. The description of the same configuration as that of the thirtieth embodiment is basically omitted.

FIG. 111 is a flowchart showing a power failure information storage process in the present embodiment executed by the main CPU 63. The power failure information storage process is executed in step S6801 in the timer interrupt process (FIG. 103). Further, the processes of steps S7601 to S7613 in the power failure information storage process are executed by the main CPU 63 by using the specific control program and the specific control data.

In steps S7601 to S7608 in the power failure information storage process, the same process as in steps S6701 to S6708 of the power failure information storage process (FIG. 101) in the thirtieth embodiment is executed. When the occurrence of a power failure is specified, an affirmative determination is made in step S7608, and the power failure processing of steps S7609 to S7613 is executed.

Specifically, first, "1" is set in the power failure flag provided in the work area 221 for specific control (step S7609). As a result, when the power failure processing is normally executed and the information is normally stored and retained in the main RAM 65, the specific control is used when the supply of the operating power to the main CPU 63 is restarted. This means that "1" is set in the power failure flag of the work area 221 of.

After that, a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7610). In this case, the storage areas in the work area 221 for specific control and the stack area 222 for specific control, which are the calculation targets when calculating the checksum for specific control, are the storage areas in step S7701 of the checksum monitoring process (FIG. 112) described later. It is the same as the storage area in the work area 221 for specific control and the stack area 222 for specific control, which are the calculation targets of the checksum for specific control. Further, in the storage area to be calculated when calculating the checksum for the specific control, an area in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for the specific control (specifically). Is a set value counter). Then, the calculated checksum for specific control is a storage area for storing the checksum for specific control in the work area 221 for specific control, and is excluded from the calculation target of the checksum for specific control. Store in the storage area.

After that, checksums are calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step S7611). In this case, the storage areas in the work area 223 for non-specific control and the stack area 224 for non-specific control, which are the calculation targets when calculating the checksum for non-specific control, are the checksum monitoring process described later (FIG. 112). It is the same as the storage area in the work area 223 for non-specific control and the stack area 224 for non-specific control, which is the calculation target of the checksum for non-specific control in step S7706. Then, the calculated checksum for non-specific control is excluded from the calculation target of the checksum for specific control, which is a storage area for storing the checksum for non-specific control in the work area 221 for specific control. It is stored in the storage area where it is stored.

After that, all the information of the output ports in the registers of the main CPU 63 is set to "0" (step S7612), and access to the main RAM 65 is prohibited (step S7613). Then, the infinite loop is continued until the power supply is completely cut off and the process cannot be executed.

Next, the checksum monitoring process executed by the main CPU 63 will be described with reference to the flowchart of FIG. 112. The checksum monitoring process is executed in the main process (FIG. 100) instead of steps S6604 to S6606. Further, the processes of steps S7701 to S7711 in the checksum monitoring process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, a checksum for specific control is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7701). The method of calculating the checksum for the specific control is the same as step S7610 in the power failure information storage process (FIG. 111). After that, the checksum for specific control calculated in step S7610 of the power failure processing executed immediately before the supply of the operating power to the MPU 62 is stopped and stored in the work area 221 for specific control is used for specific control. The checksum for specific control read from the work area 221 of the above is compared with the checksum for specific control calculated in step S7701 (step S7702). Then, it is determined whether or not the checksums for the specific control match (step S7703).

When the checksums for specific control do not match (step S7703: NO). The work area 221 for specific control is cleared (step S7704). In the clearing process, the work area for specific control is excluded from the area (specifically, the set value counter) in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control. Clear "0" of 221 and execute the initial setting. As a result, the area indicating whether or not the winning / failing lottery mode is the high probability mode is cleared to "0", so that the winning / losing lottery is performed regardless of the winning / failing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game times are not executed, the open / close execution mode is not executed, and the normal map display unit 38a is not variablely displayed, and the general electric accessory 34a is closed. It becomes a situation. Further, since the hold storage area 65a and the normal electric hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is deleted and the normal figure display unit is deleted. The hold information for 38a is deleted. Further, in the clearing process, the initial setting is executed after the various registers of the main CPU 63 are also cleared to "0". In addition, the stack area 222 for specific control is cleared to "0" and the initial setting is executed (step S7705).

When an affirmative determination is made in step S7703 or when the process of step S7705 is executed, a checksum for non-specific control is calculated for the work area 223 for non-specific control and the stack area 224 for non-specific control (step). S7706). The method of calculating the checksum for the non-specific control is the same as step S7611 in the power failure information storage process (FIG. 111). After that, the checksum for non-specific control calculated in step S7611 of the power failure processing executed immediately before the supply of the operating power to the MPU 62 is stopped and stored in the work area 221 for specific control is specified and controlled. The checksum for non-specific control read from the work area 221 for non-specific control is compared with the checksum for non-specific control calculated in step S7706 (step S7707). Then, it is determined whether or not the checksums for the non-specific control match (step S7708).

If the checksums for non-specific control do not match (step S7708: NO), the information in the flag register of the main CPU 63 is saved in the stack area 222 for specific control by a push instruction as "PUSH PSW" (step S7708: NO). Step S7709). The flag register includes a carry flag, a zero flag, a P / V flag, a sine flag, a half carry flag, and the like, and the information in the flag register changes depending on the execution result of an arithmetic instruction, a rotate instruction, an input / output instruction, and the like. By saving the information of such a flag register before the program of the subroutine corresponding to the clear processing for non-specific control is started, the flag of the state before the call of the subroutine or the change after the start of the subroutine is performed. The register information can be saved in the stack area 222 for specific control. The amount of information in the flag register is 1 byte.

After that, the clear process for the non-specific control is started by reading the program of the subroutine corresponding to the clear process for the non-specific control set in the program for the non-specific control (step S7710). In this case, information for specifying the return address of the checksum monitoring process after the execution of the clear process for the non-specific control is written in the stack area 222 for the specific control by the push instruction. Then, when the clear processing for non-specific control is completed, the information for specifying the return address is read by the pop instruction, and the program returns to the checksum monitoring processing program indicated by the return address.

When returning to the program for clear processing at the time of abnormality after executing the clear processing for non-specific control, the flag register saved in the stack area 222 for specific control in step S7709 by the pop instruction as "POP PSW". Is returned to the flag register of the main CPU 63 (step S7711). As a result, the information in the flag register of the main CPU 63 is restored to the information at the time when step S7709 is executed. That is, the information in the flag register of the main CPU 63 is restored to the information for executing the specific control.

FIG. 113 is a flowchart showing a clear process for non-specific control. The processes of steps S7801 to S7818 in the clear process for non-specific control are executed by the main CPU 63 by using the program for non-specific control and the data for non-specific control.

In steps S7801 to S7807 in the clear process for non-specific control, the same process as in steps S7501 to S7507 in the clear process for non-specific control (FIG. 110) in the 31st embodiment is executed.

After that, a partial clearing process of the work area 223 for non-specific control is executed (step S7808). In the partial clear processing, of each storage area of the work area 223 for non-specific control, a storage area other than the storage area in which information of various registers of the main CPU 63 used in the processing corresponding to the specific control is saved. Is cleared to "0". Specifically, among the storage areas of the work area 223 for non-specific control, the WA buffer, BC buffer, DE buffer, HL buffer, IX buffer, and IY buffer do not clear "0", while storage other than these various buffers. Clear the area "0".

In this case, the normal counter area 231, the open / close execution mode counter area 232, the high frequency support mode counter area 233, the calculation result storage area 234, and the management start flag are all cleared to "0". This makes it possible to eliminate the information abnormality in the work area 223 for non-specific control. Further, by not clearing the storage area in which the information of various registers of the main CPU 63 used in the process corresponding to the specific control is saved to "0", the process corresponding to the non-specific control is completed. When returning to the process corresponding to the specific control, it is possible to return the information used in the process corresponding to the specific control to various registers of the main CPU 63.

After that, the initial setting process is executed (step S7809). In the initial setting process, in the work area 223 for non-specific control, the initial setting is performed for the storage area for which "0" is cleared in step S7808.

After that, a partial clearing process of the stack area 224 for non-specific control is executed (step S7810). In the partial clearing process, information on the return address of the checksum monitoring process (FIG. 112) after the clearing process for the non-specific control is completed in each storage area of the stack area 224 for the non-specific control is stored. Clear "0" in the storage area other than the storage area. As a result, the information of the stack area 224 for non-specific control is abnormal while preventing the information of the return address of the checksum monitoring process (FIG. 112) from being erased after the clear processing for non-specific control is completed. Can be resolved.

After that, the initial setting process is executed (step S7811). In the initial setting process, the initial setting is performed for the storage area for which "0" is cleared in step S7810 in the stack area 224 for non-specific control.

After that, the processes of steps S7812 to S7818 are executed. The processes of steps S7812 to S7818 execute the same processes as steps S7510 to S7516 in the clear process for non-specific control (FIG. 110) in the 31st embodiment.

According to the above configuration, the checksum for the work area 221 for specific control and the stack area 222 for specific control and the checksum for the work area 223 for non-specific control and the stack area 224 for non-specific control Calculated individually. As a result, it is possible to individually identify an information abnormality for each of the storage area corresponding to the specific control in the main RAM 65 and the storage area corresponding to the non-specific control in the main RAM 65.

If there is an abnormality in the checksum for specific control, "0" clear processing and initial setting processing are executed for the work area 221 for specific control and the stack area 222 for specific control, and for non-specific control. If there is an abnormality in the checksum of, "0" clear processing and initial setting processing are executed for the work area 223 for non-specific control and the stack area 224 for non-specific control. As a result, it is possible to narrow down the target for executing the "0" clearing process and the initial setting process to the area where the checksum abnormality is specified.

The process of clearing the work area 221 for specific control and the stack area 222 for specific control to "0" and the process of initializing are executed by the process corresponding to the specific control, and the work area 223 for non-specific control is set to "0". The process of clearing "0" and the process of initial setting are executed by the process corresponding to the non-specific control. As a result, regarding the process of clearing "0" and the initial setting process, the work area 221 for specific control and the stack area 222 for specific control are treated as a dedicated storage area for the process corresponding to the specific control, and are not specified. The control work area 223 can be treated as a dedicated storage area for processing corresponding to non-specific control.

In step S7808 in the clear process for non-specific control (FIG. 113), the management start flag is cleared to "0", but the management start flag may not be cleared to "0". Further, in step S7808 in the clearing process for non-specific control (FIG. 113), the normal counter area 231 and the open / close execution mode counter area 232 and the high frequency support mode counter area 233 may not be cleared to "0". The calculation result storage area 234 may not be cleared to "0".

<33rd Embodiment>
In the present embodiment, the processing configuration executed by the main CPU 63 is different from the fifteenth embodiment. Hereinafter, a configuration different from the fifteenth embodiment will be described. The description of the same configuration as that of the fifteenth embodiment is basically omitted.

FIG. 114 is a flowchart showing the main processing in the present embodiment executed by the main CPU 63. The processes of steps S7901 to S7924 in the main process are executed by using the program for specific control and the data for specific control in the main CPU 63.

First, the power-on initial setting process is executed (step S7901). In the power-on initial setting process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. The operation start and initial setting of the symbol display device 41 are completed in the predetermined period for the weight. It also allows access to the main RAM 65.

After that, the internal function register setting process is executed (step S7902). In the internal function register setting process, the interrupt cycle of the first timer interrupt process (FIG. 117), which is a process that is started by interrupting the main process periodically, is set to the first interrupt cycle (specifically, 4 milliseconds). The interrupt cycle of the second timer interrupt process (FIG. 123), which is a process that is periodically interrupted and started with respect to the main process, is set to the second interrupt cycle, which is shorter than the first interrupt cycle. Set to (specifically, 2 milliseconds).

That is, in the present embodiment, the first timer interrupt process and the second timer interrupt process exist as the timer interrupt process so that the interrupt cycle is relatively long and short. Both the first timer interrupt process and the second timer interrupt process are started by interrupting the main process. Further, the second timer interrupt process is started by interrupting the first timer interrupt process. On the other hand, the first timer interrupt process is not started by interrupting the second timer interrupt process. If both the first interrupt cycle and the second interrupt cycle have elapsed in a situation where both the first timer interrupt process and the second timer interrupt process are not executed, the second interrupt cycle is irrespective of the elapsed order of those cycles. It is started first from the timer interrupt processing. In this respect, it can be said that the second timer interrupt process is a process that is started with priority over the first timer interrupt process.

In the internal function register setting process, the first interrupt cycle of the first timer interrupt process is set to a predetermined register of the main CPU 63, and the second interrupt cycle of the second timer interrupt process is set to a specific register of the main CPU 63. do. Further, in the internal function register setting process, in addition to the setting of the first and second interrupt cycles, the setting process of the numerical range of various counters such as the numerical range of the hit random number counter C1 is executed.

After that, "1" is set in the start-up processing flag provided in the work area 221 for specific control (step S7903). The start-up processing flag indicates that even if the first timer interrupt processing is started, the first timer interrupt processing should be terminated without executing various processes set in the first timer interrupt processing. Is a flag for specifying by the main CPU 63. By setting the start-up processing flag to "1", even if the first timer interrupt processing is started, the various processes set in the first timer interrupt processing are not executed and the first timer interrupt processing is not executed. The timer interrupt processing will be terminated.

After that, the interrupt permission is set (step S7904). As a result, the first timer interrupt process (FIG. 117) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 123) is interrupted and activated in the second interrupt cycle. However, since "1" is set in the start-up processing flag in step S7903, even if the first timer interrupt processing is started, various processes set in the first timer interrupt processing are executed. The first timer interrupt process is terminated without any notice.

After that, it is determined whether or not the reset button 68c is pressed (step S7905). That is, it is determined whether or not the power ON operation of the pachinko machine 10 is performed while the reset button 68c is being pressed to start supplying the operating power to the MPU 62. Here, in the present embodiment, the main control device 60 is provided with the setting key insertion portion 68a and the reset button 68c, but is not provided with the update button 68b. Further, the main control device 60 is provided with the first to fourth notification display devices 201 to 204 as in the eleventh embodiment, instead of the first to third notification display devices 69a to 69c.

When the reset button 68c is not pressed (step S7905: NO), it is determined whether or not "1" is set in the power failure flag provided in the work area 221 for specific control (step S7906). When the power failure processing is executed in the power failure information storage process (step S8202) of the first timer interrupt process (FIG. 117) described later, the power failure flag is set to "1". The power failure flag is a flag for the main CPU 63 to specify whether or not the power failure processing was properly performed when the power was cut off last time.

When "1" is set in the power failure flag (step S7906: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S7907). The checksum calculation method is arbitrary, but is the same as the calculation method when the checksum is calculated in the power failure information storage process (step S8202) of the first timer interrupt process (FIG. 117) described later. It has become a method. The checksum calculated in the power failure processing is stored in the work area 221 for specific control, and the storage area of the work area 221 for specific control in which this checksum is stored is used when calculating the checksum. Excluded from the storage area to be calculated.

That is, when calculating the checksum, the storage area to be calculated, which is a part of the storage area in the work area 221 for specific control and the stack area 222 for specific control, is the calculation target. In the storage area to be calculated, the checksum is calculated in the power failure process when the supply of the operating power to the MPU 62 is stopped, and then the supply of the operating power to the MPU 62 is restarted and the process of step S7907 is executed. Until this is done, it is basically a storage area in which information is not rewritten when power supply such as backup power to the work area 221 for specific control and the stack area 222 for specific control is continued. Therefore, the information of the work area 221 for specific control and the stack area 222 for specific control has not been changed between the time when the supply of the operating power to the MPU 62 is stopped and the time when the supply of the operating power to the MPU 62 is restarted. In this case, the checksums for the work area 221 for specific control and the stack area 222 for specific control are the same as immediately before the supply of operating power to the MPU 62 is stopped. Further, in the storage area to be calculated when calculating this checksum, an area (specifically, a set value counter) in which information of a set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control is set. )It is included. The checksum calculation target does not include the work area 223 for non-specific control and the stack area 224 for non-specific control.

After that, the work area 221 for specific control and the stack area for specific control calculated in the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control The checksum for 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S7907 (step S7908). Then, it is determined whether or not the checksums match (step S7909).

If a negative determination is made in step S7906 or step S7909, that is, if "1" is not set in the power failure flag or the checksums do not match, the game stop flag provided in the work area 221 for specific control is provided. Is set to "1" (step S7910). The game stop flag is a situation in which an affirmative determination is made in step S8207 in the first timer interrupt process (FIG. 117) described later and the processes of steps S8208 to S8221 are not executed, that is, the execution of the process for advancing the game is stopped. This is a flag for the main CPU 63 to specify whether or not the situation should be. When the game stop flag is set to "1", affirmative determination is made in step S8207 of the first timer interrupt process (FIG. 117) described later, so that the processes of steps S8208 to S8221 are not executed. As a result, if the power failure flag is not set to "1" because the power failure processing was not performed properly when the power was cut off last time, the game progress is stopped and for specific control. If the checksums do not match due to the change in the information storage state since the last power failure for at least one of the work area 221 and the stack area 222 for specific control, the progress of the game is stopped. It will be in a state of being.

In this case, in the storage area to be calculated when calculating the checksum, as described above, the area in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (specifically, Set value counter) is included. Therefore, if the set value abnormality occurs after the previous power cutoff, the checksums do not match, and the progress of the game is stopped.

On the other hand, even if the game stop flag is set to "1", the processes of steps S8202 to S8206 in the first timer interrupt process (FIG. 117) are executed. Therefore, even when the progress of the game is stopped, the power failure monitoring is executed, the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and further. Fraud detection is executed.

After that, an abnormality command indicating that an abnormality has occurred regarding the power failure flag or the checksum at the start of supplying the operating power is transmitted to the voice emission control device 81 (step S7911). Upon receiving the abnormal command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the information abnormality at the start of supply of the operating power, and the speaker unit 54 "change the setting." Is output. In addition, the character image "Please change the setting" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, even if the supply of the operating power to the pachinko machine 10 is temporarily stopped, the above notification is sent when the supply of the operating power to the pachinko machine 10 is resumed until the set value update process (step S7918) is executed. It may be a continuous configuration.

The manager of the game hall who confirmed the above notification in the situation where the progress of the game is stopped temporarily stops the supply of the operating power to the pachinko machine 10, and then restarts the supply of the operating power to the pachinko machine 10. In the case of making the setting value update process (step S7918) executed, an operation is performed. As a result, if an abnormality occurs in the power failure flag or checksum at the start of supply of operating power, it is possible to set a new set value in the set value update process (step S7918). ..

In particular, in the storage area to be calculated when calculating the checksum, as described above, the area in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control (specifically, the set value). Since the counter) is included, if an error occurs in the checksum, there is a possibility that an error has occurred in the set value. On the other hand, when an abnormality occurs regarding the checksum as described above, the execution of the set value update process (step S7918) is prompted so that the game is not performed with the abnormal set value. It becomes possible to do.

When "1" is set in the power failure flag and the checksum is normal (step S7906 and step S7909: YES), it is determined whether or not the setting key insertion unit 68a is turned on by using the setting key. (Step S7912), it is determined whether or not the front door frame 14 is open with respect to the inner frame 13 and the gaming machine main body 12 is open with respect to the outer frame 11 (step S7913). The front door opening sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body 12 with respect to the outer frame 11 is used as in the thirtieth embodiment. The main body open sensor 96 is used to detect whether or not it is in the open state, as in the thirtieth embodiment. The setting key insertion unit 68a is turned on by using the setting key (step S7912: YES), the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body is opened with respect to the outer frame 11. When 12 is in the open state (step S7913: YES), the setting confirmation process is executed (step S7914). In the setting confirmation process, the current setting values of the pachinko machine 10 are confirmed by the first to fourth notification display devices 201 to 204 used for displaying various parameters that are the management results of the game history. A process for displaying a display indicating that the situation is present and a display indicating the current set value of the pachinko machine 10 is executed.

FIG. 115 is a flowchart showing a setting confirmation process. The processes of steps S8001 to S8003 in the setting confirmation process are executed by using the specific control program and the specific control data in the main CPU 63.

First, "1" is set in the setting confirmation display flag provided in the work area 221 for specific control (step S8001). The setting confirmation display flag is a flag for the main CPU 63 to specify that the current setting value of the pachinko machine 10 is being confirmed. When "1" is set in the setting confirmation display flag, the corresponding display control is performed for the first to fourth notification display devices 201 to 204 in the second timer interrupt process (FIG. 123) described later. It is said. As a result, on the first to fourth notification display devices 201 to 204, a display indicating that the current set value of the pachinko machine 10 is being confirmed and a display showing the current set value of the pachinko machine 10. Is done.

After that, it is determined whether or not the setting key insertion unit 68a is turned off by using the setting key (step S8002). In this case, it may be configured to determine whether or not the setting key insertion unit 68a has switched from the ON state to the OFF state, or it may be configured to determine whether or not the setting key insertion unit 68a is in the OFF state. If the setting key insertion unit 68a is not turned off (step S8002: NO), the process of step S8002 is repeated as it is.

When the setting key insertion unit 68a is turned off (step S8002: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (step S8003). As a result, on the first to fourth notification display devices 201 to 204, a display indicating that the current set value of the pachinko machine 10 is being confirmed and a display showing the current set value of the pachinko machine 10. Is released. In this case, the display devices 201 to 204 for the first to fourth notifications start displaying the management result of the game history.

As described above, in the present embodiment, the operating power to the main CPU 63 is operated by turning on the power of the pachinko machine 10 while the setting key insertion unit 68a is turned on by the setting key without pressing the reset button 68c. In the situation where the supply of power is started and the main process is started, the reset button 68c is not pressed and the setting key insertion unit 68a is turned ON, so that the process that enables the progress of the game in the main process is performed. The setting confirmation process is executed in the situation where the process at the start of supply of the operating power, which is the situation before the execution, is being executed. As a result, it is possible to confirm the set value in a situation where the game is not performed.

Assuming that the set value is confirmed in a situation where the progress of the game is continued, for example, if the set value is confirmed during the execution of the game, the set value is being confirmed. There is a risk of shifting to the open / close execution mode. In this case, there is a possibility that the game ball cannot be launched toward the special electric winning device 32 even though the opening / closing execution mode is started. Further, if the set value is confirmed during the execution of the open / close execution mode, the open / close execution mode proceeds under the condition that the set value is confirmed. Therefore, in this case as well, the special electric winning device 32 There is a risk that the game ball cannot be fired at.

Assuming that the progress of the game is stopped when the confirmation of the set value is performed, if the confirmation of the set value is started in the situation where the game is being performed, the progress of the game is stopped in the middle. There is a risk that the processing for this will be complicated. For example, if the confirmation of the set value is started during the execution of the game round and the progress of the game is to be stopped in the middle, a process for stopping the game round in the middle is required. In this case, when the confirmation of the set value is started, the variation display of the symbol on the symbol display device 41 is stopped in the middle, and when the confirmation of the set value is completed, the variation display of the symbol on the symbol display device 41 is restarted. If you try, it will require complicated processing. Further, for example, if the confirmation of the set value is started during the execution of the open / close execution mode and the progress of the game is to be stopped in the middle, a process for stopping the open / close execution mode in the middle is required. Further, if the confirmation of the set value is started during the execution of the variable display of the pattern on the normal drawing display unit 38a and the progress of the game is to be stopped in the middle, a process for stopping the variable display of the pattern is performed. You will need it. Further, if the confirmation of the set value is started during the execution of the open execution state of the general electric accessory 34a and the progress of the game is to be stopped in the middle, a process for stopping the open execution state in the middle is required. Become. On the other hand, it is conceivable that the set value is confirmed after waiting for all the games to be completed. It becomes necessary to wait until none of the open execution states of the object 34a is executed, and there is a possibility that the waiting time until the confirmation of the set value is started becomes long.

On the other hand, at the time of starting the supply of the operating power, which is the situation before the processing that enables the progress of the game is executed in the main process that is executed when the supply of the operating power to the main CPU 63 is started. Since the setting confirmation process is executed in the situation where the process is being executed, the set value is confirmed in the situation where the progress of the game has already been stopped. This makes it possible to prevent the setting value from being confirmed while the game is in progress, and when confirming the set value, the progress of the game is stopped in the middle or the progress of the game is stopped. There is no need to wait for confirmation of the set value until. Therefore, it is possible to appropriately confirm the set value.

Returning to the description of the main process (FIG. 114), when the reset button 68c is pressed (step S7905: YES), the RAM clear process is executed (step S7915). In the RAM clear processing, the work area for specific control is excluded from the area (specifically, the set value counter) in which the information of the set value indicating the setting state of the pachinko machine 10 is set in the work area 221 for specific control. Clear "0" of 221 and execute the initial setting. As a result, the area indicating whether or not the winning / failing lottery mode is the high probability mode is cleared to "0", so that the winning / losing lottery is performed regardless of the winning / failing lottery mode immediately before the supply of operating power to the pachinko machine 10 is stopped. The mode is a low probability mode. In addition, the game times are not executed, the open / close execution mode is not executed, and the normal map display unit 38a is not variablely displayed, and the general electric accessory 34a is closed. It becomes a situation. Further, since the hold storage area 65a and the normal electric hold area 65c provided in the work area 221 for specific control are also cleared to "0", the hold information for the special figure display unit 37a is deleted and the normal figure display unit is deleted. The hold information for 38a is deleted. Further, in the RAM clear process, the stack area 222 for specific control is cleared to "0" and the initial setting is executed. Further, in the RAM clear processing, the initial setting is executed after the various registers of the main CPU 63 are also cleared to "0". In this initial setting, the same process as the internal function register setting process (step S7902) in step S7902 is executed.

On the other hand, in the RAM clear process, the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared to "0". As a result, it is possible to prevent the work area 223 for non-specific control and the stack area 224 for non-specific control from being cleared by "0" depending on the clear operation by the manager of the game hall.

After that, it is determined whether or not the setting key insertion unit 68a is turned on by using the setting key (step S7916), and the front door frame 14 is open with respect to the inner frame 13 and the outer frame 11 is opened. It is determined whether or not the gaming machine main body 12 is in the open state (step S7917). The front door opening sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body 12 with respect to the outer frame 11 is used as in the thirtieth embodiment. The main body open sensor 96 is used to detect whether or not it is in the open state, as in the thirtieth embodiment. The setting key insertion unit 68a is turned on by using the setting key (step S7916: YES), the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body is opened with respect to the outer frame 11. When 12 is in the open state (step S7917: YES), the set value update process is executed (step S7918).

FIG. 116 is a flowchart showing the set value update process. The processes of steps S8101 to S8107 in the set value update process are executed by using the specific control program and the specific control data in the main CPU 63.

First, "1" is set in the setting update display flag provided in the work area 221 for specific control (step S8101). The setting update display flag is a flag for the main CPU 63 to specify that the setting value of the pachinko machine 10 is being updated. When "1" is set in the setting update display flag, the corresponding display control is performed for the first to fourth notification display devices 201 to 204 in the second timer interrupt process (FIG. 123) described later. It is said. As a result, on the first to fourth notification display devices 201 to 204, a display indicating that the set value of the pachinko machine 10 is being updated and a display indicating the current set value of the pachinko machine 10 are displayed. Will be.

After that, it is determined whether or not the value of the set value counter provided in the work area 221 for specific control is 1 or more corresponding to "setting 1" and 6 or less corresponding to "setting 6" (step). S8102). When the value of the set value counter is "0" or 7 or more, a negative determination is made in step S8102, and "1" is set in the set value counter (step S8103). As a result, the set value of the pachinko machine 10 becomes "setting 1".

When an affirmative determination is made in step S8102 or when the process of step S8103 is executed, it is determined whether or not the setting key insertion unit 68a is turned off by using the setting key (step S8104). In this case, it may be configured to determine whether or not the setting key insertion unit 68a has switched from the ON state to the OFF state, or it may be configured to determine whether or not the setting key insertion unit 68a is in the OFF state.

When the setting key insertion unit 68a is not turned off (step S8104: NO), the set value counter in the work area 221 for specific control is provided on condition that the reset button 68c is pressed (step S8105: YES). The value of is added by 1 (step S8106). As a result, each time the reset button 68c is pressed once, the set value is updated one step higher. Further, when the reset button 68c is not pressed (step S8105: NO) or when the value of the set value counter is added by 1, the process returns to the process of step S8102. If it is determined that the value is 7 or more, "1" is set in the set value counter in step S8103. As a result, when the reset button 68c is pressed once in the situation of "setting 6", it returns to "setting 1".

When the setting key insertion unit 68a is turned off (step S8104: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8107). As a result, on the first to fourth notification display devices 201 to 204, a display indicating that the set value of the pachinko machine 10 is being updated and a display indicating the current set value of the pachinko machine 10 are displayed. The state of being struck is released. In this case, the display devices 201 to 204 for the first to fourth notifications start displaying the management result of the game history.

As described above, in the present embodiment, the power of the pachinko machine 10 is turned on while the reset button 68c is pressed, so that the supply of operating power to the main CPU 63 is started and the main process is started. The button 68c is pressed, and the RAM clearing process (step S7915) is executed regardless of whether or not the setting key insertion unit 68a is turned on. As a result, the operation content of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clear process (step S7915), and the RAM clear process (step S7915) is performed. It is possible to make the operation content for generating the game easy to understand for the manager of the game hall.

Even if the RAM clear process (step S7915) is executed, the set value counter in the work area 221 for specific control is not cleared to "0" and the information of the set value counter is not changed. This makes it possible to prevent the set value from being changed even if the RAM clear process (step S7915) is executed.

RAM clear processing based on not only turning on the power of the pachinko machine 10 while pressing the reset button 68c, but also turning on the power of the pachinko machine 10 while turning on the setting key insertion unit 68a with the setting key. Not only (step S7915) but also the setting value update process (step S7918) is executed. Further, as described above, the setting confirmation process (step S7914) is performed based on the operation of turning on the power of the pachinko machine 10 while turning on the setting key insertion unit 68a by the setting key without pressing the reset button 68c. Will be executed. As a result, it is possible to make the ON operation for the setting key insertion unit 68a common as an operation for executing the process related to the set value. Therefore, it is possible to make the operation content for generating the process related to the set value easy to understand for the manager of the game hall.

Further, when the power of the pachinko machine 10 is turned on while the setting key insertion unit 68a is turned on by the setting key, and the pressing operation of the reset button 68c is not added, the setting confirmation process is executed and the reset is performed. When the pressing operation of the button 68c is added, the set value update process is executed. As a result, it is possible to make the process to be executed different from the setting confirmation process and the set value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make the operation contents for executing the desired process among the setting confirmation process and the set value update process easy to understand for the manager of the game hall. Further, by increasing the operation contents for executing the setting value update process rather than the setting confirmation process, it is possible to make it particularly difficult to perform the act of illegally performing the setting value update process.

Returning to the description of the main process (FIG. 114), when the process of step S7911 is executed, when a negative determination is made in step S7912 or step S7913, when the process of step S7914 is executed, the negative is made in step S7916 or step S7917. When a determination is made or when the process of step S7918 is executed, the start-up process in progress flag in the work area 221 for specific control is cleared to "0" (step S7919). When the start-up processing flag is cleared to "0", even if the first timer interrupt processing is started, the state in which various processes set in the first timer interrupt processing are not executed is released. In step S7919, the power failure flag in the work area 221 for specific control is also cleared to "0".

After that, the return command is transmitted to the voice emission control device 81 (step S7920). The return command includes information indicating the number of pending information for the special figure display unit 37a, information indicating the current winning / failing lottery mode, information indicating the current support mode, and whether or not the opening / closing execution mode is being executed. It contains information and information indicating whether or not the game is being executed. These information are set based on the information stored in the work area 221 for specific control. By receiving the return command, the voice emission control device 81 responds to the display contents of the symbol display device 41, the light emission contents of the display light emission unit 53, and the sound output contents of the speaker unit 54 with various information set in the return command. The content to be done.

Here, when confirming the set value of the pachinko machine 10, it is necessary to turn on the power of the pachinko machine 10 while turning on the setting key insertion unit 68a with the setting key. Then, for example, when it becomes necessary to confirm the set value during the execution of the game round, the power of the pachinko machine 10 is turned off during the execution of the game round, and then the setting key insertion unit 68a is pressed by the setting key. The power ON operation of the pachinko machine 10 is performed while the ON operation is performed. In this case, since backup power is not supplied to the RAM provided in the voice emission control device 81, the effect of playing games in the RAM of the voice emission control device 81 is performed when the power of the pachinko machine 10 is turned off. The information for controlling the is erased. On the other hand, the backup power is supplied to the main RAM 65, and the clear process of the main RAM 65 is not executed when confirming the set value. Therefore, the power of the pachinko machine 10 is turned off during the execution of the game. After that, when the power of the pachinko machine 10 is turned on while the setting key insertion unit 68a is turned on by the setting key, the special figure display unit 37a displays the variation of the pattern after the setting confirmation process is executed. Will be restarted. Then, although the special symbol display unit 37a is performing the variable display of the symbol, the symbol display device 41 may not be able to display the variable symbol.

On the other hand, after the setting confirmation process is completed, the return command is transmitted to the voice emission control device 81, and the return command includes information indicating whether or not the game is being executed. Then, when the voice emission control device 81 receives the return command, the symbol display device 41 starts the variable display of the symbol. As a result, it is possible to prevent a situation in which the symbol display device 41 does not display the fluctuation of the symbol even though the special symbol display unit 37a displays the fluctuation of the symbol. .. The variable display of the symbols is performed at a relatively high speed so that each symbol in the variable display is indistinguishable or difficult to identify for the player. In addition, the return command does not include the result of the hit / fail determination process of the game times to be restarted and the result of the distribution determination process, and does not include information indicating the end timing of the game times to be restarted. Therefore, when the voice emission control device 81 starts the variable display of the symbol on the symbol display device 41 based on the return command, if the game times to be restarted correspond to the result, the next game times are started. When a command to start the indicated command or demo display is received by the symbol display device 41, the variable display of the symbol based on the return command is terminated, the display corresponding to the newly received command is started, and the display is to be restarted. If the game times correspond to the jackpot result, when the opening command indicating the start of the open / close execution mode is received, the variation display of the symbol based on the return command is ended and the opening effect is started.

Further, when the return command includes information indicating that the opening / closing execution mode is being executed, the voice emission control device 81 starts a display effect indicating that the opening / closing execution mode is being executed on the symbol display device 41. To be done. This makes it possible for the player to recognize that the open / close execution mode is being executed.

After that, the process proceeds to the residual processing of steps S7921 to S7924. That is, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123), but between one timer interrupt process and the next timer interrupt process. The remaining time will be generated. This residual time varies depending on the processing completion time of each timer interrupt process, and the residual process of steps S7921 to S7924 is repeatedly executed by utilizing the irregular time. In this respect, it can be said that the residual processing in steps S7921 to S7924 is an irregular process that is executed irregularly. In steps S7921 to S7924, the same processes as in steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

Next, the first timer interrupt process executed by the main CPU 63 will be described with reference to the flowchart of FIG. 117. As described above, the first timer interrupt process is periodically started at a cycle of 4 milliseconds, which is the first interrupt cycle. Further, the program corresponding to the first timer interrupt processing is set as the program for specific control.

First, it is determined whether or not "1" is set in the start-up processing flag in the work area 221 for specific control (step S8201). As described above, "1" is set in the start-up processing flag in step S7903 of the main processing (FIG. 114). Then, when "1" is set in the start-up processing flag (step S8201: YES), the first timer interrupt processing is terminated without executing the various processes of steps S8202 to S8221. As a result, when the supply of operating power to the pachinko machine 10 is started and the main processing (FIG. 114) is started, the execution of the first timer interrupt processing and the second timer interrupt processing is permitted at an early stage. Even if there is, various processes for controlling the progress of the game are performed in the first timer interrupt process until the process at the start of supplying the operating power is completed and the execution of the process for controlling the progress of the game is permitted. It is possible to prevent it from being executed.

As described above, the start-up processing flag is cleared to "0" in step S7919 when the processing at the start of supply of operating power is completed in the main processing (FIG. 114). In the first timer interrupt process, if "1" is not set in the start-up process flag (step S8201: NO), the processes after step S8202 are executed.

In steps S8202 to S8219 and S8221, the same processing as in steps S3701 to S3719 of the timer interrupt processing (FIG. 69) in the fifteenth embodiment is executed. These processes are executed in the main CPU 63 by using the program for specific control and the data for specific control. In this case, as described above, when it is determined that "1" is not set in the power failure flag in the main process (FIG. 114) (step S7906: NO) or when it is determined that the checksums do not match (step). S7909: NO), the game stop flag in the work area 221 for specific control is set to "1" (step S7910). When "1" is set in the game stop flag, the processing of steps S8201 to S8206 is executed in the first timer interrupt processing, but the processing of steps S8208 to S8221 is performed by making an affirmative determination in step S8207. Do not execute. As a result, if the power failure flag is not set to "1" because the power failure processing was not performed properly when the power was cut off last time, the game progress is stopped and for specific control. If the checksums do not match due to the change in the information storage state since the last power failure for at least one of the work area 221 and the stack area 222 for specific control, the progress of the game is stopped. It will be in a state of being. For example, the firing of the game ball is prohibited because the process of step S8212 is not executed. Further, since the process of step S8214 is not executed, the game times and the execution of the open / close execution mode are prohibited. Further, since the process of step S8218 is not executed, the payout of the game ball is prohibited.

On the other hand, even in such a situation where the progress of the game is stopped, the power failure monitoring by step S8202 is executed, and the hit random number counter C1, the jackpot type counter C2, and the reach random number counter C3 according to steps S8203 and S8204 are executed. And the random number initial value counter CINI is updated, and the fraud detection in step S8206 is further executed.

In the first timer interrupt process, the setting monitoring process is executed in step S8220. FIG. 118 is a flowchart showing the setting monitoring process. The processes of steps S8301 to S8303 in the setting monitoring process are executed by using the specific control program and the specific control data in the main CPU 63.

By checking the value of the set value counter in the work area 221 for specific control, it is determined whether or not the set value of the pachinko machine 10 is normal (step S8301). Specifically, when the set value set in the set value counter is any of "setting 1" to "setting 6", it is determined to be normal, and when it is "0" or 7 or more, it is abnormal. Judge that there is.

When the set value is abnormal (step S8301: NO), “1” is set in the game stop flag in the work area 221 for specific control, as in step S7910 in the main process (FIG. 114) (step S8302). When the game stop flag is set to "1", affirmative determination is made in step S8207 of the first timer interrupt process (FIG. 117), so that the processes of steps S8208 to S8221 are not executed. As a result, when it is specified that the set value is abnormal, the progress of the game is stopped. On the other hand, even if the game stop flag is set to "1", the processing of steps S8202 to S8206 in the first timer interrupt processing (FIG. 117) is executed, so that the progress of the game is stopped. Even in such a situation, the power failure monitoring is executed, the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated, and fraud detection is further executed.

After that, an abnormal command indicating that the set value is abnormal is transmitted to the voice emission control device 81 (step S8303). Upon receiving the abnormality command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the set value abnormality, and outputs a voice "Please change the setting" from the speaker unit 54. .. In addition, the character image "Please change the setting" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, even if the supply of the operating power to the pachinko machine 10 is temporarily stopped, the supply of the operating power to the pachinko machine 10 is resumed until the set value update process (step S7918) of the main process (FIG. 114) is executed. If this is done, the above notification may be continued.

The manager of the game hall who confirmed the above notification in the situation where the progress of the game is stopped temporarily stops the supply of the operating power to the pachinko machine 10, and then restarts the supply of the operating power to the pachinko machine 10. In the case of making the setting value update process (step S7918) executed, an operation is performed. As a result, when an abnormality occurs in the set value, it is possible to set a new set value in the set value update process (step S7918).

Here, the monitoring process of whether or not the set value is abnormal is executed by the first timer interrupt process (FIG. 117) that is periodically started. As a result, it is possible to monitor whether or not the set value is abnormal even in a situation where the game is being performed. Therefore, it is possible to prevent the game from being continued even though the set value is abnormal. In addition, monitoring of whether or not the set value is abnormal is executed every time a monitoring trigger occurs. This makes it possible to increase the frequency of monitoring whether or not the set value is abnormal.

In the main process (FIG. 114), a process for monitoring whether or not the set value is normal is not set. If a process for monitoring whether or not the set value is normal is set in the process at the start of supply of operating power in the main process (FIG. 114), the power failure flag and checksum at the start of supply of operating power are set. It becomes necessary not only to monitor the power, but also to monitor whether the set value is normal or not, which increases the monitoring load. Further, when it is specified that the set value is abnormal at the start of supplying the operating power, if the RAM clear process (step S7915) and the set value update process (step S7918) are to be executed, the processing configuration is increased accordingly. Becomes complicated. On the other hand, since the main process (FIG. 114) does not have a process for monitoring whether or not the set value is normal, the process configuration of the process at the start of supplying the operating power is preferable. It becomes possible to make it. Further, even if the process for monitoring whether or not the set value is normal is not set in the process at the start of supplying the operating power in this way, the first timer interrupt process (FIG. 117) is performed as described above. Since the configuration is such that the setting monitoring process (step S8220) is executed, if the set value is abnormal, it is possible to deal with it.

In the configuration in which the first timer interrupt process is executed as described above, in the present embodiment, as described above, the second timer interrupt process (FIG. 123) is performed as the timer interrupt process in addition to the first timer interrupt process (FIG. 117). As well as being present, the second timer interrupt process is started by interrupting the first timer interrupt process even during execution of the first timer interrupt process. In this case, although not shown in the first timer interrupt processing, the timer interrupt processing is prohibited and the timer interrupt processing is permitted before and after each processing of steps S8201 to S8221. For example, the timer interrupt process is prohibited before the lottery random number update process (step S8203) is executed, and the timer interrupt process is permitted after the lottery random number update process (step S8203) is executed. This makes it possible to prevent the second timer interrupt process from being interrupted and started while the lottery random number update process is being executed. Further, the timer interrupt processing is prohibited before the special figure special electric control process (step S8214) is executed, and the timer interrupt processing is permitted after the special figure special electric control process (step S8214) is executed. As a result, it is possible to prevent the second timer interrupt process from being interrupted and started while the special figure special electric control process is being executed.

Next, a configuration for displaying and controlling various display units on the main CPU 63 will be described. FIG. 119 is a block diagram for explaining a configuration for displaying and controlling various display units on the main CPU 63.

The special figure display unit 37a, the special figure hold display unit 37b, the normal figure display unit 38a, the normal figure hold display unit 38b, and the first to fourth notification display devices 2011 are targeted for display control by the main CPU 63. 204 exists. All of these are provided as segment display units in which a plurality of LED display segments are arranged. These segment display units are in the light emitting state by setting the data corresponding to the light emitting state (for example, the data of "1" which is one of the binary data), and the data corresponding to the extinguished state (for example, the data of the binary data). When the other one (data of "0") is set, the light is turned off.

The main control board 61 is provided with a first display circuit 261 corresponding to the special figure display unit 37a, and is provided with a second display circuit 262 corresponding to the special figure hold display unit 37b. A third display circuit 263 is provided corresponding to the display unit 38a, and a fourth display circuit 264 is provided corresponding to the general drawing hold display unit 38b. A fifth display circuit 265 is provided corresponding to 204. In the eleventh embodiment, the main control board 61 is provided with the first to fourth display ICs 205 to 208 in a one-to-one correspondence with the first to fourth notification display devices 201 to 204. However, in the present embodiment, these first to fourth display ICs 205 to 208 are not provided.

The first display circuit 261 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure display unit 37a. As a result, each display segment of the special figure display unit 37a is put into a light emitting state or an extinguished state in a manner corresponding to the display data provided to the first display circuit 261. In this case, although the first display circuit 261 can store and retain the provided display data for a predetermined period (for example, 16 milliseconds), the display data gradually becomes all "0" after the predetermined period elapses. Will approach the state of. Therefore, the display segment of the special figure display unit 37a, which is in the light emitting state due to the display data provided to the first display circuit 261, has passed a predetermined period without providing new display data to the first display circuit 261. By doing so, the light is gradually turned off. Further, with such a configuration, not only when the display content of the special figure display unit 37a is changed but also when the display content of the special figure display unit 37a is not changed, the output processing of the previous display data is performed. The same display data as the times is supplied to the first display circuit 261.

The number of display segments provided in the special figure display unit 37a is eight. Therefore, 8-bit data is provided to the first display circuit 261 as display data for display control of the special figure display unit 37a.

The second display circuit 262 provides data corresponding to the supplied display data to each of the plurality of display segments of the special figure reservation display unit 37b. As a result, each display segment of the special figure hold display unit 37b is put into a light emitting state or a light-off state in a manner corresponding to the display data provided to the second display circuit 262. In this case, the second display circuit 262 can store and retain the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all "0". Will approach the state of. Therefore, the display segment of the special figure holding display unit 37b, which is in the light emitting state due to the display data provided to the second display circuit 262, has a predetermined period without providing new display data to the second display circuit 262. As it elapses, it gradually turns off. Further, with such a configuration, not only when the display content of the special figure hold display unit 37b is changed but also when the display content of the special figure hold display unit 37b is not changed, the display data of the previous display is displayed. The same display data as the output processing times is supplied to the second display circuit 262.

The number of display segments provided in the special figure reservation display unit 37b is four. Therefore, 4-bit data is provided to the second display circuit 262 as display data for display control of the special figure hold display unit 37b. However, since the display data is provided in 8-bit units, 8-bit data is also provided when the display data is provided to the second display circuit 262, of which 4 bits are the special figure hold display unit. It is used as display data for display control of 37b.

The third display circuit 263 provides data corresponding to the supplied display data to each of the plurality of display segments of the general diagram display unit 38a. As a result, each display segment of the normal drawing display unit 38a is in a light emitting state or a light emitting state in a manner corresponding to the display data provided to the third display circuit 263. In this case, the third display circuit 263 can store and retain the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all "0". Will approach the state of. Therefore, the display segment of the normal figure display unit 38a, which is in the light emitting state due to the display data provided to the third display circuit 263, has passed a predetermined period without providing new display data to the third display circuit 263. By doing so, the light is gradually turned off. Further, with such a configuration, not only when the display content of the general map display unit 38a is changed but also when the display content of the general map display unit 38a is not changed, the output processing of the previous display data is performed. The same display data as the times is supplied to the third display circuit 263.

The number of display segments provided in the normal drawing display unit 38a is eight. Therefore, 8-bit data is provided to the third display circuit 263 as display data for display control of the normal figure display unit 38a.

The fourth display circuit 264 provides data corresponding to the supplied display data to each of the plurality of display segments of the general drawing hold display unit 38b. As a result, each display segment of the normal drawing hold display unit 38b is put into a light emitting state or a light-off state in a manner corresponding to the display data provided to the fourth display circuit 264. In this case, the fourth display circuit 264 can store and retain the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all "0". Will approach the state of. Therefore, the display segment of the normal figure hold display unit 38b, which is in the light emitting state due to the display data provided to the fourth display circuit 264, has a predetermined period without providing new display data to the fourth display circuit 264. As it elapses, it gradually turns off. Further, with such a configuration, not only when the display content of the normal figure hold display unit 38b is changed but also when the display content of the normal figure hold display unit 38b is not changed, the display data of the previous display is displayed. The same display data as the output processing times is supplied to the fourth display circuit 264.

The number of display segments provided in the normal drawing hold display unit 38b is four. Therefore, 4-bit data is provided to the fourth display circuit 264 as display data for display control of the normal figure hold display unit 38b. However, since the display data is provided in 8-bit units, 8-bit data is also provided when the display data is provided to the fourth display circuit 264, but 4 bits of them are the normal figure hold display unit. It is used as display data for display control of 38b.

The fifth display circuit 265 provides data corresponding to the supplied display data to each of the plurality of display segments provided in each of the first to fourth notification display devices 201 to 204. As a result, each display segment of the first to fourth notification display devices 201 to 204 is put into a light emitting state or an extinguished state in a manner corresponding to the display data provided to the fifth display circuit 265. In this case, the fifth display circuit 265 can store and retain the provided display data for a predetermined period (for example, 16 milliseconds), but when the predetermined period elapses, the display data gradually becomes all "0". Will approach the state of. Therefore, new display data is provided to the fifth display circuit 265 for the display segments of the first to fourth notification display devices 201 to 204 that are in the light emitting state according to the display data provided to the fifth display circuit 265. As the predetermined period elapses without any notice, the light is gradually turned off. Further, with such a configuration, not only the display contents of the first to fourth notification display devices 201 to 204 are changed, but also the display contents of the first to fourth notification display devices 201 to 204 are changed. Even if this is not done, the same display data as the output processing times of the previous display data is supplied to the fifth display circuit 265.

Seven display segments are provided in each of the first to fourth notification display devices 201 to 204. On the other hand, the display data is provided in 8-bit units. When the display data of the first to fourth notification display devices 201 to 204 is provided to the fifth display circuit 265, the 7-bit display data corresponding to the first notification display device 201 is provided as 8-bit unit data. After that, the 7-bit display data corresponding to the second notification display device 202 is provided as 8-bit unit data, and then the 7-bit display data corresponding to the third notification display device 203 is provided in 8-bit units. Finally, the 7-bit display data corresponding to the fourth notification display device 204 is provided as 8-bit unit data.

In the configuration in which the first to fifth display circuits 261 to 265 are provided as described above, the main CPU 63 supplies display data to the display IC 266. That is, the display ICs 266 are not provided on a one-to-one basis in the first to fifth display circuits 261 to 265, but one so as to be common to all of the first to fifth display circuits 261 to 265. Display IC 266 is provided. Then, when the main CPU 63 supplies the display data to the display IC 266, the main CPU 63 also supplies the type data indicating which of the first to fifth display circuits 261 to 265 corresponds to the display data to the display IC 266.

Regarding the electrical connection between the main CPU 63 and the display IC 266, the main CPU 63 and the display IC 266 are the type data signal line LN1, the type clock signal line LN2, the display data signal line LN3, and the display clock signal. It is electrically connected to the line LN4. Each of these signal lines LN1 to LN4 is a signal line for transmitting a signal from the main CPU 63 to the display IC 266 by one-way communication.

The type data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the type data signal line LN1. In this case, each 1-bit delimiter of the type data by serial communication is indicated by the type clock signal transmitted from the main CPU 63 to the display IC 266 using the type clock signal line LN2. The type data is data indicating which of the first to fifth display circuits 261 to 265 corresponds to the display data to be transmitted. The type data is transmitted as 5-bit data consisting of the 1st bit to the 5th bit. When the display data corresponds to the first display circuit 261, the first bit becomes the HI level and the other bits become the LOW level. When the display data corresponds to the second display circuit 262, the second bit becomes the HI level and the other bits become the LOW level. When the display data corresponds to the third display circuit 263, the third bit becomes the HI level and the other bits become the LOW level. When the display data corresponds to the fourth display circuit 264, the fourth bit becomes the HI level and the other bits become the LOW level. When the display data corresponds to the fifth display circuit 265, the fifth bit becomes the HI level and the other bits become the LOW level.

The display data is transmitted from the main CPU 63 to the display IC 266 by serial communication using the display data signal line LN3. In this case, the delimiter of each 1 bit of the display data by serial communication is indicated by the display clock signal transmitted from the main CPU 63 to the display IC 266 using the display clock signal line LN4. The display data is transmitted in 8-bit units by the 1st to 8th bits.

The main CPU 63 transmits display data corresponding to each of the first to fifth display circuits 261 to 265 to the display IC 266 in the second timer interrupt process (FIG. 123) described later. In this case, in one process of the second timer interrupt process, display data is transmitted to one of the display circuits 261 to 265 of the first to fifth display circuits, and the nth display circuit → n + 1 display. Each time a new processing time of the second timer interrupt processing occurs according to the order of the circuits, the display circuits 261 to 265 to be transmitted of the display data are changed one by one. Further, in the second timer interrupt processing in the processing time following the processing time in which the display data corresponding to the fifth display circuit 265, which is the last order in the order, is transmitted, the first display circuit 261 is the first order in the above order. Send the display data corresponding to. In the second timer interrupt processing process for transmitting display data to any of the first to fourth display circuits 261 to 264, only one display data in 8-bit units is transmitted, but the fifth display circuit 265 In the processing time of the second timer interrupt process for transmitting the display data to, four 8-bit display data are transmitted corresponding to the numbers of the first to fourth notification display devices 201 to 204.

In the configuration in which the main CPU 63 transmits display data as described above, various storage areas referred to by the main CPU 63 for transmitting display data to the work area 221 for specific control and the work area 223 for non-specific control. Is set. FIG. 120 (a) is an explanatory diagram for explaining various buffers 271-275 provided in the work area 221 for specific control, and FIG. 120 (b) is provided in the work area 223 for non-specific control. It is explanatory drawing for demonstrating various storage areas 234,276.

As shown in FIG. 120A, the work area 221 for specific control includes a first display data buffer 271, a second display data buffer 272, a third display data buffer 273, and a fourth display data buffer 274. A fifth display data buffer 275 is provided.

The first display data buffer 271 stores display data to be supplied to the first display circuit 261. Since the first display circuit 261 is provided corresponding to the special figure display unit 37a as described above, the first display data buffer 271 contains display data for causing the special figure display unit 37a to perform a predetermined display. It will be stored. In this case, the display data is stored in the first display data buffer 271 in the display control process (step S8216) based on the contents of the special figure special electric control process (step S8214) in the first timer interrupt process (FIG. 117). .. Further, when the processing time of the second timer interrupt processing (FIG. 123) for transmitting the display data to the first display circuit 261 is reached, only when the display data stored in the first display data buffer 271 is changed. Instead, the display data stored in the first display data buffer 271 is transmitted to the display IC 266 even when the display data has not been changed.

The second display data buffer 272 stores display data to be supplied to the second display circuit 262. Since the second display circuit 262 is provided corresponding to the special figure hold display unit 37b as described above, the second display data buffer 272 displays a display for causing the special figure hold display unit 37b to perform a predetermined display. The data will be stored. In this case, the display data is stored in the second display data buffer 272 in the display control process (step S8216) based on the contents of the special figure special electric control process (step S8214) in the first timer interrupt process (FIG. 117). .. Further, when the processing time of the second timer interrupt processing (FIG. 123) for transmitting the display data to the second display circuit 262 is reached, only when the display data stored in the second display data buffer 272 is changed. Instead, the display data stored in the second display data buffer 272 is transmitted to the display IC 266 even when the display data has not been changed.

The third display data buffer 273 stores display data to be supplied to the third display circuit 263. Since the third display circuit 263 is provided corresponding to the normal figure display unit 38a as described above, the third display data buffer 273 contains display data for causing the normal figure display unit 38a to perform a predetermined display. It will be stored. In this case, the display data is stored in the third display data buffer 273 in the display control process (step S8216) based on the contents of the normal power control process (step S8215) in the first timer interrupt process (FIG. 117). It is said. Further, when the processing time of the second timer interrupt processing (FIG. 123) for transmitting the display data to the third display circuit 263 is reached, only when the display data stored in the third display data buffer 273 is changed. Instead, the display data stored in the third display data buffer 273 is transmitted to the display IC 266 even when the display data has not been changed.

The fourth display data buffer 274 stores display data to be supplied to the fourth display circuit 264. Since the fourth display circuit 264 is provided so as to correspond to the normal figure holding display unit 38b as described above, the fourth display data buffer 274 displays a display for causing the normal figure holding display unit 38b to perform a predetermined display. The data will be stored. In this case, the display data is stored in the fourth display data buffer 274 in the display control process (step S8216) based on the contents of the normal power control process (step S8215) in the first timer interrupt process (FIG. 117). It is said. Further, when the processing time of the second timer interrupt processing (FIG. 123) for transmitting the display data to the fourth display circuit 264 is reached, only when the display data stored in the fourth display data buffer 274 is changed. Instead, the display data stored in the fourth display data buffer 274 is transmitted to the display IC 266 even when the display data has not been changed.

The fifth display data buffer 275 stores display data to be supplied to the fifth display circuit 265. Since the fifth display circuit 265 is provided corresponding to the first to fourth notification display devices 201 to 204 as described above, the fifth display data buffer 275 has the first to fourth notification display devices 201. Display data for causing a predetermined display to be performed in ~ 204 will be stored. When the processing time of the second timer interrupt processing for transmitting the display data to the fifth display circuit 265 is reached, not only when the display data stored in the fifth display data buffer 275 is changed, but also the display data. Is not changed, the display data stored in the fifth display data buffer 275 is transmitted to the display IC 266.

Here, in the first to fourth notification display devices 201 to 204, the display corresponding to the management result of the game history is performed, and the setting confirmation process (FIG. 115) or the set value update process (FIG. 116) is executed. If so, the display corresponding to the current set value is displayed. In this case, since the fifth display data buffer 275 is provided in the work area 221 for specific control, the process of storing the display data in the fifth display data buffer 275 is performed as a process corresponding to the specific control. On the other hand, the process for deriving the management result of the game history is performed as a process corresponding to the non-specific control, and the 61st parameter to the 68th parameter, which are the management results of the game history, are the display devices for the first to fourth notifications. From 2001 to 204, the display targets are sequentially displayed.

Therefore, as shown in FIG. 120 (b), not only the calculation result storage area 234 for storing the 61st parameter to the 68th parameter but also the 61st parameter to the 68th parameter are stored in the work area 223 for non-specific control. Of these, a display target setting area 276 for storing parameters to be displayed on the first to fourth notification display devices 201 to 204 is provided. Even in this embodiment, as in the fifteenth embodiment, the period during which the calculation result of one parameter is continuously displayed is 10 seconds. Therefore, in the process corresponding to the non-specific control, 10 Every time a second elapses, the calculation result of the parameter to be displayed is read from the calculation result storage area 234 according to a predetermined display order, and the calculation result of the read parameter is stored in the display target setting area 276. NS. Then, in the situation where the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, the second timer interrupt process (FIG. 123), which is the process corresponding to the specific control, is used. , The display data stored in the display target setting area 276 is read, and the read display data is stored in the fifth display data buffer 275.

On the other hand, when the setting confirmation process (FIG. 115) is being executed, the second timer interrupt process (FIG. 123), which is the process corresponding to the specific control, displays the first to fourth notifications. The fifth display data is for displaying the status indicating that the current set value of the pachinko machine 10 is being confirmed and the display indicating the current set value of the pachinko machine 10 in the devices 201 to 204. It is stored in the display data buffer 275. Further, when the set value update process (FIG. 116) is being executed, the second timer interrupt process (FIG. 123), which is the process corresponding to the specific control, displays the first to fourth notifications. The fifth display data is the display data for displaying the status of updating the set value of the pachinko machine 10 in the devices 201 to 204 and displaying the current set value of the pachinko machine 10. It is stored in buffer 275.

In the configuration in which the first to fifth display data buffers 271-275 are provided as described above, the main CPU 63 performs the display data corresponding to each processing time of the second timer interrupt processing (FIG. 123). The display data is read from the buffers 271-275, the read display data is transmitted to the display IC 266, and the type data indicating which of the first to fifth display circuits 261 to 265 corresponds to the display data is displayed. It is transmitted to the display IC 266. FIG. 121 is an explanatory diagram for explaining the electrical configuration of the display IC 266.

As shown in FIG. 121, the display IC 266 includes a type data buffer 281, a selection signal output unit 282, a display data buffer 283, and a display data output unit 284. The display data buffer 283 stores the display data received from the main CPU 63. The display data output unit 284 transmits the display data stored in the display data buffer 283 to the first to fifth display circuits 261 to 265. The type data buffer 281 stores the type data received from the main CPU 63. The selection signal output unit 282 is a selection signal for designating the display circuits 261 to 265 corresponding to the type data stored in the type data buffer 281 of the first to fifth display circuits 261 to 265 as the reception destination of the display data. Is output.

In detail, as shown in FIG. 119, the display IC 266 and the first display circuit 261 are electrically connected to each other by using the display signal group 291. The display signal group 291 is provided so as to enable transmission of 8-bit display data at one time, and 8-bit unit display data is transmitted from the display IC 266 by parallel communication. Further, a branch signal group 292 is provided by branching from the display signal group 291, and the branch signal group 292 includes a second display circuit 262, a third display circuit 263, a fourth display circuit 264, and a fifth display circuit 265. It is electrically connected to each of the. The branch signal group 292 is provided so as to enable transmission of 8-bit display data at a time like the display signal group 291. The 8-bit unit display data is transmitted from the display IC 266 by parallel communication. NS.

When the display data group 291 and the branch signal group 292 are provided as described above and the display data stored in the display data buffer 283 is transmitted by the display data output unit 284, the display data is the first. It is supplied to all of the fifth display circuits 261 to 265. In this case, the first to fifth selection signal lines 301 to 305 are provided in order to specify the display circuits 261 to 265 to receive and use the supplied display data.

The first selection signal line 301 is provided so as to electrically connect the display IC 266 and the first display circuit 261. When the type data corresponding to the first display circuit 261 is stored in the type data buffer 281, in order for the first display circuit 261 to receive and use the display data supplied from the display data output unit 284. , The selection signal output unit 282 of the display IC 266 transmits the first selection signal to the first display circuit 261 through the first selection signal line 301. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only in the first display circuit 261.

The second selection signal line 302 is provided so as to electrically connect the display IC 266 and the second display circuit 262. When the type data corresponding to the second display circuit 262 is stored in the type data buffer 281, in order for the second display circuit 262 to receive and use the display data supplied from the display data output unit 284. , The selection signal output unit 282 of the display IC 266 transmits the second selection signal to the second display circuit 262 through the second selection signal line 302. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only in the second display circuit 262.

The third selection signal line 303 is provided so as to electrically connect the display IC 266 and the third display circuit 263. When the type data corresponding to the third display circuit 263 is stored in the type data buffer 281, in order for the third display circuit 263 to receive and use the display data supplied from the display data output unit 284. , The selection signal output unit 282 of the display IC 266 transmits the third selection signal to the third display circuit 263 through the third selection signal line 303. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only in the third display circuit 263.

The fourth selection signal line 304 is provided so as to electrically connect the display IC 266 and the fourth display circuit 264. When the type data corresponding to the fourth display circuit 264 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the fourth display circuit 264 for use. , The selection signal output unit 282 of the display IC 266 transmits the fourth selection signal to the fourth display circuit 264 through the fourth selection signal line 304. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only in the fourth display circuit 264.

The fifth selection signal line 305 is provided so as to electrically connect the display IC 266 and the fifth display circuit 265. When the type data corresponding to the fifth display circuit 265 is stored in the type data buffer 281, the display data supplied from the display data output unit 284 is received by the fifth display circuit 265 for use. , The selection signal output unit 282 of the display IC 266 transmits the fifth selection signal to the fifth display circuit 265 through the fifth selection signal line 305. As a result, the display data supplied to all of the first to fifth display circuits 261 to 265 through the display signal group 291 and the branch signal group 292 is received and used only in the fifth display circuit 265.

FIG. 122 shows how the type data and the display data are transmitted from the main CPU 63 to the display IC 266, and the display data transmitted from the display IC 266 is received by the first display circuit 261 or the second display circuit 262. It is a time chart. FIG. 122 (a) shows the transmission period of the type data signal from the main CPU 63 to the display IC 266, and FIG. 122 (b) shows the transmission period of the type clock signal from the main CPU 63 to the display IC 266. FIG. 122 (c) ) Indicates the transmission period of the display data signal from the main CPU 63 to the display IC 266, FIG. 122 (d) shows the transmission period of the display clock signal from the main CPU 63 to the display IC 266, and FIG. 122 (e) shows the transmission period of the display clock signal from the main CPU 63 to the display IC 266. The transmission period of the first selection signal from the display IC 261 to the first display circuit 261 is shown, FIG. 122 (f) shows the transmission period of the second selection signal from the display IC 266 to the second display circuit 262, and FIG. 122 (g) shows the transmission period of the second selection signal. The transmission period of the display data from the display IC 266 to the first to fifth display circuits 261 to 265 is shown. The same applies to the case where the display data is received in the third to fifth display circuits 263 to 265.

Type data from the main CPU 63 to the display IC 266 at the timing of t1 after the supply of operating power to the pachinko machine 10 including the main CPU 63, the display IC 266, and the first to fifth display circuits 261 to 265 is started. And the transmission of the display data is started. Specifically, as shown in FIG. 122 (b), a pulse-shaped type clock signal is transmitted at each of the timing of t1, the timing of t2, the timing of t3, the timing of t4, and the timing of t5, and FIG. 122. As shown in (a), the pulse-shaped type data signal is transmitted in correspondence with the transmission of the pulse-shaped type clock signal at the timing of t1. As a result, the information corresponding to the first display circuit 261 is stored in the type data buffer 281 of the display IC 266.

Further, as shown in FIG. 122 (d), a pulse-shaped display clock is displayed at each of t1 timing, t2 timing, t3 timing, t4 timing, t5 timing, t6 timing, t7 timing, and t8 timing. The signal is transmitted, and as shown in FIG. 122 (c), the pulse-shaped display data signal corresponds to the transmission of the pulse-shaped display clock signal at the timing of t2, the timing of t3, the timing of t5, and the timing of t7. Is sent. As a result, the display data corresponding to the above information form is stored in the display data buffer 283 of the display IC 266.

Then, when the transmission of the 8th bit display clock signal is completed at the timing of t9 as shown in FIG. 122 (d), the type data buffer 281 is filled with the type data buffer 281 as shown in FIG. 122 (e) at the timing of t9. Transmission of the first selection signal is started by the selection signal output unit 282 of the display IC 266 toward the first display circuit 261 corresponding to the stored type data, and as shown in FIG. 122 (g) at the timing of t9. The display data output unit 284 of the display IC 266 starts transmitting the display data stored in the display data buffer 283. As a result, the display data is received and used by the first display circuit 261.

After that, at the timing of t10, as shown in FIGS. 122 (a) to 122 (d), the transmission of the type data and the display data from the main CPU 63 to the display IC 266 is newly started. In this case, at the timing of t10, transmission of the first selection signal from the display IC 266 to the first display circuit 261 is stopped as shown in FIGS. 122 (e) and 122 (g), and the display IC 266 stops transmitting the first selection signal. Transmission of display data to the first to fifth display circuits 261 to 265 is stopped.

For details on the new transmission of the type data and the display data, as shown in FIG. 122 (b), a pulse-shaped type clock is used for each of the t10 timing, the t11 timing, the t12 timing, the t13 timing, and the t14 timing. Along with the transmission of the signal, as shown in FIG. 122 (a), the pulse-shaped type data signal is transmitted in correspondence with the transmission of the pulse-shaped type clock signal at the timing of t11. As a result, the information corresponding to the second display circuit 262 is stored in the type data buffer 281 of the display IC 266.

Further, as shown in FIG. 122 (d), a pulse-shaped display clock is used for each of the t10 timing, the t11 timing, the t12 timing, the t13 timing, the t14 timing, the t15 timing, the t16 timing, and the t17 timing. The signal is transmitted, and as shown in FIG. 122 (c), it corresponds to the transmission of the pulsed display clock signal at the timing of t10, the timing of t11, the timing of t12, the timing of t15, the timing of t16 and the timing of t17. A pulsed display data signal is transmitted. As a result, the display data corresponding to the above information form is stored in the display data buffer 283 of the display IC 266.

Then, when the transmission of the display clock signal of the 8th bit is completed at the timing of t18 as shown in FIG. 122 (d), it is stored in the type data buffer 281 as shown in FIG. 122 (f) at the timing of t18. The second selection signal is started to be transmitted by the selection signal output unit 282 of the display IC 266 toward the second display circuit 262 corresponding to the type data, and as shown in FIG. 122 (g) at the timing of the t18. The display data output unit 284 of the display IC 266 starts transmitting the display data stored in the display data buffer 283. As a result, the display data is received and used by the second display circuit 262.

Regarding the first to fourth display circuits 261 to 264, only one display data is transmitted in the second timer interrupt process (FIG. 123) to which the display data is transmitted, but the fifth display circuit 265 is transmitted. In the second timer interrupt process (FIG. 123) to which the display data is transmitted, four display data are transmitted corresponding to the numbers of the first to fourth notification display devices 201 to 204. The second timer interrupt process (FIG. 123) is started in the second interrupt cycle (specifically, 2 milliseconds) as described above, but even if it is a process of transmitting four display data. Each processing time is set so that one processing time is completed in less than the second interrupt cycle.

With the above configuration, it is possible to transmit display data to a plurality of display circuits 261 to 265 using one display IC 266. Here, as described above, each of the first to fifth display circuits 261 to 265 can store and retain the provided display data for a predetermined period (for example, 16 milliseconds), but the predetermined period has elapsed. Then, the display data gradually approaches the state of all "0". In this case, if the reception of the display data in each of the display circuits 261 to 265 exceeds a predetermined period, the special figure display unit 37a, the special figure hold display unit 37b, the normal figure display unit 38a, the normal figure hold display unit 38b, and the first Even if the display contents of the 1st to 4th notification display devices 201 to 204 have not been changed, the display segment that is in the light emitting state temporarily approaches the extinguished state, and as a result, the light in the display segment May cause blinking. On the other hand, in the present embodiment, apart from the first timer interrupt process (FIG. 117) that is activated in the first interrupt cycle (specifically, 4 milliseconds), the second interrupt is shorter than the first interrupt cycle. A second timer interrupt process (FIG. 123) that is started in a cycle (specifically, 2 milliseconds) is set, and in the second timer interrupt process, display data is collectively transmitted to the display IC 266. ..

Hereinafter, the second timer interrupt process will be described with reference to the flowchart of FIG. 123. The processing of steps S8401 to S8413 in the second timer interrupt processing is executed by using the specific control program and the specific control data in the main CPU 63.

First, interrupt prohibition is set in order to prohibit the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8401). By prohibiting the generation of the first timer interrupt process (FIG. 117), the first timer interrupt process (FIG. 117) interrupts the second timer interrupt process (FIG. 123) even if the first interrupt cycle has elapsed. It is possible to prevent it from being started by. Further, since the occurrence of the second timer interrupt process (FIG. 123) is prohibited, even if the second timer interrupt cycle elapses during the execution of the second timer interrupt process (FIG. 123), the second timer interrupt is interrupted. It is possible to prevent the process (FIG. 123) from being started twice.

After that, it is determined whether or not "1" is set in the setting update display flag in the work area 221 for specific control (step S8402). The setting update display flag is a flag for the main CPU 63 to specify whether or not the setting value update process (FIG. 116) is being executed by the main CPU 63. As described above, the set value update process (FIG. 116) is performed in the situation where the process at the start of the supply of the operating power is executed in the main process (FIG. 114) when the supply of the operating power to the main CPU 63 is started. Although it will be executed, the second timer interrupt process (FIG. 123) is set by the main CPU 63 because it is interrupted and started even in the situation where the process at the start of supplying the operating power is being executed. Even in the situation where the value update process (FIG. 116) is being executed, the second timer interrupt process (FIG. 123) is interrupted and started.

The situation in which "1" is set in the setting update display flag means that the setting value update process (FIG. 116) is being executed by the main CPU 63 this time in the second timer interrupt process (FIG. 123). It means that it is the processing time that was started by interrupting the situation. If an affirmative determination is made in step S8402, the setting process for the fifth display data buffer 275 during the setting update is executed (step S8403). In the setting process, the display indicating that the setting value of the pachinko machine 10 is being updated on the first to fourth notification display devices 201 to 204 and the display indicating the current setting value of the pachinko machine 10 are displayed. The display data to be performed is stored in the fifth display data buffer 275.

When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 describe FIG. 124 (a). The display shown in the figure is performed. Specifically, when a display indicating that the set value is being updated is performed in the first to fourth notification display devices 201 to 204, the first to fourth notification display devices 201 to 204 At least one display segment is in the light emitting state in each. That is, each of the first to fourth notification display devices 201 to 204 is in the display state. As a result, even when a display indicating that the set value is being updated is displayed, it is confirmed that the first to fourth notification display devices 201 to 204 have not failed in the game hall. The administrator can grasp it. Even when the management result of the game history is displayed, at least one display segment is in the light emitting state in each of the first to fourth notification display devices 201 to 204, and the first to fourth notifications are displayed. Each of the display devices 2001 to 204 is in the display state.

For details on the display contents of the first to fourth notification display devices 201 to 204, in the first notification display device 201, one display segment in the center is in a light emitting state and the remaining display segments are in a light off state. It becomes. Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment on the first notification display device 201 may be in the light emitting state. The display content of the first notification display device 201 when the management result of the game history is displayed includes the display content in which one central display segment is in the light emitting state and the remaining display segment is in the off state. Not. As a result, while using the display segment that can be in the light emitting state even when the management result of the game history is displayed, the display content of the first notification display device 201 in the situation where the set value is updated is displayed in the game history. It is possible to make the display contents not displayed in the management result of.

In the second notification display device 202, similarly to the first notification display device 201, one central display segment is in the light emitting state and the remaining display segments are in the off state. Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment on the second notification display device 202 may be in the light emitting state. The display content of the second notification display device 202 when the management result of the game history is displayed includes the display content in which one central display segment is in the light emitting state and the remaining display segment is in the off state. Not. As a result, the display content of the second notification display device 202 in the situation where the set value is being updated is displayed in the game history while using the display segment that can be in the light emitting state even when the management result of the game history is displayed. It is possible to make the display contents not displayed in the management result of.

In the third notification display device 203, some display segments are in the light emitting state and the remaining display segments are in the off state so that the letter “H” is displayed. In this case, the display segment that is in the light emitting state can be in the light emitting state even when the game history management result is displayed on the first to fourth notification display devices 201 to 204, but the game history management result is The display content of the third notification display device 203 when displayed does not include the display content in which the character "H" is displayed. As a result, while using the display segment that can be in the light emitting state even when the management result of the game history is displayed, the display content of the third notification display device 203 in the situation where the set value is updated is displayed in the game history. It is possible to make the display contents not displayed in the management result of. Further, the display content of the third notification display device 203 in the situation where the set value is confirmed does not include the display content in which the letter "H" is displayed. As a result, by displaying "H" on the third notification display device 203, it is possible to notify the manager of the game hall that the set value is being updated.

In the fourth notification display device 204, some display segments are in the light emitting state and the remaining display segments are in the off state so that the display corresponding to the current set value is performed. In the case of FIG. 124 (a), since the current set value is “setting 2”, “2” corresponding to “setting 2” is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the manager of the game hall can grasp the current set value. The display content of the fourth notification display device 204 in the situation where the set value is updated can be displayed in both the situation where the management result of the game history is displayed and the situation where the set value is confirmed.

Returning to the description of the second timer interrupt process (FIG. 123), when a negative determination is made in step S8402, it is determined whether or not "1" is set in the setting confirmation display flag in the work area 221 for specific control. (Step S8404). The setting confirmation display flag is a flag for the main CPU 63 to specify whether or not the setting confirmation process (FIG. 115) is being executed by the main CPU 63. As described above, the setting confirmation process (FIG. 115) is a situation in which the process at the start of supply of the operating power is executed in the main process (FIG. 114) when the supply of the operating power to the main CPU 63 is started. Although it will be executed, the second timer interrupt process (FIG. 123) is set by the main CPU 63 because it is interrupted and started even in the situation where the process at the start of supplying the operating power is being executed. Even in the situation where the confirmation process (FIG. 115) is being executed, the second timer interrupt process (FIG. 123) is interrupted and started.

The situation in which "1" is set in the setting confirmation display flag means that the setting confirmation process (FIG. 115) is being executed by the main CPU 63 this time in the second timer interrupt process (FIG. 123). It means that it is the processing time that was started by interrupting the situation. If an affirmative determination is made in step S8404, the setting process for the fifth display data buffer 275 during the setting confirmation is executed (step S8405). In the setting process, a display indicating that the set value of the pachinko machine 10 is being confirmed by the first to fourth notification display devices 201 to 204 and a display indicating the current set value of the pachinko machine 10 are displayed. The display data to be performed is stored in the fifth display data buffer 275.

When the display data stored in the fifth display data buffer 275 is transmitted to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 describe FIG. 124 (b). The display shown in the figure is performed. Specifically, when a display indicating that the set value is being updated is performed in the first to fourth notification display devices 201 to 204, the first to fourth notification display devices 201 to 204 At least one display segment is in the light emitting state in each. That is, each of the first to fourth notification display devices 201 to 204 is in the display state. As a result, even when a display indicating that the set value is being confirmed is displayed, it is confirmed that the first to fourth notification display devices 201 to 204 have not failed in the game hall. The administrator can grasp it.

For details on the display contents of the first to fourth notification display devices 201 to 204, in the first notification display device 201, one display segment in the center is in a light emitting state and the remaining display segments are in a light off state. It becomes. Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment on the first notification display device 201 may be in the light emitting state. The display content of the first notification display device 201 when the management result of the game history is displayed includes the display content in which one central display segment is in the light emitting state and the remaining display segment is in the off state. Not. As a result, while using the display segment that can be in the light emitting state even when the management result of the game history is displayed, the display content of the first notification display device 201 in the situation where the set value is confirmed is displayed in the game history. It is possible to make the display contents not displayed in the management result of.

In the second notification display device 202, similarly to the first notification display device 201, one central display segment is in the light emitting state and the remaining display segments are in the off state. Even when the management result of the game history is displayed on the first to fourth notification display devices 201 to 204, one central display segment on the second notification display device 202 may be in the light emitting state. The display content of the second notification display device 202 when the management result of the game history is displayed includes the display content in which one central display segment is in the light emitting state and the remaining display segment is in the off state. Not. As a result, while using the display segment that can be in the light emitting state even when the management result of the game history is displayed, the display content of the second notification display device 202 in the situation where the set value is confirmed is displayed in the game history. It is possible to make the display contents not displayed in the management result of.

Here, the display contents of the first notification display device 201 and the second notification display device 202 are the same regardless of whether the set value is being updated or the set value is being confirmed. As a result, the first notification display device 201 and the second notification display device 202 indicate that the display target in the first to fourth notification display devices 201 to 204 is not the management result of the game history but the set value. It is possible to clearly notify the manager of the game hall by displaying.

In the third notification display device 203, some display segments are in the light emitting state and the remaining display segments are in the off state so that the character “k” is displayed. In this case, the display segment that is in the light emitting state can be in the light emitting state even when the game history management result is displayed on the first to fourth notification display devices 201 to 204, but the game history management result is The display content of the third notification display device 203 when displayed does not include the display content in which the character "k" is displayed. As a result, while using the display segment that can be in the light emitting state even when the management result of the game history is displayed, the display content of the third notification display device 203 in the situation where the set value is confirmed is displayed in the game history. It is possible to make the display contents not displayed in the management result of. Further, while "H" is displayed on the third notification display device 203 when the set value is being updated, "k" is displayed on the third notification display device 203 when the set value is being confirmed. Is displayed. As a result, by confirming the display content of the third notification display device 203, the manager of the game hall is notified whether the setting value is being updated or the setting value is being confirmed. It becomes possible.

In the fourth notification display device 204, some display segments are in the light emitting state and the remaining display segments are in the off state so that the display corresponding to the current set value is performed. In the case of FIG. 124 (b), since the current set value is "setting 2", "2" corresponding to "setting 2" is displayed on the fourth notification display device 204. By checking the fourth notification display device 204, the manager of the game hall can grasp the current set value. The display content of the fourth notification display device 204 in the situation where the set value is confirmed can be displayed in both the situation where the management result of the game history is displayed and the situation where the set value is updated.

Returning to the description of the second timer interrupt process (FIG. 123), if a negative determination is made in step S8404, the setting process for the fifth display data buffer 275 in the normal state is executed (step S8406). In this case, information is read from the display target setting area 276 in the work area 223 for non-specific control, and the parameters corresponding to the read information are displayed on the first to fourth notification display devices 201 to 204. The display data is stored in the fifth display data buffer 275. By transmitting the display data to the fifth display circuit 265 via the display IC 266, the first to fourth notification display devices 201 to 204 calculate the current display target parameter among the 61st to 68th parameters. The result is displayed.

When the processing of step S8403, step S8405 or step S8406 is executed, the transmission state of the signal through the type data signal line LN1 and the type clock signal line LN2 is turned off (step S8407), and the display data signal line LN3 and the display The transmission state of the signal through the clock signal line LN4 is set to the OFF state (step S8408). After that, the update process of the type counter provided in the work area 221 for specific control is executed (step S8409).

The type counter is a counter for the main CPU 63 to specify the transmission target of the display data among the first to fifth display data buffers 271-275 in the current processing time of the second timer interrupt processing. When the value of the type counter is "1", the display data of the first display data buffer 271 is the transmission target, and when the value of the type counter is "2", the display data of the second display data buffer 272 is the transmission target. When the value of the type counter is "3", the display data of the third display data buffer 273 is the transmission target, and when the value of the type counter is "4", the display data of the fourth display data buffer 274 is the transmission target. When it becomes a transmission target and the value of the type counter is "5", the display data of the fifth display data buffer 275 becomes the transmission target. In the type counter update process, the value of the type counter is added by 1, and if the value of the type counter after the addition exceeds the upper limit of "5", the value of the type counter is set to "1". .. As a result, the transmission target of the display data is sequentially changed in the first to fifth display data buffers 271-275 for each processing time of the second timer interrupt processing.

After that, the type data corresponding to the value of the type counter is read from the main ROM 64 (step S8410). Specifically, when the value of the type counter is "1", the type data corresponding to the first display circuit 261 is read from the main ROM 64, and when the value of the type counter is "2", the second type counter is read. The type data corresponding to the display circuit 262 is read from the main ROM 64, and when the value of the type counter is "3", the type data corresponding to the third display circuit 263 is read from the main ROM 64, and the value of the type counter is When it is "4", the type data corresponding to the fourth display circuit 264 is read from the main ROM 64, and when the value of the type counter is "5", the type data corresponding to the fifth display circuit 265 is mainly read. Read from the side ROM 64.

After that, the display data is read from the display data buffers 271-275 corresponding to the value of the type counter (step S8411). Specifically, when the value of the type counter is "1", the display data is read from the first display data buffer 271, and when the value of the type counter is "2", the display data is read from the second display data buffer 272. The display data is read, and when the value of the type counter is "3", the display data is read from the third display data buffer 273, and when the value of the type counter is "4", it is read from the fourth display data buffer 274. The display data is read, and when the value of the type counter is "5", the display data is read from the fifth display data buffer 275.

After that, various signal transmission processes are executed (step S8412). In the transmission process, signals are output to the type data signal line LN1 and the type clock signal line LN2 so that the type data read in step S8410 is transmitted to the display IC 266. Further, in the transmission process, signals are output to the display data signal line LN3 and the display clock signal line LN4 so that the display data read in step S8411 is transmitted to the display IC 266.

After that, interrupt permission is set to allow the occurrence of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) (step S8413).

According to the present embodiment described in detail above, the following excellent effects are obtained.

When the power of the pachinko machine 10 is turned on while the setting key insertion unit 68a is turned on by the setting key without pressing the reset button 68c, the supply of operating power to the main CPU 63 is started. In the situation where the main process (FIG. 114) is started, the reset button 68c is not pressed and the setting key insertion unit 68a is turned ON, and a process that enables the game to proceed is executed in the main process. The setting confirmation process is executed in the situation before the process at the start of the supply of operating power is being executed. This makes it difficult to perform an act of illegally confirming the set value.

Assuming that the set value is confirmed in a situation where the progress of the game is continued, for example, if the set value is confirmed during the execution of the game, the set value is being confirmed. There is a risk of shifting to the open / close execution mode. In this case, there is a possibility that the game ball cannot be launched toward the special electric winning device 32 even though the opening / closing execution mode is started. Further, if the set value is confirmed during the execution of the open / close execution mode, the open / close execution mode proceeds under the condition that the set value is confirmed. Therefore, in this case as well, the special electric winning device 32 There is a risk that the game ball cannot be fired at.

Assuming that the progress of the game is stopped when the confirmation of the set value is performed, if the confirmation of the set value is started in the situation where the game is being performed, the progress of the game is stopped in the middle. There is a risk that the processing for this will be complicated. For example, if the confirmation of the set value is started during the execution of the game round and the progress of the game is to be stopped in the middle, a process for stopping the game round in the middle is required. In this case, when the confirmation of the set value is started, the variation display of the symbol on the symbol display device 41 is stopped in the middle, and when the confirmation of the set value is completed, the variation display of the symbol on the symbol display device 41 is restarted. If you try, it will require complicated processing. Further, for example, if the confirmation of the set value is started during the execution of the open / close execution mode and the progress of the game is to be stopped in the middle, a process for stopping the open / close execution mode in the middle is required. Further, if the confirmation of the set value is started during the execution of the variable display of the pattern on the normal drawing display unit 38a and the progress of the game is to be stopped in the middle, a process for stopping the variable display of the pattern is performed. You will need it. Further, if the confirmation of the set value is started during the execution of the open execution state of the general electric accessory 34a and the progress of the game is to be stopped in the middle, a process for stopping the open execution state in the middle is required. Become. On the other hand, it is conceivable that the set value is confirmed after waiting for all the games to be completed. It becomes necessary to wait until none of the open execution states of the object 34a is executed, and there is a possibility that the waiting time until the confirmation of the set value is started becomes long.

On the other hand, at the time of starting the supply of the operating power, which is the situation before the processing that enables the progress of the game is executed in the main process that is executed when the supply of the operating power to the main CPU 63 is started. Since the setting confirmation process is executed in the situation where the process is being executed, the set value is confirmed in the situation where the progress of the game has already been stopped. This makes it possible to prevent the setting value from being confirmed while the game is in progress, and when confirming the set value, the progress of the game is stopped in the middle or the progress of the game is stopped. There is no need to wait for confirmation of the set value until. Therefore, it is possible to appropriately confirm the set value.

When the power of the pachinko machine 10 is turned on while pressing the reset button 68c, the supply of operating power to the main CPU 63 is started and the main process (FIG. 114) is started. Is pressed, and the RAM clearing process (step S7915) is executed regardless of whether or not the setting key insertion unit 68a is turned on. As a result, the operation content of turning on the power of the pachinko machine 10 while pressing the reset button 68c is uniquely linked to the execution of the RAM clear process (step S7915), and the RAM clear process (step S7915). It is possible to make the operation contents for generating the above-mentioned easy to understand for the manager of the game hall.

Even if the RAM clear process (step S7915) is executed, the set value counter in the work area 221 for specific control is not cleared to "0" and the information of the set value counter is not changed. This makes it possible to prevent the set value from being changed even if the RAM clear process (step S7915) is executed.

Based on not only turning on the power of the pachinko machine 10 while pressing the reset button 68c, but also turning on the power of the pachinko machine 10 while turning on the setting key insertion unit 68a with the setting key. Not only the clear process (step S7915) but also the set value update process (step S7918) is executed. Further, as described above, the setting confirmation process (step S7914) is based on performing the power ON operation of the pachinko machine 10 while turning on the setting key insertion unit 68a with the setting key without pressing the reset button 68c (step S7914). Is executed. As a result, it is possible to make the ON operation for the setting key insertion unit 68a common as an operation for executing the process related to the set value. Therefore, it is possible to make the operation content for generating the process related to the set value easy to understand for the manager of the game hall.

When the power of the pachinko machine 10 is turned on while the setting key insertion unit 68a is turned on by the setting key, and the reset button 68c is not pressed, the setting confirmation process is executed and the reset button is pressed. When the pressing operation of 68c is added, the set value update process is executed. As a result, it is possible to make the process to be executed different from the setting confirmation process and the set value update process depending on whether or not the reset button 68c is pressed. Therefore, it is possible to make the operation contents for executing the desired process among the setting confirmation process and the set value update process easy to understand for the manager of the game hall. Further, by increasing the operation contents for executing the setting value update process rather than the setting confirmation process, it is possible to make it particularly difficult to perform the act of illegally performing the setting value update process.

It is executed by the first timer interrupt process (FIG. 117) in which the monitoring process of whether or not the set value is abnormal is periodically started. As a result, it is possible to monitor whether or not the set value is abnormal even in a situation where the game is being performed. Therefore, it is possible to prevent the game from being continued even though the set value is abnormal.

Monitoring of whether the set value is abnormal is executed every time a monitoring trigger occurs. More specifically, it is executed every time the first timer interrupt process (FIG. 117) is started. This makes it possible to increase the frequency of monitoring whether or not the set value is abnormal.

In the main process (FIG. 114), a process for monitoring whether or not the set value is normal is not set. If a process for monitoring whether or not the set value is normal is set in the process at the start of supply of operating power in the main process (FIG. 114), the power failure flag and checksum at the start of supply of operating power are set. It becomes necessary not only to monitor the power, but also to monitor whether the set value is normal or not, which increases the monitoring load. Further, when it is specified that the set value is abnormal at the start of supplying the operating power, if the RAM clear process (step S7915) and the set value update process (step S7918) are to be executed, the processing configuration is increased accordingly. Becomes complicated. On the other hand, since the main process (FIG. 114) does not have a process for monitoring whether or not the set value is normal, the process configuration of the process at the start of supplying the operating power is preferable. It becomes possible to make it. Further, even if the process for monitoring whether or not the set value is normal is not set in the process at the start of supplying the operating power in this way, the setting is monitored by the first timer interrupt process (FIG. 117). Since the configuration is such that the process (step S8222) is executed, if the set value is abnormal, it is possible to deal with it.

By setting the display for the first to fifth display circuits 261 to 265 on the display IC 266 according to the display data transmitted from the main CPU 63, the special figure display unit 37a is set so that the display content corresponds to the display data. , The special figure hold display unit 37b, the normal figure display unit 38a, the normal figure hold display unit 38b, and the first to fourth notification display devices 201 to 204 are displayed and controlled. This makes it possible to reduce the processing load of the main CPU 63. In this case, a plurality of display units such as the special figure display unit 37a, the special figure hold display unit 37b, the normal figure display unit 38a, the normal figure hold display unit 38b, and the first to fourth notification display devices 201 to 204 are displayed. In the provided configuration, the display IC 266 is not provided in a one-to-one correspondence with the plurality of display units, but one display IC 266 is also used for the plurality of display units. As a result, it is possible to increase the number of display units to be displayed and controlled while suppressing the increase in the number of display ICs 266. Further, the transmission interval of the display data from the main CPU 63 to the display IC 266 is set to the display circuits 261 to 265 corresponding to each display unit before the display corresponding to the display data cannot be maintained in each display unit. The transmission interval is set so that the display setting by the display IC 266 will be performed. As a result, even if one display IC 266 is also used for a plurality of display units, it is possible to appropriately display the display data in each display unit.

When the main CPU 63 transmits the display data to the display IC 266, the main CPU 63 transmits the type data that enables the type of the display circuits 261 to 265 to be set for the display data to be specified to the display IC 266. As a result, when the display data is transmitted from the main CPU 63, the display IC 266 may set the display data for the display circuits 261 to 265 corresponding to the type data transmitted from the main CPU 63. Therefore, even if one display IC 266 is also used for a plurality of display units, the configuration of the display IC 266 can be simplified.

The main CPU 63 transmits the display data so that the update lap is repeated when the plurality of display units are to be set as the display data once in a predetermined order once in the update lap. I do. As a result, the main CPU 63 may change the display unit to which the display data is transmitted according to a predetermined order, so that the processing configuration of the main CPU 63 can be simplified.

Even if the content of the display data for one display unit is the same as the content of the display data in the previous transmission with the display unit as the transmission target, the main CPU 63 causes the display unit to be the transmission target. Sends the display data. As a result, even if one display IC 266 is also used for a plurality of display units, the same display can be continued on a predetermined display unit.

The main CPU 63 executes a process for transmitting display data to the display IC 266 in the second timer interrupt process (FIG. 123) which is started by interrupting another process when the second interrupt cycle is reached. As a result, the cycle in which the display data is set in each display unit can be set to a predetermined cycle. Therefore, even if one display IC 266 is also used for a plurality of display units, the display corresponding to the display data cannot be maintained in each display unit before each display unit can be maintained. It is possible to set the display data by the display IC 266.

The processing for transmitting the display data to the first to fifth display circuits 261 to 265 to be displayed by the display IC 266 is integrated in the second timer interrupt processing (FIG. 123). As a result, it is possible to set the period in which the display data is set in the first to fifth display circuits 261 to 265 to be the same period.

When the first interrupt cycle is reached, the main CPU 63 interrupts another process and executes the first timer interrupt process (FIG. 117). In this case, the second interrupt cycle of the second timer interrupt process (FIG. 123) is set to be shorter than the first interrupt cycle of the first timer interrupt process (FIG. 117). This makes it possible to transmit the display data in a shorter cycle than in the configuration in which the process of transmitting the display data to the display IC 266 is executed in the first timer interrupt process (FIG. 117).

Further, a process of transmitting display data to the display IC 266 is set in the second timer interrupt process (FIG. 123), which has a shorter interrupt cycle than the first timer interrupt process (FIG. 117) in which the process for advancing the game is set. Has been done. As a result, it is possible to achieve the excellent effect as described above while ensuring that the first timer interrupt process (FIG. 117) is activated at an appropriate cycle for executing the process for advancing the game. Become.

The second timer interrupt process (FIG. 123) is interrupted and started even when the first timer interrupt process (FIG. 117) is being executed. This makes it possible to set the transmission cycle of the display data to a predetermined cycle.

When the second timer interrupt processing (FIG. 123) is started, the interrupt of the first timer interrupt processing (FIG. 117) is prohibited, and when the second timer interrupt processing (FIG. 123) is terminated, the first timer interrupt processing is performed. The interrupt of (Fig. 117) is permitted. This makes it possible to prevent the first timer interrupt process (FIG. 117) from being interrupted and executed in a situation where the second timer interrupt process (FIG. 123) is being executed. Therefore, it is possible to prioritize the process for transmitting the display data.

The second timer interrupt process (FIG. 123) is interrupted and started even in the situation where the process at the start of supply of operating power (steps S7901 to S7918) is being executed in the main process (FIG. 114). As a result, it is possible to control the display of a plurality of display units even when the processing at the start of supplying the operating power is being executed. Further, since the second timer interrupt process (FIG. 123) is interrupted and started from the process at the start of supply of the operating power, the process configuration of the process at the start of supply of the operating power is not complicated. However, it is possible to control the display of a plurality of display units in a situation where the processing at the start of supplying the operating power is being executed.

Even in the situation where the set value update process (step S7918) is being executed in the main process (FIG. 114), the second timer interrupt process (FIG. 123) is interrupted and started, and in that situation, the second timer interrupt process is started. (FIG. 123), display data for displaying the current set value on the fourth notification display device 204 is transmitted. As a result, the current set value is displayed on the fourth notification display device 204 in the situation where the set value update process (step S7918) is being executed without complicating the processing configuration of the main process (FIG. 114). It becomes possible to be done.

The second timer interrupt process (FIG. 123) is interrupted and started every time the second interrupt cycle elapses, even after the process at the start of supply of operating power is executed in the main process (FIG. 114). As a result, by using the second timer interrupt process (FIG. 123), either the situation where the process at the start of supplying the operating power is being executed or the situation after the process at the start of supplying the operating power is completed. It is also possible to control the display of a plurality of display units.

Note that the update button 68b is provided as in the first embodiment, and in the set value update process (FIG. 116), the set value may be updated by one step each time the reset button 68c is pressed. The set value may be updated by one step each time the update button 68b is pressed. Further, when the setting key is inserted into the setting key insertion unit 68a and the rotation operation is performed, the position corresponding to each of "setting 1" to "setting 6" is set as the rotation operation position, and the setting key is inserted. A set value corresponding to the rotation operation position of the portion 68a may be set. In addition, the setting key insertion unit 68a is configured to be able to rotate further than the ON position, and each time a rotation operation exceeding the ON position is performed, the set value in the middle of updating is changed to the set value in the next order. The configuration may be updated.

Further, in the set value update process (FIG. 116), the set value being selected is confirmed by turning off the setting key insertion unit 68a, and the set value update process is completed by further pressing the reset button 68c. It may be configured to be reset. Further, in the configuration in which the update button 68b is provided, in the set value update process (FIG. 116), the selected set value is confirmed by turning off the setting key insertion unit 68a, and the update button 68b is further pressed. The setting value update process may be terminated by the operation.

Further, as a condition for executing the set value update process (FIG. 116), the condition that the gaming machine main body 12 is in the open state may not be set, and the front door frame 14 is in the open state. The configuration may be such that neither the condition that the gaming machine main body 12 is in the open state nor the condition that the front door frame 14 is in the open state is set.

Further, as a condition for executing the setting confirmation process (FIG. 115), the condition that the gaming machine main body 12 is in the open state may not be set, and the front door frame 14 is in the open state. It may be a configuration in which the condition that the above is not set, or a configuration in which both the condition that the gaming machine main body 12 is in the open state and the condition that the front door frame 14 is in the open state are not set.

Further, it is specified that "1" is not set in the power failure flag or the checksum is abnormal in the main process (FIG. 114) executed when the supply of operating power to the main CPU 63 is started. If this is the case, the RAM clearing process (step S7915) may be executed. In this case, after the RAM clear process (step S7915) is executed, the set value update process (step S7918) may be executed, and a notification indicating that the set value update process (step S7918) should be executed is notified. It may be configured to stop the progress of the game at the same time as executing the above, or it may be configured to start the process for controlling the progress of the game.

Further, instead of the configuration in which the setting confirmation process (step S7914) in the main process (FIG. 114) is executed after the determination process of whether or not the power failure flag is set to "1" and the checksum comparison process. , The configuration may be executed before these processes. In this case, it is possible to prioritize the process for confirming the set value.

Further, the setting monitoring process (step S8220) is not limited to the configuration in which the first timer interrupt process (FIG. 117) is executed every time the first timer interrupt process (FIG. 117) is started. The setting monitoring process (step S8222) may be executed every time the predetermined number of triggers (for example, 10000 times) is executed. In this case, it is possible to suppress the execution frequency of the monitoring while periodically monitoring whether or not the set value is normal.

Further, the setting monitoring process (step S8222) may be executed in the residual process (steps S7921 to S7924) in the main process (FIG. 114). In this case, it is possible to monitor whether or not the set value is normal by using the free time in the situation where the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) are not executed. It will be possible.

Further, the setting monitoring process (step S8222) may be executed when the game round is newly started. More specifically, when the game round is newly started, the setting monitoring process (step S8220) may be executed before the hit / fail determination process is executed. This makes it possible to prevent the hit / fail determination process from being executed in a situation where the set value is abnormal.

Further, when it is specified in the setting monitoring process (step S8220) that the set value is abnormal, the configuration may be such that the process proceeds to the set value update process (step S7918).

If it is specified in the setting monitoring process (step S8220) that the set value is abnormal, the main process (main process) is performed with "1" set in the setting error flag provided in the work area 221 for specific control. FIG. 114) may be configured to start, and in order to stop the progress of the game with the setting abnormality flag set to "1" and to release the stopped state of the progress of the game, the power is turned off → It may be a configuration that requires ON. In this case, even if the main process (FIG. 114) does not perform an operation for executing the set value update process, it is forcibly set when the setting error flag is set to "1". By executing the value update process, it is possible to forcibly set a new set value by using the set value update process set in the main process (FIG. 114).

In addition, the hold information acquired when the game ball enters the first operating port 33 and the hold information acquired when the game ball enters the second operating port 34 are separately stored and stored. The special figure display unit 37a may be configured to include a first special figure display unit and a second special figure display unit corresponding to the reserved information. In this case, the variable display of the pattern on the first special figure display unit and the variable display of the pattern on the second special figure display unit can be executed in duplicate, and when a predetermined gaming state is reached, either one of them can be executed. The duration of the variable display of the pattern on the special figure display unit may be extremely long. In this configuration, if an attempt is made to wait for confirmation of the set value until the game is not performed, the waiting time becomes long. On the other hand, by making the setting confirmation process (step S7914) executed in the process at the start of supplying the operating power in the main CPU 63, the set value does not cause the above-mentioned standby time. Can be confirmed.

Further, in the low-frequency support mode, the duration of the variable display of the pattern on the normal map display unit 38a may be extremely long. In this configuration, if an attempt is made to wait for confirmation of the set value until the game is not performed, the waiting time becomes long. On the other hand, by making the setting confirmation process (step S7914) executed in the process at the start of supplying the operating power in the main CPU 63, the set value does not cause the above-mentioned standby time. Can be confirmed.

Further, the display contents of the first to fourth notification display devices 201 to 204 when the setting confirmation process (FIG. 115) is executed are not limited to the display contents in the above embodiment, for example, the third notification. Instead of displaying the character "k" on the display device 203, only the central display segment may be in the light emitting state as in the case of the first notification display device 201 and the second notification display device 202. .. Further, the first to third notification display devices 201 to 203 may be turned off and the fourth notification display device 204 may display the display corresponding to the current set value.

Further, the display contents of the first to fourth notification display devices 201 to 204 when the set value update process (FIG. 116) is executed are not limited to the display contents in the above embodiment, for example, the third notification. Instead of displaying the letter "H" on the display device 203, only the central display segment may be in the light emitting state as in the case of the first notification display device 201 and the second notification display device 202. .. Further, the first to third notification display devices 201 to 203 may be turned off and the fourth notification display device 204 may display the display corresponding to the current set value.

Further, instead of the configuration in which the main CPU 63 simultaneously transmits the type data and the display data to the display IC 266, the main CPU 63 may be configured to start the transmission of the display data after the transmission of the type data is started. In this case, the transmission of the display data may be started during the transmission of the type data, or the transmission of the display data may be started after the transmission of the type data is completed. Further, the transmission of the type data may be started after the transmission of the display data is started. In this case, the transmission of the type data may be started during the transmission of the display data, or the transmission of the type data may be started after the transmission of the display data is completed.

Further, the display IC 266 is not limited to the configuration in which only one display IC 266 is provided so as to be common to the first to fifth display circuits 261 to 265, and the display IC 266 is not limited to the configuration of the first to fifth display circuits 261 to 265. A configuration may be provided in which there is a one-to-one correspondence with each other. In this configuration, when the period for storing and retaining the display data in each display IC provided in a one-to-one correspondence with the first to fifth display circuits 261 to 265 is short, the display data to each display IC is displayed. Depending on the provision cycle, unintended blinking may occur on each display unit. On the other hand, by consolidating the processing for transmitting the display data in the second timer interrupt processing (FIG. 123) having a relatively short interrupt cycle as in the above embodiment, the display data to each display IC can be displayed. It is possible to shorten the provision cycle, and it is possible to prevent unintended blinking from occurring on each display unit.

Further, instead of the configuration in which the hit random number counter C1 is provided in the main RAM 65, a random number circuit for updating the random number acquired in the hit / fail determination process may be provided. In this case, in the internal function register setting process in the main process (FIG. 114), a setting is made to associate the random number of the random number circuit with the random number acquired in the hit / fail determination process.

Further, in the first timer interrupt processing (FIG. 117), the timer interrupt processing is prohibited and the timer interrupt processing is permitted before and after each processing of steps S8201 to S8221. However, this may be changed. For example, for a part of the first timer interrupt processing (FIG. 117), the timer interrupt processing is prohibited and the timer interrupt processing is permitted before and after that, while the other processing of the first timer interrupt processing (FIG. 117) is performed. The configuration may be such that the timer interrupt processing is not prohibited and the timer interrupt processing is not permitted before and after that. Further, a plurality of processes included in the first timer interrupt process (FIG. 117) may be sandwiched between them so that the timer interrupt process is prohibited and the timer interrupt process is permitted.

Further, the first timer interrupt process (FIG. 117) may not be set to prohibit the interrupt of the second timer interrupt process (FIG. 123). In this case, since the second timer interrupt process (FIG. 123) is executed with priority over the first timer interrupt process (FIG. 117), it is possible to prioritize the display control of a plurality of display units. .. Further, in the configuration, in the first timer interrupt process (FIG. 117), the interrupt of the first timer interrupt process (FIG. 117) is prohibited in order to prevent the first timer interrupt process (FIG. 117) from being started in duplicate. On the other hand, the interrupt of the second timer interrupt process (FIG. 123) may not be prohibited.

Further, when both the interrupt triggers of the first timer interrupt process (FIG. 117) and the second timer interrupt process (FIG. 123) occur, the execution of the second timer interrupt process (FIG. 123) is executed by the first timer interrupt process (FIG. 123). Instead of the configuration in which the execution of the first timer interrupt process (FIG. 117) is prioritized over the execution of the second timer interrupt process (FIG. 123), the interrupt trigger may be a configuration in which the execution of the first timer interrupt process (FIG. 117) is prioritized over the execution of the second timer interrupt process (FIG. 123). The configuration may be such that the timer interrupt processing that occurs earlier is started first.

Further, in the situation where the second timer interrupt process (FIG. 123) is being executed, the second timer interrupt process (FIG. 123) is executed instead of the configuration in which the execution of the first timer interrupt process (FIG. 117) is prohibited. Even in this situation, the first timer interrupt process (FIG. 117) may be interrupted and activated. As a result, it is possible to prioritize the execution of the process for advancing the game over the display control of the plurality of display units.

Further, the second timer interrupt process (FIG. 123) is not set, and various processes of the second timer interrupt process (FIG. 123) are the main process (FIG. 114) and the first timer interrupt process (FIG. 117), respectively. It may be a configuration that is executed in a distributed manner. For example, in the setting confirmation process (step S7914) in the main process (FIG. 114), a display indicating that the setting is being confirmed and a display corresponding to the current set value are displayed on the first to fourth notification display devices 201 to 204. It may be configured in which the processing to be performed in is set. Further, in the set value update process (step S7918) in the main process (FIG. 114), a display indicating that the setting is being updated and a display corresponding to the current set value are displayed on the first to fourth notification display devices 201 to 204. It may be configured in which the processing to be performed in is set. Further, in the first timer interrupt process (FIG. 117), the special figure display unit 37a, the special figure hold display unit 37b, the normal figure display unit 38a, the normal figure hold display unit 38b, and the first to fourth notification display devices 201 The configuration may be such that a process for controlling the display of ~ 204 is set.

Further, the second timer interrupt process (FIG. 123) is not limited to a configuration in which only the process for controlling the display of a plurality of display units is executed, and in addition to the process for controlling the display of the plurality of display units. Alternatively, or instead, a process different from the process for controlling the display of a plurality of display units may be executed. For example, a part of the process for advancing the game may be executed by the first timer interrupt process (FIG. 117), and the rest may be executed by the second timer interrupt process (FIG. 123). In this case, the process in which the execution cycle is relatively short is preferably executed by the second timer interrupt process (FIG. 123) in which the interrupt cycle is relatively short, and no problem occurs even if the execution cycle is relatively long. Is preferably executed by the first timer interrupt process (FIG. 117) having a relatively long interrupt cycle. Further, among the processes of steps S8202 to S8221 in the first timer interrupt process (FIG. 117) of the above embodiment, the power failure information storage process (step S8202) is executed in the second timer interrupt process (FIG. 123). The processing other than the above may be executed by the first timer interrupt processing (FIG. 117). In this case, the power failure monitoring can be repeatedly executed in a relatively short cycle. Further, in addition to or instead of the configuration, the fraud detection process (step S8206) is executed by the second timer interrupt process (FIG. 123), and the other processes are executed by the first timer interrupt process (FIG. 117). It may be configured to be. In this case, fraud monitoring can be repeatedly executed in a relatively short cycle.

Further, the number of display circuits 261 to 265 for which display data display settings are set by the display IC 266 is not limited to 5, but may be 2, 3, 4, or 6 or more. May be good. Further, the configuration is not limited to the configuration in which the first to fourth notification display devices 201 to 204 are associated with the fifth display circuit 265, and the first to fourth notification display devices 201 to 204 are used. A display circuit may be provided with a one-to-one correspondence.

<34th embodiment>
In the present embodiment, the processing configuration of the set value update process executed by the main CPU 63 is different from the 33rd embodiment. Hereinafter, a configuration different from the 33rd embodiment will be described. The description of the same configuration as that of the 33rd embodiment is basically omitted. Further, in the present embodiment, the update button 68b is provided on the main control board 61 as in the first embodiment.

FIG. 125 is a flowchart showing a set value update process in the present embodiment executed by the main CPU 63. The processes of steps S8501 to S8508 in the set value update process are executed by using the specific control program and the specific control data in the main CPU 63.

First, "1" is set in the setting update display flag provided in the work area 221 for specific control (step S8501). After that, it is determined whether or not the value of the set value counter provided in the work area 221 for specific control is 1 or more corresponding to "setting 1" and 6 or less corresponding to "setting 6" (step). S8502). When the value of the set value counter is "0" or 7 or more, a negative determination is made in step S8502, and "1" is set in the set value counter (step S8503). As a result, the set value of the pachinko machine 10 becomes "setting 1".

When an affirmative determination is made in step S8502 or when the process of step S8503 is executed, it is determined whether or not the reset button 68c is pressed (step S8504). When the reset button 68c is not pressed (step S8504: NO), the value of the set value counter in the work area 221 for specific control is set on the condition that the update button 68b is pressed (step S8505: YES). Is added by 1 (step S8506). As a result, each time the update button 68b is pressed once, the set value is updated one step higher. Further, when the update button 68b is not pressed (step S8505: NO) or when the value of the set value counter is added by 1, the process returns to the process of step S8502. If it is determined that the value is 7 or more, "1" is set in the set value counter in step S8503. As a result, when the update button 68b is pressed once in the situation of "setting 6", it returns to "setting 1".

When the reset button 68c is pressed (step S8504: YES), the current set value is confirmed and the process proceeds to step S8507. In step S8507, it is determined whether or not the setting key insertion unit 68a is turned off by using the setting key. In this case, it may be configured to determine whether or not the setting key insertion unit 68a has switched from the ON state to the OFF state, or it may be configured to determine whether or not the setting key insertion unit 68a is in the OFF state. If the setting key insertion unit 68a has not been turned off (step S8507: NO), the process of step S8507 is executed again.

When the setting key insertion unit 68a is turned off (step S8507: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S8508).

According to the above configuration, in the configuration in which the set value is updated by pressing the update button 68b, the set value is confirmed by pressing the reset button 68c, and the setting key insertion unit 68a is turned off. As a result, the setting value update process is completed. That is, in order to end the set value update process after updating the set value in the set value update process, it is necessary not only to turn off the setting key insertion unit 68a but also to press the reset button 68c. As a result, it is possible to make it difficult to perform an act of trying to play a game with the set value after illegally updating the set value.

<35th Embodiment>
In the present embodiment, the processing configuration related to the display control of the first to fourth notification display devices 201 to 204 executed by the main CPU 63 is different from that of the 33rd embodiment. Hereinafter, a configuration different from the 33rd embodiment will be described. The description of the same configuration as that of the 33rd embodiment is basically omitted.

FIG. 126 is an explanatory diagram for explaining the electrical configuration of the calculation result storage area 234 provided in the work area 223 for non-specific control.

The calculation result storage area 234 stores information on the base value calculated by the main CPU 63. The base value is relative to the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) in a situation where neither the open / close execution mode nor the high frequency support mode is based on the jackpot result. It is the ratio of the total number of game balls to be paid out.

Regarding the calculation of the base value, in the present embodiment, although the normal counter area 231 is provided in the work area 223 for non-specific control, the counter area 232 for the open / close execution mode and the counter area 233 for the high frequency support mode are provided. Is not provided. Similar to the fifteenth embodiment, the normal counter area 231 includes a normal general winning counter 231a, a normal special electric winning counter 231b, a normal first operating counter 231c, a normal second operating counter 231d, and a normal counter area 231. An out counter 231e for normal use is provided. In a situation where neither the open / close execution mode nor the high frequency support mode is based on the jackpot result, when one game ball enters the general winning opening 31, the value of the general winning counter 231a for normal use is added by 1 and the special electric power is applied. When one game ball enters the winning device 32, the value of the special electric winning counter 231b for normal use is added by 1, and when one game ball enters the first operating port 33, it is used for normal use. The value of the first operation counter 231c of the above is added by 1, and when one game ball enters the second operation port 34, the value of the second operation counter 231d for normal use is added by 1 to the out port 24a. When one game ball enters, the value of the normal out counter 231e is added by 1. Then, when the values of the various counters 231a to 231e of the normal counter area 231 are set to K91 to K95 in a situation where neither the open / close execution mode nor the high frequency support mode is based on the jackpot result, the base values are as follows.
-Base value: Total number of game balls paid out (K91 x "Number of prize balls for winning the general winning opening 31" + K92 x "Number of prize balls for winning the special electric winning device 32" + K93 x "To the first operating port 33" The ratio of the total number of game balls (K91 + K92 + K93 + K94 + K95) discharged from the skill area PA.

The base value is calculated every time the result calculation process (FIG. 130) described later is executed in the management process (step S8920) of the first timer interrupt process (FIG. 133) described later, but the counter area for normal use is calculated. The values of the various counters 231a to 231e of 231 are the situations in which "1" is not set in the management start flag provided in the work area 223 for non-specific control, and the open / close execution mode and the high frequency support mode based on the jackpot result. In a situation that is neither of the above, the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) becomes the management start reference number, and "0" is cleared. The total number of game balls ejected from the game area PA (that is, the game area PA) in a situation where "1" is set in the management start flag and neither the open / close execution mode nor the high frequency support mode is based on the jackpot result. (Total number of game balls supplied to) becomes the shift reference number, and "0" is cleared.

The management start reference number is set to 300, which is less than the shift reference number, as in the fifteenth embodiment. At the shipping stage of the pachinko machine 10, the operation of the pachinko machine 10 may be checked before shipping. At that time, a game ball is maintained at each entry portion and the subsequent operation is checked. The base value under such a situation can be a value different from the situation where a normal game is performed. Therefore, the total number of game balls discharged from the game area PA (that is, the game) in the situation where "1" is not set in the management start flag and is neither the open / close execution mode nor the high frequency support mode based on the jackpot result. When the total number of game balls supplied to the area PA reaches the management start reference number, which is less than the shift reference number, the various counters 231a to 231e of the normal counter area 231 are once cleared to "0". As a result, it is possible to reduce the influence of the operation check on the base value in the situation where the normal game is performed after the pachinko machine 10 is shipped.

The shift reference number is set to 60,000. Since the pachinko machine 10 fires a maximum of 100 game balls per minute, 60,000 is the maximum number of balls fired in 10 hours. In this case, the general business hours in the game hall are about 13 hours, and the time during which the game is played in a situation that is neither the open / close execution mode nor the high-frequency support mode based on the jackpot result is about 10 hours. Therefore, the shift reference number is set assuming the maximum number of game balls to be launched in approximately one business day. By clearing "0" from the various counters 231a to 231e in the normal counter area 231 each time the shift reference number is reached, the base value can be calculated within the shift reference number range.

The calculation result storage area 234 is provided with a current area 311, a first history area 312, a second history area 313, and a third history area 314 as storage areas for storing the information of the base value. There is. All of these various areas 31 to 314 have the same storage capacity, and specifically, the capacity is 1 byte so as to be able to store base value information.

The base value calculated in the latest result calculation process (FIG. 130) is stored in the current area 311. That is, the latest base value is stored in the current area 311.

The final base value in the previous calculation period is stored in the first history area 312. In this case, if the previous calculation period is after the management start flag is set to "1", the first history area 312 is set to the open / close execution mode based on the jackpot result in the previous calculation period. And the base value at the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) becomes the shift reference number in a situation other than the high frequency support mode. It is stored. If "1" is set in the management start flag after the previous calculation period has elapsed, the first history area 312 has an open / close execution mode based on the jackpot result in the previous calculation period. The base value at the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) becomes the management start reference number in a situation other than the high frequency support mode is It is stored.

The final base value in the calculation period two times before is stored in the second history area 313. In this case, if the calculation period two times before is after the management start flag is set to "1", the second history area 313 has an open / close execution mode based on the jackpot result in the calculation period two times before. And the base value at the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) becomes the shift reference number in a situation other than the high frequency support mode. It is stored. If "1" is set in the management start flag after the calculation period two times before has passed, the second history area 313 has an open / close execution mode based on the jackpot result in the calculation period two times before. The base value at the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) becomes the management start reference number in a situation other than the high frequency support mode is It is stored.

The final base value in the calculation period three times before is stored in the third history area 314. In this case, if the calculation period three times before is set after the management start flag is set to "1", the third history area 314 is set to the open / close execution mode based on the jackpot result in the calculation period three times before. And the base value at the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) becomes the shift reference number in a situation other than the high frequency support mode. It is stored. If "1" is set in the management start flag after the calculation period three times before has passed, the third history area 314 has an open / close execution mode based on the jackpot result in the calculation period three times before. The base value at the timing when the total number of game balls discharged from the game area PA (that is, the total number of game balls supplied to the game area PA) becomes the management start reference number in a situation other than the high frequency support mode is It is stored.

The base values stored in the current area 311, the first history area 312, the second history area 313, and the third history area 314 are sequentially notified by the first to fourth notification display devices 201 to 204. Specifically, each time the display continuation period (specifically, 5 seconds) elapses, the current area 311 → the first history area 312 → the second history area 313 → the third history area 314, in a predetermined order. The base value to be notified is switched, and the base value to be notified is repeatedly switched in the predetermined order.

127 (a) to 127 (d) are for the first to fourth notifications when the base values stored in the various areas 31 to 314 are notified in the situation where "1" is set in the management start flag. It is explanatory drawing for demonstrating the display content of the display devices 2001-204. FIG. 127 (a) shows an example of the display contents of the first to fourth notification display devices 201 to 204 when the base value stored in the current area 311 is notified, and FIG. 127 (b) shows the first history. An example of the display contents of the first to fourth notification display devices 201 to 204 when the base value stored in the area 312 is notified is shown, and FIG. 127 (c) shows the base stored in the second history area 313. An example of the display contents of the first to fourth notification display devices 201 to 204 when the value is notified is shown, and FIG. 127 (d) shows the case where the base value stored in the third history area 314 is notified. An example of the display contents of the first to fourth notification display devices 201 to 204 is shown.

As shown in FIGS. 127 (a) to 127 (d), each of the first to fourth notification display devices 201 to 204 has eight display segments 321 to 324. Of the eight display segments 321 to 324, seven display segments 321 to 324 are rod-shaped light emitting regions having the same shape and size, and are arranged so as to generate the character "8". Has been done. On the other hand, one display segment 321 to 324 is a circular light emitting region, and is located at the lower right position with respect to the seven display segments 321 to 324 arranged in a "8" shape. It is provided. Regardless of which base value of the various areas 31 to 314 is notified, at least one display segment 321 to 324 is in the light emitting state in each of the first to fourth notification display devices 201 to 204.

In the first notification display device 201, a display indicating that the base value is being notified is displayed in the first to fourth notification display devices 201 to 204. Specifically, the character "b" is displayed on the first notification display device 201 regardless of which base value of the various areas 31 to 314 is notified. When information other than the base value is notified by the first to fourth notification display devices 201 to 204, the character "b" is not displayed on the first notification display device 201. As a result, by confirming that the character "b" is displayed on the first notification display device 201, the manager of the game hall bases on the first to fourth notification display devices 201 to 204. It becomes possible to grasp that the value is notified.

In the second notification display device 202, a display indicating which of the various areas 31 to 314 the base value is being notified is displayed. Specifically, in the situation where the base value of the current area 311 is notified, the character "L." is displayed on the second notification display device 202 as shown in FIG. 127 (a). In the situation where the base value of the first history area 312 is notified, the character "1." is displayed on the second notification display device 202 as shown in FIG. 127 (b). In the situation where the base value of the second history area 313 is notified, the character "2." is displayed on the second notification display device 202 as shown in FIG. 127 (c). In the situation where the base value of the third history area 314 is notified, the character "3." is displayed on the second notification display device 202 as shown in FIG. 127 (d). As a result, by confirming the characters displayed on the second notification display device 202, the manager of the game hall can determine the base value notified on the first to fourth notification display devices 201 to 204. It is possible to grasp whether it is in the calculation period of.

In the second notification display device 202, the circular display segments 321 to 324 are in the light emitting state regardless of the situation in which the base value of any of the various areas 31 to 314 is being notified. As will be described later, in the third notification display device 203 and the fourth notification display device 204, any number from "0" to "9" is displayed as a display corresponding to the base value. In this case, when any number of "1" to "3" is displayed on the second notification display device 202, three numbers are displayed on the second to fourth notification display devices 202 to 204. It will be lined up and it will be difficult to grasp the base value. On the other hand, when the circular display segments 321 to 324 provided at the lower right of the second notification display device 202 are in the light emitting state, the second notification display device 202 has "1" to "1" to ". Even if any of the numbers of "3" is displayed, the numbers displayed on the second notification display device 202 and the numbers displayed on the third notification display device 203 and the fourth notification display device 204 are displayed. It is possible to distinguish and grasp the numbers.

On the third notification display device 203 and the fourth notification display device 204, the number of the base value to be notified is displayed. The base value will be calculated as a small number up to the second decimal place, but the number with the first decimal place among the base values is displayed on the third notification display device 203, and the decimal point among the base values is displayed. The second digit is displayed on the fourth notification display device 204. Here, when the base value is "1.00", the number "0" is displayed on each of the third notification display device 203 and the fourth notification display device 204. On the other hand, when the base value is not yet stored in the areas 311 to 314 which are the notification targets, the third notification display device 203 and the fourth notification display are shown in the explanatory diagram of FIG. 128 (a). The character "-" is displayed on each of the devices 204. As a result, even when the two display devices of the third notification display device 203 and the fourth notification display device 204 notify the base value calculated as a minority to the second decimal place, the base value It is possible to distinguish the display content between the case where is "1.00" and the case where the base value is not yet stored in the areas 311 to 314 which are the notification targets.

The display contents of the combination of the third notification display device 203 and the fourth notification display device 204 are the same when the base value is "1.00" and when the base value is "0.00". On the other hand, in order to distinguish between the two, one of the former and the latter may be configured such that the light emitting state of the display of "00" is maintained and the display of "00" is in the blinking state of the other.

Next, in a situation where "1" is set in the management start flag while referring to the time chart of FIG. 129, the base values of various areas 31 to 314 are notified by the first to fourth notification display devices 201 to 204. I will explain how it is done. FIG. 129 (a) shows a period during which the base value stored in the current area 311 is notified by the first to fourth notification display devices 201 to 209, and FIG. 129 (b) is stored in the first history area 312. The period during which the base value is notified by the first to fourth notification display devices 201 to 209 is shown, and FIG. 129 (c) shows the first to fourth notifications of the base value stored in the second history area 313. The period of notification by the display devices 201 to 209 is shown, and FIG. 129 (d) shows the base value stored in the third history area 314 being notified by the first to fourth display devices 201 to 209. The period is shown, and FIG. 129 (e) shows the total number of game balls discharged from the game area PA in a situation where neither the open / close execution mode nor the high frequency support mode is performed based on the jackpot result after the base value calculation period is newly started. The period until the number (that is, the total number of game balls supplied to the game area PA) reaches the initial reference number (specifically, 6000) is shown.

At the timing of t1, as shown in FIG. 129 (a), the notification of the base value stored in the current area 311 is started by the first to fourth notification display devices 201 to 204. At the time of this notification, as shown in FIG. 127 (a), the first notification display device 201 displays that the base value is the notification target, and the second notification display device 202 stores it in the current area 311. A display indicating that the base value is the notification target is performed, and the display corresponding to the base value stored in the current area 311 is displayed on the third notification display device 203 and the fourth notification display device 204.

Here, as shown in FIG. 129 (e), the initial operation display is performed from the timing of t1 to the timing of t2. Specifically, the total number of game balls discharged from the game area PA in a situation where neither the open / close execution mode or the high-frequency support mode based on the jackpot result is performed after the base value calculation period is newly started (that is, the game area). During the period until the total number of game balls supplied to the PA reaches the initial reference number (specifically, 6000), the display target is displayed on the first notification display device 201 and the second notification display device 202. Instead of continuing to light the characters, the characters to be displayed are blinking and displayed as the initial operation display. Immediately after the calculation period is started, there is little information on the game history for calculating the base value, so that the measured value of the base value may be a value that greatly deviates from the theoretical value range of the base value. On the other hand, by displaying the initial calculation immediately after the calculation period is started in this way, it is possible to make the manager of the game hall recognize that the calculation period is immediately after the start. ..

Further, in the third notification display device 203 and the fourth notification display device 204 in which the number corresponding to the base value is displayed in the initial calculation display, the number is continuously lit, whereas the first notification display device The characters to be displayed are blinking and displayed on the 201 and the second notification display device 202. This makes it possible to notify that the calculation period has just started, while not reducing the visibility of the base value. It should be noted that the present invention is not limited to this, and even in the initial calculation display, a blinking display may be performed on at least one of the third notification display device 203 and the fourth notification display device 204, and blinking may be performed in both of them. The display may be performed, or the blinking display may be performed only on one of the first notification display device 201 and the second notification display device 202.

At the timing of t2, the total number of game balls discharged from the game area PA in a situation where neither the open / close execution mode based on the jackpot result nor the high frequency support mode is performed from the timing of t1 (that is, the game balls supplied to the game area PA). When the total number) reaches the initial reference number (specifically, 6000), the initial operation display is completed as shown in FIG. 129 (e). As a result, the lighting display is started not only on the third notification display device 203 and the fourth notification display device 204 but also on the first notification display device 201 and the second notification display device 202.

After that, when the display continuation period elapses from the timing of t1 at the timing of t3, the notification of the base value stored in the current area 311 is completed as shown in FIG. As shown, the notification of the base value stored in the first history area 312 is started. In this case, since the base value stored in the first history area 312 is the final calculation result of the base value in the previous calculation period, the initial calculation display is not performed.

After that, when the display continuation period elapses from the timing of t3 at the timing of t4, the notification of the base value stored in the first history area 312 is completed as shown in FIG. 129 (b), and the notification of the base value is completed, and FIG. 129 (c) ), The notification of the base value stored in the second history area 313 is started. In this case, since the base value stored in the second history area 313 is the final calculation result of the base value in the calculation period two times before, the initial calculation display is not performed.

After that, when the display continuation period elapses from the timing of t4 at the timing of t5, the notification of the base value stored in the second history area 313 is completed as shown in FIG. 129 (c), and the notification of the base value is completed, and FIG. 129 (d). ), The notification of the base value stored in the third history area 314 is started. In this case, since the base value stored in the third history area 314 is the final calculation result of the base value in the calculation period three times before, the initial calculation display is not performed.

After that, when the display continuation period elapses from the timing of t5 at the timing of t6, the notification of the base value stored in the third history area 314 is completed as shown in FIG. 129 (d), and the notification of the base value is completed, and FIG. ), The notification of the base value stored in the current area 311 is started. In this case, the total number of game balls discharged from the game area PA (that is, in the game area PA) in a situation where neither the open / close execution mode nor the high frequency support mode based on the jackpot result is performed after the calculation period of the base value is newly started. In order to notify that the total number of supplied game balls) reaches the initial reference number (specifically, 6000), FIG. 129 (e) extends from the timing of t6 to the timing of t7. The initial operation display is performed as shown in.

After that, when the display continuation period elapses from the timing of t6 at the timing of t8, the notification of the base value stored in the current area 311 is completed as shown in FIG. As shown, the notification of the base value stored in the first history area 312 is started. In this case, since the base value stored in the first history area 312 is the final calculation result of the base value in the previous calculation period, the initial calculation display is not performed.

Next, a processing configuration for enabling the above-mentioned notification of the base value will be described.

The management process (step S8920) in the first timer interrupt process (FIG. 133), which will be described later, is a process corresponding to the non-specific control in step S3803 as in the management process (FIG. 70) in the fifteenth embodiment. Read the management execution processing program. Then, in this management execution process (FIG. 71), the check process is executed in step S3908 in the same manner as in the fifteenth embodiment.

In the check process, when one game ball is specified to enter the general winning opening 31 in a situation where neither the opening / closing execution mode nor the high frequency support mode is based on the jackpot result, the general winning counter 231a for normal use is used. When the value is added by 1 and the entry of one game ball into the special electric winning device 32 is specified, the value of the special electric winning counter 231b for normal use is added by 1 and one to the first operating port 33. When the entry of a game ball is specified, the value of the first operation counter 231c for normal use is added by 1, and when the entry of one game ball into the second operation port 34 is specified, the value for normal use is used. The value of the second operation counter 231d is added by 1, and when the entry of one game ball into the out port 24a is specified, the value of the normal out counter 231e is added by 1. Further, in the check process, the result calculation process and the display process are executed.

FIG. 130 is a flowchart showing the result calculation process. The processing of steps S8601 to S8615 in the result calculation processing is executed by using the program for non-specific control and the data for non-specific control in the main CPU 63.

First, the calculation process of the base value is executed (step S8601). In the calculation process, the base value is calculated by using the values of various counters 231a to 231e in the normal counter area 231. The calculation method of the base value is as described above. Then, the calculated base value is overwritten in the current area 311 (step S8602).

After that, it is determined whether or not "1" is set in the management start flag provided in the work area 223 for non-specific control (step S8603). The management start flag has a value of "0" when the supply of operating power to the pachinko machine 10 is started for the first time after the pachinko machine 10 is manufactured. Further, even when the work area 223 for non-specific control is cleared to "0" including the management start flag and initialized, the value of the management start flag becomes "0". In the situation where the management start flag is a value of "0" and neither the open / close execution mode nor the high frequency support mode is performed depending on the jackpot result, the total number of game balls discharged from the game area PA (that is, in the game area PA). When the total number of supplied game balls) becomes the management start reference number, "1" is set in the management start flag. When the management start flag is set to "1", the values of the various counters 231a to 231e in the normal counter area 231 are cleared to "0", and a new calculation period is started. As a result, the influence of the operation check at the shipping stage of the pachinko machine 10 can be made less likely to affect the base value in the situation where the normal game is performed after the pachinko machine 10 is shipped.

When a negative determination is made in step S8603, the total number is calculated by summing all the values of the various counters 231a to 231e in the normal counter area 231 (step S8604). Then, it is determined whether or not the calculated total number is larger than the management start reference number of 300 (step S8605).

If an affirmative determination is made in step S8605, the management start flag is set to "1" (step S8606). After that, the data shift process is executed (step S8607). In the data shift process, the information stored in the current area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 is transferred from the second history area 313 to the third history area 314. , 1st history area 312 → 2nd history area 313, current area 311 → 1st history area 312. As a result, the final base value in the calculation period two times before is stored in the third history area 314 as the final base value in the calculation period three times before, and the final base value in the calculation period one time before is stored. Is stored in the second history area 313 as the final base value in the calculation period two times before, and the base value last calculated in the current calculation period is the final base value in the calculation period one time before. 1 It is stored in the history area 312. In the data shift process, the LDIR instruction is used when shifting the information as described above. In the LDIR command, by specifying the address of the information storage source area and the address of the information storage destination area, the information stored in the storage source area is shifted (copied) to the storage destination area. It becomes.

However, in the situation where "1" is not set in the management start flag, the base value information is basically not stored in the first to third history areas 312 to 314, so that the management is substantially managed in step S8607. Only the shift of the final base value of the calculation period to the first history area 312 in the situation where "1" is not set in the start flag is performed. After that, all the counters 231a to 231e in the normal counter area 231 are cleared to "0" (step S8608).

When an affirmative determination is made in step S8603, the total number is calculated by summing all the values of the various counters 231a to 231e in the normal counter area 231 (step S8609). Then, it is determined whether or not the calculated total number is larger than the initial reference number of 6000 (step S8610). When a negative judgment is made in step S8610, "1" is set in the operation initial flag provided in the work area 223 for non-specific control (step S8611), and when a positive judgment is made in step S8610, the relevant calculation is made. The operation initial flag is cleared to "0" (step S8612). The calculation initial flag is the total number of game balls ejected from the game area PA in a situation where neither the open / close execution mode nor the high frequency support mode is based on the jackpot result after the calculation period of the base value is newly started (that is, the game area). This is a flag for the main CPU 63 to specify whether or not the total number of game balls supplied to the PA has reached the initial reference number.

When the process of step S8611 or step S8612 is executed, it is determined whether or not the total number calculated in step S8609 is 60,000 or more, which is the shift reference number (step S8613). If an affirmative determination is made in step S8613, the data shift process is executed (step S8614). In the data shift process, the information stored in the current area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 is transferred from the second history area 313 to the third history area 314 in the same manner as in step S8607. 3 The history area 314, the first history area 312 → the second history area 313, the current area 311 → the first history area 312 are shifted in this order. As a result, the final base value in the calculation period two times before is stored in the third history area 314 as the final base value in the calculation period three times before, and the final base value in the calculation period one time before is stored. Is stored in the second history area 313 as the final base value in the calculation period two times before, and the base value last calculated in the current calculation period is the final base value in the calculation period one time before. 1 It is stored in the history area 312. In the data shift process, the LDIR instruction is used when shifting the information as described above. In the LDIR command, by specifying the address of the information storage source area and the address of the information storage destination area, the information stored in the storage source area is shifted (copied) to the storage destination area. It becomes. After that, all the counters 231a to 231e in the normal counter area 231 are cleared to "0" (step S8615).

FIG. 131 is a flowchart showing a display process. The processes of steps S8701 to S8714 in the display process are executed by using the program for non-specific control and the data for non-specific control in the main CPU 63.

First, it is determined whether or not "1" is set in the management start flag provided in the work area 223 for non-specific control (step S8701). When an affirmative determination is made in step S8701, the value of the switching timing counter provided in the work area 223 for non-specific control is subtracted by 1 (step S8702). The switching timing counter displays the first to fourth notifications among the base values stored in the current area 311, the first history area 312, the second history area 313, and the third history area 314 of the calculation result storage area 234. This is a counter for the main CPU 63 to specify that it is the timing to switch the base value to be notified in the devices 201 to 204. As already explained, every time the display continuation period (specifically, 5 seconds) elapses, the current area 311 → the first history area 312 → the second history area 313 → the third history area 314 is notified in a predetermined order. The target base value is switched, and the switching of the target base value to be notified is repeated in the predetermined order.

When the process of step S8702 is executed, the base value currently being notified becomes the notification target by determining whether or not the value of the switching timing counter after 1 subtraction is "0". From (step S8703), it is determined whether or not the display continuation period has elapsed. When an affirmative determination is made in step S8703, the value of the display target counter provided in the work area 223 for non-specific control is added by 1 (step S8704). Then, when the value of the display target counter after 1 addition exceeds the maximum value "3" (step S8705: YES), the value of the display target counter is cleared to "0" (step S8706).

The display target counter is a display for the first to fourth notifications among the base values stored in the current area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234. This is a counter for the main CPU 63 to specify the base value to be notified in the devices 201 to 204. Specifically, when the value of the display target counter is "0", the base value stored in the current area 311 becomes the notification target, and when the value of the display target counter is "1", the first history area The base value stored in 312 is the notification target, and when the value of the display target counter is "2", the base value stored in the second history area 313 is the notification target, and the value of the display target counter is "3". , The base value stored in the third history area 314 is the notification target.

When a negative determination is made in step S8705 or when the process of step S8706 is executed, the switching timing counter of the work area 223 for non-specific control is displayed as a value corresponding to the switching timing of the next notification target (specifically). The value corresponding to (5 seconds) is set (step S8707).

When a negative determination is made in step S8703 or when the process of step S8707 is executed, the display target setting area 276 provided in the work area 223 for non-specific control corresponds to the base value to be notified this time. Execute the process for setting the display data to be displayed. Specifically, first, the display type data corresponding to the value of the display target counter is set in the display target setting area 276 (step S8708). The display type data includes display data for causing the first notification display device 201 to display that the notification target of the first to fourth notification display devices 201 to 204 is a base value, and a base of the notification target. A display indicating which of the current area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234 corresponds to is displayed on the second notification display device 202. Includes display data to be performed.

After that, the base value is read from the area corresponding to the value of the display target counter among the current area 311, the first history area 312, the second history area 313, and the third history area 314 in the calculation result storage area 234, and the read base is read. The calculation result data corresponding to the number having the first decimal point and the number having the second decimal point in the value is set in the display target setting area 276 (step S8709). The calculation result data includes display data for causing the third notification display device 203 to display the number corresponding to the first decimal place in the base value of the notification target, and the second decimal place number in the base value of the notification target. Includes display data for causing the fourth notification display device 204 to display the corresponding display.

As described above, the display data including the display type data and the calculation result data is set in the display target setting area 276. By transmitting the display data to the display IC 266 in the second timer interrupt process (FIG. 134) described later, the display corresponding to the display data is performed on the first to fourth notification display devices 201 to 204. ..

Further, the process of step S8709 is executed every time the display process (FIG. 131) is executed regardless of the switching timing of the base value to be notified. As described above, each time the calculation result storage process (FIG. 130) is executed, a base value is calculated using the current values in the counters 231a to 231e of the normal counter area 231, and the calculated base value is calculated. It is stored in the current area 311 of the calculation result storage area 234. In this case, every time the process of step S8709 for setting the calculation result data in the display target setting area 276 is executed regardless of the switching timing of the base value of the notification target (FIG. 131) as described above. In the situation where the base value of the current area 311 is the notification target, if the base value is changed, the changed base value can be notified.

After that, it is determined whether or not the base value of the current area 311 is the notification target based on the value of the display target counter (step S8710), and the calculation initial flag provided in the work area 223 for non-specific control is set to ". It is determined whether or not "1" is set (step S8711). As already explained, the calculation initial flag is the total number of game balls discharged from the game area PA in a situation where neither the open / close execution mode nor the high frequency support mode based on the jackpot result is performed after the calculation period of the base value is newly started. This is a flag for the main CPU 63 to specify whether or not (that is, the total number of game balls supplied to the game area PA) has reached the initial reference number. When an affirmative judgment is made in both step S8710 and step S8711, "1" is set in the initial display flag provided in the work area 223 for non-specific control (step S8712), and either step S8710 or step S8711. When a negative determination is made in, the initial display flag is cleared to "0" (step S8713).

The initial display flag is the first notification display device 201 in order to notify that the base value of the current area 311 is the base value at the initial stage of calculation after the start of the calculation period in the situation where the base value is the notification target. This is a flag for the main CPU 63 to specify that the second notification display device 202 should be blinked and displayed. When it is specified that "1" is set in the initial display flag in the second timer interrupt process (FIG. 134) described later, simply transmitting the display data stored in the display target setting area 276 to the display IC 266 is sufficient. When the display corresponding to the display data is performed by the first to fourth notification display devices 201 to 204, the first notification display device 201 and the second notification display device 202 are blinked and the third display is displayed. The notification display device 203 and the fourth notification display device 204 are turned on and displayed. When it is specified that "1" is not set in the initial display flag in the second timer interrupt process (FIG. 134) described later, the display corresponding to the display data stored in the display target setting area 276 is displayed. When the first to fourth notification display devices 201 to 204 are used, all of the first to fourth notification display devices 201 to 204 are lit and displayed.

On the other hand, if "1" is not set in the management start flag provided in the work area 223 for non-specific control and a negative determination is made in step S8701, the current area 311 is used regardless of the value of the display target counter. The base value is read, and the calculation result data corresponding to the number having the first decimal place and the number having the second decimal place in the read base value is set in the display target setting area 276 (step S8714). By transmitting the display data corresponding to the calculation result data to the display IC 266, the number having the first decimal place in the base value of the current area 311 is displayed on the third notification display device 203, and the base value of the current area 311 is displayed. The number having the second decimal place in the value is displayed on the fourth notification display device 204. With the above configuration, in the situation where "1" is not set in the management start flag, the base value in the past calculation period is not notified, and only the base value calculated in the current calculation period is notified. Will be done.

In the situation where "1" is not set in the management start flag, the calculation result data is set in the display target setting area 276, but the display type data is not set. Details will be described later, but when the base value is notified in a situation where "1" is not set in the management start flag, the display contents of the first notification display device 201 and the second notification display device 202 are managed. The display content is different from the case where the base value is notified in the situation where "1" is set in the start flag.

Next, the main process in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG. 132. The processes of steps S8801 to S8825 in the main process are executed by using the program for specific control and the data for specific control in the main CPU 63.

First, the power-on initial setting process is executed (step S8801). In the power-on initial setting process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. The operation start and initial setting of the symbol display device 41 are completed in the predetermined period for the weight. It also allows access to the main RAM 65.

After that, the internal function register setting process is executed (step S8802). In the internal function register setting process, the interrupt cycle of the first timer interrupt process (FIG. 133), which is a process that is started by interrupting the main process periodically, is set to the first interrupt cycle (specifically, 4 milliseconds). The interrupt cycle of the second timer interrupt process (FIG. 134), which is a process that is periodically interrupted and started with respect to the main process, is set to the second interrupt cycle, which is shorter than the first interrupt cycle. Set to (specifically, 2 milliseconds).

That is, in the present embodiment, similarly to the 33rd embodiment, the first timer interrupt process and the second timer interrupt process exist as the timer interrupt process so that the interrupt cycle is relatively long and short. Both the first timer interrupt process and the second timer interrupt process are started by interrupting the main process. Further, the second timer interrupt process is started by interrupting the first timer interrupt process. On the other hand, the first timer interrupt process is not started by interrupting the second timer interrupt process. If both the first interrupt cycle and the second interrupt cycle have elapsed in a situation where both the first timer interrupt process and the second timer interrupt process are not executed, the second interrupt cycle is irrespective of the elapsed order of those cycles. It is started first from the timer interrupt processing. In this respect, it can be said that the second timer interrupt process is a process that is started with priority over the first timer interrupt process. However, the present invention is not limited to this, and the first timer interrupt process may be started with priority over the second timer interrupt process.

In the internal function register setting process, the first interrupt cycle of the first timer interrupt process is set to a predetermined register of the main CPU 63, and the second interrupt cycle of the second timer interrupt process is set to a specific register of the main CPU 63. do. Further, in the internal function register setting process, in addition to the setting of the first and second interrupt cycles, the setting process of the numerical range of various counters such as the numerical range of the hit random number counter C1 is executed.

After that, "1" is set in the start-up processing flag provided in the work area 221 for specific control (step S8803). Even if the first timer interrupt process is started, the start-up process flag executes the process for monitoring power failure, updating various counters, and monitoring fraud among the various processes set in the first timer interrupt process. On the other hand, it is a flag for the main CPU 63 to specify that the first timer interrupt process should be terminated without executing the process for advancing the game.

FIG. 133 is a flowchart showing the first timer interrupt process in the present embodiment executed by the main CPU 63. As described above, the first timer interrupt process is periodically started at a cycle of 4 milliseconds, which is the first interrupt cycle. Further, the program corresponding to the first timer interrupt processing is set as the program for specific control.

In steps S8901 to S8905, the same processing as in steps S301 to S305 of the timer interrupt processing (FIG. 11) in the first embodiment is executed. That is, the power failure monitoring is executed by executing the power failure information storage process in step S8901. Specifically, similarly to the power failure information storage process (FIG. 101) in the thirtieth embodiment, it is monitored whether or not a power failure signal corresponding to the occurrence of power interruption is received from the power failure monitoring board 67, and a power failure occurs. If the occurrence of is specified, an infinite loop will occur after the power failure processing is executed. In the power failure processing, "1" is set in the power failure flag provided in the work area 221 for specific control, a checksum is calculated, and the calculated checksum is stored in the work area 221 for specific control. Further, by executing the lottery random number update process in step S8902, each numerical information of the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the general electric accessory opening counter C4 is updated, and in step S8903. The numerical information of the random number initial value counter CINI is updated by executing the random number initial value update process, and the numerical information of the variation type counter CS is updated by executing the variation counter update process in step S8904. Further, by executing the fraud detection process in step S8905, it is monitored whether or not an event set as a monitoring target for fraud has occurred. In the fraud detection process, the occurrence of a plurality of types of events is monitored, and by confirming that one of these multiple types of events has occurred, the game is stopped provided in the work area 221 for specific control. Set the flag to "1".

After executing the processes of steps S8901 to S8905, it is determined whether or not "1" is set in any of the game stop flag and the start-up processing flag provided in the work area 221 for specific control. (Step S8906). When "1" is not set in either the game stop flag or the start-up processing flag (step S8906: NO), the processes of steps S8907 to S8920 are executed. In steps S8907 to S8919, the same processing as in steps S8208 to S8222 of the first timer interrupt processing (FIG. 117) in the 33rd embodiment is executed. Further, in step S8920, the management process is executed in the same manner as in step S8221 of the first timer interrupt process (FIG. 117) in the 33rd embodiment, but the content of the check process of the management execution process called in the management process. Has already been explained. In the check process, the update processes of the counters 231a to 231e of the normal counter area 231 are executed, and the result calculation process (FIG. 130) and the display process (FIG. 131) are executed.

On the other hand, when "1" is set in at least one of the game stop flag and the start-up processing flag (step S8906: YES), the first timer interrupt process is performed without executing the processes of steps S8907 to S8920. finish. That is, not only in the situation where the game stop flag is set to "1" but also when the start-up processing flag is set to "1", the processing of steps S8901 to S8905 is performed in the first timer interrupt processing. On the other hand, the processes of steps S8907 to S8920 are not executed.

As for the start-up processing flag, the processing at the start of supplying the operating power (steps S8801 to S8819) is started in the main processing (FIG. 132) in the same manner as in the 33rd embodiment, and the interrupt permission (step S8805) is granted. "1" is set before the operation, and "0" is cleared before the processing at the start of supply of the operating power is completed and the residual processing (steps S8822 to S8825) is started. In this case, as described above, in the first timer interrupt processing, when the start-up processing flag is set to "1", the processing of steps S8907 to S8920 is not executed, so that the operating power is supplied. It is possible to prevent the process for advancing the game from being executed in the situation where the process at the start (steps S8801 to S8819) is being executed. On the other hand, as described above, in the first timer interrupt processing, even when the start-up processing flag is set to "1", the processing of steps S8901 to S8905 is executed to start supplying the operating power. (Steps S8801 to S8819), the power failure monitoring is executed, and the hit random number counter C1, the jackpot type counter C2, the reach random number counter C3, and the random number initial value counter CINI are updated. It is executed, and fraud detection is executed.

In particular, even when the start-up processing flag is set to "1", the power failure information storage process (step S8901) is executed, so that the process at the start of supply of operating power (steps S8801 to S8819). ) Is being executed, even if a power failure occurs, it is possible to execute the power failure processing for the power failure. In the power failure processing, as already explained, the power failure flag provided in the work area 221 for specific control is set to "1", the checksum is calculated, and the calculated checksum is set in the work area 221 for specific control. Therefore, when the supply of the operating power is restarted, it is possible to prevent the main RAM 65 from being identified as an abnormal occurrence. As a result, even if a power failure occurs during the setting value update process (step S8819), the setting value selected at that time can be stored and retained as the setting value of the current pachinko machine 10. .. Therefore, even if a power failure occurs during the execution of the set value update process, it is not necessary to re-execute the set value update process when the supply of operating power is restarted.

By the way, in the situation where the set value update process is being executed, the interrupt is not prohibited in either the first timer interrupt process (FIG. 133) or the second timer interrupt process (FIG. 134), and the interrupt is interrupted at an arbitrary timing. It is possible. In this case, if the first timer interrupt process (FIG. 133) or the second timer interrupt process (FIG. 134) is interrupted and started in the main process (FIG. 132) including the set value update process, the activation target is set. The information of the return address of the main process (FIG. 132) for returning after the timer interrupt process is completed is saved in the stack area 222 for specific control, and the main side immediately before the timer interrupt process is started. Information on various registers of the CPU 63 is saved in the stack area 222 for specific control. Then, when the timer interrupt processing that is the target of activation is completed, the processing of the main processing (FIG. 132) corresponding to the information of the return address saved in the stack area 222 for specific control is restored, and the processing is restored. The information saved in the stack area 222 for specific control is returned to various registers of the main CPU 63.

Returning to the explanation of the main process (FIG. 132), after setting the start-up processing flag to "1" in step S8803, the initial check period (specifically) is set in the checking counter provided in the work area 221 for specific control. The value corresponding to (5 seconds) is set (step S8804). In the present embodiment, when the supply of the operating power to the main CPU 63 is started, can each display segment 321 to 324 provided in the first to fourth notification display devices 201 to 204 be normally in the light emitting state? In order to have the manager of the game hall confirm whether or not, the check display is performed on the first to fourth notification display devices 201 to 204 from the start of the process of step S8804 until the initial check period elapses. .. Specifically, as the check display, as shown in the explanatory diagram of FIG. 128 (b), all the display segments 321 to 324 of the first to fourth notification display devices 201 to 204 are maintained in the light emitting state. .. In step S8804, the information corresponding to this initial check period is set in the checking counter.

The initial check period is required until the process for controlling the progress of the game is started when none of the processes of step S8811, step S8812, step S8815 and step S8819, which will be described later, is executed in the main process. It is set to a longer time than the maximum time. Therefore, the game may be started in a situation where the check display is performed on the first to fourth notification display devices 201 to 204.

After that, the interrupt permission is set (step S8805). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. However, since "1" is set in the start-up processing flag in step S8803, even if the first timer interrupt processing is started, power failure monitoring and various counters among the various processes of the first timer interrupt processing are performed. While the process for updating and monitoring fraud is executed, the first timer interrupt process is terminated without executing the process for advancing the game.

After that, in steps S8806 to S8825, the same processing as in steps S7905-step S7924 of the main processing (FIG. 114) in the 33rd embodiment is executed. Specifically, it is determined in step S8806 whether or not the reset button 68c is pressed. That is, it is determined whether or not the power ON operation of the pachinko machine 10 is performed while the reset button 68c is being pressed to start supplying the operating power to the MPU 62. Here, in the present embodiment, as in the 33rd embodiment, the main control device 60 is provided with the setting key insertion unit 68a and the reset button 68c, but is not provided with the update button 68b. Further, the main control device 60 is provided with the first to fourth notification display devices 201 to 204 as in the eleventh embodiment, instead of the first to third notification display devices 69a to 69c.

When the reset button 68c is not pressed (step S8806: NO), it is determined whether or not "1" is set in the power failure flag provided in the work area 221 for specific control (step S8807). When the power failure processing is executed in the power failure information storage process (step S8901) of the first timer interrupt process (FIG. 133), the power failure flag is set to "1". The power failure flag is a flag for the main CPU 63 to specify whether or not the power failure processing was properly performed when the power was cut off last time.

When "1" is set in the power failure flag (step S8807: YES), a checksum is calculated for the work area 221 for specific control and the stack area 222 for specific control (step S8808). The checksum calculation method is the same as that of the 33rd embodiment. After that, the work area 221 for specific control and the stack area for specific control calculated in the power failure processing executed immediately before the supply of operating power to the MPU 62 is stopped and stored in the work area 221 for specific control The checksum for 222 is read from the work area 221 for specific control, and the read checksum is compared with the checksum calculated in step S8808 (step S8809). Then, it is determined whether or not the checksums match (step S8810).

If a negative determination is made in step S8807 or step S8810, that is, if "1" is not set in the power failure flag or the checksums do not match, the game stop flag provided in the work area 221 for specific control is provided. Is set to "1" (step S8811). When the game stop flag is set to "1", the processes of steps S8901 to S8905 are executed in the first timer interrupt process (FIG. 133), while the affirmative determination is made in step S8906 to perform steps S8907 to step S8907. The process of S8920 is not executed. As a result, if the power failure flag is not set to "1" because the power failure processing was not performed properly at the time of the previous power failure, or the work area 221 for specific control and the stack area 222 for specific control If the checksums do not match due to the change in the information storage state since the last power off for at least one of the above, the process for power failure monitoring, updating various counters, and unauthorized monitoring is executed. On the other hand, the process for advancing the game is not executed.

After that, an abnormality command indicating that an abnormality has occurred regarding the power failure flag or the checksum at the start of supplying the operating power is transmitted to the voice emission control device 81 (step S8812). Upon receiving the abnormal command, the voice emission control device 81 causes the display light emission unit 53 to emit light in a manner corresponding to the information abnormality at the start of supply of the operating power, and the speaker unit 54 "change the setting." Is output. In addition, the character image "Please change the setting" is displayed on the symbol display device 41. These notifications are maintained until the supply of the operating power to the pachinko machine 10 is stopped, and are terminated when the supply of the operating power to the pachinko machine 10 is stopped. However, even if the supply of the operating power to the pachinko machine 10 is temporarily stopped, the above notification is sent when the supply of the operating power to the pachinko machine 10 is resumed until the set value update process (step S8819) is executed. It may be a continuous configuration.

When "1" is set in the power failure flag and the checksum is normal (step S8807 and step S8810: YES), it is determined whether or not the setting key insertion unit 68a is turned on by using the setting key. (Step S8813), it is determined whether or not the front door frame 14 is open with respect to the inner frame 13 and the gaming machine main body 12 is open with respect to the outer frame 11 (step S8814). The front door opening sensor 95 is used to detect whether or not the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body 12 with respect to the outer frame 11 is used as in the thirtieth embodiment. The main body open sensor 96 is used to detect whether or not it is in the open state, as in the thirtieth embodiment. The setting key insertion unit 68a is turned on by using the setting key (step S8813: YES), the front door frame 14 is open with respect to the inner frame 13, and the gaming machine main body is opened with respect to the outer frame 11. When 12 is in the open state (step S8814: YES), the setting confirmation process is executed (step S8815). The details of the setting confirmation process will be described later.

When the reset button 68c is pressed (step S8806: YES), the RAM clear process is executed (step S8816). The content of the RAM clear process is the same as step S7915 of the main process (FIG. 114) in the 33rd embodiment. After that, the setting key insertion unit 68a is turned on by using the setting key (step S8817: YES), and the front door frame 14 is open with respect to the inner frame 13 and the game is played with respect to the outer frame 11. When the machine main body 12 is in the open state (step S8818: YES), the set value update process is executed (step S8819). The details of the setting value update process will be described later.

When the process of step S8812 is executed, when a negative determination is made in step S8813 or step S8814, when the process of step S8815 is executed, when a negative determination is made in step S8817 or step S8818, or when the process of step S8819 is executed. When executed, the start-up processing flag in the work area 221 for specific control is cleared to "0" (step S8820). When the start-up processing flag is cleared to "0", the state in which the processing for advancing the game is not executed even if the first timer interrupt processing is activated is released. In step S8820, the power failure flag in the work area 221 for specific control is also cleared to "0".

After that, the return command is transmitted to the voice emission control device 81 (step S8821). The content of the information included in the return command and the processing content of the voice emission control device 81 when the return command is received are the same as in the case of step S7920 of the main process (FIG. 114) in the 33rd embodiment. ..

After that, the process proceeds to the residual processing of steps S8822 to S8825. That is, the main CPU 63 is configured to periodically execute the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134), but between one timer interrupt process and the next timer interrupt process. The remaining time will be generated. This residual time varies depending on the processing completion time of each timer interrupt process, and the residual process of steps S8822 to S8825 is repeatedly executed by utilizing the irregular time. In this respect, it can be said that the residual processing in steps S8822 to S8825 is an irregular process that is executed irregularly. In steps S8822 to S8825, the same processes as in steps S113 to S116 of the main process (FIG. 9) in the first embodiment are executed.

Next, the second timer interrupt process in the present embodiment executed by the main CPU 63 will be described with reference to the flowchart of FIG. 134. The processing of steps S9001 to S9014 in the second timer interrupt processing is executed by the main CPU 63 by using the specific control program and the specific control data.

First, interrupt prohibition is set in order to prohibit the occurrence of the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) (step S9001). By prohibiting the generation of the first timer interrupt process (FIG. 133), the first timer interrupt process (FIG. 133) interrupts the second timer interrupt process (FIG. 134) even if the first interrupt cycle has elapsed. It is possible to prevent it from being started by. Further, since the occurrence of the second timer interrupt process (FIG. 134) is prohibited, even if the second timer interrupt cycle elapses during the execution of the second timer interrupt process (FIG. 134), the second timer interrupt is interrupted. It is possible to prevent the processing (FIG. 134) from being started twice.

After that, the checking counter is updated (step S9002). In the checking counter update process, when the value of the checking counter provided in the work area 221 for specific control is 1 or more, the value of the checking counter is subtracted by 1. As a result, when the initial check period is being measured using the checking counter, the value of the checking counter is periodically subtracted each time the second timer interrupt process (FIG. 134) is started. The Rukoto.

After that, it is determined whether or not "1" is set in the setting update display flag in the work area 221 for specific control (step S9003). The setting update display flag is a flag for the main CPU 63 to specify whether or not the setting value update process (FIG. 137) is being executed by the main CPU 63. As described above, the set value update process (FIG. 137) is a situation in which the process at the start of supply of the operating power is executed in the main process (FIG. 132) when the supply of the operating power to the main CPU 63 is started. Although it will be executed, the second timer interrupt process (FIG. 134) is set by the main CPU 63 because it is interrupted and started even in the situation where the process at the start of supplying the operating power is being executed. Even in the situation where the value update process (FIG. 137) is being executed, the second timer interrupt process (FIG. 134) is interrupted and started.

The situation in which "1" is set in the setting update display flag means that the setting value update processing (FIG. 137) is being executed by the main CPU 63 this time in the second timer interrupt processing (FIG. 134). It means that it is the processing time that was started by interrupting the situation. If an affirmative determination is made in step S9003, the setting process for the fifth display data buffer 275 during the setting update is executed (step S9004). In the setting process, the set value of the pachinko machine 10 is updated by the first to fourth notification display devices 201 to 204, as in step S8403 of the second timer interrupt process (FIG. 123) in the 33rd embodiment. The fifth display data buffer 275 stores the display data for displaying the situation indicating that the situation is being set and the display indicating the current set value of the pachinko machine 10. As a result, similarly to the 33rd embodiment, the display indicating that the set value is being updated and the display indicating the current set value are displayed on the first to fourth notification display devices 201 to 204. Is done.

When a negative determination is made in step S9003, it is determined whether or not "1" is set in the setting confirmation display flag in the work area 221 for specific control (step S9005). The setting confirmation display flag is a flag for the main CPU 63 to specify whether or not the setting confirmation process (FIG. 136) is being executed by the main CPU 63. As described above, the setting confirmation process (FIG. 136) is performed in the situation where the process at the start of the supply of the operating power is executed in the main process (FIG. 132) when the supply of the operating power to the main CPU 63 is started. Although it will be executed, the second timer interrupt process (FIG. 134) is set by the main CPU 63 because it is interrupted and started even in the situation where the process at the start of supplying the operating power is being executed. Even in the situation where the confirmation process (FIG. 136) is being executed, the second timer interrupt process (FIG. 134) is interrupted and started.

The situation in which "1" is set in the setting confirmation display flag means that the setting confirmation process (FIG. 137) is being executed by the main CPU 63 this time in the second timer interrupt process (FIG. 134). It means that it is the processing time that was started by interrupting the situation. If an affirmative determination is made in step S9005, the setting process for the fifth display data buffer 275 during the setting confirmation is executed (step S9006). In the setting process, the set value of the pachinko machine 10 is confirmed by the first to fourth notification display devices 201 to 204 in the same manner as in step S8405 of the second timer interrupt process (FIG. 123) in the 33rd embodiment. The fifth display data buffer 275 stores the display data for displaying the situation indicating that the situation is being set and the display indicating the current set value of the pachinko machine 10. As a result, similarly to the 33rd embodiment, the display indicating that the set value is being confirmed and the display indicating the current set value on the first to fourth notification display devices 201 to 204. Is done.

If a negative determination is made in step S9005, the normal setting process is executed (step S9007). The normal setting process will be described in detail later.

When the processing of step S9004, step S9006 or step S9007 is executed, the processing of steps S9008 to S9014 is executed. The processing contents of steps S9008 to S9014 are the same as those of steps S8407 to S8413 of the second timer interrupt processing (FIG. 123) in the 33rd embodiment.

Specifically, first, the transmission state of the signal through the type data signal line LN1 and the type clock signal line LN2 is turned off (step S9008), and the signal is transmitted through the display data signal line LN3 and the display clock signal line LN4. The state is set to the OFF state (step S9009). After that, the update process of the type counter provided in the work area 221 for specific control is executed (step S9010).

The type counter is a counter for the main CPU 63 to specify the transmission target of the display data among the first to fifth display data buffers 271-275 in the current processing time of the second timer interrupt processing. When the value of the type counter is "1", the display data of the first display data buffer 271 is the transmission target, and when the value of the type counter is "2", the display data of the second display data buffer 272 is the transmission target. When the value of the type counter is "3", the display data of the third display data buffer 273 is the transmission target, and when the value of the type counter is "4", the display data of the fourth display data buffer 274 is the transmission target. When it becomes a transmission target and the value of the type counter is "5", the display data of the fifth display data buffer 275 becomes the transmission target. In the type counter update process, the value of the type counter is added by 1, and if the value of the type counter after the addition exceeds the upper limit of "5", the value of the type counter is set to "1". .. As a result, the transmission target of the display data is sequentially changed in the first to fifth display data buffers 271-275 for each processing time of the second timer interrupt processing.

After that, the type data corresponding to the value of the type counter is read from the main ROM 64 (step S9011). Specifically, when the value of the type counter is "1", the type data corresponding to the first display circuit 261 is read from the main ROM 64, and when the value of the type counter is "2", the second type counter is read. The type data corresponding to the display circuit 262 is read from the main ROM 64, and when the value of the type counter is "3", the type data corresponding to the third display circuit 263 is read from the main ROM 64, and the value of the type counter is When it is "4", the type data corresponding to the fourth display circuit 264 is read from the main ROM 64, and when the value of the type counter is "5", the type data corresponding to the fifth display circuit 265 is mainly read. Read from the side ROM 64.

After that, the display data is read from the display data buffers 271-275 corresponding to the value of the type counter (step S9012). Specifically, when the value of the type counter is "1", the display data is read from the first display data buffer 271, and when the value of the type counter is "2", the display data is read from the second display data buffer 272. The display data is read, and when the value of the type counter is "3", the display data is read from the third display data buffer 273, and when the value of the type counter is "4", it is read from the fourth display data buffer 274. The display data is read, and when the value of the type counter is "5", the display data is read from the fifth display data buffer 275.

After that, various signal transmission processes are executed (step S9013). In the transmission process, signals are output to the type data signal line LN1 and the type clock signal line LN2 so that the type data read in step S9011 is transmitted to the display IC 266. Further, in the transmission process, signals are output to the display data signal line LN3 and the display clock signal line LN4 so that the display data read in step S9012 is transmitted to the display IC 266.

After that, interrupt permission is set to allow the occurrence of the first timer interrupt process (FIG. 133) and the second timer interrupt process (FIG. 134) (step S9014).

FIG. 135 is a flowchart showing a normal setting process in step S9007 of the second timer interrupt process (FIG. 134). The processes of steps S911 to S9109 in the normal setting process are executed by the main CPU 63 by using the specific control program and the specific control data.

First, it is determined whether or not the value of the checking counter provided in the work area 221 for specific control is 1 or more (step S9101). When the value of the checking counter is 1 or more (step S9101: YES), it means that it is the initial check period. In this case, the check display data is set in the fifth display data buffer 275 in the work area 221 for specific control (step S9102). The display data set in the fifth display data buffer 275 is display data for display control of the first to fourth notification display devices 201 to 204 as described above. Further, the check display data is the display data for causing the check display to be performed by the first to fourth notification display devices 201 to 204, that is, in each of the first to fourth notification display devices 201 to 204. This is display data for setting all display segments 321 to 324 into a light emitting state. By supplying the data of the check display to the display IC 266, as shown in the explanatory diagram of FIG. 128 (b), all of the check displays are displayed in the first to fourth notification display devices 201 to 204. The display segments 321 to 324 of the above are in the light emitting state. As a result, the manager of the game hall can grasp whether or not each of the display segments 321 to 324 of the first to fourth notification display devices 201 to 204 can be normally in the light emitting state.

Here, the initial check period is configured so that it can be canceled when confirming the setting or updating the set value. Such a cancelable configuration will be described. FIG. 136 is a flowchart showing a setting confirmation process executed in step S8815 of the main process (FIG. 132). The processes of steps S9201 to S9206 in the setting confirmation process are executed by using the specific control program and the specific control data in the main CPU 63.

First, the operation instruction command is transmitted to the voice emission control device 81 (step S9201). Upon receiving the operation instruction command, the voice emission control device 81 outputs the voice "Please operate the reset button 68c" from the speaker unit 54. The notification is continued until the reset button 68c is pressed.

After that, it is determined whether or not the reset button 68c has been pressed (step S9202). If the reset button 68c is not pressed, the process waits in step S9202. When the reset button 68c is pressed (step S9202: YES), the checking counter provided in the work area 221 for specific control is cleared to "0" (step S9203). This cancels the initial check period.

After that, "1" is set in the setting confirmation display flag provided in the work area 221 for specific control (step S9204). When the setting confirmation display flag is set to "1", the second timer interrupt process (FIG. 134) makes an affirmative judgment in step S9005 as described above, and the first to fourth notification display devices 2011 to Display data indicating that the setting value of the pachinko machine 10 is being confirmed in 204 and a display indicating the current setting value of the pachinko machine 10 are stored in the fifth display data buffer 275. (Step S9006). As a result, similarly to the 33rd embodiment, the display indicating that the set value is being confirmed and the display indicating the current set value on the first to fourth notification display devices 201 to 204. Is done.

After that, on condition that the setting key insertion unit 68a is turned off (step S9205: YES), the setting confirmation display flag in the work area 221 for specific control is cleared to "0" (step S9206). As a result, on the first to fourth notification display devices 201 to 204, a display indicating that the current set value of the pachinko machine 10 is being confirmed and a display showing the current set value of the pachinko machine 10. Is released. In this case, the display indicating the base value is started on the first to fourth notification display devices 201 to 204.

When the setting confirmation process is started as described above, the initial check period is canceled halfway on the condition that the reset button 68c is pressed, and the current status is present on the first to fourth notification display devices 201 to 204. The set value of is notified. As a result, when the supply of the operating power to the main CPU 63 is started and the main process (FIG. 132) is started by the main CPU 63, the process at the start of the supply of the operating power in the main process is executed. Even if the initial check period is started and the check display is performed on the first to fourth notification display devices 201 to 204 in the above situation, the processing at the start of the supply of operating power is executed. When confirming the set value in the above situation, it is possible to cancel the initial check period and display the current set value on the first to fourth notification display devices 201 to 204. Therefore, it is possible to confirm the set value without waiting for the initial check period to elapse.

Further, even when the setting confirmation process (FIG. 136) is executed in the main process (FIG. 132), the initial check period is started first, so that the first to fourth notification display devices 201 to 204 It is possible to confirm the set value after confirming whether or not each of the display segments 321 to 324 in each can be normally in the light emitting state. This makes it possible to accurately confirm the set value.

FIG. 137 is a flowchart showing a set value update process executed in step S8819 of the main process (FIG. 132). The processes of steps S9301 to S9310 in the set value update process are executed by using the specific control program and the specific control data in the main CPU 63.

First, the update start command is transmitted to the voice emission control device 81 (step S9301). Upon receiving the update start command, the voice emission control device 81 outputs the voice "Settings are being changed" from the speaker unit 54. The notification is continued until the setting value update process is completed.

After that, it is determined whether or not the value of the set value counter provided in the work area 221 for specific control is 1 or more corresponding to "setting 1" and 6 or less corresponding to "setting 6" (step). S9302). When the value of the set value counter is "0" or 7 or more, a negative determination is made in step S9302, and "1" is set in the set value counter (step S9303). As a result, the set value of the pachinko machine 10 becomes "setting 1".

When an affirmative determination is made in step S9302 or when the process of step S9303 is executed, it is determined whether or not the setting key insertion unit 68a is turned off by using the setting key (step S9304). In this case, it may be configured to determine whether or not the setting key insertion unit 68a has switched from the ON state to the OFF state, or it may be configured to determine whether or not the setting key insertion unit 68a is in the OFF state.

When the setting key insertion unit 68a is not turned off (step S9304: NO), it is determined whether or not the reset button 68c is pressed (step S9305). When the reset button 68c is pressed (step S9305: YES), the setting update display flag provided in the work area 221 for specific control is not set to "1" (step S9306: NO). ), The setting update display flag is set to "1" (step S9307), and the checking counter provided in the work area 221 for specific control is cleared to "0" (step S9308).

The initial check period is canceled when the checking counter is cleared to "0". Further, when the setting update display flag is set to "1", in the second timer interrupt process (FIG. 134), an affirmative determination is made in step S9003 as described above, and the first to fourth notification display devices are displayed. Display data indicating that the setting value of the pachinko machine 10 is being updated in 2001 to 204 and a display indicating the current setting value of the pachinko machine 10 are displayed in the fifth display data buffer 275. Store (step S9004). As a result, similarly to the 33rd embodiment, the display indicating that the set value is being updated and the display indicating the current set value are displayed on the first to fourth notification display devices 201 to 204. Is done.

When an affirmative determination is made in step S9306, or when the process of step S9308 is executed, the value of the set value counter in the work area 221 for specific control is added by 1 (step S9309). As a result, each time the reset button 68c is pressed once, the set value is updated one step higher. Further, when the reset button 68c is not pressed (step S9305: NO) or when the value of the set value counter is added by 1, the process returns to the process of step S9302. If it is determined that the value is 7 or more, "1" is set in the set value counter in step S9303. As a result, when the reset button 68c is pressed once in the situation of "setting 6", it returns to "setting 1".

When the setting key insertion unit 68a is turned off (step 9304: YES), the setting update display flag in the work area 221 for specific control is cleared to "0" (step S9310). As a result, on the first to fourth notification display devices 201 to 204, a display indicating that the set value of the pachinko machine 10 is being updated and a display indicating the current set value of the pachinko machine 10 are displayed. The state of being struck is released. In this case, the display indicating the base value is started on the first to fourth notification display devices 201 to 204.

When the set value update process is executed as described above, the initial check period is canceled in the middle on the condition that the reset button 68c is pressed, and the current status is displayed on the first to fourth notification display devices 201 to 204. The set value of is notified. As a result, when the supply of the operating power to the main CPU 63 is started and the main process (FIG. 132) is started by the main CPU 63, the process at the start of the supply of the operating power in the main process is executed. Even if the initial check period is started and the check display is performed on the first to fourth notification display devices 201 to 204 in the above situation, the processing at the start of the supply of operating power is executed. When updating the set value in this situation, it is possible to cancel the initial check period and display the current set value on the first to fourth notification display devices 201 to 204. Therefore, it is possible to update the set value while checking the current set value without waiting for the initial check period to elapse.

Further, even when the set value update process (FIG. 137) is executed in the main process (FIG. 132), the initial check period is started first, so that the first to fourth notification display devices 201 to 204 It is possible to update the set value after confirming whether or not each of the display segments 321 to 324 in each can be normally in the light emitting state. This makes it possible to accurately update the set value.

Further, when the reset button 68c is pressed to update the set value in the set value update process (FIG. 137), the initial check period is canceled. As a result, when the reset button 68c is pressed to update the set value, the initial check period is canceled accordingly, and it is possible to improve the operability for canceling the initial check period. Become.

Returning to the explanation of the normal setting process (FIG. 135), when the value of the checking counter is "0" and it is not the initial check period (step S9101: NO), it is provided in the work area 223 for non-specific control. It is determined whether or not "1" is set in the management start flag (step S9103). When "1" is not set in the management start flag (step S9103: NO), the pre-management display setting process is executed for the first and second notification display devices 201 and 202 (step S9104). In the setting process, the display data for setting all the display segments 321 and 322 to the light emitting state in each of the first and second notification display devices 201 and 202 is set in the fifth display data buffer 275. The first and second notification display devices 201 and 202 are not limited to the configuration in which all the display segments 321 and 322 are in the light emitting state, respectively, and the first and second notification display devices 201, In each of the 202, the blinking display may be performed in all the display segments 321 and 322.

After that, the calculation result data set in the display target setting area 276 in the work area 223 for non-specific control is read (step S9105), and the read calculation result data is sent to the third and fourth notification display devices 203 and 204. It is set in the fifth display data buffer 275 as the display data to be applied (step S9106). As described above, in the display process (FIG. 131), when "1" is not set in the management start flag (step S8701: NO), the base value is read from the current area 311 and the first decimal point in the read base value is first. The calculation result data corresponding to the digit of the digit and the digit of the second decimal place is set in the display target setting area 276 (step S8714). In step S9106, this calculation result data is set in the fifth display data buffer 275 as display data to be applied to the third and fourth notification display devices 203 and 204.

By supplying the display data set in the fifth display data buffer 275 in step S9104 and step S9106 to the display IC 266, as shown in the explanatory diagram of FIG. 128 (c), the first and second notification displays are displayed. In the situation where all the display segments 321 and 322 are in the light emitting state in each of the devices 201 and 202, the first decimal place of the base value calculated by the third notification display device 203 in the current calculation period. Is displayed, and the number having the second decimal place of the base value calculated in the current calculation period on the fourth notification display device 204 is displayed. While all the display segments 321 and 322 are in the light emitting state in each of the first and second notification display devices 201 and 202, the numbers corresponding to the base values are displayed on the third and fourth notification display devices 203 and 204. By doing so, it is possible to make the manager of the game hall recognize that the base value currently notified is the base value in the situation where "1" is not set in the management start flag.

Further, in the situation where "1" is set in the management start flag, as described above, every time the display continuation period (specifically, 5 seconds) elapses, the current area 311 → the first history area 312 → the first While the base values to be notified are switched by the first to fourth notification display devices 201 to 204 in a predetermined order of 2 history area 313 → 3rd history area 314, the management start flag is set to “ In the situation where "1" is not set, the base value of the current area 311 is maintained as the notification target. As a result, when the operation of the pachinko machine 10 is checked at the shipping stage of the pachinko machine 10, the current base value can be confirmed at an arbitrary timing.

When "1" is set in the management start flag (step S9103: YES), the display data set in the display target setting area 276 in the work area 223 for non-specific control is read, and the read display data is used as the first. 5 Set to the display data buffer 275 (step S9107). If the display data is supplied to the display IC 266 and the base value of the current area 311 is the notification target, the display as shown in the explanatory diagram of FIG. 127 (a) is for the first to fourth notifications. If the display devices 201 to 204 perform and the base value of the first history area 312 is the notification target, the display as shown in the explanatory diagram of FIG. 127 (b) is the display for the first to fourth notifications. If it is performed in the devices 201 to 204 and the base value of the second history area 313 is the notification target, the display as shown in the explanatory diagram of FIG. 127 (c) is the display device for the first to fourth notifications. If it is performed in 2001 to 204 and the base value of the third history area 314 is the notification target, the display as shown in the explanatory diagram of FIG. 127 (d) is the display device 201 for the first to fourth notifications. It will be held at ~ 204.

After that, it is determined whether or not "1" is set in the initial display flag provided in the work area 223 for non-specific control (step S9108). As already explained, the initial display flag is the first notification in order to notify that the base value of the current area 311 is the base value at the initial stage of calculation after the start of the calculation period in the situation where the base value is the notification target. This is a flag for the main CPU 63 to specify that the display device 201 and the second notification display device 202 should be blinked. When "1" is set in the initial display flag (step S9108: YES), the blinking setting process is executed for the first and second notification display devices 201 and 202 (step S9109).

In the blinking setting process, when the display corresponding to the display data currently set in the fifth display data buffer 275 is performed on the first and second notification display devices 201 and 202, the display is displayed blinking. Make settings to ensure that. As a setting for blinking display, specifically, regarding transmission of display data to the first and second notification display devices 201 and 202, the display data currently set in the fifth display data buffer 275 is used. The corresponding data is transmitted to the display IC 266 until a predetermined lighting period (for example, 0.5 seconds) elapses, and then all the display segments 321 and 322 of the first and second notification display devices 201 and 202 are turned off. The data to be in the state is transmitted to the display IC 266 until the predetermined extinguishing period (for example, 0.5 seconds) elapses, after which the predetermined lighting period and the predetermined extinguishing period are alternately repeated. As a result, if the base value of the current area 311 becomes the notification target immediately after the start of a new calculation period of the base value, the first and second notification display devices 201 and 202 display the initial calculation. Therefore, the manager of the game hall can be made aware that the current base value notified by the first to fourth notification display devices 201 to 204 is immediately after the start of the new calculation period. It will be possible.

Next, the display contents of the first to fourth notification display devices 201 to 204 when the supply of the operating power to the main CPU 63 is started will be described with reference to the time chart of FIG. 138. FIG. 138 (a) shows an initial check period, and FIG. 138 (b) shows a base value notified by the first to fourth notification display devices 201 to 204 in a situation where "1" is not set in the management start flag. The display period before the start of management is shown, and FIG. 138 (c) shows the base values stored in various areas 31 to 314 of the calculation result storage area 234, which are sequentially notified by the first to fourth notification display devices 201 to 204. The normal display period is shown, and FIG. 138 (d) shows the situation in which the set value of the pachinko machine 10 is being updated and the display showing the current set value of the pachinko machine 10 is the first to fourth. The display period during setting update performed by the notification display devices 201 to 204 is shown, and FIG. 138 (e) shows a display indicating that the set value of the pachinko machine 10 is being confirmed and the current state of the pachinko machine 10. The display showing the set value shows the display period during setting confirmation performed by the first to fourth notification display devices 201 to 204, and FIG. 138 (f) shows the timing when the reset button 68c is pressed.

First, when the supply of operating power to the main CPU 63 is started in a situation where "1" is not set in the management start flag, the setting confirmation process (FIG. 136) and the process at the start of supply of operating power are performed. A case where the set value update process (FIG. 137) is not executed will be described.

At the timing of t1, the initial check period is started as shown in FIG. 138 (a). As a result, the check display is started on the first to fourth notification display devices 201 to 204 as shown in the explanatory diagram of FIG. 128 (b).

After that, at the timing of t2, as shown in FIG. 138 (a), the initial check period ends without being canceled in the middle. In this case, the display period before the start of management is started at the timing of t2 as shown in FIG. 138 (b). In the display period before the start of management, as shown in the explanatory diagram of FIG. 128 (c), in the first notification display device 201 and the second notification display device 202, all the display segments 321 and 322 are in the light emitting state, and the first display device is in a light emitting state. In the 3 notification display device 203 and the 4th notification display device 204, a number corresponding to the current base value is displayed.

After that, at the timing of t3, the game ball discharged from the game area PA in the situation where "1" is not set in the management start flag and is neither the open / close execution mode nor the high frequency support mode depending on the jackpot result. The total number (that is, the total number of game balls supplied to the game area PA) reaches the management start reference number, which is less than the shift reference number. As a result, "1" is set in the management start flag, and the pre-management display period ends as shown in FIG. 138 (b). In this case, the normal display period starts at the timing of t3 as shown in FIG. 138 (c). In the normal display period, as shown in FIGS. 127 (a) to 127 (d), the base values stored in the various areas 31 to 314 of the calculation result storage area 234 are the first to fourth notification display devices 201 to 204. Will be notified in sequence.

Next, when the supply of the operating power to the main CPU 63 is started in the situation where "1" is set in the management start flag, the setting confirmation process is performed in the process at the start of the supply of the operating power (FIG. 136). ) And the case where the set value update process (FIG. 137) is not executed will be described.

At the timing of t4, the initial check period is started as shown in FIG. 138 (a). As a result, the check display is started on the first to fourth notification display devices 201 to 204 as shown in the explanatory diagram of FIG. 128 (b).

After that, at the timing of t5, as shown in FIG. 138 (a), the initial check period ends without being canceled in the middle. In this case, the normal display period starts at the timing of t5 as shown in FIG. 138 (c). In the normal display period, as shown in FIGS. 127 (a) to 127 (d), the base values stored in the various areas 31 to 314 of the calculation result storage area 234 are the first to fourth notification display devices 201 to 204. Will be notified in sequence.

Next, when the supply of the operating power to the main CPU 63 is started in the situation where the management start flag is set to "1", the set value update process is performed in the process at the start of the supply of the operating power (FIG. 137). ) Is executed.

At the timing of t6, the initial check period is started as shown in FIG. 138 (a). As a result, the check display is started on the first to fourth notification display devices 201 to 204 as shown in the explanatory diagram of FIG. 128 (b).

After that, the set value update process (FIG. 137) is started in the middle of the initial check period, and the reset button 68c is pressed at the timing of t7 as shown in FIG. 138 (f). As a result, the initial check period ends halfway at the timing of t7 as shown in FIG. 138 (a), and the setting updating display period starts at the timing of t7 as shown in FIG. 138 (d). NS.

After that, at the timing of t8, the setting updating display period ends as shown in FIG. 138 (d). In this case, the normal display period starts at the timing of t8 as shown in FIG. 138 (c). In the normal display period, as shown in FIGS. 127 (a) to 127 (d), the base values stored in the various areas 31 to 314 of the calculation result storage area 234 are the first to fourth notification display devices 201 to 204. Will be notified in sequence.

Next, when the supply of the operating power to the main CPU 63 is started in the situation where "1" is set in the management start flag, the setting confirmation process is performed in the process at the start of the supply of the operating power (FIG. 136). ) Is executed.

At the timing of t9, the initial check period is started as shown in FIG. 138 (a). As a result, the check display is started on the first to fourth notification display devices 201 to 204 as shown in the explanatory diagram of FIG. 128 (b).

After that, the setting confirmation process (FIG. 136) is started in the middle of the initial check period, and the reset button 68c is pressed at the timing of t10 as shown in FIG. 138 (f). As a result, the initial check period ends halfway at the timing of t10 as shown in FIG. 138 (a), and the setting confirmation display period starts at the timing of t10 as shown in FIG. 138 (e). NS.

After that, at the timing of t11, the display period during setting confirmation ends as shown in FIG. 138 (e). In this case, the normal display period starts at the timing of t11 as shown in FIG. 138 (c). In the normal display period, as shown in FIGS. 127 (a) to 127 (d), the base values stored in the various areas 31 to 314 of the calculation result storage area 234 are the first to fourth notification display devices 201 to 204. Will be notified in sequence.

It should be noted that the setting confirmation process is performed in the process at the start of supplying the operating power even when the supply of the operating power to the main CPU 63 is started in the situation where "1" is not set in the management start flag (FIG. 136). Alternatively, when the setting value update process (Fig. 137) is executed and the initial check period is canceled in the middle, the display period before the start of management is started after the display period during setting update or the display period during setting confirmation ends. It will be.

According to the present embodiment described in detail above, the following excellent effects are obtained.

As a check display, an initial check period may occur in which each display segment 321 to 324 in each of the first to fourth notification display devices 201 to 204 is in a light emitting state. This makes it possible to confirm whether or not each of the display segments 321 to 324 is in a light emitting state, and confirm whether or not the first to fourth notification display devices 201 to 204 are normal. It becomes possible to do.

When the supply of the operating power to the main CPU 63 is started, the initial check period of the first to fourth notification display devices 201 to 204 is started. As a result, when the supply of the operating power is started, it is possible to confirm at an early stage whether or not the first to fourth notification display devices 201 to 204 are normal.

Every time the supply of the operating power to the main CPU 63 is started, the initial check period of the first to fourth notification display devices 201 to 204 is started. As a result, it is possible to confirm whether or not the first to fourth notification display devices 201 to 204 are normal each time the supply of the operating power is started.

When the supply of the operating power to the main CPU 63 is started, the initial check period of the first to fourth notification display devices 201 to 204 is started without requiring any special operation. This makes it possible to facilitate the work of confirming whether or not the first to fourth notification display devices 201 to 204 are normal.

If a cancellation trigger occurs even if the initial check period has not elapsed, the check display on the first to fourth notification display devices 201 to 204 is terminated in the middle. As a result, even during the initial check period, the check display can be terminated and other displays can be displayed on the first to fourth notification display devices 201 to 204.

The initial check period is started before the process for controlling the progress of the game is executed even when the supply of the operating power to the main CPU 63 is started, and the first to fourth notification display devices 2011 to At 204, the above check display is started. As a result, it is possible to confirm whether or not the first to fourth notification display devices 201 to 204 are normal before the game is started.

In a configuration in which predetermined setting-related processes such as a setting confirmation process (FIG. 136) and a set value update process (FIG. 137) are executed in a situation where the process at the start of the supply of the operating power is executed, the supply of the operating power is started. The initial check period is started in the situation where the processing of time is being executed. As a result, it is possible to consolidate not only the predetermined setting-related processing but also the processing for starting the initial check period with respect to the processing at the start of supplying the operating power.

In the setting confirmation process (FIG. 136) and the set value update process (FIG. 137), these predetermined settings are set in the configuration in which the display corresponding to the current set value is displayed on the first to fourth notification display devices 201 to 204. The initial check period is started before the related processing is executed, and the check display is started on the first to fourth notification display devices 201 to 204. As a result, after confirming whether or not the first to fourth notification display devices 201 to 204 are normal, the current set values are confirmed using the first to fourth notification display devices 201 to 204. It becomes possible to do. Therefore, it is possible to accurately confirm the set value.

For the first to fourth notifications even if the initial check period has not elapsed based on the execution of the setting confirmation process (FIG. 136) or the set value update process (FIG. 137) in the situation of the initial check period. The check display on the display devices 201 to 204 ends in the middle. As a result, when the setting confirmation process (FIG. 136) or the set value update process (FIG. 137) is executed, the first to fourth notification display devices 201 to 4 do not have to wait for the initial check period to elapse. It is possible to end the above-mentioned check process in 204 and display the current set value on the first to fourth notification display devices 201 to 204. Therefore, it is possible to confirm the current set value at an early stage.

The initial check period has elapsed when the setting confirmation process (FIG. 136) or the set value update process (FIG. 137) is executed in the situation of the initial check period and the reset button 68c is pressed. Even if it is not present, the check display on the first to fourth notification display devices 201 to 204 ends in the middle. As a result, the initial check period can be terminated at an arbitrary timing after the setting confirmation process (FIG. 136) or the set value update process (FIG. 137) is started. For example, when the setting confirmation process (FIG. 136) or the set value update process (FIG. 137) is started, the manager of the game hall sufficiently confirms that the first to fourth notification display devices 201 to 204 are normal. After confirming the above, the first to fourth notification display devices 201 to 204 can end the check display and start displaying the current set value.

Further, in the set value update process (FIG. 137), the set value to be selected is updated by pressing the reset button 68c. In this case, when the reset button 68c is pressed as described above, the check display is terminated by the first to fourth notification display devices 201 to 204 and the display of the current set value is started. By setting this, a dedicated operation for ending the check display and starting the display of the current set value becomes unnecessary. Therefore, it is possible to improve the workability of the work for updating the set value.

In the calculation result storage area 234, a plurality of base values derived by using the information of the normal counter area 231 in different periods are stored. As a result, since it is possible to grasp the base value in a plurality of periods, it is possible to accurately grasp the ratio of the number of prize balls to the number of game balls supplied to the game area PA.

The calculation result storage area 234 is provided with a current area 311 in which the latest base value is stored and a first to third history areas 312 to 314 in which the base values derived before the current base value are stored. There is. As a result, the ratio of the number of prize balls to the number of game balls supplied to the game area PA can be grasped not only for the latest one but also for the past ones.

The base value that is repeatedly calculated in a relatively short cycle before the lapse of one calculation period is stored in the current area 311 and the base value calculated when one calculation period elapses is the first to third. It is stored in the history areas 312 to 314. This makes it possible to grasp the latest ratio of the number of prize balls to the number of game balls supplied to the game area PA, and to grasp the past ratio in the unit of one calculation period. Is possible. Further, since the base values in the unit of one calculation period are stored in the first to third history areas 312 to 314, the number of base values stored in the first to third history areas 312 to 314 is suppressed. It becomes possible.

Based on the elapse of one calculation period, the various counters 231a to 231e in the normal counter area 231 are cleared to "0". This makes it possible to suppress the storage capacity required in the normal counter area 231. Further, even if the various counters 231a to 231e in the normal counter area 231 are cleared to "0" in this way, the base values calculated when one calculation period elapses are the first to third. Since it is stored in the history areas 312 to 314, it is possible to later grasp the ratio of the number of prize balls to the number of game balls supplied to the game area PA in the past calculation period.

A plurality of history areas 312 to 314 are provided as areas for storing past base values. This makes it possible to compare the base values in a plurality of past calculation periods.

The base values stored in each of the current area 311, the first history area 312, the second history area 313, and the third history area 314 are sequentially displayed on the first to fourth notification display devices 201 to 204. This makes it possible to individually grasp the base values in a plurality of calculation periods while suppressing the number of notification devices 201 to 204.

When the power failure information storage process (step S8901) is executed to monitor the occurrence of a power failure and identify the occurrence of a power failure even when the process at the start of the supply of operating power is being executed. Power outage processing is executed. As a result, if a power failure occurs in a situation where the process at the start of supply of operating power is being executed, it is possible to appropriately deal with it.

In a configuration in which the first timer interrupt process (FIG. 133) includes the power failure information storage process (step S8901), the first timer interrupt process is performed even when the process at the start of operating power supply is being executed. It interrupts and is started. As a result, it is possible to periodically monitor the occurrence of a power failure even when the processing at the start of supplying the operating power is being executed.

The first timer interrupt process (FIG. 133) is interrupted and started even in a situation where the residual process is being executed after the process at the start of supplying the operating power is completed. This makes it possible to periodically monitor the occurrence of a power outage in a situation where the processing at the start of supply of operating power is being executed by using the first timer interrupt processing that is started by interrupting the residual processing. Become.

When the first timer interrupt process (FIG. 133) is interrupted and started in a situation where the process at the start of supply of operating power is being executed, the start-up process flag provided in the work area 221 for specific control is set to " When "1" is set, the process for advancing the game is not executed. As a result, even in a situation where the processing at the start of supplying the operating power is being executed, the operating power can be monitored in a configuration in which the occurrence of a power failure is periodically monitored by interrupting the first timer interrupt processing and starting the processing. It is possible to prevent the process for advancing the game from being executed in the situation where the process at the start of supply is being executed.

In a configuration in which the set value update process (FIG. 137) is executed in a situation where the process at the start of supply of operating power is executed, power failure information is executed even in the situation where the process at the start of supply of operating power is executed. The storage process (step S8901) is executed. As a result, even if a power failure occurs during the setting of the set value to be used, it is possible to appropriately deal with it.

The check display of the first to fourth notification display devices 201 to 204 is not limited to the configuration in which the check display is terminated when the initial check period has elapsed, and an operation for terminating the check display. The check display may be continued until the above is performed. As the operation for ending the operation, for example, the reset button 68c may be operated regardless of whether or not any of the setting confirmation process (FIG. 136) and the set value update process (FIG. 137) is being executed. Often, an operation unit other than the reset button 68c may be operated. In this case, the check display is continued on the 1st to 4th notification display devices 201 to 204 until it is time to confirm the base value or the set value on the 1st to 4th notification display devices 201 to 204. Therefore, it is possible to confirm the base value or the set value after confirming whether or not the first to fourth notification display devices 201 to 204 are normal. Further, since the check display is terminated based on the operation of the operation unit, the check display can be terminated at a desired timing.

Further, for checking the first to fourth notification display devices 201 to 204 when a predetermined operation unit such as the update button 68b or the reset button 68c is operated regardless of whether or not the supply of operating power is started. The display may be started. In this case, it is possible to start the check display at a desired timing when confirming the base value or the set value. Further, in the configuration, the check display may be terminated when a predetermined period (for example, 5 seconds) elapses, and the predetermined operation unit operated to start the check display or another operation unit thereof may be used. The check display may be terminated when the operation unit is operated.

Further, when the supply of the operating power to the main CPU 63 is started in a state where a specific operation unit other than the reset button 68c such as the update button 68b is operated, the first to fourth notification display devices 201 to 204 The check display may not be started when the check display is started and the supply of the operating power to the main CPU 63 is started without the specific operation unit being operated. In this case, in a configuration in which the check display is performed when the supply of operating power is started, it is possible to select whether or not to start the check display by the operation of the manager of the game hall.

Further, the game machine main body 12 is not limited to the configuration in which the base value is displayed on the first to fourth notification display devices 201 to 204 regardless of whether the game machine main body 12 is in the open state. When it is specified based on the detection result of the main body open sensor 96 that is in the open state, the base value may be displayed on the first to fourth notification display devices 201 to 204. In this case, when the gaming machine main body 12 is in the open state, the check displays of the first to fourth notification display devices 201 to 204 are first started, and then the first to fourth notification display devices 201 to 4 are started. The base value may be displayed at 204. Thereby, before confirming the base value, it is possible to confirm whether or not the first to fourth notification display devices 201 to 204 are normal. Further, in the configuration, the check display may be terminated when a predetermined period (for example, 5 seconds) elapses, and the predetermined operation unit operated to start the check display or another operation unit thereof may be used. The check display may be terminated when the operation unit is operated.

Further, when the main process (FIG. 132) is started in a state where the condition for executing the setting confirmation process (FIG. 136) is satisfied, the check display of the first to fourth notification display devices 201 to 204 is displayed. If the main process is started without satisfying the condition for executing the setting confirmation process without being started, the check display may be started. In this case, when it is confirmed that the set value is confirmed, it is possible to prevent the check display from being performed.

Further, when the main process (FIG. 132) is started while the condition for executing the set value update process (FIG. 137) is satisfied, the check display of the first to fourth notification display devices 201 to 204 is displayed. If the main process is started without satisfying the condition for executing the setting value update process without being started, the check display may be started. In this case, when it is confirmed that the set value is updated, it is possible to prevent the check display from being performed.

Further, when the main process (FIG. 132) is started in a state where either the condition for executing the setting confirmation process (FIG. 136) or the condition for executing the set value update process (FIG. 137) is satisfied. Main processing in a state where the check display of the first to fourth notification display devices 201 to 204 is not started and both the condition for executing the setting confirmation process and the condition for executing the set value update process are not satisfied. The check display may be started when is started. In this case, if it is confirmed that the set value is confirmed or the set value is updated, it is possible to prevent the check display from being performed.

Further, the check display is not limited to the configuration in which each display segment 321 to 324 in each of the first to fourth notification display devices 201 to 204 is maintained in the light emitting state, and the first to fourth notifications are not limited to the configuration. Each display segment 321 to 324 in each of the display devices 201 to 204 may be configured to be in a blinking state. Further, in the check display, each of the display segments 321 to 324 or a part of the display segments 321 to 324 of the first to fourth notification display devices 201 to 204 are sequentially in the light emitting state, and the range of the initial check period. Each display segment 321 to 324 may be in a light emitting state at least once.

Further, the process of displaying the check on the first to fourth notification display devices 201 to 204 is not limited to the configuration executed as the process corresponding to the specific control, and the process corresponding to the non-specific control. It may be configured to be executed as.

If the base value is not stored in any of the first to third history areas 312 to 314 of the calculation result storage area 234, the history areas 312 to 314 are displayed in the first to fourth notification display devices 201. The configuration may be such that the notification target is not set in ~ 204. In this case, for example, if the base value is stored in the current area 311 and the first history area 312, but the base value is not stored in the second history area 313 and the third history area 314, the display continuation period Each time, the notification target in the first to fourth notification display devices 201 to 204 is switched between the current area 311 and the first history area 312, and the second history area 313 and the third history area 314 are changed. It will not be the target of notification.

Further, in the current area 311, the first history area 312, the second history area 313, and the third history area 314 of the calculation result storage area 234, the base value represented as a minority to the second decimal place is stored. However, the configuration is not limited to this, and the information of the combination of the number having the first decimal place and the number having the second decimal point among the base values may be stored, and the base value may be used. Total number of game balls to be paid out to enable calculation (K91 x "Number of prize balls for winning the general winning opening 31" + K92 x "Number of winning balls for winning the special electric winning device 32" + K93 x "No. A combination of "the number of prize balls for winning a prize in one operating port 33" + K94 x "the number of winning balls for winning a prize in the second operating port 34") and the total number of game balls discharged from the skill area PA (K91 + K92 + K93 + K94 + K95). The information may be stored. In the former case, the information of various areas 31 to 314 can be set as it is in the display target setting area 276, and in the latter case, the base value is calculated using the information of various areas 31 to 314. The information of the number having the first decimal place and the number having the second decimal place extracted from the base value is set in the display target setting area 276.

Further, the calculation result storage area 234 may be configured in which only the current area 311 and the first history area 312 are provided as areas for storing the base value, and the current area 311, the first history area 312, and the first history area 312 may be provided. 2 The configuration may be such that only the history area 313 is provided. Further, a configuration may be configured in which four or more areas are provided as history areas for storing past base value information.

Further, in the calculation result storage area 234, various areas 31 to 314 are fixed on the address, and the base value is not limited to the configuration in which the base values are shifted in these various areas 31 to 314 as needed, and various areas 311 ~ 314 may be provided as a ring buffer.

Further, instead of the configuration in which the base value is calculated as the aspect information, the configuration in which the 61st parameter to the 68th parameter are calculated as in the fifteenth embodiment may be used. In this case, all of the 61st to 68th parameters may be stored in each of the current area 311, the first history area 312, the second history area 313, and the third history area 314 of the calculation result storage area 234. The current area 311 may store 61st to 68th parameters, but the 1st to 3rd history areas 312 to 314 may store some parameters such as only the 61st parameter.

Further, as the mode information, in addition to or in place of the base value, the probability of occurrence of the jackpot result may be calculated and stored, or the probability of occurrence of the high frequency support mode may be calculated and stored.

Further, the opportunity for the base value to be shifted in various areas 31 to 314 in the calculation result storage area 234 is limited to the case where the total number of game balls discharged from the game area PA is equal to or greater than the shift reference number. However, the shift may be performed when a predetermined period (for example, 8 hours) has elapsed, or the shift may be performed when the supply of operating power to the main CPU 63 is stopped. The shift may be performed when the supply of the operating power to the CPU 63 is started, or the shift may be performed when the set value of the pachinko machine 10 is changed. In addition, there may be a configuration in which there are a plurality of types of triggers for the shift.

Further, until "1" is set in the management start flag provided in the work area 223 for non-specific control, the display segments 321 and 322 in each of the first and second notification display devices 202 are in the light emitting state. The configuration is not limited to that, and the display segments 321 and 322 in each of the first and second notification display devices 202 may be in a blinking state. Further, until "1" is set in the management start flag, "bL .--"-> "b1 .-"-> "b2 .-"-> in the first to fourth notification display devices 201 to 204. The display of "b3 .--" may be repeated.

Further, until "1" is set in the management start flag provided in the work area 223 for non-specific control, the display segments 321 to 324 in each of the first to fourth notification display devices 201 to 204 are displayed. Each display segment 321 and 322 in each of the first and second notification display devices 201 and 202 is in a light emitting state or a blinking state without performing the check display in the light emitting state, and the third and fourth notifications are displayed. The display devices 203 and 204 may be configured to display a display corresponding to the fact that "1" is not set in the management start flag, such as a display corresponding to the current base value.

If the power failure flag is not set to "1" or the checksums do not match and the game stop flag is set to "1" to stop the progress of the game, the first to fourth notifications are used. Similar to the check display, the display devices 201 to 204 may have a configuration in which each display segment 321 to 324 is in a light emitting state, or each display segment 321 to 324 may be in a blinking state.

Further, the display control of the first to fourth notification display devices 201 to 204 is not limited to the configuration performed by the main CPU 63, and may be performed by a dedicated control means, and the voice emission control device 81 may be used. The configuration may be performed by the display control device 82, or the configuration may be performed by the display control device 82. In this case, when the base values are displayed on the first to fourth notification display devices 201 to 204, the base value to be notified is transmitted from the main CPU 63 to the control means that is the control subject, and the first When the set values are displayed on the fourth notification display devices 201 to 204, the set values to be notified are transmitted from the main CPU 63 to the control means that is the control subject. Further, when the processing at the start of supplying the operating power is executed in the main CPU 63, the first to fourth notification display devices 201 to 204 are displayed in the situation where the processing at the start of supplying the operating power is being executed. Information corresponding to the start of the check display is transmitted from the main CPU 63 to the control means which is the control main body so that the check display is started.

<36th Embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 35th embodiment. Hereinafter, a configuration different from the 35th embodiment will be described. The description of the same configuration as that of the 35th embodiment is basically omitted.

FIG. 139 is a flowchart showing the main process in the present embodiment executed by the main CPU 63. The processes of steps S9401 to S9426 in the main process are executed by using the program for specific control and the data for specific control in the main CPU 63.

In steps S9401 to S9403, the same process as in steps S8801 to S8803 of the main process (FIG. 132) in the 35th embodiment is executed. After that, the interrupt permission is set (step S9404). As a result, the first timer interrupt process (FIG. 133) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 134) is interrupted and activated in the second interrupt cycle. However, since "1" is set in the start-up processing flag in step S9403, even if the first timer interrupt processing is started, power failure monitoring and various counters among the various processes of the first timer interrupt processing are performed. While the process for updating and monitoring fraud is executed, the first timer interrupt process is terminated without executing the process for advancing the game.

After that, the information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the work area 221 for specific control (step S9405). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. When a value of 1 or more is set in the checking counter, the check display is performed by the first to fourth notification display devices 201 to 204 as in the 35th embodiment.

After that, it is determined whether or not the value of the checking counter is "0" (step S9406). Then, the process waits in step S9406 until the value of the checking counter becomes “0”. As a result, the check display on the first to fourth notification display devices 201 to 204 is continued until the initial check period set in step S9405 elapses.

After that, the processes of steps S9407 to S9426 are executed. The processing contents of these steps S9407 to S9426 are the same as those of steps S8806 to S8825 of the main processing (FIG. 132) in the 35th embodiment.

According to the above configuration, when the supply of the operating power to the main CPU 63 is started and the processing at the start of the supply of the operating power is started in the main CPU 63, the first to fourth notification display devices 201 to 204 are displayed. The check display is displayed and the progress of the process at the start of the supply of operating power is stopped until the initial check period elapses in that situation. As a result, it is possible to prevent the setting confirmation and the setting value update from being executed in the middle of the initial check period, and it is possible to suppress an increase in the processing load. In addition, it is possible to prevent the game from starting in the middle of the initial check period.

<37th Embodiment>
In this embodiment, the processing configuration of the main processing executed by the main CPU 63 is different from that of the 35th embodiment. Hereinafter, a configuration different from the 35th embodiment will be described. The description of the same configuration as that of the 35th embodiment is basically omitted.

FIG. 140 is a flowchart showing a main process in the present embodiment executed by the main CPU 63. The processes of steps S9501 to S9525 in the main process are executed by using the program for specific control and the data for specific control in the main CPU 63.

In steps S9501 to S9518, the same processing as in steps S7901 to S7918 of the main processing (FIG. 114) in the 33rd embodiment is executed. After that, the information corresponding to the initial check period (specifically, 5 seconds) is set in the checking counter provided in the work area 221 for specific control (step S9519). The value set in the checking counter is decremented by 1 each time the second timer interrupt process (FIG. 134) is started, as in the 35th embodiment. When a value of 1 or more is set in the checking counter, the check display is continued by the first to fourth notification display devices 201 to 204 as in the 35th embodiment.

After that, the processes after step S9520 are executed. The processing contents of steps S9520 to S9525 are the same as those of steps S7919 to S7924 of the main processing (FIG. 114) in the 33rd embodiment.

According to the above configuration, when the supply of the operating power to the main CPU 63 is started, the residual processing is performed after the processing at the start of the supply of the operating power (steps S9501 to S9518) is completed by the main CPU 63. The initial check period is started before (steps S9522 to S9525) are started. As a result, it is not necessary to control the initial check period in the situation where the processing at the start of supplying the operating power is being executed, so that the processing load in the situation where the processing at the start of supplying the operating power is being executed is reduced. It becomes possible.

Further, the setting confirmation process (step S9514) and the set value update process (step S9518) are executed as the process at the start of the supply of the operating power, whereas the process at the start of the supply of the operating power is performed during the initial check period. It starts after it finishes. As a result, even if the check display is performed on the first to fourth notification display devices 201 to 204 during the initial check period, the set value can be displayed using the first to fourth notification display devices 201 to 204. It is possible to prevent the influence.

The process after step S9520 may not be started until the initial check period elapses. In this case, it is possible to prevent the game from being started in a situation where the check display is displayed on the first to fourth notification display devices 201 to 204.

<38th Embodiment>
In the present embodiment, the processing configuration of the normal setting process executed by the main CPU 63 is different from that of the 35th embodiment. Hereinafter, a configuration different from the 35th embodiment will be described. The description of the same configuration as that of the 35th embodiment is basically omitted.

FIG. 141 is a flowchart showing a normal setting process in the present embodiment executed by the main CPU 63. The processes of steps S9601 to S9605 in the normal setting process are executed by using the specific control program and the specific control data in the main CPU 63.

First, it is determined whether or not "1" is set in the management start flag provided in the work area 223 for non-specific control (step S9601). When "1" is not set in the management start flag (step S9601: NO), the check display data is set in the fifth display data buffer 275 in the work area 221 for specific control (step S9602). When the check display data is supplied to the display IC 266, the check display is started on the first to fourth notification display devices 201 to 204. Specifically, all the display segments 321 to 324 are in the light emitting state in each of the first to fourth notification display devices 201 to 204. As a result, the manager of the game hall can grasp whether or not each of the display segments 321 to 324 of the first to fourth notification display devices 201 to 204 can be normally in the light emitting state.

When "1" is set in the management start flag (step S9601: YES), the processes of steps S9603 to S9605 are executed. The processing contents of steps S9603 to S9605 are the same as those of steps S9107 to S9109 in the normal setting processing (FIG. 135) in the 35th embodiment. By executing the processes of steps S9603 to S9605, the base values stored in the various areas 31 to 314 of the calculation result storage area 234 are sequentially notified by the first to fourth notification display devices 201 to 204. At the same time, when the base value of the current area 311 is notified immediately after the start of the new calculation period, the first and second notification display devices 201 and 202 perform the initial calculation display.

According to the above configuration, when "1" is not set in the management start flag, it is the initial check period in which the check display is performed on the first to fourth notification display devices 201 to 204. As a result, the situation in which the initial check period is set when the supply of operating power to the main CPU 63 is started is limited to the situation in which "1" is not set in the management start flag at the shipping stage of the pachinko machine 10. Is possible.

<39th Embodiment>
In this embodiment, the configuration related to the set value is different from that of the 33rd embodiment. Hereinafter, a configuration different from the 33rd embodiment will be described. The description of the same configuration as that of the 33rd embodiment is basically omitted.

142 (a) to 142 (d) are explanatory views for explaining the setting correspondence storage area 325 provided in the main ROM 64.

In the setting-corresponding storage area 325, a pass / fail table in the low-probability mode, a pass / fail table in the high-probability mode, a setting confirmation process (FIG. 115), and a set value update process (FIG. 116) corresponding to the set value of the pachinko machine 10 are provided. In the first to fourth notification display devices 201 to 204, display data of the set value used for displaying the current set value is set. More specifically, the setting-corresponding storage area 325 includes a first setting information storage area 325a, a second setting information storage area 325b, a third setting information storage area 325c, a fourth setting information storage area 325d, and a fifth setting information storage area. A 325e and a sixth setting information storage area 325f are provided.

Each of the first to sixth setting information storage areas 325a to 325f has a storage area for storing the winning / failing table of the low probability mode referred to when the winning / failing lottery mode is the low probability mode, and the winning / failing lottery mode. A storage area for storing the hit / fail table of the high probability mode referred to in the high probability mode, and for the first to fourth notifications in the setting confirmation process (FIG. 115) and the set value update process (FIG. 116). The display devices 201 to 204 are provided with a storage area for storing the display data of the set value used for displaying the current set value. In each of the first to sixth setting information storage areas 325a to 325f, a predetermined plurality of bytes are secured as a storage area for storing the pass / fail table in the low probability mode, and the pass / fail table in the high probability mode is stored. A predetermined multi-byte area is secured as a storage area for storing the set value, and a 1-byte area is secured as a storage area for storing the display data of the set value. Therefore, each of the first to sixth setting information storage areas 325a to 325f has a storage capacity of a plurality of bytes. In this case, the start address of the first setting information storage area 325a is A (1), the start address of the second setting information storage area 325b is A (2), and the start address of the third setting information storage area 325c is A (2). The start address of is A (3), the start address of the fourth setting information storage area 325d is A (4), and the start address of the fifth setting information storage area 325e is A (5). The start address of the sixth setting information storage area 325f is A (6).

In the above configuration, in the pachinko machine 10 of the first embodiment in the present embodiment, as the setting value of the pachinko machine 10, six-step setting values of "setting 1" to "setting 6" are set as in the above-mentioned 33 embodiments. ing. In this case, the probability of a jackpot result in the low probability mode is different in each of "setting 1" to "setting 6", while the probability of a jackpot result in the high probability mode is the same. Therefore, as shown in FIG. 142 (a), in the first setting information storage area 325a, the first low probability / wrong table LT corresponding to “setting 1” is stored in the storage area for storing the hit / miss table in the low probability mode. 1) is stored, and the common high-accuracy table HT that is common to "setting 1" to "setting 6" is stored in the storage area for storing the high-probability mode winning / failing table, and the set value is set. The display data for displaying "1" is stored in the storage area for storing the display data. In the second setting information storage area 325b, the second low-probability mode LT (2) corresponding to "setting 2" is stored in the storage area for storing the low-probability mode winning / failing table, and the high-probability mode is stored. The common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the setting value display data, and the storage area for storing the display data of the set value is ". Display data for displaying "2" is stored.

In the third setting information storage area 325c, the third low probability / wrong table LT (3) corresponding to “setting 3” is stored in the storage area for storing the hit / miss table in the low probability mode, and the high probability mode is stored. The common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the setting value display data, and the storage area for storing the display data of the set value is ". Display data for displaying "3" is stored. In the fourth setting information storage area 325d, the fourth low probability / wrong table LT (4) corresponding to “setting 4” is stored in the storage area for storing the hit / miss table in the low probability mode, and the high probability mode is stored. The common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the setting value display data, and the storage area for storing the display data of the set value is ". Display data for displaying "4" is stored.

In the fifth setting information storage area 325e, the fifth low probability / wrong table LT (5) corresponding to “setting 5” is stored in the storage area for storing the hit / miss table in the low probability mode, and the high probability mode is stored. The common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the setting value display data, and the storage area for storing the display data of the set value is ". Display data for displaying "5" is stored. In the sixth setting information storage area 325f, the sixth low probability / wrong table LT (6) corresponding to the “setting 6” is stored in the storage area for storing the hit / miss table in the low probability mode, and the high probability mode is stored. The common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the setting value display data, and the storage area for storing the display data of the set value is ". Display data for displaying "6" is stored.

In the case of the configuration of the first form, the probability of a jackpot result in the low probability mode increases as the set value increases. On the other hand, the probability of a jackpot result in the high probability mode is the same regardless of the set value. Since the probability of a jackpot result in the high probability mode is 1/30, the probability of a jackpot result in the high probability mode is higher than the jackpot probability in the low probability mode in "setting 6" even in "setting 1". It has a high probability.

In the first mode in which "setting 1" to "setting 6" are set as set values, it is executed in step S503 in order to execute the pass / fail determination process in step S504 of the special figure fluctuation start process (FIG. 13). The reading process of the winning / failing table will be described. FIG. 143 is a flowchart showing the reading process of the pass / fail table. The processes of steps S9701 to S9705 in the read / fail table read process are executed by using the specific control program and the specific control data in the main CPU 63.

First, the value of the set value counter provided in the work area 221 for specific control in the main RAM 65 is read out (step S9701). Which of the 1st to 6th setting information storage areas 325a to 325f in the setting correspondence storage area 325 should be referred to in each of the case of reading the pass / fail table and the case of reading the display data of the set value. Is a counter for specifying by the main CPU 63.

After that, from the first to sixth setting information storage areas 325a to 325f in the setting correspondence storage area 325, the storage area corresponding to the value of the setting value counter read in step S9701 is selected (step S9702). The set value counter is configured to take any of the values "1" to "6" as in the 33rd embodiment, and when the value of the set value counter is "1", the first The setting information storage area 325a is selected, the second setting information storage area 325b is selected when the value of the setting value counter is "2", and the third setting information storage area 325b is selected when the value of the setting value counter is "3". Select the setting information storage area 325c, select the fourth setting information storage area 325d when the value of the setting value counter is "4", and select the fifth setting information storage area 325d when the value of the setting value counter is "5". The setting information storage area 325e is selected, and when the value of the setting value counter is "6", the sixth setting information storage area 325f is selected.

At the time of this selection, the correspondence table stored in advance in the main ROM 64 is referred to. In the correspondence table, the correspondence relationship between the value of the set value counter and the start addresses of the first to sixth setting information storage areas 325a to 325f is defined. In detail, A (1), which is the start address of the first setting information storage area 325a, is set corresponding to the value of "1" of the set value counter, and corresponds to the value of "2" of the set value counter. A (2), which is the start address of the second setting information storage area 325b, is set, and A, which is the start address of the third setting information storage area 325c, corresponds to the value of "3" of the setting value counter. (3) is set, and A (4), which is the start address of the fourth setting information storage area 325d, is set corresponding to the value of "4" of the set value counter, and "5" of the set value counter is set. A (5), which is the start address of the fifth setting information storage area 325e, is set corresponding to the value of "", and corresponds to the value of "6" of the setting value counter of the sixth setting information storage area 325f. The starting address A (6) is set.

After that, if the current winning / failing lottery mode is the low probability mode (step S9703: NO), the winning / failing table of the low probability mode is read from the setting information storage areas 325a to 325f selected in step S9702 (step S9704). On the other hand, if the current winning / failing lottery mode is the high-probability mode (step S9703: YES), the winning / failing table of the high-probability mode is read from the setting information storage areas 325a to 325f selected in step S9702 (step S9705).

By executing the reading process of the winning / failing table as described above, the winning / failing table corresponding to the current winning / failing lottery mode is read out from the setting information storage areas 325a to 325f corresponding to the value of the set value counter. Then, in the hit / fail determination process (step S504) of the special figure fluctuation start process (FIG. 13), it is determined whether or not the current game times correspond to the jackpot result by using the read pass / fail table.

Next, a process will be described when the second timer interrupt process (FIG. 123) is interrupted and started in a situation where the set value update process (step S7918) is being executed in the main process (FIG. 114) of the main CPU 63. do. In this case, in the second timer interrupt process (FIG. 123), the setting process for the fifth display data buffer 275 during the setting value update is executed (step S8403). FIG. 144 is a flowchart showing a setting process in the fifth display data buffer 275 during the setting update. The processes of steps S9801 to S9805 in the setting process are executed by using the program for specific control and the data for specific control in the main CPU 63.

First, the value of the set value counter provided in the work area 221 for specific control in the main RAM 65 is read out (step S9801). After that, from the first to sixth setting information storage areas 325a to 325f in the setting correspondence storage area 325, the storage area corresponding to the value of the setting value counter read in step S9801 is selected (step S9802). The set value counter is configured to take any of the values "1" to "6" as in the 33rd embodiment, and when the value of the set value counter is "1", the first The setting information storage area 325a is selected, the second setting information storage area 325b is selected when the value of the setting value counter is "2", and the third setting information storage area 325b is selected when the value of the setting value counter is "3". Select the setting information storage area 325c, select the fourth setting information storage area 325d when the value of the setting value counter is "4", and select the fifth setting information storage area 325d when the value of the setting value counter is "5". The setting information storage area 325e is selected, and when the value of the setting value counter is "6", the sixth setting information storage area 325f is selected. In this selection, the corresponding table stored in advance in the main ROM 64 is referred to in the same manner as in the reading process of the winning / failing table (FIG. 143).

After that, the display data of the set value is read out from the setting information storage areas 325a to 325f selected in step S9802 (step S9803). Then, the display data of the read set value is set in the fifth display data buffer 275 in the work area 221 for specific control as display data for applying to the fourth notification display device 204 (step S9804). Further, the display data for displaying the display indicating that the setting value of the pachinko machine 10 is being updated on the first to third notification display devices 201 to 203 is set in the fifth display data buffer 275. (Step S9805).

By executing the setting process to the fifth display data buffer 275 during the setting update as described above, the first to first displays corresponding to the display data set in the fifth display data buffer 275 in step S9805. The display corresponding to the display data set in the fifth display data buffer 275 in step S9804 is performed on the fourth notification display device 204 while being performed by the third notification display devices 201 to 203. As a result, for example, as shown in the explanatory diagram of FIG. 124 (a), the display showing that the set value of the pachinko machine 10 is being updated and the display showing the current set value of the pachinko machine 10 are the first. This is performed by the fourth notification display devices 201 to 204.

The setting to be executed when the second timer interrupt process (FIG. 123) is interrupted and started while the setting confirmation process (step S7914) is being executed in the main process (FIG. 114) of the main CPU 63. In the setting process for the fifth display data buffer 275 during confirmation (step S8405), the setting process for the display data of the set value is the same as the setting process for the fifth display data buffer 275 during the above setting update (FIG. 144). Processing is executed.

Here, in the pachinko machine 10 of the first form, six levels of setting values of "setting 1" to "setting 6" are set as the setting values of the pachinko machine 10, but depending on the model and model of the pachinko machine 10. May use less than 6 levels. Specifically, in the pachinko machine 10 of the second form shown in the explanatory diagram of FIG. 142 (b), three stages of setting values of "setting 1", "setting 3" and "setting 6" are set. In the pachinko machine 10 of the third form shown in the explanatory diagram of 142 (c), four-step setting values of "setting 1", "setting 2", "setting 3" and "setting 4" are set, and FIG. 142 In the pachinko machine 10 of the fourth form shown in the explanatory diagram of (d), only the one-step setting value of "setting 1" is set. In this case, the pachinko machine 10 of any of the second to fourth forms can set the set value in six stages as in the pachinko machine 10 of the first form. A setting-corresponding storage area 325 having areas 325a to 325f is used.

Regarding the case where the setting-corresponding storage area 325 is used in the pachinko machine 10 of the second form, the first setting information storage area 325a and the fourth setting information storage area are described in detail as shown in the explanatory diagram of FIG. 142 (b). Various information corresponding to "setting 1" is stored in the 325d. That is, in the first setting information storage area 325a and the fourth setting information storage area 325d, the first low probability table LT (1) corresponding to "setting 1" is stored in the storage area for storing the pass / fail table of the low probability mode. ) Is stored, and the first high-probability table HT (1) corresponding to "setting 1" is stored in the storage area for storing the high-probability mode pass / fail table, and the display data of the set value is stored. Display data for displaying "1" is stored in the storage area for storage.

Various information corresponding to "setting 3" is stored in the second setting information storage area 325b and the fifth setting information storage area 325e. That is, in the second setting information storage area 325b and the fifth setting information storage area 325e, the third low probability table LT (3) corresponding to "setting 3" is stored in the storage area for storing the pass / fail table of the low probability mode. ) Is stored, and the third high accuracy table HT (3) corresponding to "setting 3" is stored in the storage area for storing the high probability mode pass / fail table, and the display data of the set value is stored. Display data for displaying "3" is stored in the storage area for storage.

Various information corresponding to "setting 6" is stored in the third setting information storage area 325c and the sixth setting information storage area 325f. That is, in the third setting information storage area 325c and the sixth setting information storage area 325f, the sixth low probability table LT (6) corresponding to "setting 6" is stored in the storage area for storing the pass / fail table of the low probability mode. ) Is stored, and the sixth high probability / wrong table HT (6) corresponding to “setting 6” is stored in the storage area for storing the high probability mode hit / miss table, and the display data of the set value is stored. Display data for displaying "6" is stored in the storage area for storage.

In the case of the configuration of the second form, even if the setting corresponding storage areas 325 having the first to sixth setting information storage areas 325a to 325f are used, these first to sixth setting information storage areas 325a to 325f are used. The set value of the number of steps less than 6, which is the number of, is set. Then, the higher the set value, the higher the probability of a jackpot result in the low probability mode, and the higher the set value, the higher the probability of a big hit result in the high probability mode. The jackpot probability in the high probability mode in "setting 1" is higher than the jackpot probability in the low probability mode in "setting 6".

In the case of the configuration of the second form, the read / fail table reading process (FIG. 143) corresponds to "setting 1" regardless of whether the value of the set value counter is "1" or "4". The pass / fail table is read, and the pass / fail table corresponding to "setting 3" is read regardless of whether the value of the set value counter is "2" or "5", and the value of the set value counter is set. In either case of "3" or "6", the pass / fail table corresponding to "setting 6" is read.

In the pass / fail table read process (FIG. 143), the pass / fail table is read from the setting information storage area 325 corresponding to the value of the set value counter regardless of the number of steps of the set value. As a result, even when the set value of 3 steps is set, the process configuration of the read / fail table read process (FIG. 143) is the same as the process configuration when the set value of 6 steps is set. It becomes possible.

In the case of the configuration of the second form, when the setting-corresponding storage area 325 in which the setting value of 6 steps can be set is used, the setting value of 3 steps is set, so that the setting value can be set in the setting-corresponding storage area 325. It is possible to divide the number of steps of the set value to be used by the number of steps of the set value to be used. That is, the number of steps of the set value to be used is a divisor of the maximum number of steps of the set value that can be set in the setting corresponding storage area 325, and is different from the maximum number of steps. In this case, the same number of setting information storage areas 325a to 325f are assigned to each of the setting values to be used, and one group of three-stage setting values arranged one by one in ascending order. In this case, the set values are assigned to the first to sixth setting information storage areas 325a to 325f so that the group is repeated. As a result, when the reset button 68c is repeatedly operated from the situation where the value of the set value counter is "1" in the set value update process (FIG. 116), the first to fourth notification display devices 201 to 204 are displayed. The set value displayed is changed in the order of "1"-> "3"-> "6"-> "1"-> "3"-> "6"-> "1"-> ... That is, the display is changed to a different set value for one operation of the reset button 68c, and the case where the settable setting value is displayed once is regarded as one display lap, and a certain mode of display is displayed. The lap will be repeated. Therefore, it becomes easy to update the set value.

In the setting process (FIG. 144) to the fifth display data buffer 275 during the setting update, the set value is displayed from the setting information storage area 325 corresponding to the value of the set value counter regardless of the number of steps of the set value. It is a configuration to read data. As a result, even when the three-step setting value is set, the processing configuration of the setting process (FIG. 144) can be the same as the case where the six-step setting value is set. It will be possible.

In the pachinko machine 10 of the second form, various information corresponding to "setting 1" is stored in the first setting information storage area 325a and the second setting information storage area 325b, and the third setting information storage area 325c and the third setting information storage area 325c and the third setting information storage area 325b. 4 Various information corresponding to "setting 3" is stored in the setting information storage area 325d, and various information corresponding to "setting 6" is stored in the fifth setting information storage area 325e and the sixth setting information storage area 325f. It may be configured as such. That is, the same number of setting information storage areas 325a to 325f are assigned to each of the setting values to be used, and the same setting value is a continuous setting information storage area in relation to the value of the setting value counter. The configuration may be set to 325a to 325f. In this case, when the reset button 68c is repeatedly operated from the situation where the value of the set value counter is "1" in the set value update process (FIG. 116), the first to fourth notification display devices 201 to 204 are displayed. The set value displayed is changed in the order of "1"-> "1"-> "3"-> "3"-> "6"-> "6"-> "1"-> ...

Regarding the case where the setting-corresponding storage area 325 is used in the pachinko machine 10 of the third form, the first setting information storage area 325a and the second setting information storage area are described in detail as shown in the explanatory diagram of FIG. 142 (c). Various information corresponding to "setting 1" is stored in 325b. That is, in the first setting information storage area 325a and the second setting information storage area 325b, the first low probability table LT (1) corresponding to "setting 1" is stored in the storage area for storing the pass / fail table of the low probability mode. ) Is stored, and the common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the high probability mode hit / miss table, and the set value is displayed. Display data for displaying "1" is stored in the storage area for storing the data.

Various information corresponding to "setting 2" is stored in the third setting information storage area 325c and the fourth setting information storage area 325d. That is, in the third setting information storage area 325c and the fourth setting information storage area 325d, the second low probability table LT (2) corresponding to "setting 2" is stored in the storage area for storing the pass / fail table of the low probability mode. ) Is stored, and the common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the high probability mode pass / fail table, and the set value is displayed. Display data for displaying "2" is stored in the storage area for storing the data.

Various information corresponding to "setting 3" is stored in the fifth setting information storage area 325e. That is, in the fifth setting information storage area 325e, the third low probability / failure table LT (3) corresponding to “setting 3” is stored in the storage area for storing the hit / fail table in the low probability mode, and is high. The common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the probability mode pass / fail table, and the storage area for storing the display data of the set value. Display data for displaying "3" is stored in.

Various information corresponding to "setting 4" is stored in the sixth setting information storage area 325f. That is, in the sixth setting information storage area 325f, the fourth low probability / failure table LT (4) corresponding to the “setting 4” is stored in the storage area for storing the hit / fail table in the low probability mode, and is high. The common high accuracy table HT common to "Setting 1" to "Setting 6" is stored in the storage area for storing the probability mode pass / fail table, and the storage area for storing the display data of the set value. Display data for displaying "4" is stored in.

In the case of the configuration of the third form, even if the setting corresponding storage areas 325 having the first to sixth setting information storage areas 325a to 325f are used, these first to sixth setting information storage areas 325a to 325f are used. The set value of the number of steps less than 6, which is the number of, is set. Then, the probability of a jackpot result in the low probability mode increases as the set value increases, and the probability of a jackpot result in the high probability mode is the same regardless of the set value. Since the probability of a jackpot result in the high probability mode is 1/30, the probability of a jackpot result in the high probability mode even in "setting 1" is higher than the jackpot probability in the low probability mode in "setting 4". It has a high probability.

In the case of the configuration of the third form, in the read / fail table reading process (FIG. 143), "setting 1" is supported regardless of whether the value of the set value counter is "1" or "2". The pass / fail table is read, and the pass / fail table corresponding to "setting 2" is read regardless of whether the value of the set value counter is "3" or "4", and the value of the set value counter is set. In the case of "5", the pass / fail table corresponding to "setting 3" is read, and in the case of the value of the set value counter is "6", the pass / fail table corresponding to "setting 4" is read.

In the pass / fail table read process (FIG. 143), the pass / fail table is read from the setting information storage area 325 corresponding to the value of the set value counter regardless of the number of steps of the set value. As a result, even when the set value of 4 steps is set, the process configuration of the read / fail table read process (FIG. 143) is the same as the process configuration when the set value of 6 steps is set. It becomes possible.

In the case of the configuration of the third form, when the setting-corresponding storage area 325 in which the setting value of 6 steps can be set is used, the setting value of 4 steps is set, so that the setting value can be set in the setting-corresponding storage area 325. The number of steps of the set value cannot be divided by the number of steps of the set value to be used. In this case, for each of "setting 1" and "setting 2", two consecutive setting information storage areas 325a to 325d are assigned in relation to the value of the setting value counter, and "setting 3" and "setting 3" and "setting 2" are assigned. One setting information storage area 325e and 325f is assigned to each of "setting 4". As a result, when the reset button 68c is repeatedly operated from the situation where the value of the set value counter is "1" in the set value update process (FIG. 116), the first to fourth notification display devices 201 to 204 are displayed. The set value displayed is changed in the order of "1"-> "1"-> "2"-> "2"-> "3"-> "4"-> "1"-> ...

In the setting process (FIG. 144) to the fifth display data buffer 275 during the setting update, the set value is displayed from the setting information storage area 325 corresponding to the value of the set value counter regardless of the number of steps of the set value. It is a configuration to read data. As a result, even when the four-step setting value is set, the processing configuration of the setting process (FIG. 144) can be the same as the case where the six-step setting value is set. It will be possible.

In addition, in order to change the display of the set value in the first to fourth notification display devices 201 to 204 with respect to one operation of the reset button 68c in the set value update process (FIG. 116). It is preferable that various information corresponding to the same set value is not set in the continuous setting information storage areas 325a to 325f in relation to the value of the set value counter. For example, various information corresponding to "setting 1" is set in the first setting information storage area 325a, various information corresponding to "setting 2" is set in the second setting information storage area 325b, and the third setting information storage area is set. Various information corresponding to "setting 3" is set in 325c, various information corresponding to "setting 4" is set in the fourth setting information storage area 325d, and various information corresponding to "setting 1" is set in the fifth setting information storage area 325e. It is conceivable that various information to be set is set and various information corresponding to "setting 2" is set in the sixth setting information storage area 325f. In this case, when the reset button 68c is repeatedly operated from the situation where the value of the set value counter is "1" in the set value update process (FIG. 116), the first to fourth notification display devices 201 to 204 are displayed. The set value displayed is changed in the order of "1"-> "2"-> "3"-> "4"-> "1"-> "2"-> "1"-> ...

Regarding the case where the setting-corresponding storage area 325 is used in the pachinko machine 10 of the fourth form, as shown in the explanatory diagram of FIG. 142 (d), all of the first to sixth setting information storage areas 325a to 325f. Various information corresponding to "setting 1" is stored in. That is, in the first to sixth setting information storage areas 325a to 325f, the first low accuracy table LT (1) corresponding to "setting 1" is stored in the storage area for storing the accuracy table of the low probability mode. The common high-accuracy table HT that is common to "Setting 1" to "Setting 6" is stored in the storage area for storing the high-probability mode pass / fail table, and the display data of the set value is stored. Display data for displaying "1" is stored in the storage area for displaying "1".

In the case of the configuration of the fourth form, only one type of setting value is set even in the configuration in which the setting corresponding storage area 325 having the first to sixth setting information storage areas 325a to 325f is used. Even in the configuration in which only one type of setting value is set in this way, in the read / fail table reading process (FIG. 143), the pass / fail table is read from the setting information storage area 325 corresponding to the value of the set value counter. be. As a result, even when only one type of setting value is set, the processing configuration of the read / fail table read processing (FIG. 143) is the same as the processing configuration when the six-step setting value is set. It becomes possible to do.

In the case of the configuration of the fourth form, since it is not necessary to set the set value, it is basically not necessary to execute the set value update process (FIG. 116), but when an abnormality of the set value occurs, the set value is set. An update process (FIG. 116) can be performed. In this case, "setting 1" is assigned to all of the first to sixth setting information storage areas 325a to 325f. Therefore, when the reset button 68c is repeatedly operated from the situation where the value of the set value counter is "1" in the set value update process (FIG. 116), the first to fourth notification display devices 201 to 204 display. The displayed setting value continues to be displayed as "1" → "1" → "1" → "1" → "1" → "1" → "1" → ... It will be.

In the setting process (FIG. 144) to the fifth display data buffer 275 during the setting update, the set value is displayed from the setting information storage area 325 corresponding to the value of the set value counter regardless of the number of steps of the set value. It is a configuration to read data. As a result, even when only one type of setting value is set, the processing configuration of the setting process (FIG. 144) is set to the same processing configuration as when the setting value of 6 stages is set. Is possible.

According to the present embodiment described in detail above, the following excellent effects are obtained.

Since the setting value to be used is set from the setting values of multiple stages corresponding to the player's advantage, the player expects that the more advantageous setting value is the target to be used. It will be. In this case, in the pachinko machines 10 of the second to fourth forms, the first predetermined number (specifically, six) of setting information storage areas 325a to 325f for storing the hit / fail table corresponding to the set value is provided. The number of types of set values to be used in the above configuration is smaller than the first predetermined number. This makes it possible to share the configuration of the pachinko machine 10 of the first form in which the number of types of set values to be used is the first predetermined number and the setting-corresponding storage area 325, and change the number of types of set values. It is possible to easily perform the design work of the pachinko machine 10 in the case of the above.

In the set value update process (step S7918), the set value to be used is changed by changing the numerical information of the set value counter provided in the work area 221 for specific control each time the reset button 68c is operated. By using the hit / fail table in the setting information storage areas 325a to 325f corresponding to the changed numerical information in the hit / fail judgment process, the hit / fail judgment process is executed in a manner corresponding to the set value of the target to be used. Become. In this case, each win / fail table of the set values that can be set has a configuration stored in at least one setting information storage area 325a to 325f, and is a part of the first predetermined number and stores a plurality of setting information. Since the same hit / fail table is stored in the areas 325a to 325f, the hit / miss table is stored in all of the first predetermined number of setting information storage areas 325a to 325f. As a result, while using the first predetermined number of setting information storage areas 325a to 325f as they are and using the setting value counter to determine the setting value to be used as it is, the setting value to be used can be used. It is possible to set the number of types to a number smaller than the first predetermined number.

The hit / fail table is read from the setting information storage areas 325a to 325f corresponding to the numerical information of the set value counter, and the hit / miss determination process is executed using the read hit / miss table. As a result, even if the number of types of set values to be used is less than the first predetermined number, it is possible to use the configuration of reading the pass / fail table as it is when executing the pass / fail determination process. ..

In the situation where the set value update process (step S7918) is executed, the set value display data is read from the setting information storage areas 325a to 325f corresponding to the numerical information of the set value counter, and the read set value display data is used. The configuration is such that the corresponding display is performed by the fourth notification display device 204. As a result, even if the number of types of set values to be used is less than the first predetermined number, the configuration of reading the display data of the set values when executing the display corresponding to the set values is used as it is. It becomes possible to do.

The number of steps of the set value to be used is a divisor of the maximum number of steps of the set value that can be set in the setting corresponding storage area 325, and is different from the maximum number of steps. In this case, the same number of setting information storage areas 325a to 325f are assigned to each of the setting values to be used, and one group of three-stage setting values arranged one by one in ascending order. In this case, the set values are assigned to the first to sixth setting information storage areas 325a to 325f so that the group is repeated. As a result, when the reset button 68c is repeatedly operated from the situation where the value of the set value counter is "1" in the set value update process (FIG. 116), the first to fourth notification display devices 201 to 204 are displayed. The set value displayed is changed in the order of "1"-> "3"-> "6"-> "1"-> "3"-> "6"-> "1"-> ... That is, the display is changed to a different set value for one operation of the reset button 68c, and the case where the settable setting value is displayed once is regarded as one display lap, and a certain mode of display is displayed. The lap will be repeated. Therefore, it becomes easy to update the set value.

In the configuration in which the pass / fail table of the high probability mode does not change according to the set value, the pass / fail table of the high probability mode is stored in the first to sixth setting information storage areas 325a to 325f of the setting corresponding storage area 325. Instead, it may be stored in a storage area different from the setting-corresponding storage area 325 in the main ROM 64.

When there is only one set value to be used, the pass / fail table corresponding to the set value is set only in one setting information storage area 325a to 325f, and the remaining setting information storage areas 325a to 325a. The 325f may be configured such that the winning / failing table is not set. Further, when the set value to be used has a plurality of stages but the number of stages is less than the number of the first to sixth setting information storage areas 325a to 325f, the pass / fail table corresponding to each of the set values is set. A win / fail table may not be set in the remaining setting information storage areas 325a to 325f while being set only in one corresponding setting information storage area 325a to 325f. In this configuration, the setting information storage area in which the winning / failing table is not set is set so that the numerical information corresponding to the setting information storage areas 325a to 325 cannot be selected in the setting value counter. It is possible to prevent 325a to 325f from being selected when reading the pass / fail table or reading the display data of the set value.

<40th Embodiment>
In the 39th embodiment, the setting corresponding storage area 325 which can set the setting value of 6 steps is used, but in this embodiment, the setting value which can set the setting value of 3 steps is supported. The storage area 326 is used.

FIGS. 145 (a) to 145 (c) are explanatory views for explaining a setting-corresponding storage area 326 stored in advance in the main ROM 64.

The setting-corresponding storage area 326 is provided with a first setting information storage area 326a, a second setting information storage area 326b, and a third setting information storage area 326c. In the pachinko machine 10 of the first form shown in FIG. 145 (a), various information corresponding to "setting 1" is set in the first setting information storage area 326a, and "setting 2" is set in the second setting information storage area 326b. Various information corresponding to "Setting 3" is set in the third setting information storage area 326c. That is, in the pachinko machine 10 of the first form, the set values for the maximum number that can be set in the setting corresponding storage area 326 are set.

In the pachinko machine 10 of the second form shown in FIG. 145 (b), various information corresponding to "setting 1" is set in all of the first to third setting information storage areas 326a to 326c. That is, in the pachinko machine 10 of the second form, only one type of setting value is set by using the setting corresponding storage area 326 in which the setting value of three stages can be set.

In the pachinko machine 10 of the third form shown in FIG. 145 (c), various information corresponding to "setting 1" is set in the first setting information storage area 326a and the second setting information storage area 326b, and the third setting. Various information corresponding to "setting 3" is set in the information storage area 326c. That is, in the pachinko machine 10 of the third form, the set value of two stages is set by using the setting corresponding storage area 326 in which the set value of three stages can be set.

According to the above configuration, the setting-corresponding storage area 326 capable of setting the setting value of three stages is the second form and the third form in which the setting value of the number of stages smaller than the setting value of the three stages is used. It can be used as it is for the pachinko machine 10. Further, similarly to the 39th embodiment, the processing configuration of the read / fail table reading process (FIG. 143) and the processing configuration of the setting process (FIG. 144) to the fifth display data buffer 275 during the setting update are the first. It can be commonly used in the pachinko machine 10 of the third form.

<41st Embodiment>
In the present embodiment, when the setting confirmation process (step S7914) or the set value update process (step S7918) is executed in the main process (FIG. 114) of the main CPU 63, the pachinko machine 10 can be visually recognized from the front side. It is different from the 33rd embodiment in that a predetermined notification is executed on the display unit. Hereinafter, a configuration different from the 33rd embodiment will be described. The description of the same configuration as that of the 33rd embodiment is basically omitted.

FIG. 146 (a) is an explanatory diagram for explaining various display units provided in an area that can be visually recognized from the front of the pachinko machine 10 through a window panel 52 that raises the front surface of the pachinko machine 10.

As various display units, a special figure display unit 37a, a special figure hold display unit 37b, a normal figure display unit 38a, and a normal figure hold display unit 38b are provided. These functions are the same as those in the first embodiment. The special figure display unit 37a and the normal figure display unit 38a are provided so as to be arranged side by side, but the round display unit 330 is provided so as to be arranged side by side with respect to the special figure display unit 37a and the general figure display unit 38a. Has been done.

The round display unit 330 has seven display segments 331 to 337, similarly to the special figure display unit 37a and the normal map display unit 38a. The seven display segments 331 to 337 are all rod-shaped light emitting regions having the same shape and the same size, and are arranged so as to generate the character "8". The seven display segments 331 to 337 are individually controlled for light emission.

The round display unit 330 notifies the number of round games that occur in the open / close execution mode triggered by the big hit result. In the present embodiment, as the jackpot results that can be selected when the jackpot is won in the winning / failing determination process, the first jackpot result that triggers the transition to the open / close execution mode in which the number of executions of the round game is relatively small, and the round game There is a second jackpot result that triggers the transition to the open / close execution mode in which the number of executions of is relatively large. Specifically, in the open / close execution mode triggered by the first big hit result, the round game is executed twice, and in the open / close execution mode triggered by the second big hit result, the round game is executed 16 times.

The first jackpot result includes a jackpot result in which the winning / failing lottery mode becomes a low probability mode and the support mode becomes a low frequency support mode after the opening / closing execution mode ends, and a winning / failing lottery mode having a high probability after the opening / closing execution mode ends. There is a big hit result that the support mode becomes the high frequency support mode as well as the mode. In addition, the second jackpot result includes a jackpot result in which the winning / failing lottery mode becomes a low probability mode and the support mode becomes a low frequency support mode after the opening / closing execution mode ends, and a winning / failing lottery mode having a high probability after the opening / closing execution mode ends. There is a big hit result that the support mode becomes the high frequency support mode as well as the mode.

FIG. 146 (b) is an explanatory diagram for explaining the display contents of the round display unit 330.

The round display unit 330 is used for at least a part of the display from the non-display state in which all the display segments 331 to 337 are turned off when the open / close execution mode is started triggered by any of the jackpot results. The segments 331 to 337 are in a display state in which they are in a light emitting state. In the situation where the open / close execution mode is continued, the display content displayed on the round display unit 330 at the start of the open / close execution mode is maintained. Then, when the open / close execution mode ends, the round display unit 330 changes from the display state to the non-display state.

In the open / close execution mode in which the two round games are executed, as shown in FIG. 146 (b), the first to fourth display segments 331 to 334 of the round display unit 330 are turned off, and the fifth round display unit 330 is turned off. ~ The 7th display segment 335 to 337 is lit. In the open / close execution mode in which the 16 round games are executed, as shown in FIG. 146 (b), the first to fourth display segments 331 to 334 of the round display unit 330 are lit, and the fifth -The seventh display segment 335 to 337 is turned off. As a result, the manager of the game hall confirms the round display unit 330 when the opening / closing execution mode is executed on the pachinko machine 10, and the opening / closing execution mode corresponds to any kind of opening / closing execution mode. It becomes possible to grasp whether or not it is.

When the set value update process (step S7918) is executed in the main process (FIG. 114) of the main CPU 63, the round display unit 330 displays the corresponding display. Specifically, when the set value update process (step S7918) is executed, as shown in FIG. 146 (b), the first display segment 331 and the third display segment 333 of the round display unit 330, The fifth display segment 335 and the seventh display segment 337 are turned off, and the second display segment 332, the fourth display segment 334, and the sixth display segment 336 are turned on.

The display on the round display unit 330 corresponding to the set value update process (step S7918) is started when the set value update process (step S7918) is started, and when the set value update process (step S7918) is completed. It will be terminated. This display content is different from the display content displayed on the round display unit 330 when the open / close execution mode is executed, and the round display unit is further executed when the setting confirmation process (step S7914) described later is executed. It is also different from the display content displayed on 330. As a result, the manager of the game hall can easily grasp whether or not the set value update process (step S7918) is being executed by checking the round display unit 330. Further, such grasping can be performed by using the round display unit 330.

When the setting confirmation process (step S7914) is executed in the main process (FIG. 114) of the main CPU 63, the round display unit 330 displays the corresponding display. Specifically, when the setting confirmation process (step S7914) is executed, as shown in FIG. 146 (b), the first display segment 331 and the third display segment 333 of the round display unit 330, The fifth display segment 335 and the seventh display segment 337 are turned on, and the second display segment 332, the fourth display segment 334, and the sixth display segment 336 are turned off.

The display on the round display unit 330 corresponding to the setting confirmation process (step S7914) is started when the setting confirmation process (step S7914) is started, and is started when the setting confirmation process (step S7914) is completed. It will be terminated. This display content is different from the display content displayed on the round display unit 330 when the open / close execution mode is executed, and further on the round display unit 330 when the set value update process (step S7918) is executed. It is also different from what is displayed. As a result, the manager of the game hall can easily grasp whether or not the setting confirmation process (step S7914) is being executed by checking the round display unit 330. Further, such grasping can be performed by using the round display unit 330.

In the situation where the setting confirmation process (step S7914) and the set value update process (step S7918) are executed in the main process (FIG. 114), the process for advancing the game is not executed. Therefore, the setting confirmation process (step S7914) and the set value update process (step S7918) are not executed in the situation where the open / close execution mode is executed. Further, in a situation where one of the setting confirmation process (step S7914) and the set value update process (step S7918) is being executed, the other is not executed. Therefore, even if the round display unit 330 is also used as a display unit for performing each display, the situations in which each display should be performed do not occur in duplicate.

The display content of the round display unit 330 is not limited to the above display content, and is arbitrary as long as it is possible to distinguish each situation from the display content of the round display unit 330, for example. One of the display corresponding to the setting confirmation process (step S7914) and the set value update process (step S7918) may be configured such that all of the first to seventh display segments 331 to 337 are lit. Further, in one of the display corresponding to the setting confirmation process (step S7914) and the set value update process (step S7918), all of the first to seventh display segments 331 to 337 are turned on and the state is maintained. On the other hand, all of the first to seventh display segments 331 to 337 may be in a blinking state.

Further, instead of the configuration in which the round display unit 330 displays the display corresponding to the setting confirmation process and the display corresponding to the set value update process, the special figure display unit 37a may perform these displays. These displays may be performed on the normal drawing display unit 38a. In addition, any one of the special figure display unit 37a, the normal figure display unit 38a, and the round display unit 330 displays the display corresponding to the setting confirmation process, and the other display unit sets the display. The display corresponding to the value update process may be performed.

In addition, the hold information acquired based on the entry of the game ball into the first operation port 33 and the hold information acquired based on the entry of the game ball into the second operation port 34 are separately stored and stored. As the special figure display unit 37a, the first special figure display unit in which the game is executed triggered by the hold information corresponding to the first operation port 33, and the game triggered by the hold information corresponding to the second operation port 34. In the configuration provided with the second special figure display unit in which the times are executed, the display corresponding to the setting confirmation process and the display corresponding to the set value update process are performed in the first special figure display unit. In some cases, the display corresponding to the setting confirmation process and the display corresponding to the setting value update process may be performed on the second special figure display unit, and the setting confirmation process is supported on the first special figure display unit. The display corresponding to the set value update process may be performed at the second special figure display unit.

Further, the configuration may be provided with a dedicated display unit for displaying that the setting confirmation process is being executed, and the setting value update process is being displayed. It may be configured to have a dedicated display unit for this purpose, and it may be dedicated to display that the setting confirmation process is being executed or the setting value update process is being executed. A display unit may be provided. In this case, the dedicated display unit may be displayed and controlled by the main CPU 63, or may be displayed and controlled by the voice emission control device 81 or the display control device 82.

<42nd Embodiment>
In this embodiment, the processing configurations of the main processing and the first timer interrupt processing are different from those of the 33rd embodiment. Hereinafter, a configuration different from the 33rd embodiment will be described. The description of the same configuration as that of the 33rd embodiment is basically omitted.

FIG. 147 is a flowchart showing the main process in the present embodiment executed by the main CPU 63. The processes of steps S9901 to S9923 in the main process are executed by using the program for specific control and the data for specific control in the main CPU 63.

First, the power-on initial setting process is executed (step S9901). In the power-on initial setting process, for example, the process waits without proceeding to the next process until a predetermined time for waiting (specifically, 1 second) elapses after the main process is started. The operation start and initial setting of the symbol display device 41 are completed in the predetermined period for the weight. It also allows access to the main RAM 65.

After that, the internal function register setting process is executed (step S9902). In the internal function register setting process, as in step S7902 of the main process (FIG. 114) in the 33rd embodiment, the first timer interrupt process (1st timer interrupt process) which is a process that is started by interrupting the main process periodically. The interrupt cycle of FIG. 148) is set to the first interrupt cycle (specifically, 4 milliseconds), and the second timer interrupt process (FIG. 123) is a process that is started by interrupting the main process periodically. ) Is set to the second interrupt cycle (specifically, 2 milliseconds), which is shorter than the first interrupt cycle.

After that, the interrupt enable is set for the second timer interrupt process (FIG. 123) (step S9903). As a result, the second timer interrupt process (FIG. 123) is started by interrupting the second interrupt cycle. On the other hand, interrupt permission is not set for the first timer interrupt process (FIG. 148). As a result, the first timer interrupt process (FIG. 148) is still maintained in the interrupt-disabled state.

After that, the processes of steps S9904 to S9917 are executed. The processing contents of steps S9904 to S9917 are the same as those of steps S7905-step S7918 of the main processing (FIG. 114) in the 33rd embodiment.

After the processing of steps S9904 to S9917 is completed, interrupt permission is set for the first timer interrupt processing (FIG. 148) (step S9918). As a result, the first timer interrupt process (FIG. 148) is interrupted by the first interrupt cycle and started. That is, the first timer interrupt process (FIG. 117) is interrupted and activated in the first interrupt cycle, and the second timer interrupt process (FIG. 123) is interrupted and activated in the second interrupt cycle. After that, in steps S9919 to S9923, the same processing as in steps S7920 to S7924 of the main processing (FIG. 114) in the 33rd embodiment is executed.

FIG. 148 is a flowchart showing the first timer interrupt process in the present embodiment executed by the main CPU 63. As described above, the first timer interrupt process is periodically started at a cycle of 4 milliseconds, which is the first interrupt cycle. Further, the program corresponding to the first timer interrupt processing is set as the program for specific control.

First, interrupt prohibition is set in order to prohibit the occurrence of the first timer interrupt process (FIG. 148) and the second timer interrupt process (FIG. 123) (step SA101). By prohibiting the generation of the first timer interrupt process (FIG. 148), the generation of the first timer interrupt process (FIG. 148) is prohibited, so that the first timer interrupt process (FIG. 148) is temporarily executed. Even if the first interrupt cycle has elapsed, it is possible to prevent the first timer interrupt process (FIG. 148) from being started twice. Further, since the occurrence of the second timer interrupt process (FIG. 123) is prohibited, the second timer interrupt process (FIG. 123) is compared with the first timer interrupt process (FIG. 148) even if the second interrupt cycle elapses. It is possible to prevent the timer from being interrupted and started.

After that, in steps SA102 to SA121, the same processing as in steps S8202 to S8221 of the first timer interrupt processing (FIG. 117) in the 33rd embodiment is executed. When an affirmative judgment is made in step SA107, or when the process of step SA121 is executed, interrupt enable setting is set to allow the occurrence of the first timer interrupt process (FIG. 148) and the second timer interrupt process (FIG. 123). (Step SA122).

According to the above configuration, in the situation where the processing at the start of supply of operating power is executed in the main processing (FIG. 147), the interrupt of the second timer interrupt processing (FIG. 123) is permitted, while the first timer interrupt processing. The interrupt of (Fig. 148) is not allowed. As a result, it is possible to execute the display control of the first to fourth notification display devices 201 to 204 by the second timer interrupt processing (FIG. 123) even in the situation where the processing at the start of supplying the operating power is being executed. On the other hand, it is possible to prevent the process for controlling the progress of the game by the first timer interrupt process (FIG. 148) from being executed.

Further, the first timer interrupt process (FIG. 148) is not started by interrupting the second timer interrupt process (FIG. 123), and the second timer interrupt process (FIG. 123) is interrupted by the first timer interrupt process (FIG. 148). On the other hand, it interrupts and does not start. This makes it possible to prevent the timer interrupt processing from being started twice.

<Other embodiments>
It should be noted that the description is not limited to the above-described embodiment, and various modifications and improvements can be made within a range that does not deviate from the gist of the present invention. For example, it may be changed as follows. Incidentally, the following configuration of another embodiment may be applied individually or in combination to the configuration of the above embodiment.

(1) In the first to fourth embodiments described above, the number of occurrences of the open / close execution mode per unit game is calculated as a parameter indicating the frequency of occurrence of the open / close execution mode. Therefore, the result of dividing the number of occurrences of the open / close execution mode by the total number of game balls discharged from the game area PA may be calculated. Further, in addition to or instead of this, the result of dividing the number of occurrences of the opening / closing execution mode by the total number of balls entering the first operating port 33 and the number of balls entering the second operating port 34 is calculated. May be. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(2) In the first to fourth embodiments, as parameters indicating the frequency of occurrence of the high-frequency support mode, the high-frequency support mode with respect to the number of occurrences of the high-frequency support mode and the number of occurrences of the open / close execution mode per unit game round. The ratio of the number of occurrences of is calculated, but in addition to or instead of this, the result of dividing the number of occurrences of the high frequency support mode by the total number of game balls discharged from the game area PA is also calculated. good. In addition to or instead of this, the result of dividing the number of occurrences of the high frequency support mode by the total number of balls entering the first operating port 33 and the number of balls entering the second operating port 34 is calculated. It may be configured. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(3) Not only the big hit result but also the small hit result may exist as the game result that triggers the occurrence of the open / close execution mode. If a small hit result is obtained, the open / close execution mode is generated, but the win / fail lottery mode and the support mode are not changed before and after the open / close execution mode. In addition, the open / close execution mode that results in a small hit may be configured to be a low-frequency winning mode. In this case, when the big hit result occurs, the history information corresponding to the occurrence of the big hit result is stored in the history memory 117, and when the small hit result occurs, the history information corresponding to the occurrence of the small hit result is history. It may be configured to be stored in the memory 117. Further, in the configuration, a parameter indicating the occurrence frequency of the big hit result and a parameter indicating the occurrence frequency of the small hit result may be calculated by using the history information stored in the history memory 117. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

Further, the probability of winning the small hit result may be changed according to the set state of the pachinko machine 10, or may not be changed. In the case of a configuration in which the probability of winning a small hit result changes according to the setting state of the pachinko machine 10, the higher the set value, the higher the probability of winning the small hit result. It may be configured with a low probability of doing so.

Further, in the configuration in which the small hit result exists, the hold information acquired when the game ball enters the first operating port 33 and the hold information acquired when the game ball enters the second operating port 34. The distribution ratio of the type of jackpot result is different from that of the hold information when the jackpot result is obtained, and when aiming to enter the first operating port 33, the variable display unit 36 is used in the game area PA. The firing operation is performed so that the game ball flows down in the area on the left side, and when aiming to enter the second operating port 34, the game ball flows down in the area on the right side of the variable display unit 36 in the game area PA. The firing operation may be performed so as to be performed, and a small hit result may be generated based on the hold information acquired when the game ball enters the first operating port 33.

In this configuration, the following 51st parameter may exist as a result of managing the game history. The normal period is the sum of the execution period of the open / close execution mode triggered by the small hit result based on the entry into the first operating port 33 and the execution period of the low frequency support mode instead of the open / close execution mode. do. Further, the number of balls entered into the out port 24a in the normal period is defined as the number of balls entered K51, and the number of balls entered in the general winning opening 31 in the normal period is defined as the number of balls entered K52. The number of balls entered is K53, the number of balls entered into the first operating port 33 during the normal period is K54, and the number of balls entered into the second operating port 34 during the normal period is K55.
51st parameter: Total number of game balls paid out during the normal period (K52 x "number of prize balls for winning the general winning opening 31" + K53 x "number of prize balls for winning the special electric winning device 32" + K54 x "first Ratio of the total number of game balls (K51 + K52 + K53 + K54 + K55) discharged from the skill area PA during the normal period (K51 + K52 + K53 + K54 + K55) In the configuration in which the 51st parameter is calculated, if the winning probability of the small hit result fluctuates according to the setting state of the pachinko machine 10, the normal value of the 51st parameter fluctuates according to the setting state of the pachinko machine 10. It becomes. Therefore, it is preferable that the history information used for calculating the 51st parameter is deleted when the setting state of the pachinko machine 10 is changed. On the other hand, when the winning probability of the small hit result does not change according to the set state of the pachinko machine 10, the normal value of the 51st parameter does not change according to the set state of the pachinko machine 10. Therefore, it is preferable that the history information used for calculating the 51st parameter is not deleted even if the setting state of the pachinko machine 10 is changed.

(4) In the first to fourth embodiments, the history information corresponding to the occurrence of the open / close execution mode is stored in the history memory 117 regardless of the type of jackpot result. Therefore, the history information corresponding to the type of jackpot result may be stored in the history memory 117. In this case, a parameter indicating the frequency of occurrence may be calculated for each type of jackpot result. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(5) In the first to fourth embodiments, various parameters (first to eighth parameters, eleventh to eighteenth parameters, 21st to 26th parameters, 31st parameter and 41st to 42nd parameters are periodically used. Parameters) are calculated, but the configuration is not limited to this. For example, when the total number of game balls discharged from the game area PA becomes the number of calculation triggers (for example, 10,000), various parameters are calculated. The configuration may be such that various parameters are calculated when the supply of operating power to the pachinko machine 10 is stopped, and the number of times the game is executed is the number of calculation triggers (for example, 1000 times). In some cases, various parameters may be calculated. In this case, the history memory 117 may be cleared to "0" at the timing when various parameters are calculated. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(6) In the first to fourth embodiments, each time the calculation timing of various parameters is reached, the first to eighth parameters, the eleventh to eighteenth parameters, the 21st to the 26th parameters, the 31st parameter and the thirteenth parameter are used. All of the 41st to 42nd parameters are calculated, but the configuration is not limited to this, and only a part of the above various parameters is calculated at one calculation timing, and each time the calculation timing is reached. The parameter group to be calculated may be sequentially changed. For example, at one calculation timing, the first to eighth parameters are calculated, at the next calculation timing, the eleventh to eighteenth parameters are calculated, at the next calculation timing, the 21st to 26th parameters are calculated, and the next calculation is performed. In the timing, the 31st parameter and the 41st to 42nd parameters are calculated, and after that, the calculation target may be repeatedly changed in the above order each time the calculation timing is reached. As a result, it is possible to reduce the processing load for calculating the parameter when one calculation timing is reached. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(7) In the first to fourth embodiments, the operation of various parameters using the history information of the history memory 117 may be executed on condition that the game is being played. For example, the calculation of various parameters may be executed on condition that the game ball is supplied to the game area PA. As a result, it is possible to prevent the calculation of various parameters from being unnecessarily repeated even though the game is not performed. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(8) In the first to fourth embodiments, the configuration is not limited to the configuration in which the management IC 66 is provided separately from the main CPU 63, and the function of the management IC 66 is performed by the main CPU 63. It may be configured. In this case, the correspondence information is stored in the main ROM 64 in advance. Further, the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be provided separately from the main RAM 65, and the history memory 117, the calculation result memory 131, and the separate storage memory 171 may be provided in the main RAM 65. The configuration may be such that the function of the storage memory 171 is fulfilled. In a configuration in which the functions of the history memory 117, the calculation result memory 131, and the separate storage memory 171 are fulfilled in the main RAM 65, when the main RAM 65 clear processing (step S105, step S117) is executed, the history is used. A part or all of the area corresponding to each of the memory 117, the calculation result memory 131, and the separate storage memory 171 may be cleared to "0", and the history memory 117, the calculation result memory 131, and the separate storage may be saved separately. The area corresponding to each of the memory 171 is excluded from the target of "0" clearing, and "0" may be cleared when the corresponding clearing condition in each of the above embodiments is satisfied. Further, even if the main RAM 65 has a configuration in which the manual operation content for executing the clear process is different between the area corresponding to each of the history memory 117, the calculation result memory 131, and the separate storage memory 171 and the other areas. good. Further, the function of the management IC 66 may be fulfilled by the voice emission control device 81.

(9) When a new setting state of the pachinko machine 10 is made in the first to fourth embodiments, the history information in the history memory 117 is stored and retained without being erased, while the calculation is performed. Various parameters stored in the result memory 131 may be erased. This makes it possible to prevent the notification of various parameters calculated before the setting is made after the new setting of the setting state is made. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(10) In the third to fifth embodiments, even if a new setting of the setting state of the pachinko machine 10 is made (that is, even if the setting value update process is executed by the main CPU 63), the said If the set value is not changed before and after the setting, the clearing process of the history memory 117 may not be executed. As a result, it is possible to prevent the history information of the history memory 117 from being deleted even though the set value has not been changed.

In this configuration, the area for storing the set value in the main RAM 65 is excluded from the target of "0" clear even if the clear process (step S117) is executed, so that the set value update process (set value update process) It is possible for the main CPU 63 to specify whether or not the set value has been changed before and after step S118). In this case, when it is specified that the set value has not been changed by the main CPU 63, a signal is output to the management CPU 112 so that the setting update recognition process is not executed by the management CPU 112, and the main CPU 63 When it is specified that the set value has been changed, the management side CPU 112 may output a signal to the management side CPU 112 so that the setting update recognition process is executed.

Further, when a signal indicating that the setting state of the pachinko machine 10 has been newly set is received from the main CPU 63, the management side CPU 112 can refer to the history information stored in the history memory 117. It may be configured to specify whether or not the set value has been changed. In this case, when it is specified that the set value has not been changed by the management side CPU 112, the clearing process of the history memory 117 is not executed, and it is specified that the set value has been changed by the management side CPU 112. In that case, it is possible to execute the clearing process of the history memory 117.

(11) In the third to fifth embodiments, even if a new setting of the setting state of the pachinko machine 10 is performed (that is, even if the setting value update process is executed by the main CPU 63), the said If the set value is not changed before and after the setting, the arithmetic processing of various parameters triggered by the new setting of the setting state may not be executed. As a result, even though the set value has not been changed, it is possible to prevent various parameters from being calculated as a result of the new setting in the set state.

In this configuration, the area for storing the set value in the main RAM 65 is excluded from the target of "0" clear even if the clear process (step S117) is executed, so that the set value update process (set value update process) It is possible for the main CPU 63 to specify whether or not the set value has been changed before and after step S118). In this case, when it is specified that the set value has not been changed by the main CPU 63, a signal is output to the management CPU 112 so that the setting update recognition process is not executed by the management CPU 112, and the main CPU 63 When it is specified that the set value has been changed, the management side CPU 112 may output a signal to the management side CPU 112 so that the setting update recognition process is executed.

Further, when a signal indicating that the setting state of the pachinko machine 10 has been newly set is received from the main CPU 63, the management side CPU 112 can refer to the history information stored in the history memory 117. It may be configured to specify whether or not the set value has been changed. In this case, when it is specified that the set value has not been changed by the management side CPU 112, the operation of various parameters triggered by the new setting of the current setting state is not executed, and the management side CPU 112 sets the setting value. When it is specified that the value has been changed, it is possible to execute various parameter operations triggered by the new setting of the current setting state.

(12) In the third to fifth embodiments, when a new setting state of the pachinko machine 10 is made, various parameters may be calculated in various arithmetic processes (step S1807) at that time. Instead, various parameters stored in the calculation result memory 131 at that time are stored in the storage target area of the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 and the calculation is performed. The information stored in the result memory 131 may be cleared to "0". In this case, since it is not necessary to calculate various parameters under the condition that the setting state of the pachinko machine 10 is newly set, it is possible to complete the storage of various parameters in the separate storage memory 171 at an early stage. Become.

(13) In the third to fifth embodiments, the contents of various parameters stored in the first to fifth separate storage areas 172 to 176 of the separate storage memory 171 are displayed by performing a predetermined display start operation. It may be configured to be displayed on the first to third notification display devices 69a to 69c or other display devices. The predetermined display start operation may be performed by operating a dedicated operation unit, or may be performed by performing a predetermined dedicated operation on the operation unit for performing other operations. This makes it possible to easily check various parameters stored in the separate storage memory 171.

(14) The out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34 are all configured to store history information (or ball entry history). The history information is stored only in a part of the out port 24a, the general winning port 31, the special electric winning device 32, the first operating port 33, and the second operating port 34. May be. For example, the configuration may be such that only the general winning opening 31, the special electric winning device 32, and the second operating port 34 are the storage targets of the history information, and only the general winning opening 31 is the storage target of the history information. Good. Even in this case, it is possible to grasp the ball entry mode of the game ball in a predetermined period for the ball entry portion for which the history information is stored.

(15) A signal path for transmitting information corresponding to the entry result of the game ball in correspondence with each of the first winning opening detection sensor 42a, the second winning opening detection sensor 43a, and the third winning opening detection sensor 44a. Although 118a to 118c are set, the configuration is not limited to this, and the information corresponding to the ball entry result for the same type of ball entry section includes a plurality of ball entry sections of the same type. In addition, even if a plurality of ball entry detection sensors are present in accordance with the configuration, the information may be transmitted as one type of information. This makes it possible to reduce the number of types of information transmitted from the main CPU 63 to the management IC 66.

(16) In the first to 14th embodiments, the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and the buffers 122a to 122o is for management from the main CPU 63. The configuration is such that the information is transmitted to the IC 66, but the present invention is not limited to this, and the correspondence information may be stored in advance in the management IC 66. In this case, it is not necessary to execute the process for causing the management IC 66 to recognize the correspondence information, so that the processing load on the main CPU 63 can be reduced.

(17) In the first to fourth embodiments described above, the management IC 66 from the main CPU 63 of the correspondence information indicating the correspondence between the types of information transmitted from the main CPU 63 to the management IC 66 and the buffers 122a to 122o. The configuration is such that transmission to the main CPU 63 is performed at the start of supply of operating power to the main CPU 63, but the present invention is not limited to this. For example, the main CPU 63 and the management IC 66 can be bidirectionally communicated with each other for management. When a signal requesting transmission of correspondence information is received from the IC 66, the correspondence information may be transmitted from the main CPU 63 to the management IC 66. In this case, the correspondence memory 116 is provided as a non-volatile memory and is used for both reading and writing, and the correspondence information provided from the main CPU 63 to the management IC 66 after the shipment of the pachinko machine 10 is sent to the main CPU 63. Even if the supply of operating power is stopped, the memory 116 for correspondence is stored and held. This makes it possible to reduce the frequency with which correspondence information is transmitted.

(18) In the first to 14th embodiments, the management IC 66 from the main CPU 63 of the correspondence information indicating the correspondence between the type of information transmitted from the main CPU 63 to the management IC 66 and the buffers 122a to 122o. The signal to the ball is transmitted using the signal paths 118a to 118g for transmitting the detection result information of the ball entry detection sensors 42a to 48a, but the configuration is not limited to this, and the correspondence is not limited to this. A configuration may be provided in which a dedicated signal path for transmitting information from the main CPU 63 to the management IC 66 is provided. As a result, the management IC 66 can grasp which type of information is being received from the main CPU 63 by the types of buffers 122a to 122o that receive the information.

(19) In the first to fourth embodiments described above, information is transmitted from the main CPU 63 to the management IC 66, but information is not transmitted from the management IC 66 to the main CPU 63, but the configuration is limited to this. Information may be transmitted from the management IC 66 to the main CPU 63. For example, various parameters calculated by the management side CPU 112 based on the history information may be transmitted to the main side CPU 63. In this case, the main CPU 63 may be configured to directly execute the notification control of the notification means in order to perform the notification corresponding to the contents of the various received parameters, and the main CPU 63 may receive various types of notifications. By transmitting a command corresponding to the content of the parameter to the voice emission control device 81, the notification corresponding to the content of various parameters is executed by using the symbol display device 41, the display light emission unit 53, and the speaker unit 54. It may be configured to be used.

(20) When the supply of the operating power to the main CPU 63 is started in the first to the fourteenth embodiments, the main CPU 63 or the management CPU 112 is notified based on the history information stored in the history memory 117. Various parameters may be calculated, and the contents of the calculated parameters may be notified by using the symbol display device 41, the display light emitting unit 53, the speaker unit 54, and the like. In this case, it is possible to confirm whether or not the ball entering mode of the game ball in the game area PA on the immediately preceding business day is normal at the start of business of the game hall. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(21) When various parameters calculated based on the history information stored in the history memory 117 in the first to fourth embodiments are abnormal results, the pachinko machine 10 is used until the prohibition release operation is performed. It may be configured so that the game cannot be started at. As a configuration for preventing the start of the game, for example, the launch of the game ball may be prohibited, the ball entry detection sensors 42a to 49a may be disabled, and the first operating port may be disabled. Even if a prize is won in the 33 or the second operating port 34, the winning / failing determination process may not be executed. Further, the prohibition release operation may be an operation of turning on the power of the pachinko machine 10 again while the reset button 68c is pressed, and can be operated when the game machine main body 12 is opened with respect to the outer frame 11. It may be the operation of the operating means. This makes it possible to prevent the game from being played as it is in a situation where the ball entering mode of the game ball in the game area PA is an abnormal mode. In addition, it is possible to prevent the game from being played as it is in a situation where the frequency of occurrence of the opening / closing execution mode is abnormal. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(22) In the first to fourth embodiments, the history information corresponding to the detection results of the ball entry detection sensors 42a to 48a is stored in the history memory 117, but the calculation of various parameters using the history information is performed. The configuration may not be executed by either the main CPU 63 or the management CPU 112. In this case, the history information is read by an external device electrically connected to the reading terminal 68d, and the operator of the reading operation executes various parameter calculations using the read history information. Often, the external device may be configured to execute various parameter calculations using the read history information. In this case, it is possible to reduce the processing load of the main CPU 63 and the management CPU 112. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(23) In the first to fourth embodiments, the management IC 66 is provided with a power source separate from the main CPU 63, and even if the supply of operating power to the main CPU 63 is stopped, the management IC 66 In the configuration, it is possible to calculate various parameters using the history information and output the history information or the information of the various parameters. As a result, history information and various parameters can be read by an external device even when the supply of operating power to the main CPU 63 is stopped.

(24) In the first to fourth embodiments, the reading terminal 68d used for reading a program from the main ROM 64 is also used as a terminal used for reading history information or various parameters with an external device. However, the configuration is not limited to this, and the terminal used for reading the history information or various parameters by the external device is the reading terminal 68d for reading the program from the main ROM 64. It may be a separately provided configuration. In this case, the terminal used for reading the history information or various parameters may be provided in the MPU 62, or may be provided in a position different from the MPU 62 in the main control board 61.

(25) In the first to fourth embodiments, the correspondence-related memory 116, the history memory 117, and the calculation result memory 131 are limited to the configuration provided as the non-volatile storage means such as the flash memory. However, for example, any of these memories 116, 117, and 131 is provided as a volatile storage means that requires power supply for storing and holding information, and the backup power is supplied to the memory on the main side. Even if the supply of the operating power to the CPU 63 is stopped, the information may be stored and retained. In this case, a dedicated backup power device may be provided for the memory, and the backup power is supplied to the memory from the power supply / emission control device 78 that supplies the backup power to the main RAM 65. May be good.

(26) In the first to fourth embodiments, the management IC 66 includes a management side CPU 112 as a general-purpose CPU, and performs storage processing of history information and calculation processing of various parameters based on the programs and data stored in the management side ROM 113. The configuration is not limited to the configuration to be executed, and a hardware circuit designed to have these functions may be formed in the management IC 66. Specifically, for example, in the case of the first embodiment, the hardware circuit receives a signal from the main CPU 63 indicating that the game ball has been detected by any of the detection sensors 42a to 48a. , The correspondence information corresponding to the buffer that received the signal is stored in the history memory 117 from the correspondence memory 116, and the information of the RTC 115 at that time is stored in the history memory 117. do. Further, for example, in the sixth embodiment, when the hardware circuit receives a signal from the main CPU 63 indicating that the game ball has been detected by any of the detection sensors 42a to 48a, the hardware circuit receives the signal. The value of the counter corresponding to the buffer is added by 1. Further, when the calculation trigger in the first embodiment or the like occurs, the hardware circuit calculates various parameters by using the history information at that time. Further, when an external output trigger to the reading terminal 68d occurs, the hardware circuit externally outputs various parameters that are calculation results and externally outputs history information.

(27) In the first to fourth embodiments, the main CPU 63 and the management IC 66 may be provided as separate chips, may be provided as separate substrates, or may be provided as different control devices. It may be the configuration provided as.

(28) Regarding the entry of game balls into the out port 24a, the number of balls entered is measured, while the number of the game balls such as the general winning opening 31, the special electric winning device 32, the first operating port 33 and the second operating port 34 The history information including the RTC information may be stored for the ball entering the privilege-triggered ball section that triggers the payout of the prize ball and the winning / failing determination process. This makes it possible to extract the entry history of the game ball into the privilege trigger entry section, and calculate the frequency of entry of the game ball into each privilege trigger entry section with respect to the total number of game balls discharged. Become.

(29) The configuration may include events other than those in each of the above embodiments as predetermined events that trigger the storage of historical information. For example, at least one of the timing when the lower plate 56a is full, the timing when the full tank is started, and the timing when the full tank is released may be stored as history information, and the tank 75 may be stored. At least one of the timing when the ball-free state is started, the timing when the ball-free state is released, and the timing when the ball-free state is released may be stored as history information, and the payout device 76 is in an abnormal state. That is, at least one of the timing at which the abnormal state of the payout device 76 is started and the timing at which the abnormal state of the payout device 76 is released may be stored as history information. In this case, it is possible to grasp the frequency of occurrence of these events.

(30) In the first embodiment, the configuration is set in advance at the design stage of the management IC 66 that the 16th buffer 122p of the input port 121 on the management side I / F 111 corresponds to the output instruction signal. However, the present invention is not limited to this, and the fact that the 16th buffer 122p corresponds to the output instruction signal is also recognized by the management IC 66 when the type identification command is transmitted from the main CPU 63. May be. Further, in the first embodiment, the configuration is set in advance at the design stage of the management IC 66 that the 15th buffer 122o of the input port 121 on the management side I / F 111 corresponds to the set value update signal. However, the present invention is not limited to this, and the fact that the 15th buffer 122o corresponds to the set value update signal is also recognized by the management IC 66 when the type identification command is transmitted from the main CPU 63. It may be configured. In this case, it is not necessary to set in advance the correspondence between the buffers 122a to 122p and the types of signals input to the buffers 122a to 122p in the management IC 66.

(31) In the first to fourth embodiments, the management IC 66 may be configured to transmit a normal operation signal to the main CPU 63 when it is operating normally. In this case, it is possible for the main CPU 63 to monitor whether or not the management IC 66 is operating normally.

(32) The display device that displays the set value being updated in the set value update process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41. It may be a dedicated display device. Further, the display device for displaying the set value in the setting confirmation process is not limited to the first to fourth notification display devices 201 to 204, and may be the symbol display device 41, which may be a dedicated display device. It may be.

(33) The operation unit operated to update the set value in the set value update process is not limited to the update button 68b, and may be the reset button 68c. Further, when the setting key is inserted into the setting key insertion unit 68a and the rotation operation is performed, the position corresponding to each of "setting 1" to "setting 6" is set as the rotation operation position, and the setting key is inserted. A set value corresponding to the rotation operation position of the portion 68a may be set. In addition, the setting key insertion unit 68a is configured to be able to rotate further than the ON position, and each time a rotation operation exceeding the ON position is performed, the set value in the middle of updating is changed to the set value in the next order. The configuration may be updated.

(34) In the first to tenth and fifteenth to twenty-first embodiments, the first to third notification display devices 69a to 69c are provided side by side, but they are arranged side by side in the vertical direction. It may be configured so as to be arranged diagonally, or it may be arranged side by side so as to have two upper and lower stages. Further, in the above-mentioned 11th to 14th embodiments, the first to fourth notification display devices 201 to 204 are provided side by side, but they may be arranged side by side in the vertical direction, and may be obliquely arranged. It may be arranged side by side, or it may be arranged side by side so as to have two upper and lower stages. Further, in the fifteenth to twenty-first embodiments, the first to fourth notification display devices 201 to 204 may be used as the display device for displaying the management result of the game history.

(35) History information used for calculating a parameter in which the normal value fluctuates according to the setting state of the pachinko machine 10 in the first to fourth embodiments (hereinafter, referred to as history information of the fluctuation target). ) And the history information used to calculate the parameters whose normal values do not fluctuate according to the setting state of the pachinko machine 10 (hereinafter referred to as non-variable target history information) are different areas in the history memory 117. It may be a configuration that is stored in. In this case, when the setting state of the pachinko machine 10 is newly set or when the setting state of the pachinko machine 10 is changed, the area in which the history information of the fluctuation target is stored in the history memory 117 is “0”. On the other hand, the area in which the history information of the non-variable target is stored in the history memory 117 may be configured to be "0" and not cleared. As a result, the parameter calculation whose normal value fluctuates according to the set state of the pachinko machine 10 can be performed accurately even after the set value is changed, and the normal value does not fluctuate according to the set state of the pachinko machine 10. The accuracy of parameter calculation can be improved. Further, the configuration may be applied to the fifteenth to 42nd embodiments.

(36) In the fifteenth to twenty-first embodiments, the stack area 222 for specific control and the stack area 224 for non-specific control may not be designated in advance in the main RAM 65. Even in this case, the area corresponding to these stack areas 222 and 224 is designated as the main RAM 65 at the design stage of the pachinko machine 10, but the area is designated beyond the storage capacity of the area. When the information storage process is executed, the originally unplanned information is written in the originally unplanned area. Therefore, the main RAM 65 may be cleared to "0".

(37) In the fifteenth to twenty-first embodiments, when the clearing process (step S105, step S117) of the main RAM 65 is executed, the work area 221 for specific control and the stack area 222 for specific control are ". Although "0" is cleared, the work area 223 for non-specific control and the stack area 224 for non-specific control are configured so that "0" is not cleared. Instead, the main RAM 65 is cleared (step S105, step S105, In step S117), not only the work area 221 for specific control and the stack area 222 for specific control but also the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". .. Further, in the clearing process of the main RAM 65 (step S105, step S117), not only the work area 221 for specific control and the stack area 222 for specific control but also the counter area 231 for normal use, the counter area 232 for open / close execution mode, and high frequency. Although the counter area 233 for the support mode is cleared to "0", the calculation result storage area 234 may not be cleared to "0". In this case, it is possible to protect the information stored in the calculation result storage area 234.

(38) In the fifteenth to twenty-fifth embodiments, the operation for clearing the work area 221 for specific control and the stack area 222 for specific control "0", and the work area 223 for non-specific control and non-specific control The operation for clearing the stack area 224 for specific control may be different from the operation for clearing "0". For example, when the supply of operating power to the pachinko machine 10 is started while operating the reset button 68c, the work area 221 for specific control and the stack area 222 for specific control are cleared to "0", and the update button 68b is pressed. When the supply of operating power to the pachinko machine 10 is started while operating, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". This makes it possible to selectively delete each piece of information. Further, when the supply of the operating power to the pachinko machine 10 is started while operating both the update button 68b and the reset button 68c in the configuration, the work area 221 for the specific control and the stack area 222 for the specific control are started. , The work area 223 for non-specific control and the stack area 224 for non-specific control may all be cleared to "0". As a result, in the configuration that enables selective erasing as described above, it is possible to improve workability when erasing information in each area 221 to 224 at once.

(39) In the 15th to 18th and 20th embodiments, as in the 19th embodiment, when the process corresponding to the non-specific control is started, the information of the stack pointer of the main CPU 63 is the work for the non-specific control. The configuration may be such that the saved information is returned to the stack pointer of the main CPU 63 when the saved information is saved in the area 223 and returned to the process corresponding to the specific control. As a result, even if the stack pointer information of the main CPU 63 can fluctuate when the process corresponding to the non-specific control is started, the main side when the process corresponding to the non-specific control ends. It is possible to return the state of the stack pointer of the CPU 63 to the state before the processing corresponding to the non-specific control is started.

(40) In the fifteenth to twenty-fifth embodiments, a process for collecting game history information as a process corresponding to non-specific control, a process for calculating various parameters using the collected history information, and a process thereof. The configuration is such that the processing for notifying the calculation result is executed, but only a part of these processing is executed as the processing corresponding to the non-specific control, and the others are executed as the processing corresponding to the specific control. May be. In addition to or in place of the process for collecting game history information, the process for calculating various parameters using the collected history information, and the process for notifying the calculation result, other than these processes. The process may be configured to be executed as a process corresponding to the non-specific control. For example, at least one of the fraud monitoring and the notification of the monitoring result may be executed as a process corresponding to the non-specific control.

(41) In the fifteenth to twenty-fifth embodiments, when returning to the process corresponding to the specific control from the situation where the process corresponding to the non-specific control is executed by the main CPU 63, the flag register of the main CPU 63, Neither the stack pointer nor the various registers are saved in the main RAM 65, but instead of this, the process corresponding to the specific control is changed from the situation where the process corresponding to the non-specific control is executed by the main CPU 63. When returning, at least a part of the information of the flag register, stack pointer, and various registers of the main CPU 63 is saved in the main RAM 65, and the saved information is restarted in the process corresponding to the non-specific control. In some cases, the configuration may be such that the output is returned to the corresponding storage area of the main CPU 63. As a result, the information of the main CPU 63 used in the processing corresponding to the non-specific control can also be carried over and used.

(42) In the fifteenth to twenty-fifth embodiments, various parameters are calculated when the total number of game balls discharged from the game area reaches 6000. The total number of game balls may be more than 6000 or less than 6000. For example, various parameters may be calculated when the total number of game balls discharged from the game area reaches 60,000. In this case, the storage capacity required for storing the game history information is increased, but the game history information is stored in the management RAM 241 externally attached to the MPU 62 as in the 21st embodiment. By adopting a storage configuration, it is possible to flexibly respond to an increase in the storage capacity.

(43) In the 15th to 25th embodiments, the 61st to 68th parameters are calculated as the management result of the game history, but in addition to or instead of this, the 31st in the first embodiment. At least a part of the parameter, the 41st parameter and the 42nd parameter may be calculated.

(44) When the process of newly setting the setting state of the pachinko machine 10 is executed in the fifteenth to twenty-fifth embodiments, or when the setting state of the pachinko machine 10 is changed, the work area 221 for specific control is executed. In addition to the stack area 222 for specific control, the work area 223 for non-specific control and the stack area 224 for non-specific control may be cleared to "0". In this case, when the process of newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the normal counter area 231 and the open / close execution mode counter area 232 are frequently used. The support mode counter area 233 and the calculation result storage area 234 are cleared to "0".

Further, when the process of newly setting the setting state of the pachinko machine 10 is executed or the setting state of the pachinko machine 10 is changed, not only the work area 221 for specific control and the stack area 222 for specific control but also Although the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 are cleared by "0", the calculation result storage area 234 may not be cleared by "0". In this case, it is possible to protect the information stored in the calculation result storage area 234.

Further, when the process of newly setting the setting state of the pachinko machine 10 is executed or the setting state of the pachinko machine 10 is changed, the work area 221 for the specific control and the stack area 222 for the specific control are set to "0". The work area 223 for non-specific control and the stack area 224 for non-specific control may be configured to be cleared but not cleared to "0". In this case, it is possible to protect the information stored in the work area 223 for non-specific control and the stack area 224 for non-specific control.

Further, in the case of providing the configuration of the above (43), when the process of newly setting the setting state of the pachinko machine 10 is executed or when the setting state of the pachinko machine 10 is changed, the above first. Although the history information for calculating the 31st parameter, the 41st parameter, and the 42nd parameter in the embodiment is deleted, the normal counter area 231, the open / close execution mode counter area 232, and the high frequency support mode counter area 233 are deleted. And the calculation result storage area 234 may be configured so that "0" is not cleared.

(45) In the first to 42nd embodiments, the total number of game balls discharged from the game area PA is used instead of the configuration in which the total number of game balls discharged from the game area PA is used to calculate various parameters. The total number of game balls supplied may be used. In this case, for example, a detection sensor is provided so as to detect a game ball that has been launched from the game ball launching mechanism 27 and has reached the game area PA, and the game ball supplied to the game area PA based on the detection result of the detection sensor. It may be configured to measure the number. In this configuration, since it is not necessary to measure the number of game balls discharged from the out port 24a, the out port detection sensor 48a may not be provided.

(46) In the fifteenth to 42nd embodiments, at least a part of the information of various registers and the stack pointer of the main CPU 63 is relative to the stack area 222 for specific control or the stack area 224 for non-specific control. It may be configured to be saved by a load command. In this case, it is necessary to update the information of the stack pointer of the main CPU 63 when saving the information to the stack areas 222 and 224. Further, the information saved in the stack areas 222 and 224 may be returned to the corresponding storage area of the main CPU 63 by the load instruction. Also in this case, it is necessary to update the information of the stack pointer of the main CPU 63 when the information is returned from the stack areas 222 and 224.

(47) When the set value update process is executed in each of the above embodiments, the corresponding notification may be performed by any of the symbol display device 41, the display light emitting unit 53, and the speaker unit 54. As a result, the manager of the game hall can clearly grasp that the set value update process is being executed.

(48) In each of the above embodiments, the history of newly set set values may be stored in the main RAM 65. Further, the history of newly set set values may be stored in the RAM provided in the voice emission control device 81. In this case, every time the set value update process is completed, a command including the information of the set value set in the set value update process is transmitted from the main CPU 63 to the voice emission control device 81, so that the voice emission control device Each time the 81 receives the command, the information indicating that the set value is newly set and the information indicating the set value at that time are cumulatively stored in the RAM of the voice emission control device 81. When a predetermined operation is performed in the configuration, the symbol display device 41 may display the setting history of the set values cumulatively stored in the RAM of the voice emission control device 81.

(49) In each of the above embodiments, when the set value is newly set by the set value update process, the information indicating the number of game balls to be paid out stored in the payout control device 77 is not deleted. However, instead of this, the information indicating the number of game balls to be paid out may be deleted. In addition, if the set value update process is executed but the set value is not changed, the information indicating the number of game balls to be paid out is not deleted, and if the set value is changed, the payout is scheduled. The information indicating the number of game balls may be deleted.

(50) If the set value update process is executed in each of the above embodiments but the set value is not changed, each area 221 to 224 of the main RAM 65 is not cleared to "0", and the set value is set. When changed, at least a part of each area 221 to 224 of the main RAM 65 may be cleared to "0". For example, when the set value is changed, the area other than the set value counter may be cleared to "0" in the work area 221 for specific control.

(51) Even in a situation where the main CPU 63 executes the process for confirming the set value in the process for confirming the setting (FIG. 87) in the 22nd to 42nd embodiments, it is profitable for the game. The operation of the moving object involved may be continued. For example, a V zone and a non-V zone are provided in the ball entry means that can enter the ball in the open / close execution mode, and the game ball that has entered the ball entry means is distributed to either the V zone or the non-V zone. In the configuration including the distribution member, the operation of the distribution member may be continued even in the situation where the process for confirming the set value is executed in the setting confirmation process. In this case, even if an attempt is made to stop the operation of the distribution member by illegally generating a situation in which the process for confirming the set value is executed in the process for confirming the setting, it is possible to disable it. In addition to the above-mentioned distribution member, as a movable object whose operation is continued even when the process for confirming the set value is executed in the setting confirmation process, the ball is inserted into the ball entry means. A game ball in either an advantageous port in which a round game is generated after the game ball enters, or an outlet in which the game ball entered in the ball entry means is discharged without entering the advantageous port. A distribution member for distributing the above can be considered.

(52) In the 22nd to 42nd embodiments, at least one of the work area 223 for non-specific control and the stack area 224 for non-specific control may be configured not to be monitored for information abnormality. In this case, even if it is specified that an information abnormality has occurred in the work area 221 for specific control and the stack area 222 for specific control, the work area 223 for non-specific control and the stack area for non-specific control By configuring the 224 not to clear "0", the situation where the work area 223 for non-specific control and the stack area 224 for non-specific control are not cleared "0" based on the occurrence of an information abnormality does not occur. It becomes possible to do.

(53) In the 22nd to 42nd embodiments, there is an information abnormality in the work area 221 for specific control, the stack area 222 for specific control, the work area 223 for non-specific control, and the stack area 224 for non-specific control. The configuration may be such that all monitoring of whether or not it has occurred is executed by a process corresponding to non-specific control. Further, the process for clearing "0" in each area 221 to 224 when an information abnormality occurs may be executed by the process corresponding to the non-specific control.

(54) In each of the above embodiments, the main RAM 65 needs to be supplied with electric power to store and hold information, and backup power is supplied to the main RAM 65 even when the power of the pachinko machine 10 is OFF. However, the main RAM 65 may be a non-volatile memory that does not require power supply for storing and holding information.

(55) In each of the above embodiments, in various clearing processes of the main RAM 65, the target area of the main RAM 65 is initialized by executing a process of clearing "0" and a process of initializing the target area. Instead of, the target area may be initialized by executing the initial setting process without executing the process of clearing "0".

(56) In each of the above embodiments, when the supply of the operating power to the main CPU 63 is started and the setting key insertion unit 68a is turned on, the set value update process is executed without requiring another operation. It may be configured to be. Further, instead of the setting key insertion unit 68a that is turned on / off by the setting key, a setting switch that is directly turned on / off by hand may be provided. Further, if the setting key insertion unit 68a is not provided and the reset button 68c is pressed when the supply of operating power to the main CPU 63 is started, the set value does not require any other operation. The update process may be executed. In this case, a cover member may be provided so that the reset button 68c can be switched between a closed state that covers the reset button 68c and an open state that does not cover the reset button 68c. May be provided.

(57) A configuration in which the selected set value is fixed and the set value update process is terminated when the state in which the setting key insertion unit 68a is operated to the OFF position in the set value update process is held for a predetermined period of time. May be. Further, when the end reference period (for example, 5 minutes) elapses from the start of the set value update process, the selected set value is automatically determined and the set value update process is terminated. Further, when the update button 68b or the reset button 68c is pressed for a long time for the end reference period (for example, 10 seconds) or longer in the set value update process, the selected set value is confirmed and the set value update process is terminated. It may be configured.

(58) The setting key insertion unit 68a is configured to be able to rotate further than the ON position, and each time the rotation operation beyond the ON position is performed, the set value in the middle of updating is the set value in the following order. In the configuration updated to, when the supply of operating power to the main CPU 63 is started in the situation where the setting key insertion unit 68a is operated to the ON position, the setting confirmation process that enables the confirmation of the set value is started. The setting confirmation process may be terminated when the setting key insertion unit 68a is operated to the OFF position. Further, when the supply of the operating power to the main CPU 63 is started in the state where the update button 68b or the reset button 68c is pressed, the setting confirmation process that enables the confirmation of the set value is started, and the button is pressed. The setting confirmation process may be terminated when the pressing operation is released. Further, in a configuration in which a setting switch that is directly turned on / off by hand is provided instead of the setting key insertion unit 68a that is turned on / off by the setting key, the setting switch is mainly turned on. When the setting confirmation process that enables confirmation of the set value is started when the supply of operating power to the side CPU 63 is started, and the setting switch is turned OFF or turned ON after the OFF operation. The configuration may be such that the setting confirmation process is completed. Further, in a configuration in which a setting switch that is directly turned on / off by hand is provided instead of the setting key insertion unit 68a that is turned on / off by the setting key, the setting switch is mainly turned on. As a configuration in which the setting confirmation process that enables confirmation of the set value is started when the supply of operating power to the side CPU 63 is started, and the setting confirmation process is terminated when the reset button 68c is pressed. May be good.

(59) When the setting confirmation process or the set value update process is executed in each of the above-described embodiments, the image corresponding to the procedure may be performed on the symbol display device 41, and the configuration may be assisted. The sound corresponding to the procedure may be output from the speaker unit 54. For example, in the set value update process (FIG. 116) in the 33rd embodiment, the set value is changed by one step by pressing the reset button 68c, and the set value is set by turning off the setting key insertion unit 68a. The configuration may be such that it is notified that the update process (FIG. 116) is completed. This makes it easier to update the set value. Since the display control of the symbol display device 41 and the sound output control of the speaker unit 54 are performed by the voice emission control device 81, when the setting confirmation process or the set value update process is started, a command corresponding to the command is issued. When it is transmitted from the main CPU 63 and the setting confirmation process or the set value update process is completed, it is necessary to transmit the corresponding command from the main CPU 63.

(60) Display control based on the command transmitted from the main control device 60 instead of the configuration in which the display control device 82 is controlled by the voice emission control device 81 based on the command transmitted from the main control device 60. The device 82 may be configured to control the voice emission control device 81. Further, instead of the configuration in which the voice emission control device 81 and the display control device 82 are separately provided, a configuration in which both control devices are provided as one control device may be used, and the function of one of the two control devices may be provided. May be integrated in the main control device 60, and both functions of both control devices may be integrated in the main control device 60. Further, the configuration of the command transmitted from the main control device 60 to the voice emission control device 81 and the configuration of the command transmitted from the voice emission control device 81 to the display control device 82 are also arbitrary.

(61) Other types of pachinko machines different from the above embodiments, for example, pachinko machines in which the electric accessory is opened a predetermined number of times when the game ball enters a specific area of the special device, or a game ball in a specific area of the special device. The present invention can also be applied to a pachinko machine, which is a big hit when a right is entered, a pachinko machine equipped with other accessories, an arrange ball machine, a game machine such as a sparrow ball, and the like.

In addition, a non-ballistic gaming machine, for example, a plurality of reels having a plurality of types of symbols attached in the circumferential direction is provided, the reels are started to rotate by inserting medals and operating the start lever, and the stop switch is operated. After the reels have stopped after a predetermined time has passed, if a specific symbol or a combination of specific symbols is established on the effective line that can be seen from the display window, a privilege such as a medal payout is given to the player. The present invention can also be applied to slot machines.

In addition, the game machine main body supported by the outer frame so as to be openable and closable is provided with a storage unit and a take-in device, and the start lever is operated after a predetermined number of game balls stored in the storage unit are taken in by the take-in device. The present invention can also be applied to a gaming machine in which a pachinko machine and a slot machine are fused, which starts the rotation of the reel.

Historical information on the result of the lottery process of the winning combination executed when the present invention is applied to a slot machine or a game machine in which a pachinko machine and a slot machine are fused, for example, when one game is started based on the operation of the start lever. It may be configured to calculate the actual winning probability of each role by using the history information, and when a transition to a special game state such as a bonus game occurs, it is stored as history information and the history. The information may be used to calculate the actual transition probability to the special gaming state, or the ratio of the number of staying games in the special gaming state to the total number of digested games may be calculated. Then, the history information and various parameters may be readable by an external device, or the gaming machine itself may perform notification corresponding to the calculation results of the various parameters. Further, a configuration in which a plurality of stages of setting states such as "setting 1" to "setting 6" exist, and the winning probability in the winning combination in the lottery process may be changed according to the setting state. In this case, the configuration in each of the above embodiments may be applied with respect to the handling of history information, the calculation of various parameters, and the handling of repeated changes when the setting of the setting state is newly set or the set value is changed. ..

(62) The characteristic configurations of the first to 42nd embodiments may be applied to each other in any combination. For example, the characteristic configuration of the first embodiment, the characteristic configuration of the sixth embodiment, the characteristic configuration of the tenth embodiment, and the characteristic configuration of the thirtieth embodiment. The configuration may be combined, the characteristic configuration of the second embodiment, the characteristic configuration of the fourth embodiment, the characteristic configuration of the eighth embodiment, and the eleventh embodiment. The characteristic configuration of the first embodiment and the characteristic configuration of the fifteenth embodiment may be combined with the characteristic configuration of the thirty-third embodiment. , The characteristic configuration of the 21st embodiment, the characteristic configuration of the 29th embodiment, and the characteristic configuration of the 34th embodiment may be combined. The characteristic configuration of the second embodiment, the characteristic configuration of the sixteenth embodiment, the characteristic configuration of the 22nd embodiment, and the characteristic configuration of the 35th embodiment. It may be combined with the characteristic configuration of the 39th embodiment. Further, the configuration of the other embodiment may be applied in any combination to the configuration in which the characteristic configurations of the first to 42nd embodiments are applied in a predetermined combination.

<About the invention group extracted from each of the above embodiments>
Hereinafter, the characteristics of the invention group extracted from each of the above-described embodiments will be described while showing the effects and the like as necessary. In the following, for the sake of easy understanding, the corresponding configurations in each of the above embodiments are appropriately shown in parentheses or the like, but the present invention is not limited to the specific configurations shown in the parentheses or the like.

<Characteristic A group>
Features A1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
Information erasing means (third) for erasing at least a part of the history information stored in the history storage means, provided that the set value to be used is set by the setting means. In the fifth embodiment, the function of executing the process of step S1809 in the management side CPU 112, in the fifth embodiment, the function of executing the process of step S2109 in the management side CPU 112, and in the sixth embodiment, steps S2306 to steps in the management side CPU 112. A function of executing the process of S2308, a function of executing the process of step S2608 in the management side CPU 112 in the eighth embodiment), and
A gaming machine characterized by being equipped with.

According to the feature A1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the advantage of the player, the player can use the more advantageous setting value. You will expect it to be. Further, when a predetermined event occurs, the history information corresponding to the occurrence is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

In this case, at least a part of the history information stored in the history storage means is deleted on condition that at least one condition is that the set value to be used is newly set. This makes it possible to adjust the contents of the history storage means so that the frequency of occurrence of a predetermined event in a situation after a new setting value to be used is set can be appropriately managed. ..

Feature A2. A ball entry means (first operating port 33, second operating port 34) capable of entering a game ball flowing down the game area, and
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on the fact that a game ball has entered the ball entry means, and
Grant determination means (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the grant information, and
A privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the granting result that the special information corresponds to the granting information in the grant determination. (Function to execute the processes of S409 to S412) and
With
The gaming machine according to feature A1, wherein the probability of the granting response result changing in the granting determination varies depending on the set value.

According to the feature A2, in a so-called pachinko machine, it is possible to change the probability of a grant correspondence result according to a set value. In this case, by providing the configuration of the above feature A1, the history storage means can suitably manage the occurrence frequency of a predetermined event in the situation after the probability of the grant response result is changed. It is possible to adjust the contents.

Feature A3. The information erasing means is characterized in that all the history information stored in the history storage means is erased on condition that at least one condition is that the set value to be used has been set by the setting means. The gaming machine according to the feature A1 or A2.

According to the feature A3, the setting value to be used is set by deleting all the history information stored in the history storage means when the setting value to be used is newly set. It is possible to specify the frequency of occurrence of a predetermined event based on the newly performed timing.

Feature A4. The information erasing means erases a part of the history information stored in the history storage means, provided that the set value to be used is set by the setting means, at least one condition. The gaming machine according to feature A1 or A2, characterized in that a part of the history information stored in the history storage means is left.

According to the feature A4, when the set value to be used is newly set, the history information unnecessary for the management of the subsequent occurrence frequency of the predetermined event is deleted, and the subsequent management of the occurrence frequency of the predetermined event is performed. It is possible to leave the necessary history information. As a result, it is possible to preferably manage the frequency of occurrence of a predetermined event after the set value to be used is newly set.

Feature A5. The history information stored in the history storage means includes the first history information (history indicating that the opening / closing execution mode has occurred) in which the probability of occurrence of the predetermined event corresponding to the history information varies according to the set value. Information) and second history information (history information indicating that the game ball has been ejected from the game area PA) that does not change according to the set value are included.
The information erasing means erases the first history information stored in the history storage means, provided that the set value to be used is set by the setting means, and the information erasing means erases the first history information stored in the history storage means. The gaming machine according to feature A4, characterized in that the second history information stored in the history storage means is left.

According to the feature A5, when the set value to be used is newly set, the first history information corresponding to the predetermined event whose occurrence probability fluctuates according to the set value is deleted, and the occurrence probability is the set value. The second history information corresponding to the predetermined event that does not change according to the above is not deleted. As a result, when the first history information before the setting value to be used is newly set is taken over after the setting value is newly set, a predetermined event corresponding to the first history information occurs. The first history information, which is not preferable for specifying the frequency, can be deleted when the set value is newly set. On the other hand, the second history information is referred to when specifying the frequency of occurrence of a predetermined event corresponding to the second history information by not deleting the setting value to be used even if it is newly set. Since it is possible to secure a large number of second history information, it is possible to accurately identify the occurrence frequency of a predetermined event corresponding to the second history information.

Feature A6. A ball entry means (first operating port 33, second operating port 34) capable of entering a game ball flowing down the game area, and
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on the fact that a game ball has entered the ball entry means, and
Grant determination means (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the grant information, and
A privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the granting result that the special information corresponds to the granting information in the grant determination. (Function to execute the processes of S409 to S412) and
With
It is a configuration in which the probability of the grant correspondence result in the grant determination changes according to the set value.
The first history information includes information corresponding to the grant of the privilege.
The gaming machine according to feature A5, wherein the second history information includes information corresponding to the ejection of a gaming ball from the gaming area in a predetermined manner.

According to the feature A6, since the probability of granting the privilege changes according to the set value, the first history information should be deleted when the set value to be used is newly set. Then, it becomes possible to specify the frequency of granting the privilege under the situation of the newly set set value. On the other hand, since the frequency with which the game ball is ejected from the game area does not change according to the set value, the second history information is not deleted even if the set value to be used is newly set. It is possible to accurately identify the frequency with which the game ball is ejected from the game area in a predetermined manner.

Feature A7. The information erasing means has at least the history information when the setting value to be used is set by the setting means and the history storage means stores a predetermined amount or more of the history information. The gaming machine according to any one of features A1 to A6, which comprises erasing a part of the gaming machine.

According to the feature A7, when a predetermined amount of history information is not stored in the history storage means, the history information is not deleted even if a new setting value to be used is set. As a result, even if new setting of the set value is repeated in a situation where the game is not performed, it is possible to prevent the history information of the history storage means from being repeatedly deleted.

Feature A8. The history information stored in the history storage means is used to correspond to the result of the game in a predetermined period, provided that the set value to be used is set by the setting means. The information derivation means for deriving the mode information to be performed (in the third embodiment, the function of executing the process of step S1807 in the management side CPU 112, and in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112) is provided. The gaming machine according to any one of features A1 to A7.

According to the feature A8, at least a part of the history information stored in the history storage means is provided with the configuration of the feature A1 and at least one condition is that a new setting value to be used is set. In the configuration to be erased, a mode corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means when a new setting value to be used is set. Information is derived. As a result, even if at least a part of the history information is deleted when the set value is changed, the management result of the game history such as the frequency of occurrence of a predetermined event in the situation before the set value is changed can be grasped. It becomes possible to do.

Feature A9. The gaming machine according to feature A8, which comprises an aspect information storage means (separate storage memory 171) for storing the aspect information derived by the information derivation means.

According to the feature A9, the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means triggered by the new setting of the set value to be used. Is derived, the mode information is stored in the mode information storage means. As a result, even if the set value is changed, it is possible to grasp the management result of the game history in the situation before the set value is changed at an arbitrary timing thereafter.

Feature A10. The gaming machine according to feature A9, wherein the aspect information storage means can store a plurality of the aspect information.

According to the feature A10, since it is possible to store a plurality of mode information in the mode information storage means, the management result of the game history in a plurality of periods can be grasped based on the timing when the set value is newly set. It becomes possible to do. Further, even if new setting of the set value is repeated in a situation where the game is not performed, the mode information derived by using the history information of the situation in which the game is substantially performed is the mode information storage means. It is possible to increase the possibility of remaining in.

Feature A11. The aspect information storage means can store a predetermined number of the aspect information.
The gaming machine is means for executing special processing when the setting value to be used is set by the setting means more than the predetermined number under predetermined conditions (in the third embodiment, the management side CPU 112 The gaming machine according to feature A9 or A10, which comprises a function of executing a repetitive change monitoring process, and a function of executing a repetitive change monitoring process in the main CPU 63 in the fourth embodiment).

According to the feature A11, the set value is set in a situation where the game is not performed so that the mode information derived by using the history information of the situation where the game is substantially performed is not left in the mode information storage means. If the new setting of is repeated, special processing is executed for it. This makes it possible to deal with the act.

Feature A12. The gaming machine according to any one of features A8 to A11, wherein the information deriving means derives the aspect information when a predetermined amount or more of the predetermined history information is stored in the history storage means. ..

According to the feature A12, since the mode information is derived when a predetermined amount or more of the predetermined history information is stored in the history storage means, it is possible to prevent the mode information from being unnecessarily derived. ..

Feature A13. The information erasing means erases the history information from the time when the set value to be used is set by the setting means until the predetermined amount or more of the history information is stored in the history storage means. Before the setting value is set when the predetermined amount or more of the history information is stored in the history storage means after the setting value to be used is set by the setting means. The gaming machine according to any one of features A1 to A12, characterized in that the history information stored in the history storage means is erased.

According to the feature A13, until a specific amount of predetermined history information is newly stored in the history storage means, even if a new setting value to be used is set, it is stored before the setting is made. The history information that has been saved is not deleted. As a result, even if a new set value is set, it is possible to specify the management result of the game history in a predetermined period.

Feature A14. The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192).
The history storage execution means is
When the predetermined event occurs in a predetermined period from the setting of the set value to be used by the setting means to the establishment of the cancellation condition, the corresponding history information is stored in the first history storage means and the first history storage means. A means for storing in both of the second history storage means (a function of executing the process of step S2604 in the management side CPU 112) and
When the predetermined event occurs in a period other than the predetermined period, the means for storing the corresponding history information on the side of the first history storage means and the second history storage means set as the storage target. (Function to execute the process of step S2603 in the management side CPU 112) and
With
When the cancellation condition is satisfied, the information erasing means erases the history information stored on the side of the first history storage means and the second history storage means that has been set as the storage target. The gaming machine according to any one of features A1 to A13.

According to the feature A14, until a specific amount of history information is newly stored in the history storage means, even if a new setting value to be used is set, it is stored before the setting is made. The history information is not deleted. As a result, even if a new set value is set, it is possible to specify the management result of the game history in a predetermined period. Further, the effect can be produced only by appropriately changing the history storage means for storing the history information between the first history storage means and the second history storage means.

Feature A15. Using the history information stored on the side of the first history storage means and the second history storage means set as the storage target, the mode information corresponding to the result of the game in a predetermined period is derived. The gaming machine according to feature A14, characterized in that it includes information derivation means (a function of executing the process of step S2703 in the management side CPU 112).

According to the feature A15, even if the history information is stored in both the first history storage means and the second history storage means by newly setting the set value, the mode in which the history information is used is used. Information can be derived appropriately.

In addition, with respect to the composition of the features A1 to A15, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic B group>
Feature B1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
With
The predetermined history information stored in the history storage means before the setting value to be used is set by the setting means is set to the setting value to be used by the setting means. A gaming machine characterized in that it is stored in the history storage means even after it has been stored.

According to the feature B1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. Further, when a predetermined event occurs, the history information corresponding to the occurrence is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

In this case, even if the set value to be used is newly set, the history information stored in the history storage means is stored and retained without being erased. As a result, even if the set value to be used is set, the history information up to that point can be continuously stored in the history storage means, and is accumulated in the history storage means over a long period of time. It is possible to specify the management result of the game history by using the history information.

Feature B2. When the setting value to be used is set by the setting means, the history storage executing means stores the corresponding history information in the history storage means at the time of setting (first). The game according to feature B1, characterized in that the embodiment has a function of executing the process of step S1307 in the management side CPU 112, and the seventh embodiment has a function of executing the process of step S2408 in the management side CPU 112). Machine.

According to the feature B2, even if the set value to be used is newly set, the set value to be used is newly set in the configuration in which the history information is not erased and is stored and retained. The history information corresponding to this is stored in the history storage means. This makes it possible to distinguish between the history information before the setting value to be used is newly set and the history information after the setting value is newly set.

Feature B3. When the setting value to be used is set by the setting means, the storage executing means at the time of the setting stores the information corresponding to the set setting value in the history storage means as the history information. The gaming machine according to feature B2.

According to the feature B3, it is possible to specify the content of the set value set in the past by referring to the history information.

Feature B4. The history storage means includes a plurality of corresponding history storage means (history memories 181 to 186 for settings 1 to 6) corresponding to each of a plurality of types of setting values that can be set by the setting means. Characteristic The gaming machine according to any one of features B1 to B3.

According to the feature B4, since the correspondence history storage means is provided corresponding to each of the set values, it is possible to store the history information separately for each set value.

Feature B5. When the set value to be used is set by the setting means, the corresponding history storage means corresponding to the set value for which the setting is made is set as the subsequent means for storing the history information (management side). The gaming machine according to feature B4, which comprises a function of executing the process of step S2406 in the CPU 112).

According to the feature B5, when the set value to be used is newly set, the corresponding history storage means corresponding to the set value is set as the storage target of the subsequent history information. Therefore, for each set value. It is possible to distinguish and store history information.

Feature B6. Information deriving means (display output processing in the management side CPU 112) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the corresponding history storage means which is the storage target. The gaming machine according to the feature B5, which is characterized by having a function of executing the above.

According to the feature B6, in the configuration in which the history information is stored separately for each set value, it is possible to derive the mode information corresponding to the currently set set value.

Feature B7. A ball entry means (first operating port 33, second operating port 34) capable of entering a game ball flowing down the game area, and
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on the fact that a game ball has entered the ball entry means, and
Grant determination means (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the grant information, and
A privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the granting result that the special information corresponds to the granting information in the grant determination. (Function to execute the processes of S409 to S412) and
With
The gaming machine according to any one of features B1 to B6, wherein the probability of the granting response result changing in the granting determination varies depending on the set value.

According to the feature B7, in a so-called pachinko machine, it is possible to change the probability that the grant correspondence result will be obtained according to the set value.

It should be noted that, with respect to the configuration of the features B1 to B7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic C group>
Feature C1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
After the setting value to be used is set by the setting means, the history information is not deleted until at least a specific amount or more of the predetermined history information is stored in the history storage means. (A function of executing the processes of steps S2506 and S2605 to S2609 on the management side CPU 112).
A gaming machine characterized by being equipped with.

According to the feature C1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. Further, when a predetermined event occurs, the history information corresponding to the occurrence is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

In this case, until a specific amount of predetermined history information is newly stored in the history storage means, even if a new setting value to be used is set, it is stored before the setting is made. The history information is not deleted. As a result, even if a new set value is set, it is possible to specify the management result of the game history in a predetermined period.

Feature C2. The post-setting response means sets the set value when the predetermined amount of the history information is stored in the history storage means after the set value to be used is set by the setting means. The gaming machine according to feature C1, wherein the history information stored in the history storage means is erased before the operation is performed.

According to the feature C2, when a specific amount of history information that makes it possible to specify the management result of the game history in a predetermined period after the new setting value is set is stored in the history storage means. Deletes the history information stored in the history storage means before the new setting value is set. This makes it possible to prevent unnecessary history information from being continuously stored in the history storage means.

Feature C3. The history storage means includes a first history storage means (first history memory 191) and a second history storage means (second history memory 192).
The history storage execution means is
When the predetermined event occurs, a means for storing the corresponding history information on the side of the first history storage means and the second history storage means set as a storage target (step S2603 in the management side CPU 112). (Function to execute the processing of) and
After the set value to be used is set by the setting means, the predetermined history information is stored on the side of the first history storage means and the second history storage means that is not set as the storage target. Means for storing the history information corresponding to the occurrence of the predetermined event in both the first history storage means and the second history storage means (management side CPU 112) until the specified amount or more is stored. (Function to execute the process of step S2604) in
With
The corresponding means after the setting is
After the set value to be used is set by the setting means, the predetermined history information is stored on the side of the first history storage means and the second history storage means that is not set as the storage target. When the specified amount or more is stored, a means for changing the storage target between the first history storage means and the second history storage means (a function of executing the process of step S2607 in the management side CPU 112) and
After the set value to be used is set by the setting means, the predetermined history information is stored on the side of the first history storage means and the second history storage means that is not set as the storage target. When the specified amount or more is stored, the means for erasing the history information on the side of the first history storage means and the second history storage means that has been set as the storage target (step S2608 in the management side CPU 112). (Function to execute the processing of) and
The gaming machine according to the feature C1 or C2, which comprises the above-mentioned feature C1 or C2.

According to the feature C3, until a specific amount of history information is newly stored in the history storage means, even if a new setting value to be used is set, it is stored before the setting is made. The history information is not deleted. As a result, even if a new set value is set, it is possible to specify the management result of the game history in a predetermined period. Further, the effect can be produced only by appropriately changing the history storage means for storing the history information between the first history storage means and the second history storage means.

Feature C4. Using the history information stored on the side of the first history storage means and the second history storage means set as the storage target, the mode information corresponding to the result of the game in a predetermined period is derived. The gaming machine according to feature C3, characterized in that it includes information derivation means (a function of executing the process of step S2703 in the management side CPU 112).

According to the feature C4, even if the history information is stored in both the first history storage means and the second history storage means by newly setting the set value, the mode in which the history information is used is used. Information can be derived appropriately.

Feature C5. A ball entry means (first operating port 33, second operating port 34) capable of entering a game ball flowing down the game area, and
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on the fact that a game ball has entered the ball entry means, and
Grant determination means (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the grant information, and
A privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the granting result that the special information corresponds to the granting information in the grant determination. (Function to execute the processes of S409 to S412) and
With
The gaming machine according to any one of features C1 to C4, wherein the probability of the granting response result changing in the granting determination varies depending on the set value.

According to the feature C5, in a so-called pachinko machine, it is possible to change the probability that the grant correspondence result will be obtained according to the set value.

It should be noted that, with respect to the configuration of the features C1 to C5, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Feature D group>
Feature D1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
Special execution means for executing special processing on the condition that the setting of the set value to be used by the setting means is executed in a special situation (in the third embodiment, monitoring of repeated changes in the management side CPU 112). A function of executing a process, a function of executing a process of monitoring repeated changes in the main CPU 63 in the fourth embodiment, and a function of making a negative determination in step S2106 of the management CPU 112 in the fifth embodiment).
A gaming machine characterized by being equipped with.

According to the feature D1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. In this case, the special processing is executed on the condition that the new setting of the setting value to be used is executed in the special situation at least one condition. This makes it possible to deal with new setting of the set value under unfavorable circumstances.

Feature D2. The special executing means is characterized in that the special processing is executed on the condition that the setting of the set value to be used by the setting means is executed a specific number of times or more in the special situation. The gaming machine described in.

According to the feature D2, even if a new setting of the set value to be used is executed in the special situation, the special process is not executed if the number of executions is less than the specific number of times. This makes it possible to prevent the special processing from being executed even when a legitimate worker executes a new setting of the set value less than a specific number of times in a special situation.

Feature D3. In the special execution means, as the special situation, the game has not been performed since the setting value to be used has been set by the setting means, or the setting value to be used has been set by the setting means. The special process is to be executed on the condition that the setting of the set value to be used is executed by the setting means in a situation where the game has not been played more than the predetermined reference since the above. Characteristic The gaming machine according to feature D1 or D2.

According to the feature D3, special processing is executed when a new setting value to be used is set in a situation where the game is not performed or the game is not substantially performed. If such an act is performed, it will be possible to deal with it.

Feature D4. The gaming machine according to any one of features D1 to D3, wherein the special execution means executes a notification process as the special process.

According to the feature D4, the notification process is executed under at least one condition that the new setting of the set value to be used is executed in the special situation. This makes it possible to urge the user to deal with a new setting of the set value under an unfavorable situation.

Feature D5. A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
The history information stored in the history storage means is used to correspond to the result of the game in a predetermined period, provided that the set value to be used is set by the setting means. Information derivation means for deriving the mode information (a function of executing the process of step S1807 in the management side CPU 112 in the third embodiment, a function of executing the process of step S2107 in the management side CPU 112 in the fifth embodiment).
The gaming machine according to any one of features D1 to D4.

According to the feature D5, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

In this case, when a new setting value to be used is set, the mode information corresponding to the result of the game in a predetermined period is provided by using the history information stored in the history storage means. Derived. This makes it possible to grasp the management result of the game history such as the frequency of occurrence of a predetermined event in the situation before the set value is changed.

Feature D6. The special executing means derives the aspect information by the information deriving means as the special processing, provided that the setting of the set value to be used is executed by the setting means in the special situation. The gaming machine according to the feature D5, which is characterized in that the above-mentioned game is not performed.

According to the feature D6, even if a new setting value to be used is set, the mode information is not derived if the setting is made in an unfavorable situation. This makes it possible to prevent the aspect information from being unnecessarily derived.

Feature D7. The gaming machine according to feature D5 or D6, which comprises an aspect information storage means (separate storage memory 171) for storing the aspect information derived by the information derivation means.

According to the feature D7, the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means triggered by the new setting of the set value to be used. Is derived, the mode information is stored in the mode information storage means. As a result, even if the set value is changed, it is possible to grasp the management result of the game history in the situation before the set value is changed at an arbitrary timing thereafter.

Feature D8. The gaming machine according to feature D7, wherein the mode information storage means can store a plurality of the mode information.

According to the feature D8, since it is possible to store a plurality of mode information in the mode information storage means, the management result of the game history in a plurality of periods can be grasped based on the timing when the set value is newly set. It becomes possible to do. Further, even if new setting of the set value is repeated in a situation where the game is not performed, the mode information derived by using the history information of the situation in which the game is substantially performed is the mode information storage means. It is possible to increase the possibility of remaining in.

Feature D9. The aspect information storage means can store a predetermined number of the aspect information.
The special executing means is characterized in that the special processing is executed when the setting value to be used is set by the setting means more than the predetermined number in the special situation. Or the gaming machine according to D8.

According to the feature D9, the set value is set in a situation where the game is not performed so that the mode information derived by using the history information of the situation where the game is substantially performed is not left in the mode information storage means. If the new setting of is repeated, special processing is executed for it. This makes it possible to deal with the act.

Feature D10. A ball entry means (first operating port 33, second operating port 34) capable of entering a game ball flowing down the game area, and
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on the fact that a game ball has entered the ball entry means, and
Grant determination means (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the grant information, and
A privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the granting result that the special information corresponds to the granting information in the grant determination. (Function to execute the processes of S409 to S412) and
With
The gaming machine according to any one of features D1 to D9, wherein the probability of the granting response result changing in the granting determination varies depending on the set value.

According to the feature D10, in a so-called pachinko machine, it is possible to change the probability that the grant correspondence result will be obtained according to the set value.

It should be noted that, with respect to the configuration of the features D1 to D10, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Feature E group>
Feature E1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
The history information stored in the history storage means is used to correspond to the result of the game in a predetermined period, provided that the set value to be used is set by the setting means. Information derivation means for deriving the mode information (a function of executing the process of step S1807 in the management side CPU 112 in the third embodiment, a function of executing the process of step S2107 in the management side CPU 112 in the fifth embodiment).
A gaming machine characterized by being equipped with.

According to the feature E1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the advantage of the player, the player can use the more advantageous setting value. You will expect it to be. Further, when a predetermined event occurs, the history information corresponding to the occurrence is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification.

In this case, when a new setting value to be used is set, the mode information corresponding to the result of the game in a predetermined period is provided by using the history information stored in the history storage means. Derived. This makes it possible to grasp the management result of the game history such as the frequency of occurrence of a predetermined event in the situation before the set value is changed.

Feature E2. The gaming machine according to feature E1, characterized in that it includes an aspect information storage means (separate storage memory 171) for storing the aspect information derived by the information derivation means.

According to the feature E2, the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means triggered by the new setting of the set value to be used. Is derived, the mode information is stored in the mode information storage means. As a result, even if the set value is changed, it is possible to grasp the management result of the game history in the situation before the set value is changed at an arbitrary timing thereafter.

Feature E3. The gaming machine according to feature E2, wherein the mode information storage means can store a plurality of the mode information.

According to the feature E3, since it is possible to store a plurality of mode information in the mode information storage means, the management result of the game history in a plurality of periods can be grasped based on the timing when the set value is newly set. It becomes possible to do. Further, even if new setting of the set value is repeated in a situation where the game is not performed, the mode information derived by using the history information of the situation in which the game is substantially performed is the mode information storage means. It is possible to increase the possibility of remaining in.

Feature E4. The aspect information storage means can store a predetermined number of the aspect information.
The gaming machine is means for executing special processing when the setting value to be used is set by the setting means more than the predetermined number under predetermined conditions (in the third embodiment, the management side CPU 112 The gaming machine according to feature E2 or E3, characterized in that it has a function of executing a repetitive change monitoring process, and a function of executing a repetitive change monitoring process in the main CPU 63 in the fourth embodiment).

According to the feature E4, the set value is set in a situation where the game is not performed so that the mode information derived by using the history information of the situation where the game is substantially performed is not left in the mode information storage means. If the new setting of is repeated, special processing is executed for it. This makes it possible to deal with the act.

Feature E5. The gaming machine according to any one of features E1 to E4, wherein the information deriving means derives the aspect information when a predetermined amount or more of the predetermined history information is stored in the history storage means. ..

According to the feature E5, since the mode information is derived when a predetermined amount or more of the predetermined history information is stored in the history storage means, it is possible to prevent the mode information from being unnecessarily derived. Become.

Feature E6. A ball entry means (first operating port 33, second operating port 34) capable of entering a game ball flowing down the game area, and
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on the fact that a game ball has entered the ball entry means, and
Grant determination means (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the grant information, and
A privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the granting result that the special information corresponds to the granting information in the grant determination. (Function to execute the processes of S409 to S412) and
With
The gaming machine according to any one of features E1 to E5, wherein the probability of the granting response result changing in the granting determination varies depending on the set value.

According to the feature E6, in a so-called pachinko machine, it is possible to change the probability that the grant correspondence result will be obtained according to the set value.

In addition, with respect to the composition of the features E1 to E6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the inventions relating to the feature A group, the feature B group, the feature C group, the feature D group, and the feature E group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to manage the gaming machine preferably, and there is still room for improvement in this respect.

<Characteristic F group>
Features F1. A ball entry means (first operating port 33, second operating port 34) capable of entering a game ball flowing down the game area, and
Information acquisition means (a function of executing the process of step S401 in the main CPU 63) for acquiring special information based on the fact that a game ball has entered the ball entry means, and
Grant determination means (a function of executing the processes of steps S503 and S504 in the main CPU 63) for determining whether or not the special information corresponds to the grant information, and
A privilege granting means (step in the main CPU 63) for granting a privilege (opening / closing execution mode) to the player based on the granting result that the special information corresponds to the granting information in the grant determination. (Function to execute the processes of S409 to S412) and
A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
With
The grant determination means has a high probability mode and a low probability mode as the grant determination mode so that the probability of the grant correspondence result is relatively high or low.
A gaming machine characterized in that the probability of the grant correspondence result fluctuates at least in the low probability mode according to the set value.

According to the feature F1, in a so-called pachinko machine, it is possible to change the probability of a grant correspondence result at least in a low probability mode according to a set value. As a result, even with a single gaming machine, it is possible to create a situation in which there is an advantage or disadvantage in the probability that the grant response result will be obtained in the low probability mode. Therefore, it is possible to improve the interest of the game.

Feature F2. The gaming machine according to feature F1, wherein the probability that the granting response result is obtained in the high probability mode does not fluctuate according to the set value.

According to the feature F2, the probability of the grant correspondence result in the low probability mode is changed according to the set value, while the probability of the grant correspondence result in the high probability mode is not changed according to the set value. By doing so, it is possible to limit the influence of the set value to the situation in the low probability mode.

Feature F3. There are multiple types of the above benefits,
The gaming machine according to feature F1 or F2, wherein the selection mode of the privilege does not change according to the set value.

According to the feature F3, the probability that the grant response result is obtained in the low probability mode is changed according to the set value, while the selection mode of the privilege is not changed according to the set value, so that the influence of the set value is obtained. Can be limited to situations in low probability mode.

It should be noted that, with respect to the configuration of the features F1 to F3, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention according to the above-mentioned feature F group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to improve the interest of the game, and there is still room for improvement in this respect.

<Characteristic G group>
Features G1. A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
Information deriving means for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means (in the first embodiment, steps S1402 to S1412 in the management side CPU 112). In the third embodiment, the function of executing the process of step S1807 in the management side CPU 112, and in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112).
Information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to first th) so that the display corresponding to the aspect information derived by the information derivation means is performed. In the 14th embodiment, the first information display control means (function for executing display processing in the management side CPU 112) for displaying and controlling the first to fourth notification display devices 201 to 204), and
Second information display control means (in the first to tenth embodiments, steps S202 and step S208 in the main CPU 63) display and control the information display means so that the display corresponds to different information different from the mode information. In the eleventh embodiment, the function of executing the processes of step S3101, step S3103 and step S3109 in the main CPU 63, and in the twelfth embodiment, steps S3201, step S3202 and step S3204 in the main CPU 63. And the function of executing the process of step S3210, and in the thirteenth embodiment, the function of executing the error display process in the main CPU 63).
A gaming machine characterized by being equipped with.

According to the feature G1, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, the mode information corresponding to the result of the game in a predetermined period is derived by using the history information stored in the history storage means. Then, the display corresponding to the aspect information is performed by the information display means. This makes it possible to grasp the management result of the game history such as the frequency of occurrence of a predetermined event. Further, in the information display means, not only the display corresponding to the mode information but also the display corresponding to another information is performed. This makes it possible to effectively use the information display means.

Feature G2. The description in feature G1 is characterized in that the period in which the display corresponding to the aspect information is performed in the information display means and the period in which the display corresponding to the other information is performed in the information display means are distinguished. Game machine.

According to the feature G2, by grasping the situation in which the information display means is displaying, which of the display corresponding to the mode information and the display corresponding to the other information is performed in the information display means. Can be identified.

Feature G3. The second information display control means displays and controls the information display means so that the display mode is different from the display mode when the display corresponding to the mode information is performed, so that the display corresponding to the other information can be displayed. The gaming machine according to feature G1 or G2, characterized in that it is to be performed.

According to the feature G3, by grasping the display mode of the information display means, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the other information is performed in the information display means. It will be possible.

Feature G4. As the information display means, individual information display means capable of displaying a plurality of types (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to the twelfth). The gaming machine according to any one of features G1 to G3, characterized in that the first to fourth notification display devices 201 to 204) are provided in the embodiment.

According to the feature G4, it is possible to display a wide variety of mode information by performing the display corresponding to the mode information by using a plurality of individual information display means. Further, since there are a plurality of individual information display means, it is possible to make a large difference in the display mode depending on whether the display corresponding to the mode information is performed or the display corresponding to another information is performed. ..

Feature G5. The second information display control means is a predetermined individual that does not become a non-display state when the display corresponding to the mode information is performed among the plurality of individual information display means when the display corresponding to the other information is performed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201, second notification display device 201 in the eleventh and twelfth embodiments). A feature G4 characterized in that the display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are hidden. The game machine described in.

According to the feature G5, the display does not become a hidden state when the display corresponding to the aspect information is performed. When the predetermined individual information display means corresponds to the different information, the hidden state is obtained. As a result, it is possible to clearly identify which of the display corresponding to the mode information and the display corresponding to the other information is performed only by grasping the type of the individual information display means that is in the hidden state. Is possible.

Feature G6. The second information display control means is a specific individual information display means (first) that is in a display state when displaying the mode information among the plurality of individual information display means when the display corresponding to the other information is performed. The third notification display device 69c in the first to tenth embodiments, the fourth notification display device 204 in the eleventh and twelfth embodiments, and the third notification display device 203 and the fourth notification in the thirteenth embodiment. Display device 204) is set to the display state.
The display content of the specific individual information display means when the display corresponding to the other information is performed can be displayed on the specific individual information display means when the display corresponding to the aspect information is performed. The gaming machine according to the feature G5.

According to the feature G6, in the specific individual information display means, the display content that can be displayed when the display corresponding to the mode information is performed can be displayed even when the display corresponding to the other information is performed. It is possible to prevent restrictions on the display contents when the display corresponding to the information is performed. Further, even if the specific individual information display means has a configuration in which the same display content can be obtained, the display does not become a non-display state when the configuration of the above feature G5 is provided and the display corresponding to the mode information is performed. When the predetermined individual information display means displays the information corresponding to the other information, the display is hidden. Therefore, it is possible to specify which display is performed by the plurality of individual information display means.

Feature G7. The gaming machine according to feature G5 or G6, wherein the first information display control means puts each of the plurality of individual information display means into a display state when displaying the mode information.

According to the feature G7, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state, so that the predetermined individual information display means corresponds to another information in the non-display state. It is possible to clearly distinguish it from the case where the display is performed.

Feature G8. The first information display control means sequentially changes the display of the mode information in the information display means, and even when the display of the mode information is changed, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features G5 to G7, which is characterized in that it is not maintained in.

According to the feature G8, when the display corresponding to the aspect information is performed, the predetermined individual information display means is not maintained in the non-display state. Thereby, regardless of the timing when the plurality of individual information display means are confirmed, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the other information is performed in the plurality of individual information display means. Is possible.

Feature G9. The second information display control means is one specific individual information display means among the plurality of individual information display means (third notification display device 69c, eleventh, twelfth in the first to tenth embodiments). In the embodiment of the above, any of the features G5 to G8, characterized in that the fourth notification display device 204) is made to display corresponding to the other information, and the remaining individual information display means is hidden. The gaming machine described in 1 or 1.

According to the feature G9, when the display corresponding to the different information is performed, only one individual information display means is displayed, so that it is easy to grasp whether or not the display corresponding to the different information is performed. Become.

Feature G10. The plurality of individual information display means are arranged in a predetermined direction, and the plurality of individual information display means are arranged in a predetermined direction.
The gaming machine according to feature G9, wherein the specific individual information display means exists at an end of the plurality of individual information display means arranged in the predetermined direction in the predetermined direction.

According to the feature G10, since one individual information display means for displaying the other information exists at the end in a predetermined direction, it is possible to grasp whether or not the display corresponding to the other information is performed. It becomes easier to do.

Feature G11. The first information display control means is an individual information display means for a type display target that is a part of the plurality of individual information display means (in the first to tenth embodiments, the first notification display device 69a, eleventh. In the fourteenth embodiment, the first notification display device 201 and the second notification display device 202) are arranged so that the display corresponding to the type of the mode information to be displayed is performed, and the plurality of individual information display means. The individual information display means for displaying the result, which is a part of the above (the second notification display device 69b and the third notification display device 69c in the first to tenth embodiments, and the eleventh to fourteenth embodiments, the first 3 The notification display device 203 and the fourth notification display device 204) are arranged so that the display corresponding to the content of the mode information to be displayed is performed.
The gaming machine according to any one of features G5 to G10, wherein the predetermined individual information display means corresponds to the individual information display means of the type display target.

According to the feature G11, when the display corresponding to the mode information is performed, the display corresponding to the type of the mode information to be displayed is performed in the individual information display means of the type display target, and the individual information display of the result display target is performed. In the means, the display corresponding to the content of the mode information to be displayed is performed. This makes it easier to grasp the mode information to be displayed. In this case, when the display corresponding to the different information is performed, the individual information display means of the type display target is in the hidden state, so that the state in which the type display is hidden corresponds to the different information. If other information is displayed, it will be easier to understand.

Feature G12. The information display means has a plurality of unit light emitting units (display segments 201a to 201 g, 202a to 202 g), and performs a predetermined display by combining the unit light emitting units that are in the light emitting state among the plurality of unit light emitting units. It is a possible configuration,
The second information display control means corresponds to the other information by setting the unit light emitting unit which can be in the light emitting state when the display corresponding to the mode information is performed among the plurality of unit light emitting units. It is intended to be displayed, and does not exist when the combination of the unit light emitting units that is in a light emitting state when the display corresponding to the other information is performed is displayed corresponding to the mode information. The gaming machine according to any one of features G1 to G11, characterized in that they are to be combined.

According to the feature G12, the display corresponding to the mode information is performed by setting the unit light emitting unit which can be in the light emitting state when the display corresponding to the mode information is performed to the light emitting state, thereby performing the display corresponding to the other information. In order to diversify the information, it is possible to minimize restrictions on the content of the display corresponding to the mode information. On the other hand, the combination of the unit light emitting units that is in the light emitting state when the display corresponding to the other information is performed is a combination that does not exist when the display corresponding to the mode information is performed. Thereby, by grasping the combination of the unit light emitting units that are in the light emitting state, it is possible to grasp which of the display corresponding to the mode information and the display corresponding to the other information is performed.

Feature G13. There are a plurality of display modes of the display corresponding to the mode information in the information display means.
The game according to feature G12, wherein the plurality of unit light emitting units do not have a unit light emitting unit that does not enter a light emitting state even if all the displays corresponding to the above-mentioned aspect information of the plurality of modes are displayed. Machine.

According to the feature G13, when the display corresponding to the mode information is performed, the unit light emitting unit of any combination is set to the light emitting state. Therefore, the mode is to diversify the display corresponding to the mode information. It is possible to minimize restrictions on the content of the display corresponding to the information.

Feature G14. Specific individual information display means (the third notification display device 69c in the first to tenth embodiments, and the fourth notification display devices 204 and 13 in the eleventh and twelfth embodiments), which are the information display means. In the embodiment, a plurality of individual information display means including the third notification display device 203 and the fourth notification display device 204) are provided.
The second information display control means is a predetermined individual that does not become a non-display state when the display corresponding to the mode information is performed among the plurality of individual information display means when the display corresponding to the other information is performed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201, second notification display device 201 in the eleventh and twelfth embodiments). A feature G12 characterized in that the display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are hidden. Or the game machine according to G13.

According to the feature G14, the display does not become a hidden state when the display corresponding to the aspect information is performed. When the predetermined individual information display means corresponds to the different information, the hidden state is obtained. As a result, it is possible to clearly identify which of the display corresponding to the mode information and the display corresponding to the other information is performed only by grasping the type of the individual information display means that is in the hidden state. Is possible.

Feature G15. It is equipped with a setting means (a function to execute the setting value update process in the main CPU 63) for setting the setting value to be used from the setting values of a plurality of stages corresponding to the player's advantage.
The gaming machine according to any one of features G1 to G14, wherein the second information display control means causes a display corresponding to the other information in a situation where the set value can be changed.

According to the feature G15, the information display means for displaying the mode information can also be used as a display means for notifying that the set value can be changed.

Feature G16. The gaming machine according to feature G15, wherein the second information display control means displays information corresponding to a set value currently selected as a display corresponding to the other information.

According to the feature G16, the information display means for displaying the mode information can also be used as the display means for displaying the set value in the process of being changed.

Feature G17. The gaming machine according to any one of features G1 to G16, wherein the second information display control means causes a display corresponding to an abnormal state of the gaming machine as a display corresponding to the other information.

According to the feature G17, the information display means for displaying the mode information can also be used as the display means for displaying the display corresponding to the abnormal state of the gaming machine.

Feature G18. The second information display control means is characterized in that when the display corresponding to the abnormal state is performed in a situation where the abnormal state has not occurred, the display corresponding to the absence of the abnormal state is performed. The gaming machine according to the feature G17.

According to the feature G18, it is possible to clearly identify whether or not an abnormal state has occurred by checking the information display means.

It should be noted that, with respect to the configuration of the features G1 to G18, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic H group>
Features H1. A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
Information deriving means for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means (in the first embodiment, steps S1402 to S1412 in the management side CPU 112). In the third embodiment, the function of executing the process of step S1807 in the management side CPU 112, and in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112).
Information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to first th) so that the display corresponding to the aspect information derived by the information derivation means is performed. In the 14th embodiment, the first information display control means (function for executing display processing in the management side CPU 112) for displaying and controlling the first to fourth notification display devices 201 to 204), and
Second information display control means (in the first to tenth embodiments, steps S202 and step S208 in the main CPU 63) display and control the information display means so that the display corresponds to different information different from the mode information. In the eleventh embodiment, the function of executing the processes of step S3101, step S3103 and step S3109 in the main CPU 63, and in the twelfth embodiment, steps S3201, step S3202 and step S3204 in the main CPU 63. And the function of executing the process of step S3210, and in the thirteenth embodiment, the function of executing the error display process in the main CPU 63).
With
The information display means has a plurality of unit light emitting units (display segments 201a to 201 g, 202a to 202 g), and performs a predetermined display by combining the unit light emitting units that are in the light emitting state among the plurality of unit light emitting units. It is a possible configuration,
The second information display control means corresponds to the other information by setting the unit light emitting unit which can be in the light emitting state when the display corresponding to the mode information is performed among the plurality of unit light emitting units. It is intended to be displayed, and does not exist when the combination of the unit light emitting units that is in a light emitting state when the display corresponding to the other information is performed is displayed corresponding to the mode information. A gaming machine characterized in that it is a combination.

According to the feature H1, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, the mode information corresponding to the result of the game in a predetermined period is derived by using the history information stored in the history storage means. Then, the display corresponding to the aspect information is performed by the information display means. This makes it possible to grasp the management result of the game history such as the frequency of occurrence of a predetermined event. Further, in the information display means, not only the display corresponding to the mode information but also the display corresponding to another information is performed. This makes it possible to effectively use the information display means.

In addition, by setting the unit light emitting unit that can be in the light emitting state when the display corresponding to the mode information is performed, the display corresponding to the other information is performed, so that the display corresponding to the mode information can be diversified. It is possible to minimize restrictions on the content of the display corresponding to the mode information. On the other hand, the combination of the unit light emitting units that is in the light emitting state when the display corresponding to the other information is performed is a combination that does not exist when the display corresponding to the mode information is performed. Thereby, by grasping the combination of the unit light emitting units that are in the light emitting state, it is possible to grasp which of the display corresponding to the mode information and the display corresponding to the other information is performed.

Feature H2. There are a plurality of display modes of the display corresponding to the mode information in the information display means.
The game according to feature H1, wherein the plurality of unit light emitting units do not have a unit light emitting unit that does not enter a light emitting state even if all the displays corresponding to the plurality of modes of the mode information are displayed. Machine.

According to the feature H2, when the display corresponding to the mode information is performed, the unit light emitting unit of any combination is set to the light emitting state. Therefore, the mode is to diversify the display corresponding to the mode information. It is possible to minimize restrictions on the content of the display corresponding to the information.

Feature H3. Specific individual information display means (the third notification display device 69c in the first to tenth embodiments, and the fourth notification display devices 204 and 13 in the eleventh and twelfth embodiments), which are the information display means. In the embodiment, a plurality of individual information display means including the third notification display device 203 and the fourth notification display device 204) are provided.
The second information display control means is a predetermined individual that does not become a non-display state when the display corresponding to the mode information is performed among the plurality of individual information display means when the display corresponding to the other information is performed. Information display means (first notification display device 69a and second notification display device 69b in the first to tenth embodiments, first notification display device 201, second notification display device 201 in the eleventh and twelfth embodiments). A feature H1 characterized in that the display device 202 and the third notification display device 203, and in the thirteenth embodiment, the first notification display device 201 and the second notification display device 202) are hidden. Or the game machine described in H2.

According to the feature H3, it does not become a hidden state when the display corresponding to the aspect information is performed. When the predetermined individual information display means corresponds to another information, it becomes a hidden state. As a result, it is possible to clearly identify which of the display corresponding to the mode information and the display corresponding to the other information is performed only by grasping the type of the individual information display means that is in the hidden state. Is possible.

Feature H4. The gaming machine according to feature H3, wherein the first information display control means puts each of the plurality of individual information display means into a display state when displaying the mode information.

According to the feature H4, when the display corresponding to the aspect information is performed, each of the plurality of individual information display means is in the display state, so that the predetermined individual information display means corresponds to another information in the non-display state. It is possible to clearly distinguish it from the case where the display is performed.

Feature H5. The first information display control means sequentially changes the display of the mode information in the information display means, and even when the display of the mode information is changed, the predetermined individual information display means is in a non-display state. The gaming machine according to feature H3 or H4, characterized in that it is not maintained in.

According to the feature H5, when the display corresponding to the aspect information is performed, the predetermined individual information display means is not maintained in the non-display state. Thereby, regardless of the timing when the plurality of individual information display means are confirmed, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the other information is performed in the plurality of individual information display means. Is possible.

Feature H6. It is equipped with a setting means (a function to execute the setting value update process in the main CPU 63) for setting the setting value to be used from the setting values of a plurality of stages corresponding to the player's advantage.
The gaming machine according to any one of features H1 to H5, wherein the second information display control means causes a display corresponding to the other information in a situation where the set value can be changed.

According to the feature H6, the information display means for displaying the mode information can also be used as the display means for notifying that the set value can be changed.

Feature H7. The gaming machine according to feature H6, wherein the second information display control means displays information corresponding to a set value currently selected as a display corresponding to the other information.

According to the feature H7, the information display means for displaying the mode information can also be used as the display means for displaying the set value in the process of being changed.

In addition, with respect to the composition of the features H1 to H7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Feature I group>
Feature I1. A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
Information deriving means for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means (in the first embodiment, steps S1402 to S1412 in the management side CPU 112). In the third embodiment, the function of executing the process of step S1807 in the management side CPU 112, and in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112).
The first information display control means (management side) that displays and controls the information display means (first to fourth notification display devices 201 to 204) so that the display corresponding to the mode information derived by the information derivation means is performed. Function to execute display processing in CPU 112) and
The second information display control means (a function of executing the abnormality display process in the main CPU 63) that controls the display of the information display means so that the display corresponding to the abnormal state of the gaming machine is performed, and
A gaming machine characterized by being equipped with.

According to the feature I1, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, the mode information corresponding to the result of the game in a predetermined period is derived by using the history information stored in the history storage means. Then, the display corresponding to the aspect information is performed by the information display means. This makes it possible to grasp the management result of the game history such as the frequency of occurrence of a predetermined event. Further, in the information display means, not only the display corresponding to the mode information but also the display corresponding to the abnormal state of the gaming machine is performed. This makes it possible to effectively use the information display means.

Feature I2. The second information display control means is characterized in that when the display corresponding to the abnormal state is performed in a situation where the abnormal state has not occurred, the display corresponding to the absence of the abnormal state is performed. The gaming machine according to the feature I1.

According to the feature I2, it is possible to clearly identify whether or not an abnormal state has occurred by checking the information display means.

Feature I3. The feature I1 or I2 is characterized in that the period in which the display corresponding to the aspect information is performed in the information display means and the period in which the display corresponding to the abnormal state is performed in the information display means are distinguished. Described gaming machine.

According to the feature I3, by grasping the situation in which the information display means is displaying, which of the display corresponding to the mode information and the display corresponding to the abnormal state is performed in the information display means. Can be identified.

Feature I4. The second information display control means displays and controls the information display means so that the display mode is different from the display mode when the display corresponding to the mode information is performed, so that the display corresponding to the abnormal state can be displayed. The gaming machine according to feature G1 or G2, characterized in that it is to be performed.

According to the feature I4, by grasping the display mode of the information display means, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is performed in the information display means. It will be possible.

Feature I5. The features I1 to I4 are characterized in that, as the information display means, a plurality of individual information display means (first to fourth notification display devices 201 to 204) capable of displaying a plurality of types are provided. The gaming machine according to any one of.

According to the feature I5, it is possible to display a wide variety of mode information by performing the display corresponding to the mode information by using a plurality of individual information display means. Further, since there are a plurality of individual information display means, it is possible to make a large difference in the display mode depending on whether the display corresponding to the mode information is performed or the display corresponding to the abnormal state is performed. ..

Feature I6. The second information display control means is a predetermined individual that does not become a non-display state when the display corresponding to the mode information is performed among the plurality of individual information display means when the display corresponding to the abnormal state is performed. The gaming machine according to feature I5, wherein the information display means (first notification display device 201 and second notification display device 202) is hidden.

According to the feature I6, it does not become a hidden state when the display corresponding to the aspect information is performed. When the predetermined individual information display means corresponds to the abnormal state, it becomes a hidden state. As a result, it is possible to clearly identify which of the display corresponding to the mode information and the display corresponding to the abnormal state is performed only by grasping the type of the individual information display means in the hidden state. Is possible.

Feature I7. The second information display control means is a specific individual information display means (first) that is in a display state when displaying the mode information among the plurality of individual information display means when the display corresponding to the abnormal state is performed. 3 The notification display device 203 and the fourth notification display device 204) are set to the display state.
The display content of the specific individual information display means when the display corresponding to the abnormal state is performed can be displayed on the specific individual information display means when the display corresponding to the aspect information is performed. The gaming machine according to the feature I6.

According to the feature I7, in the specific individual information display means, the display content that can be displayed when the display corresponding to the mode information is performed can be displayed even when the display corresponding to the abnormal state is performed. It is possible to prevent restrictions on the display contents when the display corresponding to the information is performed. Further, even if the specific individual information display means has a configuration in which the same display content can be obtained, the display does not become a non-display state when the configuration of the above feature I7 is provided and the display corresponding to the mode information is performed. When the predetermined individual information display means displays the display corresponding to the abnormal state, the display is hidden. Therefore, it is possible to specify which display is performed by the plurality of individual information display means.

Feature I8. The gaming machine according to feature I6 or I7, wherein the first information display control means puts each of the plurality of individual information display means into a display state when displaying the mode information.

According to the feature I8, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state, so that it corresponds to the abnormal state in which the predetermined individual information display means is in the non-display state. It is possible to clearly distinguish it from the case where the display is performed.

Feature I9. The first information display control means sequentially changes the display of the mode information in the information display means, and even when the display of the mode information is changed, the predetermined individual information display means is in a non-display state. The gaming machine according to any one of features I6 to I8, characterized in that it is not maintained in.

According to the feature I9, when the display corresponding to the aspect information is performed, the predetermined individual information display means is not maintained in the non-display state. Thereby, regardless of the timing at which the plurality of individual information display means are confirmed, it is possible to specify which of the display corresponding to the mode information and the display corresponding to the abnormal state is performed in the plurality of individual information display means. Is possible.

In addition, with respect to the composition of the features I1 to I9, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic J group>
Features J1. A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )When,
Information deriving means for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means (in the first embodiment, steps S1402 to S1412 in the management side CPU 112). In the third embodiment, the function of executing the process of step S1807 in the management side CPU 112, and in the fifth embodiment, the function of executing the process of step S2107 in the management side CPU 112).
Information display means (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to first th) so that the display corresponding to the aspect information derived by the information derivation means is performed. In the 14th embodiment, the first information display control means (function for executing display processing in the management side CPU 112) for displaying and controlling the first to fourth notification display devices 201 to 204), and
With
The first information display control means sequentially changes the display corresponding to the mode information in the information display means, and the information display means is hidden even when the display corresponding to the mode information is changed. A gaming machine characterized in that it is not maintained in a state.

According to the feature J1, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, the mode information corresponding to the result of the game in a predetermined period is derived by using the history information stored in the history storage means. Then, the display corresponding to the aspect information is performed by the information display means. This makes it possible to grasp the management result of the game history such as the frequency of occurrence of a predetermined event. Further, when the display corresponding to the aspect information is performed, the information display means is not maintained in the hidden state. This makes it possible to specify the display corresponding to the mode information regardless of the timing at which the information display means is confirmed.

Feature J2. As the information display means, individual information display means capable of displaying a plurality of types (in the first to tenth embodiments, the first to third notification display devices 69a to 69c, the eleventh to the twelfth). The gaming machine according to the feature J1, wherein the first to fourth notification display devices 201 to 204) are provided in the embodiment.

According to the feature J2, it is possible to display a wide variety of mode information by displaying the mode information by using a plurality of individual information display means.

Features J3. The gaming machine according to feature J2, wherein the first information display control means puts each of the plurality of individual information display means into a display state when displaying the mode information.

According to the feature J3, when the display corresponding to the mode information is performed, each of the plurality of individual information display means is in the display state, and even when the display corresponding to the mode information is changed, the display state is set. Be maintained. This makes it easier to grasp the aspect information.

Features J4. The first information display control means is an individual information display means for a type display target that is a part of the plurality of individual information display means (in the first to tenth embodiments, the first notification display device 69a, eleventh. In the fourteenth embodiment, the first notification display device 201 and the second notification display device 202) are arranged so that the display corresponding to the type of the mode information to be displayed is performed, and the plurality of individual information display means. Individual information display means for displaying the result, which is a part of the above (the second notification display device 69b and the third notification display device 69c in the first to tenth embodiments, and the eleventh to fourteenth embodiments, the first 3. The gaming machine according to feature J2 or J3, characterized in that the display device 203 for notification and the display device 204 for notification 4) display the information corresponding to the content of the mode information to be displayed.

According to the feature J4, when the display corresponding to the mode information is performed, the display corresponding to the type of the mode information to be displayed is performed in the individual information display means of the type display target, and the individual information display of the result display target is performed. In the means, the display corresponding to the content of the mode information to be displayed is performed. This makes it easier to grasp the mode information to be displayed.

It should be noted that, with respect to the configuration of the features J1 to J4, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic K group>
Features K1. A function of executing history setting processing in the history storage execution means (management side CPU 112) that stores the history information of the game corresponding to a predetermined event in the history storage means (history memory 117) when a predetermined event occurs due to the execution of the game. )
The history storage executing means is a means for preventing the history information from being stored in the history storage means even if the predetermined event occurs in a restricted situation (a function of making a negative determination in step S3501 in the main CPU 63). ) Is provided.

According to the feature K1, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, in the restricted situation, the history information is not stored even if a predetermined event occurs, so that it is possible to prevent the history information from being stored in a situation where it is not preferable to store the history information. ..

Feature K2. The gaming machine according to feature K1, wherein the restriction situation can occur as a situation from the start of supplying the operating power to the history storage execution means to the occurrence of the restriction release event.

According to the feature K2, it is possible to prevent the occurrence of a predetermined event due to the operation check immediately after the start of supply of the operating power from being stored as history information.

Feature K3. When the supply of the operating power to the history storage executing means is started and the limiting condition is satisfied, the means for setting the limiting status (the function of executing the process of step S3610 in the main CPU 63) ,
Means that do not set the restriction status when the supply of operating power to the history storage execution means is started and the restriction condition is not satisfied (function of executing the process of step S3621 in the main CPU 63). When,
The gaming machine according to the feature K2, which is characterized by having.

According to the feature K3, there are cases where the restriction status is set and cases where the restriction status is not set, depending on whether or not the restriction condition is satisfied. This makes it possible to prevent the restricted situation from being set as needed.

Features K4. The limitation situation is characterized in that it can occur as a situation from the start of supplying the operating power to the history storage execution means until the number of game balls discharged from the game area becomes equal to or more than a predetermined reference number. The gaming machine according to any one of K1 to K3.

According to the feature K4, it is possible to prevent the history information from being stored from the start of the supply of the operating power until the number of the game balls discharged from the game area becomes equal to or more than the predetermined reference number.

Feature K5. When a predetermined event occurs due to the execution of a game, the history information of the corresponding game is stored in the history storage means (normal counter area 231, open / close execution mode counter area 232, high frequency support mode counter area 233). History storage execution means to be stored (a function of executing a normal ball entry management process in the main CPU 63, a ball entry management process in the open / close execution mode, and a ball entry management process in the high frequency support mode).
Information derivation means (a function of executing the process of step S4208 in the main CPU 63) for deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means.
With
The information derivation means is a gaming machine characterized in that the mode information is not derived when the situation is restricted.

According to the feature K5, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. In addition, the mode information corresponding to the result of the game in a predetermined period is derived by using the history information stored in the history storage means. This makes it possible to grasp the management result of the game history such as the frequency of occurrence of a predetermined event. Further, in the restricted situation, the mode information is not derived even if a predetermined event occurs, so that it is possible to prevent the mode information from being derived in a situation where it is not preferable to derive the mode information. ..

Feature K6. The gaming machine according to feature K5, wherein the restriction situation can occur as a situation from the start of supplying the operating power to the history storage execution means to the occurrence of the restriction release event.

According to the feature K6, it is possible to prevent the mode information using the history information based on the occurrence of a predetermined event by the operation check immediately after the start of supply of the operating power from being derived.

Feature K7. The limitation situation is characterized in that it can occur as a situation from the start of supplying the operating power to the history storage execution means until the number of game balls discharged from the game area becomes equal to or more than a predetermined reference number. The gaming machine according to K5 or K6.

According to the feature K7, it is possible to prevent the mode information from being derived until the number of game balls discharged from the game area becomes equal to or more than a predetermined reference number after the supply of the operating power is started.

It should be noted that, with respect to the configuration of the features K1 to K7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the inventions relating to the feature G group, the feature H group, the feature I group, the feature J group, and the feature K group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to manage the gaming machine preferably, and there is still room for improvement in this respect.

<Characteristic L group>
Feature L1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
A first predetermined processing execution means for executing the first predetermined processing among the various processes (a function of executing a process other than the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
A second predetermined process execution means for executing the second predetermined process among the various processes (a function of executing the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
At least one stored in the internal storage means when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. A function of executing the processes of step S3802 and step S3902 to step S3907 in the main CPU 63 in the fifteenth embodiment, 16th In the embodiment, the function of executing the process of step S4402 in the main CPU 63, in the seventeenth embodiment, the function of executing the process of steps S4502 to S4507 in the main CPU 63, and in the eighteenth embodiment, the step in the main CPU 63. A function of executing the process of S4602, a function of executing the processes of steps S4701 and S4703 in the main CPU 63 in the 19th embodiment), and
When the second predetermined process is completed or after the second predetermined process is completed, the return execution means for returning the predetermined information saved in the predetermined storage means to the internal storage means (in the fifteenth embodiment, step S3804 and the step S3804 in the main CPU 63). The function of executing the process of steps S3910 to S3915, the function of executing the process of step S4404 in the main CPU 63 in the 16th embodiment, and the process of steps S451 to S4515 in the main CPU 63 in the 17th embodiment. The function of executing the process of step S4605 in the main CPU 63 in the eighteenth embodiment, and the function of executing the processes of steps S4705 and S4706 in the main CPU 63 in the nineteenth embodiment).
A gaming machine characterized by being equipped with.

According to the feature L1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed is changed, it is stored in the internal storage means. At least a part of the information is saved in the predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined processing is completed, the information saved in the predetermined storage means is returned to the internal storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process. From the above, various controls can be suitably performed.

Feature L2. The gaming machine according to feature L1, wherein the predetermined information is a part of the information stored in the internal storage means.

According to the feature L2, only a part of the information stored in the internal storage means is saved in the predetermined storage means, so that the storage capacity required for saving the information in the internal storage means in the predetermined storage means can be obtained. It becomes possible to suppress it.

Feature L3. The internal storage means includes a first storage area (WA register, BC register, DE register, HL register, IX register and IY register) and a second storage area (WA register, BC register, DE register, HL register, IX register and IX register). At least with registers other than IY registers)
The second predetermined processing executing means has a configuration in which information is stored in the first storage area in the second predetermined processing, but information is not stored in the second storage area.
The gaming machine according to feature L2, wherein the evacuation execution means saves information stored in the first storage area to the predetermined storage means.

According to the feature L3, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, the internal storage means performs the second predetermined process. The information in the first storage area, which is the storage target of the information, is saved in the predetermined storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process, and the inside of the predetermined storage means. It is possible to reduce the storage capacity required to save the information of the storage means.

Feature L4. The predetermined storage means
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
With
The gaming machine according to any one of features L1 to L3, wherein the evacuation execution means saves the predetermined information in the second predetermined storage area.

According to the feature L4, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the information storage destination in the predetermined storage means can be stored in the first predetermined process and the second predetermined process. It is possible to make a clear difference. This makes it possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process. In this case, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, at least a part of the data stored in the internal storage means is stored. Information is saved in the second predetermined storage area. As a result, it is possible to save the information of the internal storage means immediately before the start of the second predetermined processing, and it is possible to save the information without using the first predetermined storage area.

Feature L5. The evacuation execution means is
In the first predetermined process, the first predetermined information which is a part of the information stored in the internal storage means when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed. Means for saving to the first predetermined storage area (a function of executing the process of step S3802 in the main CPU 63 in the fifteenth embodiment, a function of executing the process of step S4402 in the main CPU 63 in the sixteenth embodiment). ,
When the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed, the second predetermined information, which is a part of the information stored in the internal storage means, is converted into the second predetermined process. In the means for saving to the second predetermined storage area (a function of executing the processing of steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment, and steps S4502 to S4507 in the main CPU 63 in the seventeenth embodiment). A function of executing the process, a function of executing the process of step S4602 in the main CPU 63 in the eighteenth embodiment, a function of executing the process of step S4702 and step S4703 in the main CPU 63 in the nineteenth embodiment).
The gaming machine according to the feature L4, which is characterized by having.

According to the feature L5, the first predetermined information, which is a part of the information stored in the internal storage means, is saved in the first predetermined storage area in the first predetermined process, and a part of the information stored in the internal storage means. The second predetermined information is saved in the second predetermined storage area in the second predetermined process. As a result, it is possible to save the information at a preferable timing for each information stored in the internal storage means, and the process for saving the information is distributed and executed in the first predetermined process and the second predetermined process. It becomes possible.

Feature L6. The gaming machine according to feature L5, wherein the first predetermined information is information of a flag register provided in the internal storage means.

According to the feature L6, it is possible to appropriately save the information of the flag register in the situation where the first predetermined process is being executed.

Feature L7. The second predetermined storage area is
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction, and
A work area (work area 223 for non-specific control) in which information can be written and read by a load instruction, and
With
The gaming machine according to any one of features L4 to L6, wherein the evacuation execution means saves the predetermined information to one of the stack area and the work area.

According to the feature L7, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed, the stack area in the second predetermined storage area And at least a part of the information stored in the internal storage means is saved in one of the work areas. As a result, it is possible to aggregate the evacuation destinations of information, and it is possible to simplify the processing configuration for saving and the processing configuration for returning.

Feature L8. The gaming machine according to feature L7, wherein the evacuation execution means saves the predetermined information to the work area.

According to the feature L8, since the save destination of at least a part of the information stored in the internal storage means is the work area, it is possible to save the information without cumulatively changing the stack pointer. Become.

Feature L9. Although the first predetermined storage area can store information and read information when the first predetermined process is executed, and can read information when the second predetermined process is executed. Information cannot be memorized,
Although the second predetermined storage area can store information and read information when the second predetermined process is executed, and can read information when the first predetermined process is executed. The gaming machine according to any one of features L4 to L8, characterized in that information cannot be stored.

According to the feature L9, the first predetermined storage area can be treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area can be treated as a dedicated storage area for the second predetermined processing. It becomes.

Feature L10. The predetermined storage means
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction, and
A work area (work area 223 for non-specific control) in which information can be written and read by a load instruction, and
With
The gaming machine according to any one of features L1 to L9, wherein the evacuation execution means saves the predetermined information to one of the stack area and the work area.

According to the feature L10, it is possible to aggregate the save destinations of the predetermined information, and it is possible to simplify the processing configuration for saving the predetermined information and the processing configuration for returning the predetermined information.

Feature L11. The gaming machine according to feature L10, wherein the evacuation execution means saves the predetermined information to the work area.

According to the feature L11, since the save destination of the predetermined information is the work area, it is possible to save the information without cumulatively changing the stack pointer.

Feature L12. The predetermined information is a part of information stored in the internal storage means, and is
The evacuation execution means is the internal storage means when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. The gaming machine according to feature L11, characterized in that it is provided with a means (a function of executing the process of step S3802 in the main CPU 63) for saving specific information which is a part of the information stored in the above stack area. ..

According to the feature L12, the specific information is saved in the stack area in the configuration in which the predetermined information is saved in the work area. As a result, the information stored in the internal storage means can be distributed and saved in the work area and the stack area.

Feature L13. The gaming machine according to feature L12, wherein the predetermined information has a larger amount of information than the specific information.

According to the feature L13, since the predetermined information having a larger amount of information than the specific information is saved in the work area, a large amount of information is cumulatively stored in the stack area when the information stored in the internal storage means is saved. It is possible to prevent it from being stowed.

Feature L14. When the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, the information of the stack pointer provided in the internal storage means is changed. Is a fixed information structure,
The gaming machine according to any one of features L1 to L13, wherein the information of the stack pointer provided in the internal storage means is not a target for evacuation by the evacuation execution means.

According to the feature L14, since it is not necessary to secure a capacity for saving the information of the stack pointer in the predetermined storage means, it is possible to suppress the capacity of the predetermined storage means. Further, even if the stack pointer information is not saved in this way, the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed. In that case, the stack pointer information becomes fixed information, so it is possible to restore the stack pointer information before the second predetermined process is started without saving the stack pointer information as described above. It is possible.

Feature L15. A means for setting the fixed information in the stack pointer when the second predetermined process is completed or after the process is completed (a function of executing the process of step S3909 in the main CPU 63 in the fifteenth embodiment, a seventh embodiment). The gaming machine according to feature L14, which comprises a function of executing the process of step S4509 in the main CPU 63, and a function of executing the process of step S4604 in the main CPU 63 in the eighteenth embodiment. ..

According to the feature L15, it is possible to return to the information of the stack pointer before the start of the second predetermined process when the second predetermined process is finished or after the second predetermined process is finished.

Feature L16. When the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed, or when the situation in which the second predetermined process is executed is changed, the stack pointer is set to the second predetermined process. Means for setting the corresponding second correspondence start information (in the fifteenth embodiment, the function of executing the process of step S3901 in the main CPU 63, in the seventeenth embodiment, the function of executing the process of step S4501 in the main CPU 63, The gaming machine according to feature L14 or L15, which comprises a function of executing the process of step S4601 in the main CPU 63 in the eighteenth embodiment).

According to the feature L16, when the second predetermined process is started, the second correspondence start information corresponding to the second predetermined process is set for the stack pointer, so that the address appropriate for the second predetermined process is set. Information can be stored in the stack area.

Feature L17. The first predetermined process includes a process for controlling the progress of the game.
The gaming machine according to any one of features L1 to L16, wherein the second predetermined processing includes a processing for managing a gaming history.

According to the feature L17, the progress of the game is controlled by executing the process for controlling the progress of the game as the first predetermined process and executing the process for managing the game history as the second predetermined process. It is possible to prevent the information used in the process for managing the game history from being rewritten when the process for the purpose is executed.

Feature L18. The predetermined storage means
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
With
The second predetermined storage area is a history storage area (normal counter area 231 and counter area 232 for open / close execution mode) in which history information of the game corresponding to a predetermined event occurs due to the execution of the game. , The gaming machine according to feature L17, characterized in that it is provided with a counter area 233) for a high frequency support mode.

According to the feature L18, when a predetermined event occurs, the history information corresponding to the occurrence is stored in the history storage area. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature L19. The second predetermined processing execution means is an information derivation means (step S4208 in the main CPU 63) for deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature L18, which is characterized by having a function of executing the processing of the above.

According to the feature L19, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. It becomes possible to grasp the result.

Feature L20. The gaming machine according to feature L19, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature L20, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

It should be noted that, with respect to the configuration of the features L1 to L20, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic M group>
Features M1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
A first predetermined processing execution means for executing the first predetermined processing among the various processes (a function of executing a process other than the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
A second predetermined process execution means for executing the second predetermined process among the various processes (a function of executing the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
At least one stored in the internal storage means when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. A function of executing the processing of steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment, the seventeenth embodiment, which saves the predetermined information which is the information of the unit to the predetermined storage means (main side RAM 65). The function of executing the process of steps S4502 to S4507 in the main CPU 63, the function of executing the process of step S4602 in the main CPU 63 in the 18th embodiment, and the steps S4701 and step S4701 in the main CPU 63 in the 19th embodiment. Function to execute the processing of S4703) and
When the second predetermined process is finished or after the end, the return executing means for returning the predetermined information saved in the predetermined storage means to the internal storage means (in the fifteenth embodiment, steps S391-10 in the main CPU 63). A function of executing the process of step S3915, a function of executing the process of steps S451 to S4515 in the main CPU 63 in the seventeenth embodiment, and a function of executing the process of step S4605 in the main CPU 63 in the eighteenth embodiment. In the 19th embodiment, the function of executing the processes of steps S4705 and S4706 in the main CPU 63) and
With
The evacuation execution means is a gaming machine characterized in that the predetermined information is evacuated to the predetermined storage means by a load command.

According to the feature M1, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed is changed, the information is stored in the internal storage means. Predetermined information, which is at least a part of the information, is saved in the predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined processing is completed, the predetermined information saved in the predetermined storage means is returned to the internal storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process. When the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, the predetermined information is saved in the predetermined storage means by the load instruction. .. As a result, it is possible to save the predetermined information without changing the stack pointer.

Feature M2. The predetermined storage means
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction, and
A work area (work area 223 for non-specific control) in which information can be written and read by a load instruction, and
With
The gaming machine according to feature M1, wherein the evacuation execution means saves the predetermined information to the work area.

According to the feature M2, since the save destination of the predetermined information, which is at least a part of the information stored in the internal storage means, is the work area, the information is saved without cumulatively changing the stack pointer. It becomes possible.

Feature M3. The predetermined information is a part of information stored in the internal storage means, and is
The evacuation execution means is the internal storage means when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. The gaming machine according to feature M2, characterized in that it is provided with means for saving specific information, which is a part of the information stored in the above, to the stack area (a function of executing the process of step S3802 in the main CPU 63). ..

According to the feature M3, the specific information is saved in the stack area in the configuration in which the predetermined information is saved in the work area. As a result, the information stored in the internal storage means can be distributed and saved in the work area and the stack area.

Features M4. The gaming machine according to feature M3, wherein the predetermined information has a larger amount of information than the specific information.

According to the feature M4, a predetermined amount of information larger than the specific information is saved in the work area, so that a large amount of information is cumulatively stored in the stack area when the information stored in the internal storage means is saved. It is possible to prevent it from being stowed.

Feature M5. The work area is
A first work area (work area 221 for specific control) in which information is stored when the first predetermined process is executed, and
A second work area (work area 223 for non-specific control) in which information is stored when the second predetermined process is executed, and
With
The gaming machine according to any one of features M2 to M4, wherein the evacuation execution means saves the predetermined information to the second work area.

According to the feature M5, since the first work area and the second work area are provided in the work area, the storage destination of the information in the work area is clearly different between the first predetermined process and the second predetermined process. It becomes possible. This makes it possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process. In this case, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, at least a part of the data stored in the internal storage means is stored. Information is saved in the second work area. As a result, it is possible to save the information of the internal storage means immediately before the start of the second predetermined process, and it is possible to save the information without using the first work area.

Feature M6. Although the first work area can store information and read information when the first predetermined process is executed, and can read information when the second predetermined process is executed. Information cannot be memorized,
Although the second work area can store information and read information when the second predetermined process is executed, and can read information when the first predetermined process is executed. The gaming machine according to feature M5, which is characterized in that information cannot be stored.

According to the feature M6, the first work area can be treated as a storage area dedicated to the first predetermined processing, and the second work area can be treated as a storage area dedicated to the second predetermined processing. ..

Feature M7. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
A first predetermined processing execution means for executing the first predetermined processing among the various processes (a function of executing a process other than the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
A second predetermined process execution means for executing the second predetermined process among the various processes (a function of executing the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
At least one stored in the internal storage means when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. A function of executing the processing of steps S3902 to S3907 in the main CPU 63 in the fifteenth embodiment, the seventeenth embodiment, which saves the predetermined information which is the information of the unit to the predetermined storage means (main side RAM 65). The function of executing the process of steps S4502 to S4507 in the main CPU 63, the function of executing the process of step S4602 in the main CPU 63 in the 18th embodiment, and the steps S4701 and step S4701 in the main CPU 63 in the 19th embodiment. Function to execute the processing of S4703) and
When the second predetermined process is finished or after the end, the return executing means for returning the predetermined information saved in the predetermined storage means to the internal storage means (in the fifteenth embodiment, steps S391-10 in the main CPU 63). A function of executing the process of step S3915, a function of executing the process of steps S451 to S4515 in the main CPU 63 in the seventeenth embodiment, and a function of executing the process of step S4605 in the main CPU 63 in the eighteenth embodiment. In the 19th embodiment, the function of executing the processes of steps S4705 and S4706 in the main CPU 63) and
With
The predetermined storage means
A stack area (stack area 224 for non-specific control) in which information can be written by a push instruction and information can be read by a pop instruction, and
A work area (work area 223 for non-specific control) in which information can be written and read by a load instruction, and
With
The evacuation execution means is a gaming machine characterized in that the predetermined information is evacuated to one of the stack area and the work area.

According to the feature M7, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed is changed, the information is stored in the internal storage means. Predetermined information, which is at least a part of the information, is saved in the predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined processing is completed, the predetermined information saved in the predetermined storage means is returned to the internal storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process.

Further, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, one of the stack area and the work area in the predetermined storage means is used. The above-mentioned predetermined information is saved. As a result, it is possible to aggregate the evacuation destinations of information, and it is possible to simplify the processing configuration for saving and the processing configuration for returning.

It should be noted that, with respect to the configuration of the features M1 to M7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic N group>
Feature N1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
A first predetermined processing execution means for executing the first predetermined processing among the various processes (a function of executing a process other than the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
A second predetermined process execution means for executing the second predetermined process among the various processes (a function of executing the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
With
When the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed, the information of the stack pointer provided in the internal storage means is characterized in that it is a fixed information. A game machine to play.

According to the feature N1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed, the information of the stack pointer provided in the internal storage means is fixed information, so that the second predetermined process is executed. It is not necessary to save the information of the stack pointer when starting the predetermined process. This eliminates the need to secure a storage area for saving the stack pointer information. Further, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed, the stack pointer information becomes fixed information, so that the stack pointer information is not saved as described above. However, it is possible to restore the information of the stack pointer before the second predetermined processing is started.

Feature N2. A means for setting the fixed information in the stack pointer when the second predetermined process is completed or after the process is completed (a function of executing the process of step S3909 in the main CPU 63 in the fifteenth embodiment, a seventh embodiment). The gaming machine according to feature N1, characterized in that the embodiment includes a function of executing the process of step S4509 in the main CPU 63, and a function of executing the process of step S4604 in the main CPU 63 in the eighteenth embodiment. ..

According to the feature N2, it is possible to return to the information of the stack pointer before the start of the second predetermined process when the second predetermined process is finished or after the second predetermined process is finished.

Feature N3. Means for setting the second correspondence start information corresponding to the second predetermined processing in the stack pointer when the situation changes from the situation in which the first predetermined processing is being executed to the situation in which the second predetermined processing is executed (15th). In the embodiment, the function of executing the process of step S3901 in the main CPU 63, in the seventeenth embodiment, the function of executing the process of step S4501 in the main CPU 63, and in the eighteenth embodiment, the process of step S4601 in the main CPU 63. The gaming machine according to the feature N1 or N2, which is characterized by having a function of executing the above.

According to the feature N3, when the second predetermined process is started, the second correspondence start information corresponding to the second predetermined process is set for the stack pointer, so that the appropriate address in the second predetermined process is set. Information can be stored in the stack area.

Feature N4. At least one stored in the internal storage means when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. A function of executing the processes of step S3802 and step S3902 to step S3907 in the main CPU 63 in the fifteenth embodiment, 16th In the embodiment, the function of executing the process of step S4402 in the main CPU 63, in the seventeenth embodiment, the function of executing the process of steps S4502 to S4507 in the main CPU 63, and in the eighteenth embodiment, the step in the main CPU 63. A function of executing the process of S4602, a function of executing the processes of steps S4701 and S4703 in the main CPU 63 in the 19th embodiment), and
When the second predetermined process is completed or after the second predetermined process is completed, the return execution means for returning the predetermined information saved in the predetermined storage means to the internal storage means (in the fifteenth embodiment, step S3804 and the step S3804 in the main CPU 63). The function of executing the process of steps S3910 to S3915, the function of executing the process of step S4404 in the main CPU 63 in the 16th embodiment, and the process of steps S451 to S4515 in the main CPU 63 in the 17th embodiment. The function of executing the process of step S4605 in the main CPU 63 in the eighteenth embodiment, and the function of executing the processes of steps S4705 and S4706 in the main CPU 63 in the nineteenth embodiment).
With
The gaming machine according to any one of features N1 to N3, wherein the information of the stack pointer provided in the internal storage means is not the target of evacuation by the evacuation execution means.

According to the feature N4, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed is changed, the information is stored in the internal storage means. At least a part of the information is saved in the predetermined storage means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the internal storage means from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined processing is completed, the information saved in the predetermined storage means is returned to the internal storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process. Further, since the stack pointer information is not a target for saving, it is not necessary to secure a capacity for saving the stack pointer information in the predetermined storage means. Therefore, it is possible to reduce the capacity of the predetermined storage means. Further, even if the stack pointer information is not saved in this way, the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed. In that case, the stack pointer information becomes fixed information, so it is possible to restore the stack pointer information before the second predetermined process is started without saving the stack pointer information as described above. It is possible.

Feature N5. The predetermined storage means
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
With
The gaming machine according to feature N4, wherein the evacuation execution means saves the predetermined information in the second predetermined storage area.

According to the feature N5, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the information storage destination in the predetermined storage means can be stored in the first predetermined process and the second predetermined process. It is possible to make a clear difference. This makes it possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process. In this case, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, at least a part of the data stored in the internal storage means is stored. Information is saved in the second predetermined storage area. As a result, it is possible to save the information of the internal storage means immediately before the start of the second predetermined processing, and it is possible to save the information without using the first predetermined storage area.

Feature N6. The first predetermined storage area can store information and read information when the first predetermined process is executed, and can read information when the second predetermined process is executed. It is impossible to memorize the information of things,
The second predetermined storage area can store information and read information when the second predetermined process is executed, and can read information when the first predetermined process is executed. The gaming machine according to feature N5, which is characterized in that it cannot store information about things.

According to the feature N6, the first predetermined storage area can be treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area can be treated as a dedicated storage area for the second predetermined processing. It becomes.

In addition, with respect to the composition of the features N1 to N6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, Features I1 to I9, Features J1 to J4, Features K1 to K7, Features L1 to L20, Features M1 to M7, Features N1 to N6, Features O1 to O11, Features P1 to P12, Features Q1 to Q5, Features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic O group>
Features O1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
A first predetermined processing execution means for executing the first predetermined processing among the various processes (a function of executing a process other than the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
A second predetermined process execution means for executing the second predetermined process among the various processes (a function of executing the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
When the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, at least a part of the storage in the internal storage means is stored. The processing of the first state setting means (steps S4803 to S4808 in the main CPU 63) for setting the state of the predetermined storage area (WA register, BC register, DE register, HL register, IX register, and IY register), which is an area, to a predetermined state. Function to execute) and
A second state setting means (a function of executing the processes of steps S4903 to S4908 in the main CPU 63) that changes the state of the predetermined storage area to the predetermined state when or after the second predetermined process is completed.
A gaming machine characterized by being equipped with.

According to the feature O1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed, the predetermined storage area of the internal storage means Is set to a predetermined state, and when the second predetermined process is completed or after the second predetermined process is completed, the state of the predetermined storage area is set to the predetermined state again. As a result, the state of the predetermined storage area can be set to the predetermined state before and after the second predetermined process. Therefore, it is possible to prevent the state of the predetermined storage area by one of the first predetermined process and the second predetermined process from affecting the other process. From the above, various controls can be suitably performed.

Feature O2. The gaming machine according to feature O1, wherein the predetermined state is a state when the supply of operating power to the control means is started.

According to the feature O2, since the predetermined storage area is set to the state when the supply of the operating power to the control means is started as the predetermined state, the processing configuration for setting the predetermined state is simplified. Is possible.

Feature O3. The gaming machine according to feature O1 or O2, wherein the predetermined state is a state in which the predetermined storage area is cleared to "0".

According to the feature O3, since the predetermined storage area is set to the state in which "0" is cleared as the predetermined state, the processing configuration for setting the predetermined state can be simplified.

Feature O4. The gaming machine according to any one of features O1 to O3, wherein the predetermined storage area is a part of the storage area in the internal storage means.

According to the feature O4, since only a part of the storage area of the internal storage means is set to the predetermined state, it is possible to reduce the processing load for setting the predetermined state.

Feature O5. The internal storage means includes at least the predetermined storage area and another storage area (registers other than WA register, BC register, DE register, HL register, IX register, and IY register).
The second predetermined processing execution means has a configuration in which information is stored in the predetermined storage area in the second predetermined processing, but information is not stored in the separate storage area.
The gaming machine according to feature O4, wherein the first state setting means and the second state setting means have a configuration that does not change the state of the separate storage area.

According to the feature O5, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, the internal storage means performs the second predetermined process. A predetermined storage area for storing information is set in a predetermined state. This makes it possible to prevent the state of the predetermined storage area by the first predetermined process from affecting the second predetermined process. Further, since the state of the separate storage area is not changed, setting the predetermined state when the second predetermined process is started does not affect the process after the second predetermined process is completed. It will be possible.

Feature O6. The features O1 to O5, wherein the information in the predetermined storage area before the predetermined state is set by the first state setting means is information that is not used after the second predetermined process is completed. The gaming machine according to any one.

According to the feature O6, even if the predetermined storage area is set to the predetermined state when the second predetermined process is executed or the second predetermined process is executed, the second predetermined process is completed. It is possible to prevent the processing after the operation from being affected.

Feature O7. A part stored in the internal storage means when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation where the second predetermined process is executed is changed. The save execution means (function of executing the process of step S4802 in the main CPU 63) for saving the predetermined information (flag register information) which is the information of the above to the predetermined storage means (main side RAM 65), and
Return execution means for returning the predetermined information saved in the predetermined storage means to the internal storage means when the second predetermined process is finished or after the end (function for executing the process of step S4810 in the main CPU 63). When,
The gaming machine according to any one of features O1 to O6.

According to the feature O7, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed is changed, the information is stored in the internal storage means. Predetermined information, which is a part of information, is saved in the predetermined storage means. As a result, when the second predetermined process is executed, the information stored in the internal storage means when the first predetermined process is executed and required for the subsequent execution of the first predetermined process is rewritten. It is possible to prevent it. Further, when or after the second predetermined processing is completed, the predetermined information saved in the predetermined storage means is returned to the internal storage means. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the internal storage means before the execution of the second predetermined process.

Feature O8. The first predetermined process includes a process for controlling the progress of the game.
The gaming machine according to any one of features O1 to O7, wherein the second predetermined processing includes a processing for managing a gaming history.

According to the feature O8, the progress of the game is controlled by executing the process for controlling the progress of the game as the first predetermined process and executing the process for managing the game history as the second predetermined process. It is possible to prevent the information used in the process for managing the game history from being rewritten when the process for the purpose is executed.

Feature O9. The predetermined storage means
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
With
The second predetermined storage area is a history storage area (normal counter area 231 and counter area 232 for open / close execution mode) in which history information of the game corresponding to a predetermined event occurs due to the execution of the game. , The gaming machine according to feature O8, which comprises a counter area 233) for a high frequency support mode.

According to the feature O9, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature O10. The second predetermined processing execution means is an information derivation means (step S4208 in the main CPU 63) for deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature O9, which is characterized by having a function of executing the processing of the above.

According to the feature O10, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. It becomes possible to grasp the result.

Feature O11. The gaming machine according to feature O10, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature O11, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

It should be noted that, with respect to the configuration of the features O1 to O11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic P group>
Features P1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
A first predetermined processing execution means for executing the first predetermined processing among the various processes (a function of executing a process other than the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
A second predetermined process execution means for executing the second predetermined process among the various processes (a function of executing the management execution process on the main CPU 63 in the 15th to 21st embodiments) and
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
A gaming machine characterized by being equipped with.

According to the feature P1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. As a result, the storage destination of the information in the predetermined storage means can be clearly different between the first predetermined process and the second predetermined process. Therefore, it is possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process.

Feature P2. The first predetermined process includes a process for controlling the progress of the game.
The gaming machine according to feature P1, wherein the second predetermined processing includes a processing for managing a gaming history.

According to the feature P2, the progress of the game is controlled by executing the process for controlling the progress of the game as the first predetermined process and executing the process for managing the game history as the second predetermined process. It is possible to prevent the information used in the process for managing the game history from being rewritten when the process for the purpose is executed.

Feature P3. The second predetermined storage area is a history storage area (normal counter area 231 and counter area 232 for open / close execution mode) in which history information of the game corresponding to a predetermined event occurs due to the execution of the game. , The gaming machine according to feature P2, characterized in that it is provided with a counter area 233) for a high frequency support mode.

According to the feature P3, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature P4. The second predetermined processing execution means is an information derivation means (step S4208 in the main CPU 63) for deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to feature P3, which is characterized by having a function of executing the processing of the above.

According to the feature P4, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. It becomes possible to grasp the result.

Feature P5. The gaming machine according to feature P4, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature P5, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

Feature P6. In the first predetermined process, the first predetermined information which is a part of the information stored in the internal storage means when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed. A first evacuation means for evacuation to the first predetermined storage area (a function of executing the process of step S3802 in the main CPU 63 in the fifteenth embodiment, and executing the process of step S4402 in the main CPU 63 in the sixteenth embodiment). Function) and
When the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed, the second predetermined information, which is a part of the information stored in the internal storage means, is converted into the second predetermined process. In the second saving means (a function of executing the process of step S3902 to step S3907 in the main CPU 63 in the fifteenth embodiment, step S4502 to step S4502 in the main CPU 63 in the seventeenth embodiment). A function of executing the process of step S4507, a function of executing the process of step S4602 in the main CPU 63 in the 18th embodiment, and a function of executing the processes of steps S4701 and S4703 in the main CPU 63 in the 19th embodiment). When,
The gaming machine according to any one of features P1 to P5, characterized in that

According to the feature P6, the first predetermined information, which is a part of the information stored in the internal storage means, is saved in the first predetermined storage area in the first predetermined process, and a part of the information stored in the internal storage means. The second predetermined information is saved in the second predetermined storage area in the second predetermined process. As a result, it is possible to save the information at a preferable timing for each information stored in the internal storage means, and the process for saving the information is distributed and executed in the first predetermined process and the second predetermined process. It becomes possible.

Feature P7. When the second predetermined processing is completed or after the completion, the first return executing means for returning the first predetermined information saved in the first predetermined storage area to the internal storage means (mainly in the fifteenth embodiment). A function of executing the process of step S3804 in the side CPU 63, a function of executing the process of step S4404 in the main CPU 63 in the 16th embodiment), and
A second return execution means (mainly in the fifteenth embodiment) for returning the second predetermined information saved in the second predetermined storage area to the internal storage means when the second predetermined process is completed or after the second predetermined process is completed. A function of executing the process of steps S391 to S3915 in the side CPU 63, a function of executing the process of steps S451 to S4515 in the main CPU 63 in the 17th embodiment, and a function of executing the process of step S4605 in the main CPU 63 in the 18th embodiment. A function of executing the process, in the 19th embodiment, a function of executing the process of step S4705 and step S4706 in the main CPU 63), and
The gaming machine according to feature P6, characterized in that the machine is equipped with.

According to the feature P7, when the second predetermined processing is completed or after the second predetermined processing is completed, the first predetermined information saved in the first predetermined storage area is returned to the internal storage means, and the first predetermined information is saved in the second predetermined storage area. Since the 2 predetermined information is returned to the internal storage means, it is possible to return the state of the internal storage means to the state before the start of the second predetermined process.

Feature P8. The gaming machine according to feature P6 or P7, wherein the first predetermined information includes information of a flag register provided in the internal storage means.

According to the feature P8, it is possible to appropriately save the information of the flag register in the situation where the first predetermined process is being executed.

Feature P9. The gaming machine according to any one of features P6 to P8, wherein the second predetermined information includes information on all registers of the internal storage means.

According to the feature P9, since the information of all the registers of the internal storage means is collectively saved, it is not necessary to selectively save the register information.

Feature P10. The second predetermined storage area is
A stack area (stack area 224 for non-specific control) in which information is written by a push instruction and information is read by a pop instruction, and
A work area (work area 223 for non-specific control) in which information is written and read by a load instruction, and
With
The gaming machine according to feature P9, wherein the second evacuation execution means saves the second predetermined information to one of the stack area and the work area.

According to the feature P10, the information of all the registers of the internal storage means is saved in one of the stack area and the work area in the second predetermined storage area. As a result, it is possible to aggregate the save destinations of the information of all the registers, and it is possible to simplify the processing configuration for saving and the processing configuration for returning.

Features P11. The gaming machine according to feature P10, wherein the second evacuation execution means saves the second predetermined information in the stack area.

According to the feature P11, it is possible to save the information of all the registers while not using the work area.

Feature P12. The gaming machine according to any one of features P6 to P11, wherein the second predetermined information includes information on a stack pointer of the internal storage means.

According to the feature P12, it is possible to appropriately save the information of the stack pointer in the situation where the first predetermined process is being executed.

It should be noted that, with respect to the configuration of the features P1 to P12, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the inventions relating to the feature L group, the feature M group, the feature N group, the feature O group, and the feature P group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to appropriately perform various controls, and there is still room for improvement in this respect.

<Characteristic Q group>
Features Q1. A control means (MPU62) that executes various processes and temporarily stores information in an internal storage means (register of the main CPU 63) when the processes are executed.
A history storage means (management RAM 241) that is provided as a chip separate from the control means and can temporarily store information, and
With
When a predetermined event occurs due to the execution of the game, the control means stores the history information of the game corresponding to the event in the history storage means (normal ball entry management process in the main CPU 63, A gaming machine characterized by having a function of executing a ball entry management process in an open / close execution mode and a ball entry management process in a high-frequency support mode).

According to the feature Q1, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, since the history storage means is provided as a chip separate from the control means, it is possible to increase the storage capacity for storing the history information while using the general-purpose control means.

Features Q2. The gaming machine according to feature Q1, wherein the control means includes a predetermined storage means (main side RAM 65) that temporarily stores information when executing various processes.

According to the feature Q2, in a configuration in which not only the predetermined storage means provided in the control means but also the history storage means provided as a chip separate from the control means is provided, the history storage means stores the history information. It is possible to store a large amount of historical information.

Features Q3. The gaming machine according to feature Q2, wherein the control means temporarily stores the information in the predetermined storage means when executing a process related to the history information.

According to the feature Q3, in the configuration in which the history storage means for storing the history information is provided as a chip separate from the control means, when the process related to the history information is executed, the predetermined storage means provided in the control means is used. Since the information is temporarily stored, it is possible to prevent the processing speed from being extremely reduced when the processing related to the history information is executed.

Features Q4. The control means executes the process of step S4208 in the main CPU 63 to derive the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means. The gaming machine according to any one of features Q1 to Q3, which is characterized by having a function of performing.

According to the feature Q4, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage means. It becomes possible to grasp the result.

Features Q5. The gaming machine according to feature Q4, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature Q5, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing.

It should be noted that, with respect to the configuration of the features Q1 to Q5, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the above-mentioned feature Q group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to manage the gaming machine preferably, and there is still room for improvement in this respect.

<Characteristic R group>
Feature R1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
Based on the fact that a plurality of events including the first event and the second event occur when the supply of the operating power to the control means having the setting means is started, the setting means becomes the target of use. Situation generating means (in the 22nd embodiment, the function of executing the processes of steps S5003 to S5006 in the main CPU 63, in another form, the main CPU 63) so that the set value can be set. The function of executing the processing of steps S5503 to S5507, and in the 23rd embodiment, the function of executing the processing of steps S5703 to S5705 and S5715 in the main CPU 63).
A gaming machine characterized by being equipped with.

According to the feature R1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. In this case, in order to set the set value to be used, a plurality of events including the first event and the second event occur when the supply of the operating power to the control means is started. Must be done. This makes it difficult to perform the act of setting the set value to be used due to fraud.

Feature R2. Opening grasping means for grasping that the opening / closing body (front door frame 14) is in the open state (a function of executing the process of step S5005 in the main CPU 63 in the 22nd embodiment, and a step in the main CPU 63 in another embodiment). It has a function of executing the process of S5505, and a function of executing the process of step S5703 in the main CPU 63 in the 23rd embodiment).
The feature R1 is characterized in that the situation generating means identifies that the first event has occurred based on the fact that the opening / closing body is grasped by the opening grasping means. The gaming machine described in.

According to the feature R2, the opening / closing body needs to be in the open state in order to set the set value to be used. As a result, when an act of illegally setting a set value to be used is performed, the fraudulent act can be made conspicuous, and as a result, the fraudulent act can be easily found. ..

Feature R3. Another open / close grasping means for grasping that the separate opening / closing body (game machine main body 12) is in the open state (a function of executing the process of step S5006 in the main CPU 63 in the 22nd embodiment, and the main CPU 63 in another form). The function of executing the process of step S5506 in the above, and the function of executing the process of step S5704 in the main CPU 63 in the 23rd embodiment) are provided.
The situation generating means is characterized in that it identifies that the second event has occurred based on the fact that the separate opening / closing body is in the open state is grasped by the separate opening grasping means. Feature The gaming machine described in R2.

According to the feature R3, in order to set the set value to be used, it is necessary not only to open the opening / closing body but also to open another opening / closing body. As a result, it becomes possible to make it difficult to perform an act of setting a set value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R4. The setting means selects at least one of the setting value to be used and the setting value to be used based on the operation of the predetermined operating means (update button 68b, reset button 68c). It is a configuration to do
The gaming machine according to feature R2 or R3, wherein the predetermined operating means is configured to be operable by opening another opening / closing body.

According to the feature R4, the set value to be used cannot be set unless the opening / closing body different from the other opening / closing body which is opened to enable the operation of the predetermined operating means is opened. As a result, it becomes possible to make it difficult to perform an act of setting a set value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R5. The opening / closing body defines the front side of the gaming machine in the gaming area where the gaming ball flows down.
The gaming machine according to any one of features R2 to R4, wherein the gaming area is opened to the front of the gaming machine by opening the opening / closing body.

According to the feature R5, in order to set the set value to be used, it is necessary to open the opening / closing body in the open state and open the gaming area to the front of the gaming machine. As a result, it becomes possible to make it difficult to perform an act of setting a set value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R6. The situation generating means identifies that one of the plurality of events has occurred based on the fact that a predetermined operation by the setting key is performed on the setting key insertion unit (setting key insertion unit 68a). The gaming machine according to any one of features R1 to R5.

According to the feature R6, in order to set the set value to be used, it is necessary not only to perform a predetermined operation with the set key for the setting key insertion part but also to generate another event. be. This makes it difficult to perform the act of setting the set value to be used due to fraud.

Feature R7. The situation generating means causes the plurality of events based on the occurrence of a predetermined gaming event (operation of the launch operation device 28, entry into the through gate 35) that occurs when the game is played. The gaming machine according to any one of features R1 to R6, wherein one of the events is identified as occurring.

According to the feature R7, in order to set the set value to be used, it is necessary not only to generate a predetermined game event that occurs when the game is played, but also to be different from that. It is necessary to generate the event of. This makes it difficult to perform the act of setting the set value to be used due to fraud.

Feature R8. The situation generating means is based on the fact that the game ball is detected by the ball entry detection means (gate detection sensor 49a) that detects that the game ball has entered a predetermined ball entry portion provided in the game area. The gaming machine according to any one of features R1 to R7, wherein one of the plurality of events is identified as occurring.

According to the feature R8, in order to set the set value to be used, it is necessary to put the game ball into a predetermined ball entry portion, and it is necessary to generate another event. There is. This makes it difficult to perform the act of setting the set value to be used due to fraud.

Feature R9. It is provided with a set value notifying means (a function of executing a setting confirmation process in the main CPU 63) for notifying the set value to be used set by the setting means by the notifying means.
The set value notifying means sets the set value to be used set by the setting means to the notifying means based on the occurrence of a plurality of events including the first event and the second event. The gaming machine according to any one of features R1 to R8.

According to the feature R9, it is possible to make it difficult to perform the act of confirming the set value due to fraud. In addition, since the manager of the game hall may generate the first event and the second event in both the case of setting the set value to be used and the case of confirming the set value, the work can be done. It will be standardized and it will be easier to understand each work.

Feature R10. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
A plurality of events including both that a predetermined operation is performed by the setting key for the setting key insertion unit (setting key insertion unit 68a) and another event different from the predetermined operation by the setting key for the setting key insertion unit. A situation generating means (in the 22nd embodiment, the main CPU 63) so that the setting value to be used can be set by the setting means based on the occurrence. A function of executing the processes of steps S5003 to S5006, a function of executing the processes of steps S5503 to S5507 in the main CPU 63 in another embodiment, and steps S5703 to S5705 and S5715 in the main CPU 63 in the 23rd embodiment. Function to execute processing) and
A gaming machine characterized by being equipped with.

According to the feature R10, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the advantage of the player, the player can use the more advantageous setting value. You will expect it to be. In this case, in order to set the set value to be used, it is necessary not only to perform a predetermined operation with the set key for the setting key insertion unit but also to generate another event. This makes it difficult to perform the act of setting the set value to be used due to fraud.

Feature R11. Opening grasping means for grasping that the opening / closing body (front door frame 14) is in the open state (a function of executing the process of step S5005 in the main CPU 63 in the 22nd embodiment, and a step in the main CPU 63 in another embodiment). It has a function of executing the process of S5505, and a function of executing the process of step S5703 in the main CPU 63 in the 23rd embodiment).
The feature R10 is characterized in that the situation generating means identifies that another event has occurred based on the fact that the opening / closing body is in the open state is grasped by the opening grasping means. Described gaming machine.

According to the feature R11, the opening / closing body needs to be in the open state in order to set the set value to be used. As a result, when an act of illegally setting a set value to be used is performed, the fraudulent act can be made conspicuous, and as a result, the fraudulent act can be easily found. ..

Feature R12. Another open / close grasping means for grasping that the separate opening / closing body (game machine main body 12) is in the open state (a function of executing the process of step S5006 in the main CPU 63 in the 22nd embodiment, and the main CPU 63 in another form). The function of executing the process of step S5506 in the above, and the function of executing the process of step S5704 in the main CPU 63 in the 23rd embodiment) are provided.
The situation generating means identifies that one of the plurality of events has occurred based on the fact that the separate opening / closing body is grasped by the separate opening grasping means. The gaming machine according to feature R11.

According to the feature R12, in order to set the set value to be used, it is necessary not only to open the opening / closing body but also to open another opening / closing body. As a result, it becomes possible to make it difficult to perform an act of setting a set value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R13. The setting means selects at least one of the setting value to be used and the setting value to be used based on the operation of the predetermined operating means (update button 68b, reset button 68c). It is a configuration to do
The gaming machine according to feature R11 or R12, wherein the predetermined operating means is configured to be operable by opening another opening / closing body.

According to the feature R13, the set value to be used cannot be set unless the opening / closing body different from the other opening / closing body which is opened to enable the operation of the predetermined operating means is opened. As a result, it becomes possible to make it difficult to perform an act of setting a set value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R14. The opening / closing body defines the front side of the gaming machine in the gaming area where the gaming ball flows down.
The gaming machine according to any one of features R11 to R13, wherein the gaming area is opened to the front of the gaming machine by opening the opening / closing body.

According to the feature R14, in order to set the set value to be used, it is necessary to open the opening / closing body in the open state and open the gaming area to the front of the gaming machine. As a result, it becomes possible to make it difficult to perform an act of setting a set value to be used due to fraud, and it is possible to make the fraudulent act conspicuous.

Feature R15. The situation generating means causes the plurality of events based on the occurrence of a predetermined gaming event (operation of the launch operation device 28, entry into the through gate 35) that occurs when the game is played. The gaming machine according to any one of features R10 to R14, wherein one of the events is identified as occurring.

According to the feature R15, in order to set the set value to be used, not only the predetermined operation by the setting key for the setting key insertion portion is performed, but also the predetermined operation that occurs when the game is performed. It is necessary to generate the game event of. This makes it difficult to perform the act of setting the set value to be used due to fraud.

Feature R16. The situation generating means is based on the fact that the game ball is detected by the ball entry detection means (gate detection sensor 49a) that detects that the game ball has entered a predetermined ball entry portion provided in the game area. The gaming machine according to any one of features R10 to R15, wherein one of the plurality of events is identified as occurring.

According to the feature R16, in order to set the set value to be used, not only the predetermined operation is performed by the setting key for the setting key insertion portion, but also the game ball is inserted into the predetermined entry portion. You need to make it a ball. This makes it difficult to perform the act of setting the set value to be used due to fraud.

Feature R17. It is provided with a set value notifying means (a function of executing a setting confirmation process in the main CPU 63) for notifying the set value to be used set by the setting means by the notifying means.
The setting value notification means is based on the fact that the predetermined operation is performed by the setting key for the setting key insertion unit and that a plurality of events including both of the other events have occurred. The gaming machine according to any one of features R10 to R16, wherein the set value to be used, which is set by the above-mentioned method, is notified by the notification means.

According to the feature R17, it is possible to make it difficult to perform the act of confirming the set value due to fraud. In addition, the manager of the game hall performs a predetermined operation with the setting key for the setting key insertion part and another event occurs regardless of whether the setting value to be used is set or the setting value is confirmed. Therefore, the work is standardized and it becomes easy to grasp each work.

It should be noted that, with respect to the configuration of the features R1 to R17, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the above-mentioned feature R group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to deal with fraudulent acts against the gaming machine, and there is still room for improvement in this respect.

<Characteristic S group>
Features S1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
Situation generating means (in the 22nd embodiment, steps S5003 to S5006 and steps S5401 in the main CPU 63) so that the set value to be used can be set by the setting means. A function to execute the process of step S5408, another function to execute the process of steps S5503 to S5507 in the main CPU 63, and in the 23rd embodiment, the process of steps S5703 to S5705 and step S5715 in the main CPU 63 is executed. In the 24th embodiment, the function of executing the processing of steps S5801 to S5804 in the main CPU 63, and in the 25th embodiment, the function of executing the processing of steps S5901 to S5904 in the main CPU 63).
A set value grasping means for grasping whether or not the set value before the settable state is reached and the set value set by the setting means (in the 22nd embodiment, step S5017 in the main CPU 63). And the function of executing the process of steps S5111 to S5112, in another form, the function of executing the process of steps S5611 to S5612 in the main CPU 63).
A gaming machine characterized by being equipped with.

According to the feature S1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. In this case, it is grasped whether or not the set value before the settable state and the set value set in the settable state are the same. As a result, it is possible to execute a process corresponding to whether or not the set values are the same across the settable status. Therefore, when the set value to be used is set, it is possible to generate a favorable situation with respect to the set result, and it is possible to preferably perform the setting work of the set value.

Feature S2. Based on the fact that the set value grasping means grasps that the set value and the set value set by the setting means are the same before the settable state is reached, the corresponding same-time processing is performed. It is provided with the same time means to be executed (in the 22nd embodiment, the function of executing the process of step S5113 in the main CPU 63, and in another embodiment, the function of executing the process of step S5613 in the main CPU 63). The gaming machine according to the feature S1.

According to the feature S2, when the set values are the same across the settable situation, the same time processing is executed, so that it is possible to generate a preferable situation for the same set value. Become.

Feature S3. The gaming machine according to feature S2, wherein the same-time means executes a process for performing a notification corresponding to the fact that the set value has not been changed as the same-time process.

According to the feature S3, it is possible to notify the manager of the game hall or the like that the set values are the same across the settable status.

Features S4. Based on the fact that the set value grasping means grasps that the set value and the set value set by the setting means are different from each other before the settable state is reached, the corresponding non-identical processing is executed. It is provided with non-identical means (a function of executing the process of step S5114 in the main CPU 63 in the 22nd embodiment, and a function of executing the process of step S5614 in the main CPU 63 in another embodiment). The gaming machine according to any one of features S1 to S3.

According to the feature S4, when the set values are not the same across the settable situation, the non-identical processing is executed, so that it is possible to generate a preferable situation for the change of the set value. It becomes.

Feature S5. The gaming machine according to feature S4, wherein the non-identical means performs a process for performing a notification corresponding to a change in the set value as the non-identical process. ..

According to the feature S5, it is possible to notify the manager of the game hall or the like that the set value has been changed with the settable status in between.

Feature S6. The situation generating means sets the setting based on the fact that it becomes necessary to erase the information of the storage means for storing the set value after the supply of the operating power to the control means having the setting means is started. The gaming machine according to any one of features S1 to S5, characterized in that the situation is such that it is possible.

According to the feature S6, when it becomes necessary to erase the information of the storage means for storing the set value, the setting is possible, so that the game is continued even though the set value information is erased. It is possible to prevent it. In this case, the configuration of the feature S1 is provided, and it is grasped whether or not the set value before the settable state is the same as the set value set in the settable state. As a result, it is possible to execute a process corresponding to whether or not the set values are the same across the settable status.

Feature S7. The set value is not changed based on the fact that the set value grasping means grasps that the set value and the set value set by the setting means are the same before the settable state is reached. Means for performing the notification corresponding to the fact (in the 22nd embodiment, the function of executing the process of step S5113 in the main CPU 63, in another embodiment, the function of executing the process of step S5613 in the main CPU 63). The gaming machine according to feature S6, characterized in that it is provided.

According to the feature S7, even if the settable state becomes possible due to the erasure of the information of the storage means, the set value is changed if the set value is the same with the settable state in between. Notification corresponding to the absence is performed. As a result, it is possible to notify the player that the set value has not been changed even if the settable state is reached in the middle of the game, and the player is safe even if the settable state is set in the middle of the game. It is possible to continue the game with heart.

Feature S8. The situation generating means is
Based on the start of supply of the operating power to the control means having the setting means, the first situation generating means (in the 22nd embodiment, steps S5003 to S5003 in the main CPU 63) for setting the settable state. A function of executing the process of step S5006, another function of executing the process of steps S5503 to S5507 in the main CPU 63, and in the 23rd embodiment, executing the processes of steps S5703 to S5705 and step S5715 in the main CPU 63. Function to do) and
A second situation in which the settable state is established based on the need to erase the information of the storage means for storing the set value after the supply of the operating power to the control means is started. A generation means (a function of executing the processing of steps S5401 to S5408 in the main CPU 63 in the 22nd embodiment, a function of executing the processing of steps S5801 to S5804 in the main CPU 63 in the 24th embodiment, 25th embodiment. In the embodiment, the function of executing the processes of steps S5901 to S5904 in the main CPU 63) and
With
The set value grasping means is before the settable state regardless of whether the settable state generated by the first situation generating means or the settable state caused by the second situation generating means. The gaming machine according to any one of features S1 to S7, characterized in that it is possible to grasp whether or not the set value set in the above and the set value set by the setting means are the same.

According to the feature S8, when it becomes necessary to erase the information of the storage means for storing the set value, the setting is possible, so that the game is continued even though the information of the set value is erased. It is possible to prevent it. In this case, the settable status is set as the information of the storage means is erased by using the same processing as in the case where the settable status is set based on the start of supply of the operating power to the control means. When this occurs, it is possible to execute a process corresponding to whether or not the set values are the same with the configurable status in between.

It should be noted that, with respect to the configuration of the features S1 to S8, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention according to the above-mentioned feature S group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to create a suitable situation when a setting value that determines the advantage of the gaming machine is set, and this point is still improved. There is room for.

<Characteristic T group>
Features T1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
A first predetermined process execution means (a function of executing a process other than the management execution process on the main CPU 63 in the fifteenth to twenty-fifth embodiments) and a first predetermined process execution means for executing the first predetermined process among the various processes.
A second predetermined processing execution means for executing the second predetermined processing among the various processes (a function of executing the management execution processing on the main CPU 63 in the fifteenth to twenty-fifth embodiments) and
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
A first monitoring execution means for monitoring whether or not the first predetermined storage area is normal (in the 22nd embodiment, a function of executing the processes of steps S5401 to S5404 in the main CPU 63, in the 24th embodiment A function of executing the processing of steps S5801 to S5804 in the main CPU 63, a function of executing the processing of steps S5901 to S5904 in the main CPU 63 in the 25th embodiment, and step S7701 in the main CPU 63 in the 32nd embodiment. ~ Function to execute the process of step S7703) and
A second monitoring execution means for monitoring whether or not the second predetermined storage area is normal (in the 22nd embodiment, a function of executing the processing of steps S5405 to S5408 in the main CPU 63, in the 24th embodiment A function of executing the processes of step S5809, step S5810, step S5812 and step S5813 in the main CPU 63, and a function of executing the processes of steps S6101, step S6102, step S6105 and step S6106 in the main CPU 63 in the 25th embodiment. In the 32nd embodiment, the function of executing the processes of steps S7706 to S7708 in the main CPU 63) and
A gaming machine characterized by being equipped with.

According to the feature T1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. As a result, the storage destination of the information in the predetermined storage means can be clearly different between the first predetermined process and the second predetermined process. Therefore, it is possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process. Further, by executing the monitoring of whether or not the first predetermined storage area is normal and the monitoring of whether or not the second predetermined storage area is normal, the first predetermined processing and the second predetermined storage area are executed. It is possible to specify whether or not each of the processes can be performed normally.

Feature T2. The game according to feature T1, wherein the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are executed by either the first predetermined process or the second predetermined process. Machine.

According to the feature T2, the monitoring of whether or not the first predetermined storage area is normal and the monitoring of whether or not the second predetermined storage area is normal are performed in one of the first predetermined process and the second predetermined process. Aggregated and executed. As a result, it is possible to simplify the processing configuration as compared with the configuration in which the monitoring of each storage area is distributed and executed by the first predetermined processing and the second predetermined processing.

Feature T3. The gaming machine according to feature T1 or T2, wherein the monitoring by the first monitoring execution means and the monitoring by the second monitoring execution means are executed by the first predetermined process.

According to the feature T3, it is possible to collectively execute the monitoring of whether or not the first predetermined storage area is normal and the monitoring of whether or not the second predetermined storage area is normal by the first predetermined process. It becomes.

Feature T4. A predetermined erasing means (main side in the 22nd embodiment) for erasing the information of the first predetermined storage area based on the fact that the first predetermined storage area is specified to be abnormal by the first monitoring execution means. The function of executing the process of step S5410 in the CPU 63, the function of executing the process of step S5806, step S5811 and step S5814 in the main CPU 63 in the 24th embodiment, and the step S5906, step S5906 in the main CPU 63 in the 25th embodiment. The gaming machine according to any one of features T1 to T3, characterized in that it includes a function of executing the processes of S6103 and step S6107).

According to the feature T4, when the first predetermined storage area is abnormal, the information in the first predetermined storage area is erased, so that the first predetermined process is executed while the first predetermined storage area is in an abnormal state. It is possible to prevent it from happening.

Feature T5. The predetermined erasing means erases the information of the first predetermined storage area based on the fact that the first monitoring execution means has identified that the first predetermined storage area is abnormal, and the second predetermined storage area. The gaming machine according to feature T4, wherein the information of the area is erased.

According to the feature T5, when the first predetermined storage area is abnormal, not only the first predetermined storage area but also the second predetermined storage area is erased. As a result, when there is a possibility that an abnormality has occurred in the second predetermined storage area, the information in the second predetermined storage area can be deleted regardless of the monitoring result by the second monitoring execution means.

Feature T6. The predetermined erasing means is characterized in that the information in the second predetermined storage area is erased based on the fact that the second predetermined storage area is identified as abnormal by the second monitoring execution means. The gaming machine according to T4 or T5.

According to the feature T6, when the first predetermined storage area is abnormal, the information in the first predetermined storage area is erased, so that the first predetermined process is executed while the first predetermined storage area is in an abnormal state. It is possible to prevent it from happening.

Feature T7. The predetermined erasing means erases the information of the second predetermined storage area based on the fact that the second predetermined storage area is identified as abnormal by the second monitoring execution means, and the first predetermined storage area is stored. The gaming machine according to feature T6, wherein the information of the area is erased.

According to the feature T7, when the second predetermined storage area is abnormal, not only the second predetermined storage area but also the first predetermined storage area is erased. As a result, when there is a possibility that an abnormality has occurred in the first predetermined storage area, the information in the first predetermined storage area can be deleted regardless of the monitoring result by the first monitoring execution means.

Feature T8. Described in any one of features T4 to T7, wherein the process for erasing information by the predetermined erasing means is executed by either the first predetermined process or the second predetermined process. Gaming machine.

According to the feature T8, the process of erasing the information of each predetermined storage area based on the identification of the abnormality is collectively executed by one of the first predetermined process and the second predetermined process. As a result, it is possible to simplify the processing configuration as compared with the configuration in which the erasure of the information in each storage area is distributed between the first predetermined processing and the second predetermined processing.

Feature T9. The gaming machine according to any one of features T4 to T7, wherein the process for erasing information by the predetermined erasing means is executed in the first predetermined process.

According to the feature T9, it is possible to collectively execute the process of erasing the information of each predetermined storage area based on the identification of the abnormality in the first predetermined process.

Feature T10. The first predetermined process includes a process for controlling the progress of the game.
The gaming machine according to any one of features T1 to T9, wherein the second predetermined processing includes a processing for managing a gaming history.

According to the feature T10, the progress of the game is controlled by executing the process for controlling the progress of the game as the first predetermined process and executing the process for managing the game history as the second predetermined process. It is possible to prevent the information used in the process for managing the game history from being rewritten when the process for the purpose is executed.

Feature T11. The second predetermined storage area is a history storage area (normal counter area 231 and counter area 232 for open / close execution mode) in which history information of the game corresponding to a predetermined event occurs due to the execution of the game. , The gaming machine according to feature T10, which comprises a counter area 233) for a high frequency support mode.

According to the feature T11, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature T12. The second predetermined processing execution means is an information derivation means (step S4208 in the main CPU 63) for deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to the feature T11, which is characterized by having a function of executing the processing of the above.

According to the feature T12, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. It becomes possible to grasp the result.

Feature T13. The gaming machine according to feature T12, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature T13, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

It should be noted that, with respect to the configuration of the features T1 to T13, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic U group>
Features U1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
Among the various processes, the first predetermined process execution means for executing the first predetermined process (a function of executing a process other than the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A second predetermined processing execution means for executing the second predetermined processing among the various processes (a function of executing the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A flag register provided in the internal storage means when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. State setting means (in the 26th embodiment, the function of executing the processes of steps S6202 to S6204 and S6211 in the main CPU 63, and in the 27th embodiment, the step in the main CPU 63). (Functions for executing the processes of S6302 to S6307 and step S6312) and
A gaming machine characterized by being equipped with.

According to the feature U1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed, the flag register of the internal storage means The state is set to a specific state. As a result, it is possible to start the second predetermined process in a situation where the state of the flag register is a predetermined specific state. Therefore, various controls can be suitably performed.

Features U2. The gaming machine according to feature U1, wherein the specific state is a state when the supply of operating power to the control means is started.

According to the feature U2, since the flag register is set as a specific state to the state when the supply of the operating power to the control means is started, the processing configuration for setting to the specific state can be simplified. It will be possible.

Features U3. The gaming machine according to feature U1 or U2, wherein the specific state is a state in which the flag register is cleared to "0".

According to the feature U3, since the flag register is set to the state in which "0" is cleared as the specific state, the processing configuration for setting to the specific state can be simplified.

Features U4. When the second predetermined process is completed or after the process is completed, the means for setting the state of the flag register to the specific state (in the 26th embodiment, the processes of steps S6213 to S6218 in the main CPU 63 are executed. The gaming machine according to any one of features U1 to U3, characterized in that the function, in the 27th embodiment, is a function of executing the processes of steps S6314 to S6322 in the main CPU 63).

According to the feature U4, not only when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation where the second predetermined process is executed is changed, but also when the second predetermined process is executed. The state of the flag register is also set to a specific state when it ends or when it ends. As a result, it is possible to restart the first predetermined process in a situation where the state of the flag register is a predetermined specific state. In addition, the state of the flag register can be set to a specific state before and after the second predetermined process. Therefore, it is possible to prevent the state of the flag register by one of the first predetermined process and the second predetermined process from affecting the other process.

Features U5. A predetermined storage means (main side RAM 65) for temporarily storing information when processing is executed by the control means is provided.
The state setting means
Means for setting the state of the predetermined storage area in the predetermined storage means to the specific state (in the 26th embodiment, the function of executing the processes of steps S6202 to S6204 in the main CPU 63, in the 27th embodiment The function of executing the processes of steps S6302 to S6307 in the main CPU 63) and
Means for making the state of the flag register into the specific state by storing the information stored in the predetermined storage area in the flag register (in the 26th embodiment, the process of step S6211 in the main CPU 63 is performed. A function to execute, in the 27th embodiment, a function to execute the process of step S6312 in the main CPU 63), and
The gaming machine according to any one of features U1 to U4.

According to the feature U5, even if the state of the flag register cannot be directly set to a specific state as an instruction of the control means, the flag is flagged by using the writing of information to the predetermined storage means and the reading of the information. It is possible to set the state of the register to a specific state.

Features U6. The predetermined storage means
A stack area (stack area 222 for specific control) in which the control means can write information by a push instruction and the control means can read information by a pop instruction.
A work area (work area 221 for specific control) in which the control means can write and read information by a load instruction, and
With
The gaming machine according to feature U5, wherein the predetermined storage area is provided in the stack area.

According to the feature U6, even if the information stored in the work area cannot be directly written to the flag register, the state of the flag register is specified by using the writing of the information to the stack area and the reading of the information. It is possible to set the state.

Features U7. A predetermined register provided in the internal storage means when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. Means for making the state of Has a function to execute processing)
The state setting means according to any one of features U1 to U6, wherein the state of the flag register is changed to the specific state after the state of the predetermined register is set to the predetermined state. Game machine.

The state of the flag register may change each time various processes are executed in the control means. In this case, according to the feature U7, since the state of the flag register is set to the specific state after the state of the predetermined register is set to the predetermined state, the flag register is set to the specific state immediately before the second predetermined process is started. It becomes possible to do so.

Features U8. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means is a means for setting the state of the flag register to a specific state (in the 26th embodiment, a function of executing the processes of steps S6202 to S6204 and step S6211 in the main CPU 63, 27th embodiment). The gaming machine is characterized by having a function of executing the processes of steps S6302 to S6307 and step S6312 on the main CPU 63).

According to the feature U8, the state of the flag register can be set to a specific state as needed.

It should be noted that, with respect to the configuration of the features U1 to U8, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic V group>
Features V1. A control means (main side CPU 63) for executing various processes and temporarily storing information in an internal storage means (register of the main side CPU 63) at the time of executing the process is provided.
The control means
Among the various processes, the first predetermined process execution means for executing the first predetermined process (a function of executing a process other than the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A second predetermined processing execution means for executing the second predetermined processing among the various processes (a function of executing the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A flag register provided in the internal storage means when the situation in which the first predetermined process is being executed changes to the situation in which the second predetermined process is executed or when the situation in which the second predetermined process is executed is changed. The function of executing the process of step S3802 in the main CPU 63 in the fifteenth embodiment, and the function of step S4402 in the main CPU 63 in the sixteenth embodiment. A function of executing processing, a function of executing the processing of step S4802 in the main CPU 63 in the twentieth embodiment, a function of executing the processing of steps S6402 to S6405 in the main CPU 63 in the 28th embodiment, 29th In the embodiment, the function of executing the processes of steps S6502 to S6509 in the main CPU 63) and
Return execution means for returning the information of the flag register saved in the predetermined storage means to the flag register when the second predetermined process is finished or after the end (in the fifteenth embodiment, step S3804 in the main CPU 63). In the 16th embodiment, the function of executing the process of step S4404 in the main CPU 63, in the 20th embodiment, the function of executing the process of step S4810 in the main CPU 63, the 28th embodiment. Then, the function of executing the processes of steps S6407 to S6415 in the main CPU 63, and in the 29th embodiment, the function of executing the processes of steps S6511 to S6518 in the main CPU 63).
A gaming machine characterized by being equipped with.

According to the feature V1, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or when the situation where the second predetermined process is executed is changed, the information of the flag register is stored in the predetermined state. Evacuated by means. As a result, when the second predetermined process is executed, it is possible to prevent the information stored in the flag register from being rewritten when the first predetermined process is executed. Further, when or after the second predetermined processing is completed, the information saved in the predetermined storage means is returned to the flag register. As a result, when the second predetermined process is completed, it is possible to execute a process different from the second predetermined process from the state of the flag register before the execution of the second predetermined process. From the above, various controls can be suitably performed.

Feature V2. The predetermined storage means
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
With
The gaming machine according to feature V1, wherein the save execution means saves the information of the flag register in the first predetermined storage area.

According to the feature V2, since the predetermined storage means is provided with the first predetermined storage area and the second predetermined storage area, the information storage destination in the predetermined storage means can be stored in the first predetermined process and the second predetermined process. It is possible to make a clear difference. This makes it possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process. In this case, when the situation in which the first predetermined process is executed changes to the situation in which the second predetermined process is executed or the situation in which the second predetermined process is executed, the information in the flag register is stored in the first predetermined storage area. Is evacuated to. As a result, it is possible to save the information of the flag register immediately before the start of the second predetermined processing, and it is possible to save the information without using the second predetermined storage area.

Feature V3. Although the first predetermined storage area can store information and read information when the first predetermined process is executed, and can read information when the second predetermined process is executed. Information cannot be memorized,
Although the second predetermined storage area can store information and read information when the second predetermined process is executed, and can read information when the first predetermined process is executed. The gaming machine according to feature V2, which is characterized in that information cannot be stored.

According to the feature V3, the first predetermined storage area can be treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area can be treated as a dedicated storage area for the second predetermined processing. It becomes.

Feature V4. The predetermined storage means
A stack area (stack area 222 for specific control) in which information can be written by a push instruction and information can be read by a pop instruction, and
A work area (work area 221 for specific control) in which information can be written and read by a load instruction, and
With
The gaming machine according to any one of features V1 to V3, wherein the save execution means saves the information of the flag register in one of the stack area and the work area.

According to the feature V4, when the situation where the first predetermined process is executed changes to the situation where the second predetermined process is executed or the situation where the second predetermined process is executed, the stack area in the second predetermined storage area And the information of the flag register is saved in one of the work areas. As a result, it is possible to aggregate the evacuation destinations of information, and it is possible to simplify the processing configuration for saving and the processing configuration for returning.

Feature V5. The gaming machine according to feature V4, wherein the save execution means saves the information of the flag register in the work area.

According to the feature V5, since the save destination of the flag register information is the work area, it is possible to save the information without cumulatively changing the stack pointer.

Feature V6. The evacuation execution means is
A means for storing the information of the flag register in a predetermined register provided in the internal storage means (a function of executing the processes of steps S6402 and S6403 in the main CPU 63 in the 28th embodiment, and main in the 29th embodiment). The function of executing the process of step S6502 to step S6505 in the side CPU 63) and
Means for storing the information of the flag register stored in the predetermined register in the predetermined storage means (a function of executing the process of step S6404 in the main CPU 63 in the 28th embodiment, and a main CPU 63 in the 29th embodiment). (Function to execute the process of step S6506) in
The gaming machine according to any one of features V1 to V5.

According to the feature V6, even if the information of the flag register cannot be directly saved in the predetermined storage means as an instruction of the control means, the information is written to the predetermined register and the information stored in the predetermined register is predetermined. It is possible to save the information of the flag register to a predetermined storage means by using the writing to the storage means.

It should be noted that, with respect to the configuration of the features V1 to V6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic W group>
Features W1. A control means (main CPU 63) for executing various processes is provided.
The control means
Among the various processes, the first predetermined process execution means for executing the first predetermined process (a function of executing a process other than the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A second predetermined processing execution means for executing the second predetermined processing among the various processes (a function of executing the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
Abnormal event monitoring means (program monitoring unit 252) that monitors whether or not an abnormal event has occurred, and
Based on the fact that the abnormal event has been identified by the abnormal event monitoring means, it is possible to create a situation in which the information erasing process is executed for at least the first predetermined storage area. Erasing status generating means (reset signal output unit 251) and
A gaming machine characterized by being equipped with.

According to the feature W1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. As a result, the storage destination of the information in the predetermined storage means can be clearly different between the first predetermined process and the second predetermined process. Therefore, it is possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process. Further, based on the fact that the abnormal event has been identified, the information erasing process is executed for at least the first predetermined storage area. As a result, it is possible to prevent the first predetermined process from being executed while the information of the first predetermined storage area is held as it is even though the abnormal event has occurred.

Feature W2. The control means
A means for executing a process for storing power failure response information when the supply of operating power to the control means is stopped (in the thirtieth embodiment, a function for executing the processes of steps S6709 and S6710 in the main CPU 63). , The function of executing the processes of steps S7609 to S7611 in the main CPU 63 in the 32nd embodiment).
When the supply of operating power to the control means is started and the process at the start of supply is executed in a situation where the power failure response information is not stored, the information erasing process is performed on at least the first predetermined storage area. (In the thirtieth embodiment, the function of executing the process of step S6607 in the main CPU 63, in the thirty-first embodiment, the function of executing the clear process in the case of an abnormality in the main CPU 63, the 32nd In the embodiment of the above, the functions of executing the processes of step S7704, step S7705, step S7808 and step S7810 in the main CPU 63).
With
Based on the fact that the abnormal event has been identified by the abnormal event monitoring means, the erasing status generating means starts the supply by the control means in a situation where the power failure response information is not stored. The gaming machine according to feature W1, wherein the processing of time is executed.

According to the feature W2, when the supply of the operating power to the control means is started and the process at the start of the supply is executed in the situation where the power failure response information is not stored, the information erasing process is at least the first predetermined. By executing the information for the storage area, the information of the first predetermined storage area is retained as it is when the supply of the operating power to the control means is started in a situation where the processing at the time of a power failure is not properly performed. It is possible to prevent the first predetermined process from being executed in the state. In this case, based on the fact that an abnormal event has been identified, the control means executes the process at the start of supply in a situation where the power failure response information is not stored. As a result, information can be sent in response to the occurrence of an abnormal event by using a configuration that executes information erasure processing when the processing at the start of supply is executed by the control means in a situation where power failure response information is not stored. It is possible to execute the erasing process.

Feature W3. The control means executes various processes when the reset signal is received, and receives the reset signal from the situation where the reset signal is not received in the situation where the operating power is supplied. The process at the start of supply is started based on the situation.
Based on the fact that the abnormal event has been identified by the abnormal event monitoring means, the erasing status generating means sets the situation in which the control means does not receive the reset signal, and then causes the control means. The gaming machine according to feature W2, wherein the reset signal is received.

According to the feature W3, it is possible to obtain the above-mentioned excellent effect by switching the reception state of the reset signal.

Features W4. The control means has a configuration in which information is temporarily stored in the internal storage means (registers and program counters of the main CPU 63) when the processing is executed, and the information stored in the internal storage means is stored in the first predetermined storage. It is a configuration that can be temporarily saved in the area,
The abnormal event monitoring means monitors whether or not an abnormality has occurred in the information stored in the internal storage means as the abnormal event.
One of the features W1 to W3, wherein the erasing situation generating means causes a situation in which the erasing process of the information is executed for at least both the first predetermined storage area and the internal storage means. The gaming machine described in.

According to the feature W4, the information stored in the internal storage means can be temporarily saved in the first predetermined storage area. Therefore, when an abnormality occurs in the information stored in the internal storage means, the first 1 There is a possibility that an abnormality has occurred in the information stored in the predetermined storage area. In this case, when an abnormality occurs in the information stored in the internal storage means, the information erasing process is executed not only for the internal storage means but also for the first predetermined storage area. As a result, it is possible to prevent the first predetermined process from being executed as it is even though an abnormality has occurred in the information stored in the first predetermined storage area.

Feature W5. The erasing status generating means prevents the erasing process of the information from being executed for the second predetermined storage area even if the abnormal event monitoring means identifies that the abnormal event has occurred. The gaming machine according to any one of features W1 to W4.

According to the feature W5, even if an abnormal event occurs, the information can be stored and retained in the second predetermined storage area.

Feature W6. Based on the fact that the abnormal event monitoring means has identified that the abnormal event has occurred, the erasing status generating means performs the information erasing process on the first predetermined storage area and the second predetermined storage area. The gaming machine according to any one of features W1 to W4, characterized in that it causes a situation to be executed for both of the above.

According to the feature W6, the information erasing process is executed for both the first predetermined storage area and the second predetermined storage area based on the fact that the abnormal event has been identified. As a result, it is possible to prevent the first predetermined process from being executed while the information of the first predetermined storage area is held as it is even though the abnormal event has occurred, and the abnormal event has occurred. Despite this, it is possible to prevent the second predetermined process from being executed while the information in the second predetermined storage area is retained as it is.

Feature W7. The feature is that the information erasing process for the first predetermined storage area is executed in the first predetermined process, and the information erasing process for the second predetermined storage area is executed in the second predetermined process. Features The gaming machine described in W6.

According to the feature W7, regarding the information erasing process, the first predetermined storage area is treated as a dedicated storage area for the first predetermined process, and the second predetermined storage area is treated as a dedicated storage area for the second predetermined process. It is possible to be able to do it.

Feature W8. The first predetermined process includes a process for controlling the progress of the game.
The gaming machine according to any one of features W1 to W7, wherein the second predetermined processing includes a processing for managing a gaming history.

According to the feature W8, the progress of the game is controlled by executing the process for controlling the progress of the game as the first predetermined process and executing the process for managing the game history as the second predetermined process. It is possible to prevent the information used in the process for managing the game history from being rewritten when the process for the purpose is executed.

Features W9. The second predetermined storage area is a history storage area (normal counter area 231 and counter area 232 for open / close execution mode) in which history information of the game corresponding to a predetermined event occurs due to the execution of the game. , The gaming machine according to feature W8, characterized in that it is provided with a counter area 233) for a high frequency support mode.

According to the feature W9, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Features W10. The second predetermined processing execution means is an information derivation means (step S4208 in the main CPU 63) for deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to the feature W9, which is characterized by having a function of executing the processing of the above.

According to the feature W10, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. It becomes possible to grasp the result.

Features W11. The gaming machine according to feature W10, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature W11, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

It should be noted that, with respect to the configuration of the features W1 to W11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Feature X group>
Feature X1. A control means (main CPU 63) for executing various processes is provided.
The control means
Among the various processes, the first predetermined process execution means for executing the first predetermined process (a function of executing a process other than the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A second predetermined processing execution means for executing the second predetermined processing among the various processes (a function of executing the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
With
The second predetermined processing execution means is an erasing execution means that causes information erasing processing to be executed for the second predetermined storage area as the second predetermined processing based on the occurrence of the erasing trigger (the erasing execution means). In the 25th embodiment, the function of executing the processes of steps S6103 and S6107 in the main CPU 63, in the thirtieth embodiment, the function of executing the process of step S7204 in the main CPU 63, and in the thirty-first embodiment, the main CPU 63. A gaming machine comprising a function of executing the process of step S7508 in the above, and a function of executing the processes of step S7808 and step S7810 in the main CPU 63 in the 32nd embodiment).

According to the feature X1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. As a result, the storage destination of the information in the predetermined storage means can be clearly different between the first predetermined process and the second predetermined process. Therefore, it is possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process.

Further, when an erasure trigger occurs, the information erasure process is executed for the second predetermined storage area, so that the second predetermined storage area is in spite of some abnormality occurring in the second predetermined storage area. It is possible to prevent the second predetermined process from being executed while the information of is held as it is. Further, since the erasing process of the information is executed by the second predetermined process, it is possible to prevent the first predetermined process from intervening in updating the information in the second predetermined storage area.

Feature X2. The erasing execution means executes the erasing process of the information for the second predetermined storage area while preventing the non-erasing target information (management monitoring flag, return address information, information of various registers) from being erased. The gaming machine according to the feature X1.

According to the feature X2, the information erasing process for the second predetermined storage area is performed while preventing the non-erasable target information of the second predetermined storage area from being erased. As a result, it is possible to execute the information erasing process for the second predetermined storage area while preventing even the necessary information from being erased.

Feature X3. The second predetermined processing executing means is said to be said when the situation in which the first predetermined processing is being executed changes to the situation in which the second predetermined processing is executed or when the situation in which the second predetermined processing is executed is changed. A storage execution means (in the thirtieth embodiment) for storing the return correspondence information (return address information, information of various registers) required when returning to the situation where the first predetermined process is executed in the second predetermined storage area. A function of executing the processes of steps S7102 to S7107 in the main CPU 63, a function of executing the processes of steps S7502 to S7507 in the main CPU 63 in the 31st embodiment, and step S7802 in the main CPU 63 in the 32nd embodiment. -A function to execute the process of step S7807) is provided.
The game according to feature X2, wherein the erasing execution means executes an erasing process of the information on the second predetermined storage area while preventing the return correspondence information from being erased as the non-erasing target information. Machine.

According to the feature X3, the second predetermined processing is prevented from erasing even the return correspondence information required when returning from the situation in which the second predetermined processing is executed to the situation in which the first predetermined processing is executed. It is possible to execute the information erasing process for the storage area.

Feature X4. The storage execution means is characterized in that, as the return correspondence information, the information of the return address of the program in the case of ending the second predetermined process and returning to the first predetermined process is stored in the second predetermined storage area. The gaming machine according to the feature X3.

According to the feature X4, since the information erasing process is executed for the second predetermined storage area while preventing the information of the return address of the program when returning to the first predetermined process is erased, the second predetermined storage area is executed. Even if the information erasing process is executed for, when the second predetermined process is completed, it is possible to return to the predetermined program in the first predetermined process.

Feature X5. The control means has a configuration in which information is temporarily stored in an internal storage means (register of the main CPU 63) when processing is executed.
The gaming machine according to feature X3 or X4, wherein the storage executing means stores information stored in the internal storage means in the second predetermined storage area as the return correspondence information.

According to the feature X5, since the information erasing process is executed for the second predetermined storage area while preventing the information of the internal storage means used in the first predetermined process from being erased, the information is deleted in the second predetermined storage area. On the other hand, even if the information erasing process is executed, when the second predetermined process is completed, the information used in the first predetermined process can be returned to the internal storage means.

Feature X6. The erasing execution means causes the erasing process of the information to be executed for the second predetermined storage area as the occurrence of the erasing trigger based on the occurrence of an abnormality in the second predetermined storage area. The gaming machine according to any one of features X1 to X5.

According to the feature X6, since the information erasing process is executed for the second predetermined storage area based on the occurrence of the abnormality in the second predetermined storage area, the abnormality occurs in the second predetermined storage area. It is possible to prevent the second predetermined process from being executed while the state is still present.

Feature X7. As the second predetermined process, the second predetermined process executing means is a means for monitoring whether or not the second predetermined storage area is normal (in the thirtieth embodiment, steps S7201 to S7203 in the main CPU 63). The gaming machine according to feature X6, which is characterized by having a function of executing processing).

According to the feature X7, not only the information erasing process for the second predetermined storage area but also the monitoring of whether or not the second predetermined storage area is normal can be performed by the second predetermined process without intervening the first predetermined process. Since it is executed, it is possible to monitor whether or not the second predetermined storage area is normal and execute the information erasing process for the second predetermined storage area as a series of processes in the second predetermined storage area. ..

Feature X8. The first predetermined process includes a process for controlling the progress of the game.
The gaming machine according to any one of features X1 to X7, wherein the second predetermined processing includes a processing for managing a gaming history.

According to the feature X8, the progress of the game is controlled by executing the process for controlling the progress of the game as the first predetermined process and executing the process for managing the game history as the second predetermined process. It is possible to prevent the information used in the process for managing the game history from being rewritten when the process for the purpose is executed.

Feature X9. The second predetermined storage area is a history storage area (normal counter area 231 and counter area 232 for open / close execution mode) in which history information of the game corresponding to a predetermined event occurs due to the execution of the game. , The gaming machine according to feature X8, which comprises a counter area 233) for a high frequency support mode.

According to the feature X9, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature X10. The second predetermined processing execution means is an information derivation means (step S4208 in the main CPU 63) for deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to the feature X9, which is characterized by having a function of executing the processing of the above.

According to the feature X10, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. It becomes possible to grasp the result.

Feature X11. The gaming machine according to feature X10, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature X11, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

It should be noted that, with respect to the configuration of the features X1 to X11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic Y group>
Features Y1. A control means (main CPU 63) for executing various processes is provided.
The control means
Among the various processes, the first predetermined process execution means for executing the first predetermined process (a function of executing a process other than the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A second predetermined processing execution means for executing the second predetermined processing among the various processes (a function of executing the management execution process on the main CPU 63 in the fifteenth to 34th embodiments) and
A first predetermined storage area (work area 221 for specific control, stack area 222 for specific control) in which information is stored when the first predetermined process is executed, and
A second predetermined storage area (work area 223 for non-specific control, stack area 224 for non-specific control) in which information is stored when the second predetermined process is executed, and
The first calculation means for calculating the first reference numerical information corresponding to the plurality of information stored in the first predetermined storage area (in the thirtieth embodiment, the processes of step S6604 and step S6710 in the main CPU 63 are executed. A function, a function of executing the process of step S7304 in the main CPU 63 in the 31st embodiment, and a function of executing the processes of steps S7610 and S7701 in the main CPU 63 in the 32nd embodiment).
A gaming machine characterized by being equipped with.

According to the feature Y1, a first predetermined storage area and a second predetermined storage area are provided, the first predetermined storage area is treated as a dedicated storage area for the first predetermined processing, and the second predetermined storage area is It is treated as a dedicated storage area for the second predetermined process. As a result, the storage destination of the information in the predetermined storage means can be clearly different between the first predetermined process and the second predetermined process. Therefore, it is possible to prevent the information used in the other process from being erased when executing one of the first predetermined process and the second predetermined process. In this case, the first reference numerical information corresponding to the plurality of information stored in the first predetermined storage area is calculated. By using the first reference numerical information, it is possible to specify whether or not an information abnormality has occurred only in the first predetermined storage area.

Feature Y2. Information erasing means for causing information erasing processing to be executed for the first predetermined storage area based on identifying the occurrence of an abnormality with respect to the first reference numerical information calculated by the first calculating means. (In the thirtieth embodiment, the function of executing the process of step S6607 in the main CPU 63, in the thirty-first embodiment, the function of executing the processes of steps S7401 and S7402 in the main CPU 63, and in the 32nd embodiment, the main side. The gaming machine according to feature Y1, wherein the CPU 63 includes a function of executing the processes of steps S7704 and S7705).

According to the feature Y2, when the occurrence of an abnormality is identified with respect to the first reference numerical information, the information erasing process is executed for the first predetermined storage area, so that the information abnormality has occurred. It is possible to prevent the first predetermined process from being executed while the information of the first predetermined storage area is held as it is.

Feature Y3. The first calculation means is
A first power failure calculation means (in the thirtieth embodiment, a function of executing the process of step S6710 in the main CPU 63) for calculating the first reference numerical information when the supply of operating power to the control means is stopped. In the 32nd embodiment, the function of executing the process of step S7610 in the main CPU 63) and
A function of executing the process of step S6604 in the main CPU 63 in the first power-in calculation means (in the thirtieth embodiment, the function of calculating the first reference numerical information when the supply of the operating power to the control means is started. In the 31st embodiment, the function of executing the process of step S7304 in the main CPU 63, and in the 32nd embodiment, the function of executing the process of step S7701 in the main CPU 63).
With
The information erasing means is based on the fact that the first reference numerical information calculated by the first power failure calculation means and the first reference numerical information calculated by the first incoming calculation means do not match. The gaming machine according to feature Y2, wherein the information erasing process is executed for at least the first predetermined storage area.

According to the feature Y3, it is possible to specify by calculating the first reference numerical information whether or not the information of the first predetermined storage area is stored and held with the situation where the supply of the operating power is stopped. It becomes. Then, when the information in the first predetermined storage area is not stored and retained across the situation where the supply of the operating power is stopped, the information erasing process is executed for the first predetermined storage area, so that the information is abnormal. It is possible to prevent the first predetermined process from being executed in a state where the information of the first predetermined storage area is held as it is in spite of the occurrence of.

Feature Y4. Even if the information erasing means identifies the occurrence of an abnormality with respect to the first reference numerical information calculated by the first calculating means, the information erasing means does not execute the information erasing process for the second predetermined storage area. The gaming machine according to the feature Y2 or Y3.

According to the feature Y4, when the occurrence of an abnormality is identified with respect to the first reference numerical information, the information erasing process is executed for the first predetermined storage area, while the information is erased for the second predetermined storage area. No processing is executed. This makes it possible to prevent even the information in the second predetermined storage area from being erased in a situation where an information abnormality has occurred in the first predetermined storage area.

Feature Y5. The gaming machine according to any one of features Y1 to Y4, wherein the first reference numerical information is information that does not fluctuate according to the information stored in the second predetermined storage area.

According to the feature Y5, in the configuration in which the first predetermined storage area and the second predetermined storage area exist, it is possible to individually identify the information abnormality regarding the first predetermined storage area by using the first reference numerical information. It will be possible.

Feature Y6. It is provided with a second calculation means (a function of executing the processes of steps S7611 and S7706 in the main CPU 63) for calculating the second reference numerical information corresponding to the plurality of information stored in the second predetermined storage area. The gaming machine according to any one of features Y1 to Y5.

According to the feature Y6, the second reference numerical information corresponding to the plurality of information stored in the second predetermined storage area is calculated. By using the second reference numerical information, it is possible to specify whether or not an information abnormality has occurred only in the second predetermined storage area.

Feature Y7. A means for ensuring that the information erasing process is executed for at least the second predetermined storage area based on the identification of the occurrence of an abnormality with respect to the second reference numerical information calculated by the second calculation means ( The gaming machine according to feature Y6, which comprises a function of executing the processes of steps S7808 and S7810 in the main CPU 63).

According to the feature Y7, when the occurrence of an abnormality is identified with respect to the second reference numerical information, the information erasing process is executed for the second predetermined storage area, so that the information abnormality has occurred. It is possible to prevent the second predetermined process from being executed while the information in the second predetermined storage area is held as it is.

Feature Y8. The first predetermined process includes a process for controlling the progress of the game.
The gaming machine according to any one of features Y1 to Y7, wherein the second predetermined processing includes a processing for managing a gaming history.

According to the feature Y8, the progress of the game is controlled by executing the process for controlling the progress of the game as the first predetermined process and executing the process for managing the game history as the second predetermined process. It is possible to prevent the information used in the process for managing the game history from being rewritten when the process for the purpose is executed.

Feature Y9. The second predetermined storage area is a history storage area (normal counter area 231 and counter area 232 for open / close execution mode) in which history information of the game corresponding to a predetermined event occurs due to the execution of the game. , The gaming machine according to feature Y8, which comprises a counter area 233) for a high frequency support mode.

According to the feature Y9, when a predetermined event occurs, the corresponding history information is stored in the history storage area. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. Further, since the history information is stored in the gaming machine itself, it is possible to prevent unauthorized access to the history information and unauthorized modification. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the history storage area from being rewritten at the time of execution.

Feature Y10. The second predetermined processing execution means is an information derivation means (step S4208 in the main CPU 63) for deriving mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. The gaming machine according to the feature Y9, which is characterized by having a function of executing the processing of the above.

According to the feature Y10, the game history such as the occurrence frequency of a predetermined event is managed by deriving the mode information corresponding to the result of the game in a predetermined period by using the history information stored in the history storage area. It becomes possible to grasp the result.

Feature Y11. The gaming machine according to feature Y10, wherein the second predetermined storage area includes an aspect information storage area (calculation result storage area 234) for storing the aspect information derived by the information derivation means.

According to the feature Y11, when the mode information corresponding to the result of the game in a predetermined period is derived by using the history information, the mode information is stored in the mode information storage area. This makes it possible to grasp the management result of the game history at an arbitrary timing. Further, as the first predetermined process, a process for controlling the progress of the game is executed, and as a second predetermined process, a process for managing the game history is executed, so that the process for controlling the progress of the game is executed. It is possible to prevent the information stored in the mode information storage area from being rewritten at the time of execution.

It should be noted that, with respect to the configuration of the features Y1 to Y11, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the inventions relating to the feature T group, the feature U group, the feature V group, the feature W group, the feature X group, and the feature Y group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to appropriately perform various controls, and there is still room for improvement in this respect.

<Characteristic Z group>
Feature Z1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
Situation generating means for making it possible to set the set value to be used by the setting means (function for executing the processes of step S7905, step S7916 and step S7917 in the main CPU 63) When,
In a situation where the supply of operating power to the control means (main side CPU 63) having the setting means is started and the processing at the start of supply is being executed, the set value of the target to be used in a situation other than the settable situation. A setting notification means (a function for executing a setting confirmation process in the main CPU 63) for performing notification, and
A gaming machine characterized by being equipped with.

According to the feature Z1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the advantage of the player, the player can use the more advantageous setting value. You will expect it to be. In this case, in order to confirm the set value set as the target of use, it is necessary to temporarily stop the supply of the operating power to the control means and then restart the supply of the operating power to the control means. .. This makes it difficult to perform an act of illegally confirming the set value. Further, since the set value is notified in the situation where the processing at the start of supply is being executed, it is not necessary to notify the set value in the situation where the game is interrupted. Therefore, it is possible to preferably notify the set value.

Feature Z2. The gaming machine according to feature Z1, wherein the situation generating means is set to the settable state in a situation where the process at the start of supply is being executed.

According to the feature Z2, the settable state in which the set value to be used can be set and the set value to be used in the non-settable state are notified at the time of starting supply. It is possible to consolidate the processing into the situation where it is being executed.

Feature Z3. It is provided with a first specific means (a function of executing the processes of steps S7912 and S7916 in the main CPU 63) for identifying the occurrence of the first trigger event.
The setting notification means can be set based on the situation in which the process at the start of supply is being executed and the occurrence of the first trigger event is specified by the first specific means. The gaming machine according to feature Z1 or Z2, wherein the set value of the target to be used is notified in a situation other than the situation.

According to the feature Z3, in order to notify the set value of the object to be used, it is necessary not only to start the supply of the operating power to the control means but also to generate the first trigger event. This makes it difficult to perform an act of illegally confirming the set value.

Feature Z4. The gaming machine according to feature Z3, wherein the first trigger event is that a predetermined operation of the setting key insertion unit (setting key insertion unit 68a) is performed by the setting key.

According to the feature Z4, in order to notify the setting of the object to be used, it is necessary to perform a predetermined operation with the setting key for the setting key insertion unit. This makes it difficult to perform an act of illegally confirming the set value.

Feature Z5. The setting notification means satisfies the notification condition based on the situation in which the process at the start of supply is being executed and the occurrence of the first trigger event is specified by the first specific means. In that case, the setting value of the target to be used is notified in a situation other than the settable situation.
The setting condition is satisfied based on the situation in which the process at the start of supply is being executed and the occurrence of the first trigger event is specified by the first specific means. In that case, the above-mentioned settable status is set.
The gaming machine according to feature Z3 or Z4, wherein the notification condition and the setting condition are different from each other.

According to the feature Z5, regardless of whether the settable state is generated or the set value of the target to be used is notified, not only the supply of the operating power to the control means is started but also the first trigger event is caused. Need to generate. As a result, it is possible to make it difficult to perform both an act of fraudulently setting a set value to be used and an act of fraudulently attempting to confirm the set value of the target of use. On the other hand, since the setting condition for generating the settable status and the notification condition for notifying the set value of the usage target are different, the setting condition and the setting value of the usage target are notified. It is possible to generate either one of them independently.

Feature Z6. It is provided with a second specifying means (a function of executing the process of step S7905 in the main CPU 63) for identifying the occurrence of the second trigger event.
The setting condition is a situation in which the occurrence of the first trigger event is specified by the first specific means in a situation where the process at the start of supply is being executed, and the second specific means is used to specify the occurrence of the first trigger event. It is established based on the situation where the occurrence of the trigger event is specified,
The notification condition is a situation in which the occurrence of the first trigger event is specified by the first specific means in a situation where the process at the start of supply is being executed, and the second specific means is used to specify the occurrence of the first trigger event. The gaming machine according to feature Z5, wherein the occurrence of a trigger event is established based on a situation in which the occurrence is not specified.

According to the feature Z6, in order to generate the settable state, it is necessary to start the supply of the operating power to the control means and generate not only the first trigger event but also the second trigger event. As a result, not only the supply of the operating power to the control means is started but also the supply of the operating power to the control means is started regardless of whether the set value to be used is set or the set value to be used is notified. In the configuration in which it is necessary to generate the first trigger event, it is possible to make the operation for generating the settable situation more complicated. Therefore, it is possible to prevent the act of illegally setting the setting value to be used more intensively.

Feature Z7. The gaming machine according to feature Z6, wherein the second trigger event is that a predetermined operating means (reset button 68c) is being operated.

According to the feature Z7, in order to generate the settable state, it is necessary not only to start the supply of the operating power to the control means and to generate the first trigger event but also to operate the predetermined operating means. This makes it difficult to perform an act of illegally setting a setting value to be used, but prevents the operation for properly generating a settable situation from becoming excessively complicated. It becomes possible.

Feature Z8. An information erasing means for executing an information erasing process based on a situation in which the occurrence of the second trigger event is specified by the second specifying means in a situation where the processing at the start of supply is being executed (the information erasing means for executing the information erasing process. The gaming machine according to feature Z6 or Z7, which comprises a function of executing the process of step S7915 in the main CPU 63).

According to the feature Z8, the condition for generating the settable status by using the second trigger event required to execute the information erasing process and the set value of the target to be used in the non-settable situation are set. It is possible to make a difference from the conditions for causing the notification to be performed.

Feature Z9. The gaming machine according to feature Z8, wherein the information erasing means executes the information erasing process even when the settable situation occurs.

According to the feature Z9, it is possible to execute the information erasing process when the settable state is reached.

Feature Z10. In a situation where the processing at the start of supply is being executed, the occurrence of the second trigger event is specified by the second specific means, and the occurrence of the first trigger event is specified by the first specific means. The gaming machine according to feature Z8 or Z9, wherein the information erasing process is executed by the information erasing means, although the situation is not settable.

According to the feature Z10, the information erasing process is executed and the information can be set depending on whether or not the first trigger event is generated when the supply of the operating power to the control means is started. It is possible to select the case where the erasing process is executed but the setting is not possible.

It should be noted that, with respect to the configuration of the features Z1 to Z10, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Feature a group>
Features a1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
Situation generating means for making it possible to set the set value to be used by the setting means (function for executing the processes of step S7905, step S7916 and step S7917 in the main CPU 63) When,
Information erasing means (a function of executing the process of step S7915 in the main CPU 63) for executing the information erasing process, and
A setting notification means (a function for executing a setting confirmation process in the main CPU 63) for notifying the set value of the target to be used in a situation other than the settable situation, and
A first specific means for identifying the occurrence of the first trigger event (a function of executing the processes of steps S7912 and S7916 in the main CPU 63) and
A second specific means for identifying the occurrence of the second trigger event (a function of executing the process of step S7905 in the main CPU 63) and
With
In the situation generating means, the occurrence of the first trigger event is specified by the first specific means in a situation where the supply of the operating power to the control means having the setting means is started and the processing at the start of the supply is executed. Based on the situation in which the occurrence of the second trigger event is specified by the second specific means, the situation can be set.
The information erasing means is based on the situation where the occurrence of the second trigger event is specified by the second specifying means in the situation where the processing at the start of supply is being executed. And
In a situation where the process at the start of supply is being executed, the occurrence of the second trigger event is specified by the second specific means, and the occurrence of the first trigger event is specified by the first specific means. If the situation is not set, the information erasing process is executed by the information erasing means, although the configurable situation is not established.
The setting notification means is a situation in which the occurrence of the first trigger event is specified by the first specific means in a situation where the process at the start of supply is being executed, and the second specific means is used to specify the occurrence of the first trigger event. A gaming machine characterized in that the set value of the target to be used is notified in a situation other than the settable situation based on the situation in which the occurrence of the trigger event is not specified.

According to the feature a1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. Further, since the information erasing process can be executed, it is possible to prevent the game from being played even though the information abnormality has occurred. In addition, since the set value set as the target of use can be notified, the set value can be confirmed.

In this case, in order to confirm the set value set as the object to be used, it is necessary to start the supply of the operating power to the control means and generate the first trigger event. This makes it difficult to perform an act of illegally confirming the set value.

Further, in order to generate the settable state, it is necessary to start the supply of the operating power to the control means and generate not only the first trigger event but also the second trigger event. As a result, not only the supply of the operating power to the control means is started but also the supply of the operating power to the control means is started regardless of whether the set value to be used is set or the set value to be used is notified. In the configuration in which it is necessary to generate the first trigger event, it is possible to make the operation for generating the settable situation more complicated. Therefore, it is possible to prevent the act of illegally setting the setting value to be used more intensively.

In addition, the conditions for generating the settable status and the set value of the usage target in the non-settable status are notified by using the second trigger event required to execute the information erasing process. It is possible to make a difference from the conditions for doing so.

Further, depending on whether or not the first trigger event is generated when the supply of the operating power to the control means is started, the information erasing process is executed and the setting becomes possible, and the information erasing process is performed. It is possible to select the case where the setting is not possible for what is executed.

Feature a2. The gaming machine according to feature a1, wherein the first trigger event is that a predetermined operation of the setting key insertion unit (setting key insertion unit 68a) is performed by the setting key.

According to the feature a2, in order to notify the setting of the object to be used, it is necessary to perform a predetermined operation with the setting key for the setting key insertion unit. This makes it difficult to perform an act of illegally confirming the set value.

Feature a3. The gaming machine according to feature a1 or a2, wherein the second trigger event is that a predetermined operating means (reset button 68c) is being operated.

According to the feature a3, in order to generate the settable state, it is necessary not only to start the supply of the operating power to the control means and to generate the first trigger event but also to operate the predetermined operating means. This makes it difficult to perform an act of illegally setting a setting value to be used, but prevents the operation for properly generating a settable situation from becoming excessively complicated. It becomes possible.

It should be noted that, with respect to the configuration of the features a1 to a3, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the inventions related to the feature Z group and the feature a group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, there is a demand for a configuration capable of preferably confirming a set value that determines the advantage of the gaming machine, and there is still room for improvement in this respect. ..

<Characteristic b group>
Feature b1. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
Situation generating means for making it possible to set the set value to be used by the setting means (function for executing the processes of step S7905, step S7916 and step S7917 in the main CPU 63) When,
A setting monitoring means (a function of executing the process of step S8220 in the main CPU 63) for executing a setting monitoring process for monitoring whether or not the set value of the target to be used is abnormal, and
With
A gaming machine characterized in that the setting monitoring process is not included in the process at the start of supply executed when the supply of operating power to the control means having the setting means is started.

According to the feature b1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the advantage of the player, the player can use the more advantageous setting value. You will expect it to be. Further, since the setting monitoring process for monitoring whether or not the set value of the use target is abnormal is executed, it is possible to deal with the case where the set value of the use target is abnormal. Further, since the processing at the start of supply does not include the setting monitoring process, it is possible to achieve the above-mentioned excellent effect while preventing the processing load of the process at the start of supply from increasing.

Feature b2. The gaming machine according to feature b1, wherein the situation generating means generates the settable situation in a situation where the process at the start of supply is being executed.

According to the feature b2, since the settable situation occurs in the situation where the process at the start of supply is executed, it is possible to set the set value of the target to be used before the game is started. .. In this case, since the set value to be used is set in the process at the start of supply, the processing load of the process at the start of supply increases accordingly. On the other hand, since the configuration of the above feature b1 is provided and the processing at the start of supply does not include the setting monitoring process, the processing load of the process at the start of supply is not further increased, and the object to be used is used. It is possible to monitor whether or not the set value is abnormal.

Feature b3. The gaming machine according to feature b1 or b2, wherein the setting monitoring means executes the setting monitoring process after the process at the start of supply is completed.

According to feature b3, since the setting monitoring process is executed after the process at the start of supply is completed, the set value to be used is abnormal while preventing the processing load of the process at the start of supply from increasing. It becomes possible to monitor whether or not.

Feature b4. The gaming machine according to feature b3, wherein the setting monitoring means executes the setting monitoring process each time a monitoring opportunity occurs after the process at the start of supply is completed.

According to the feature b4, since the setting monitoring process is executed every time a monitoring trigger occurs after the process at the start of supply is completed, it becomes easy to identify that the set value to be used is abnormal.

Feature b5. It is equipped with a means for executing interrupt processing that is started periodically (a function for executing the first timer interrupt processing in the main CPU 63).
The gaming machine according to any one of features b1 to b4, wherein the interrupt processing includes the setting monitoring processing.

According to the feature b5, since the setting monitoring process is executed every time the setting value is started periodically, it is possible to increase the execution frequency of monitoring whether or not the setting value of the target to be used is abnormal.

Feature b6. The setting monitoring means is a means for restricting the progress of the game based on the identification that the set value of the target to be used is abnormal in the setting monitoring process (step S8207 in the main CPU 63 and The gaming machine according to any one of features b1 to b5, which comprises a function of executing the process of step S8302).

According to feature b6, when it is specified that the set value of the target to be used is abnormal, the progress of the game is restricted, so that the game is continued even though the set value of the target to be used is abnormal. It is possible to prevent it.

Feature b7. The setting monitoring means notifies the player that the settable status should be generated based on the fact that the set value of the target to be used is specified to be abnormal in the setting monitoring process. The gaming machine according to any one of features b1 to b6, characterized in that it includes means for causing execution (a function of executing the process of step S8303 in the main CPU 63).

According to the feature b7, when it is specified that the set value of the target to be used is abnormal, the notification for making the player recognizable that the settable status should be generated is executed, so that the target to be used is set. If the value becomes abnormal, it is possible to urge the manager of the game hall to resolve it.

It should be noted that, with respect to the configuration of the features b1 to b7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention according to the feature b group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to preferably manage the set value that determines the advantage of the gaming machine, and there is still room for improvement in this respect.

<Characteristic c group>
Feature c1. Predetermined display means (first to fourth notification display devices 201 to 204) and
A predetermined display control means (a function of executing a second timer interrupt process in the main CPU 63) that controls the display of the predetermined display means, and
With
The predetermined display control means causes the predetermined display means to perform a check display that enables confirmation of whether or not the predetermined display means is normal based on the occurrence of the check trigger (the 35th check control means). The gaming machine is characterized in that it includes a function of executing the process of step S9102 in the main CPU 63, and a function of executing the process of step S9602 in the main CPU 63 in the 38th embodiment).

According to the feature c1, the check display is performed by the predetermined display means based on the occurrence of the check trigger. This makes it possible to confirm whether or not the predetermined display means is normal.

Feature c2. The predetermined display means has a plurality of light emitting units (display segments 321 to 324).
The gaming machine according to feature c1, wherein the check display is a display that enables confirmation that each of the plurality of light emitting units can be in a light emitting state.

According to the feature c2, each of the plurality of light emitting units of the predetermined display means is in a light emitting state as a check display. This makes it possible to confirm whether or not each of the plurality of light emitting units of the predetermined display means is in the light emitting state.

Feature c3. The gaming machine according to feature c1 or c2, wherein the check trigger is generated when the supply of operating power is started.

According to the feature c3, since the check display is performed when the supply of the operating power is started, it is possible to confirm whether or not the predetermined display means is normal at an early stage.

Feature c4. The gaming machine according to any one of features c1 to c3, wherein the check trigger is generated every time the supply of operating power is started.

According to the feature c4, it is possible to confirm whether or not the predetermined display means is normal each time the supply of the operating power is started.

Feature c5. The gaming machine according to any one of features c1 to c4, wherein the check trigger is generated when the supply of operating power is started without requiring an operation for generating the check trigger.

According to the feature c5, when the supply of the operating power is started, the check display is performed without requiring any special operation, so that it is easy to confirm whether or not the predetermined display means is normal. It becomes possible to do.

Feature c6. The check control means causes the predetermined display means to display the check when the supply of the operating power is started and the check trigger is generated, and the supply of the operating power is started. The gaming machine according to any one of features c1 to c5, wherein the check display is not performed by the predetermined display means when the check trigger has not occurred.

According to the feature c6, since the check display is performed when the supply of the operating power is started and the check trigger has occurred, the predetermined display is performed before the game is started on the gaming machine. It becomes possible to confirm whether or not the means is normal. On the other hand, even when the supply of operating power is started, the check display is not performed if the check trigger has not occurred, so the check display is performed in a situation where the check display is not necessary. It is possible to prevent it.

Feature c7. A means for storing information in a use-corresponding storage means (management start flag) based on the fact that the gaming machine has been used in a predetermined mode (a function of executing the process of step S8606 in the main CPU 63) is provided.
The check control means is one in which the check trigger occurs when the supply of operating power is started and the information stored in the usage correspondence storage means does not correspond to the usage correspondence information. When the predetermined display means is made to perform the check display and the supply of the operating power is started and the information stored in the use-corresponding storage means corresponds to the use-correspondence information. The gaming machine according to feature c6, wherein the check display is not performed by the predetermined display means assuming that the check trigger has not occurred.

According to the feature c7, until the gaming machine is used in the predetermined mode, when the supply of the operating power is started, the check display is performed by the predetermined display means, and the gaming machine is used in the predetermined mode. Even if the supply of the operating power is started based on the above, the check display is not performed by the predetermined display means. As a result, for example, at the shipping stage of the gaming machine, when the supply of the operating power is started, the check display is performed by the predetermined display means, so that whether or not the predetermined display means is normal or not. It is possible to confirm, and after the gaming machine is installed in the gaming hall, it is possible to prevent the check display from being performed by the predetermined display means even if the supply of the operating power is started.

Feature c8. The check control means
A display termination means (a function of executing the process of step S9002 in the main CPU 63 and a function of making a negative determination in step S9101) for terminating the check display in the predetermined display means based on the occurrence of the termination trigger.
A function for executing the process of step S9203 in the main CPU 63 and a canceling means for terminating the check display in the predetermined display means based on the cancellation trigger even in a situation where the termination trigger has not occurred. A function of making a negative determination in step S9101, a function of executing the process of step S9308 in the main CPU 63, and a function of making a negative determination in step S9101).
The gaming machine according to any one of features c1 to c7, characterized in that

According to the feature c8, even if the end trigger of the check display does not occur, the check display is terminated based on the cancellation trigger, so that the check display is performed by the predetermined display means. Even so, it is possible to end the check display in the middle and perform another display.

Feature c9. The gaming machine according to feature c8, wherein the cancellation trigger is generated based on the operation of a predetermined operation means (reset button 68c).

According to the feature c9, since the cancellation trigger occurs based on the operation of the predetermined operation means, it is possible to end the check display at an arbitrary timing.

Feature c10. The predetermined display control means provides another display control means (a function of executing the processes of steps S9004 and S9006 in the main CPU 63) to perform another display different from the check display when a different display execution status is reached. Prepare,
The gaming machine according to feature c8 or c9, wherein the cancellation trigger occurs based on the different display execution status.

According to the feature c10, the check display is terminated when a cancellation trigger occurs based on the separate display execution status, so that the separate display can be prioritized over the check display.

Feature c11. Features c1 to c The gaming machine according to any one of c10.

According to the feature c11, since the check display is performed by the predetermined display means in the situation where the progress of the process is waiting, the check display can be performed while suppressing the increase in the processing load.

Feature c12. The check control means is characterized in that when the supply of operating power is started, the check display is started by the predetermined display means before the process for controlling the progress of the game is executed. The gaming machine according to any one of c1 to c11.

According to the feature c12, when the supply of the operating power is started, it is possible to confirm whether or not the predetermined display means is normal before the game is played on the gaming machine.

Feature c13. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
A means for executing a process at the start of supply of operating power based on the start of supply of operating power (in the 35th embodiment, a function of executing the process of steps S8801 to S8819 in the main CPU 63, 36th In the embodiment, the function of executing the processes of steps S9401 to S9420 in the main CPU 63) and
With
In a situation where the process at the start of supplying the operating power is being executed, a predetermined setting-related process (setting confirmation process, set value update process) related to the set value can be executed.
The gaming machine according to feature c12, wherein the check control means starts the check display in the predetermined display means in a situation where the process at the start of supplying the operating power is being executed.

According to the feature c13, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the advantage of the player, the player can use the more advantageous setting value. You will expect it to be. In addition, a predetermined setting-related process related to the set value can be executed in a situation where the process at the start of supplying the operating power is being executed. This makes it possible to execute the setting-related process before the game is started. In this case, the check display is started by the predetermined display means in the situation where the process at the start of supplying the operating power is being executed. As a result, it is possible to consolidate not only the predetermined setting-related processing but also the processing for starting the check display by the predetermined display means with respect to the processing at the start of supplying the operating power.

Feature c14. The check control means is a means for starting the check display in the predetermined display means before the timing at which the predetermined setting-related process can be executed (in the 35th embodiment, steps S8804 and step S8805 in the main CPU 63). The gaming machine according to feature c13, characterized in that the function of executing the process of step S9404 and the function of executing the process of step S9405 in the main CPU 63 in the 36th embodiment) are provided.

According to the feature c14, it is possible to confirm whether or not the predetermined display means is normal before the predetermined setting-related processing is executed.

Feature c15. The predetermined display control means is a means for causing the predetermined display means to display the current set value when the predetermined setting-related process is executed (a function of executing the processes of steps S9004 and S9006 in the main CPU 63). The gaming machine according to the feature c13 or c14, which comprises the above-mentioned feature c13 or c14.

According to the feature c15, since the current set value is displayed in the predetermined display means when the predetermined setting-related process is executed, the manager of the game hall can check the predetermined display means to display the current set value. It becomes possible to grasp. In this case, the configuration of the above feature c13 is provided, and the processing at the start of supplying the operating power includes not only the predetermined setting-related processing but also the processing for starting the check display by the predetermined display means. , The work of confirming the predetermined display means and grasping whether or not the predetermined display means is normal and the work of confirming the predetermined display means and grasping the current set value are the processes at the start of supplying the operating power. Can be done collectively in the situation where is being executed.

Further, when the configuration of the above feature c14 is provided, the predetermined display means starts the check display before the current set value is displayed by the predetermined display means, so that the predetermined display means is normal. After confirming whether or not, it is possible to confirm the current set value by using the predetermined display means. This makes it possible to accurately confirm the set value.

Feature c16. The check control means
A means for starting the check display in the predetermined display means (a function of executing the processes of steps S8804 and S8805 in the main CPU 63) before the timing at which the predetermined setting-related process can be executed is reached.
Means for terminating the check display based on the occurrence of a cancellation trigger in the predetermined setting-related process in the situation where the check display is performed (a function and a step for executing the process of step S9203 in the main CPU 63). A function of making a negative determination in S9101, a function of executing the process of step S9308 in the main CPU 63, and a function of making a negative determination in step S9101).
The gaming machine according to feature c15, characterized in that

According to the feature c16, since the check display is started by the predetermined display means before the current set value is displayed by the predetermined display means, after confirming whether or not the predetermined display means is normal. , It is possible to confirm the current set value by using the predetermined display means. This makes it possible to accurately confirm the set value. In addition, the check display is terminated based on the fact that a predetermined setting-related process is executed in the situation where the check display is performed and a cancellation trigger occurs. As a result, when a predetermined setting-related process is executed, the check display can be ended and the current set value can be displayed by the predetermined display means without waiting for the check display to end. It will be possible. Therefore, it is possible to confirm the current set value at an early stage.

Feature c17. The gaming machine according to feature c16, wherein the cancellation trigger is generated based on the operation of a predetermined operation means (reset button 68c).

According to the feature c17, since the cancellation trigger occurs based on the operation of the predetermined operation means, it is possible to end the check display at an arbitrary timing.

Feature c18. As the predetermined setting-related process, a means for executing a process for making it possible to set the set value to be used by the setting means (mainly in the 35th embodiment). The side CPU 63 is provided with a function of making an affirmative determination in steps S8806, step S8817 and step S8818, and in the 36th embodiment, a function of making an affirmative determination in steps S9407, step S9418 and step S9419 of the main CPU 63). The gaming machine according to any one of features c13 to c17.

According to the feature c18, not only the process for setting the set value to be used but also the process for starting the check display by the predetermined display means is aggregated with respect to the process at the start of supplying the operating power. It becomes possible.

Feature c19. The setting means updates the setting value to be used based on the operation of the predetermined operation means (reset button 68c) in the settable situation.
The check control means
A means for starting the check display in the predetermined display means (a function of executing the processes of step S8804 and step S8805 in the main CPU 63) before the settable state is reached.
Means for terminating the check display based on the operation of the predetermined operation means in the settable situation in the situation where the check display is being performed (the process of step S9203 in the main CPU 63 is executed). A function and a function of making a negative determination in step S9101, a function of executing the process of step S9308 in the main CPU 63, and a function of making a negative determination in step S9101).
With
The predetermined display control means executes the processes of steps S9004 and S9006 in the main CPU 63 to display the current set value on the predetermined display means after the check display is completed in the settable situation. The gaming machine according to feature c18, which is characterized by having a function of performing.

According to the feature c19, since the check display is started by the predetermined display means before the current set value is displayed by the predetermined display means, after confirming whether or not the predetermined display means is normal. , It is possible to confirm the current set value by using the predetermined display means. This makes it possible to accurately confirm the set value. Further, in the situation where the check display is performed, the settable state is established, and the check display is terminated and the current set value is displayed based on the operation of the predetermined operation means. As a result, when the setting is possible, the check display can be terminated and the current set value can be displayed by the predetermined display means without waiting for the check display to be terminated. .. Therefore, it is possible to confirm the current set value at an early stage.

Furthermore, in a configuration in which the set value to be used is updated based on the operation of the predetermined operation means in the settable status, the check display is displayed based on the operation of the predetermined operation means in the settable status. Since it is terminated and the current setting value is displayed, a dedicated operation for ending the check display and displaying the current setting value is not required. Therefore, it is possible to improve the workability of the work for updating the set value to be used.

Feature c20. As the predetermined setting-related process, a means for executing a process for displaying the current set value on the predetermined display means (a function of executing a setting confirmation process on the main CPU 63) is provided. The gaming machine according to any one of features c13 to c19.

According to the feature c20, it is possible to consolidate not only the process for confirming the current set value but also the process for starting the check display by the predetermined display means with respect to the process at the start of supplying the operating power. It will be possible.

Feature c21. The predetermined display control means includes means for causing the predetermined display means to display information corresponding to the management result of the game history (a function of executing the processes of step S8708, step S8709, and step S9107 in the main CPU 63). The gaming machine according to any one of features c1 to c20.

According to the feature c21, it is possible to notify the manager of the game hall of the management result of the game history. In this case, whether or not the information corresponding to the management result of the game history in the predetermined display means is accurately displayed by providing the configuration of the above feature c1 and performing the check display in the predetermined display means. Can be confirmed.

It should be noted that, with respect to the configuration of the features c1 to c21, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Characteristic d group>
Features d1. Predetermined display means (first to fourth notification display devices 201 to 204) and
A predetermined display control means (a function of executing a second timer interrupt process in the main CPU 63) that controls the display of the predetermined display means, and
With
The predetermined display control means is a check that makes it possible to confirm whether or not the predetermined display means is normal before the process for controlling the progress of the game is executed when the supply of the operating power is started. Check control means for causing the predetermined display means to perform the display (a function of executing the process of step S9102 in the main CPU 63 in the 35th embodiment, and executing the process of step S9602 in the main CPU 63 in the 38th embodiment. A gaming machine characterized by having a function to play.

According to the feature d1, it is possible to confirm whether or not the predetermined display means is normal by performing the check display by the predetermined display means. In addition, when the supply of operating power is started, the check display is started before the process for controlling the progress of the game is executed. Therefore, when the supply of operating power is started, the gaming machine is notified. It is possible to confirm whether or not the predetermined display means is normal before the game is played.

Feature d2. A setting means (a function to execute a setting value update process in the main CPU 63) for setting a setting value to be used from a plurality of stages of setting values corresponding to the player's advantage, and
A means for executing a process at the start of supply of operating power based on the start of supply of operating power (in the 35th embodiment, a function of executing the process of steps S8801 to S8819 in the main CPU 63, 36th In the embodiment, the function of executing the processes of steps S9401 to S9420 in the main CPU 63) and
With
In a situation where the process at the start of supplying the operating power is being executed, a predetermined setting-related process (setting confirmation process, set value update process) related to the set value can be executed.
The gaming machine according to feature d1, wherein the check control means starts the check display in the predetermined display means in a situation where the process at the start of supplying the operating power is being executed.

According to the feature d2, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. In addition, a predetermined setting-related process related to the set value can be executed in a situation where the process at the start of supplying the operating power is being executed. This makes it possible to execute the setting-related process before the game is started. In this case, the check display is started by the predetermined display means in the situation where the process at the start of supplying the operating power is being executed. As a result, it is possible to consolidate not only the predetermined setting-related processing but also the processing for starting the check display by the predetermined display means with respect to the processing at the start of supplying the operating power.

Feature d3. The check control means is a means for starting the check display in the predetermined display means before the timing at which the predetermined setting-related process can be executed (in the 35th embodiment, steps S8804 and step S8805 in the main CPU 63). The gaming machine according to feature d2, which comprises a function of executing the processing of the above, and in the 36th embodiment, a function of executing the processing of step S9404 and step S9405 in the main CPU 63).

According to the feature d3, it is possible to confirm whether or not the predetermined display means is normal before the predetermined setting-related processing is executed.

Feature d4. The predetermined display control means is a means for causing the predetermined display means to display the current set value when the predetermined setting-related process is executed (a function of executing the processes of steps S9004 and S9006 in the main CPU 63). The gaming machine according to the feature d2 or d3, wherein the gaming machine is provided with.

According to the feature d4, since the current set value is displayed in the predetermined display means when the predetermined setting-related process is executed, the manager of the game hall can check the predetermined display means to display the current set value. It becomes possible to grasp. In this case, the configuration of the above feature d2 is provided, and the processing at the start of supplying the operating power includes not only the predetermined setting-related processing but also the processing for starting the check display by the predetermined display means. , The work of confirming the predetermined display means and grasping whether or not the predetermined display means is normal and the work of confirming the predetermined display means and grasping the current set value are the processes at the start of supplying the operating power. Can be done collectively in the situation where is being executed.

Further, when the configuration of the above feature d3 is provided, the predetermined display means starts the check display before the current set value is displayed by the predetermined display means, so that the predetermined display means is normal. After confirming whether or not, it is possible to confirm the current set value by using the predetermined display means. This makes it possible to accurately confirm the set value.

Feature d5. The check control means
A means for starting the check display in the predetermined display means (a function of executing the processes of steps S8804 and S8805 in the main CPU 63) before the timing at which the predetermined setting-related process can be executed is reached.
Means for terminating the check display based on the occurrence of a cancellation trigger in the predetermined setting-related process in the situation where the check display is performed (a function and a step for executing the process of step S9203 in the main CPU 63). A function of making a negative determination in S9101, a function of executing the process of step S9308 in the main CPU 63, and a function of making a negative determination in step S9101).
The gaming machine according to feature d4, characterized in that the machine is equipped with.

According to the feature d5, since the check display is started by the predetermined display means before the current set value is displayed by the predetermined display means, after confirming whether or not the predetermined display means is normal. , It is possible to confirm the current set value by using the predetermined display means. This makes it possible to accurately confirm the set value. In addition, the check display is terminated based on the fact that a predetermined setting-related process is executed in the situation where the check display is performed and a cancellation trigger occurs. As a result, when a predetermined setting-related process is executed, the check display can be ended and the current set value can be displayed by the predetermined display means without waiting for the check display to end. It will be possible. Therefore, it is possible to confirm the current set value at an early stage.

Feature d6. The gaming machine according to feature d5, wherein the cancellation trigger is generated based on the operation of a predetermined operation means (reset button 68c).

According to the feature d6, since a cancellation trigger occurs based on the operation of the predetermined operation means, it is possible to end the check display at an arbitrary timing.

Feature d7. As the predetermined setting-related process, a means for executing a process for setting a settable state in which the set value to be used can be set by the setting means (mainly in the 35th embodiment). The side CPU 63 is provided with a function of making an affirmative determination in steps S8806, step S8817 and step S8818, and in the 36th embodiment, a function of making an affirmative determination in steps S9407, step S9418 and step S9419 of the main CPU 63). The gaming machine according to any one of features d2 to d6.

According to the feature d7, not only the process for setting the set value to be used but also the process for starting the check display by the predetermined display means is aggregated with respect to the process at the start of supplying the operating power. It becomes possible.

Feature d8. The setting means updates the setting value to be used based on the operation of the predetermined operation means (reset button 68c) in the settable situation.
The check control means
A means for starting the check display in the predetermined display means (a function of executing the processes of step S8804 and step S8805 in the main CPU 63) before the settable state is reached.
Means for terminating the check display based on the operation of the predetermined operation means in the settable situation in the situation where the check display is being performed (the process of step S9203 in the main CPU 63 is executed). A function and a function of making a negative determination in step S9101, a function of executing the process of step S9308 in the main CPU 63, and a function of making a negative determination in step S9101).
With
The predetermined display control means executes the processes of steps S9004 and S9006 in the main CPU 63 to display the current set value on the predetermined display means after the check display is completed in the settable situation. The gaming machine according to feature d7, which is characterized by having a function of playing pachinko and pachinko machines.

According to the feature d8, since the check display is started by the predetermined display means before the current set value is displayed by the predetermined display means, after confirming whether or not the predetermined display means is normal. , It is possible to confirm the current set value by using the predetermined display means. This makes it possible to accurately confirm the set value. Further, in the situation where the check display is performed, the settable state is established, and the check display is terminated and the current set value is displayed based on the operation of the predetermined operation means. As a result, when the setting is possible, the check display can be terminated and the current set value can be displayed by the predetermined display means without waiting for the check display to be terminated. .. Therefore, it is possible to confirm the current set value at an early stage.

Furthermore, in a configuration in which the set value to be used is updated based on the operation of the predetermined operation means in the settable status, the check display is displayed based on the operation of the predetermined operation means in the settable status. Since it is terminated and the current setting value is displayed, a dedicated operation for ending the check display and displaying the current setting value is not required. Therefore, it is possible to improve the workability of the work for updating the set value to be used.

Feature d9. As the predetermined setting-related process, a means for executing a process for displaying the current set value on the predetermined display means (a function of executing a setting confirmation process on the main CPU 63) is provided. The gaming machine according to any one of features d2 to d8.

According to the feature d9, it is possible to consolidate not only the process for confirming the current set value but also the process for starting the check display by the predetermined display means with respect to the process at the start of supplying the operating power. It will be possible.

Feature d10. The predetermined display control means includes means for causing the predetermined display means to display information corresponding to the management result of the game history (a function of executing the processes of step S8708, step S8709, and step S9107 in the main CPU 63). The gaming machine according to any one of features d1 to d9.

According to the feature d10, it is possible to notify the manager of the game hall of the management result of the game history. In this case, whether or not the information corresponding to the management result of the game history in the predetermined display means is accurately displayed by providing the configuration of the above feature d1 and performing the check display in the predetermined display means. Can be confirmed.

It should be noted that, with respect to the configuration of the features d1 to d10, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the inventions related to the feature c group and the feature d group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, there is a demand for a configuration capable of confirming whether or not the display by the predetermined display means is accurately performed, and there is still room for improvement in this respect. be.

<Characteristic e group>
Features e1. When a predetermined event occurs due to the execution of a game, the history storage execution means (normal ball entry management process in the main CPU 63) stores the history information of the corresponding game in the history storage means (normal counter area 231). Function to execute) and
Information derivation means (a function of executing the process of step S8601 in the main CPU 63) for deriving the mode information (base value) corresponding to the result of the game by using the history information stored in the history storage means, and
A mode information storage means (calculation result storage area 234) for storing the mode information derived by the information derivation means, and
With
The mode information storage means is a gaming machine capable of storing a plurality of the mode information derived at different timings by the information derivation means.

According to the feature e1, when a predetermined event occurs, the history information corresponding to the event is stored in the history storage means. By storing the history information in the gaming machine itself, it is possible to prevent unauthorized access and modification of the history information. Further, the mode information corresponding to the result of the game is derived by using the history information stored in the history storage means, and the derived mode information is stored in the mode information storage means. This makes it possible for the gaming machine to store information for managing the number of occurrences or frequency of occurrence of predetermined events, and it is preferable to manage the occurrence frequency of predetermined events by using this managed information. It becomes possible to do it. In addition, the mode information storage means can store a plurality of mode information derived at different timings. As a result, it is possible to grasp the frequency of occurrence of a predetermined event in a plurality of periods, so that it is possible to accurately grasp the frequency of occurrence of a predetermined event.

Feature e2. The aspect information storage means is
The latest storage area (current area 311) for storing the latest mode information derived by the information derivation means, and
Past storage areas (first to third history areas 312 to 314) that store the mode information derived by the information derivation means before the mode information stored in the latest storage area, and
The gaming machine according to feature e1, characterized in that the machine is equipped with.

According to the feature e2, since the latest mode information and the past mode information derived before the latest mode information are stored, the frequency of occurrence of a predetermined event can be grasped not only in the latest but also in the past. It becomes possible.

Feature e3. A period elapse identification means (a function of executing the processes of steps S8605 and S8613 in the main CPU 63) for specifying that a predetermined period from the occurrence of the period start trigger to the occurrence of the period end trigger has elapsed, and
The latest storage executing means (step in the main CPU 63) for storing the aspect information derived by the information deriving means in the latest storage area in a situation where the period elapse specifying means has not specified that the predetermined period has elapsed. Function to execute the processing of S8602) and
Based on the fact that the predetermined period has been specified by the period elapsed specifying means, the predetermined predetermined period is derived by the information deriving means using the history information stored in the history storage means. A past storage execution means (a function of executing the processes of steps S8607 and S8614 in the main CPU 63) for storing mode information corresponding to the period corresponding to the result of the game in the period in the past storage area, and
The gaming machine according to the feature e2, which is characterized by the above.

According to the feature e3, the mode information derived in the situation where the predetermined period has not passed is stored in the latest storage area, and the mode information derived when the predetermined period has passed is stored in the past storage area. Will be done. As a result, it is possible to grasp the latest occurrence frequency of the predetermined event and to grasp the occurrence frequency of the past predetermined event in the unit of the predetermined period. Further, since the mode information is stored in the past storage area in units of a predetermined period, it is possible to reduce the number of mode information stored in the past storage area.

Features e4. Means for erasing the history information stored in the history storage means (processes of steps S8608 and S8615 in the main CPU 63) based on the fact that the predetermined period has been specified by the period elapse specifying means. The gaming machine according to feature e3, which is characterized by having a function of executing the above.

According to the feature e4, since the history information of the history information storage means is deleted when a predetermined period elapses, it is possible to suppress the storage capacity required for the history information storage means. Further, even if the history information is deleted when the predetermined period elapses in this way, the mode information derived by using the history information in the predetermined period is stored in the past storage area, so that the predetermined period is stored. It becomes possible to grasp the frequency of occurrence of a predetermined event during the period of.

Feature e5. The gaming machine according to any one of features e2 to e4, wherein the past storage area can store a plurality of the mode information having different derived timings.

According to the feature e5, since a plurality of mode information is stored in the past storage area, it is possible to compare the occurrence frequencies of predetermined events corresponding to a plurality of periods.

Feature e6. A function of executing the processing of step S8605 and step S8613 in the main CPU 63 for specifying the elapse of a predetermined period from the occurrence of the predetermined period start trigger to the occurrence of the predetermined period end trigger. )When,
Based on the fact that the predetermined period has been specified by the period elapsed specifying means, the predetermined predetermined period is derived by the information derivation means using the history information stored in the history storage means. A past storage execution means (a function of executing the processes of steps S8607 and S8614 in the main CPU 63) for storing the period-corresponding mode information corresponding to the result of the game in the period in the mode information storage means, and
With
The game according to any one of features e1 to e5, wherein the aspect information storage means can store a plurality of aspect information corresponding to each of the different predetermined periods. Machine.

According to the feature e6, since a plurality of past mode information derived in units of a predetermined period is stored, a plurality of mode information can be supported while suppressing the number of mode information stored in the mode information storage means. It is possible to compare the frequency of occurrence of predetermined events.

Feature e7. Means for erasing the history information stored in the history storage means (processes of steps S8608 and S8615 in the main CPU 63) based on the fact that the predetermined period has been specified by the period elapse specifying means. The gaming machine according to feature e6, which is characterized by having a function of executing the above.

According to the feature e7, since the history information of the history information storage means is deleted when a predetermined period elapses, it is possible to suppress the storage capacity required for the history information storage means. Further, even if the history information is deleted when the predetermined period elapses in this way, the mode information derived by using the history information in the predetermined period is stored in the past storage area, so that the predetermined period is stored. It becomes possible to grasp the frequency of occurrence of a predetermined event during the period of.

Feature e8. Means (main side) for controlling the notification means (first to fourth notification display devices 201 to 204) so that the notifications corresponding to the plurality of the mode information stored in the mode information storage means are sequentially executed. The gaming machine according to any one of features e1 to e7, characterized in that the CPU 63 includes a function of executing the processes of steps S8702 to S8709).

According to the feature e8, the notification corresponding to the aspect information is performed by the notification means. This makes it possible to grasp the frequency of occurrence of predetermined events. Further, since the notification corresponding to each of the plurality of mode information is sequentially executed, it is possible to individually grasp the occurrence frequency of a predetermined event in a plurality of periods while suppressing the number of notification means.

Feature e9. The aspect information storage means has a first storage area (first history area 312) capable of storing the aspect information and a second storage area (second history area 313) capable of storing the aspect information. ) And,
The gaming machine is means for shifting the mode information stored in the first storage area to the second storage area by an instruction including at least an LDIR instruction when an information shift trigger occurs (step S8607 in the main CPU 63). The gaming machine according to any one of features e1 to e8, which comprises a function of executing the process of step S8614).

According to the feature e9, it is possible to shift between the storage areas of the aspect information by a simple processing configuration.

It should be noted that, with respect to the configuration of the features e1 to e9, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention according to the feature e group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to manage the gaming machine preferably, and there is still room for improvement in this respect.

<Characteristic f group>
Features f1. A means for executing a process at the start of supply of operating power based on the start of supply of operating power (in the 35th embodiment, a function of executing the process of steps S8801 to S8819 in the main CPU 63, 36th In the embodiment, the function of executing the processes of steps S9401 to S9420 in the main CPU 63) and
A function of executing the process of step S8901 in the main CPU 63 so that the power failure monitoring process for monitoring the occurrence of a power failure can be executed in the situation where the process at the start of supplying the operating power is being executed. )When,
A gaming machine characterized by being equipped with.

According to the feature f1, since the power failure monitoring process is executed even in the situation where the process at the start of supplying the operating power is executed, the power failure occurs in the situation where the process at the start of supplying the operating power is executed. If it does occur, it will be possible to take appropriate measures.

Feature f2. It is equipped with a means for executing interrupt processing that is started periodically (a function for executing the first timer interrupt processing in the main CPU 63).
The interrupt process includes the power failure monitoring process.
The gaming machine according to feature f1, wherein the interrupt processing can be interrupted and started in a situation where the processing at the start of supplying the operating power is being executed.

According to the feature f2, even if the processing at the start of supplying the operating power is being executed, the interrupt processing is periodically interrupted and started, so that the processing at the start of supplying the operating power is being executed. Even in a situation, it is possible to regularly monitor the occurrence of a power outage.

Feature f3. The interrupt processing is characterized in that it can be interrupted and started even in a situation where post-end processing (steps S8822 to S8825 in the main CPU 63) is being executed after the processing at the start of supplying the operating power is completed. Features The gaming machine according to f2.

According to the feature f3, the occurrence of a power failure is regularly monitored in the situation where the processing at the start of the supply of operating power is being executed by using the interrupt processing that can be interrupted and started in the situation where the post-processing is being executed. It becomes possible to do it in a targeted manner.

Feature f4. The interrupt processing includes progress handling processing (steps S8907 to S8920 in the main CPU 63) executed to control the progress of the game.
If the interrupt process is interrupted and started in a situation where the process at the start of supply of the operating power is being executed, the power failure monitoring process is executed, but the progress response process is not executed.
Described in feature f3, which is characterized in that both the power failure monitoring process and the progress response process can be executed when the interrupt process is interrupted and started in a situation where the post-end process is being executed. Game machine.

According to the feature f4, the occurrence of a power failure is regularly monitored in the situation where the processing at the start of the supply of operating power is being executed by using the interrupt processing that can be interrupted and started in the situation where the post-processing is being executed. In the configuration to be performed, even if the interrupt processing is interrupted and started in the situation where the processing at the start of the supply of operating power is being executed, the progress correspondence processing for controlling the progress of the game is not executed. It becomes possible to do.

Feature f5. It is equipped with a setting means (a function to execute the setting value update process in the main CPU 63) for setting the setting value to be used from the setting values of a plurality of stages corresponding to the player's advantage.
Features f1 to f4 characterized in that, in a situation where the process at the start of supply of the operating power is being executed, the setting value to be used can be set by the setting means. The gaming machine according to any one of.

According to the feature f5, the power failure monitoring process is executed even when the set value to be used is set, so that a power failure occurs during the setting of the set value to be used. Even if it does, it will be possible to deal with it appropriately.

Feature f6. If the supply of operating power is stopped after the occurrence of a power failure is identified by the power failure monitoring process, it is set as a target for use before the supply of operating power is stopped when the supply of operating power is resumed. The gaming machine according to feature f5, wherein the gaming machine can be played with the set value as it is.

According to the feature f6, even if a power failure occurs in a situation where the set value to be used is set, the power failure monitoring process identifies the occurrence of the power failure, so that the supply of operating power is restarted. In that case, it is possible to play the game in a situation where the set value selected at the timing of the power failure is used. As a result, even if a power failure occurs in a situation where the set value to be used is set, it is not necessary to set the set value again when the supply of operating power is restarted.

It should be noted that, with respect to the configuration of the features f1 to f6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention according to the feature f group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, in a pachinko gaming machine, a dish storage section for storing game balls given to a player is provided on the front portion of the game machine, and the game balls stored in the dish storage section are guided to a game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to appropriately deal with the occurrence of a power failure, and there is still room for improvement in this respect.

<Characteristic g group>
Features g1. Setting-corresponding storage area for storing the setting-corresponding information (the winning / failing table in the low-probability mode, the winning / failing table in the high-probability mode) corresponding to the player's advantage (the first to sixth setting information storage in the 39th embodiment). Areas 325a to 325f, a first predetermined number of setting-corresponding storage means having a plurality of first to third setting information storage areas 326a to 326c in the 40th embodiment (setting-corresponding storage area 325 in the 39th embodiment, In the 40th embodiment, the setting corresponding storage area 326) and
A setting means for setting a setting value to be used (a function for executing a setting value update process in the main CPU 63) and
Profit-related means for executing profit-related processing (step S504) related to the profit of the player by using the setting-corresponding information stored in the setting-corresponding storage area corresponding to the set value set by the setting means. (A function to execute the special figure fluctuation start processing in the main CPU 63) and
With
A gaming machine characterized in that the number of types of the set values that can be set by the setting means is smaller than the first predetermined number.

According to the feature g1, since the setting value to be used is set from the setting values of a plurality of stages corresponding to the player's advantage, the player can use the more advantageous setting value. You will expect it to be. In this case, in the configuration in which the first predetermined number of setting correspondence storage areas for storing the setting correspondence information corresponding to the setting value is provided, the number of types of setting values to be used is larger than the first predetermined number. It is a small number. As a result, it is possible to share the configuration of the game machine in which the number of types of set values to be used is the first predetermined number and the setting-corresponding storage means, and the game machine when the number of types of set values is changed. Design work can be performed easily. From the above, it is possible to make the configuration related to the set value suitable.

Feature g2. A corresponding information storage means (set value counter in the work area 221 for specific control) capable of storing and holding corresponding information corresponding to each of the first predetermined number of the setting corresponding storage areas is provided.
The setting means sets the setting value to be used by changing the correspondence information stored and held in the correspondence information storage means based on the change operation.
The setting correspondence information of the setting value that can be set by the setting means has a configuration stored in at least one setting correspondence storage area, and is a part of the first predetermined number and corresponds to a plurality of the setting correspondence. The storage area is configured to store the same setting-corresponding information, so that the setting-corresponding information is stored in all of the first predetermined number of the setting-corresponding storage areas. The gaming machine described in g1.

According to the feature g2, the setting value to be used is changed by changing the correspondence information stored and stored in the correspondence information storage means based on the change operation, and the setting correspondence storage area corresponding to the changed correspondence information is changed. By using the setting correspondence information of the above in the profit-related processing, the profit-related processing is executed in a manner corresponding to the set value of the usage target. In this case, the setting correspondence information of the setting value that can be set by the setting means has a configuration stored in at least one setting correspondence storage area, and is a part of the first predetermined number and is a plurality of setting correspondence storages. Since the same setting correspondence information is stored in the area, the setting correspondence information is stored in all of the first predetermined number of setting correspondence storage areas. As a result, the number of types of setting values to be used while using the first predetermined number of setting corresponding storage areas as they are and the configuration for determining the setting values to be used by using the corresponding information storage means as they are. Can be set to a number smaller than the first predetermined number.

Feature g3. The profit-related means
A means for reading the setting correspondence information from the setting correspondence storage area corresponding to the correspondence information stored in the correspondence information storage means (a function of executing a reading process of a hit / fail table in the main CPU 63).
A means for executing the profit-related process using the read-out information corresponding to the setting (a function of executing the process of step S504 in the main CPU 63) and
The gaming machine according to feature g2, characterized in that the machine is equipped with.

According to the feature g3, even if the number of types of setting values to be used is smaller than the first predetermined number, the setting corresponding to the corresponding information stored and held in the corresponding information storage means is supported. Since the profit-related processing may be executed by using the setting correspondence information read from the storage area, it is possible to use the configuration for reading the setting correspondence information as it is when executing the profit-related processing.

Features g4. Predetermined display control for causing a predetermined display means (fourth notification display device 204) to display a display corresponding to the current set value in a situation where the corresponding information stored in the corresponding information storage means can be changed. It is provided with means (a function of executing the processes of steps S9801 to S9804 in the main CPU 63).
The predetermined display control means is
Means for reading the display information of the set value corresponding to the setting corresponding information stored in the setting corresponding storage area corresponding to the corresponding information of the corresponding information storage means (processing of steps S9801 to S9803 in the main CPU 63). Function to execute) and
A means for causing the predetermined display means to display the display information corresponding to the read set value (a function of executing the process of step S9804 in the main CPU 63), and
The gaming machine according to the feature g2 or g3, which comprises the above-mentioned feature g2 or g3.

According to the feature g4, when changing the set value to be used, it is possible to change the set value while checking the display corresponding to the current set value displayed on the predetermined display means. Become. In this case, even if the number of types of setting values to be used is smaller than the first predetermined number, the setting corresponding information of the setting corresponding storage area corresponding to the corresponding information of the corresponding information storage means can be used. The configuration is such that the display information of the corresponding set value is read out and the predetermined display means performs the display corresponding to the displayed information of the read set value. As a result, it is possible to use the configuration for reading the display information of the set value as it is when executing the display corresponding to the set value.

Feature g5. The number of types of the set value that can be set by the setting means is a divisor of the first predetermined number and is different from the first predetermined number.
The gaming machine according to feature g4, wherein the number of the setting-corresponding storage areas in which the setting-corresponding information corresponding to each set value is stored is the same number between the set values.

According to the feature g5, even if the number of types of set values to be used is less than the first predetermined number, the frequency at which the display corresponding to the set value is performed by the predetermined display means is determined. It is possible to make each set value the same.

Feature g6. The setting correspondence storage area corresponding to the correspondence information in a continuous order in the change order of the correspondence information stored in the correspondence information storage means stores the setting correspondence information corresponding to the same setting value. The gaming machine according to feature g4 or g5, characterized in that it is not present.

According to the feature g6, it is possible to change the set value to be displayed by a predetermined display means each time the change operation is performed once. This makes it possible to improve the operability of the change operation even if the number of types of set values to be used is smaller than the first predetermined number.

It should be noted that, with respect to the configuration of the features g1 to g6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention relating to the feature g group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to make a configuration relating to a set value that determines the advantage of the gaming machine suitable, and there is still room for improvement in this respect.

<Characteristic h group>
Features h1. Display means (special figure display unit 37a, special figure hold display unit 37b, normal figure display unit 38a, normal figure hold display unit 38b, first to fourth notification display devices 201 to 204, first to fifth display circuits 261 ~ 265) and
A display control means (main CPU 63) that transmits display data (display data signal, display clock signal) corresponding to the display content to be displayed on the display means, and
When the display data is transmitted by the display control means, the display execution means (display IC266) that sets the display on the display means so as to have the display contents corresponding to the display data, and the display execution means (display IC266).
In a gaming machine equipped with
With a plurality of the display means
The display control means includes a sequential transmission means (a function of executing a second timer interrupt process in the main CPU 63) that sequentially transmits the display data corresponding to each of the plurality of display means to the display execution means.
When the display data is transmitted by the display control means, the display execution means has a display content corresponding to the display data to the display means to which the display data is set among the plurality of display means. The display setting is made so that
The transmission interval of the display data from the sequential transmission means to the display execution means is set to the display execution means for each display means before the display corresponding to the display data cannot be maintained in each display means. A gaming machine characterized in that the transmission interval is such that the display setting is performed by the above.

According to the feature h1, the display means is displayed and controlled so that the display content corresponds to the display data by setting the display for the display means by the display execution means according to the display data transmitted from the display control means. NS. This makes it possible to reduce the processing load of the display control means. In this case, in a configuration in which a plurality of display means are provided, the display execution means is not provided in a one-to-one correspondence with the plurality of display means, but one display is provided for the plurality of display means. The execution means is also used. This makes it possible to increase the number of display means while suppressing the increase in the number of display execution means. Further, the transmission interval of the display data from the display control means to the display execution means is set by the display execution means for each display means before the display corresponding to the display data cannot be maintained in each display means. Is set to the transmission interval at which As a result, even if one display execution means is also used for a plurality of display means, it is possible to appropriately display the display data in each display means. From the above, it is possible to make the configuration for controlling the display of the display means suitable.

Feature h2. When the display data is transmitted to the display execution means, the sequential transmission means provides identifiable information (type data signal, type clock signal) that makes it possible to specify the type of the display means for which the display data is set. The gaming machine according to feature h1, characterized by transmitting to the display executing means.

According to the feature h2, when the display data is transmitted from the display control means, the display execution means may set the display data for the display means corresponding to the identifiable information transmitted from the display control means. As a result, even if one display execution means is also used for a plurality of display means, the configuration of the display execution means can be simplified.

Feature h3. The sequential transmission means is such that the update lap is repeated when the display data is set once for each of the plurality of display means in a predetermined order once in the update lap. The gaming machine according to feature h1 or h2, characterized in that display data is transmitted.

According to the feature h3, since the display control means may change the display means to which the display data is transmitted according to a predetermined order, the processing configuration of the display control means can be simplified.

Features h4. In the sequential transmission means, even if the content of the display data for one display means is the same as the content of the display data in the previous transmission with the display means as the transmission target, the display means is the transmission target. The gaming machine according to any one of features h1 to h3, characterized in that the display data is transmitted when the data is displayed.

According to the feature h4, since the display data is transmitted even if the content of the display data to be transmitted has not been changed, one display execution means is also used for a plurality of display means. However, it is possible to continue the same display by a predetermined display means.

Feature h5. The sequential transmission means executes a process for transmitting the display data in a predetermined interrupt process (second timer interrupt process) that is started by interrupting the situation where the display control means is executing a predetermined process. The gaming machine according to any one of features h1 to h4.

According to the feature h5, since the process for transmitting the display data is executed by the predetermined interrupt process, the cycle in which the display data is set in each display means can be set to the predetermined cycle. Therefore, even if one display execution means is also used for a plurality of display means, for each display means before the display corresponding to the display data cannot be maintained in each display means. It is possible to set the display data by the display execution means.

Features h6. The process for transmitting the display data to the plurality of display means to be set by the display execution means is summarized in the predetermined interrupt process according to the feature h5. Gaming machine.

According to the feature h6, it is possible to set the cycle in which the display data is set in each display means to be the target of the display setting by the display execution means to be the same cycle.

Feature h7. The display control means includes means (a function of executing the first timer interrupt process in the main CPU 63) of interrupting and activating the specific interrupt process (first timer interrupt process) in a situation where the predetermined process is being executed. ,
The gaming machine according to feature h5 or h6, wherein the interrupt cycle of the predetermined interrupt process is shorter than the interrupt cycle of the specific interrupt process.

According to the feature h7, a process of transmitting display data to the display executing means is executed in a predetermined interrupt process having a period shorter than the interrupt cycle of the specific interrupt process. This makes it possible to transmit the display data in a shorter cycle than in a configuration in which the process of transmitting the display data to the display execution means is executed by the specific interrupt process.

Feature h8. The gaming machine according to feature h7, wherein a process for advancing the game is executed in the specific interrupt processing.

According to the feature h8, it is possible to achieve the excellent effect as described above while ensuring that the specific interrupt processing is activated at an appropriate cycle in executing the processing for advancing the game.

Feature h9. The gaming machine according to feature h7 or h8, wherein the predetermined interrupt processing is interrupted and started even in a situation where the specific interrupt processing is being executed.

According to the feature h9, since the predetermined interrupt processing is interrupted and started even in the situation where the specific interrupt processing is being executed, the transmission cycle of the display data is set even if the specific interrupt processing is interrupted and started. It is possible to have a predetermined cycle.

Features h10. The features h7 to h9, characterized in that the interrupt of the specific interrupt processing is prohibited when the predetermined interrupt processing is started, and the interrupt of the specific interrupt processing is permitted when the predetermined interrupt processing is completed. The gaming machine according to any one.

According to the feature h10, it is possible to prevent the specific interrupt processing from being interrupted and executed in the situation where the predetermined interrupt processing is being executed. This makes it possible to prioritize the process for transmitting the display data.

Features h11. The display control means has a function of executing the processing at the start of supplying the operating power when the supply of the operating power is started (in the 33rd embodiment, the processing of steps S7901 to S7918 in the main CPU 63). In the 35th embodiment, the function of executing the processing of steps S8801 to S8819 in the main CPU 63, and in the 36th embodiment, the function of executing the processing of steps S9401 to S9420 in the main CPU 63, the 37th embodiment. A function of executing the processing of steps S9501 to S9518 in the main CPU 63, and a function of executing the processing of steps S9901 to S9917 in the main CPU 63 in the 42nd embodiment).
The gaming machine according to any one of features h5 to h10, wherein the predetermined interrupt processing is started by interrupting even in a situation where the processing at the start of supplying the operating power is being executed.

According to the feature h11, it is possible to control the display of a plurality of display means even in a situation where the process at the start of supplying the operating power is being executed. Further, since the predetermined interrupt processing is interrupted and started from the processing at the start of supplying the operating power, the operating power is supplied without complicating the processing configuration of the processing at the start of supplying the operating power. It is possible to control the display of a plurality of display means in the situation where the processing at the start is being executed.

Feature h12. It is equipped with a setting means (a function to execute the setting value update process in the main CPU 63) for setting the setting value to be used from the setting values of a plurality of stages corresponding to the player's advantage.
In a situation where the process at the start of supply of the operating power is being executed, the configuration is such that the setting value to be used can be set by the setting means, which can be a settable situation.
The sequential transmission means transmits the display data to the display execution means so that the display corresponding to the current set value is performed by the predetermined display means in the settable situation. The gaming machine according to feature h11.

According to the feature h12, since the current set value is displayed by a predetermined display means in the situation where the set value to be used is set, it becomes easy to set the set value to be used. ..

Feature h13. The display control means provides a means (a function of executing a first timer interrupt process in the main CPU 63) to execute a progress corresponding process in order to control the progress of the game after the process at the start of supplying the operating power is completed. Prepare,
The sequential transmission means sends the display data to the display execution means so that the corresponding display corresponding to the execution result of the progress correspondence process is performed by at least a part of the display means among the plurality of display means. To send,
The gaming machine according to feature h11 or h12, wherein the predetermined interrupt processing is interrupted and started even after the processing at the start of supplying the operating power is completed.

According to the feature h13, by using the predetermined interrupt processing, there are a plurality of situations in both the situation where the processing at the start of supplying the operating power is executed and the situation after the processing at the start of supplying the operating power is completed. It is possible to control the display of the display means of.

It should be noted that, with respect to the configuration of the features h1 to h13, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

<Feature i group>
Features i1. A first interrupt execution means (first timer interrupt process in the main CPU 63) that interrupts the other process and executes the first interrupt process based on the elapse of the first interrupt cycle in a situation where another process is being executed. Function to execute) and
A second interrupt execution means (second timer interrupt process in the main CPU 63) that interrupts the other process and executes the second interrupt process based on the elapse of the second interrupt cycle in a situation where another process is being executed. Function to execute) and
With
The second interrupt cycle is shorter than the first interrupt cycle.
For display control of predetermined display means (special figure display unit 37a, special figure hold display unit 37b, normal figure display unit 38a, normal figure hold display unit 38b, first to fourth notification display devices 201 to 204). A gaming machine characterized in that the processing is executed by the second interrupt processing.

According to the feature i1, a process for controlling the display of a predetermined display means is executed in a predetermined interrupt process having a period shorter than the interrupt cycle of the specific interrupt process. As a result, it is possible to control the display of the predetermined display means in a shorter cycle than in the configuration in which the process for controlling the display of the predetermined display means is executed by the specific interrupt process.

Feature i2. The gaming machine according to feature i1, wherein a process for advancing the game is executed in the first interrupt processing.

According to the feature i2, it is possible to achieve the excellent effect as described above while ensuring that the first interrupt process is activated at an appropriate cycle in executing the process for advancing the game.

Feature i3. The gaming machine according to feature i1 or i2, wherein the second interrupt process is interrupted and started even in a situation where the first interrupt process is being executed.

According to the feature i3, since the second interrupt processing is interrupted and started even in the situation where the first interrupt processing is being executed, a predetermined display is performed even if the first interrupt processing is interrupted and started. It becomes possible to control the display of the means at a predetermined cycle.

Features i4. The feature is that the interrupt of the first interrupt processing is prohibited when the second interrupt processing is started, and the interrupt of the first interrupt processing is permitted when the second interrupt processing is completed. The gaming machine according to any one of i1 to i3.

According to the feature i4, it is possible to prevent the first interrupt processing from being interrupted and executed in the situation where the second interrupt processing is being executed. This makes it possible to prioritize the display control of a predetermined display means.

Features i5. It is equipped with a means (a function to execute the main process in the main CPU 63) for executing the process at the start of the supply of the operating power when the supply of the operating power is started.
The gaming machine according to any one of features i1 to i4, wherein the second interrupt process is started by interrupting even in a situation where the process at the start of supplying the operating power is being executed.

According to the feature i5, it is possible to control the display of a predetermined display means even in a situation where the process at the start of supplying the operating power is being executed. Further, since the second interrupt process is started by interrupting the process at the start of supply of the operating power, the operating power can be generated without complicating the process configuration of the process at the start of the supply of the operating power. It is possible to control the display of a predetermined display means in a situation where the process at the start of supply is being executed.

Features i6. It is equipped with a setting means (a function to execute the setting value update process in the main CPU 63) for setting the setting value to be used from the setting values of a plurality of stages corresponding to the player's advantage.
In a situation where the process at the start of supply of the operating power is being executed, the configuration is such that the setting value to be used can be set by the setting means, which can be a settable situation.
The second interrupt execution means is characterized in that the second interrupt process executes a process for causing the predetermined display means to display a display corresponding to the current set value in the settable situation. The gaming machine according to the feature i5.

According to the feature i6, since the current set value is displayed by a predetermined display means in the situation where the set value to be used is set, it becomes easy to set the set value to be used. ..

Features i7. The second interrupt execution means is characterized in that the second interrupt process is executed based on the elapse of the second interrupt cycle even after the process at the start of supplying the operating power is completed. Or the gaming machine according to i6.

According to the feature i7, by using the predetermined interrupt processing, it is predetermined in both the situation where the processing at the start of supplying the operating power is executed and the situation after the processing at the start of supplying the operating power is completed. It is possible to control the display of the display means of.

It should be noted that, with respect to the configuration of the features i1 to i7, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the inventions related to the feature h group and the feature i group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary to make a configuration suitable for displaying by a display means, and there is still room for improvement in this respect.

<Characteristic j group>
Features j1. Means for executing the process at the start of the supply of the operating power based on the start of the supply of the operating power (in the 33rd embodiment, the function of executing the processes of steps S7901 to S7918 in the main CPU 63, 35th In the embodiment, the function of executing the processes of steps S8801 to S8819 in the main CPU 63, in the 36th embodiment, the function of executing the processes of steps S9401 to S9420 in the main CPU 63, and in the 37th embodiment, the main CPU 63. The function of executing the process of steps S9501 to S9518 in the above, and in the 42nd embodiment, the function of executing the process of steps S9901 to S9917 in the main CPU 63).
Predetermined interrupt execution means (a function of executing the first timer interrupt processing in the main CPU 63, a function of executing the second timer interrupt processing in the main CPU 63) that interrupts the processing at the start of supplying the operating power and executes the predetermined interrupt processing. )When,
A gaming machine characterized by being equipped with.

According to the feature j1, since the predetermined interrupt processing is interrupted and started even in the situation where the processing at the start of the supply of the operating power is being executed, it is set as the predetermined interrupt processing even immediately after the start of the supply of the operating power. It is possible to prioritize the execution of the processed process. Further, since it is not necessary to set the process set as the predetermined interrupt process for the process at the start of supply of the operating power, the operation does not have to be complicated in the process configuration of the process at the start of supply of the operating power. Even immediately after the start of power supply, it is possible to prioritize the execution of the process set as the predetermined interrupt process. From the above, it is possible to preferably perform the processing when the supply of the operating power is started.

Feature j2. The predetermined interrupt executing means includes predetermined display means (special figure display unit 37a, special figure hold display unit 37b, normal figure display unit 38a, normal figure hold display unit 38b, first to fourth notification display devices 201 to 204. The gaming machine according to feature j1, wherein the process for controlling the display of) is executed by the predetermined interrupt process.

According to the feature j2, it is possible to make a predetermined display by a predetermined display means even immediately after the start of supply of the operating power.

Feature j3. It is equipped with a setting means (a function to execute the setting value update process in the main CPU 63) for setting the setting value to be used from the setting values of a plurality of stages corresponding to the player's advantage.
In a situation where the process at the start of supply of the operating power is being executed, the configuration is such that the setting value to be used can be set by the setting means, which can be a settable situation.
The predetermined interrupt execution means performs a process for making a display corresponding to the current set value on the predetermined display means (fourth notification display device 204) in the settable situation in the predetermined interrupt process. The gaming machine according to feature j1 or j2, which is characterized in that it is executed.

According to the feature j3, since the current set value is displayed by a predetermined display means in the situation where the set value to be used is set, it becomes easy to set the set value to be used. ..

Feature j4. Any of the features j1 to j3, wherein the predetermined interrupt executing means executes the predetermined interrupt processing based on the elapse of the predetermined interrupt cycle even after the processing at the start of supplying the operating power is completed. The gaming machine described in 1.

According to the feature j4, by using the predetermined interrupt processing, it is predetermined in both the situation where the processing at the start of supplying the operating power is executed and the situation after the processing at the start of supplying the operating power is completed. It is possible to execute the processing set as interrupt processing.

Feature j5. The gaming machine according to any one of features j1 to j4, wherein the predetermined interrupt executing means executes a power failure monitoring process (step S8901) for monitoring the occurrence of a power failure by the predetermined interrupt process.

According to the feature j5, since the power failure monitoring process is executed even in the situation where the process at the start of supplying the operating power is executed, the power failure occurs in the situation where the process at the start of supplying the operating power is executed. If it does occur, it will be possible to take appropriate measures.

Feature j6. The predetermined interrupt processing includes progress correspondence processing (steps S8907 to S8920 in the main CPU 63) executed to control the progress of the game.
If the predetermined interrupt process is interrupted and started in a situation where the process at the start of supply of the operating power is being executed, the power failure monitoring process is executed, but the progress response process is not executed.
When the predetermined interrupt process is interrupted and started in a situation where the post-end process (steps S8822 to S8825 in the main CPU 63) is executed after the process at the start of supplying the operating power is completed, the power failure monitoring The gaming machine according to feature j5, wherein both the process and the progress response process can be executed.

According to the feature j6, the occurrence of a power failure is monitored in the situation where the processing at the start of the supply of operating power is being executed by using the predetermined interrupt processing that can be interrupted and started in the situation where the post-processing is being executed. In a configuration that is performed periodically, even if a predetermined interrupt process is interrupted and started in a situation where the process at the start of supply of operating power is being executed, the progress response process for controlling the progress of the game is not executed. It becomes possible to do so.

It should be noted that, with respect to the configuration of the features j1 to j6, the features A1 to A15, the features B1 to B7, the features C1 to C5, the features D1 to D10, the features E1 to E6, the features F1 to F3, the features G1 to G18, and the features H1 to H1 H7, features I1 to I9, features J1 to J4, features K1 to K7, features L1 to L20, features M1 to M7, features N1 to N6, features O1 to O11, features P1 to P12, features Q1 to Q5, features R1 to R17, features S1 to S8, features T1 to T13, features U1 to U8, features V1 to V6, features W1 to W11, features X1 to X11, features Y1 to Y11, features Z1 to Z10, features a1 to a3, features b1 to b7, features c1 to c21, features d1 to d10, features e1 to e9, features f1 to f6, features g1 to g6, features h1 to h13, features i1 to i7, and features j1 to j6. May be applied. This makes it possible to produce a synergistic effect due to the combined configuration.

According to the invention according to the above-mentioned feature j group, the following problems can be solved.

Pachinko game machines and slot machines are known as game machines. For example, a pachinko gaming machine is provided with a dish storage section on the front portion of the game machine for storing game balls given to the player, and the game balls stored in the dish storage section are guided to the game ball launcher. , Is fired toward the game area according to the player's firing operation. Then, for example, when the game ball enters the ball entry section provided in the game area, the game ball is dispensed from the payout device to the dish storage section, for example. Further, in a pachinko gaming machine, a configuration in which an upper plate storage unit and a lower plate storage unit are provided as a plate storage unit is also known. In this case, a game ball stored in the upper plate storage unit launches a game ball. Guided by the device, the excess game balls in the upper dish storage section are discharged to the lower dish storage section.

Further, in the slot machine, when the start lever is operated and a new game is started in the situation where the medal is bet, the lottery process is executed by the control means. Further, when the lottery process is executed, the rotation start control is executed by the control means to start the rotation of the reel, and when the stop button is operated during the rotation of the reel, the control means operates. The rotation of the reel is stopped by executing the rotation stop control. Then, when the stop result after the reel rotation is stopped corresponds to the winning combination in the lottery process, the player is given a privilege corresponding to the winning combination.

Here, in a gaming machine such as the above example, it is necessary that the processing when the supply of the operating power is started is preferably performed, and there is still room for improvement in this respect.

The basic configuration of the gaming machine to which each of the above features can be applied or applied to each feature is shown below.

Pachinko gaming machine: An operating means operated by a player, a game ball launching means for launching a game ball based on the operation of the operating means, a ball passage for guiding the launched game ball to a predetermined game area, and a game. A gaming machine that includes each gaming component arranged in an area and gives a privilege to a player when a gaming ball passes through a predetermined passing portion of each gaming component.

Rotating machine such as a slot machine: Equipped with a picture display device that variably displays a plurality of pictures, the variable display of the plurality of pictures is started due to the operation of the start operation means, and is caused by the operation of the stop operation means. A gaming machine in which the variable display of the plurality of symbols is stopped after a lapse of a predetermined time, and a privilege is given to the player according to the symbols after the stop.

10 ... Pachinko machine, 12 ... Game machine body, 14 ... Front door frame, 28 ... Launch operation device, 33 ... 1st operating port, 34 ... 2nd operating port, 35 ... Through gate, 49a ... Gate detection sensor, 63 ... Main CPU, 65 ... Main RAM, 68a ... Setting key insertion unit, 68b ... Update button, 68c ... Reset button, 69a ... First notification display device, 69b ... Second notification display device, 69c ... Third notification Display device, 112 ... Management CPU, 117 ... History memory, 171 ... Separate storage memory, 181 to 186 ... History memory for settings 1 to 6, 191 ... First history memory, 192 ... Second history Memory, 201 ... 1st notification display device, 201a to 201g ... Display segment, 202 ... 2nd notification display device, 202a to 202g ... Display segment, 203 ... 3rd notification display device, 204 ... 4th Notification display device, 221 ... Work area for specific control, 222 ... Stack area for specific control, 223 ... Work area for non-specific control, 224 ... Stack area for non-specific control, 231 ... Counter area for normal use, 232 ... Counter area for open / close execution mode, 233 ... Counter area for high frequency support mode, 234 ... Calculation result storage area, 241 ... Management RAM, 251 ... Reset signal output unit, 252 ... Program monitoring unit, 266 ... Display IC, 311 ... Current area, 312 ... 1st history area, 313 ... 2nd history area, 314 ... 3rd history area, 321-24 ... Display segment, 325 ... Setting compatible storage area, 325a to 325f ... 1st to 6th Setting information storage area, 326 ... Setting compatible storage area, 326a to 326c ... First to third setting information storage areas.

Claims (1)

A setting means for setting a setting value corresponding to the player's advantage, and
A situation generating means for making it possible to set the set value by the setting means, and a situation generating means for making it possible to set the set value.
Information erasing means for executing information erasing processing and
A setting notification means for causing the notification of the set value set by the setting means to be performed in a situation other than the settable situation, and a setting notification means.
A first specific means for identifying that a predetermined operation is being performed using the setting key for the setting key insertion unit, and
A second specific means for identifying that a predetermined operation means is being operated, and
When a predetermined event occurs due to the execution of the game, the history storage execution means for storing the history information of the corresponding game in the history storage means, and the history storage execution means.
An information derivation means for deriving mode information corresponding to a game in a predetermined period by using the history information stored in the history storage means.
A display control means that controls the display of the mode information derived by the information derivation means on the information display means in a predetermined mode display, and
Equipped with a,
The situation generating means uses the setting key to the setting key insertion unit in a situation where the supply of operating power to the control means having the setting means is started and the processing at the start of supply is being executed. Based on the situation in which the predetermined operation is specified by the first specific means and the operation of the predetermined operation means is specified by the second specific means. , Make it possible to set the above
It is a situation in which the first specific means has not specified that the predetermined operation is performed by using the setting key for the setting key insertion unit in the situation where the processing at the start of supply is being executed. Based on the situation in which the operation of the predetermined operating means is specified by the second specific means, the information erasing process is executed by the information erasing means, although it does not become the settable situation. ,
It is a situation in which the first specific means specifies that the predetermined operation is performed by using the setting key for the setting key insertion unit in the situation where the processing at the start of supply is being executed. Based on the situation that the operation of the predetermined operating means is not specified by the second specific means, the setting notification means notifies the set value.
The setting notification means is such that the notification of the set value is performed by the information display means.
The control means
A predetermined internal storage means in which information is temporarily stored when the process is executed, and
In-area processing execution means for executing in-area processing, which is processing using a program stored in a storage area within a predetermined address range in the program storage means, and
An out-of-area processing execution means that executes an out-of-area processing that is a processing using a program stored in a storage area of an address range outside the predetermined address range in the program storage means.
When starting or after starting the out-of-area processing, a save execution means for saving the information stored in the predetermined internal storage means to the save storage means, and a save execution means.
A return execution means for returning the information saved in the save storage means to the predetermined internal storage means when or after the end of the out-of-area processing.
With
When the process at the start of supply is started by the control means, the process included in the intra-regional process is executed.
A gaming machine characterized in that the processing by the situation generating means, the processing by the setting notification means, and the information erasing processing by the information erasing means are included in the intra-regional processing.

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