JP2023148162A - Wiring board, electronic device and electronic module - Google Patents

Abstract

To provide a wiring board, an electronic device, and an electronic module in which the bandwidth is increased.SOLUTION: A wiring board is a laminate having a first surface and a second surface located on the opposite side of the first surface, an insulating substrate including a first insulating layer, a second insulating layer, and a third insulating layer which are located in this order from the first surface to the second surface, a first line and a second line which are located at least from the first insulating layer to the second surface of the insulating substrate and are adjacent to each other in plan view, and a ground film conductor which is located on the insulating substrate and surrounds the first line and the second line. The ground film conductor includes a first ground film conductor which has a first opening where the first line and the second line intersect and is located in the second insulating layer, and a second ground film conductor which has a second opening where both the first line and the second line intersect and is located in the third insulating layer. The second opening is larger than the first opening, and the center point of the first opening is located between the center point of the second opening and the edge of the second opening in plan view.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to a wiring board, an electronic device, and an electronic module.

Patent Document 1 shows a wiring board having a signal line extending from one board surface to the other board surface.

Japanese Patent Application Publication No. 2009-212400

Wiring boards that transmit high-frequency signals are sometimes required to further widen the transmission frequency band. An object of the present disclosure is to provide a wiring board, an electronic device, and an electronic module that can achieve even wider bandwidth.

The wiring board according to the present disclosure includes:
A laminate having a first surface and a second surface located on the opposite side of the first surface, and a first insulating layer and a second insulating layer located in order from the first surface toward the second surface. and an insulating substrate including a third insulating layer;
a first line and a second line located at least from the first insulating layer to the second surface of the insulating substrate and adjacent to each other in plan view;
a ground film conductor located on the insulating substrate and surrounding the first line and the second line;
Equipped with
The ground membrane conductor is
a first ground film conductor having a first opening where the first line and the second line intersect and being located in the second insulating layer;
a second ground film conductor having a second opening where the first line and the second line intersect and being located in the third insulating layer;
including;
the second opening is larger than the first opening;
In plan view, the center point of the first opening is located between the center point of the second opening and the edge of the second opening.

The electronic device according to the present disclosure includes:
The above wiring board,
an electronic element mounted on the wiring board;
Equipped with

The electronic module according to the present disclosure includes:
The above electronic device,
a module board on which the electronic device is mounted;
Equipped with

According to the present disclosure, it is possible to realize further widening of the bandwidth of wiring boards, electronic devices, and electronic modules.

1 is a plan perspective view showing a wiring board according to Embodiment 1 of the present disclosure. FIG. 1 is a longitudinal cross-sectional view showing a wiring board of Embodiment 1. FIG. FIG. 2 is a plan perspective view (A) showing the main parts of the wiring board of Embodiment 1, and a diagram (B) illustrating the distance between openings. FIG. 2 is a cross-sectional view showing a third layer (A), a fourth layer (B), and fifth to tenth layers (C) in the main part of FIG. 2(A). It is a cross-sectional view showing the 11th layer (A), the 12th layer (B), and the 13th layer (C) in the main part of FIG. 2(A). FIG. 3 is a cross-sectional view showing the 14th layer (A) in the main part of FIG. 2(A), and a diagram showing the back surface (B). A vertical cross-sectional view (A) taken along the line AA in FIG. 3(B), a vertical cross-sectional view (B) taken along the line B-B in FIG. 3(B), a vertical cross-sectional view taken along the line C-C in FIG. 5(A) (C). FIG. 7 is a plan perspective view showing main parts of the wiring board of Modification 1 (A) and Modification 2 (B) of Embodiment 1. FIG. 3 is a plan perspective view showing a wiring board according to Embodiment 2 of the present disclosure. FIG. 3 is a vertical cross-sectional view showing a wiring board according to a second embodiment. FIG. 7 is a plan perspective view showing a wiring board according to Embodiment 3 of the present disclosure. FIG. 7 is a longitudinal cross-sectional view showing a wiring board of Embodiment 3; 1 is a diagram illustrating an electronic device and an electronic module according to an embodiment of the present disclosure. FIG.

Hereinafter, each embodiment of the present disclosure will be described in detail with reference to the drawings. Hereinafter, the first surface S1 side will be described as "upper" and the second surface S2 side will be referred to as "lower" in the thickness direction of wiring board 1. In addition, in plan perspective, the direction in which the third electrode T3 and the fourth electrode T4 are located in the direction in which the parallel line conductors (H1, H2) extend is the "left side", and the direction in which the first electrode T1 and the second electrode T2 are located is "left side". is explained as "right side". Planar perspective means looking through from above.

(Embodiment 1)
FIG. 1A is a plan perspective view of a wiring board according to Embodiment 1 of the present disclosure. FIG. 1B is a longitudinal cross-sectional view of the wiring board of Embodiment 1. FIG. 1B shows a cross section taken along the first line 10. FIG. FIG. 2 is a plan perspective view (A) showing the main parts of the wiring board of Embodiment 1, and a diagram (B) illustrating the distance between openings. FIG. 3 is a cross-sectional view showing the third layer (A), fourth layer (B), and fifth to tenth layers (C) in the main part of FIG. 2(A). FIG. 4 is a cross-sectional view showing the 11th layer (A), 12th layer (B), and 13th layer (C) in the main part of FIG. 2(A). FIG. 5 is a cross-sectional view showing the 14th layer (A) in the main part of FIG. 2(A), and a diagram showing the back surface (B). FIG. 5(B) shows the back surface seen from above. 6 is a vertical cross-sectional view (A) taken along the line AA in FIG. 3(B), a vertical cross-sectional view (B) taken along the line BB in FIG. 3(B), and a vertical cross-sectional view taken along the line CC in FIG. 5(A). It is a longitudinal cross-sectional view (C) in .

The wiring board 1 according to the first embodiment includes an insulating substrate 2 having a first surface S1 and a second surface S2 located on the opposite side of the first surface S1, and first insulating substrates located on the insulating substrate 2 and adjacent to each other. It includes a line 10 and a second line 20.

The first line 10 and the second line 20 are a pair of differential lines through which differential signals are transmitted, and may be lines that transmit broadband signals. The wide band mentioned above may be a band from 1 GHz to 60 GHz.

The wiring board 1 may further include a plurality of ground film conductors 31 and a plurality of ground via conductors 32 located on the insulating substrate 2 and surrounding the first line 10 and the second line 20. The plurality of ground film conductors 31 and the plurality of ground via conductors 32 may have a configuration that surrounds the first line 10 and the second line 20 all together, or partially or completely surround the first line 10 and the second line 20. 20 may be individually enclosed.

The insulating substrate 2 is a substrate having insulating properties such as ceramics or resin, and may have a laminated structure. The insulating substrate 2 may include a first insulating layer YT1, a second insulating layer YT2, and a third insulating layer YT3 located in this order from the first surface S1 to the second surface S2. The first insulating layer YT1 to the third insulating layer YT3 may be layers that extend parallel to the direction in which the first surface S1 and the second surface S2 extend. The first insulating layer YT1 to the third insulating layer YT3 may be continuous with each other, or may be layers separated from each other. The upper surface of the first insulating layer YT1 may be the first surface S1, or the first surface S1 and the first insulating layer YT1 may be spaced apart. The lower surface of the third insulating layer YT3 may be the second surface S2, or the third insulating layer YT3 and the second surface S2 may be separated from each other.

The insulating substrate 2 may further include a plurality of wiring layers (first layer y1 to fifteenth layer y15). The first layer y1 to the fifteenth layer y15 are arranged in this order in the vertical direction. The electrodes (first electrode T1 to fourth electrode T4), line conductors (i-th line conductor Li to fourth line conductor L4), or the plurality of ground film conductors 31 are any of the first layer y1 to the fifteenth layer y15. It may be located in The first layer y1 is the surface layer on the first surface S1 side, and the fifteenth layer y15 is the surface layer on the second surface S2 side. The plurality of wiring layers are layers arranged in the vertical direction.

Each of the first insulating layer YT1 to third insulating layer YT3 may be an insulating layer located continuously between any of the plurality of wiring layers (first layer y1 to fifteenth layer y15) described above. . In the first embodiment, the first insulating layer YT1 means the insulating layer between the first layer y1 and the fourth layer y4, and the second insulating layer YT2 means the insulating layer between the fourth layer y4 and the eleventh layer y11. The third insulating layer YT3 may refer to an insulating layer between the eleventh layer y11 and the fifteenth layer y15.

<1st track>
The first line 10 extends from the first surface S1 to the second surface S2 of the insulating substrate 2, and includes, in order, the third electrode T3, the i-th via conductor Vi, the i-th line conductor Li, the first parallel line conductor H1, and the It may have one line conductor L1, a first via conductor V1, a second line conductor L2, a second via conductor V2, and a first electrode T1. The first electrode T1 may be located on the second surface S2 of the insulating substrate 2. The third electrode T3 may be located on the first surface S1 of the insulating substrate 2.

As shown in FIG. 1A, in the first line 10, the third electrode T3, the i-th line conductor Li, the first parallel line conductor H1, the first line conductor L1, the second line conductor L2, and the first electrode T1 are arranged in a plane. In fluoroscopy, they may be positioned so that they appear to be connected in sequence. The third electrode T3, the i-th line conductor Li, the first parallel line conductor H1, the first line conductor L1, the second line conductor L2, and the first electrode T1 are located in order from the left to the right in plan perspective. Alternatively, a portion may be folded back from the right side to the left side.

The i-th line conductor Li, the first parallel line conductor H1, and the first line conductor L1 may be located in the same wiring layer and may be successively connected. The first line conductor L1 and the second line conductor L2 may be located in different wiring layers, and may be located in that order from above to below. The i-th line conductor Li, the first parallel line conductor H1, the first line conductor L1, and the second line conductor L2 may have the same line width.

As shown in FIG. 1B, the third electrode T3 may be located on the first layer y1. The i-th line conductor Li, the first parallel line conductor H1, and the first line conductor L1 may be located in the fourth layer y4. The second line conductor L2 may be located on the thirteenth layer y13. The first electrode T1 may be located on the fifteenth layer y15.

The i-th via conductor Vi may be located from the first layer y1 where the third electrode T3 is located to the fourth layer y4 where the i-th line conductor Li is located. The first via conductor V1 may be located from the fourth layer y4 to the thirteenth layer y13 where the second line conductor L2 is located. The second via conductor V2 may be located from the thirteenth layer y13 to the fifteenth layer y15 (layer on the second surface S2) where the first electrode T1 is located.

The third electrode T3 may be connected to the upper part of the i-th via conductor Vi. The lower part of the i-th via conductor Vi may be connected to the left part of the i-th line conductor Li. The right part of the i-th line conductor Li may be connected to the left part of the first parallel line conductor H1. The right side of the first parallel line conductor H1 may be connected to the left side of the first line conductor L1. The right part of the first line conductor L1 may be connected to the upper part of the first via conductor V1. A lower portion of the first via conductor V1 may be connected to a left portion of the second line conductor L2. The right part of the second line conductor L2 may be connected to the upper part of the second via conductor V2. A lower portion of the second via conductor V2 may be connected to the first electrode T1. The connection positions of the upper and lower parts may also be referred to as the upper end and the lower end, respectively. The connection positions of the left and right parts may also be referred to as the left end and right end, respectively.

<Second track>
The second line 20 extends from the first surface S1 to the second surface S2 of the insulating substrate 2, and includes the fourth electrode T4, the (i+1)th via conductor Vi+1, the (i+1)th line conductor Li+1, the second parallel line conductor H2, and the second parallel line conductor H2. It may have three line conductors L3, a third via conductor V3, a fourth line conductor L4, a fourth via conductor V4, and a second electrode T2. The second electrode T2 may be located on the second surface S2 of the insulating substrate 2. The fourth electrode T4 may be located on the first surface S1 of the insulating substrate 2.

As shown in FIG. 1A, in the second line 20, the fourth electrode T4, the (i+1)th line conductor Li+1, the second parallel line conductor H2, the third line conductor L3, the fourth line conductor L4, and the second electrode T2 are arranged on a plane. In fluoroscopy, they may be positioned so that they appear to be connected in sequence. The fourth electrode T4, the (i+1)th line conductor Li+1, the second parallel line conductor H2, the third line conductor L3, the fourth line conductor L4, and the second electrode T2 are located in order from the left to the right in planar perspective. Alternatively, a portion may be folded back from the right side to the left side.

The (i+1)th line conductor Li+1, the second parallel line conductor H2, and the third line conductor L3 may be located in the same wiring layer and may be successively connected. The third line conductor L3 and the fourth line conductor L4 may be located in different wiring layers, and may be located in that order from above to below. The (i+1)th line conductor Li+1, the second parallel line conductor H2, the third line conductor L3, and the fourth line conductor L4 may have the same line width.

The fourth electrode T4 may be located on the first layer y1. The (i+1)th line conductor Li+1, the second parallel line conductor H2, and the third line conductor L3 may be located in the fourth layer y4. The fourth line conductor L4 may be located on the thirteenth layer y13. The second electrode T2 may be located on the fifteenth layer y15.

The i+1-th via conductor Vi+1 may be located from the first layer y1 where the fourth electrode T4 is located to the fourth layer y4 where the i+1-th line conductor Li+1 is located. The third via conductor V3 may be located from the fourth layer y4 to the thirteenth layer y13 where the fourth line conductor L4 is located. The fourth via conductor V4 may be located from the thirteenth layer y13 to the fifteenth layer y15 (layer on the second surface S2) where the second electrode T2 is located.

The fourth electrode T4 may be connected to the top of the i+1th via conductor Vi+1. The lower part of the i+1-th via conductor Vi+1 may be connected to the left part of the i+1-th line conductor Li+1. The right part of the (i+1)th line conductor Li+1 may be connected to the left part of the second parallel line conductor H2. The right side of the second parallel line conductor H2 may be connected to the left side of the third line conductor L3. The right part of the third line conductor L3 may be connected to the upper part of the third via conductor V3. The lower part of the third via conductor V3 may be connected to the left part of the fourth line conductor L4. The right part of the fourth line conductor L4 may be connected to the upper part of the fourth via conductor V4. A lower portion of the fourth via conductor V4 may be connected to the second electrode T2. The connection positions of the upper and lower parts may also be referred to as the upper end and the lower end, respectively. The connection positions of the left and right parts may also be referred to as the left end and right end, respectively.

<First track and second track>
In the first line 10 and the second line 20, the i-th line conductor Li, the i+1-th line conductor Li+1, the first parallel line conductor H1, the second parallel line conductor H2, the first line conductor L1, and the third line conductor L3 are the same. It may be located in the wiring layer. The second line conductor L2 and the fourth line conductor L4 may be located in the same wiring layer.

In the first line 10 and the second line 20, the i-th via conductor Vi and the i+1-th via conductor Vi+1 may be located over the same wiring layer. The first via conductor V1 and the third via conductor V3 may be located over the same wiring layer. The second via conductor V2 and the fourth via conductor V4 may be located over the same wiring layer.

The third electrode T3 and the fourth electrode T4 may be arranged in the front-rear direction (direction perpendicular to the left-right direction and along the first surface S1 or the second surface S2). The first electrode T1 and the second electrode T2 may be arranged in the front-back direction. Each area of the first electrode T1 and the second electrode T2 may be larger than each area of the third electrode T3 and the fourth electrode T4. The distance between the first electrode T1 and the second electrode T2 (the distance between the center of the first electrode T1 and the center of the second electrode T2) is the distance between the third electrode T3 and the fourth electrode T4 (the distance between the center of the third electrode T3 and the center of the second electrode T2). (distance to the center of the fourth electrode T4).

<Grounding membrane conductor>
The plurality of ground film conductors 31 may be located in all layers (second layer y2 to fourteenth layer y14) of the insulating substrate 2 except for the surface layer. The plurality of ground film conductors 31 include one or more third ground film conductors 31i having a third opening O3, one or more ground film conductors 31h having a strip-shaped opening Oh, and a first opening O1 to be described later. and a plurality of first ground film conductors 31a and a plurality of second ground film conductors 31b, each having a second opening O2. The third opening O3 may surround the i-th via conductor Vi and the i+1-th via conductor Vi+1. The strip-shaped opening Oh may surround the i-th line conductor Li, the i+1-th line conductor Li+1, the first parallel line conductor H1, the second parallel line conductor H2, the first line conductor L1, and the third line conductor L3.

The opening Oh of the ground film conductor 31h of the fourth layer y4 includes a band-shaped portion along the first parallel line conductor H1 and the second parallel line conductor H2, a shaped portion of the third opening O3, and a portion of the first opening O1. It may have a shape in which the shaped portions are combined.

The plurality of ground via conductors 32 may be located so as to surround at least the opening Oh, the first opening O1, the second opening O2, and the third opening O3. Two adjacent ground via conductors 32 among the plurality of ground via conductors 32 may be spaced apart from each other.

The wiring board 1 may further include a third ground electrode Tg3 surrounding the third electrode T3 and a fourth ground electrode Tg4 surrounding the fourth electrode T4. The third ground electrode Tg3 and the fourth ground electrode Tg4 may be located on the first surface S1 of the insulating substrate 2 and connected to the ground film conductor 31 via the ground via conductor 32.

The wiring board 1 may further include a plurality of first ground electrodes Tg1 and a plurality of second ground electrodes Tg2 surrounding the first electrode T1 and the second electrode T2. The plurality of first ground electrodes Tg1 and the plurality of second ground electrodes Tg2 may be located on the second surface S2, and may be located around the first electrode T1 and the second electrode T2 at intervals.

The individual areas of the plurality of first ground electrodes Tg1 and the plurality of second ground electrodes Tg2 may be larger than the individual areas of the third ground electrode Tg3 and the fourth ground electrode Tg4. Further, the area of the region surrounded by the first ground electrode Tg1 and the second ground electrode Tg2 may be larger than the area of the region surrounded by the third ground electrode Tg3 and the fourth ground electrode Tg4. With this configuration, it is possible to connect with wirings arranged densely on the first surface S1, and to connect with wirings arranged at large intervals on the second surface S2. In this configuration, an electronic element is connected to the third electrode T3 and the fourth electrode T4 on the first surface S1, and the first electrode T1 and the second electrode T2 on the second surface S2 are connected to the electrodes, etc. of another wiring board. In this configuration, wiring connection becomes easy.

According to the wiring board 1 having the above configuration, a broadband differential signal can be transmitted between the first surface S1 and the second surface S2 of the insulating substrate 2.

<Details of the first track and second track>
The i-th line conductor Li and the i+1-th line conductor Li+1 may have a portion where the interval becomes smaller from left to right. The part may be present in part, or the whole part may correspond to the part. With this configuration, the distance between the third electrode T3 and the fourth electrode T4 can be increased.

The first parallel line conductor H1 and the second parallel line conductor H2 may be parallel to each other. The first parallel line conductor H1 and the second parallel line conductor H2 may be straight, or may partially or entirely include a curved portion. With this configuration, the first electrode T1 and second electrode T2 on the second surface S2 and the third electrode T3 and fourth electrode T4 on the first surface S1 can be moved by an arbitrary distance in the direction along the first surface S1. Easy to release.

The first line conductor L1 and the third line conductor L3 may have a portion where the distance increases from left to right. The part may be present in part, or the whole part may correspond to the part. With this configuration, it is possible to increase the distance between the first line 10 and the second line 20 in response to the first electrode T1 and second electrode T2 having a large area.

The second line conductor L2 and the fourth line conductor L4 may be parallel to each other. Alternatively, the second line conductor L2 and the fourth line conductor L4 may have a portion where the interval increases from left to right, or a portion where the interval decreases from left to right. It may have. The region where the distance becomes larger or the region where the distance becomes smaller may be present in part, or all of the region may correspond to the region. As will be described in detail later, the transmission characteristics of the wiring board 1 can be improved by the second line conductor L2 and the fourth line conductor L4.

The interval between the first via conductor V1 and the third via conductor V3 and the interval between the second via conductor V2 and the fourth via conductor V4 may be the same. When the distance between the second line conductor L2 and the fourth line conductor L4 is different between the left end and the right end, the distance between the first via conductor V1 and the third via conductor V3 is It may be smaller or larger than the distance from V4.

Although the second line conductor L2 and the fourth line conductor L4 are located in one wiring layer (the thirteenth layer y13), they are not limited to being located in one wiring layer. Although not shown, the second line conductor L2 may be located over multiple wiring layers. For example, the second line conductor L2 is divided into two parts, one of which is located in the 12th layer y12 and the other located in the 13th layer y13, and one end of the one and one end of the other are connected by a via conductor. You can leave it there. Since this configuration has a stepped configuration when viewed in cross section as shown in FIG. 1B, it will be referred to as a "stepped configuration" hereinafter. The fourth line conductor L4 may similarly have a stepped form. In the case of having a step-like form, the second line conductor L2 and the fourth line conductor L4 may have a mirror-symmetric form and arrangement. The first line conductor L1 and the third line conductor L3 may also have a step-like form, and may additionally have a mirror-symmetric form and arrangement.

<Details of the opening of the ground membrane conductor>
In the following, when we refer to the center point of the aperture, we refer to a line segment that bisects the area of the aperture in the front-rear direction (vertical direction of the paper surface of FIG. 2(A)) and the horizontal direction (vertical direction of the paper surface of FIG. 2(A)). It means the intersection with a line segment that bisects the line segment in the left-right direction).

The third ground film conductor 31i of the first insulating layer YT1 (FIG. 1B) may have the third opening O3 (FIGS. 1A and 1B), as described above. The third opening O3 includes an i-th via conductor Vi (a portion located in the first insulating layer YT1 of the first line 10) and an i+1-th via conductor Vi+1 (a portion located in the first insulating layer YT1 of the second line 20). may intersect. The intersection of an arbitrary opening and an arbitrary conductor means a structure in which a conductor passes through the opening from one side of the opening to the other.

The first ground film conductor 31a of the second insulating layer YT2 (FIG. 1B) may have the first opening O1, as described above.

The first opening O1 includes a first via conductor V1 (a portion located in the second insulating layer YT2 of the first line 10) and a third via conductor V3 (a portion located in the second insulating layer YT2 of the second line 20). may intersect. In plan view, the first via conductor V1 and the third via conductor V3 may be located at the center in the width direction of the first opening O1. The width direction means the left-right direction (the left-right direction in the paper of FIG. 2(A)). The central portion means the center point and the vicinity of the center point.

The first opening O1 has a shape where a circle surrounding the first via conductor V1 and a circle surrounding the third via conductor V3 are combined, or a long hole shape (long hole shape with rounded corners) including the above two circles. Alternatively, it may have an elliptical shape. The above circles may be replaced by polygons or regular polygons. The first opening O1 may have a shape that is symmetrical with respect to a plane that bisects the space between the first line 10 and the second line 20.

Note that the first opening O1 is not limited to the above configuration. The first ground film conductor 31a has one first opening O1 where the first via conductor V1 intersects and the third via conductor V3 does not intersect, and one first opening O1 where the first via conductor V1 does not intersect and the third via conductor V3 intersects. (See FIG. 9A). That is, the first opening O1 may be divided into two.

The second ground film conductor 31b of the third insulating layer YT3 (FIG. 1B) may have the second opening O2, as described above.

The first line 10 and the second line 20 may intersect with the second opening O2 in the third insulating layer YT3. The first line 10 and the second line 20 intersecting the second opening O2 include a portion of the first via conductor V1 and the third via conductor V3, the second line conductor L2 and the fourth line conductor L4, and the second via The portion may include a portion of the conductor V2 and the fourth via conductor V4. In plan view, the second via conductor V2 and the fourth via conductor V4 may be located at the center in the width direction of the second opening O2.

In plan view, the second opening O2 has a shape in which a circle surrounding the first electrode T1 and a circle surrounding the second electrode T2 are combined, or a long hole shape (a long hole with rounded corners) including the two circles. It may have an elliptical shape) or an elliptical shape. The above circles may be replaced by polygons or regular polygons. The second opening O2 may have a shape that is symmetrical with respect to a plane that bisects the space between the first line 10 and the second line 20.

The second opening O2 may be larger than the first opening O1. The size comparison means a comparison of area sizes in planar perspective. In addition. The maximum width of the second opening O2 in plan view may be larger than the maximum width of the first opening O1 in plan view. Further, the minimum width of the second opening O2 in plan view may be larger than the minimum width of the first opening O1 in plan view. The minimum width means the minimum length between two parallel straight lines when an object is sandwiched between the two parallel straight lines.

According to this configuration, the inductance component and capacitance component of the transmission path gradually change in a stepwise manner from the region before the first opening O1, through the region of the first opening O1, to the region of the second opening O2. do. Therefore, rapid changes in the inductance and capacitance components of the transmission path are reduced, and the transmission characteristics of the wiring board 1 are improved.

In plan view, the center point P1 (FIG. 2A) of the first opening O1 may be located between the center point P2 of the second opening O2 and the edge E1 of the second opening O2.

According to this configuration, the distance between the first via conductor V1 and the third via conductor V3 located in the first opening O1 and the first electrode T1 and second electrode T2 can be increased. In addition, the first line 10 and the second line 20 have line conductors extending in a direction different from the vertical direction around the boundary between the first opening O1 and the second opening O2, corresponding to the difference between the center points P1 and P2. (the second line conductor L2 and the fourth line conductor L4). The line conductors (second line conductor L2 and fourth line conductor L4) are arranged in a direction (horizontal direction ). Therefore, the second line conductor L2 and the fourth line conductor L4 have the effect of increasing the inductance component of the transmission line. On the other hand, the capacitance component increases near the first electrode T1 and second electrode T2, which have large areas. Therefore, the increased inductance component and the large capacitance components of the first electrode T1 and the second electrode T2 are combined, making it easy to match the impedance. Therefore, the transmission characteristics of the wiring board 1 can be improved.

As shown in FIG. 2(B), in plan perspective, the length J1 from the center point Pi of the third opening O3 to the center point P1 of the first opening O1 is the length J1 from the center point Pi of the third opening O3 to the second opening It may be smaller than the length J2 of O2 to the center point P2. That is, in plan view, the edge E1 of the second opening O2 that is closer to the center point P1 may be the edge closer to the third electrode T3 and the fourth electrode T4.

The characteristics of a signal transmission path depend on the line length, and a situation may arise in which better characteristics can be obtained with a shorter line length. By adopting a configuration in which the length J1 is smaller than the length J2, even if the positions of the first electrode T1 to the fourth electrode T4 are determined at the design stage, the line lengths of the first line 10 and the second line 20 can be adjusted. can be shortened. Therefore, it is possible to deal with the above situation.

In plan perspective, the first line conductor L1 extends from the edge of the first opening O1 to the center in the width direction of the first opening O1, and the second line conductor L2 extends in the width direction of the first opening O1. It may extend from the central portion in the width direction to the central portion in the width direction of the second opening O2. The width direction means the left-right direction (the left-right direction in the paper of FIG. 2(A)). The central portion means the center point and the vicinity of the center point.

Similarly, in plan perspective, the third line conductor L3 extends from the edge of the first opening O1 to the center in the width direction of the first opening O1, and the fourth line conductor L4 extends from the edge of the first opening O1. The second opening O2 may extend from the center portion in the width direction of the second opening O2 to the center portion in the width direction of the second opening O2.

In the first line conductor L1 to the fourth line conductor L4 having the above configuration, the first line conductor L1 and the second line conductor L2 are separated in the thickness direction (vertical direction) of the insulating substrate 2, and the third line conductor L3 and the second line conductor L2 are separated from each other in the thickness direction (vertical direction) of the insulating substrate 2. The four-line conductor L4 may be spaced apart in the thickness direction (vertical direction) of the insulating substrate 2.

With this configuration, the second line conductor L2 and the fourth line conductor L4, which increase the inductance component, are located near the first electrode T1 and the second electrode T2 in the thickness direction. Therefore, the increased inductance component and the large capacitance components of the first electrode T1 and the second electrode T2 are located closer to each other, making it easier to match the impedance. Therefore, the transmission characteristics of the wiring board 1 can be further improved.

Further, according to the above configuration, the first line 10 and the second line 10 are located in the second insulating layer YT2 and the third insulating layer YT3 in this order. The two lines 20 are located in a region near the center in the width direction of the first opening O1 and the second opening O2. Therefore, the transmission characteristics of the wiring board 1 can be improved by reducing the deviation in the arrangement of the first line 10 and the second line 20 and the surrounding ground conductors.

The first line conductor L1 and the third line conductor L3 may be located closer to the first surface S1 than to the second surface S2. The second line conductor L2 and the fourth line conductor L4 may be located closer to the second surface S2 than to the first surface S1.

According to this configuration, the second line conductor L2 and the fourth line conductor L4, which increase the inductance component, are located closer to the first electrode T1 and the second electrode T2 in the thickness direction. Therefore, the increased inductance component and the large capacitance components of the first electrode T1 and the second electrode T2 are located closer to each other, making it easier to match the impedance. Therefore, the transmission characteristics of the wiring board 1 can be further improved.

(Modifications 1 and 2)
FIG. 7 is a plan perspective view showing main parts of the wiring board of Modification 1 (A) and Modification 2 (B) of Embodiment 1. Although the wiring boards 1A and 1B of Modifications 1 and 2 differ from Embodiment 1 in the path shapes of the second line conductor L2 and fourth line conductor L4, other components are the same as Embodiment 1. good.

In Modification 1 of FIG. 7(A), the second line conductor L2 and the fourth line conductor L4 may partially include sections c1 and c2 where the distance between them is small. According to this configuration, the impedance of the second line conductor L2 and the fourth line conductor L4 can be adjusted by changing the interval between the sections c1 and c2 at the design stage of the wiring board 1A. Therefore, it is easier to match the impedance of the transmission path in the vicinity of the first electrode T1 and the second electrode T2, and the transmission characteristics of the wiring board 1A can be further improved.

In modification 2 of FIG. 7(B), the second line conductor L2 and the fourth line conductor L4 may partially include sections c3 and c4 where the distance between them is large. According to this configuration, the impedance of the second line conductor L2 and the fourth line conductor L4 can be adjusted by changing the interval between the sections c3 and c4 at the design stage of the wiring board 1B. Therefore, it is easier to match the impedance of the transmission path in the vicinity of the first electrode T1 and the second electrode T2, and the transmission characteristics of the wiring board 1B can be further improved.

In addition, in Modification 1 and Modification 2, the sections c1, c2, c3, and c4 may be parallel to each other, the interval may increase from left to right, or the interval may increase from left to right. It may be narrowed. The sections c1, c2, c3, and c4 may be linear or may include curved portions. The curved portions of the second line conductor L2 and the fourth line conductor L4 may be curved to form an angle or may be curved with a roundness. The second line conductor L2 and the fourth line conductor L4 may be mirror symmetrical.

In FIGS. 7A and 7B, the second line conductor L2 is located in one wiring layer (the thirteenth layer y13). However, the second line conductor L2 may have the step-like form described above and may be located in a plurality of wiring layers. The same applies to the fourth line conductor L4.

(Embodiment 2)
FIG. 8A is a plan perspective view showing a wiring board according to Embodiment 2 of the present disclosure. FIG. 8B is a vertical cross-sectional view showing the wiring board of Embodiment 2. FIG. 8B shows a cross section along the first line 10.

The wiring board 1C according to Embodiment 2 differs from Embodiment 1 in the position of the first opening O1C in plan view and the routes of part of the first line 10 and second line 20, and other components are the same as in Embodiment 1. It may be the same as 1.

The first ground film conductor 31a of the second insulating layer YT2 may have a first opening O1C. The first opening O1C may have the same size and shape as the first opening O1 of the first embodiment. In plan view, the first via conductor V1 and the third via conductor V3 may be located at the center in the width direction of the first opening O1C.

In plan perspective, the first line conductor L1 extends from the edge of the first opening O1C to the center in the width direction of the first opening O1C, and the second line conductor L2 extends in the width direction of the first opening O1C. It may extend from the central portion in the width direction to the central portion in the width direction of the second opening O2. The width direction means the left-right direction (the left-right direction on the paper surface of FIG. 8A). The central portion means the center point and the vicinity of the center point.

Similarly, in plan view, the third line conductor L3 extends from the edge of the first opening O1C to the center in the width direction of the first opening O1C, and the fourth line conductor L4 extends from the edge of the first opening O1C. The second opening O2 may extend from the center portion in the width direction of the second opening O2 to the center portion in the width direction of the second opening O2.

In plan perspective, the center point P1C (FIG. 8A) of the first opening O1C may be located between the center point P2 of the second opening O2 and the edge E2 of the second opening O2. In plan perspective, the length J1C from the center point Pi of the third opening O3 to the center point P1C of the first opening O1C is the length J2 from the center point Pi of the third opening O3 to the center point P2 of the second opening O2. May be larger than . That is, the edge E2 may be an edge on a side far from the third electrode T3 and the fourth electrode T4 in plan view.

This configuration provides the following effects. That is, the characteristics of a signal transmission path depend on the line length, and a situation may arise in which better characteristics are obtained with a longer line length. By adopting a configuration in which the length J1C is larger than the length J2, when the positions of the first electrode T1 to the fourth electrode T4 are determined at the design stage, the line lengths of the first line 10 and the second line 20 can be adjusted. can be made longer. Therefore, it is possible to deal with the above situation.

(Embodiment 3)
FIG. 9A is a plan perspective view showing a wiring board according to Embodiment 3 of the present disclosure. FIG. 9B is a vertical cross-sectional view showing the wiring board of Embodiment 3. FIG. 9B shows a cross section along the first line 10.

The wiring board 1D according to the third embodiment has the shapes of the first openings O1Da and O1Db in plan view, the positions of the first openings O1Da and O1Db, the first via conductor V1 and the third via conductor V3, and the first line 10 and the third via conductor V3. A part of the route of the second line 20 may be different from the first embodiment, and other components may be the same as the first embodiment.

The first ground film conductor 31a of the second insulating layer YT2 may have two first openings O1Da and O1Db. The first via conductor V1 and the third via conductor V3 may be located at the center of the two first openings O1Da and O1Db, respectively.

The interval between the first via conductor V1 and the third via conductor V3 may be larger than the interval between the second via conductor V2 and the fourth via conductor V4. The first openings O1Da and O1Db may have a diameter corresponding to the impedance of the transmission path. Therefore, if the distance between the first via conductor V1 and the third via conductor V3 is larger than the above diameter, the first ground film conductor 31a opens two first openings O1Da and O1Db that are separated from each other, as shown in FIG. 9A. May have.

The center point P1D (FIG. 9A) of the first openings O1Da and O1Db may be located between the center point P2 of the second opening O2 and the edge E3 of the second opening O2. The edge E3 is the edge on the side closer to the third electrode T3 and the fourth electrode T4 in plan view, and the length J1D from the center point P1D to the center point Pi of the third opening O3 is the edge from the center point P2 to the third electrode T4. It may be smaller than the length J2 of the opening O3 to the center point Pi. The center point P1D of the first openings O1Da and O1Db, which are divided into two, is defined as the midpoint of a line segment connecting the center point of one first opening O1Da and the center point of the other first opening O1Db. Ru.

Note that as a modification of the third embodiment, although not shown in the drawings, the first openings O1Da and O1Db may be located at various locations within the range where they overlap with the second opening O2 when seen in plan view. Then, the positions of the first via conductor V1 and the third via conductor V3, the positions of each one end of the first line conductor L1 and the third line conductor L3, and the second line The positions of one end of each of the conductor L2 and the fourth line conductor L4 may be determined. When the first via conductor V1 and the third via conductor V3 are close to each other, the two first openings O1Da and O1Db may be integrated into one opening as in the first and second embodiments. In each of the above cases, the first openings O1Da, O1Db, and the first line 10 and the second line 20 may have mirror-symmetric shapes and arrangements.

According to the configuration of Embodiment 3 and the above-mentioned modification, by making the first openings O1Da, O1Db and the arrangement and spacing between the first via conductor V1 and the third via conductor V3 different in the design stage, the first Even if the positions of the electrodes T1 to T4 are fixed, the line lengths of the first line 10 and the second line 20 can be made different. Furthermore, by making the paths and line lengths of the second line conductor L2 and the fourth line conductor L4 different, it is possible to adjust the impedance of the relevant portions. Therefore, by employing the configurations of the third embodiment and the above-described modification, it is possible to easily match the impedance around the first electrode T1 and the second electrode T2, which have large areas, and improve the transmission characteristics of the wiring board 1D.

(Electronic devices and electronic modules)
FIG. 10 is a diagram illustrating an electronic device and an electronic module according to an embodiment of the present disclosure. An electronic device 80 according to this embodiment includes a wiring board 1 and an electronic element 82 mounted on the wiring board 1. Wiring board 1 may be replaced by wiring boards 1A to 1D. The electronic element 82 is an element to which a high-frequency signal is input, output, or input and output, and is electrically connected to the third electrode T3 and the fourth electrode T4 of the wiring board 1. The electronic device 82 may be a semiconductor device. The above-mentioned high frequency signal may be a differential signal.

The electronic module 100 according to this embodiment includes a module substrate 110 and an electronic device 80 mounted on the module substrate 110. In addition to the electronic device 80, other electronic devices, electronic elements, electric elements, etc. may be mounted on the module substrate 110. The module substrate 110 has a plurality of electrodes 111 on the mounting part of the electronic device 80, and the plurality of electrodes 111, the first electrode T1, the second electrode T2, the first ground electrode Tg1, and the second ground electrode of the wiring board 1. The electrodes Tg2 may be connected to each other via a conductive bonding material 113.

The electronic device 80 and the electronic module 100 according to the present embodiment can obtain good transmission characteristics from low frequencies to high frequencies by using the wiring board 1 (or wiring boards 1A to 1D) that is designed to have a wide band.

Each embodiment of the present disclosure has been described above. However, the wiring board, electronic device, and electronic module of the present disclosure are not limited to the above embodiments. For example, details shown in the embodiments can be changed as appropriate without departing from the spirit of the invention.

1, 1A to 1D Wiring board 2 Insulating substrate S1 First surface S2 Second surface T1 First electrode T2 Second electrode T3 Third electrode T4 Fourth electrode Tg1 First ground electrode Tg2 Second ground electrode Tg3 Third ground electrode Tg4 Fourth ground electrode 10 First line Vi i-th via conductor Li i-th line conductor H1 first parallel line conductor L1 first line conductor V1 first via conductor L2 second line conductor V2 second via conductor 20 second line Vi+1 th i+1 via conductor Li+1 i+1th line conductor H2 2nd parallel line conductor L3 3rd line conductor V3 3rd via conductor L4 4th line conductor V4 4th via conductor YT1 1st insulating layer YT2 2nd insulating layer YT3 3rd insulating layer y1 ~y15 1st layer ~ 15th layer (wiring layer)
31, 31h Grounding film conductor 31a First grounding film conductor 31b Second grounding film conductor 31i Third grounding film conductor 32 Grounding via conductor O1, O1C, O1Da, O1Db First opening O2 Second opening O3 Third opening E1 to E3 Edge P1, P1C, P1D, P2, Pi Center point J1, J1C, J1D, J2 Length c1 to c4 Section 80 Electronic device 82 Electronic element 100 Electronic module 110 Module substrate

Claims (7)

A laminate having a first surface and a second surface located on the opposite side of the first surface, a first insulating layer and a second insulating layer located in order from the first surface toward the second surface. an insulating substrate including an insulating layer and a third insulating layer;
a first line and a second line located at least from the first insulating layer to the second surface of the insulating substrate and adjacent to each other in plan view;
a ground film conductor located on the insulating substrate and surrounding the first line and the second line;
Equipped with
The ground membrane conductor is
a first ground film conductor having a first opening where the first line and the second line intersect and being located in the second insulating layer;
a second ground film conductor having a second opening where the first line and the second line intersect and being located in the third insulating layer;
including;
the second opening is larger than the first opening;
The center point of the first aperture is located between the center point of the second aperture and the edge of the second aperture in plan perspective view;
wiring board. The ground membrane conductor is
a third ground film conductor having a third opening where the first line and the second line intersect and being located in the first insulating layer;
In planar perspective, the length from the center point of the third opening to the center point of the first opening is smaller than the length from the center point of the third opening to the center point of the second opening.
The wiring board according to claim 1. The ground membrane conductor is
a third ground film conductor having a third opening where the first line and the second line intersect and being located in the first insulating layer;
In planar perspective, the length from the center point of the third opening to the center point of the first opening is greater than the length from the center point of the third opening to the center point of the second opening.
The wiring board according to claim 1. The first line is
A first line conductor extending from the edge of the first opening to the center in the width direction of the first opening when seen in plan view, and a first line conductor extending from the center part in the width direction of the first opening to the center of the second opening in plan view. a second line conductor extending toward the center in the width direction;
The second line is
a third line conductor extending from the edge of the first opening to the center in the width direction of the first opening when seen in plan view; and a third line conductor extending from the center in the width direction of the first opening to the center of the second opening in plan view. a fourth line conductor extending toward the center in the width direction;
the first line conductor and the second line conductor are spaced apart in a thickness direction of the insulating substrate;
the third line conductor and the fourth line conductor are spaced apart in a thickness direction of the insulating substrate;
The wiring board according to any one of claims 1 to 3. The first line is
a first electrode located on the second surface;
The second line is
a second electrode located on the second surface;
The first line conductor and the third line conductor are located closer to the first surface than the second surface, and the second line conductor and the fourth line conductor are located closer to the second surface than the first surface. The wiring board according to claim 4, wherein the wiring board is located near the surface. The wiring board according to any one of claims 1 to 5,
an electronic element mounted on the wiring board;
An electronic device comprising: The electronic device according to claim 6;
a module board on which the electronic device is mounted;
An electronic module comprising:

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