JP2023120774A - Clock control circuit and imaging element - Google Patents

Abstract

To make it possible to satisfactorily apply SSC while suppressing image noise with low power consumption.SOLUTION: A clock control circuit disclosed herein includes: a spectrum spreading circuit that spreads a spectrum in response to a clock signal used in at least one prescribed circuit in an imaging element having a plurality of pixels; and a control circuit that recognizes a horizontal scanning period for a plurality of pixels, and outputs a setting signal that controls a spread cycle of spectrum spreading by the spectrum spreading circuit such that the spread cycle becomes a desired cycle with respect to the horizontal scanning period.SELECTED DRAWING: Figure 8

Description

The present disclosure relates to clock control circuits and imaging devices.

As a method of reducing EMI (Electromagnetic Interference) in electronic equipment, it is effective to use spread spectrum clocking (SSC). On the other hand, when SSC is applied to an image sensor, image noise may occur in pixel output, and techniques for reducing this image noise have been proposed (see Patent Documents 1 and 2).

WO2013/47404 JP 2001-268355 A

The techniques described in Patent Documents 1 and 2 are insufficient in suppressing image noise, and power consumption increases.

It is desirable to provide a clock control circuit and an imaging device that can satisfactorily apply SSC while suppressing image noise with low power consumption.

A clock control circuit according to an embodiment of the present disclosure includes a spread spectrum circuit that spreads the spectrum of a clock signal used in at least one predetermined circuit in an image pickup device having a plurality of pixels; a control circuit for recognizing the horizontal scanning period and for outputting a setting signal for controlling the spreading period of the spectrum spread by the spectrum spreading circuit so that it becomes a desired period for the horizontal scanning period.

An imaging device according to an embodiment of the present disclosure includes a plurality of pixels, at least one predetermined circuit, a spectrum spread circuit that spreads the spectrum of a clock signal used in the at least one predetermined circuit, and a plurality of and a control circuit for recognizing the horizontal scanning period for the pixels and for outputting a setting signal for controlling the spreading period of the spectrum spread by the spectrum spreading circuit so that it becomes a desired period for the horizontal scanning period.

A clock control circuit or an imaging device according to an embodiment of the present disclosure recognizes a horizontal scanning period for a plurality of pixels, and sets the spread period of spectrum spread by the spectrum spread circuit to a desired period with respect to the horizontal scanning period. Control the diffusion period so that

FIG. 2 is an explanatory diagram showing an example of the relationship between EMI standards and interfering waves; FIG. 4 is an explanatory diagram showing an example of clock frequencies of SSCs; FIG. 4 is an explanatory diagram showing an example of interference waves when SSC is applied; FIG. 10 is an explanatory diagram schematically showing an example of a pixel output result when SSC is applied to an image sensor; FIG. 4 is an explanatory diagram schematically showing an example of the relationship between the 1H period and the SSC spreading period; FIG. 3 is an explanatory diagram showing a specification example of some operation parameters and an operation range of an image sensor; 1 is a block diagram showing an overview of an imaging device according to an embodiment of the present disclosure; FIG. 1 is a block diagram schematically showing a configuration example of a main part of an imaging device according to an embodiment; FIG. FIG. 4 is a block diagram schematically showing a configuration example of a 1H identification processing circuit and an overview of the operation of the 1H identification processing circuit; FIG. 4 is an explanatory diagram showing an example of the relationship between an input setting signal and an output signal of a 1H identification processing circuit; FIG. 10 is an explanatory diagram schematically showing a modified example of the relationship between the 1H period and the SSC spreading period; An example of the relationship between the 1H period and the SSC diffusion period when the 1H period is varied in the same image sensor is schematically shown. It is explanatory drawing which shows an example of the performance evaluation in the actual machine of the technique which concerns on one Embodiment. FIG. 4 is an explanatory diagram schematically showing an example of the relationship between 1V period and 1H period and SSC spreading period; FIG. 4 is an explanatory diagram schematically showing an example of an SSC spreading period when 1H period varies within one frame period;

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be given in the following order.
0. Comparative example (Figures 1 to 6)
1. One embodiment (FIGS. 7-15)
1.1 Configuration and operation 1.2 Modification 1.3 Effect 2. Other embodiments

<0. Comparative example>
Due to an increase in power consumption and an improvement in operating speed due to multi-functionalization of LSIs (Large Scale Integration), there are many cases where products or devices mounted on products do not meet the EMI standard. FIG. 1 shows an example of the relationship between an EMI standard as an interference wave standard and an interference wave from an EUT (Equipment Under Test). In FIG. 1, the horizontal axis indicates frequency, and the vertical axis indicates the level of interfering waves.

Spread spectrum clocking (SSC), for example, is often used as an effective means of mitigating EMI.

FIG. 2 shows an example of the CLK (clock) frequency of the SSC. FIG. 2A shows an example of the waveform of the clock signal after spectrum spreading by SSC. FIG. 2B shows an example of SSC frequency fluctuation (frequency trend). In (A) and (B) of FIG. 2, the horizontal axis indicates time. In FIG. 2B, the vertical axis indicates frequency.

In FIG. 2B, fc indicates the center frequency of the SSC. In SSC, the clock frequency dynamically fluctuates according to the spreading frequency (the reciprocal of the SSC spreading period). δ indicates a spreading factor, and in the example of FIG. 2B, a frequency variation of ±δ% is produced with respect to the center frequency fc.

FIG. 3 shows an example of an interference wave when SSC is applied. In FIG. 3, the horizontal axis indicates frequency, and the vertical axis indicates the level of interfering waves.

When SSC is applied, the frequency band of the interfering wave is expanded according to the spreading factor as shown in FIG. 3, but the peak level of the interfering wave is reduced.

FIG. 4 schematically shows an example of pixel output results when SSC is applied to an image sensor.

When the above-described SSC is applied to an image sensor such as an image sensor configured by an IC (Integrated Circuit) chip, horizontal streak image noise may occur in pixel output. In the image pickup device, since the pixels in the horizontal direction in units of one row A/D (analog/digital) convert the output of the photoelectric device in the same time zone, no difference occurs in the output in the horizontal direction. However, when looking at pixels on a row-by-row basis, even if the pixel output is constant, the results of A/D conversion differ from row to row due to the effects of temporal fluctuations in the clock cycle of the SSC, resulting in the occurrence of horizontal streaks. Sometimes.

Therefore, a technique has been proposed to keep the SSC frequency unchanged for each row. For example, in Patent Document 1 (International Publication No. 2013/47404), the SSC clock is counted, the count value is used for the 1H period, and the 1H period is changed for each row. A technique for suppressing noise by setting the fluctuation amount of the average value in the 1H period to 0 has been proposed. Further, Patent Document 2 (Japanese Patent Application Laid-Open No. 2001-268355) proposes a technique of resetting the SSC at each timing of horizontal scanning. As a result, each horizontal scan is operated with a spread clock having the same phase (frequency). A transfer gate clock signal that determines the charge storage time of the photoelectric conversion element is used for resetting.

FIG. 5 schematically shows an example of the relationship between the horizontal scanning period (1H period) and the SSC diffusion period. FIG. 5A shows an example of the waveform of the horizontal scanning control signal (horizontal synchronization signal). FIG. 5B shows an example of the waveform of the clock signal after spectrum spreading by SSC. FIG. 5C shows an example of SSC frequency fluctuation (frequency trend). In (A), (B), and (C) of FIG. 5, the horizontal axis indicates time. In FIG. 5C, the vertical axis indicates frequency.

FIG. 5 shows an example in which the 1H period and the SSC spreading period are the same. From this, it can be seen that the 1H period and the SSC diffusion period are the same for each row when horizontal scanning is performed. The same effect can be obtained when the 1H period is an integral multiple of the SSC spreading period.

FIG. 6 shows a specification example of some operating parameters and operating ranges of the imaging device in tabular form.

When the 1H period and the SSC spreading period are set to be the same for each row as shown in FIG. 5, it is conceivable to fix the 1H period. If the 1H period is fixed, it can be designed so that the 1H period and the SSC spreading period are the same for each row in advance, so that it is easy to do so. However, it may be difficult to fix the 1H period for each row. For example, as shown in FIG. 6, the input clock signal to the image pickup device, the angle of view characteristics of the image pickup device itself, the frame rate, and the like can be varied according to the specifications. In the table of FIG. 6, AAA, BBB, GGG, HHH, XXX, and YYY mean numerical values including decimal places. In this way, the imaging device may have variable operating parameters. In many cases, the user using the imaging device can arbitrarily set the operating parameters within the operating range. Therefore, depending on these parameters, the above-mentioned 1H period easily fluctuates. If the 1H period fluctuates, it will deviate from the SSC diffusion period or an integer multiple of the SSC diffusion period, resulting in occurrence of horizontal streak noise in pixels.

On the other hand, as proposed in the above-mentioned Patent Document 2, by resetting the SSC at each horizontal scanning timing, it is possible to make the 1H period and the SSC spreading period the same even if the 1H period fluctuates. becomes. However, this method increases the operating current consumed when the SSC is reset and activated. In addition, when the SSC circuit is configured with a PLL (Phase Locked Loop), if it takes too much startup time until the PLL operates stably, it becomes difficult to shorten the blanking period.

Therefore, it is desirable to provide a clock control circuit and an imaging device that can satisfactorily apply SSC while suppressing image noise with low power consumption.

<1. one embodiment>
[1.1 Configuration and Operation]
FIG. 7 shows an outline of an imaging device 1 according to an embodiment of the present disclosure.

The imaging element 1 according to one embodiment is, for example, a CCD (Charge Coupled Device) image sensor or a CMOS (Complementary Metal Oxide Semiconductor) image sensor. The imaging device 1 according to one embodiment can be applied to general equipment using an image sensor, such as mobile terminal equipment and camera equipment.

The imaging device 1 includes a pixel array 10 , a pixel driving section 11 , a pixel reading section 12 , a pixel signal processing section 13 and a control section 14 . The imaging device 1 is composed of, for example, an IC chip.

The pixel array 10 has a plurality of pixels P arranged in a matrix. The pixel drive unit 11 sequentially drives the plurality of pixels P in the pixel array 11 row by row based on instructions from the control unit 14 .

The pixel reading unit 12 reads and outputs image signals from the plurality of pixels P based on instructions from the control unit 14 . The pixel signal processing unit 13 performs predetermined signal processing on the image signal output from the pixel reading unit 12 .

The control unit 14 controls each circuit in the image sensor 1 . The control section 14 has a clock control circuit 15 . The clock control circuit 15 controls the generation of clock signals used for each circuit in the imaging device 1 .

FIG. 8 schematically shows a configuration example of the essential parts of the imaging device 1 according to one embodiment. FIG. 8 shows a circuit configuration example of a portion related to clock signal generation. FIG. 8 shows a circuit configuration example for making the 1H period and the SSC spreading period the same.

An imaging device 1 according to one embodiment includes a CLK system configuration circuit 2 , an SSC circuit 3 , a 1H identification processing circuit 4 and a mode register 5 . The control unit 14 may have these configuration blocks. The clock control circuit 15 has at least an SSC circuit 3 and a 1H identification processing circuit 4 .

The SSC circuit 3 is a spectrum spread circuit that spreads the spectrum of a clock signal used for at least one predetermined circuit in the imaging device 1 . The SSC circuit 3 includes a PLL and a modulation circuit that dynamically controls the clock of the PLL. The SSC circuit 3 may have one output clock signal, or may have a plurality of output clock signals. The modulation circuit of the SSC circuit 3 receives a setting signal (SSC spreading period setting signal) from the 1H identification processing circuit 4 relating to the SSC spreading frequency and the SSC spreading factor. Based on the setting signal from the 1H identification processing circuit 4, the SSC circuit 3 adjusts the SSC spreading frequency so that the frequency matches the reciprocal number (frequency) of the 1H period.

The CLK system configuration circuit 2 supplies a clock signal corresponding to the operating frequency of each circuit in the imaging device 1 to each circuit. The CLK system configuration circuit 2 performs clock frequency division and clock distribution according to the setting signal from the mode register 5 . The CLK system configuration circuit 2 has an SSC non-applied CLK circuit 21 that generates an SSC non-applied clock signal and an SSC applied CLK circuit 22 that generates an SSC applied clock signal. An external input clock signal INCK and an output clock signal from the SSC circuit 3 are input to the CLK system configuration circuit 2 as input clock signals. The external input clock signal INCK is input to the SSC non-applied CLK circuit 21 as an input clock signal. The output clock signal from the SSC circuit 3 is input to the SSC-applied CLK circuit 22 as an input clock signal. A part of the SSC non-application clock signal is inputted as an input clock signal to the SSC circuit 3 (see FIG. 9 described later).

A mode register 5 generates a setting signal that determines various operation modes of the image sensor 1 . A setting signal generated by the mode register 5 is supplied to each circuit in the imaging device 1 . Each circuit in the image sensor 1 operates according to the settings determined by the mode register 5 . The mode register 5 outputs a clock frequency setting signal (frequency division setting signal) to the CLK system configuration circuit 2 and the 1H identification processing circuit 4 as a setting signal.

FIG. 9 schematically shows a configuration example of the 1H identification processing circuit 4 and an overview of the operation of the 1H identification processing circuit 4. As shown in FIG.

The 1H identification processing circuit 4 has an SSC spreading period setting memory 41 and a control circuit 42 . The control circuit 42 recognizes the 1H period for a plurality of pixels P, and controls the SSC spreading period so that the spreading period of the spectrum spread by the SSC circuit 3 (SSC spreading period) becomes a desired period for the 1H period. A setting signal (SSC spreading cycle setting signal) is output to the SSC circuit 3 . Here, the desired period is, for example, a period in which the 1H period and the SSC spreading period are the same.

Even if the 1H period fluctuates as shown in FIGS. 12 and 15 to be described later, the control circuit 42 recognizes the dynamic change in the 1H period, and adjusts the SSC spreading period to the dynamic change in the 1H period. It is possible to output the SSC spreading period setting signal so as to follow the desired period. In this case, the control circuit 42 may recognize the dynamic change of the 1H period during the blanking period of the 1H period, and output the setting signal following the dynamic change of the 1H period.

The control circuit 42 recognizes the 1H period based on a clock setting signal used for each circuit related to scanning of at least a plurality of pixels P in the image sensor 1 . The clock setting signal includes, for example, a signal indicating division setting of the clock. For example, the control circuit 42 provides a frequency division setting signal indicating the frequency division number of the input clock signal to the SSC circuit 3 with respect to the external input clock signal INCK, and to each circuit related to scanning of at least a plurality of pixels P in the image sensor 1. The 1H period may be recognized based on the clock setting signal used.

Control circuitry 42 includes circuitry using, for example, decoders, combinatorial logic, and FlipFlops. The control circuit 42 refers to the information stored in the SSC spreading period setting memory 41 and recognizes the 1H period based on the input setting signal. The SSC spreading period setting memory 41 stores table information as shown in FIG. 10, for example. The control circuit 42 matches the setting value indicated by the input setting signal with the table information, and outputs an SSC spreading cycle setting signal as an output signal.

FIG. 10 shows an example of the relationship between the input setting signal and the output signal of the 1H identification processing circuit 4 in tabular form.

FIG. 10 shows, as an example of the input setting signal, a clock setting signal used for each circuit related to pixel scanning, and a division number of the SSC input clock with respect to the external input clock signal INCK. Also, as an example of the output signal (SSC spreading period setting signal), the frequency division number of the SSC input clock corresponding to the 1H period is shown.

FIG. 10 shows an example in which signals A, B, C, D, E, and F exist as clock setting signals used for each circuit related to pixel scanning. 1 may vary depending on circuit specifications. Further, each of the signals A, B, C, D, E, and F may be 1 bit, or may be composed of multiple bits.

In FIG. 10, the input setting signal includes a frequency division setting signal indicating the frequency division number of the SSC input clock with respect to the externally input clock signal INCK. If recognizable, the input setting signals may be only clock setting signals used for each circuit related to pixel scanning.

In addition, in the table information of FIG. 10, the value of the division number of the SSC input clock for the external input clock signal INCK may be arbitrarily set by the mode register 5 later. For example, the current value may be set to a value that is minus 1, plus 1, 2 times, 0.5 times, or the like. Similarly, the division number of the SSC input clock corresponding to the 1H period may also be arbitrarily set by the mode register 5 later. For example, the current value may be set to a value that is minus 1, plus 1, 2 times, 0.5 times, or the like.

[1.2 Modification]
FIG. 11 schematically shows a modification of the relationship between the 1H period and the SSC spreading period. FIG. 11A shows an example of the waveform of the horizontal scanning control signal (horizontal synchronization signal). FIG. 11B shows an example of the waveform of the clock signal after spectrum spreading by SSC. FIG. 11C shows an example of SSC frequency fluctuation (frequency trend). In (A), (B), and (C) of FIG. 11, the horizontal axis indicates time. In FIG. 11C, the vertical axis indicates frequency.

The desired period controlled by the control circuit 42 of the 1H identification processing circuit 4 is not limited to a period in which the 1H period and the SSC spreading period are the same, but may be a period in which the 1H period is an integral multiple of the SSC spreading period. good too. For example, FIG. 5 shows an example in which the 1H period and the SSC spreading period are the same. It may be configured so that it can be doubled. Also, the setting signal of the mode register 5 is not limited to doubling, and the 1H period may be configured to be an arbitrary integer multiple of the SSC spreading period. It is desirable that the 1H period is an integral multiple of the SSC diffusion period, but within a range in which the horizontal streak noise of the pixel P is not emphasized, some error may occur from the integral multiple. For example, there may be an error of approximately several percent from an integer multiple. The control signal for the integer multiple may be input to the 1H identification processing circuit 4 or may be input to the SSC circuit 3 .

[1.3 Effect]
As described above, according to the imaging device 1 according to the embodiment, the 1H period is recognized, and the spread period of the spectrum spread by the SSC circuit 3 (SSC spread period) is set to the desired period with respect to the 1H period. The SSC spreading period is controlled so that As a result, SSC can be favorably applied while suppressing image noise with low power consumption.

If the 1H period is fixed during the operation of the imaging device 1, periodic fluctuations such as jitter do not occur in the 1H period. , the variation of the 1H period can be followed inside the image sensor 1, and the SSC diffusion period can be set to a desired period. It is desirable that the 1H period is an integral multiple of the SSC diffusion period, but within a range where the horizontal streak noise of the pixel P is not emphasized, even if there is a difference (difference between the 1H period and the SSC diffusion period) in this time. good. For example, an error of approximately several percent may occur.

FIG. 12 schematically shows an example of the relationship between the 1H period and the SSC diffusion period when the 1H period is varied in the same image sensor 1. In FIG. (A1) and (A2) of FIG. 12 show an example of the waveform of the horizontal scanning control signal (horizontal synchronization signal). (B1) and (B2) of FIG. 12 show an example of the waveform of the clock signal after spectrum spreading by SSC. (C1) and (C2) of FIG. 12 show an example of frequency fluctuation (frequency trend) of the SSC. In (A1), (B1), (C1), (A2), (B2), and (C2) of FIG. 12, the horizontal axis indicates time. In (C1) and (C2) of FIG. 12, the vertical axis indicates frequency.

FIG. 12 shows a case where the 1H period and the SSC spreading period are the same. In (A1), (B1), and (C1) of FIG. 12, the 1H period is A(s). In (A2), (B2), and (C2) of FIG. 12, the 1H period is B(s). The magnitude relationship of the numerical values is A>B. As described above, the control circuit 42 of the 1H identification processing circuit 4 can recognize fluctuations in the 1H period based on at least the clock setting signal used for each circuit related to pixel scanning, and the SSC spreading period It is possible to output the SSC spreading period setting signal so that the desired period follows the dynamic change of the 1H period.

(evaluation)
FIG. 13 shows an example of performance evaluation in an actual machine of the technology according to one embodiment. FIG. 13A shows an example of the waveform of the horizontal scanning control signal (horizontal synchronization signal). (B) of FIG. 13 shows an example of the waveform of the fluctuation of the power supply voltage of the circuit to which the SSC is applied. Fluctuations in the power supply voltage are obtained by monitoring the power supply voltage outside the imaging device 1 . FIG. 13C shows an example of the waveform of the clock signal after spectrum spreading by SSC. FIG. 13D shows an example of SSC frequency fluctuation (frequency trend). In (A), (B), (C), and (D) of FIG. 13, the horizontal axis indicates time. In FIG. 13D, the vertical axis indicates frequency.

A horizontal scanning control signal representing the 1H period ((A) in FIG. 13) is output to the outside of the image pickup device 1 and sent to the host side controlling the image pickup device 1 for synchronization. On the other hand, by evaluating the conduction noise in the power supply line of the circuit to which the SSC is applied from outside the chip constituting the imaging device 1, it is possible to monitor the interval between the peak cycles of the power supply noise from outside the imaging device 1 (FIG. 13). of (B)). As a result, the trend of the SSC spread spectrum clock frequency can be known outside the imaging device 1 (the SSC spreading period can be known) ((D) in FIG. 13). In this way, the 1H period and the SSC diffusion period can be easily grasped outside the imaging device 1 . Therefore, it is possible to easily evaluate the performance of the technology according to the embodiment in an actual device outside the imaging device 1 .

FIG. 14 schematically shows an example of the relationship between the vertical scanning period (1V period) and 1H period and the SSC diffusion period. FIG. 14A shows an example of the waveform of the vertical scanning control signal (vertical synchronization signal). FIG. 14B shows an example of the waveform of the horizontal scanning control signal (horizontal synchronization signal). FIG. 14C shows an example of the waveform of the clock signal after spectrum spreading by SSC. FIG. 14D shows an example of SSC frequency fluctuation (frequency trend). In FIGS. 14A, 14B, 14C, and 14D, the horizontal axis indicates time. In (D) of FIG. 14, the vertical axis indicates frequency.

If the horizontal scanning signal ((B) in FIG. 14) is not output to the outside of the imaging device 1 and the vertical scanning signal (vertical synchronization signal) ((A) in FIG. 14) is output, then during the vertical scanning period Based on this, the same evaluation as in the case shown in FIG. 13 is possible. Also, even if the vertical scanning period is one frame period of the image sensor 1, the same evaluation as in the case shown in FIG. 13 is possible. In this case, the vertical scanning period can be obtained by multiplying the 1H period by the number of rows of pixels P of the image sensor 1 . Note that the number of lines conforms to the specifications of the imaging device 1 .

FIG. 15 schematically shows an example of the SSC spreading period when the 1H period varies within one frame period. FIG. 15A shows an example of the waveform of the vertical scanning control signal (vertical synchronization signal). FIG. 15B shows an example of the waveform of the horizontal scanning control signal (horizontal synchronization signal). FIG. 15C shows an example of the waveform of the clock signal after spectrum spreading by SSC. FIG. 15D shows an example of SSC frequency fluctuation (frequency trend). In FIGS. 15A, 15B, 15C, and 15D, the horizontal axis indicates time. In (D) of FIG. 15, the vertical axis indicates frequency.

When the 1H period fluctuates within one frame period, according to the technique according to one embodiment, the SSC spreading period also fluctuates following the fluctuation of the 1H period. For example, when the frequency of the input clock signal (external input clock signal INCK) of the image sensor 1 is changed, or when one frame period is controlled and changed from the outside, the 1H period is changed. In such a case, it is possible to verify whether or not the period of fluctuation of the power supply noise peak (equivalent to the SSC spreading period) is equal to the 1H period. Depending on the user who uses the image sensor 1, there is a possibility that the 1H period can be arbitrarily changed within one frame period, as shown in FIG. In the technique according to one embodiment, even if the 1H period dynamically changes within one frame period as shown in FIG. It is possible to make them the same. For example, when the change of the 1H period during the blanking period is externally controlled, only the processing of the 1H identification processing circuit 4 and the frequency division setting change of the SSC circuit 3 may be performed in the image sensor 1 . As a result, the SSC setting can be completed within several clocks, for example. In addition, in (D) of FIG. 15, the SSC spreading period is A>B.

Note that the effects described in this specification are merely examples and are not limited, and other effects may also occur. The same applies to the effects of other embodiments described below.

<2. Other Embodiments>
The technology according to the present disclosure is not limited to the description of the above embodiment, and various modifications are possible.

For example, the present technology can also have the following configuration.
According to the present technology having the following configuration, the horizontal scanning period for a plurality of pixels is recognized, and the spreading period of the spectrum spread by the spectrum spreading circuit is controlled so as to be a desired period with respect to the horizontal scanning period. . As a result, SSC can be favorably applied while suppressing image noise with low power consumption.

(1)
a spread spectrum circuit that spreads the spectrum of a clock signal used in at least one predetermined circuit in an imaging device having a plurality of pixels;
Control for recognizing the horizontal scanning period for the plurality of pixels and outputting a setting signal for controlling the spreading period of the spectrum spread by the spectrum spreading circuit so that the spreading period is a desired period for the horizontal scanning period. A clock control circuit comprising a circuit and a clock control circuit.
(2)
The clock control circuit according to (1) above, wherein the desired period is a period in which the horizontal scanning period and the diffusion period are the same, or a period in which the horizontal scanning period is an integral multiple of the diffusion period. .
(3)
The control circuit recognizes a dynamic change in the horizontal scanning period, and outputs the setting signal so that the diffusion period follows the dynamic change in the horizontal scanning period and becomes the desired period. The clock control circuit according to (1) or (2).
(4)
The control circuit recognizes a dynamic change in the horizontal scanning period during a blanking period of the horizontal scanning period, and outputs the setting signal following the dynamic change in the horizontal scanning period. ).
(5)
any one of the above (1) to (4), wherein the control circuit recognizes the horizontal scanning period based on a clock setting signal used in a circuit related to scanning of at least the plurality of pixels in the imaging element; The clock control circuit described in .
(6)
The control circuit includes a frequency division setting signal indicating a frequency division number of an input clock signal to the spread spectrum circuit with respect to an externally input clock signal, and a clock used for a circuit related to scanning of at least the plurality of pixels in the imaging device. The clock control circuit according to any one of (1) to (5) above, which recognizes the horizontal scanning period based on a setting signal.
(7)
a plurality of pixels;
at least one predetermined circuit;
a spread spectrum circuit that spreads the spectrum of a clock signal used in the at least one predetermined circuit;
Control for recognizing the horizontal scanning period for the plurality of pixels and outputting a setting signal for controlling the spreading period of the spectrum spread by the spectrum spreading circuit so that the spreading period is a desired period for the horizontal scanning period. An imaging device comprising a circuit and .

DESCRIPTION OF SYMBOLS 1... Imaging element 2... CLK system configuration circuit 3... SSC (Spread Spectrum Clocking) circuit (spread spectrum circuit) 4... 1H identification processing circuit 5... Mode register 10... Pixel array 11... Pixel drive part 12... Pixel reading unit 13... Pixel signal processing unit 14... Control unit 15... Clock control circuit 21... SSC non-application CLK circuit 22... SSC application CLK circuit 41... SSC spreading cycle setting memory 42... control circuit, INCK... external input clock (CLK) signal, P... pixel.

Claims (7)

a spread spectrum circuit that spreads the spectrum of a clock signal used in at least one predetermined circuit in an imaging device having a plurality of pixels;
Control for recognizing the horizontal scanning period for the plurality of pixels and outputting a setting signal for controlling the spreading period of the spectrum spread by the spectrum spreading circuit so that the spreading period is a desired period for the horizontal scanning period. A clock control circuit comprising a circuit and a clock control circuit. 2. The clock control circuit according to claim 1, wherein the desired period is a period in which the horizontal scanning period and the diffusion period are the same, or a period in which the horizontal scanning period is an integral multiple of the diffusion period. The control circuit recognizes a dynamic change in the horizontal scanning period and outputs the setting signal so that the diffusion period follows the dynamic change in the horizontal scanning period and becomes the desired period. Item 2. The clock control circuit according to item 1. 4. The control circuit recognizes a dynamic change in the horizontal scanning period during a blanking period of the horizontal scanning period, and outputs the setting signal following the dynamic change in the horizontal scanning period. The clock control circuit described in . 2. The clock control circuit according to claim 1, wherein the control circuit recognizes the horizontal scanning period based on a clock setting signal used for a circuit related to scanning of at least the plurality of pixels in the imaging element. The control circuit includes a frequency division setting signal indicating a frequency division number of an input clock signal to the spread spectrum circuit with respect to an externally input clock signal, and a clock used for a circuit related to scanning of at least the plurality of pixels in the imaging device. 2. The clock control circuit according to claim 1, wherein said horizontal scanning period is recognized based on a setting signal. a plurality of pixels;
at least one predetermined circuit;
a spread spectrum circuit that spreads the spectrum of a clock signal used in the at least one predetermined circuit;
Control for recognizing the horizontal scanning period for the plurality of pixels and outputting a setting signal for controlling the spreading period of the spectrum spread by the spectrum spreading circuit so that the spreading period is a desired period for the horizontal scanning period. An imaging device comprising a circuit and .

Images