JP2023111741A - Power conversion device, overheat determination device, and overheat determination method - Google Patents

Abstract

To determine the overheat of a semiconductor element with high accuracy.SOLUTION: A power conversion device includes: a semiconductor device including a semiconductor element with a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode; a voltage detection unit that detects voltage between both terminals of the first terminal and the second terminal; a current detection unit that detects current flowing between both terminals; and a control unit that controls switching of the semiconductor device. Based on the relation among the voltage in a conduction state between both terminals, the current flowing in the conduction state between both terminals, and the temperature of the semiconductor element, the control unit estimates the temperature corresponding to the voltage detected in the conduction state by the voltage detection unit and the current detected in the conduction state by the current detection unit, and when the estimated value of the temperature is over a predetermined threshold, it is determined that overheat occurs in the semiconductor element.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a power conversion device, an overheat determination device, and an overheat determination method.

Conventionally, the collector-emitter voltage Vce is measured when a constant collector current is flowing through the semiconductor element. A technique for determining closeness is known (see Patent Document 1, for example).

Japanese Unexamined Patent Application Publication No. 2011-200033

However, although the above-described conventional technique determines the life of the semiconductor element, it does not estimate the temperature of the semiconductor element, so it is difficult to accurately determine overheating of the semiconductor element.

The present disclosure provides a power conversion device, an overheat determination device, and an overheat determination method capable of accurately determining overheating of a semiconductor element.

In one aspect of the present disclosure,
A semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode. a semiconductor device;
a voltage detection unit that detects a voltage between both terminals of the first terminal and the second terminal;
a current detection unit that detects a current flowing between the terminals;
A control unit that controls switching of the semiconductor device,
The control unit detects the voltage between the terminals in the energized state, the current flowing between the terminals in the energized state, and the temperature of the semiconductor element by the voltage detection unit in the energized state. estimating the temperature corresponding to the detected voltage and the current detected in the energized state by the current detection unit, and determining that the semiconductor element is overheated when the estimated value of the temperature exceeds a predetermined threshold value. , a power converter is provided.

In another aspect of the present disclosure,
A semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode. a semiconductor device;
a voltage detection unit that detects a voltage between both terminals of the first terminal and the second terminal;
a current detection unit that detects a current flowing between the terminals;
the voltage detected by the voltage detection unit in the energized state based on the relationship between the voltage between the terminals in the energized state, the current flowing between the terminals in the energized state, and the temperature of the semiconductor element; an estimation unit for estimating the temperature corresponding to the current detected by the current detection unit in the energized state;
An overheat determination device is provided, comprising a determination unit that determines that the semiconductor element is overheated when the estimated value of the temperature exceeds a predetermined threshold.

In another aspect of the present disclosure,
A semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode. A method for determining overheating of a semiconductor device, comprising:
The voltage detection unit detects a voltage between both terminals of the first terminal and the second terminal,
The current detection unit detects a current flowing between the terminals,
The estimating unit detects the voltage detected by the voltage detecting unit in the energized state based on the relationship between the voltage between the terminals in the energized state, the current flowing between the terminals in the energized state, and the temperature of the semiconductor element. estimating the temperature corresponding to the voltage detected by the current detecting unit and the current detected in the energized state;
An overheat determination method is provided in which the determination unit determines that the semiconductor element is overheated when the estimated value of the temperature exceeds a predetermined threshold.

According to the present disclosure, it is possible to accurately determine overheating of a semiconductor element.

BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the structural example of the power converter device which concerns on 1st Embodiment. BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the structural example of the overheating determination apparatus which concerns on 1st Embodiment. 4 is a timing chart exemplifying waveforms of respective parts accompanying a detection operation of a voltage Vce1 in a state where both terminals of the semiconductor device are energized; It is a functional block diagram showing a first example of an overheating determination method. It is a figure which shows the cross-sectional structure example of the semiconductor device which concerns on 2nd Embodiment. It is a figure which shows the structural example of the overheating determination apparatus which concerns on 2nd Embodiment. FIG. 5 is a functional block diagram showing a second example of an overheating determination method; It is a figure which shows the structural example of the overheating determination apparatus which concerns on 3rd Embodiment. FIG. 11 is a functional block diagram showing a third example of an overheating determination method;

A power conversion device, an overheating determination device, and an overheating determination method according to the present embodiment will be described below.

Introduction of power converters to applications requiring reliability (such as power transmission and distribution facilities, or moving bodies such as trains and automobiles) is accelerating. Semiconductor devices such as power semiconductor modules are cited as one of the main failure factors of power converters. Semiconductor devices include semiconductor elements such as power semiconductor chips. Semiconductor devices fail when the absolute maximum rated temperature is exceeded due to overload or module deterioration. Therefore, estimating and monitoring the temperature of semiconductor devices leads to high reliability of the power converter.

As one method for estimating the temperature of a semiconductor device, we focus on the temperature dependence of the conduction resistance (voltage drop) of the semiconductor device, measure the voltage when the main terminals of the semiconductor device are energized, and measure the voltage. There is a method of estimating the temperature of the semiconductor element based on the value.

However, the voltage across the main terminals of a semiconductor device, such as between the collector and emitter, generally varies according to load conditions such as the load current flowing between the main terminals. Therefore, in the method of estimating the temperature of the semiconductor element based on the voltage measurement between the main terminals when a constant current is flowing, the accuracy of estimating the temperature of the semiconductor element decreases when the current flowing through the semiconductor element changes. However, it is difficult to accurately determine the overheating of the semiconductor element.

The power conversion device or the overheat determination device according to the present embodiment has a function capable of accurately determining overheating of a semiconductor element. In addition, the present disclosure provides an overheating determination method capable of accurately determining overheating of a semiconductor element.

<First embodiment>
FIG. 1 is a diagram showing a configuration example of a power converter according to this embodiment. The power conversion device 200 shown in FIG. 1 includes a main circuit unit 10 that converts DC power supplied from a DC power supply 33 into AC power that is supplied to a load 14, and control for controlling the power conversion operation of the main circuit unit 10. a part 20; FIG. 1 illustrates a form in which the main circuit unit 10 converts DC power into three-phase AC power.

The main circuit section 10 includes a plurality of power semiconductor modules 111-116, a plurality of voltage detection sections VD1-VD6, a plurality of gate drive sections PD1-PD6, and a current detection section 30. FIG. The power semiconductor modules 111 to 116 are examples of semiconductor devices for power conversion.

FIG. 1 illustrates, as a power semiconductor module, a 1-in-1 package IGBT module incorporating an IGBT chip for one arm of an inverter and a diode chip (FWD chip) connected in anti-parallel thereto. IGBT is an abbreviation for Insulated Gate Bipolar Transistor, an IGBT chip is an example of a power semiconductor device, and an FWD chip is an example of a rectifying device. However, the package configuration of the power semiconductor module may be another type of package configuration such as 6in1, and the power semiconductor element configured in the power semiconductor module may be another type of power semiconductor element such as MOSFET. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

The plurality of power semiconductor modules 111 to 116 may have the same configuration, the plurality of voltage detectors VD1 to VD6 may have the same configuration, and the plurality of gate drivers PD1 to PD6 may have the same configuration.

The u-phase upper arm power semiconductor module 111 has an IGBT chip Q1 and a FWD chip D1. The power semiconductor module 111 also has a collector terminal C, an emitter terminal E, a gate terminal G and an auxiliary emitter terminal Es. The collector terminal C is an example of a first terminal, the emitter terminal E is an example of a second terminal, the gate terminal G is an example of a control terminal, and the auxiliary emitter terminal Es is an example of an auxiliary terminal. .

The IGBT chip Q1 is an example of a switching element (semiconductor element) having a collector electrode 11c, an emitter electrode 11e and a gate electrode 11g. The collector electrode 11c is an example of a first main electrode, the emitter electrode 11e is an example of a second main electrode, and the gate electrode 11g is an example of a control electrode.

The FWD chip D1 is an example of a rectifying device (semiconductor device) having an anode electrode 11a and a cathode electrode 11k.

The collector terminal C is electrically connected to the collector electrode 11c and the cathode electrode 11k. The emitter terminal E is electrically connected to the emitter electrode 11e and the anode electrode 11a. The gate terminal G is electrically connected to the gate electrode 11g. The auxiliary emitter terminal Es is electrically connected to the emitter electrode 11e and the anode electrode 11a.

The u-phase lower arm power semiconductor module 112 has an IGBT chip Q2 and an FWD chip D2. The v-phase upper arm power semiconductor module 113 has an IGBT chip Q3 and an FWD chip D3. The v-phase lower arm power semiconductor module 114 has an IGBT chip Q4 and an FWD chip D4. The w-phase upper arm power semiconductor module 115 has an IGBT chip Q5 and an FWD chip D5. The w-phase lower arm power semiconductor module 116 has an IGBT chip Q6 and an FWD chip D6. The power semiconductor modules 112 to 116 have the same configuration as the power semiconductor module 111 described above.

The gate drive section PD1 is a circuit that drives the gate electrode 11g of the IGBT chip Q1 in accordance with an ON or OFF switching command S1 supplied from the control section 20. FIG. Similarly, the gate drive units PD2-PD6 are circuits that drive the gate electrodes 11g of the IGBT chips Q2-Q6 in accordance with ON/OFF switching commands S2-S6 supplied from the control unit 20, respectively. The gate drive units PD1-PD6 apply drive voltages between the gate terminal G and the auxiliary emitter terminal Es to switch the IGBT chips Q1-Q6 of the power semiconductor modules 111-116 in accordance with the switching commands S1-S6 from the control unit 20. This is the drive unit that applies the voltage.

Voltage detection circuit VD1 detects voltage Vce1 between collector terminal C and emitter terminal E of power semiconductor module 111 and transmits the detected value of Vce1 to control unit 20 . Similarly, voltage detection circuits VD2 to VD6 detect voltages Vce2 to Vce6 between collector terminals C and emitter terminals E of power semiconductor modules 112 to 116, and transmit detected values of Vce2 to Vce6 to control unit 20. .

The current detection unit 30 detects three-phase alternating currents iu, iv, and iw flowing between the power semiconductor modules 111 to 116 and the load 14, and transmits the detected values of the alternating currents iu, iv, and iw to the control unit 20. It is a current sensor that

The control unit 20 is, for example, a control device including a processor such as a CPU (Central Processing Unit) and a memory. The functions of the control unit 20 are implemented by the processor operating according to the programs stored in the memory. The functions of the control unit 20 may be realized by FPGA (Field Programmable Gate Array) or ASIC (Application Specific Integrated Circuit).

The main circuit section 10 may include a heat sink temperature detection section 80 . The heat sink temperature detection unit 80 is a temperature sensor that detects the temperature of heat sinks (for example, fins) for cooling the power semiconductor modules 111 to 116 and transmits the heat sink temperature detection value Th to the control unit 20 .

FIG. 2 is a diagram showing a configuration example of the overheating determination device according to the first embodiment. The overheat determination device 301 shown in FIG. 2 determines overheating of the semiconductor device 101 . FIG. 2 shows, for example, the circuit configuration for one arm of the inverter. In the case of the u-phase upper arm circuit configuration, the semiconductor device 101 corresponds to, for example, the power semiconductor module 111 described above. Since each arm has the same circuit configuration, the u-phase upper arm will be described below as an example unless otherwise specified.

The overheat determination device 301 includes a semiconductor device 101 , a gate driver 40 , a voltage detector 51 , a current detector 30 (see FIG. 1), and a controller 21 .

The gate drive unit 40 is a drive unit that applies a drive voltage for switching the IGBT chip Q1 of the semiconductor device 101 between the gate terminal G and the auxiliary emitter terminal Es of the semiconductor device 101 according to the switching command S from the control unit 21. be. The gate driving section 40 corresponds to, for example, the gate driving section PD1 described above.

Voltage detection unit 51 detects voltage Vce between collector terminal C and emitter terminal E of semiconductor device 101 and transmits the detected value of Vce to control unit 21 . The voltage detection unit 51 corresponds to, for example, the voltage detection circuit VD1 described above.

The control unit 21 generates a switching command S based on the detected values of the alternating currents iu, iv, and iw obtained from the current detection unit 30 (FIG. 1). The control unit 21 estimates the temperature of the IGBT chip Q1 or the FWD chip D1, and determines overheating based on the estimated value. The control unit 21 corresponds to, for example, the control unit 20 (FIG. 1) described above, but may be a control unit different from the control unit 20 .

A current Ic flows through the semiconductor device 101 . Regarding the sign of the current Ic, for example, the direction of flow from the collector terminal C to the emitter terminal E via the IGBT chip Q1 is positive, and the direction of flow from the emitter terminal E to the collector terminal C via the FWD chip D1 is negative. . In the case of an inverter, the control unit 21 determines in which direction the current Ic flows according to the state of the AC currents iu, iv, and iw acquired from the current detection unit 30 (FIG. 1) and the ON command or OFF command of the switching command. can determine whether

FIG. 3 is a timing chart exemplifying waveforms of respective parts accompanying the operation of detecting the voltage Vce1 in a state where both terminals of the semiconductor device are energized. In the illustrated example, iu is a sinusoidal current and the U-phase voltage command is a sinusoidal voltage. The ON state and OFF state of the U-phase upper and lower arms are determined by the magnitude relationship between the U-phase voltage command and the carrier wave. In the illustrated example, the control unit 20 outputs a switching command S1 to turn on Q1 and turn off Q2 during a period in which the U-phase voltage command is greater than the carrier wave. On the other hand, the control unit 20 outputs a switching command S1 to turn off Q1 and turn on Q2 during a period in which the U-phase voltage command is smaller than the carrier wave.

When Q1 is on and iu is positive, the same current as iu flows through Q1. When Q2 is off and iu is negative, the same current as iu flows through D1. For example, the detected value of the voltage Vce1 is transmitted from the voltage detection circuit VD1 to the control section 20 as a discrete value, and the detected value of the current iu is transmitted from the current detection section 30 to the control section 20 as a discrete value. In the illustrated example, the sampling timings of the voltage Vce1 and the current iu are each bottom of the carrier wave.

The control unit 20 samples, for example, the detected value of Vce1 detected by the voltage detection circuit VD1 at each bottom of the carrier wave. Thereby, the control unit 20 can obtain the detected value of the voltage Vce1 from the voltage detection circuit VD1 in the first energized state in which the current Ic from the collector terminal C to the emitter terminal E flows through the IGBT chip Q1. Further, the control unit 20 can obtain the detected value of the voltage Vce1 from the voltage detection circuit VD1 in the second energized state in which the current Ic flows from the emitter terminal E to the collector terminal C to the FWD chip D1.

The control unit 20 samples, for example, the detected value of the current iu detected by the current detection unit 30 at each bottom of the carrier wave. Thereby, the control unit 20 can obtain from the current detection unit 30 the detected value of the current Ic in the state (conducting state A) in which the current Ic flows from the collector terminal C to the emitter terminal E to the IGBT chip Q1. Further, the control unit 20 can obtain from the current detection unit 30 the detected value of the current Ic in the state (conducting state B) in which the current Ic flows from the emitter terminal E to the collector terminal C to the FWD chip D1.

The conducting state A and the conducting state B are conduction states in which a main current (current Ic in this example) flows between the first main terminal and the second main terminal of the semiconductor device. An energized state A is an example of a first energized state in which a current flows through the switching element from the first main terminal to the second main terminal of the semiconductor device. An energization state B is an example of a second energization state in which a current flows through the diode from the second main terminal of the semiconductor device to the first main terminal.

Note that the method of detecting the voltage Vce1 between the main terminals when the IGBT chip side or the FWD chip side anti-parallel thereto is in the ON state (conducting state) is not limited to this.

FIG. 4 is a functional block diagram showing a first example of an overheating determination method executed by the control unit. The functions shown in FIG. 4 may be realized only by hardware resources such as circuits, or may be realized by cooperation between hardware resources and software. The control unit 21 has an estimation unit 61 and a determination unit 62 .

The estimation unit 61 has a relationship (relationship X1) between the voltage Vce in the energized state A, the current Ic in the energized state A, and the temperature Tj of the IGBT chip Q1. Relationship X1 may be defined by a map or an arithmetic expression. Data for defining the relationship X1 is stored in memory in advance.

Based on the relationship X1, the estimating unit 61 detects the voltage detected by the voltage detecting unit 51 in the energized state A (Vce,det) and the current detected by the current detecting unit 30 in the energized state A (Ic Estimate the temperature Tj corresponding to the detected value). As a result, even when the semiconductor device 101 operates in which one or both of the voltage Vce and the current Ic fluctuate, the estimation unit 61 can accurately estimate the temperature Tj of the IGBT chip Q1 corresponding to an arbitrary voltage Vce and an arbitrary current Ic. can. The estimator 61 outputs an estimated value Tj,est of the temperature Tj of the IGBT chip Q1.

When the estimated value Tj,est of the temperature Tj of the IGBT chip Q1 exceeds a predetermined first overheat determination threshold value, the determination unit 62 determines that the IGBT chip Q1 is overheated, and issues an alarm notifying of the overheating of the IGBT chip Q1. . The first overheat determination threshold is set to, for example, the absolute maximum rated temperature of the IGBT chip Q1. Since the determination unit 62 uses the estimated value Tj,est derived with high accuracy by the estimation unit 61 based on the relationship X1 to determine overheating of the IGBT chip Q1, it is possible to accurately determine overheating of the IGBT chip Q1.

The estimation unit 61 has a relationship (relationship Y1) between the voltage Vce in the energized state B, the current Ic in the energized state B, and the temperature Tj of the FWD chip D1. Relationship Y1 may be defined by a map or an arithmetic expression. Data for defining the relationship Y1 are stored in memory in advance.

Based on the relationship Y1, the estimating unit 61 detects the voltage detected by the voltage detecting unit 51 in the energized state B (Vce, det) and the current detected by the current detecting unit 30 in the energized state B (Ic Estimate the temperature Tj corresponding to the detected value). As a result, even when the semiconductor device 101 operates in which one or both of the voltage Vce and the current Ic fluctuate, the estimation unit 61 can accurately estimate the temperature Tj of the FWD chip D1 corresponding to an arbitrary voltage Vce and an arbitrary current Ic. can. The estimation unit 61 outputs an estimated value Tj,est of the temperature Tj of the FWD chip D1.

When the estimated value Tj,est of the temperature Tj of the FWD chip D1 exceeds a predetermined second overheating determination threshold value, the determination unit 62 determines that the FWD chip D1 is overheated, and issues an alarm that informs of the overheating of the FWD chip D1. . The second overheat determination threshold is set to, for example, the absolute maximum rated temperature of the FWD chip D1. Since the determination unit 62 uses the estimated value Tj,est derived with high accuracy based on the relationship Y1 by the estimation unit 61 to determine overheating of the FWD chip D1, it is possible to accurately determine overheating of the FWD chip D1.

The control unit 21 can prevent the failure of the semiconductor device 101 by reducing or stopping the output of the power conversion device 200 in response to the overheat alarm of the IGBT chip Q1 or the FWD chip D1.

<Second embodiment>
FIG. 5 is a diagram showing a cross-sectional structure example of a semiconductor device according to the second embodiment. In addition, in the second embodiment, descriptions of the same configurations, actions, and effects as those of the above-described embodiments will be omitted or simplified by citing the above-described descriptions. Moreover, the structure illustrated in FIG. 5 is also applicable to the first embodiment.

A semiconductor device 102 shown in FIG. 5 is fixed in contact with a heat sink 1 such as a fin via thermal grease 2 . Thermal grease 2 stabilizes heat radiation from semiconductor device 102 to heat sink 1 . The semiconductor device 102 includes a case 7, an insulating substrate 5, a collector terminal E, an emitter terminal E, an auxiliary emitter terminal Es, a gate terminal G, an IGBT chip Q1, an FWD chip D1, and wires 15, 16, 17, 18.

The case 7 is a housing that accommodates each component of the semiconductor device 102, and has the base substrate 3 on its bottom. The base substrate 3 supports each component of the semiconductor device 102 thereon. As the base substrate 3, a copper (Cu) substrate, an aluminum-silicon carbide composite (Al—SiC) substrate, or the like with high heat dissipation can be adopted. Alternatively, the case 7 may be formed by separately forming the base substrate 3 forming the bottom portion of the case 7 and the frame forming the side portions, and erecting the frame on the peripheral edge of the base substrate 3 . good.

The case 7 has a flat lid. The lid is placed on the side of the case 7 to enclose each component of the semiconductor device 102 inside the case 7 .

The insulating substrate 5 is a substrate on which the IGBT chip Q1 and the FWD chip D1 are mounted, and can employ, for example, a DCB (Direct Copper Bonding) substrate, an AMB (Active Metal Blazing) substrate, or the like. The insulating substrate 5 is fixed onto the base substrate 3 via a bonding material 4 such as solder.

The insulating substrate 5 includes an insulating layer 5a, a conductor layer 5b, and a wiring layer 5c. The insulating layer 5a is, for example, a ceramic plate. The conductor layer 5b is provided on the lower surface of the insulating layer 5a, and is a metal foil made of a conductive metal such as copper, for example. The conductor layer 5b contacts the base substrate 3 via a bonding material 4 such as solder. The wiring layer 5c is provided on the upper surface of the insulating layer 5a, and is a conductor layer formed of a conductive metal such as copper, for example. The wiring layer 5c includes conductor patterns 5c1, 5c2, 5c3 and 5c4.

The IGBT chip Q1 is a semiconductor element incorporated in the semiconductor device 102, and is a semiconductor switching element having electrodes on the front surface 12 and the back surface 13, respectively. The IGBT chip Q1 may be either a Si semiconductor element or a SiC semiconductor element.

The IGBT chip Q1 has a front surface 12 on which an emitter electrode 11e and a gate electrode 11g are formed, and a rear surface 13 on which a collector electrode 11c is formed. Collector electrode 11c is an example of a first main electrode of IGBT chip Q1. Emitter electrode 11e is an example of a second main electrode of IGBT chip Q1. Gate electrode 11g is an example of a control electrode that IGBT chip Q1 has. The IGBT chip Q1 is fixed on the insulating substrate 5 at the rear surface 13 by bonding the collector electrode 11c to the conductor pattern 5c4 with a bonding material 6 such as solder.

The FWD chip D1 is a semiconductor element incorporated in the semiconductor device 102, and is a semiconductor diode element having electrodes on the front surface 8 and the back surface 9 respectively. The FWD chip D1 may be either a Si semiconductor element or a SiC semiconductor element.

The FWD chip D1 has a front surface 8 on which an anode electrode 11a is formed and a rear surface 9 on which a cathode electrode 11k is formed. The FWD chip D1 is fixed on the insulating substrate 5 on the back surface 9 by bonding the cathode electrode 11k to the conductor pattern 5c4 with a bonding material 6 such as solder. Cathode electrode 11k is electrically connected to collector electrode 11c by conductor pattern 5c4.

A collector terminal C, an emitter terminal E, a gate terminal G, and an auxiliary emitter terminal Es are external terminals for connecting the semiconductor device 102 to the outside. Each of these external terminals is made of a conductive metal such as copper or aluminum and formed into a cylindrical shape or a flat plate shape.

The collector terminal C is a main terminal erected on the conductor pattern 5c4. The collector terminal C is electrically connected to the collector electrode 11c and the cathode electrode 11k through the conductor pattern 5c4.

The emitter terminal E is a main terminal erected on the conductor pattern 5c1. The emitter terminal E is electrically connected to the emitter electrode 11e via the conductor pattern 5c1 and the wire 15, and electrically connected to the anode electrode 11a via the wire 18. As shown in FIG.

The gate terminal G is a control terminal erected on the conductor pattern 5c3. The gate terminal G is electrically connected to the gate electrode 11g via the conductor pattern 5c3 and the wire 17. As shown in FIG.

The auxiliary emitter terminal Es is a gate drive auxiliary terminal erected on the conductor pattern 5c2. The auxiliary emitter terminal Es is electrically connected to the emitter electrode 11e via the conductor pattern 5c2 and the wire 16. As shown in FIG.

The wires 15 to 18 are bonding wires formed with a diameter of 300 to 500 μm using, for example, a conductive metal such as copper or aluminum or a conductive alloy such as an iron-aluminum alloy. The wire 15 is one or more (for example, four) linear members that connect the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, to the conductor pattern 5c1. The wire 16 is one or more (for example, one) linear member that connects the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, to the conductor pattern 5c2. The wire 17 is one or more (for example, one) linear member that connects the gate electrode 11g, which is the surface electrode of the IGBT chip Q1, to the conductor pattern 5c3. The wire 18 is one or more (for example, four) linear members that connect between the emitter electrode 11e, which is the surface electrode of the IGBT chip Q1, and the anode electrode 11a, which is the surface electrode of the FWD chip D1. Wire 15 is an example of a first wire or main wire. Wire 16 is an example of a second wire or an auxiliary wire.

Current Ic flows through wires 15 and 18 but not through wires 16 and 17. FIG. A current Ic flowing into the semiconductor device 102 from the collector terminal C flows through the conductor pattern 5c4 and the bonding material 6 to the collector electrode 11c and passes through the IGBT chip Q1. A current Ic output from the emitter electrode e flows to the emitter terminal E via the wire 15 and the conductor pattern 5c1. Conversely, the current Ic flowing into the semiconductor device 102 from the emitter terminal E flows through the conductor pattern 5c1 and the wires 15 and 18 to the anode electrode 11a and passes through the FWD chip D1. A current Ic output from the cathode electrode 11k flows to the collector electrode C via the bonding material 6 and the conductor pattern 5c4.

The IGBT chip Q1 and the FWD chip D1 are thermally connected in the order of the bonding material 6, the insulating substrate 5, the bonding material 4, the base substrate 3, the thermal grease 2 and the heat sink 1, respectively. Each chip is cooled by radiating heat from the heat sink 1 to the outside air.

It is known that the semiconductor device 102 deteriorates due to repeated heat generated by current flowing in each chip and switching. The main deteriorated parts include wire joints between wires and chips or wiring patterns, joint materials 4 and 6 such as solder under chips, and the like. Deterioration of wire joints mainly increases electrical resistance, and deterioration of bonding materials such as solder under the chip mainly increases thermal resistance. The thermal grease 2 deteriorates as the temperature of the semiconductor device 102 or the heat sink 1 changes. As the thermal grease 2 deteriorates, the thermal resistance increases. The thermal resistance of the heat sink 1 increases due to clogging of the fins, failure of the blower fan, and the like.

FIG. 6 is a diagram showing a configuration example of an overheating determination device according to the second embodiment. The overheat determination device 302 shown in FIG. 6 determines overheating of the semiconductor device 102 . FIG. 6 shows, for example, the circuit configuration for one arm of the inverter. In the second embodiment, descriptions of configurations, actions, and effects similar to those of the above embodiments will be omitted or simplified by citing the above descriptions. FIG. 6 shows the electric resistance component Rs of the bonding material 6 (see FIG. 5) between the collector terminal C and the collector electrode 11c and the wire 15 (see FIG. 5) between the emitter terminal E and the emitter electrode 11e. An electrical resistance component Rw is shown.

When the electrical resistance component Rw of the junction of the wire 15 increases due to deterioration due to thermal stress, the detected value Vce,det of the voltage Vce between the collector terminal C and the emitter terminal E increases. As a result, if the chip temperature Tj is directly estimated from Vce,det, the estimation accuracy of the temperature Tj is lowered. The overheat determination device 302 according to the second embodiment suppresses deterioration in the estimation accuracy of the temperature Tj due to deterioration of the wire joint (increase in the electrical resistance component Rw), and accurately determines overheating of the semiconductor element. .

An overheat determination device 302 shown in FIG. 6 includes a semiconductor device 102 , a gate drive section 40 , a voltage detection section 52 , a current detection section 30 (see FIG. 1 ), and a control section 22 .

The voltage detection unit 52 detects the voltage Vce between the collector terminal C and the emitter terminal E and the voltage Vee between the auxiliary emitter terminal Es and the emitter terminal E, and outputs the detected value of Vce and the detected value of Vee to the control unit. 22. Voltage Vce is an example of a first voltage between the first main terminal and the second main terminal. Voltage Vee is an example of a second voltage between the auxiliary terminal and the second main terminal.

FIG. 7 is a functional block diagram showing a second example of the overheating determination method executed by the controller. The functions shown in FIG. 7 may be realized only by hardware resources such as circuits, or may be realized by cooperation between hardware resources and software. The control unit 22 has an estimation unit 63 and a determination unit 62 .

The estimation unit 63 has a relationship (relationship X2) between the differential voltage (Vce-Vee) in the energized state A, the current Ic in the energized state A, and the temperature Tj of the IGBT chip Q1. The differential voltage (Vce-Vee) in the energized state A represents a value obtained by subtracting the voltage Vee in the energized state A from the voltage Vce in the energized state A. FIG. Relationship X2 may be defined by a map or an arithmetic expression. Data for defining the relationship X2 are stored in memory in advance.

The estimating unit 63 calculates the voltage (detected value Vee,det of Vee) detected by the voltage detecting unit 52 in the energized state A from the voltage (detected value Vce,det of Vce) detected by the voltage detecting unit 52 in the energized state A. is subtracted, the detected value (Vce,det-Vee,det) of the differential voltage in the energized state A is calculated. Based on the relationship X2, the estimating unit 63 detects the difference voltage (Vce, det-Vee, det) in the energized state A and the current (Ic detected value) detected in the energized state A by the current detecting unit 30 Estimate the temperature Tj corresponding to As a result, even when the semiconductor device 101 operates in which one or both of the voltage Vce and the current Ic fluctuate, the estimating unit 63 can accurately estimate the temperature Tj of the IGBT chip Q1 corresponding to an arbitrary voltage Vce and an arbitrary current Ic. can. In addition, the estimation unit 63 uses the differential voltage (Vce-Vee) and its detected value (Vce, det-Vee, det) in the energized state A to reduce the accuracy of the temperature Tj due to changes in the electrical resistance component Rw. can be suppressed. The estimator 63 outputs an estimated value Tj,est of the temperature Tj of the IGBT chip Q1.

Since the determination unit 62 uses the estimated value Tj,est derived with high accuracy based on the relationship X2 by the estimation unit 63 to determine overheating of the IGBT chip Q1, it is possible to accurately determine overheating of the IGBT chip Q1.

The estimation unit 63 has a relationship (relationship Y2) between the differential voltage (Vce-Vee) in the energized state B, the current Ic in the energized state B, and the temperature Tj of the FWD chip D1. The differential voltage (Vce-Vee) in the energized state B represents a value obtained by subtracting the voltage Vee in the energized state B from the voltage Vce in the energized state B. FIG. Relationship Y2 may be defined by a map or an arithmetic expression. Data for defining the relationship Y2 are stored in memory in advance.

The estimating unit 63 calculates the voltage (detected value Vee,det of Vee) detected by the voltage detecting unit 52 in the energized state B from the voltage (detected value Vce,det of Vce) detected by the voltage detecting unit 52 in the energized state B. is subtracted, the detected value (Vce,det-Vee,det) of the differential voltage in the energized state B is calculated. Based on the relationship Y2, the estimating unit 63 detects the difference voltage (Vce, det-Vee, det) in the energized state B and the current (Ic detected value) detected by the current detecting unit 30 in the energized state B Estimate the temperature Tj corresponding to As a result, even when the semiconductor device 102 operates in which one or both of the voltage Vce and the current Ic fluctuate, the estimator 63 can accurately estimate the temperature Tj of the FWD chip D1 corresponding to an arbitrary voltage Vce and an arbitrary current Ic. can. In addition, the estimating unit 63 uses the differential voltage (Vce-Vee) and its detected value (Vce, det-Vee, det) in the energized state B to reduce the accuracy of the temperature Tj due to changes in the electrical resistance component Rw. can be suppressed. The estimation unit 63 outputs an estimated value Tj,est of the temperature Tj of the FWD chip D1.

Since the determination unit 62 uses the estimated value Tj,est derived with high accuracy based on the relationship Y2 by the estimation unit 63 to determine overheating of the FWD chip D1, it is possible to accurately determine overheating of the FWD chip D1.

<Third Embodiment>
FIG. 8 is a diagram showing a configuration example of an overheating determination device according to the third embodiment. An overheat determination device 303 shown in FIG. 8 determines overheating of the semiconductor device 102 . FIG. 8 shows, for example, the circuit configuration for one arm of the inverter. In the third embodiment, descriptions of configurations, actions, and effects similar to those of the above embodiments will be omitted or simplified by citing the above descriptions.

In the second embodiment, the voltage detection unit 52 detects the voltage Vce between the collector terminal C and the emitter terminal E when the semiconductor device 102 is on, and the auxiliary emitter terminal Es and the emitter when the semiconductor device 102 is on. Voltage Vee between terminal E is detected. Then, the control unit 22 estimates the chip temperature based on the difference between the detected value of the voltage Vce and the detected value of the voltage Vee. On the other hand, in the third embodiment, the voltage detection unit 53 directly detects the voltage Vces between the collector terminal C and the auxiliary emitter terminal Es when the semiconductor device 102 is in the ON state. Then, the control unit 23 estimates the chip temperature based on the detected value of the voltage Vces using the same algorithm as in the second embodiment.

An overheat determination device 303 shown in FIG. 8 includes a semiconductor device 102, a gate drive section 40, a voltage detection section 53, a current detection section 30 (see FIG. 1), and a control section .

The voltage detection unit 53 detects the voltage Vces between the collector terminal C and the auxiliary emitter terminal Es, and transmits the detected value of Vces to the control unit 23 . Voltage Vces is an example of a third voltage between the first main terminal and the auxiliary terminal.

FIG. 9 is a functional block diagram showing a third example of the overheating determination method executed by the controller. The functions shown in FIG. 9 may be realized only by hardware resources such as circuits, or may be realized by cooperation between hardware resources and software. The control unit 23 has an estimation unit 64 and a determination unit 62 .

The estimation unit 64 has a relationship (relationship X3) between the voltage Vces in the energized state A, the current Ic in the energized state A, and the temperature Tj of the IGBT chip Q1. Relationship X3 may be defined by a map or an arithmetic expression. Data for defining the relationship X3 are stored in advance in the memory.

Based on the relationship X3, the estimating unit 64 detects the voltage detected by the voltage detecting unit 53 in the energized state A (Vces,det) and the current detected by the current detecting unit 30 in the energized state A (Ic Estimate the temperature Tj corresponding to the detected value). As a result, even when the semiconductor device 102 operates in which one or both of the voltage Vce and the current Ic fluctuate, the estimating unit 64 can accurately estimate the temperature Tj of the IGBT chip Q1 corresponding to an arbitrary voltage Vce and an arbitrary current Ic. can. In addition, the estimator 64 uses the voltage Vces and its detected value (Vces, det) in the energized state A, thereby suppressing deterioration in accuracy of the temperature Tj due to changes in the electrical resistance component Rw. The estimator 64 outputs an estimated value Tj,est of the temperature Tj of the IGBT chip Q1.

Since the determination unit 62 uses the estimated value Tj,est highly accurately derived by the estimation unit 64 based on the relationship X3 to determine overheating of the IGBT chip Q1, it is possible to accurately determine overheating of the IGBT chip Q1.

The estimation unit 64 has a relationship (relationship Y3) between the voltage Vces in the energized state B, the current Ic in the energized state B, and the temperature Tj of the FWD chip D1. Relationship Y3 may be defined by a map or an arithmetic expression. Data for defining the relationship Y3 are stored in memory in advance.

Based on the relationship Y3, the estimating unit 64 detects the voltage detected by the voltage detecting unit 53 in the energized state B (Vces,det) and the current detected by the current detecting unit 30 in the energized state B (Ic Estimate the temperature Tj corresponding to the detected value). As a result, even when the semiconductor device 102 operates in which one or both of the voltage Vce and the current Ic fluctuate, the estimation unit 64 can accurately estimate the temperature Tj of the FWD chip D1 corresponding to an arbitrary voltage Vce and an arbitrary current Ic. can. In addition, the estimating unit 64 uses the voltage Vces in the energized state B and the detected values Vces,det thereof, thereby suppressing deterioration in the accuracy of the temperature Tj due to changes in the electrical resistance component Rw. The estimation unit 64 outputs an estimated value Tj,est of the temperature Tj of the FWD chip D1.

Since the determination unit 62 uses the estimated value Tj,est derived with high accuracy based on the relationship Y3 by the estimation unit 64 to determine overheating of the FWD chip D1, it is possible to accurately determine overheating of the FWD chip D1.

Although the embodiments have been described above, the present invention is not limited to the above embodiments. Various modifications and improvements such as combination or replacement with part or all of other embodiments are possible.

For example, semiconductor elements are not limited to power transistors such as IGBTs, but may be diodes, thyristors, gate turn-off thyristors, triacs, and the like.

Reference Signs List 1 heat sink 2 thermal grease 3 base substrate 4, 6 bonding material 5 insulating substrate 7 case 8 front surface 9 rear surface 10 main circuit section 11a anode electrode 11c collector electrode 11e emitter electrode 11g gate electrode 11k cathode electrode 12 front surface 13 rear surface 14 load 15-18 Wires 20, 21, 22, 23 Control Unit 30 Current Detector 33 Power Supply 40 Gate Drive 51, 52, 53 Voltage Detector 61, 63, 64 Estimation Unit 62 Determination Unit 101, 102 Semiconductor Devices 111 to 116 Power Semiconductor Module 200 Power conversion device 301, 302, 303 Overheat determination device C Collector terminal E Emitter terminal Es Auxiliary emitter terminal G Gate terminal

Claims (7)

A semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode. a semiconductor device;
a voltage detection unit that detects a voltage between both terminals of the first terminal and the second terminal;
a current detection unit that detects a current flowing between the terminals;
A control unit that controls switching of the semiconductor device,
The control unit detects the voltage between the terminals in the energized state, the current flowing between the terminals in the energized state, and the temperature of the semiconductor element by the voltage detection unit in the energized state. estimating the temperature corresponding to the detected voltage and the current detected in the energized state by the current detection unit, and determining that the semiconductor element is overheated when the estimated value of the temperature exceeds a predetermined threshold value. , power converter. The second terminal includes a main terminal electrically connected to the second main electrode via a first wire and an auxiliary terminal electrically connected to the second main electrode via a second wire. including
The voltage detection unit detects a first voltage between the first terminal and the main terminal and a second voltage between the auxiliary terminal and the main terminal,
The current detection unit detects a main current flowing between the first terminal and the main terminal,
The control unit controls a difference voltage between the first voltage in the conducting state through which the main current flows and the second voltage in the conducting state, the main current in the conducting state, and the temperature of the semiconductor element. Based on the relationship, the difference voltage between the first voltage detected by the voltage detection unit in the conductive state and the second voltage detected by the voltage detection unit in the conductive state, and the current detection unit The power according to claim 1, wherein the temperature corresponding to the main current detected in the conductive state is estimated, and overheating of the semiconductor element is determined when the estimated value of the temperature exceeds the predetermined threshold. conversion device. The second terminal includes a main terminal electrically connected to the second main electrode via a first wire and an auxiliary terminal electrically connected to the second main electrode via a second wire. including
The voltage detection unit detects a third voltage between the first terminal and the auxiliary terminal,
The current detection unit detects a main current flowing between the first terminal and the main terminal,
The control unit controls the voltage detecting unit to detect the conductive state based on the relationship between the third voltage in the conductive state through which the main current flows, the main current in the conductive state, and the temperature of the semiconductor element. estimating the temperature corresponding to the third voltage detected by the current detection unit and the main current detected in the conducting state by the current detection unit, and if the estimated value of the temperature exceeds the predetermined threshold, the semiconductor 2. The power converter according to claim 1, wherein overheating of the element is determined. The semiconductor device has a control terminal electrically connected to a control electrode of the semiconductor element,
4. The power converter according to claim 2, further comprising a driving section that applies a driving voltage for switching said semiconductor device between said control terminal and said auxiliary terminal in accordance with a command from said control section. The semiconductor element includes a switching element and a diode connected in anti-parallel to the switching element,
A state in which the current from the first terminal to the second terminal flows through the switching element is defined as a first conduction state, and a state in which the current from the second terminal to the first terminal flows through the diode is defined as a second conduction state. When the state is
The control unit
Based on the relationship between the voltage in the first energized state, the current in the first energized state, and the temperature of the switching element, the voltage and A current detection unit estimates the temperature of the switching element corresponding to the current detected in the first energized state, and when the estimated value of the temperature of the switching element exceeds a predetermined first threshold, the switching element judged to be overheated,
The voltage and the current detected by the voltage detector in the second energized state based on the relationship between the voltage in the second energized state, the current in the second energized state, and the temperature of the diode. estimating the temperature of the diode corresponding to the current detected by the detection unit in the second energized state, and determining that the diode is overheated when the estimated value of the temperature of the diode exceeds a predetermined second threshold; The power converter according to any one of claims 1 to 4. A semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode. a semiconductor device;
a voltage detection unit that detects a voltage between both terminals of the first terminal and the second terminal;
a current detection unit that detects a current flowing between the terminals;
the voltage detected by the voltage detection unit in the energized state based on the relationship between the voltage between the terminals in the energized state, the current flowing between the terminals in the energized state, and the temperature of the semiconductor element; an estimation unit for estimating the temperature corresponding to the current detected by the current detection unit in the energized state;
and a determination unit that determines that the semiconductor element is overheated when the estimated value of the temperature exceeds a predetermined threshold value. A semiconductor element having a first main electrode and a second main electrode, a first terminal electrically connected to the first main electrode, and a second terminal electrically connected to the second main electrode. A method for determining overheating of a semiconductor device, comprising:
The voltage detection unit detects a voltage between both terminals of the first terminal and the second terminal,
The current detection unit detects a current flowing between the terminals,
The estimating unit detects the voltage detected by the voltage detecting unit in the energized state based on the relationship between the voltage between the terminals in the energized state, the current flowing between the terminals in the energized state, and the temperature of the semiconductor element. estimating the temperature corresponding to the voltage detected by the current detection unit and the current detected in the energized state by the current detection unit;
The overheat determination method, wherein the determination unit determines that the semiconductor element is overheated when the estimated value of the temperature exceeds a predetermined threshold.

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