JP2023008554A - 電子制御装置 - Google Patents

電子制御装置 Download PDF

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Publication number
JP2023008554A
JP2023008554A JP2021112210A JP2021112210A JP2023008554A JP 2023008554 A JP2023008554 A JP 2023008554A JP 2021112210 A JP2021112210 A JP 2021112210A JP 2021112210 A JP2021112210 A JP 2021112210A JP 2023008554 A JP2023008554 A JP 2023008554A
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JP
Japan
Prior art keywords
abnormality
processing
graph
information
control function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2021112210A
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English (en)
Japanese (ja)
Inventor
智泰 太田
Tomoyasu Ota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP2021112210A priority Critical patent/JP2023008554A/ja
Priority to DE102022116017.3A priority patent/DE102022116017A1/de
Publication of JP2023008554A publication Critical patent/JP2023008554A/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G06F11/0724—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU] in a multiprocessor or a multi-core unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP2021112210A 2021-07-06 2021-07-06 電子制御装置 Pending JP2023008554A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2021112210A JP2023008554A (ja) 2021-07-06 2021-07-06 電子制御装置
DE102022116017.3A DE102022116017A1 (de) 2021-07-06 2022-06-28 Elektronische steuerungsvorrichtung

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2021112210A JP2023008554A (ja) 2021-07-06 2021-07-06 電子制御装置

Publications (1)

Publication Number Publication Date
JP2023008554A true JP2023008554A (ja) 2023-01-19

Family

ID=84534340

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021112210A Pending JP2023008554A (ja) 2021-07-06 2021-07-06 電子制御装置

Country Status (2)

Country Link
JP (1) JP2023008554A (de)
DE (1) DE102022116017A1 (de)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016126426A (ja) 2014-12-26 2016-07-11 三星電子株式会社Ｓａｍｓｕｎｇ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． マルチコアシステム、マルチコアプロセッサ、並列処理方法及び並列処理制御プログラム

Also Published As

Publication number Publication date
DE102022116017A1 (de) 2023-01-12

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