JP2022534438A5 - - Google Patents

Info

Publication number
JP2022534438A5
JP2022534438A5 JP2021571386A JP2021571386A JP2022534438A5 JP 2022534438 A5 JP2022534438 A5 JP 2022534438A5 JP 2021571386 A JP2021571386 A JP 2021571386A JP 2021571386 A JP2021571386 A JP 2021571386A JP 2022534438 A5 JP2022534438 A5 JP 2022534438A5
Authority
JP
Japan
Prior art keywords
state
processor
encapsulated
identifier
context state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021571386A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022534438A (ja
JP7402897B2 (ja
Filing date
Publication date
Priority claimed from US16/426,613 external-priority patent/US11169811B2/en
Application filed filed Critical
Publication of JP2022534438A publication Critical patent/JP2022534438A/ja
Publication of JP2022534438A5 publication Critical patent/JP2022534438A5/ja
Application granted granted Critical
Publication of JP7402897B2 publication Critical patent/JP7402897B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2021571386A 2019-05-30 2020-05-29 グラフィックスコンテキストバウンシング Active JP7402897B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/426,613 2019-05-30
US16/426,613 US11169811B2 (en) 2019-05-30 2019-05-30 Graphics context bouncing
PCT/US2020/035203 WO2020243482A1 (en) 2019-05-30 2020-05-29 Graphics context bouncing

Publications (3)

Publication Number Publication Date
JP2022534438A JP2022534438A (ja) 2022-07-29
JP2022534438A5 true JP2022534438A5 (enExample) 2023-05-31
JP7402897B2 JP7402897B2 (ja) 2023-12-21

Family

ID=73550703

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2021571386A Active JP7402897B2 (ja) 2019-05-30 2020-05-29 グラフィックスコンテキストバウンシング

Country Status (6)

Country Link
US (1) US11169811B2 (enExample)
EP (1) EP3977270A4 (enExample)
JP (1) JP7402897B2 (enExample)
KR (1) KR102682383B1 (enExample)
CN (1) CN113939843A (enExample)
WO (1) WO2020243482A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11694384B2 (en) * 2020-10-30 2023-07-04 Qualcomm Incorporated Fast incremental shared constants
US12137081B2 (en) * 2021-09-09 2024-11-05 Texas Instruments Incorporated Resource access in a microcontroller
US12406321B2 (en) * 2023-02-27 2025-09-02 Qualcomm Incorporated Elimination cache
US20240378790A1 (en) * 2023-05-09 2024-11-14 Advanced Micro Devices, Inc. Pipelined graphics state management
WO2025058851A1 (en) * 2023-09-13 2025-03-20 Qualcomm Incorporated Context merge with global event and dead draw merge
US20250299286A1 (en) * 2024-03-22 2025-09-25 Arm Limited Graphics processing systems

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050195186A1 (en) * 2004-03-02 2005-09-08 Ati Technologies Inc. Method and apparatus for object based visibility culling
JP5631535B2 (ja) * 2005-02-08 2014-11-26 オブロング・インダストリーズ・インコーポレーテッド ジェスチャベースの制御システムのためのシステムおよび方法
US7545381B2 (en) * 2005-11-10 2009-06-09 Via Technologies, Inc. Interruptible GPU and method for context saving and restoring
US7634637B1 (en) * 2005-12-16 2009-12-15 Nvidia Corporation Execution of parallel groups of threads with per-instruction serialization
US8370383B2 (en) 2006-02-08 2013-02-05 Oblong Industries, Inc. Multi-process interactive systems and methods
US7979683B1 (en) 2007-04-05 2011-07-12 Nvidia Corporation Multiple simultaneous context architecture
US8593465B2 (en) * 2007-06-13 2013-11-26 Advanced Micro Devices, Inc. Handling of extra contexts for shader constants
US8736624B1 (en) * 2007-08-15 2014-05-27 Nvidia Corporation Conditional execution flag in graphics applications
US8139070B1 (en) * 2007-10-03 2012-03-20 Matrox Graphics, Inc. Systems for and methods of context switching in a graphics processing system
US9003389B2 (en) * 2010-05-25 2015-04-07 Red Hat, Inc. Generating an encoded package profile based on executing host processes
US9086813B2 (en) * 2013-03-15 2015-07-21 Qualcomm Incorporated Method and apparatus to save and restore system memory management unit (MMU) contexts
US9563466B2 (en) 2013-11-05 2017-02-07 Intel Corporation Method and apparatus for supporting programmable software context state execution during hardware context restore flow
CN105469354A (zh) 2014-08-25 2016-04-06 超威半导体公司 图形处理方法、系统和设备
US10437637B1 (en) * 2015-05-26 2019-10-08 Thin CI, Inc. Configurable scheduler for graph processing on multi-processor computing systems
US11416282B2 (en) * 2015-05-26 2022-08-16 Blaize, Inc. Configurable scheduler in a graph streaming processing system
US10397362B1 (en) * 2015-06-24 2019-08-27 Amazon Technologies, Inc. Combined cache-overflow memory structure
GB2543866B (en) * 2016-03-07 2017-11-01 Imagination Tech Ltd Task assembly for SIMD processing
US20180191632A1 (en) * 2016-12-30 2018-07-05 Intel Corporation Flexible packet scheduling
US10572258B2 (en) 2017-04-01 2020-02-25 Intel Corporation Transitionary pre-emption for virtual reality related contexts
US12160369B2 (en) * 2019-02-15 2024-12-03 Intel Corporation Processor related communications
US10841225B2 (en) * 2019-03-06 2020-11-17 Arista Networks, Inc. Load balancing using dynamically resizable consistent hashing

Similar Documents

Publication Publication Date Title
JP2022534438A5 (enExample)
JP2021512391A5 (enExample)
CN106331065B (zh) 一种用于具有服务容器的主机系统的代理应用以及系统
US20170270051A1 (en) Data Processing Method, Memory Management Unit, and Memory Control Device
US11563830B2 (en) Method and system for processing network packets
JP2020524840A5 (enExample)
JP2023119959A5 (enExample)
JP6960511B2 (ja) 後方互換性のためのなりすましcpuid
JP2023015644A5 (enExample)
JP2022189221A5 (enExample)
JP2022189224A5 (enExample)
JP2021016623A5 (enExample)
EP2743833B1 (en) Method and apparatus for querying and traversing virtual memory area
CN108762810B (zh) 一种基于并行微引擎的网络报文头处理器
WO2015176315A1 (zh) 哈希连接方法、装置和数据库管理系统
JP5916355B2 (ja) プログラムの命令を実行する装置および命令をキャッシュするシステム
US10089339B2 (en) Datagram reassembly
JP2017086779A5 (enExample)
US20130145122A1 (en) Instruction processing method of network processor and network processor
Wen et al. Interference evaluation in cpu-gpu heterogeneous computing
CN106790441B (zh) 创建策略模板表的方法及装置、会话处理的方法及装置
JP2021532471A5 (enExample)
CN106126435B (zh) 一种实现链表流水操作的电路结构及操作方法
JP2013233298A5 (enExample)
JP2021019906A5 (enExample)