JP2021527939A - 単一の格子整合希薄窒化物接合を組み込んだ薄膜フレキシブル光電子デバイスおよびその製造方法 - Google Patents
単一の格子整合希薄窒化物接合を組み込んだ薄膜フレキシブル光電子デバイスおよびその製造方法 Download PDFInfo
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Abstract
【選択図】なし
Description
本出願は、2018年6月18日に出願された「THIN−FILM,FLEXIBLE MULTI−JUNCTION OPTOELECTRONIC DEVICES INCORPORATING LATTICE−MATCHED DILUTITE NITRIDE JUNCTIONS AND METHODS OF FABRICATION」と題する米国特許出願第16/011,516号に関連し、その内容全体が参照により本明細書に組み込まれる。本出願は、「THIN−FILM,FLEXIBLE OPTOELECTRONIC DEVICES AND INCORPORATING A SINGLE LATTICE−MATCHED DILUTE NITRIDE JUNCTION AND METHODS OF FABRICATION」と題され、2018年6月18日に出願された米国特許出願第16/011,531号の利益を主張し、その全体が参照により本明細書に明示的に組み込まれる。
Claims (24)
- 単一接合光電子デバイスを製造するための方法であって、以下のステップ:
基板上にp−n構造を形成し、p−n構造は、基板の格子定数に一致する格子定数を有する半導体を含み、半導体は、希薄窒化物を含み、単一接合光電子デバイスは、p−n構造を含むステップ;および
単一接合光電子デバイスを基板から分離するステップ
を含む、前記方法。 - 前記基板から前記単一接合光電子デバイスを分離するステップは、前記p−n構造が、光が入射するべき前記単一接合光電子デバイスの表面に最も近くなるように、前記単一接合光電子デバイスを配向させるステップを含む、請求項1に記載の方法。
- 裏面処理の一部として、p−n構造に最も近い単一接合光電子デバイスの表面上に追加の層を形成するステップをさらに含む、請求項1に記載の方法。
- 前記単一接合光電子デバイスのために、誘電体層、半導体接触層、保護層、透明な導電性酸化物層、反射防止コーティング、金属コーティング、接着層、エポキシ層、またはプラスチックコーティングのうちの1つ以上を有する支持層を提供するステップをさらに含む、請求項1に記載の方法。
- 前記基板が、GaAsまたはGeのうちの1つを含む、請求項1に記載の方法。
- 前記希薄窒化物が、GaInNAs、GaInNAsSb、それらの合金、またはそれらの誘導体のうちの1つ以上を含む、請求項1に記載の方法。
- 希薄窒化物がGa1−yInyAs1−x−zNxSbzを含み、
Inの濃度yが0〜20%の範囲であり、
Nの濃度xが0〜6%の範囲であり、
Sbの濃度zが0〜8%の範囲である
請求項1に記載の方法。 - 前記半導体の格子定数が、0.4%未満の不整合または歪みで前記基板の格子定数と整合する、請求項1に記載の方法。
- 前記基板上に前記p−n構造を形成するステップは、エピタキシャル成長プロセスを使用して前記p−n構造を堆積するステップを含む、請求項1に記載の方法。
- 前記エピタキシャル成長プロセスが、分子線エピタキシー(MBE)プロセスである、請求項9に記載の方法。
- 前記エピタキシャル成長プロセスが、以下のうちの1つ以上を含む、請求項9に記載の方法。
有機金属化学蒸着(MOCVD)プロセス、
水素化物蒸気相エピタキシー(HVPE)プロセス、
分子線エピタキシー(MBE)法、
有機金属蒸気相エピタキシー(MOVPEまたはOMVPE)プロセス、
液相エピタキシー(LPE)プロセス、
クローズスペース蒸気輸送(CSVT:close−space vapor transport)エピタキシープロセス、
プラズマ化学気相成長(PECVD)プロセス、
物理蒸気相堆積(PVD)プロセス、
大気圧化学蒸着(APCVD)プロセス、
原子層堆積(ALD)プロセス、
低圧化学蒸着(LPCVD)プロセス、
熱線化学蒸着(HWCVD)プロセス、
誘導結合プラズマ増強化学蒸着(ICP−CVD)プロセス、
あるいは
他の形態のCVD。 - 前記エピタキシャル成長プロセスが、MBEとMOCVDとの組み合わせを含む、請求項9に記載の方法。
- 前記基板から前記単一接合光電子デバイスを分離するステップは、前記基板から前記単一接合光電子デバイスをリフトオフするためのエピタキシャルリフトオフ(ELO)プロセスを実行するステップを含む、請求項1に記載の方法。
- 前記基板と前記p−n構造との間に剥離層を設けるステップをさらに含み、
前記基板から前記単一接合光電子デバイスを分離するステップは、前記剥離層を除去するステップを含む、
請求項1に記載の方法。 - 前記剥離層がAlAsを含む、請求項14に記載の方法。
- 前記剥離層は、AlGaAsを含み、濃度はAlxGa1−xAsであり、式中x=1〜0.3である、請求項14に記載の方法。
- 前記剥離層は、AlGaInPを含み、濃度は(AlxGa1−x)0.5In0.5Pであり、式中x=1〜0である、請求項14に記載の方法。
- 基板はGaAsまたはGeを含み、
希薄窒化物は約1.1eV〜1.35eVのバンドギャップを有する、
請求項1に記載の方法。 - 基板はGaAsまたはGeを含み、
希薄窒化物は約1.3eV〜1.4eVのバンドギャップを有する、
請求項1に記載の方法。 - 基板はGaAsまたはGeを含み、
希薄窒化物は約1.34eVのバンドギャップを有する、
請求項1に記載の方法。 - 基板はGaAsまたはGeを含み、
希薄窒化物は約0.9eV〜1.4eVのバンドギャップを有する、
請求項1に記載の方法。 - さらに:
p−n構造上に反射器を形成するステップ、および
単一接合光電子デバイスを基板から分離することは、p−n構造および反射器を基板から分離することを含むステップを含む、請求項1に記載の方法。 - 前記p−n構造は、p−n接合を含み、前記p−n接合の位置は、前記単一接合光電子デバイスの前面の近くにあるか、または光の入射側から離れている、請求項1に記載の方法。
- 前記p−n構造が、ヘテロ接合またはホモ接合であり得る、請求項1に記載の方法。
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PCT/US2019/023607 WO2019245620A1 (en) | 2018-06-18 | 2019-03-22 | Thin-film, flexible optoelectronic devices incorporating a single lattice-matched dilute nitride junction and methods of fabrication |
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