JP2021503768A - 異なるペイロードサイズのブラインド検出のためのポーラコーディング技法 - Google Patents
異なるペイロードサイズのブラインド検出のためのポーラコーディング技法 Download PDFInfo
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- JP2021503768A JP2021503768A JP2020526439A JP2020526439A JP2021503768A JP 2021503768 A JP2021503768 A JP 2021503768A JP 2020526439 A JP2020526439 A JP 2020526439A JP 2020526439 A JP2020526439 A JP 2020526439A JP 2021503768 A JP2021503768 A JP 2021503768A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
- H04L1/0042—Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0036—Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
- H04L1/0038—Blind format detection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0054—Maximum-likelihood or sequential decoding, e.g. Viterbi, Fano, ZJ algorithms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Artificial Intelligence (AREA)
- Quality & Reliability (AREA)
- Error Detection And Correction (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Mobile Radio Communication Systems (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2017/111600 WO2019095267A1 (en) | 2017-11-17 | 2017-11-17 | Polar coding techniques for blind detection of different payload sizes |
| CNPCT/CN2017/111600 | 2017-11-17 | ||
| PCT/CN2018/107179 WO2019095853A1 (en) | 2017-11-17 | 2018-09-24 | Polar coding techniques for blind detection of different payload sizes |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2021503768A true JP2021503768A (ja) | 2021-02-12 |
| JP2021503768A5 JP2021503768A5 (enExample) | 2021-10-21 |
Family
ID=66538335
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2020526439A Pending JP2021503768A (ja) | 2017-11-17 | 2018-09-24 | 異なるペイロードサイズのブラインド検出のためのポーラコーディング技法 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US11228394B2 (enExample) |
| EP (1) | EP3711168A4 (enExample) |
| JP (1) | JP2021503768A (enExample) |
| KR (1) | KR20200087148A (enExample) |
| CN (1) | CN111492585A (enExample) |
| BR (1) | BR112020009397A2 (enExample) |
| SG (1) | SG11202003334UA (enExample) |
| WO (2) | WO2019095267A1 (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019107452A1 (ja) | 2017-11-29 | 2019-06-06 | 株式会社Nttドコモ | 通信装置、及び復号方法 |
| EP3780433A4 (en) * | 2018-03-30 | 2021-06-02 | LG Electronics Inc. | METHOD FOR PERFORMING SIDELINK COMMUNICATION USING A POLAR CODE AND DEVICE FOR IT |
| US10963342B2 (en) | 2019-02-01 | 2021-03-30 | Micron Technology, Inc. | Metadata-assisted encoding and decoding for a memory sub-system |
| CN112152639A (zh) * | 2019-06-27 | 2020-12-29 | 深圳市中兴微电子技术有限公司 | 一种极化码的译码方法、装置、存储介质和终端 |
| US10986695B1 (en) * | 2019-11-07 | 2021-04-20 | PanPsy Technologies, LLC | Uplink cancellation indication signaling |
| US11374686B2 (en) * | 2020-02-04 | 2022-06-28 | Qualcomm Incorporated | Parity check bits for non-coherent communication |
| US12047769B2 (en) * | 2021-08-02 | 2024-07-23 | Qualcomm Incorporated | Enhanced security for wireless communications |
| US11838123B2 (en) | 2022-01-14 | 2023-12-05 | Huawei Technologies Co., Ltd. | Bit-channel combiner and combined probabilistic constellation shaping and polar encoder |
| US12218691B2 (en) * | 2022-05-04 | 2025-02-04 | Qualcomm Incorporated | Polarization adjusted channel coding design for complexity reduction |
| WO2024221125A1 (en) * | 2023-04-23 | 2024-10-31 | Huawei Technologies Co., Ltd. | Methods and apparatus for correlated multiuser coding |
| US12301256B2 (en) * | 2023-08-16 | 2025-05-13 | Qualcomm Incorporated | Resource efficient list decoding operations |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017106246A2 (en) * | 2015-12-14 | 2017-06-22 | Idac Holdings, Inc. | Wtru identification using polar code frozen bits |
| CN107342843A (zh) * | 2017-01-05 | 2017-11-10 | 华为技术有限公司 | 速率匹配方法、编码装置和通信装置 |
| JP2020530973A (ja) * | 2017-08-11 | 2020-10-29 | コーヒレント・ロジックス・インコーポレーテッド | Dciブラインド検出時のマルチモード・ブロック弁別のためのスクランブル系列設計 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2360866A1 (en) * | 2010-02-12 | 2011-08-24 | Panasonic Corporation | Component carrier activation and deactivation using resource assignments |
| US10193578B2 (en) * | 2014-07-10 | 2019-01-29 | The Royal Institution For The Advancement Of Learning / Mcgill University | Flexible polar encoders and decoders |
| US9722651B2 (en) * | 2015-01-09 | 2017-08-01 | Qualcomm Incorporated | Adaptive channel coding using polarization |
| US11664927B2 (en) | 2015-12-31 | 2023-05-30 | Interdigital Patent Holdings, Inc. | Waveform based data integrity check and error correction |
| WO2017127973A1 (en) * | 2016-01-25 | 2017-08-03 | Qualcomm Incorporated | Generation of polar codes with a variable block length utilizing puncturing |
| US20170222754A1 (en) * | 2016-01-28 | 2017-08-03 | Lg Electronics Inc. | Error correcting coding method based on cross-layer error correction with likelihood ratio and apparatus thereof |
| CN107124188B (zh) * | 2016-02-24 | 2020-08-07 | 华为技术有限公司 | 极化码的编码方法、译码方法、编码设备和译码设备 |
| US10911071B2 (en) * | 2016-04-08 | 2021-02-02 | Intel Corporation | Apparatus, method and system to support codes with variable codeword lengths and information lengths |
| US10361717B2 (en) * | 2016-06-17 | 2019-07-23 | Huawei Technologies Co., Ltd. | Apparatus and methods for error detection coding |
| CN106998208B (zh) * | 2017-01-17 | 2020-04-28 | 北京航空航天大学 | 一种可变长Polar码的码字构造方法 |
| US10278168B2 (en) * | 2017-05-04 | 2019-04-30 | At&T Intellectual Property I, L.P. | Multi-stage segmented downlink control information with reduced overhead |
| CN117118568A (zh) * | 2017-08-10 | 2023-11-24 | 艾普拉控股有限公司 | 用于生成物理广播信道信号的方法及相关装置和存储介质 |
-
2017
- 2017-11-17 WO PCT/CN2017/111600 patent/WO2019095267A1/en not_active Ceased
-
2018
- 2018-09-24 SG SG11202003334UA patent/SG11202003334UA/en unknown
- 2018-09-24 WO PCT/CN2018/107179 patent/WO2019095853A1/en not_active Ceased
- 2018-09-24 BR BR112020009397-1A patent/BR112020009397A2/pt not_active IP Right Cessation
- 2018-09-24 CN CN201880073967.9A patent/CN111492585A/zh active Pending
- 2018-09-24 KR KR1020207013553A patent/KR20200087148A/ko not_active Ceased
- 2018-09-24 US US16/765,066 patent/US11228394B2/en active Active
- 2018-09-24 JP JP2020526439A patent/JP2021503768A/ja active Pending
- 2018-09-24 EP EP18879462.2A patent/EP3711168A4/en not_active Withdrawn
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2017106246A2 (en) * | 2015-12-14 | 2017-06-22 | Idac Holdings, Inc. | Wtru identification using polar code frozen bits |
| CN107342843A (zh) * | 2017-01-05 | 2017-11-10 | 华为技术有限公司 | 速率匹配方法、编码装置和通信装置 |
| JP2020505820A (ja) * | 2017-01-05 | 2020-02-20 | 華為技術有限公司Huawei Technologies Co.,Ltd. | レートマッチング方法、符号化装置、および通信装置 |
| JP2020530973A (ja) * | 2017-08-11 | 2020-10-29 | コーヒレント・ロジックス・インコーポレーテッド | Dciブラインド検出時のマルチモード・ブロック弁別のためのスクランブル系列設計 |
Non-Patent Citations (3)
| Title |
|---|
| COHERENT LOGIX INC.: "Scrambling Sequence Design for Early Block Discrimination on DCI Blind Detection[online]", 3GPP TSG RAN1-NR#2 R1-1711571, JPN6022043805, 20 June 2017 (2017-06-20), ISSN: 0005057087 * |
| ERICSSON: "Polar Code Design Parameters[online]", 3GPP TSG-RAN WG1 #88 R1-1701632, JPN6022043806, 7 February 2017 (2017-02-07), ISSN: 0004896642 * |
| QUALCOMM INCORPORATED: "Comparison of Polar codes for control channel[online]", 3GPP TSG-RAN WG1 NR ADHOC R1-1701186, JPN6022043808, 17 January 2017 (2017-01-17), ISSN: 0004896643 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111492585A (zh) | 2020-08-04 |
| WO2019095853A1 (en) | 2019-05-23 |
| US11228394B2 (en) | 2022-01-18 |
| KR20200087148A (ko) | 2020-07-20 |
| BR112020009397A2 (pt) | 2020-11-03 |
| EP3711168A1 (en) | 2020-09-23 |
| US20200358555A1 (en) | 2020-11-12 |
| EP3711168A4 (en) | 2021-08-04 |
| SG11202003334UA (en) | 2020-05-28 |
| WO2019095267A1 (en) | 2019-05-23 |
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