JP2021136563A - Driving system, sound reproducing device, and electronic apparatus - Google Patents

Abstract

To provide a driving system that can suppress various troubles caused by the instantaneous flow of excessive current when a transistor of a bridge circuit is turned on or off.SOLUTION: A driving system 2 includes a bridge circuit 12 that drives a piezoelectric speaker 14 provided between a first driving node and a second driving node, and a circuit device 100 that outputs a first control signal and a second control signal to the bridge circuit 12. The bridge circuit 12 includes a first resistor R1 provided between a power source node and the first driving node, a first FET 1 provided between the first driving node and the ground node and receiving the input of the first control signal at a gate, a second resistor R2 provided between the power source node and the second driving node, a second FET 2 provided between the second driving node and the ground node and receiving the input of the second control signal at a gate, and a third resistor R3 provided between the first driving node and one end of the piezoelectric speaker 14.SELECTED DRAWING: Figure 1

Description

The present invention relates to a drive system, a sound reproduction device, an electronic device, and the like.

A system that outputs a sound by driving a piezoelectric speaker composed of a piezo element is known. For example, Patent Document 1 discloses a microcomputer and an alarm device having a drive circuit for driving a buzzer, which is a piezoelectric speaker, in response to a drive signal from the microcomputer. In Patent Document 1, the drive circuit, which is a bridge circuit, is composed of two bipolar transistors in which each of the two drive signals from the microcomputer is input to the base.

Japanese Unexamined Patent Publication No. 2018-92346

When the bridge circuit is configured by a bipolar transistor which is a current drive element as in Patent Document 1, a circuit device such as a microcomputer has a drive current supply circuit for passing a base-emitter current through the bipolar transistor. You will need it. Further, when the two transistors constituting the bridge circuit are switched on and off, an excessive current momentarily flows through the piezoelectric speaker, which may cause various problems.

One aspect of the present disclosure is a bridge circuit for driving a piezoelectric speaker provided between a first drive node and a second drive node, and a circuit for outputting a first control signal and a second control signal to the bridge circuit. The bridge circuit, including the device, is provided between the first resistor provided between the power supply node and the first drive node, and between the first drive node and the ground node, and the first is provided at the gate. A first FET to which a control signal is input, a second resistor provided between the power supply node and the second drive node, and a second resistor provided between the second drive node and the ground node are provided at the gate. 2 It relates to a drive system including a second FET to which a control signal is input and a third resistor provided between the first drive node and one end of the piezoelectric speaker.

Further, one aspect of the present disclosure relates to a sound reproduction device including the drive system described above and the piezoelectric speaker.

Further, one aspect of the present disclosure relates to an electronic device including the drive system described above.

Configuration example of the drive system of this embodiment. The figure explaining the operation of this embodiment. The figure explaining the operation of this embodiment. The figure which shows the waveform example of the current flowing through a piezoelectric speaker. The figure which shows the waveform example of the current flowing through a piezoelectric speaker. The figure which shows the waveform example of the current flowing through a piezoelectric speaker. The figure which shows the relationship between 1 / r3 and IPK when VCS = 15V. The figure which shows the relationship between 1 / r3 and IPK when VCS = 15V. The figure which shows the relationship between 1 / r3 and IPK when VCS = 12V. The figure which shows the relationship between 1 / r3 and IPK when VCS = 12V. The figure which shows the relationship between 1 / r3 and IPK when VCS = 5V. The figure which shows the relationship between 1 / r3 and IPK when VCS = 5V. The figure which shows the relationship between 1 / r3 and IPK when VCS = 3V. The figure which shows the relationship between 1 / r3 and IPK when VCS = 3V. The figure which shows the relationship between the power-source voltage CRC and the slope k. The figure which shows the relationship between the power-source voltage CRC and the slope k. The figure explaining the operation of this embodiment at the time of non-reproduction of sound. Configuration example of sound reproduction device. Explanatory drawing of the method using pseudo sound data. Explanatory drawing of the method using pseudo sound data. Explanatory drawing of the pseudo sound data generation method. The figure explaining the operation of the processing apparatus. Configuration example of electronic equipment.

Hereinafter, preferred embodiments of the present disclosure will be described in detail. It should be noted that the present embodiment described below does not unreasonably limit the contents described in the claims, and not all of the configurations described in the present embodiment are essential constituent requirements.

1. 1. Drive system FIG. 1 shows a configuration example of the drive system 2 of the present embodiment. The drive system 2 is a system for driving the piezoelectric speaker 14, and includes a circuit device 100 and a bridge circuit 12.

The piezoelectric speaker 14 is, for example, a sound output device composed of a piezo element 16 and outputting sound when a voltage is applied. The piezoelectric speaker 14 can also be called a piezoelectric buzzer.

The circuit device 100 is an integrated circuit device called an IC (Integrated Circuit). For example, the circuit device 100 is an IC manufactured by a semiconductor process, and is a semiconductor chip in which a circuit element is formed on a semiconductor substrate. The circuit device 100 can be realized by, for example, a microcomputer or an ASIC (Application Specific Integrated Circuit). Microcomputers are also called microcomputers.

The bridge circuit 12 is composed of two FET1s and FETs 2 which are field effect transistors, and by alternately turning on and off these FETs 1 and FET2, the positive voltage applied to the piezoelectric speaker 14 and the negative electrode are negative. The applied voltages are applied alternately. The bridge circuit 12 is provided, for example, as an external component of the circuit device 100, and drives a piezoelectric speaker 14 also provided as an external component to output sound.

Specifically, the drive system 2 of the present embodiment outputs control signals SC1 and SC2 to the bridge circuit 12 for driving the piezoelectric speaker 14 provided between the drive node ND1 and the drive node ND2, and the bridge circuit 12. The circuit device 100 is included. For example, the drive nodes ND1 and ND2 are the first drive node and the second drive node, respectively, and the control signals SC1 and SC2 are the first control signal and the second control signal, respectively.

The bridge circuit 12 includes resistors R1, R2, R3 and FET1 and FET2. The resistors R1, R2, and R3 are the first resistor, the second resistor, and the third resistor, respectively, and the FETs 1 and FET2 are the first FET and the second FET, respectively.

The resistor R1 is provided between the power supply node and the drive node ND1. The power supply node is a supply node of the power supply voltage VCS. For example, one end of the resistor R1 is connected to the power supply node, and the other end is connected to the drive node ND1. The resistor R2 is provided between the power supply node and the drive node ND2. For example, one end of the resistor R2 is connected to the power supply node, and the other end is connected to the drive node ND2. The resistor R3 is provided between the drive node ND1 and one end of the piezoelectric speaker 14. For example, one end of the resistor R3 is connected to the drive node ND1 and the other end is connected to one end of the piezoelectric speaker 14.

The FET 1 is provided between the drive node ND1 and the GND node which is a ground node. Then, the control signal SC1 from the circuit device 100 is input to the gate of the FET 1. The FET 2 is provided between the drive node ND2 and the GND node. Then, the control signal SC2 from the circuit device 100 is input to the gate of the FET 2. A GND node is a node that is grounded to the ground GND. FET1 and FET2 are field effect transistors, for example, N-type transistors. FET1 and FET2 can be realized by, for example, a power MOS transistor. The control signals SC1 and SC2 are signals that are activated alternately, for example, the control signal SC1 becomes inactive when the control signal SC1 is active, and the control signal SC2 becomes inactive when the control signal SC2 is active. In the case of positive logic, the active level is the high level H level and the inactive level is the low level L level.

The circuit device 100 operates by being supplied with the power supply voltage VDD. For example, the circuit device 100 operates based on a power supply voltage VDD that is different from the power supply voltage VCS supplied to the power supply node of the bridge circuit 12, and outputs control signals SC1 and SC2 to the bridge circuit 12. For example, the voltage of the VCS becomes a different voltage depending on the device in which the drive system 2 is incorporated. If the circuit device 100 and the bridge circuit 12 are configured to operate at the same power supply voltage, there arises a problem that the rated voltage of the circuit device 100 is exceeded when the VCS becomes a high voltage. In this respect, in the present embodiment, since the circuit device 100 operates based on the power supply voltage VDD different from the power supply voltage VCC of the bridge circuit 12, it is possible to prevent the occurrence of such a problem.

Further, the bridge circuit 12 of the present embodiment does not have a full bridge circuit configuration composed of two transistors on the high potential side and two transistors on the low potential side, but has two FETs 1 and 2 and two resistors R1 and R2. It is composed of. The two resistors R1 and R2 realize the functions of the two transistors on the high potential side in the full bridge circuit. For example, in the case of a full bridge circuit, two control signals input to the two transistors on the high potential side are further required, and a level shifter for level-shifting the voltage of these control signals is required. In this respect, in the present embodiment, since the functions of the two transistors on the high potential side of the full bridge circuit are substituted by the two resistors R1 and R2, the control signals of the two transistors on the high potential side are also unnecessary. , The level shifter is also unnecessary. Therefore, the circuit device 100 can control the bridge circuit 12 with a simple configuration, and the circuit device 100 can be downsized.

Next, the operation of this embodiment will be described with reference to FIGS. 2 and 3. As shown in FIG. 2, when the circuit device 100 sets the control signal SC1 to the H level and the control signal SC2 to the L level, the FET 1 is turned on and the FET 2 is turned off. As a result, as shown in FIG. 2, a current I1 flows from the power supply node of the VCS to the GND node via the resistor R2, the piezo element 16, the resistor R3, and the FET1. At this time, the GND voltage is applied to one end of the piezo element 16 constituting the piezoelectric speaker 14, and the VCS voltage is applied to the other end.

On the other hand, as shown in FIG. 3, when the circuit device 100 sets the control signal SC1 to the L level and the control signal SC2 to the H level, the FET 1 is turned off and the FET 2 is turned on. As a result, as shown in FIG. 3, a current I2 flows from the power supply node of the VCS to the GND node via the resistors R1 and R3, the piezo element 16, and the FET2. At this time, the voltage of VCS is applied to one end of the piezo element 16 constituting the piezoelectric speaker 14, and the voltage of GND is applied to the other end.

As described above, in the present embodiment, the applied voltage that alternately reverses the polarity as shown in FIGS. 2 and 3 is applied to the piezo element 16 by the bridge circuit 12, so that the piezoelectric speaker 14 configured by the piezo element 16 Sound will be output. This makes it possible to operate the piezoelectric speaker 14 as, for example, a speaker that outputs sound, a buzzer that outputs an alarm sound, or the like. A buzzer is also one of the speakers, which is a device that converts an electric signal into sound.

Further, in the present embodiment, the bridge circuit 12 is composed of FET1 and FET2 which are field effect transistors. For example, if the bridge circuit 12 is composed of bipolar transistors, the circuit device 100 needs a drive current supply circuit for passing a base-emitter current through the bipolar transistors, resulting in increased power consumption. Problems such as Further, when the circuit device 100 realized by a microcomputer, ASIC, or the like is composed of a CMOS transistor, the circuit device 100 provides a circuit that supplies a drive current having a large current value for passing such a base-emitter current. It is not efficient because an I / O element having a large area is required. In this respect, in the drive system 2 of the present embodiment, the bridge circuit 12 is composed of FET1 and FET2 which are field effect transistors. In this way, the circuit device 100 only needs to pass a drive current having a small current value required for charging / discharging the gate electrodes of the FET 1 and the FET 2. Therefore, by configuring the bridge circuit 12 with the FET 1 and the FET 2, for example, the bridge circuit 12 having a high affinity for connection with the circuit device 100 composed of the CMOS transistor can be realized.

Further, if the polarity of the applied voltage of the piezo element 16 is reversed as shown in FIGS. 2 and 3, a large current may momentarily flow through the piezo element 16 at the time of polarity reversal, causing problems such as EMI noise. be. For example, in FIG. 2, VCS is applied to the lower electrode and GND is applied to the upper electrode on the paper surface of the piezo element 16 that functions as a capacitor. As a result, a positive charge is accumulated in the lower electrode, and a negative charge is accumulated in the upper electrode. On the other hand, in FIG. 3, VCS is applied to the upper electrode of the piezo element 16 that functions as a capacitor, and GND is applied to the lower electrode. As a result, a positive charge is accumulated in the upper electrode, and a negative charge is accumulated in the lower electrode. Therefore, when the state of FIG. 2 is switched to the state of FIG. 3 and the polarity of the applied voltage of the piezo element 16 is reversed, the electric charge accumulated in each electrode disappears, so that a large current flows instantaneously. .. As a result, EMI noise as shown in E1 is generated. Similarly, EMI noise is generated when the state of FIG. 3 is switched to the state of FIG. When such EMI noise is generated, there is a possibility that problems such as malfunction of the device in which the drive system 2 is incorporated may occur. Further, if an excessive current exceeding the rated current flows through the piezo element 16 constituting the piezoelectric speaker 14, there is a possibility that the piezoelectric speaker 14 may break down and may not function as a speaker.

Therefore, in the present embodiment, the resistor R3 is provided between the drive node ND1 and one end of the piezoelectric speaker 14. If such a resistor R3 is provided, the resistor R3 functions as a current limiting element, and it becomes possible to suppress an excessive current from flowing when the polarity of the voltage applied to the piezoelectric speaker 14 is reversed. As a result, the generation of EMI noise as shown in E1 of FIG. 3 can be suppressed, and malfunction of the device due to EMI noise can be prevented. Further, by suppressing the flow of an excessive current exceeding the rated current to the piezoelectric speaker 14, it is possible to prevent problems such as the piezoelectric speaker 14 failing to function as a speaker.

For example, FIGS. 4, 5 and 6 show waveform examples of the current flowing through the piezoelectric speaker 14. For example, when the resistance value of the resistor R3 is r3, FIG. 4 shows a current waveform when VCS = 15V and r3 = 1Ω. When the resistance values of the resistors R1 and R2 are r1 and r2, r1 = r2 = 560Ω in FIG. In this way, making the resistance value r3 of the resistor R3 very small compared to the resistance values r1 and r2, such as 1Ω, corresponds to the case where the resistor R3 is not provided. In this case, as shown in A1 and A2 of FIG. 4, a spike current having a very large current value is instantaneously generated when the polarity of the applied voltage of the piezoelectric speaker 14 is reversed. When such a spike current is generated, EMI noise having a high noise level is generated.

FIG. 5 is a current waveform when VCS = 15V and the resistance value of the resistor R3 is r3 = 220Ω. The resistance values of the resistors R1 and R2 are r1 = r2 = 560Ω. As shown in B1 and B2 of FIG. 5, by increasing the resistance value r3 as 220Ω, the spike current generated in FIG. 4 is reduced. That is, it becomes possible to sufficiently suppress the excessive current flowing through the piezoelectric speaker 14 when the polarity of the applied voltage of the piezoelectric speaker 14 is reversed, and the level of EMI noise can be sufficiently reduced. This makes it possible to prevent the occurrence of malfunction of the device due to EMI noise.

FIG. 6 is a current waveform when VCS = 12V and the resistance value of the resistor R3 is r3 = 180Ω. The resistance values of the resistors R1 and R2 are r1 = r2 = 470Ω. As shown in C1 and C2 of FIG. 5, by increasing the resistance value r3 to 180Ω, it becomes possible to sufficiently suppress the flow of an excessive current when the polarity of the applied voltage of the piezoelectric speaker 14 is reversed, and EMI. The noise level can be sufficiently reduced.

When the VCS is lowered from 15V to 12V as shown in FIGS. 5 to 6, the resistance values r1 and r2 of the resistors R1 and R2 are also reduced, and the resistance of the resistor R3 is correspondingly reduced. The value r3 is also reduced. For example, in FIG. 2, the value of the current I1 flowing through the piezo element 16 of the piezoelectric speaker 14 is set by the voltage of the VCS and the resistance values r1 and r3. For example, the larger the VCS, the larger the value of the current I1, and the smaller the resistance values r1 and r3, the larger the value of the current I1. Further, in FIG. 3, the value of the current I1 flowing through the piezo element 16 of the piezoelectric speaker 14 is set by the voltage of the VCS and the resistance values r2 and r3. For example, the larger the VCS, the larger the value of the current I2, and the smaller the resistance values r2 and r3, the larger the value of the current I2. Then, in order to output sound with sufficient sound pressure from the piezoelectric speaker 14, it is necessary to pass currents I1 and I2 having appropriate current values. Therefore, when the voltage of the VCS becomes low depending on the device in which the drive system 2 is incorporated, it is necessary to reduce the resistance values r1 and r2 accordingly, and the resistance value r3 is also reduced accordingly. ..

As described above, in the present embodiment, the resistor R3 is a resistor for reducing EMI noise generated when the polarity of the voltage applied to the piezoelectric speaker 14 is reversed. That is, a resistor R3 for reducing EMI noise is provided between the drive node ND1 and one end of the piezoelectric speaker 14. By providing such a resistor R3 and suppressing the current that momentarily flows when the polarity of the voltage applied to the piezoelectric speaker 14 is reversed, it is possible to effectively prevent the occurrence of malfunction of the device due to EMI noise. become. That is, by providing the resistor R3, as shown in B1 and B2 in FIG. 5 and C1 and C2 in FIG. 6, the spike current at the time of polarity reversal of the applied voltage of the piezoelectric speaker 14 can be reduced, and EMI noise can be effectively reduced. It will be possible to reduce it.

Further, in the present embodiment, when the power supply voltage supplied from the power supply node to the bridge circuit 12 is VCS, k = 0.5 × VCS + 1.8, and the rated current of the piezo element constituting the piezoelectric speaker 14 is IL. , The resistance value r3 of the resistor R3 is set to r3> k / (4 × IL). For example, the resistance value r3 is set to a larger resistance value as the VCS becomes higher. Further, the resistance value r3 is set to a larger resistance value as the rated current IL is smaller. In this way, the resistance value r3 of the resistor R3 is set to an appropriate resistance value according to the voltage of the VCS supplied to the bridge circuit 12 and the rated current IL of the piezo element constituting the piezoelectric speaker 14. It is possible to reduce EMI noise and prevent the occurrence of failure of the piezoelectric speaker 14. Hereinafter, such a method for setting the resistance value r3 of the present embodiment will be described in detail.

7 and 8 are diagrams showing the relationship between the reciprocal 1 / r3 of the resistance value r3 and the peak current IPK flowing through the piezoelectric speaker 14 when VCS = 15V and r1 = r2 = 560Ω. For example, a circuit simulator. It is a simulation result by. As described with reference to FIGS. 4 to 6, the peak current IPK is the value of the current that flows instantaneously when the polarity of the voltage applied to the piezoelectric speaker 14 is reversed. As shown in FIGS. 7 and 8, as the resistance value r3 increases and the reciprocal 1 / r3 decreases, the peak current IPK also decreases. FIG. 8 is a diagram in which the IPK is plotted against 1 / r3, and if the slope of the approximate straight line of the plot points is k, it can be obtained as k = 9.0431. In FIGS. 7 and 8, the resistance values r1 and r2 of the resistors R1 and R2 are set to resistance values such that a current of, for example, about 20 mA flows corresponding to the rated current of the piezo element 16 constituting the piezoelectric speaker 14. ing. The same applies to FIGS. 9 to 14 below.

9 and 10 are diagrams showing the relationship between 1 / r3 and IPK when VCS = 12V and r1 = r2 = 470Ω. As shown in FIGS. 9 and 10, as 1 / r3 becomes smaller, the peak current IPK also becomes smaller. FIG. 10 is a diagram in which the IPK is plotted against 1 / r3, and the slope of the approximate straight line of the plot points can be determined as k = 7.8384.

11 and 12 are diagrams showing the relationship between 1 / r3 and IPK when VCS = 5V and r1 = r2 = 180Ω. As shown in FIG. 12, the slope of the approximate straight line in this case can be obtained as k = 4.6297.

13 and 14 are diagrams showing the relationship between 1 / r3 and IPK when VCS = 3V and r1 = r2 = 100Ω. As shown in FIG. 14, the slope of the approximate straight line in this case can be obtained as k = 2.9212.

FIG. 15 is a diagram showing the value of the slope k at VCS = 3V, 5V, 12V, and 15V, and FIG. 16 is a diagram in which k is plotted against VCS. The approximate straight line of the plot points in FIG. 16 can be expressed as y = 0.5x + 1.8. That is, the following equation (1) holds.
k = 0.5 × VCS + 1.8 (1)

The above equation (1) is an approximate equation for obtaining the slope k at each VCS. Since this slope k corresponds to the slope of y = IPK with respect to x = 1 / r3, it can be considered that the following equation (2) holds.
IPK = k × (1 / r3) (2)

Therefore, the following equation (3) holds for the resistance value r3 of the resistor R3.
r3 = k / IPK (3)

Here, it is assumed that the rated current of the piezo element 16 constituting the piezoelectric speaker 14 is IL. As an example, IL = about 20 mA. At this time, the peak current IPK is a current that flows instantaneously when the polarity of the applied voltage is reversed, the pulse width is short as shown in FIG. 4 and the like, and the breaking energy of the piezo element 16 is small. Therefore, if the peak current IPK is, for example, less than four times the rated current IL, the destruction of the piezo element 16 can be avoided and is acceptable. Therefore, as shown in the following equation (4), the resistance value r3 of the resistor R3 may be set to a resistance value larger than k / (4 × IL).
r3> k / (4 × IL) (4)

For example, assuming that the rated current of the piezo element 16 is IL = 20 mA, the resistance value r3 of the resistor R3 may be set to a resistance value such that the peak current IPK is smaller than 4 × 20 mA = 80 mA.

In the case of VCS = 15V in FIG. 7, if r3 is set to 82Ω or more, the peak current IPK can be made smaller than 4 × IL = 80mA, and EMI noise can be reduced while avoiding destruction of the piezo element 16. It can be effectively reduced. For example, by setting r3 = 220Ω, the peak current IPK can be suppressed to 2mA, and EMI noise can be sufficiently reduced.

In the case of VCS = 12V in FIG. 9, if r3 is set to 82Ω or more, the peak current IPK can be made smaller than 4 × IL = 80mA, and destruction of the piezo element 16 can be avoided and EMI noise can be reduced. can. For example, by setting r3 = 180Ω, the peak current IPK can be suppressed to 8mA, and EMI noise can be sufficiently reduced.

In the case of VCS = 5V in FIG. 11, if r3 is set to 47Ω or more, the peak current IPK can be made smaller than 80mA, and destruction of the piezo element 16 can be avoided and EMI noise can be reduced. For example, by setting r3 = 100Ω, the peak current IPK can be suppressed to 11mA, and EMI noise can be sufficiently reduced.

In the case of VCS = 3V in FIG. 13, if r3 is set to 33Ω or more, the peak current IPK can be made smaller than 80mA, and destruction of the piezo element 16 can be avoided and EMI noise can be reduced. For example, by setting r3 = 56Ω, the peak current IPK can be suppressed to 25mA, and EMI noise can be sufficiently reduced.

As described above, in the present embodiment, when k = 0.5 × VCS + 1.8 and the rated current of the piezo element 16 of the piezoelectric speaker 14 is IL, the resistance value of the resistor R3 is r3> k / (4 ×). It is set to IL). By doing so, the EMI noise can be effectively reduced while avoiding the destruction of the piezo element 16.

Further, in the present embodiment, as described with reference to FIG. 1, the bridge circuit 12 is supplied with a power supply voltage VCS different from the power supply voltage VDD of the circuit device 100, and the resistance value r3 of the resistor R3 is set to a value corresponding to the VCS. NS. For example, in the case of VCS = 15V in FIG. 7, it is set to about r3 = 220Ω, for example, and in the case of VCS = 12V in FIG. 9, it is set to about r3 = 180Ω, for example. Further, when VCS = 5V in FIG. 11, for example, r3 = 100Ω is set, and in the case of VCS = 3V in FIG. 13, for example, r3 = 56Ω is set. That is, the lower the power supply voltage VCS supplied to the bridge circuit 12, the smaller the resistance value r3 of the resistor R3. In other words, the higher the power supply voltage VCS, the larger the resistance value r3 of the resistor R3. In this way, the resistance value r3 of the resistor R3 can be set to an appropriate resistance value according to the power supply voltage VCS of the bridge circuit 12, and the destruction of the piezo element 16 can be avoided and the EMI noise can be reduced. .. That is, the power supply voltage VCS supplied to the bridge circuit 12 has a different voltage depending on the device in which the drive system 2 is incorporated. Even when the power supply voltage VCS becomes different depending on the device in this way, as described in FIG. 1, the bridge circuit 12 is composed of two FETs 1 and FET2, and the transistor on the high potential side is a resistor R1. , R2 can be used as a substitute for this. Further, by setting the resistance value r3 of the resistor R3 of the bridge circuit 12 to a resistance value corresponding to the power supply voltage VCS supplied to the bridge circuit 12, while supporting various devices having different power supply voltage VCSs, It is possible to avoid destruction of the piezo element 16 and reduce EMI noise.

Further, in the present embodiment, as shown in FIG. 17, the circuit device 100 turns off the operation of the bridge circuit 12 by setting the control signals SC1 and SC2 to the low level L level. For example, the operation of the bridge circuit 12 is turned off while the power supply voltage VCS from the power supply node is supplied to the bridge circuit 12. For example, the power supply voltage VCS is supplied by an external power supply device provided in the device in which the drive system 2 is incorporated. For example, in a state where the external power supply device supplies the power supply voltage VCS to the bridge circuit 12, the circuit device 100 turns off the FET1 and the FET2 by setting the control signals SC1 and SC2 to the L level, which is an inactive level. do. As a result, as shown in FIG. 17, the currents I3 and I4 flowing through the FETs 1 and 2 are turned off, and the operation of the bridge circuit 12 is turned off. For example, even if the power supply voltage VCS is supplied from the external power supply device, the current path flowing from the power supply node to the GND node is cut off by turning off the FET1 and the FET2, and the bridge circuit 12 is turned off. As a result, the operation of the bridge circuit 12 can be turned off without consuming unnecessary power in the bridge circuit 12, and the power saving mode can be realized.

Further, as shown in FIG. 17, the circuit device 100 sets the control signals SC1 and SC2 to the L level when the piezoelectric speaker 14 does not output sound. For example, the circuit device 100 drives the piezoelectric speaker 14 by the bridge circuit 12 by performing a sound reproduction process for generating control signals SC1 and SC2 based on the sound data. For example, as will be described later, the circuit device 100 controls the bridge circuit 12 so that the FETs 1 and 2 are turned on alternately and exclusively by outputting, for example, a PWM signal as the control signals SC1 and SC2. For example, in the first period of the sound reproduction process, the circuit device 100 sets the control signal SC1 to the H level and turns on the FET 1, so that the GND is connected to one end of the piezo element 16 of the piezoelectric speaker 14 as shown in FIG. A voltage is applied, and the voltage of the VCS is applied to the other end. As a result, the current I1 flows from the power supply node of the VCS to the GND node via the resistor R2, the piezo element 16, the resistor R3, and the FET1. On the other hand, in the second period of the sound reproduction processing, the circuit device 100 sets the control signal SC2 to the H level and turns on the FET 2, so that the VCS is CCed at one end of the piezo element 16 of the piezoelectric speaker 14 as shown in FIG. The voltage of the above is applied, and the voltage of GND is applied to the other end. As a result, the current I2 flows from the power supply node of the VCS to the GND node via the resistors R1, R3, the piezo element 16, and the FET2. By doing so, the applied voltage is applied to the piezo element 16 of the piezoelectric speaker 14 while the polarity is reversed, and the piezoelectric speaker 14 is driven.

Then, the circuit device 100 sets the control signals SC1 and SC2 to the L level when such sound reproduction processing is not performed. That is, in the first period of the sound reproduction processing, the circuit device 100 sets the control signals SC1 and SC2 to the H level and the L level, respectively, and turns the FET1 and the FET2 on and off, respectively, to perform the sound reproduction processing. In the second period, the control signals SC1 and SC2 are set to L level and H level, respectively, and FET1 and FET2 are turned off and on, respectively. On the other hand, when the sound reproduction process is not performed, the circuit device 100 fixedly turns off the control signals SC1 and SC2 and turns off the FET1 and the FET2. As a result, no sound is output from the piezoelectric speaker 14, but as shown in FIG. 17, when the FETs 1 and 2 are turned off, the currents I3 and I4 do not flow, and the power saving mode in which the operation of the bridge circuit 12 is turned off. Will be realized.

2. Sound Reproduction Device FIG. 18 shows a configuration example of the sound reproduction device 1 of the present embodiment. The sound reproduction device 1 includes the drive system 2 and the piezoelectric speaker 14 of the present embodiment. The sound reproduction device 1 can further include an external memory 20. The drive system 2 includes a circuit device 100 and a bridge circuit 12. The sound output device 10 is composed of the bridge circuit 12 and the piezoelectric speaker 14.

In FIG. 18, the circuit device 100 is realized by a microcomputer. Specifically, the circuit device 100 includes a PWM signal output circuit 110, a processing circuit 120, a memory 130, and an interface circuit 140. The processing circuit 120 corresponds to, for example, the CPU core of a microcomputer. When the circuit device 100 is realized by the microcomputer in this way, various sound reproduction processes are executed by using programs and data for operating the microcomputer, and the sound corresponding to various applications is produced by the piezoelectric speaker 14. It becomes possible to output from. The present embodiment is not limited to the configuration shown in FIG. 1, and various modifications such as omitting a part of the constituent elements or adding other constituent elements can be performed. For example, when the external memory 20 is not used, the circuit device 100 does not have to include the interface circuit 140.

The sound output device 10 outputs sound based on the PWM signal SPWM from the circuit device 100. Sound is voice or non-voice sound. Voice is the voice that a person makes. In the following, the case where the sound is voice will be mainly described. The sound output device 10 includes a piezoelectric speaker 14 and a bridge circuit 12.

The piezoelectric speaker 14 is realized by the piezo element 16 as described with reference to FIG. In the piezoelectric speaker 14, sound is output by vibrating the piezo element 16 which is a piezoelectric element by an electric signal. The piezoelectric speaker 14 can realize a small speaker that cannot output a part or all of the voice band, or a buzzer that outputs an alarm sound or the like instead of the voice output. The buzzer has a feature that the peak of the frequency characteristic is higher than the audio band and the reproducible band is narrower than that of the speaker for audio output.

The circuit device 100 outputs the PWM signal SPWM as the control signals SC1 and SC2 of FIG. The bridge circuit 12 amplifies the PWM signal SPWM, and drives the piezoelectric speaker 14 with the amplified signal. By outputting the PWM signals SPWM as the control signals SC1 and SC2 in this way, the circuit device 100 enables sound output by digital drive that does not require a D / A conversion circuit or an analog amplifier circuit.

The processing circuit 120 controls the PWM signal output circuit 110. Specifically, a command CMD instructing sound reproduction is issued to the PWM signal output circuit 110. When the PWM signal output circuit 110 receives the command CMD, the PWM signal output circuit 110 outputs the PWM signal SPWM to the sound output device 10. That is, the control signals SC1 and SC2 are output as the PWM signal SPWM. As a result, the sound is reproduced from the sound output device 10. The processing circuit 120 is a logic circuit. Specifically, the processing circuit 120 corresponds to the CPU core of a microcomputer that is a processor.

By the way, conventionally, a method of band expansion using a harmonic signal has been known. However, since the frequency characteristics of the speaker are not taken into consideration, there is a problem that high quality sound may not be reproduced. For example, if the frequency band reproducible by the speaker is narrow, or if the frequency band mainly included in the sound data does not match the frequency band reproducible by the speaker, high-quality sound may not be reproduced. There is. Therefore, in the present embodiment, the circuit device 100 outputs the PWM signal SPWM based on the pseudo sound data. Specifically, the PWM signal output circuit 110 of the circuit device 100 outputs the PWM signal SPWM based on the pseudo sound data. 19 and 20 are explanatory views of a method using pseudo sound data. In the pseudo sound data, the overtones belonging to the outputable band BDa among the plurality of overtones 2x, 3x, ... Of the multiple harmonics x of the fundamental tone x belonging to the non-output low band BDL are used.

The outputable band BDa is a frequency band in which the piezoelectric speaker 14 can output. Here, "outputtable" means that a sound pressure equal to or higher than a predetermined sound pressure PMINA that is audible to a person can be output. Specifically, the outputable band BDa is a frequency band in which the piezoelectric speaker 14 can output in the frequency characteristic FPC of the piezoelectric speaker 14. For example, the outputable band BDa is a frequency band in which a large sound pressure equal to or higher than a predetermined sound pressure PMINA audible to a human can be obtained in the frequency characteristic FPC. The non-output low band BDL is a frequency band lower than the lower limit fmin of the output possible band BDa. That is, the non-output low band BDL is a band on the low frequency side of the frequency bands having a sound pressure PMINA or less in the frequency characteristic FPC.

The overtone is a sound obtained by multiplying the frequency of the fundamental x by n. n is an integer of 2 or more. n is called a multiple, and a harmonic overtone obtained by multiplying the frequency of the fundamental x by n is called an n overtone. In FIG. 20, overtones of 3 or more overtones are included in the output possible band BDa. However, since the fundamental tone x is an arbitrary frequency included in the non-output low band BDL, the minimum harmonic overtone included in the output possible band BDa differs depending on the frequency of the fundamental tone x. That is, the lower the frequency of the fundamental tone x, the larger the multiple of the minimum harmonic overtone included in the outputable band BDa.

According to the present embodiment, the PWM signal output circuit 110 outputs the PWM signal SPWM based on the pseudo sound data using the overtones belonging to the output possible band BDa. As a result, the sound output from the piezoelectric speaker 14 becomes a sound as if the fundamental tone x belonging to the non-output low-band BDL is being output. That is, since the sound in the band that the piezoelectric speaker 14 cannot originally output is pseudo-output by using the overtones, high-quality sound reproduction becomes possible. For example, even if the piezoelectric speaker 14 is a small speaker that cannot output a part or all of the voice band, or a buzzer that does not assume voice output, the voice is produced by pseudo sound data using the harmonic component of the voice. It becomes possible to play in a pseudo manner.

More specifically, the PWM signal output circuit 110 outputs a PWM signal SPWM based on pseudo sound data using overtones belonging to a predetermined band BDb among a plurality of overtones 2x, 3x, .... The predetermined band BDb is a frequency band that includes the highest sound pressure peak in the frequency characteristic FPC of the piezoelectric speaker 14 and is within the output possible band BDa. As shown in FIG. 19, the frequency fbr that becomes the maximum sound pressure in the frequency characteristic FPC is the frequency of the sound pressure peak. The lower limit of the predetermined band BDb is higher than the lower limit of the outputable band BDa, and the upper limit of the predetermined band BDb is lower than the upper limit of the output possible band BDa. For example, the predetermined band BDb is a frequency band having a predetermined sound pressure PMINb higher than the sound pressure PMINa or higher in the frequency characteristic FPC. That is, setting a predetermined band BDb means setting a frequency band including a sound pressure of a predetermined magnitude in order to efficiently select a harmonic overtone having a sound pressure as high as possible. Therefore, any sound pressure PMINb larger than the sound pressure PMINa is meaningful as a predetermined band BDb.

The predetermined band BDb is a band near the sound pressure peak, which has a relatively high sound pressure, among the output possible bands BDa. In the present embodiment, the PWM signal output circuit 110 outputs the PWM signal SPWM based on the pseudo sound data using the overtones belonging to the predetermined band BDb. As a result, the sound is reproduced in a pseudo manner using a frequency band having good output characteristics of the sound output device 10, so that higher quality sound reproduction is possible.

When the reproduction target is voice, for example, the lower limit fmin of the output possible band BDa is 500 Hz or more, and the lower limit of the predetermined band BDb is 1 kHz or more.

Since audio contains many components of 1 kHz or less, if a piezoelectric speaker 14 that cannot reproduce all or part of a band of 1 kHz or less is used, low-quality audio can be reproduced simply by reproducing normal audio data as it is. It ends up. Poor quality is voice quality that is inaudible to humans. In the present embodiment, even when the piezoelectric speaker 14 is used such that the lower limit fmin of the output possible band BDa is 500 Hz or more, or the lower limit of the predetermined band BDb including the sound pressure peak is 1 kHz or more, it is within the predetermined band BDb. High-quality sound can be reproduced by using the overtones of.

Further, in the present embodiment, the pseudo sound data is, for example, high-pass filter processed or bandpass filtered sound data that passes through a predetermined band BDb. As described above, according to the present embodiment, the overtones contained in the predetermined band BDb are extracted by the high-pass filter process or the bandpass filter process for passing the predetermined band BDb. As a result, pseudo sound data using overtones belonging to the predetermined band BDb is generated. The details of the pseudo sound data generation method will be described later.

In FIGS. 19 and 20, the upper limit of the predetermined band BDb is lower than the upper limit of the outputable band BDa, but the present invention is not limited to this, and the upper limit of the predetermined band BDb may be higher than the upper limit of the outputable band BDa. For example, when the pseudo sound data is created by using the high-pass filter processing, the upper limit of the predetermined band BDb may be infinite.

Further, in the present embodiment, the processing circuit 120 issues a command CMD instructing the output of the PWM signal SPWM. When the PWM signal output circuit 110 receives the command CMD from the processing circuit 120, the PWM signal output circuit 110 generates a PWM signal SPWM from the pseudo sound data, and outputs the generated PWM signal SPWM to the sound output device 10.

As described above, according to the present embodiment, the PWM signal output circuit 110 generates the PWM signal SPWM from the pseudo sound data only by issuing the command CMD by the processing circuit 120. That is, the PWM signal output circuit 110 is a hardware circuit provided separately from the processing circuit 120, and the hardware circuit bears a processing load for generating the PWM signal SPWM. As a result, sound reproduction can be realized without increasing the load on the processing circuit 120. For example, as the circuit device 100, a microcomputer mounted on an electronic device can be assumed. In this case, the microcomputer needs to perform control processing of the electronic device. In the present embodiment, the resources of the processing circuit 120, which is the CPU core of the microcomputer, can be allocated to the control processing even during sound reproduction.

Although the PWM signal output circuit 110 is used as a hardware circuit in the above, the function of the PWM signal output circuit 110 may be realized by software processing. That is, the function of the PWM signal output circuit 110 may be realized by storing a program in which the function of the PWM signal output circuit 110 is described in a memory (not shown) and executing the program by the processing circuit 120. Even in this case, high-quality sound reproduction is possible by generating the PWM signal SPWM from the pseudo sound data using overtones.

A detailed configuration example of the PWM signal output circuit 110 will be described with reference to FIG. As shown in FIG. 18, the PWM signal output circuit 110 includes a sound data output circuit 111 and a PWM signal generation circuit 112.

The sound data output circuit 111 outputs the output sound data SDQ based on the pseudo sound data. The sound data output circuit 111 may output the pseudo sound data as output sound data SDQ after applying some processing to the pseudo sound data, or may output the pseudo sound data as it is as output sound data SDQ. For example, when the pseudo sound data is compressed data, the sound data output circuit 111 outputs the pseudo sound data as output sound data SDQ after expanding the pseudo sound data.

Specifically, the memory 130 built in the circuit device 100 stores the pseudo sound data SDTa. The memory 130 is a non-volatile memory or a semiconductor memory such as RAM. When the memory 130 is a non-volatile memory, pseudo sound data SDTa may be written in the memory 130 in advance. The sound data output circuit 111 reads the pseudo sound data SDTa stored in the memory 130, and outputs the output sound data SDQ based on the pseudo sound data SDTa.

Alternatively, the external memory 20 provided outside the circuit device 100 may store the pseudo sound data SDTb. The external memory 20 is a non-volatile memory or a semiconductor memory such as RAM. When the external memory 20 is a non-volatile memory, the pseudo sound data SDTb may be written in the external memory 20 in advance. The interface circuit 140 receives the pseudo sound data SDTb from the external memory 20. For example, the interface circuit 140 transmits a read command to the external memory 20, the external memory 20 reads the pseudo sound data SDTb in response to the read command, and transmits the pseudo sound data SDTb to the interface circuit 140. The sound data output circuit 111 outputs the output sound data SDQ based on the pseudo sound data SDTb received by the interface circuit 140.

The PWM signal generation circuit 112 generates a PWM signal SPWM based on the output sound data SDQ, and outputs the generated PWM signal SPWM to the sound output device 10. Specifically, the output sound data SDQ is converted into a PWM signal SPWM using a predetermined conversion rule. For example, the output sound data SDQ is time-series data obtained by sampling a sound waveform. The PWM signal generation circuit 112 converts each sampling data into a PWM signal having a pulse width corresponding to the value of the sampling data.

The above reproduction process is executed by using the command CMD issued by the processing circuit 120 as a trigger. That is, when the sound data output circuit 111 receives the command CMD, the pseudo sound data is read from the memory 130 or the external memory 20, and the output sound data SDQ is output to the PWM signal generation circuit 112 based on the pseudo sound data. Upon receiving the output sound data SDQ, the PWM signal generation circuit 112 outputs the PWM signal SPWM to the sound output device 10. In this way, when the processing circuit 120 issues the command CMD, the sound is reproduced from the sound output device 10 based on the pseudo sound data.

3. 3. Pseudo-sound data generation method FIG. 21 is a diagram illustrating a pseudo-sound data generation method. In FIG. 21, only the blocks related to the pseudo sound data generation in the circuit device 100 are shown, and the other blocks are not shown.

In the pseudo sound data generation method of the present embodiment, the processing device 200, which is an external device of the circuit device 100, generates the pseudo sound data. The processing device 200 is an information processing device such as a PC (Personal Computer) or a server.

The processing device 200 extracts a component of the predetermined band BDb from the sound data VDT and emphasizes the component of the predetermined band BDb to generate pseudo sound data SDTa. The sound data VDT is the original sound data in which the components of the predetermined band BDb are not emphasized. For example, the sound data VDT is sound data recorded for a speaker for normal sound reproduction.

FIG. 22 is a diagram illustrating the operation of the processing device 200. The sound data VDT has a sound pressure peak on the lower frequency side than the predetermined band BDb. That is, normally, sound data VDT that is not suitable for reproduction by the sound output device 10 is assumed.

As shown in FIG. 21, the processing device 200 performs bandpass filter processing 221 on the sound data VDT, and gain processing 222 on the resulting sound data BPQ. The processing device 200 outputs the result of the gain processing 222 as pseudo sound data SDTa. As shown in FIG. 22, the bandpass filter processing 221 has a frequency characteristic CBP having a predetermined band BDb as a pass band. The processing device 200 may output the sound data BPQ by performing a high-pass filter process on the sound data VDT. In this case as well, the pass band of the high-pass filter processing becomes the predetermined band BDb. That is, the cutoff frequency of the high-pass filter processing is the lower limit of the predetermined band BDb.

The gain processing 222 generates pseudo sound data SDTa by multiplying the sound pressure of the sound data BPQ by the gain. For example, the gain is constant regardless of frequency. The gain may be variable. Further, the gain may be an arbitrary real number multiple larger than 0. The generated pseudo sound data SDTa is stored in the memory 130 of the circuit device 100.

As shown in FIG. 22, the frequency characteristic of the sound data BPQ is such that the component in the predetermined band BDb of the sound data VDT is lifted and the component outside the predetermined band BDb is attenuated. That is, the sound data BPQ has a frequency characteristic in which the band is expanded to the high frequency side rather than the frequency characteristic of the normal voice data. Similarly, the pseudo sound data SDTa also has a frequency characteristic in which the band is expanded to the high frequency side rather than the frequency characteristic of the normal voice data.

Although the case where the pseudo sound data generated by the processing device 200 is stored in the memory 130 has been described above as an example, the pseudo sound data generated by the processing device 200 may be stored in the external memory 20. The pseudo sound data in this case corresponds to SDTb in FIG.

4. Electronic device FIG. 23 is a configuration example of an electronic device 400 including the drive system 2 of the present embodiment. The electronic device 400 includes a sound reproduction device 1, a processing device 300, an operation interface 310, a memory 320, and a communication interface 330. The sound reproduction device 1 includes a drive system 2 and a piezoelectric speaker 14. As the electronic device 400, various electronic devices having a sound output function can be assumed. For example, as the electronic device 400, a household electronic device having a voice guidance function, a notification device such as a fire alarm, a robot having a voice output function, an in-vehicle device such as a car navigation system, or the like can be assumed.

The communication interface 330 is an interface for communicating with an external device. The external device is, for example, an information processing device such as a PC. The communication interface 330 may be a communication interface such as a USB standard, or may be a network interface such as a LAN. The memory 320 stores the data input from the communication interface 330. Further, the memory 320 may function as a work memory of the processing device 300. The memory 320 can be realized by various storage devices such as a semiconductor memory or a hard disk drive. The operation interface 310 is a user interface for the user to operate the electronic device 400. For example, the operation interface 310 is a button or touch panel, a pointing device, a character input device, or the like. The processing device 300 is realized by a processor such as a CPU or an MPU. The processing device 300 processes the data stored in the memory 320 and controls each part of the electronic device 400.

As described above, the drive system of the present embodiment includes a bridge circuit for driving a piezoelectric speaker provided between the first drive node and the second drive node, and a first control signal and a first control signal for the bridge circuit. 2 Includes a circuit device that outputs control signals. The bridge circuit is provided between the first resistor provided between the power supply node and the first drive node, and the first FET provided between the first drive node and the ground node and inputting the first control signal to the gate. , The second resistor provided between the power supply node and the second drive node, the second FET provided between the second drive node and the ground node, and the second control signal is input to the gate, and the first drive. Includes a third resistor provided between the node and one end of the piezoelectric speaker.

According to the present embodiment, the bridge circuit includes a first FET, a second FET, a first resistor, and a second resistor, and a circuit device has a first control signal and a first control signal at the gates of the first FET and the second FET of the bridge circuit, respectively. 2 Outputs a control signal. This makes it possible to drive the piezoelectric speaker by the bridge circuit. In the present embodiment, since the bridge circuit is composed of the first FET and the second FET which are field effect transistors, the circuit device has a drive current of a small current value required for charging and discharging the gate electrodes of the first FET and the second FET. You only have to shed. Further, in the present embodiment, the bridge circuit further includes a third resistor. If such a third resistor is provided, the third resistor functions as a current limiting element. As a result, when the first FET and the second FET constituting the bridge circuit are switched on and off, it is possible to prevent an excessive current from momentarily flowing through the piezoelectric speaker and causing various problems.

Further, in the present embodiment, the third resistor may be a resistor for reducing EMI noise generated when the polarity of the voltage applied to the piezoelectric speaker is reversed.

By doing so, it is possible to prevent an excessive current from flowing when the polarity of the voltage applied to the piezoelectric speaker is reversed, causing EMI noise to occur and causing malfunction of the device due to the EMI noise. ..

Further, in the present embodiment, when the power supply voltage supplied from the power supply node to the bridge circuit is VCS, k = 0.5 × VCS + 1.8, and the rated current of the piezo element constituting the piezoelectric speaker is IL, the first is The resistance value r3 of the three resistors may be set to r3> k / (4 × IL).

In this way, the resistance value r3 of the third resistor is set to an appropriate resistance value according to the voltage of the VCS supplied to the bridge circuit and the rated current of the piezo element constituting the piezoelectric speaker, and the EMI noise is generated. It becomes possible to reduce the number of problems and prevent the occurrence of failure of the piezoelectric speaker.

Further, in the present embodiment, the bridge circuit is supplied with a power supply voltage VCS different from the power supply voltage of the circuit device, and the resistance value r3 of the third resistor may be set to a value corresponding to the VCS.

In this way, the resistance value r3 of the third resistor can be set to an appropriate resistance value according to the power supply voltage VCS of the bridge circuit, and the destruction of the piezo element can be avoided and the EMI noise can be reduced.

Further, in the present embodiment, the circuit device operates the bridge circuit in a state where the power supply voltage from the power supply node is supplied to the bridge circuit by setting the first control signal and the second control signal to the low level. You may turn it off.

In this way, it is possible to turn off the operation of the bridge circuit without consuming unnecessary power in the bridge circuit, and it is possible to realize a power saving mode.

Further, in the present embodiment, the circuit device drives the piezoelectric speaker by the bridge circuit by performing the sound reproduction processing for generating the first control signal and the second control signal based on the sound data, and performs the sound reproduction processing. When not available, the first control signal and the second control signal may be set to low level.

In this way, at the time of sound reproduction, the circuit device outputs the first control signal and the second control signal based on the sound data, so that the piezoelectric speaker can be driven by the bridge circuit. When the sound is not reproduced, the first control signal and the second control signal are set to a low level, so that the first FET and the second FET are turned off and no current flows, and the operation of the bridge circuit is turned off. It will be possible to realize a power saving mode.

Further, in the present embodiment, the circuit device may operate based on a power supply voltage different from the power supply voltage supplied to the power supply node to output the first control signal and the second control signal.

In this way, even if the power supply voltage of the bridge circuit becomes a different voltage depending on the device in which the drive system is incorporated, this can be dealt with. Since the functions of the two transistors on the high potential side of the bridge circuit are substituted by the first resistor and the second resistor, the level shifter becomes unnecessary, and the circuit device can be downsized.

Further, in the present embodiment, the circuit device may be a microcomputer.

In this way, it is possible to execute various sound reproduction processes using a program or data for operating a microcomputer, and output sounds corresponding to various applications from the piezoelectric speaker.

Further, in the present embodiment, the circuit device may output a PWM signal as a first control signal and a second control signal.

In this way, sound output by digital drive that does not require a D / A conversion circuit or an analog amplifier circuit becomes possible.

Further, in the present embodiment, the circuit device may include a PWM signal output circuit that outputs a PWM signal as a first control signal and a second control signal, and a processing circuit that controls the PWM signal output circuit. When the frequency band that the piezoelectric speaker can output is the output band and the frequency band lower than the lower limit of the output band is the non-output low band, the PWM signal output circuit is a plurality of harmonics of the basic tone belonging to the non-output low band. Of these, a PWM signal based on pseudo sound data using harmonics belonging to the outputable band may be output.

In this way, the sound is output from the piezoelectric speaker based on the pseudo sound data using the overtones belonging to the output possible band of the piezoelectric speaker. As a result, non-output low-band sound that cannot be output by the piezoelectric speaker is output in a pseudo manner by using overtones, so that high-quality sound reproduction becomes possible.

Further, in the present embodiment, when the frequency band including the highest sound pressure peak in the frequency characteristics of the piezoelectric speaker and within the outputable band is set as a predetermined band, the PWM signal output circuit is a harmonic that belongs to a predetermined band among a plurality of harmonics. A PWM signal based on the pseudo sound data using the above may be output.

In this way, the sound is output from the piezoelectric speaker based on the pseudo sound data using the overtones belonging to the predetermined band near the sound pressure peak where the sound pressure is relatively high in the outputable band. As a result, the sound is reproduced in a pseudo manner using the frequency band in which the output characteristics of the piezoelectric speaker are good, so that higher quality sound reproduction becomes possible.

Further, in the present embodiment, the pseudo sound data may be sound data that has been subjected to high-pass filter processing or band-pass filter processing to pass a predetermined band.

In this way, pseudo sound data using the overtones belonging to a predetermined band among the plurality of overtones of the fundamental tone belonging to the non-output low band can be generated.

The present embodiment also relates to a sound reproduction device including the drive system described above and a piezoelectric speaker.

The present embodiment also relates to an electronic device including the drive system described above.

Although the present embodiment has been described in detail as described above, those skilled in the art will easily understand that many modifications that do not substantially deviate from the new matters and effects of the present disclosure are possible. Therefore, all such variations are included in the scope of the present disclosure. For example, a term described at least once in a specification or drawing with a different term in a broader or synonymous manner may be replaced by that different term anywhere in the specification or drawing. All combinations of the present embodiment and modifications are also included in the scope of the present disclosure. Further, the configuration and operation of the drive system, the bridge circuit, the circuit device, the piezoelectric speaker, the sound reproduction device, the electronic device, and the like are not limited to those described in the present embodiment, and various modifications can be performed.

1 ... Sound reproduction device, 2 ... Drive system, 10 ... Sound output device, 12 ... Bridge circuit,
14 ... Piezoelectric speaker, 16 ... Piezo element, 20 ... External memory, 100 ... Circuit device,
110 ... PWM signal output circuit, 111 ... sound data output circuit,
112 ... PWM signal generation circuit, 120 ... processing circuit, 130 ... memory,
140 ... interface circuit, 200 ... processing device,
221 ... Bandpass filter processing, 222 ... Gain processing,
300 ... Processing device, 310 ... Operation interface, 320 ... Memory,
330 ... communication interface, 400 ... electronic equipment,
BDL ... non-output low band, BDa ... output possible band, BDb ... predetermined band,
BPQ ... Sound data, CBP ... Frequency characteristics, CMD ... Command,
FET1, FET2 ... Field effect transistor, I1, I2, I3, I4 ... Current,
IL ... Rated current, IPK ... Peak current, ND1, ND2 ... Drive node,
PMINa, PMINb ... Sound pressure, R1, R2, R3 ... Resistance,
SC1, SC2 ... control signal, SDQ ... output sound data,
SDTa, SDTb ... Pseudo sound data, SPWM ... PWM signal,
VCS, VDD ... Power supply voltage, VDT ... Sound data, fbr ... Frequency,
fmin ... lower limit, k ... slope, r1, r2, r3 ... resistance value, x ... fundamental tone, 2x-6x ... harmonic overtone,
E1 ... EMI noise, A1, A2, B1, B2, C1, C2 ... spike current

Claims (14)

A bridge circuit that drives a piezoelectric speaker provided between the first drive node and the second drive node,
A circuit device that outputs a first control signal and a second control signal to the bridge circuit, and
Including
The bridge circuit
A first resistor provided between the power supply node and the first drive node,
A first FET provided between the first drive node and the ground node and to which the first control signal is input to the gate,
A second resistor provided between the power supply node and the second drive node,
A second FET provided between the second drive node and the ground node and to which the second control signal is input to the gate,
A third resistor provided between the first drive node and one end of the piezoelectric speaker,
A drive system characterized by including. In the drive system according to claim 1,
The drive system is characterized in that the third resistor is a resistor for reducing EMI noise generated when the polarity of the voltage applied to the piezoelectric speaker is reversed. In the drive system according to claim 1 or 2.
When the power supply voltage supplied from the power supply node to the bridge circuit is VCS, k = 0.5 × VCS + 1.8, and the rated current of the piezo element constituting the piezoelectric speaker is IL, the third resistor is used. The resistance value r3 of is set to r3> k / (4 × IL). In the drive system according to claim 3,
The bridge circuit is a drive system characterized in that a power supply voltage VCS different from the power supply voltage of the circuit device is supplied, and the resistance value r3 of the third resistor is set to a value corresponding to the VCS. In the drive system according to any one of claims 1 to 4.
The circuit device
By setting the first control signal and the second control signal to a low level, the operation of the bridge circuit can be turned off while the power supply voltage from the power supply node is supplied to the bridge circuit. The characteristic drive system. In the drive system according to any one of claims 1 to 4.
The circuit device
When the piezoelectric speaker is driven by the bridge circuit by performing sound reproduction processing that generates a first control signal and a second control signal based on sound data, and the sound reproduction processing is not performed, the first control A drive system characterized in that a signal and the second control signal are set to a low level. In the drive system according to any one of claims 1 to 6,
The circuit device
A drive system characterized in that it operates based on a power supply voltage different from the power supply voltage supplied to the power supply node and outputs the first control signal and the second control signal. In the drive system according to any one of claims 1 to 7.
The circuit device is a drive system characterized by being a microcomputer. In the drive system according to any one of claims 1 to 8.
The circuit device
A drive system characterized in that a PWM signal is output as the first control signal and the second control signal. In the drive system according to any one of claims 1 to 8.
The circuit device
A PWM signal output circuit that outputs a PWM signal as the first control signal and the second control signal, and
A processing circuit that controls the PWM signal output circuit and
Including
When the frequency band that can be output by the piezoelectric speaker is defined as the outputable band and the frequency band lower than the lower limit of the outputable band is defined as the non-output low band.
The PWM signal output circuit
A drive system characterized by outputting the PWM signal based on pseudo sound data using the overtones belonging to the outputtable band among a plurality of overtones of the fundamental tone belonging to the non-output low band. In the drive system according to claim 10,
When the highest sound pressure peak in the frequency characteristics of the piezoelectric speaker is included and the frequency band within the outputable band is set as a predetermined band,
The PWM signal output circuit
A drive system characterized by outputting the PWM signal based on the pseudo sound data using the overtones belonging to the predetermined band among the plurality of overtones. In the drive system according to claim 11,
The drive system, wherein the pseudo sound data is sound data that has been subjected to a high-pass filter process or a band-pass filter process that allows the predetermined band to pass through. The drive system according to any one of claims 1 to 12.
With the piezoelectric speaker
A sound reproduction device characterized by including. An electronic device comprising the drive system according to any one of claims 1 to 12.

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