JP2021106222A - Photoelectric conversion device - Google Patents

Abstract

To provide a photoelectric conversion device that can improve the characteristics of transferring a signal load from a photoelectric conversion unit to a floating diffusion unit.SOLUTION: A photoelectric conversion device has: a semiconductor layer that includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type different from the first conductivity type; a transfer electrode that is provided on the semiconductor layer and transfers an electric charge generated in photoelectric conversion in the second semiconductor region; and a member that is formed of the same material as the transfer electrode and is provided separate from the transfer electrode to cover the second semiconductor region. The first semiconductor region is located between the second semiconductor region and the member. The semiconductor layer has an impurity region at a position overlapping a portion between the transfer electrode and the member. The gross concentration of impurities in at least a part of the impurity region is higher than the gross concentration of impurities in the first semiconductor region.SELECTED DRAWING: Figure 4

Description

The present invention relates to a photoelectric conversion device.

In Patent Document 1, a film having stress is arranged at a position overlapping with a photoelectric conversion portion provided on the silicon layer, and strain is applied to the silicon layer to make this strain portion function as a gettering site. Techniques for capturing contaminant metals in the layer are described. By capturing the contaminated metal in the silicon layer in this way, it is possible to reduce the noise component superimposed on the pixel signal.

Japanese Unexamined Patent Publication No. 2010-192794

In the solid-state image sensor described in Patent Document 1, a stressed gettering layer is arranged in the vicinity of the gate electrode of the transfer transistor for transferring the signal charge of the photoelectric conversion unit to the floating diffusion unit. Therefore, a parasitic capacitance is generated between the gate electrode of the transfer transistor and the gettering layer, and the transfer characteristic of the signal charge from the photoelectric conversion part to the stray diffusion part may be deteriorated. In addition, the transfer characteristics may vary due to the misalignment between the photoelectric conversion unit and the gate electrode of the transfer transistor.

An object of the present invention is to provide a photoelectric conversion device capable of improving the transfer characteristics of signal charges from a photoelectric conversion unit to a floating diffusion unit.

According to one aspect of the present invention, a semiconductor layer including a first conductive type first semiconductor region and a second conductive type second semiconductor region different from the first conductive type, and the semiconductor layer. It is made of a transfer electrode provided above and for transferring the charge generated by photoelectric conversion in the second semiconductor region and the same material as the transfer electrode, and is separated from the transfer electrode to cover the second semiconductor region. The first semiconductor region is located between the second semiconductor region and the member, and the semiconductor layer is located between the transfer electrode and the member. Provided is a photoelectric conversion device having an impurity region at a position overlapping the portion of the above, and the impurity concentration of at least a part of the gloss of the impurity region is higher than the impurity concentration of the gloss of the first semiconductor region.

Further, according to another aspect of the present invention, the photoelectric conversion unit provided on the semiconductor layer, the transfer electrode provided on the semiconductor layer and transferring the electric charge generated by the photoelectric conversion unit, and the transfer. It is made of the same material as the electrode, has a member provided so as to cover the photoelectric conversion portion, separated from the transfer electrode, and a portion between the transfer electrode and the member is made of silicon nitride. Also provided is a photoelectric conversion device in which a substance having a low dielectric constant is arranged.

According to the present invention, in the photoelectric conversion device, the transfer characteristic of the signal charge from the photoelectric conversion unit to the floating diffusion unit can be improved.

It is a block diagram which shows the schematic structure of the photoelectric conversion apparatus by 1st Embodiment of this invention. It is a circuit diagram which shows the structural example of the pixel in the photoelectric conversion apparatus according to 1st Embodiment of this invention. It is a top view of the pixel in the photoelectric conversion apparatus according to 1st Embodiment of this invention. It is schematic cross-sectional view of the pixel in the photoelectric conversion apparatus according to 1st Embodiment of this invention. It is a process sectional view (the 1) which shows the manufacturing method of the photoelectric conversion apparatus by 1st Embodiment of this invention. It is a process sectional view (the 2) which shows the manufacturing method of the photoelectric conversion apparatus by 1st Embodiment of this invention. It is a process sectional view (the 3) which shows the manufacturing method of the photoelectric conversion apparatus by 1st Embodiment of this invention. It is a process sectional view (the 4) which shows the manufacturing method of the photoelectric conversion apparatus by 1st Embodiment of this invention. It is a process sectional view (No. 5) which shows the manufacturing method of the photoelectric conversion apparatus by 1st Embodiment of this invention. It is a process sectional view (No. 6) which shows the manufacturing method of the photoelectric conversion apparatus by 1st Embodiment of this invention. It is a circuit diagram which shows the structural example of the pixel in the photoelectric conversion apparatus by 2nd Embodiment of this invention. It is a top view of the pixel in the photoelectric conversion apparatus according to 2nd Embodiment of this invention. It is a block diagram which shows the schematic structure of the image pickup system according to 3rd Embodiment of this invention. It is a figure which shows the structural example of the image pickup system and the moving body by 4th Embodiment of this invention. It is a block diagram which shows the schematic structure of the apparatus by 5th Embodiment of this invention.

[First Embodiment]
The configuration of the photoelectric conversion device according to the first embodiment of the present invention will be described with reference to FIGS. 1 to 4. FIG. 1 is a block diagram showing a schematic configuration of a photoelectric conversion device according to the present embodiment. FIG. 2 is a circuit diagram showing a configuration example of pixels in the photoelectric conversion device according to the present embodiment. FIG. 3 is a plan view of pixels in the photoelectric conversion device according to the present embodiment. FIG. 4 is a schematic cross-sectional view of pixels in the photoelectric conversion device according to the present embodiment.

As shown in FIG. 1, the photoelectric conversion device 100 according to the present embodiment includes a pixel region 10, a vertical scanning circuit 30, a reading circuit 40, a horizontal scanning circuit 50, an output circuit 60, and a control circuit 70. ..

The pixel region 10 is provided with a plurality of pixels 12 arranged in a matrix over a plurality of rows and a plurality of columns. Each pixel 12 includes a photoelectric conversion unit that converts incident light into an electric charge according to the amount of light thereof. The number of rows and columns of the pixels 12 arranged in the pixel area 10 is not particularly limited. By arranging a plurality of pixels 12 in the pixel area 10, it is possible to have a function as an area sensor. In the pixel area 10, in addition to the pixel 12 that outputs a signal according to the amount of incident light, other pixels (not shown) such as a shaded optical black pixel and a dummy pixel that does not output a signal are arranged. It may have been done.

A control line 14 extending in the first direction (horizontal direction in FIG. 1) is arranged in each line of the pixel region 10. The control line 14 is connected to each of the pixels 12 arranged in the first direction, and forms a signal line common to these pixels 12. The first direction in which the control line 14 extends is sometimes referred to as a row direction or a horizontal direction. The control line 14 of each line is connected to the vertical scanning circuit 30. The control line 14 of each line may include a plurality of signal lines.

Each row of the pixel region 10 is provided with an output line 16 extending in a second direction (vertical direction in FIG. 1) intersecting the first direction. The output lines 16 are connected to pixels 12 arranged in the second direction, respectively, and form a signal line common to these pixels 12. The extending second direction of the output line 16 may be referred to as a column direction or a vertical direction. The output line 16 of each column is connected to the read circuit 40.

The vertical scanning circuit 30 transmits a control signal for driving the reading circuit in the pixel 12 to the pixel 12 via a control line 14 provided for each row of the pixel region 10 when reading a signal from each of the pixels 12. It is a control unit that supplies. The vertical scanning circuit 30 may be configured by using a shift register or an address decoder. The signal read from the pixel 12 is input to the reading circuit 40 via the output lines 16 provided for each row of the pixel area 10.

The reading circuit 40 is a circuit unit that performs predetermined processing, for example, signal processing such as amplification processing and addition processing, on the signal read from the pixel 12. The readout circuit 40 may include a signal holding unit, a column amplifier, a correlated double sampling (CDS) circuit, an adder circuit, and the like. The readout circuit 40 may further include an A / D conversion circuit or the like, if necessary.

The horizontal scanning circuit 50 is a circuit unit that supplies a control signal for sequentially transferring the signals processed by the reading circuit 40 to the output circuit 60 for each row to the reading circuit 40. The horizontal scanning circuit 50 may be configured by using a shift register or an address decoder. The output circuit 60 is composed of a buffer amplifier, a differential amplifier, and the like, and is a circuit unit for amplifying and outputting a signal in a row selected by the horizontal scanning circuit 50.

The control circuit 70 is a circuit unit for supplying a control signal for controlling the operation and timing of the vertical scanning circuit 30, the reading circuit 40, and the horizontal scanning circuit 50. A part or all of the control signals supplied to the vertical scanning circuit 30, the reading circuit 40, and the horizontal scanning circuit 50 may be supplied from the outside of the photoelectric conversion device 100.

Each of the pixels 12 may include, for example, as shown in FIG. 2, a photoelectric conversion unit PD, a transfer transistor M1, a reset transistor M2, an amplification transistor M3, and a selection transistor M4.

The photoelectric conversion unit PD is, for example, a photodiode. In the photodiode of the photoelectric conversion unit PD, the anode is connected to the ground voltage node and the cathode is connected to the source of the transfer transistor M1. The drain of the transfer transistor M1 is connected to the source of the reset transistor M2 and the gate of the amplification transistor M3. The connection node of the drain of the transfer transistor M1, the source of the reset transistor M2, and the gate of the amplification transistor M3 is a so-called floating diffusion unit FD. The floating diffusion unit FD includes a capacitance component (floating diffusion capacitance), and constitutes a charge holding portion by this capacitance component.

The drain of the reset transistor M2 and the drain of the amplification transistor M3 are connected to the power supply voltage node (voltage Vdd). The voltage supplied to the drain of the reset transistor M2 and the voltage supplied to the drain of the amplification transistor M3 may be the same or different. The source of the amplification transistor M3 is connected to the drain of the selection transistor M4. The source of the selection transistor M4 is connected to the output line 16 of the column corresponding to the pixel 12. A current source 18 is connected to the output line 16.

In the case of the pixel 12 having the configuration shown in FIG. 2, the control line 14 arranged in each line of the pixel area 10 includes three signal lines for supplying the control signals TX, RES, and SEL. The signal line for supplying the control signal TX is connected to the gate of the transfer transistor M1 of the pixel 12 belonging to the corresponding line, and forms a common signal line for these pixels 12. The signal line for supplying the control signal RES is connected to the gate of the reset transistor M2 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal SEL is connected to the gate of the selection transistor M4 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. When each transistor constituting the pixel 12 is composed of an N-type transistor, the corresponding transistor is turned on by supplying a high-level control signal from the vertical scanning circuit 30. Further, when the low level control signal is supplied from the vertical scanning circuit 30, the corresponding transistor is turned off.

The photoelectric conversion unit PD converts the incident light into an amount of electric charge corresponding to the amount of light (photoelectric conversion), and accumulates the generated electric charge. The transfer transistor M1 is controlled by the control signal TX, and when it is turned on, the electric charge held by the photoelectric conversion unit PD is transferred to the floating diffusion unit FD. The floating diffusion unit FD holds the electric charge transferred from the photoelectric conversion unit PD, and sets the voltage to a predetermined voltage according to the capacity of the floating diffusion unit FD and the amount of the transferred electric charge. The reset transistor M2 is controlled by the control signal RES, and when it is turned on, the floating diffusion unit FD is reset to a predetermined voltage corresponding to the voltage Vdd.

The amplification transistor M3 has a configuration in which a voltage Vdd is supplied to the drain and a bias current is supplied to the source from the current source 18 via the output line 16. An amplification unit (source follower circuit) having a gate as an input node. Consists of. As a result, the amplification transistor M3 outputs a signal to the output line 16 according to the amount of electric charge generated by the incident light on the photoelectric conversion unit PD.

Among these constituent elements of the pixel 12, specific configuration examples of the photoelectric conversion unit PD and the transfer transistor M1, which are the main characteristic parts of the photoelectric conversion device according to the present embodiment, will be described with reference to FIGS. 3 and 4. FIG. 3 is a plan layout view seen from the normal direction of the substrate on which the photoelectric conversion device is formed, and FIG. 4 is a cross-sectional view taken along the line AA'of FIG. Note that FIGS. 3 and 4 show only the main components of the photoelectric conversion unit PD and the transfer transistor M1, wiring such as control lines 14 and output lines 16, optical structures such as color filters and microlenses, and the like. Is omitted.

Each element constituting the pixel 12 is provided on a semiconductor layer 112 having a pair of facing surfaces, a first surface 114 and a second surface 116. On the surface portion of the semiconductor layer 112 on the side of the first surface 114, an element separation region 118 that defines an active region is provided on the first surface 114. An insulating structure formed by, for example, the STI (Shallow Trench Isolation) method or the LOCOS (LOCal Oxidation of Silicon) method can be applied to the element separation region 118.

The p-type semiconductor region 120 and the n-type semiconductor region 122 and the n-type semiconductor region 124 are provided on the surface portion of the active region defined on the first surface 114 by the element separation region 118 so as to be separated from each other. .. The p-type semiconductor region 120 is in contact with the first surface 114 and forms a PN junction with the n-type semiconductor region 122 at the bottom thereof. The n-type semiconductor region 122 forms a PN junction with the p-type semiconductor region 123 (p-well) formed under the n-type semiconductor region 122. A photodiode as a photoelectric conversion unit PD is configured by a PN junction between the n-type semiconductor region 122 and the p-type semiconductor region 123. The photodiode that constitutes the photoelectric conversion unit PD is an embedded photodiode having an n-type semiconductor region 122, a p-type semiconductor region 123, and a p-type semiconductor region 120 that serves as a surface protection layer. The n-type semiconductor region 122 has a role as a charge storage layer for accumulating signal charges (electrons). The signal charge does not necessarily have to be an electron, but may be a hole. In this case, the conductive type of each semiconductor region is a reverse conductive type.

A transfer electrode 130 is provided on the first surface 114 of the semiconductor layer 112 between the n-type semiconductor region 122 and the n-type semiconductor region 124 via a gate insulating film 128. As a result, the transfer transistor M1 having the n-type semiconductor region 122 as the source, the n-type semiconductor region 124 as the drain, and the MOS structure including the transfer electrode 130 as the gate is configured. The transfer electrode 130 is a gate electrode of the transfer transistor M1. The n-type semiconductor region 124 constitutes the drain of the transfer transistor M1 and is also a floating diffusion unit FD. The gate insulating film 128 may be made of an insulating material such as silicon oxide. The transfer electrode 130 may be made of a conductive material such as polysilicon.

A member 132 made of the same material as the transfer electrode 130 is provided via an insulating film 126 on the first surface 114 of the semiconductor layer 112 in the region where the photoelectric conversion unit PD is provided. The member 132 is provided at a predetermined distance and physically separated from the transfer electrode 130. In the present specification, the gap between the transfer electrode 130 and the member 132 is referred to as a gap 134. It is desirable that the member 132 is provided on the entire surface of the photoelectric conversion unit PD except for the region overlapping the transfer electrode 130 and the gap portion 134 in a plan view. In the present specification, the plan view corresponds to a plan layout view in which each part is vertically projected on a projection plane parallel to the main plane of the semiconductor layer 112.

The insulating film 126 may be made of an insulating material such as silicon oxide. The insulating film 126 may be composed of an insulating film formed at the same time as the gate insulating film 128. As described above, the member 132 may be made of the same material as the transfer electrode 130, for example polysilicon. The member 132 may be composed of a conductive film formed at the same time as the conductive film constituting the transfer electrode 130. In addition, polysilicon can function as a gettering site for metal impurities (metal contamination) and also as a light absorption layer. Therefore, the member 132 can be polysilicon containing metal impurities. The metal impurities that can be contained in the member 132 can be iron group elements such as iron, cobalt, and nickel.

An impurity region 136 whose position is defined by the transfer electrode 130 and the member 132 is provided at the end of the junction between the p-type semiconductor region 120 and the n-type semiconductor region 122 on the transfer electrode 130 side. The impurity region 136 is a region into which an n-type or p-type impurity is introduced in addition to the impurities constituting the p-type semiconductor region 120 and the n-type semiconductor region 122. The position defined by the transfer electrode 130 and the member 132 means that the impurity region 136 is provided in a self-aligned manner with respect to the transfer electrode 130 and the member 132.

A buffer film 140, an etching stop film 144, and an interlayer insulating film 146 are provided in this order on the first surface 114 of the semiconductor layer 112 on which the transfer electrode 130 and the member 132 are provided. In the buffer film 140, the etching stop film 144, and the interlayer insulating film 146, a contact plug 148 electrically connected to the transfer electrode 130, a contact plug 150 electrically connected to the n-type semiconductor region 124, and the like. Is provided.

The buffer film 140 has a role of relieving stress between the etching stop film 144 and the semiconductor layer 112, and may be made of an insulating material such as silicon oxide. The etching stop film 144 has a role as an etching stopper when forming contact holes for embedding contact plugs 148 and 150 in the interlayer insulating film 146, and may be made of an insulating material such as silicon nitride, for example. .. The interlayer insulating film 146 may be made of an insulating material such as silicon oxide.

Further above the interlayer insulating film 146, wiring, a sealing film, a support substrate, and the like necessary for forming the pixel circuit of FIG. 2 are provided, although illustration and detailed description thereof are omitted here.

On the other hand, on the second surface 116 opposite to the first surface 114 on which the transfer electrode 130, the member 132, etc. are provided with respect to the semiconductor layer 112, a pinning film (not shown), an antireflection film, or the like is interposed. , The interlayer insulating film 152 and the sealing film 156 are provided in this order. The interlayer insulating film 152 is provided with a light-shielding film 154 for suppressing light incident on a region other than the photoelectric conversion unit PD. The light-shielding film 154 is arranged so as to surround the light-receiving region of each pixel 12 so as to prevent optical color mixing between the pixels. The light-shielding film 154 may be a wiring or an electrode, or may be a part of a metal layer constituting the wiring or the electrode. Further, an optical structure such as a color filter or a microlens (not shown) is arranged on the light incident side of the sealing film 156.

The pinning film may be made of an insulating material such as _{Al 2} O _{3 or HfO.} The antireflection film may be made of an insulating material such as _{Ta 2} O _5. The interlayer insulating film 146 may be made of an insulating material such as silicon oxide. The sealing film 156 can be made of an insulating material having excellent moisture resistance such as silicon nitride. The sealing film 156 may be formed of a laminated film in order to enhance the antireflection function. In this case, the sealing film 156 may be composed of, for example, a laminated film of a silicon oxynitride film and a silicon nitride film. The light-shielding film 154 can be made of, for example, a metal material such as Al, W, or Cu.

As described above, the photoelectric conversion device according to the present embodiment is a back-illuminated photoelectric conversion device that receives light incident from the side of the second surface 116 of the semiconductor layer 112 by the photoelectric conversion unit PD. When light is incident on the photoelectric conversion unit PD from the side of the second surface 116 of the semiconductor layer 112, signal charges (electrons) corresponding to the amount of incident light are generated by the photoelectric conversion in the photoelectric conversion unit PD. The signal charge generated by the photoelectric conversion unit PD is accumulated in the n-type semiconductor region 122. The signal charge accumulated in the photoelectric conversion unit PD is transferred from the n-type semiconductor region 122 to the n-type semiconductor region 124 when the transfer transistor M1 is turned on.

Here, in the photoelectric conversion device according to the present embodiment, the insulating film 126 is provided on the side of the first surface 114 of the semiconductor layer 112 opposite to the side of the second surface 116 on which light is incident so as to cover the photoelectric conversion unit PD. It has a member 132 provided therethrough.

The member 132 is arranged on the side of the first surface 114 of the semiconductor layer 112 so as to cover the photoelectric conversion unit PD. The member 132 has a role of capturing metal impurities contained in the semiconductor layer 112 and metal impurities generated in a step after the step of forming the member 132, and suppressing noise generation caused by these metal impurities.

In order to enhance the gettering effect of metal impurities, it is desirable that the member 132 has a larger area. For example, by arranging the member 132 on the entire surface of the photoelectric conversion unit PD excluding the region overlapping the transfer electrode 130 and the gap 134, the metal impurities generated in the process after the step of forming the member 132 are removed from the photoelectric conversion unit. It can effectively prevent infiltration into PD.

Further, the member 132 also has a role as a light absorption layer that absorbs the light that has passed through without being absorbed by the photoelectric conversion unit PD among the light incident from the side of the second surface 116 of the semiconductor layer 112. By absorbing the light that has passed through the photoelectric conversion unit PD by the member 132, it is possible to prevent the color mixing between the adjacent pixels caused by the light being reflected by the upper metal layer or the like and incident on the adjacent pixels.

It is desirable that the member 132 is arranged on the semiconductor layer 112 via the insulating film 126. When the member 132 is formed directly on the semiconductor layer 112, plasma damage is added to the photoelectric conversion unit PD when the member 132 is deposited, when the member 132 is patterned, when an insulating film covering the member 132 is formed, and the like. There is a risk that crystal defects will be induced. The crystal defects generated in this way increase the dark current and cause noise such as white scratches that deteriorate the image quality.

Further, the member 132 may be connected to any wiring (not shown), but it is more desirable that the member 132 is in an electrically floating state. When the member 132 is electrically connected to the wiring in the upper layer, plasma damage when forming an insulating film or wiring in the upper layer of the member 132 is transmitted to the photoelectric conversion unit PD via the member 132 due to the antenna effect of this wiring, resulting in crystals. Defects may be induced. The crystal defects generated in this way also increase the dark current and cause noise such as white scratches that deteriorate the image quality.

As the width of the gap 134 between the member 132 and the transfer electrode 130 is narrowed, the area of the member 132 can be increased, and the gettering effect of metal impurities and the light absorption efficiency can be enhanced. However, on the other hand, when the width of the gap 134 is narrowed, the parasitic capacitance between the transfer electrode 130 and the member 132 is increased, and the parasitic capacitance component of the transfer electrode 130 is increased, so that the signal noise of the transfer transistor M1 is increased. And signal delay may occur.

From this point of view, it is desirable to dispose a substance having a dielectric constant lower than that of silicon nitride in the gap 134. This substance may be a gas. For example, a gap may be provided in the gap 134, or a low dielectric constant insulating material such as silicon oxide or silicon oxide added with carbon can be arranged. By providing a gap or a low dielectric constant insulating film in the gap 134 and lowering the dielectric constant of the gap 134 as compared with the case where an insulating material such as silicon nitride is arranged, the parasitic capacitance between the transfer electrode 130 and the member 132 Can be reduced. With this configuration, it is possible to reduce an increase in signal noise and a signal delay of the transfer transistor M1.

The distance between the member 132 and the transfer electrode 130 and the structure of the gap 134 shall be appropriately set so that the parasitic capacitance between the member 132 and the transfer electrode 130 can be reduced to the extent that the desired transfer characteristics can be obtained. Is desirable.

Further, the photoelectric conversion device according to the present embodiment has an impurity region 136 whose placement location is defined by the transfer electrode 130 and the member 132 in the vicinity of the end portion of the p-type semiconductor region 120 on the transfer electrode 130 side. .. In other words, the impurity concentration of at least a part of the impurity region at the position overlapping the portion between the transfer electrode 130 and the member 132 is that of the gloss of the p-type semiconductor region 120 due to the presence of the impurity region 136. Higher than the impurity concentration.

Here, since the p-type semiconductor region 120 and the transfer electrode 130 are formed by using a photoresist patterned by a method such as photolithography, they are affected by the alignment accuracy in the exposure apparatus and are about several tens of nm at the arrangement location. May cause variations. Since the p-type semiconductor region 120 and the transfer electrode 130 are formed through separate photolithography steps, the distance between the p-type semiconductor region 120 and the transfer electrode 130 also varies due to the variation in their placement locations. Can occur. As a result, the potential distribution in the vicinity of the transfer electrode 130 may vary, and the transfer characteristics when the signal charge is transferred from the n-type semiconductor region 122 to the n-type semiconductor region 124 may vary.

In this regard, in the photoelectric conversion device according to the present embodiment, the impurity region 136 is provided in the vicinity of the end portion of the p-type semiconductor region 120 on the transfer electrode 130 side. The impurity region 136 is formed by ion implantation using the transfer electrode 130 and the member 132 as masks, and the arrangement location is defined by the transfer electrode 130 and the member 132. Therefore, by appropriately setting the impurities introduced into the impurity region 136 and the ion implantation conditions thereof, the influence of the distance variation between the p-type semiconductor region 120 and the transfer electrode 130 can be mitigated. The details of the effect of providing the impurity region 136 will be described in the description of the manufacturing method described later.

Next, a method of manufacturing the photoelectric conversion device according to the present embodiment will be described with reference to FIGS. 5 to 10. 5 to 10 are process cross-sectional views showing a method of manufacturing a photoelectric conversion device according to the present embodiment. Here, a method of manufacturing the photoelectric conversion unit PD and the transfer transistor M1, which are the main feature parts of the photoelectric conversion device according to the present embodiment, will be described.

First, a semiconductor substrate 110 having a pair of facing surfaces, a first surface 114 and a second surface 116, is prepared. The semiconductor substrate 110 is not particularly limited, but for example, a p-type silicon substrate can be applied.

Next, an element separation region 118 that defines an active region in which the photoelectric conversion unit PD and the transfer transistor M1 are arranged is formed on the side of the first surface 114 of the semiconductor substrate 110 by, for example, the STI method or the LOCOS method (FIG. 5 (FIG. 5). a)). FIG. 5A shows an element separation region 118 formed by the STI method as an example.

The element separation region 118 that defines the active region in which the photoelectric conversion unit PD and the transfer transistor M1 (including the floating diffusion unit FD) are arranged is an insulating material such as silicon oxide from the viewpoint of preventing color mixing with adjacent pixels. It is desirable to construct it with an insulating structure made of. On the other hand, the separation between adjacent pixels does not necessarily have to be the same insulating structure as the element separation region 118, and may be a PN junction separation. Alternatively, PN junction separation may be used in combination with the same insulating structure as the element separation region 118. When PN junction separation is used, a charge storage layer (n-type semiconductor region 122) and a reverse conductive type semiconductor region are arranged in the separation portion.

Next, using photolithography and ion implantation, a p-type semiconductor region 120 and an n-type semiconductor region 122 are formed in predetermined regions within the active region defined by the device separation region 118, respectively (FIG. 5 (b)). The p-type semiconductor region 120 and the n-type semiconductor region 122 can be formed at a desired depth and at a desired impurity concentration with good reproducibility by using an ion implantation method. On the other hand, the locations where the p-type semiconductor region 120 and the n-type semiconductor region 122 are formed in a plan view may vary from a desired position by about several tens of nm due to the influence of the alignment accuracy of the exposure apparatus and the like.

Next, an insulating film 126 made of an insulating material such as silicon oxide is formed on at least the first surface 114 of the semiconductor substrate 110 by a thermal oxidation method, a CVD method, or the like.

Next, a conductive film to be the transfer electrode 130 and the member 132, for example, a polysilicon film, is formed on the insulating film 126 by, for example, a reduced pressure CVD method.

Next, the polysilicon film is patterned using photolithography and dry etching to form a transfer electrode 130 and a member 132 made of the polysilicon film (FIG. 5 (c)). Hereinafter, the insulating film 126 under the transfer electrode 130 will be referred to as a gate insulating film 128, paying attention to its function. Here, the insulating film under the transfer electrode 130 and the insulating film under the member 132 are the same insulating film (insulating film 126), but they do not necessarily have to be the same. May be made separately.

The polysilicon film formed by the reduced pressure CVD method is, for example, a film having a tensile stress having an intrinsic stress value of about −200 Pa when the film thickness is about 500 nm. Therefore, by forming the member 132 with the polysilicon film, the semiconductor layer 112 is distorted by the stress of the member 132, and the strain layer formed by applying this strain can function as a gettering layer.

The member 132 also has a role as a gettering layer that captures metal impurities generated in a step after the step of forming the member 132 and suppresses noise generation caused by these metal impurities. In order for the member 132 to remain on the photoelectric conversion unit PD, in addition to its role as a gettering site and a light absorption layer, etching damage during dry etching of the polysilicon film is introduced into the photoelectric conversion unit PD. It also has the effect of suppressing. For these purposes, the member 132 does not necessarily have to be a stressed film.

The member 132 may be subjected to an additional treatment for enhancing the gettering effect. For example, the gettering site can be increased by providing unevenness on the surface of the member 132 by using photolithography, dry etching, or the like to increase the surface area. Alternatively, by Ge ions and N ₂ ions are implanted to reduce the crystal grain boundaries in the polysilicon film, it is possible to increase the surface to be trap site.

Even in photolithography when forming the transfer electrode 130 and the member 132, a variation of about several tens of nm may occur with respect to a desired position due to the influence of the alignment accuracy of the exposure apparatus and the like. Therefore, the distance between the p-type semiconductor region 120 and the transfer electrode 130 may vary by several tens of nm for each lot, each substrate, each chip, or each pixel.

Next, using photolithography and ion implantation, an n-type semiconductor region 124 and an impurity region 136 are formed in predetermined regions within the active region defined by the device separation region 118, respectively (FIG. 6A). The n-type semiconductor region 124 and the impurity region 136 can be formed at a desired depth and a desired impurity concentration with good reproducibility by using an ion implantation method. Further, by using the transfer electrode 130, the member 132, and the element separation region 118 as masks at the time of ion implantation, the n-type semiconductor region 124 and the impurity region 136 can be formed in a self-aligned manner with respect to them. As a result, it is possible to suppress variations in the transfer electrode 130 and the member 132 with respect to the n-type semiconductor region 124 and the impurity region 136 even at the formation location in a plan view.

Here, the step of forming the impurity region 136 will be described more specifically with reference to FIGS. 8 and 9. FIG. 8 shows an example in which the impurity region 136 is formed by ion implantation of an n-type impurity, and FIG. 9 shows an example in which the impurity region 136 is formed by ion implantation of a p-type impurity. 8 (a) and 9 (a) show the case where the distance between the transfer electrode 130 and the p-type semiconductor region 120 is D1, and FIGS. 8 (b) and 9 (b) show the case where the distance between the transfer electrode 130 and the p-type semiconductor region 120 is D1. The case where the distance between the p-type semiconductor region 120 and the p-type semiconductor region 120 is larger than D1 is shown. As described above, the variation in the distance between the transfer electrode 130 and the p-type semiconductor region 120 may occur due to the misalignment in the photolithography step when forming the p-type semiconductor region 120 and the transfer electrode 130.

Ion implantation for forming the impurity region 136 is performed on the side of the n-type semiconductor region 124 as viewed from the transfer electrode 130 with respect to the normal direction of the semiconductor substrate 110, as shown by arrows in FIGS. 8 and 9 (in the figure). Perform from the direction of inclination at a predetermined angle (on the right side). As a result, the distance between the transfer electrode 130 and the impurity region 136 becomes a predetermined distance according to the incident angle of the injected ions and the height of the transfer electrode 130 due to the shadow effect of the transfer electrode 130.

As shown in FIG. 8, when an n-type impurity (arsenic ion or phosphorus ion) that is inversely conductive from the p-type semiconductor region 120 is used as the impurity for forming the impurity region 136, the p-type semiconductor region 120 and the impurity are used. The p-type carrier is compensated in the region 138 where the region 136 overlaps. As a result, the carrier concentration of the p-type semiconductor region 120 in the region 138 overlapping the impurity region 136 decreases.

When an n-type impurity (arsenic ion or phosphorus ion) that is inversely conductive from the p-type semiconductor region 120 is used as the impurity for forming the impurity region 136, it is necessary to cancel (relax) the p-type semiconductor region 120. be. Therefore, the impurity region 136 preferably has a depth equal to or greater than that of the p-type semiconductor region 120 so as to cover the p-type semiconductor region 120. However, depending on the injection concentration of the impurity region 136 and the device design, the impurity region 136 may have a depth less than the same as that of the p-type semiconductor region 120.

Therefore, even if the distance between the transfer electrode 130 and the p-type semiconductor region 120 varies as in the distance D1 and the distance D2, the steepness that occurs at the boundary between the p-type semiconductor region 120 and the n-type semiconductor region 122 occurs. The potential distribution can be relaxed. That is, it is possible to obtain transfer characteristics with less variation, and it is possible to reduce noise components caused by variations in transfer characteristics.

Regarding the injection amount of the n-type impurity for forming the impurity region 136, for example, the concentration of the n-type impurity in the impurity region 136 is the concentration of the p-type impurity in the p-type semiconductor region 120 and the concentration of the p-type impurity in the n-type semiconductor region 122. It can be appropriately set so that the concentration is between the concentration of the n-type impurity and the concentration of the n-type impurity.

Further, as shown in FIG. 9, when the same conductive type p-type impurity (boron ion) as the p-type semiconductor region 120 is used as the impurity for forming the impurity region 136, the p-type semiconductor region 120 is formed by the impurity region 136. Will be stretched in the direction of the transfer electrode 130. As described above, since the impurity region 136 is formed in a self-aligned manner with respect to the transfer electrode 130, the distance (D3) between the impurity region 136 and the transfer electrode 130 can be controlled with high accuracy.

When the same conductive p-type impurity (boron ion) as the p-type semiconductor region 120 is used as the impurity for forming the impurity region 136, the impurity region 136 is the p-type semiconductor region 120 so as not to hinder the transfer of electric charges. The depth is preferably equal to or less than that of the above. This is because when the impurity region 136 is deeper than the p-type semiconductor region 120, a potential barrier is formed in the impurity region 136, and transfer residue is likely to occur. However, depending on the injection concentration of the impurity region 136 and the device design, the impurity region 136 may be formed deeper than the p-type semiconductor region 120.

Therefore, even if the distance between the transfer electrode 130 and the p-type semiconductor region 120 varies as in the distance D1 and the distance D2, the p-type region and the transfer electrode composed of the p-type semiconductor region 120 and the impurity region 136 The distance D3 between the 130 and the 130 can be kept constant. This makes it possible to form a more stable potential distribution in the vicinity of the transfer electrode 130. That is, it is possible to obtain transfer characteristics with less variation, and it is possible to reduce noise components caused by variations in transfer characteristics.

The injection amount of the p-type impurity for forming the impurity region 136 is, for example, that the concentration of the p-type impurity in the impurity region 136 is the concentration of the p-type impurity in the p-type semiconductor region 120 and the concentration of the p-type impurity in the n-type semiconductor region 122. It can be appropriately set so that the concentration is between the concentration of the n-type impurity and the concentration of the n-type impurity.

Next, a buffer film 140 made of an insulating material such as silicon oxide is formed on the side of the first surface 114 of the semiconductor substrate 110 provided with the transfer electrode 130 and the member 132 by a CVD method using a raw material gas such as TEOS. (Fig. 6 (b)). As the insulating material constituting the buffer film 140, it is desirable to use a silicon oxide-based insulating material having a dielectric constant lower than that of silicon nitride.

At this time, it is desirable that the gap 134 between the transfer electrode 130 and the member 132 is filled with an insulating material constituting the buffer film 140. Typically, by setting the distance between the transfer electrode 130 and the member 132 to be equal to or less than the distance corresponding to the height of the transfer electrode 130 and the member 132, the gap 134 is filled with the insulating material constituting the buffer film 140. can do.

Alternatively, as shown in FIG. 10, for example, the buffer film 140 may be deposited so that the gap 142 remains in at least a part of the gap 134 between the transfer electrode 130 and the member 132. The step coverage of the film deposited by the CVD method depends on, for example, the film formation temperature and the film formation rate. For example, by forming a film under conditions of a relatively low film formation temperature or a relatively high film formation rate, the film has poor step coverage, and a part of the gap 134 can be left as a gap 142. ..

By covering the gap 134 with the buffer film 140 in this way, it is possible to prevent a film having a high dielectric constant, such as a silicon nitride film, which is subsequently formed, from entering the gap 134. As a result, the parasitic capacitance between the transfer electrode 130 and the member 132 can be reduced, and the signal noise and signal delay generated when the signal charge is transferred can be suppressed.

Next, an etching stop film 144 made of, for example, silicon nitride and an interlayer insulating film 146 made of, for example, silicon oxide are formed on the buffer film 140 by, for example, a CVD method.

Next, the interlayer insulating film 146, the etching stop film 144, and the buffer film 140 are patterned by photolithography and dry etching to form contact holes reaching the transfer electrode 130 and the n-type semiconductor region 124.

Next, a barrier metal such as TiN and a metal material such as W are deposited by a CVD method, a sputtering method, or the like, and then these conductive films on the interlayer insulating film 146 are removed to form a contact plug 148 in the contact hole. 150 is formed (FIG. 6 (c)).

After that, wiring, a sealing film, etc. (not shown) connected to the contact plugs 148, 150 are formed on the interlayer insulating film 146 in which the contact plugs 148, 150 are embedded, and attached to a support substrate (not shown). Make adjustments.

Next, the semiconductor substrate 110 is thinned from the side of the second surface 116 to form the semiconductor layer 112 (FIG. 7A). Backgrinding, wet etching, chemical mechanical polishing (CMP), and the like can be used to thin the semiconductor substrate 110. In the following description, the new surface of the semiconductor substrate 110 exposed due to the thinning of the semiconductor substrate 110 will also be referred to as the second surface 116 for convenience. That is, the semiconductor layer 112 formed by thinning the semiconductor substrate 110 has a pair of surfaces, a first surface 114 and a second surface 116.

Next, an interlayer insulating film 152, a light-shielding film 154, a sealing film 156, and the like are formed on the second surface 116 of the semiconductor layer 112 via a pinning film (not shown) and an antireflection film (not shown) (FIG. 7). (B)).

After that, an optical layer (not shown) including an optical member such as a color filter and a microlens is formed on the sealing film 156 to complete the photoelectric conversion device according to the present embodiment.

As described above, according to the present embodiment, it is possible to reduce the noise generated in the photoelectric conversion unit and improve the transfer characteristics of the signal charge from the photoelectric conversion unit to the floating diffusion unit.

[Second Embodiment]
The photoelectric conversion device according to the second embodiment of the present invention will be described with reference to FIGS. 11 and 12. The same components as those of the photoelectric conversion device according to the first embodiment are designated by the same reference numerals, and the description thereof will be omitted or simplified.

In this embodiment, an example in which the configuration of the first embodiment is applied to another photoelectric conversion device having a different pixel configuration will be described.

In the photoelectric conversion device according to the present embodiment, as shown in FIG. 11, one pixel 12 includes photoelectric conversion units PD1, PD2, PD3, PD4 and transfer transistors M11, M12, M13, M14. .. Further, the photoelectric conversion device according to the present embodiment includes a reset transistor M2, an amplification transistor M3, selection transistors M41 and M42, a switch transistor M5, and a storage capacitance CS.

The photoelectric conversion units PD1, PD2, PD3, PD4 are, for example, photodiodes. In the photodiode of the photoelectric conversion unit PD1, the anode is connected to the ground voltage node and the cathode is connected to the source of the transfer transistor M11. In the photodiode of the photoelectric conversion unit PD2, the anode is connected to the ground voltage node and the cathode is connected to the source of the transfer transistor M12. In the photodiode of the photoelectric conversion unit PD3, the anode is connected to the ground voltage node and the cathode is connected to the source of the transfer transistor M13. In the photodiode of the photoelectric conversion unit PD4, the anode is connected to the ground voltage node and the cathode is connected to the source of the transfer transistor M14.

The drains of the transfer transistors M11, M12, M13, and M14 are connected to the source of the reset transistor M2 and the gate of the amplification transistor M3. The connection node of the drain of the transfer transistors M11, M12, M13, and M14, the source of the reset transistor M2, and the gate of the amplification transistor M3 is a so-called floating diffusion unit FD. A storage capacitance CS is connected to the floating diffusion unit FD via a switch transistor M5. The floating diffusion unit FD includes a capacitance component (floating diffusion capacitance), and constitutes a charge holding portion by this capacitance component.

The drain of the reset transistor M2 and the drain of the amplification transistor M3 are connected to the power supply voltage node (voltage Vdd). The voltage supplied to the drain of the reset transistor M2 and the voltage supplied to the drain of the amplification transistor M3 may be the same or different. The source of the amplification transistor M3 is connected to the drain of the selection transistor M41 and the drain of the selection transistor M42. The source of the selection transistor M41 is connected to the output line 161 of the column corresponding to the pixel 12. The source of the selection transistor M42 is connected to the output line 162 of the column corresponding to the pixel 12. A current source 18 is connected to each of the output lines 161, 162.

In the case of the pixel 12 having the configuration shown in FIG. 11, the control lines 14 arranged in each line of the pixel area 10 are eight signal lines for supplying the control signals TX1, TX2, TX3, TX4, RES, SEL1, SEL2, SW. including. The signal line for supplying the control signal TX1 is connected to the gate of the transfer transistor M11 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal TX2 is connected to the gate of the transfer transistor M12 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal TX3 is connected to the gate of the transfer transistor M13 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal TX4 is connected to the gate of the transfer transistor M14 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal RES is connected to the gate of the reset transistor M2 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal SEL1 is connected to the gate of the selection transistor M41 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal SEL2 is connected to the gate of the selection transistor M42 of the pixel 12 belonging to the corresponding line, and forms a signal line common to these pixels 12. The signal line for supplying the control signal SW is connected to the gate of the switch transistor M5 of the pixel 12 belonging to the corresponding line, and forms a common signal line for these pixels 12. When each transistor constituting the pixel 12 is composed of an N-type transistor, the corresponding transistor is turned on by supplying a high-level control signal from the vertical scanning circuit 30. Further, when the low level control signal is supplied from the vertical scanning circuit 30, the corresponding transistor is turned off.

The photoelectric conversion unit PD1, PD2, PD3, PD4 converts the incident light into an amount of electric charge corresponding to the amount of light (photoelectric conversion) and accumulates the generated electric charge. The transfer transistor M11 is controlled by the control signal TX1 and is turned on to transfer the electric charge held by the photoelectric conversion unit PD1 to the floating diffusion unit FD. Similarly, the transfer transistor M12 is controlled by the control signal TX2 and turned on to transfer the electric charge held by the photoelectric conversion unit PD2 to the floating diffusion unit FD. Further, the transfer transistor M13 is controlled by the control signal TX3, and when it is turned on, the electric charge held by the photoelectric conversion unit PD3 is transferred to the floating diffusion unit FD. Further, the transfer transistor M14 is controlled by the control signal TX, and when it is turned on, the electric charge held by the photoelectric conversion unit PD4 is transferred to the floating diffusion unit FD.

The floating diffusion unit FD holds the charges transferred from the photoelectric conversion units PD1, PD2, PD3, PD4, and sets the voltage to a predetermined voltage according to the capacity of the floating diffusion unit FD and the amount of the transferred charges. Set. The reset transistor M2 is controlled by the control signal RES, and when it is turned on, the floating diffusion unit FD is reset to a predetermined voltage corresponding to the voltage Vdd.

The switch transistor M5 is controlled by the control signal SW and is turned on to connect the storage capacitance CS to the floating diffusion unit FD. That is, when the switch transistor M5 is on, the storage capacitance CS is connected in parallel to the capacitance of the floating diffusion section FD, and the capacitance of the floating diffusion section FD increases as compared with when the switch transistor M5 is off.

The amplification transistor M3 has a configuration in which a voltage Vdd is supplied to the drain and a bias current is supplied to the source from the current source 18 via the selection transistor M41 and the output line 161 or via the selection transistor M42 and the output line 162. It has become. That is, the amplification transistor M3 constitutes an amplification unit (source follower circuit) having a gate as an input node. As a result, the amplification transistor M3 outputs a signal corresponding to the amount of electric charge generated by the incident light on the photoelectric conversion units PD1, PD2, PD3, PD4.

The selection transistor M41 is controlled by the control signal SEL1 and is turned on to output the output signal of the amplification transistor M3 to the output line 161. The selection transistor M42 is controlled by the control signal SEL2, and when it is turned on, the output signal of the amplification transistor M3 is output to the output line 162.

By turning on any one or more of the transfer transistors M11 to M14 according to the operation mode, the electric charge of the photoelectric conversion unit PD connected to the transfer transistors M11 to M14 turned on. Is transferred to the floating diffusion unit FD. For example, when only the transfer transistor M11 is turned on, the electric charge held in the photoelectric conversion unit PD1 is transferred to the floating diffusion unit FD, and a signal corresponding to the amount of electric charge generated by the incident light on the photoelectric conversion unit PD1 is output. It is output to the output line 161 or the output line 162. Further, when all the transfer transistors M11 to M14 are turned on, the charges held in the photoelectric conversion units PD1 to PD4 are added by the floating diffusion unit FD, and the charges generated by the incident light on the photoelectric conversion units PD1 to PD4 are charged. A signal corresponding to the total amount is output to the output line 161 or the output line 162.

As described above, the pixel 12 of the photoelectric conversion device according to the present embodiment has four photoelectric conversion units PD1, PD2, PD3, PD4 that share one floating diffusion unit FD. Further, it has two selection transistors M41 and M42 connected to the amplification transistor M3, and the output signal of the amplification transistor M3 is transmitted to either the output line 161 or the output line 162 via the selection transistors M41 and M42. It is configured to output.

FIG. 12 is an example of a plane layout for realizing the circuit configuration of FIG. FIG. 12 shows a pattern of an active region (element separation region 118) and a gate layer for a part of two pixels 12 adjacent to each other in the Y direction. In the figure, the solid line indicates the active region, and the shaded region is the gate layer. The alternate long and short dash line region corresponds to the region provided with the n-type semiconductor region 122, that is, the photoelectric conversion units PD1, PD2, PD3, and PD4. In FIG. 12, the gates of the transistors constituting the pixel 12 are designated by their reference numerals.

In FIG. 12, the photoelectric conversion units PD1, PD2, PD3, PD4 arranged vertically so as to sandwich the floating diffusion unit FD are the four photoelectric conversion units PD1, PD2, PD3, PD4 of one pixel 12. be. The photoelectric conversion units PD1 and PD2 of one pixel 12 adjacent to each other in the Y direction and the photoelectric conversion units PD3 and PD4 of the other pixel 12 are separated from each other by a p-type semiconductor region (not shown). Further, one pixel between the photoelectric conversion unit PD1 and the photoelectric conversion unit PD2 and between the photoelectric conversion unit PD3 and the photoelectric conversion unit PD4 are also separated from each other by a p-type semiconductor region (not shown).

As in the case of the first embodiment, the member 132 is provided on the photoelectric conversion units PD1, PD2, PD3, PD4 of these pixels 12. Here, in the photoelectric conversion device of the present embodiment, as shown in FIG. 12, the photoelectric conversion units PD1 and PD2 of one pixel 12 are covered with one continuous member 132. Further, the photoelectric conversion units PD3 and PD4 of one pixel 12 are covered with one continuous member 132. The member 132 that covers the photoelectric conversion units PD1 and PD2 of one pixel 12 and the member 132 that covers the photoelectric conversion units PD3 and PD4 of the other pixel 12 adjacent to the pixel 12 are composed of one continuous pattern. It is desirable to be there. In FIG. 12, one pattern in which a member 132 covering the photoelectric conversion units PD1 and PD2 of one pixel 12 and a member 132 covering the photoelectric conversion units PD3 and PD4 of another pixel 12 adjacent to the pixel 12 are continuous. An example composed of is shown.

By configuring the member 132 in this way, the arrangement region of the photoelectric conversion units PD1, PD2, PD3, PD4 and the separation region thereof can be covered by the member 132. As a result, it is possible to effectively prevent metal impurities generated in a step after the step of forming the member 132 from infiltrating into the photoelectric conversion unit PD.

In the first embodiment, it has been stated that it is desirable to set the distance between the transfer electrode 130 and the member 132 so that the parasitic capacitance between them can be reduced to the extent that desired transfer characteristics can be obtained. , The gate electrodes of other transistors do not necessarily have to be the same. For example, the distance between the gate electrodes of the reset transistors M2 and the selection transistors M41 and M42 and the member 132 is the distance between the transfer electrodes of the transfer transistors M11, M12, M13 and M14 and the member 132 as shown in FIG. It may be smaller or larger. From the viewpoint of arranging the pixels 12 at a higher density, the distance between the gate electrode such as the reset transistor M2 and the member 132 is the distance between the transfer electrode of the transfer transistors M11, M12, M13, and M14 and the member 132. It is desirable to make it smaller than.

As described above, according to the present embodiment, it is possible to reduce the noise generated in the photoelectric conversion unit and improve the transfer characteristics of the signal charge from the photoelectric conversion unit to the floating diffusion unit.

[Third Embodiment]
The imaging system according to the third embodiment of the present invention will be described with reference to FIG. FIG. 13 is a block diagram showing a schematic configuration of an imaging system according to the present embodiment.

The photoelectric conversion device 100 described in the first and second embodiments is applicable to various imaging systems. Examples of applicable imaging systems include digital still cameras, digital camcorders, surveillance cameras, copiers, fax machines, mobile phones, in-vehicle cameras, observation satellites and the like. The image pickup system also includes a camera module including an optical device forming an optical system such as a lens and an image pickup device. FIG. 13 illustrates a block diagram of a digital still camera as an example of these.

The image pickup system 200 illustrated in FIG. 13 includes an image pickup device 201, a lens 202 for forming an optical image of a subject on the image pickup device 201, an aperture 204 for varying the amount of light passing through the lens 202, and protection of the lens 202. Has a barrier 206 of. The lens 202 and the diaphragm 204 are optical devices that form an optical system that collects light on the image pickup device 201. The image pickup apparatus 201 is the photoelectric conversion apparatus 100 described in any of the first and second embodiments, and converts an optical image formed by the lens 202 into image data.

The imaging system 200 also has a signal processing unit 208 that processes an output signal output from the imaging device 201. The signal processing unit 208 generates image data from the digital signal output by the image pickup apparatus 201. Further, the signal processing unit 208 performs an operation of performing various corrections and compressions as necessary and outputting image data. The image pickup apparatus 201 may include an AD conversion unit that generates a digital signal processed by the signal processing unit 208. The AD conversion unit may be formed on a semiconductor layer (semiconductor substrate) on which the photoelectric conversion unit of the image pickup apparatus 201 is formed, or a semiconductor substrate different from the semiconductor layer on which the photoelectric conversion unit of the image pickup apparatus 201 is formed. It may be formed in. Further, the signal processing unit 208 may be formed on the same semiconductor substrate as the image pickup apparatus 201.

The imaging system 200 further includes a memory unit 210 for temporarily storing image data, and an external interface unit (external I / F unit) 212 for communicating with an external computer or the like. Further, the imaging system 200 includes a recording medium 214 such as a semiconductor memory for recording or reading imaging data, and a recording medium control interface unit (recording medium control I / F unit) 216 for recording or reading on the recording medium 214. Has. The recording medium 214 may be built in the imaging system 200 or may be detachable.

Further, the image pickup system 200 includes an overall control / calculation unit 218 that controls various calculations and the entire digital still camera, and a timing generation unit 220 that outputs various timing signals to the image pickup device 201 and the signal processing unit 208. Here, a timing signal or the like may be input from the outside, and the imaging system 200 may have at least an imaging device 201 and a signal processing unit 208 that processes an output signal output from the imaging device 201.

The image pickup apparatus 201 outputs an image pickup signal to the signal processing unit 208. The signal processing unit 208 performs predetermined signal processing on the image pickup signal output from the image pickup apparatus 201, and outputs image data. The signal processing unit 208 uses the image pickup signal to generate an image.

As described above, according to the present embodiment, it is possible to realize an imaging system to which the photoelectric conversion device 100 according to the first or second embodiment is applied.

[Fourth Embodiment]
The imaging system and the moving body according to the fourth embodiment of the present invention will be described with reference to FIG. FIG. 14 is a diagram showing a configuration of an imaging system and a moving body according to the present embodiment.

FIG. 14A shows an example of an imaging system related to an in-vehicle camera. The imaging system 300 includes an imaging device 310. The imaging device 310 is the photoelectric conversion device 100 according to any one of the first and second embodiments. The image pickup system 300 has an image processing unit 312 that performs image processing on a plurality of image data acquired by the image pickup device 310, and a parallax (phase difference of the parallax image) from the plurality of image data acquired by the image pickup system 300. It has a parallax acquisition unit 314 that performs calculation. Further, the imaging system 300 includes a distance acquisition unit 316 that calculates the distance to the object based on the calculated parallax, and a collision determination unit 318 that determines whether or not there is a possibility of collision based on the calculated distance. And have. Here, the parallax acquisition unit 314 and the distance acquisition unit 316 are examples of distance information acquisition means for acquiring distance information to an object. That is, the distance information is information on parallax, defocus amount, distance to an object, and the like. The collision determination unit 318 may determine the possibility of collision by using any of these distance information. The distance information acquisition means may be realized by specially designed hardware or may be realized by a software module. Further, it may be realized by FPGA (Field Programmable Gate Array), ASIC (Application Specific Integrated Circuit), or the like, or may be realized by a combination thereof.

The imaging system 300 is connected to the vehicle information acquisition device 320, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. Further, the imaging system 300 is connected to a control ECU 330 which is a control device that outputs a control signal for generating a braking force to the vehicle based on the determination result of the collision determination unit 318. The imaging system 300 is also connected to an alarm device 340 that issues an alarm to the driver based on the determination result of the collision determination unit 318. For example, when there is a high possibility of a collision as a result of the collision determination unit 318, the control ECU 330 controls the vehicle to avoid the collision and reduce the damage by applying the brake, returning the accelerator, suppressing the engine output, and the like. The alarm device 340 warns the user by sounding an alarm such as a sound, displaying alarm information on the screen of a car navigation system or the like, or giving vibration to the seat belt or steering wheel.

In the present embodiment, the periphery of the vehicle, for example, the front or the rear, is imaged by the image pickup system 300. FIG. 14B shows an imaging system for imaging the front of the vehicle (imaging range 350). The vehicle information acquisition device 320 sends an instruction to the image pickup system 300 or the image pickup device 310. With such a configuration, the accuracy of distance measurement can be further improved.

In the above, an example of controlling so as not to collide with another vehicle has been described, but it can also be applied to control for automatically driving following other vehicles and control for automatically driving so as not to go out of the lane. .. Further, the imaging system can be applied not only to a vehicle such as a own vehicle but also to a moving body (moving device) such as a ship, an aircraft, or an industrial robot. In addition, it can be applied not only to mobile objects but also to devices that widely use object recognition, such as intelligent transportation systems (ITS).

[Fifth Embodiment]
The device according to the fifth embodiment of the present invention will be described with reference to FIG. FIG. 15 is a block diagram showing a schematic configuration of the device according to the present embodiment.

FIG. 15 is a schematic view showing an apparatus EQP including a photoelectric conversion device APR. All or part of the photoelectric conversion device APR is a semiconductor device IC. The photoelectric conversion device APR of this example can be used as, for example, an image sensor, an AF (Auto Focus) sensor, a photometric sensor, or a distance measuring sensor. The semiconductor device IC has a pixel area PX in which pixel circuits PXC including a photoelectric conversion unit are arranged in a matrix. The semiconductor device IC can have a peripheral area PR around the pixel area PX. A circuit other than the pixel circuit can be arranged in the peripheral area PR.

The photoelectric conversion device APR may have a structure (chip laminated structure) in which a first semiconductor chip provided with a plurality of photoelectric conversion units and a second semiconductor chip provided with peripheral circuits are laminated. The peripheral circuits in the second semiconductor chip can be column circuits corresponding to the pixel sequences of the first semiconductor chip, respectively. Further, the peripheral circuits in the second semiconductor chip may be matrix circuits corresponding to the pixels or pixel blocks of the first semiconductor chip, respectively. For the connection between the first semiconductor chip and the second semiconductor chip, wire-to-chip wiring by direct coupling of a through electrode (TSV), a conductor such as copper, connection by microbumps between chips, connection by wire bonding, etc. shall be adopted. Can be done.

The photoelectric conversion device APR may include a package PKG containing the semiconductor device IC in addition to the semiconductor device IC. The package PKG is a bonding wire or bump that connects a substrate on which a semiconductor device IC is fixed, a lid such as glass facing the semiconductor device IC, and a terminal provided on the substrate and a terminal provided on the semiconductor device IC. Etc., and may include a connecting member such as.

The equipment EQP may further include at least one of an optical device OPT, a control device CTRL, a processing device PRCS, a display device DSPL, and a storage device MMRY. The optical device OPT corresponds to the photoelectric conversion device APR as a photoelectric conversion device, and is, for example, a lens, a shutter, or a mirror. The control device CTRL controls the photoelectric conversion device APR, and is a semiconductor device such as an ASIC. The processing device PRCS processes the signal output from the photoelectric conversion device APR, and constitutes an AFE (analog front end) or a DFE (digital front end). The processing device PRCS is a semiconductor device such as a CPU (central processing unit) or an ASIC (integrated circuit for a specific application). The display device DSPL is an EL display device or a liquid crystal display device that displays information (images) obtained by the photoelectric conversion device APR. The storage device MMRY is a magnetic device or a semiconductor device that stores information (images) obtained by the photoelectric conversion device APR. The storage device MMRY is a volatile memory such as SRAM or DRAM, or a non-volatile memory such as a flash memory or a hard disk drive. The mechanical device MCNH has a moving part or a propulsion part such as a motor or an engine. In the device EQP, the signal output from the photoelectric conversion device APR is displayed on the display device DSPL, or transmitted to the outside by a communication device (not shown) included in the device EQP. Therefore, it is preferable that the device EQP further includes a storage device MMRY and a processing device PRCS in addition to the storage circuit unit and the arithmetic circuit unit of the photoelectric conversion device APR.

The device EQP shown in FIG. 15 can be an electronic device such as an information terminal (for example, a smartphone or a wearable terminal) or a camera (for example, an interchangeable lens camera, a compact camera, a video camera, or a surveillance camera) having a photographing function. The mechanical device MCNH in the camera can drive the components of the optical device OPT for zooming, focusing, and shutter operation. Further, the device EQP can be a transportation device (mobile body) such as a vehicle, a ship, or a flying object. Further, the device EQP can be a medical device such as an endoscope or a CT scanner. Further, the device EQP can be a medical device such as an endoscope or a CT scanner.

The mechanical device MCNH in the transportation equipment can be used as a mobile device. The equipment EQP as a transportation device is suitable for transporting a photoelectric conversion device APR and for assisting and / or automating operation (maneuvering) by a photographing function. The processing device PRCS for assisting and / or automating the operation (maneuvering) can perform processing for operating the mechanical device MCNH as a mobile device based on the information obtained by the photoelectric conversion device APR.

The photoelectric conversion device APR according to the present embodiment can provide high value to its designer, manufacturer, seller, purchaser and / or user. Therefore, if the photoelectric conversion device APR is mounted on the device EQP, the device EQP value can be increased. Therefore, in manufacturing and selling the equipment EQP, it is advantageous to determine the mounting of the photoelectric conversion device APR of the present embodiment on the equipment EQP in order to increase the value of the equipment EQP.

[Modification Embodiment]
The present invention is not limited to the above embodiment and can be modified in various ways.
For example, an example in which a part of the configuration of any of the embodiments is added to another embodiment or an example in which a part of the configuration of another embodiment is replaced with another embodiment is also an embodiment of the present invention.

Further, in the first embodiment, the configuration for reducing the parasitic capacitance between the transfer electrode 130 and the member 132 and the configuration for reducing the influence of the misalignment between the p-type semiconductor region 120 and the transfer electrode 130 are provided. Although the including form has been described, a form including only one of them may be used.

Further, the pixel configuration described in the above embodiment is an example and can be changed as appropriate.
For example, in the first embodiment, the case where one pixel 12 has one photoelectric conversion unit PD has been described. Further, in the second embodiment, the case where one pixel 12 has four photoelectric conversion units PD1, PD2, PD3, PD4 has been described. However, the configuration of the pixel 12 is not limited to the examples of these embodiments. For example, the number of photoelectric conversion units PD included in one pixel 12 is not particularly limited, and may be two, three, or five or more.

Further, the number of photoelectric conversion units PD covered by the member 132 composed of one continuous pattern is not limited to the example of the above embodiment. For example, when each pixel 12 has one photoelectric conversion unit PD as in the case of the first embodiment, the member 132 in which two photoelectric conversion units PD of adjacent pixels 12 are formed by one continuous pattern. It may be configured to cover with. Alternatively, when each pixel 12 has two photoelectric conversion units PD, the four photoelectric conversion units PD of adjacent pixels 12 may be covered with a member 132 composed of one continuous pattern. .. Further, the member 132 composed of one continuous pattern may be configured to cover the photoelectric conversion unit PD of three or more pixels 12. As shown in FIG. 12, the plurality of photoelectric conversion units PD covered by one member 132 may be provided in one active region or may be provided in separate active regions.

Further, in the second embodiment, the pixel 12 having the two selection transistors M41 and M42 is illustrated, but as in the first embodiment, the number of selection transistors may be one.

Further, in the above embodiment, polysilicon is exemplified as a constituent material of the member 132 applicable as a gettering site and a light absorption layer, but it may be composed of a material other than polysilicon. Further, the constituent material of the member 132 may be a material applicable to only one of the gettering site and the light absorption layer.

Further, the imaging system shown in the third and fourth embodiments shows an example of an imaging system to which the photoelectric conversion device of the present invention can be applied, and an imaging system to which the photoelectric conversion device of the present invention can be applied. Is not limited to the configurations shown in FIGS. 13 and 14. The same applies to the equipment shown in the fifth embodiment.

It should be noted that all of the above embodiments merely show examples of embodiment in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner by these. That is, the present invention can be implemented in various forms without departing from the technical idea or its main features.

12 ... Pixel 100 ... Photoelectric conversion device 112 ... Semiconductor layer 118 ... Element separation region 120 ... P-type semiconductor region 122, 124 ... n-type semiconductor region 128 ... Gate insulating film 130 ... Transfer electrode 132 ... Member 134 ... Gap 136 ... Impurities Region 140 ... Buffer film 142 ... Void 142
144 ... Etching stop film

Claims (20)

A semiconductor layer including a first conductive type first semiconductor region and a second conductive type second semiconductor region different from the first conductive type.
A transfer electrode provided on the semiconductor layer and transferring charges generated by photoelectric conversion in the second semiconductor region, and a transfer electrode.
It has a member made of the same material as the transfer electrode, separated from the transfer electrode, and provided so as to cover the second semiconductor region.
The first semiconductor region is located between the second semiconductor region and the member.
The semiconductor layer has an impurity region at a position overlapping the portion between the transfer electrode and the member.
A photoelectric conversion device characterized in that the impurity concentration of at least a part of the gloss in the impurity region is higher than the impurity concentration of the gloss in the first semiconductor region. The part of the impurity region contains the first conductive type impurity and the second conductive type impurity.
The photoelectric conversion device according to claim 1, wherein the impurity region is provided at a position defined by the transfer electrode and / or the member. The photoelectric conversion device according to claim 1 or 2, wherein the impurity region is the first conductive type. The photoelectric conversion device according to claim 1 or 2, wherein the impurity region is the second conductive type. The photoelectric conversion device according to any one of claims 1 to 4, wherein the gap between the transfer electrode and the member is made of a substance having a dielectric constant lower than that of silicon nitride. A photoelectric conversion unit provided on the semiconductor layer and
A transfer electrode provided on the semiconductor layer and transferring the electric charge generated in the photoelectric conversion unit,
It has a member made of the same material as the transfer electrode, separated from the transfer electrode, and provided so as to cover the photoelectric conversion portion.
A photoelectric conversion device characterized in that a substance having a dielectric constant lower than that of silicon nitride is arranged in a portion between the transfer electrode and the member. The photoelectric conversion device according to claim 5 or 6, wherein the substance is a silicon oxide-based insulating material. The photoelectric conversion device according to any one of claims 5 to 7, wherein at least a part of a portion between the transfer electrode and the member is a gap. The photoelectric conversion device according to any one of claims 1 to 8, wherein the distance between the transfer electrode and the member is equal to or less than a distance corresponding to the height of the transfer electrode and the member. .. Any of claims 1 to 9, wherein the distance between the transfer electrode and the member is larger than the distance between the gate electrode of another transistor of the pixel including the transfer electrode and the member. The photoelectric conversion device according to item 1. The photoelectric conversion device according to any one of claims 1 to 10, wherein a plurality of photoelectric conversion units are covered with one continuous member. The photoelectric conversion device according to claim 11, wherein the plurality of photoelectric conversion units include a photoelectric conversion unit of a first pixel and a photoelectric conversion unit of a second pixel. The photoelectric conversion device according to claim 11 or 12, wherein the plurality of photoelectric conversion units are provided in one active region. The photoelectric conversion device according to any one of claims 1 to 13, wherein the member is electrically in a floating state. The photoelectric conversion device according to any one of claims 1 to 14, wherein the member is made of polysilicon. The photoelectric conversion device according to any one of claims 1 to 15, wherein the member contains an iron group element. The photoelectric conversion device according to any one of claims 1 to 16, further comprising an optical structure arranged on the side opposite to the member with respect to the semiconductor layer. The photoelectric conversion device according to any one of claims 1 to 17.
An imaging system characterized by having a signal processing unit that processes a signal output from the photoelectric conversion device. It ’s a mobile body,
The photoelectric conversion device according to any one of claims 1 to 17.
A distance information acquisition means for acquiring distance information to an object from a parallax image based on a signal from the photoelectric conversion device, and
A moving body having a control means for controlling the moving body based on the distance information. A device including the photoelectric conversion device according to any one of claims 1 to 17.
An optical device corresponding to the photoelectric conversion device,
A control device that controls the photoelectric conversion device,
A processing device that processes a signal output from the photoelectric conversion device,
A mechanical device controlled based on the information obtained by the photoelectric conversion device,
A display device that displays the information obtained by the photoelectric conversion device, and a display device that displays the information obtained by the photoelectric conversion device.
A device further comprising at least one of a storage devices for storing information obtained by the photoelectric conversion device.

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