JP2021052026A - Manufacturing method for power module - Google Patents

Abstract

To suppress wrong detection of excess current.SOLUTION: A manufacturing method for a power module including two power semiconductor elements that are connected in parallel to each other includes a reading step of reading characteristic values of a plurality of power semiconductor elements, a selecting step of selecting two power semiconductor elements from the plurality of power semiconductor elements on the basis of the characteristic values, and a manufacturing step of manufacturing a power module by connecting the two semiconductor elements selected in the selecting step in parallel to each other. The characteristic values include a first voltage value that is the voltage value between a gate and an emitter in a designated collector current, which is not zero, when a designated voltage, which is not zero, between the gate and the emitter is applied, a second voltage value that is the voltage between the gate and the emitter that becomes the designated collector current, which is not zero, when the designated voltage, which is not zero, between the gate and the emitter is applied, and an energy loss value that is an integral value of the product of the voltage between the collector and the emitter and the collector current at the turn-off time.SELECTED DRAWING: Figure 5

Description

The present invention relates to a method for manufacturing a power module.

It is known that a power module can handle a large current by connecting a plurality of power semiconductor elements in parallel internally. Patent Document 1 describes a plurality of semiconductor elements for power conversion as a first group in which the voltage characteristics of the semiconductor elements are within a predetermined range including a design value, and a second group in which the voltage characteristics are larger than the predetermined range. A sorting step of sorting into groups and a third group whose voltage characteristics are smaller than the predetermined range, and at least one of the semiconductor elements are extracted from the first group, and the rest are the second group and the third group. A step of extracting from the above and collecting a predetermined even number of the semiconductor elements in total, and a step of connecting the semiconductor elements collected in the extraction step in a set of two in parallel, the second group. The semiconductor element of the third group is connected in parallel with another semiconductor element of the second group or the semiconductor element of the first group, and the semiconductor element of the third group is another semiconductor element of the third group or the semiconductor element of the first group. A method for manufacturing a power conversion device including a connection step for connecting in parallel with a semiconductor element is disclosed.

JP-A-2018-143030

In the invention described in Patent Document 1, false detection of overcurrent is not considered.

The method for manufacturing a power module according to the first aspect of the present invention is a method for manufacturing a power module including two power semiconductor elements connected in parallel, and includes a reading step of reading characteristic values of the plurality of the power semiconductor elements. The power module is connected in parallel to a selection step of selecting the two power semiconductor elements from the plurality of power semiconductor elements based on the characteristic values and the two power semiconductor elements selected by the selection step. The first voltage value, which is the voltage value between the gate and emitter at the specified collector current that is not zero, is applied to the characteristic value by applying a non-zero specified gate-emitter voltage. The product of the second voltage value, which is the gate-emitter voltage that becomes the specified non-zero collector current when a non-zero specified collector-emitter voltage is applied, and the collector current at turn-off and the collector-emitter voltage. The energy loss value, which is the integrated value, is included.

According to the present invention, false detection of overcurrent can be suppressed.

Schematic diagram of combination system Schematic diagram of power module for one phase The figure which shows an example of the characteristic value table The figure which shows an example of the output characteristic of a power semiconductor Flowchart showing the selection process

-First Embodiment-
Hereinafter, the first embodiment of the combination system according to the present invention will be described with reference to FIGS. 1 to 5. The combination system combines power semiconductor elements and manufactures power modules. In the following, the power semiconductor element is also referred to as an "element".

(Constitution)
FIG. 1 is a schematic view of a combination system S according to the present invention. The combination system S includes an arithmetic unit 10, a camera 20, and a robot hand 30. The production of the power module by the combination system S includes a reading process, a selection process, and a manufacturing process. The reading process and the selection process are executed by the arithmetic unit 10, and the manufacturing process is executed by using the robot hand 30.

The arithmetic unit 10 includes a CPU 11 which is a central arithmetic unit, a ROM 12 which is a read-only storage device, a RAM 13 which is a readable / writable storage device, a storage unit 14, and a communication unit 15. The CPU 11 expands the program stored in the ROM 12 into the RAM 13 and executes the program to realize a plurality of functions described later.

The storage unit 14 is a non-volatile storage device, for example, a hard disk drive or a flash memory. The characteristic value table 19 is stored in the storage unit 14. The characteristic value table 19 stores the characteristic values of each power semiconductor element measured in advance. The communication unit 15 is a communication module that communicates with the camera 20 and the robot hand 30 by a predetermined communication protocol, for example, serial communication.

The camera 20 recognizes each power semiconductor element in the supply tray 401, and outputs information on the position and serial number of each power semiconductor element to the arithmetic unit 10. The position of the power semiconductor element is, for example, two-dimensional coordinates or three-dimensional coordinates with reference to the upper left point of the supply tray 401. The serial number is identification information for identifying each power semiconductor element, and may be any information as long as it can be identified. The serial number is, for example, a multi-digit number, a multi-digit alphabet, a combination of alphabets and numbers, and the like. The serial number may be printed as character information on the surface of the power semiconductor element, or may be coded and printed. The coded serial number can be printed on the surface of the power semiconductor element as, for example, a bar code or a two-dimensional code.

The robot hand 30 moves the power semiconductor element from the supply tray 401 to the pair tray 402 based on the operation command received from the arithmetic unit 10. Specifically, the arithmetic unit 10 transmits the robot hand 30 to the robot hand 30 at the position of the power semiconductor element in the supply tray 401, which is the pickup position, and the position in the pair tray 402, which is the drop-off position. Upon receiving these position information, the robot hand 30 picks up the power semiconductor element from the pickup position and drops off the power semiconductor element at the drop-off position. The tip of the robot hand 30 is configured so that the power semiconductor element can be temporarily fixed for picking the power semiconductor element. The robot hand 30 may fix the power semiconductor element by suction using compressed air, for example, or may fix the power semiconductor element by a pinching operation.

A plurality of sets of power semiconductor elements, each set of two, are arranged on the pair tray 402 by the robot hand 30. For example, a total of 6 sets, that is, 12 power semiconductor elements are arranged in the pair tray 402 so as to correspond to the upper arm and the lower arm of each phase of the three-phase AC UVW. Hereinafter, a set of two power semiconductor elements will be referred to as a "pair element". Further, the two power semiconductor elements constituting the pair element are referred to as a "reference element" and a "selection element". However, the reference element and the selection element are for convenience. Although the details will be described later, the element selected first as a candidate for the pair element is called a reference element, and the element combined with the reference element is called a selection element.

Although details will not be described in this embodiment, a power module is manufactured using each set of power semiconductor elements arranged by the robot hand 30. For example, when U1 and U2, which are power semiconductor elements for the U-phase upper arm, and U3 and U4, which are power semiconductor elements for the U-phase lower arm, are arranged on the pair tray 402, U1 to U4 are arranged by a known manufacturing process. A power module for the U phase is created using. The manufacturing process for manufacturing the power module includes the arrangement of the pair elements on the pair tray 402 by the robot hand 30, but is not particularly limited to the rest. For example, the manufacturing process may further include a step of assembling the pair elements arranged on the pair tray 402 to a separately prepared circuit board, or the pair tray 402 itself may be a circuit board.

(Outline of power module)
FIG. 2 is a schematic view of a power module PW for one phase. The power module PW includes two power semiconductor elements and a driver IC in each of the upper arm H and the lower arm L. Specifically, the upper arm H includes a first element P1 which is a first power semiconductor element, a second element P2 which is a second power semiconductor element, and an IC1 which is a first driver IC. The lower arm L includes a third element P3 which is a third power semiconductor element, a fourth element P4 which is a fourth power semiconductor element, and an IC2 which is a second driver IC. The first element P1 and the second element P2 are connected in parallel, and the third element P3 and the fourth element P4 are connected in parallel.

That is, the combination of the first element P1 and the second element P2 is a pair element. Further, the combination of the third element P3 and the fourth element P4 is another pair element. The broken line with an arrow in FIG. 2 will be referred to later in the description.

IC1 applies a voltage to the gates of the first element P1 and the second element P2. The IC2 applies a voltage to the gates of the third element P3 and the fourth element P4. Of the four power semiconductor elements in the power module PW, the first element P1 and the second element P2 are one combination, and the third element P3 and the fourth element P4 are another combination. As will be described later, since the arithmetic unit 10 selects the power semiconductor element and determines the combination, the first element P1 and the second element P2 have similar electrical characteristics, and the third element P3 and the fourth element P4 Are similar in electrical properties. However, the similarity of the electrical characteristics of the first element P1 and the third element P3 and the similarity of the electrical characteristics of the first element P1 and the fourth element P4 are irrelevant.

FIG. 3 is a diagram showing an example of the characteristic value table 19. The characteristic value table 19 is composed of a plurality of records, and each record has fields of serial number 191 and first voltage value 192, second voltage value 193, and energy loss value 194. Information specific to each power semiconductor element is stored in each record. A serial number for identifying a power semiconductor element is stored in the field of serial number 191. The field of the first voltage value 192 stores the first voltage value of the power semiconductor element specified by the value of the field of serial number 191. The field of the second voltage value 193 stores the second voltage value of the power semiconductor element specified by the value of the field of serial number 191. The field of the energy loss value 194 stores the energy loss value of the power semiconductor device specified by the value of the field of serial number 191.

The values stored in the characteristic value table 19 are obtained by actually measuring each power semiconductor element, and this measurement may be performed by automatic processing or by a human being. Each of the first voltage value, the second voltage value, and the energy loss value will be described below, but since the measurement methods for each are known, they will not be described in the present embodiment. Further, the characteristic values of each power semiconductor element have been measured in advance.

(Characteristic value)
The first voltage value, the second voltage value, and the energy loss value, which are the characteristic values of the power semiconductor element, will be described. In the following description, turn-on means that the gate-emitter voltage exceeds a predetermined threshold value. Turn-off means that the gate-emitter voltage falls below a predetermined threshold value.

The first voltage value is a collector-emitter voltage at a designated collector current X2 when a designated gate-emitter voltage X1 is applied. The second voltage value is a gate-emitter voltage at which a designated collector-emitter voltage X3 is applied and a designated collector current X4 is obtained. The first voltage value will be described in detail on behalf of the first voltage value and the second voltage value.

FIG. 4 is a diagram showing an example of output characteristics of a power semiconductor, specifically, an example of a collector-emitter voltage Vce when a predetermined collector current Ic is flowing. However, since this characteristic differs depending on the gate-emitter voltage, FIG. 4 shows the case where the gate-emitter voltage is 9V to 13V. In any of the gate-emitter voltages, the gate-emitter voltage Vce tends to increase as the collector current Ic increases.

For example, when the gate-emitter voltage is 13V and the collector current is zero, the gate-emitter voltage is also zero, but the gate-emitter voltage also increases as the collector current increases. For example, when the gate-emitter voltage is 13V, if the collector current is Y21, the collector-emitter voltage is Y11, and if the collector current is Y22, the collector-emitter voltage is Y13. Even if the collector current is Y21, the collector-emitter voltage is Y12 if the gate-emitter voltage is 12V.

It is desirable that the paired elements have similar electrical characteristics, and if possible, all of the characteristics shown in FIG. 4 are the same, that is, at any gate-emitter voltage, at any collector current, and at any collector-emitter voltage. It is desirable that the values are the same. However, in order to confirm that all the characteristics shown in FIG. 4 are the same, a complicated procedure is required and the cost is high. Therefore, the pair elements are selected by comparing the characteristics under specific predetermined conditions. One of the parameters set based on this idea is the first voltage value. Specifically, as described above, the specified gate-emitter voltage X1 is applied and the collector-emitter voltage at the specified collector current X2. Is.

However, X1 and X2 need to be set appropriately according to the characteristics of the power semiconductor used, and at least X1 and X2 are not zero. The gate-emitter voltage X1 is equal to or less than the maximum rating, and the collector current X2 is equal to or less than the maximum collector current at the predetermined gate-emitter voltage X1. For example, in the example shown in FIG. 4, when the gate-emitter voltage X1 is set to 13V, the designated collector current X2 is set to Y22 or less.

The energy loss value is the integral value of the product of the collector current and the collector-emitter voltage at turn-off. Specifically, it is measured in the period from the time when the gate current is cut off and the collector-emitter voltage starts to rise to the period when the power semiconductor element completely shifts to the off state.

(Significance of selection by selection process)
When the driver IC operates and a voltage is applied to the gate of each power semiconductor element, the timing at which the current flows to the emitter is determined by the gate capacitance, the first voltage value, and the second voltage value. Therefore, if there is a difference in the gate capacitance, the first voltage value, and the second voltage value between the two power modules connected in parallel, the timing at which the current is output from the power module is deviated.

By the way, the energy loss value determined by the current and voltage at the time of turn-off is determined by the gate capacitance Cg. Therefore, the gate capacitance Cg can be evaluated equivalently by evaluating the energy loss value determined by the current and voltage at the time of turn-off.

The first voltage value indicates the carrier conduction characteristics of the power module, and if there is a difference in the first voltage value between two power modules connected in parallel, the carrier amount will be different and the switching speed will be increased. There is a difference. Here, in order to show a specific example, in the circuit shown in FIG. 2, the first element P1 will be described as having a faster switching speed than the second element P2 and the current will flow first.

If the timing at which the current is output from the power module is deviated, there will be a difference between the timing at which the recovery current of the anti-arm diode, that is, the second element P2 flows, and the peak value of the recovery current. When these differences occur, an event occurs in which the emitter potential of the second element P2 rises through the current path as shown by the broken line in FIG. If the emitter potential of the second element P2 rises, the element connected to the driver IC may malfunction, resulting in overcurrent erroneous detection. However, in the present embodiment, since an appropriate pair element is selected by the selection process, a difference in switching speed is unlikely to occur, and false detection of overcurrent can be suppressed.

Further, in the semiconductor element, the collector current flows at the timing when the gate voltage rises and reaches the second voltage value, and the collector potential falls. Therefore, if there is a difference in the second voltage value between the two power modules connected in parallel, the timing at which the diode recovery current flows between the two power modules will be different. Even when the difference in the recovery current values of the diode elements mounted on the two power modules is large, the potential difference between the power modules in FIG. 2 is similarly generated, which is not preferable. The method of this embodiment can prevent this problem.

(flowchart)
FIG. 5 is a flowchart showing a selection process for selecting a pair element. However, to be precise, FIG. 5 includes processes other than the selection process. The execution subject of each step described below is the CPU 11 of the arithmetic unit 10.

In step S301, the CPU 11 acquires information on the power semiconductor element arranged in the supply tray 401 from the camera 20, that is, information on the position and serial number of the power semiconductor element. In the following step S302, the CPU 11 reads the characteristic value table 19 from ... This step S302 is a reading process. Further, steps S303 to S307 described below, that is, from step S303 to immediately before step S308 are selection steps.

In the following step S303, the CPU 11 determines a reference element which is the first element of the pair element. This determination method is not particularly limited, and any power semiconductor device having a serial number obtained from the camera may be used. That is, any power semiconductor element arranged in the supply tray 401 may be used. To exemplify this determination method, the first power semiconductor element when the serial numbers are sorted in dictionary order may be used as the reference element, or the power semiconductor element whose position in the supply tray 401 is closest to the center of the supply tray 401 may be used as the reference element. May be.

In the following step S304, the CPU 11 searches for an element that matches the condition with the reference element as a reference. This condition means that the difference between the first voltage values is equal to or less than a predetermined threshold value, the difference between the second voltage values is equal to or less than a predetermined threshold value, and the difference between the energy loss values is equal to or less than a predetermined threshold value. The first voltage value of the reference element is V1B, the second voltage value of the reference element is V2B, the energy loss value of the reference element is EB, the threshold value of the first voltage value is TH_1, the threshold value of the second voltage value is TH_2, and the energy. Assuming that the threshold value of the loss value is TH_E, the selection element is an element that satisfies all the conditions of the following equations 1 to 3. However, the first voltage value of the selection element is V1S, the second voltage value of the selection element is V2S, and the energy loss value of the selection element is ES. Further, "ABS" in the formulas 1 to 3 means the calculation of the absolute value.

ABS (V1B-V1S) ≤ TH_1 ... Equation 1
ABS (V2B-V2S) ≤ TH_2 ... Equation 2
ABS (EB-ES) ≤ TH_E ... Equation 3

The above-mentioned three threshold values can be obtained by, for example, statistical processing executed in advance. For power modules that were actually created and did not cause false detection of overcurrent, statistics were taken for the difference in the first voltage value, the difference in the second voltage value, and the difference in the energy loss value, and the minimum values for each. And each of the three sigma values is used as the threshold value.

In the following step S305, the CPU 11 determines the search result of step S304, that is, whether or not an element corresponding to the condition exists. The CPU 11 proceeds to step S306 when it determines that the corresponding element exists, and proceeds to step S307 when it determines that the corresponding element does not exist. In step S306, the CPU 11 selects any one of the elements corresponding to the conditions as the selection element. As a reminder, if there is only one applicable element, that element is unconditionally selected as the selection element. The selection method of the selection element is not particularly limited, and for example, the first power semiconductor element when the serial numbers of the elements corresponding to the conditions are sorted in dictionary order may be used as the selection element. Further, among the elements satisfying the conditions, the power semiconductor element whose position on the supply tray 401 is closest to the reference element may be selected.

In step S307, the CPU 11 changes the reference element and returns to step S304. The reference element newly set in step S307 may be any power semiconductor element as long as it is a power semiconductor element different from the reference element determined in step S303. In step S308, which is executed after step S306, the CPU 11 transmits the position information of the pair element, that is, the reference element and the selection element to the robot hand 30, and ends the process shown in FIG.

According to the first embodiment described above, the following effects can be obtained.
(1) The method for manufacturing a power module in the present embodiment is a method for manufacturing a power module including two power semiconductor elements connected in parallel, that is, a pair element. In this manufacturing method, a reading step (step S302 in FIG. 5) of reading the characteristic values of a plurality of power semiconductor elements from the characteristic value table 19 and two power semiconductor elements are selected from the plurality of power semiconductor elements based on the characteristic values. This includes a selection step (steps S303 to S307 in FIG. 5) and a manufacturing step of connecting two power semiconductor elements selected by the selection step in parallel to manufacture a power module. A non-zero specified gate-emitter voltage is applied to the characteristic value, and the first voltage value, which is the voltage value between the gate and emitter at the non-zero specified collector current, and the non-zero specified collector-emitter voltage. Includes the second voltage value, which is the gate-emitter voltage that results in a non-zero specified collector current when is applied, and the energy loss value, which is the integral of the product of the collector current and collector-emitter voltage at turn-off. ..

The timing at which a current flows to the emitter when a voltage is applied to the gate of a power semiconductor element is determined by the gate capacitance, the first voltage value, and the second voltage value, and the gate capacitance can be evaluated by the energy loss value. Therefore, by selecting the power semiconductor element based on the first voltage value, the second voltage value, and the energy loss value, the switching speed can be made uniform and false detection of overcurrent can be suppressed.

(2) In the selection step, the difference between the first voltage values of the two power semiconductor elements selected is equal to or less than a predetermined threshold value, the difference between the second voltage values is equal to or less than a predetermined threshold value, and the energy loss value is the same. The condition is that the difference is less than or equal to a predetermined threshold.

(Modification example 1)
The first voltage value may be the minimum value or the maximum value of the voltage Vge between the gate and the emitter whose change is temporarily slow in the transient state after the turn-on.

(Modification 2)
Even if the arithmetic unit 10 is realized by FPGA (Field Programmable Gate Array) which is a rewritable logic circuit instead of the combination of CPU 11, ROM 12 and RAM 13, and ASIC (Application Specific Integrated Circuit) which is an integrated circuit for specific applications. Good. Further, the arithmetic unit 10 may be realized by a combination of different configurations, for example, a combination of the CPU 11, ROM 12, RAM 13 and FPGA, instead of the combination of the CPU 11, ROM 12, and RAM 13.

(Modification example 3)
The system configuration shown in FIG. 1 is an example, and different configurations may be used as long as the same functions can be realized. For example, the characteristic value table 19 may be stored outside the arithmetic unit 10, and the arithmetic unit 10 may read the characteristic value table 19 from the outside by communication. Further, instead of the configuration in which the arithmetic unit 10 and the robot hand 30 directly communicate with each other, the arithmetic unit 10 may output an operation command to the PLC and output a voltage value or the like from the PLC to the robot hand 30.

In each of the above-described embodiments and modifications, the program is stored in the ROM 12, but the program may be stored in the storage unit 14. Further, the arithmetic unit 10 may include an input / output interface (not shown), and a program may be read from another device when necessary via the input / output interface and a medium in which the arithmetic unit 10 can be used. Here, the medium refers to, for example, a storage medium that can be attached to and detached from an input / output interface, or a communication medium, that is, a network such as wired, wireless, or optical, or a carrier wave or digital signal that propagates in the network. In addition, some or all of the functions realized by the program may be realized by the hardware circuit or FPGA.

The present invention is not limited to these contents. Other aspects conceivable within the scope of the technical idea of the present invention are also included within the scope of the present invention.

10 ... Arithmetic logic unit 14 ... Storage unit 15 ... Communication unit 19 ... Characteristic value table

Claims (2)

A method for manufacturing a power module including two power semiconductor elements connected in parallel.
A reading process for reading the characteristic values of a plurality of the power semiconductor elements, and
A selection step of selecting the two power semiconductor elements from the plurality of power semiconductor elements based on the characteristic values, and a selection process.
Including a manufacturing step of manufacturing the power module by connecting the two power semiconductor elements selected by the selection step in parallel.
A non-zero specified gate-emitter voltage is applied to the characteristic value, and the first voltage value, which is the voltage value between the gate and emitter at the non-zero specified collector current, and the non-zero specified collector-emitter voltage value. Includes the second voltage value, which is the gate-emitter voltage that is the specified collector current that is not zero when a voltage is applied, and the energy loss value, which is the integrated value of the product of the collector current and collector-emitter voltage at turn-off. How to manufacture the power module. In the method for manufacturing a power module according to claim 1,
In the selection step, the two power semiconductor elements selected have the difference between the first voltage values and less than a predetermined threshold value, the difference between the second voltage values and less than a predetermined threshold value, and the energy loss value. A method for manufacturing a power module, provided that the difference between the two is equal to or less than a predetermined threshold value.

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