JP2020162360A - Switching control circuit - Google Patents

Abstract

To provide a switching control circuit capable of suppressing deterioration of efficiency by suppressing sounding.SOLUTION: The switching control circuit has an intermittent sampling action mode, in which: when an output voltage of a switching power supply rises to an upper limit, a suspension period for suspending a switching operation executed by a switching element of the switching power supply is started; and when the output voltage falls to a lower limit, a switching period for executing the switching operation is started. The switching control circuit includes an output voltage range adjustment unit configured to adjust at least one of the upper limit and the lower limit on the basis of a state of a load to which the output voltage is applied.SELECTED DRAWING: Figure 3

Description

The present invention relates to a switching control circuit used in a switching power supply device.

As a switching power supply that can reduce switching loss, PFM (pulse) enters a pause period in which switching operation is suspended when the output voltage rises to the upper limit, and enters a switching period in which switching operation is performed when the output voltage drops to the lower limit. A frequency modulation) type switching power supply device is known (see, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2011-114977 (paragraph 0002) WO 2013/08403 (paragraph 0011)

In a PFM type switching power supply, the lighter the load, the longer the switching cycle (the total period of a single switching period followed by a single pause period), so the switching cycle enters the audible range and noise is generated. There is a risk.

In order to prevent the occurrence of sounding, a method of setting the minimum value of the switching frequency (the reciprocal of the switching cycle) outside the audible range (for example, 20 kHz or more) is known (see, for example, Patent Document 2). However, when the minimum value of the switching frequency is set outside the audible range, the discard current is included in the output current of the PFM type switching power supply device, and the discard current deteriorates the efficiency.

In view of the above situation, it is an object of the present invention to provide a switching control circuit capable of suppressing deterioration of efficiency by suppressing sounding.

The switching control circuit disclosed in the present specification starts a pause period in which the switching operation of the switching element of the switching power supply device is suspended when the output voltage of the switching power supply device rises to the upper limit value, and the output voltage is increased. An output voltage range that has an intermittent operation mode that starts a switching period in which the switching operation is performed when the voltage drops to the lower limit, and adjusts at least one of the upper limit value and the lower limit value based on the state of the load to which the output voltage is applied. It is a configuration including an adjusting unit (first configuration). The switching period includes not only a switching period in a narrow sense in which switching of the switching element on and off is repeated, but also that the switching element is always on and the switching element is switched on and off. Includes no period.

In the switching control circuit having the first configuration, the output voltage range adjusting unit includes a first monitoring unit that monitors the total length of the switching period and the pause period or the length of the pause period. A configuration (second configuration) may be used in which at least one of the upper limit value and the lower limit value is adjusted based on the monitoring result of the first monitoring unit.

In the switching control circuit having the first or second configuration, the output voltage range adjusting unit may have a configuration (third configuration) in which the upper limit value is reduced as the load is lighter.

The switching control circuit having the third configuration may have a configuration (fourth configuration) including a variable unit that changes the lower limit value without being based on the load state.

In the switching control circuit having the first or second configuration, the output voltage range adjusting unit may have a configuration (fifth configuration) in which the lower limit value is increased as the load is lighter.

The switching control circuit having the fifth configuration may have a configuration (sixth configuration) including a variable unit that changes the upper limit value without being based on the load state.

In the switching control circuit having the first or second configuration, even if the output voltage range adjusting unit has a configuration in which the upper limit value is decreased and the lower limit value is increased as the load is lighter (seventh configuration). Good.

In the switching control circuit having any of the first to seventh configurations, a current generating unit is further provided, and in the current generating unit, the output voltage range adjusting unit sets the upper limit value to the minimum value of the adjusting range of the upper limit value. When the lower limit value is set to the maximum value of the adjustment range of the lower limit value, a bleeder current that promotes a decrease in the output voltage during the rest period may be generated (eighth configuration). When the upper limit value is a fixed value, the fixed value is the maximum value and the minimum value of the adjustment range of the upper limit value. Similarly, when the lower limit value is a fixed value, the fixed value is the maximum value and the minimum value of the adjustment range of the lower limit value.

In the switching control circuit having the eighth configuration, a current adjusting unit is further provided, and the current adjusting unit adjusts the value of the bleeder current based on the state of the load to which the output voltage is applied (the ninth configuration). ) May be.

In the switching control circuit having the ninth configuration, the current adjusting unit has a second monitoring unit that monitors the total length of the switching period and the pause period or the length of the pause period, and the second monitoring unit. The configuration may be such that the value of the bleeder current is adjusted based on the monitoring result of the monitoring unit (tenth configuration).

The switching power supply device disclosed in the present specification includes a switching element and a switching control circuit having the above-mentioned first to tenth configurations for controlling switching of the switching element (11th configuration). ).

The vehicle disclosed in the present specification has a configuration (12th configuration) including a switching power supply device having the eleventh configuration and a battery for supplying electric power to the switching power supply device.

According to the switching control circuit disclosed in the present specification, it is possible to suppress deterioration of efficiency by suppressing sounding.

The figure which shows the whole configuration example of a switching power supply device The figure which shows one configuration example of the current generation part The figure which shows one configuration example of a switching control circuit The figure which shows one configuration example of a D / A converter Time chart of output voltage and count value Time chart of output voltage and count value External view of the vehicle The figure which shows the other configuration example of a switching control circuit

<Overall configuration example of switching power supply device>
FIG. 1 is a diagram showing an overall configuration example of a switching power supply device. The switching power supply device shown in FIG. 1 is a step-down switching regulator, and includes a switching control circuit 1, a current generator 2, MOS transistors Q1 and Q2 which are switching elements, an inductor L1, and an output capacitor C1. It includes pressure resistors R1 and R2.

The MOS transistor Q1 is a P-channel type MOS transistor, and is an example of a switch that electrically conducts / cuts off an input terminal to which an input voltage VIN is applied and one end of an inductor L1. The source of the MOS transistor Q1 is connected to an input terminal to which an input voltage VIN is applied. The drain of the MOS transistor Q1 is connected to one end of the inductor L1, the drain of the MOS transistor Q2, and one end of the current generation unit 2. The other end of the current generating unit 2 is connected to the ground potential.

The MOS transistor Q2 is an N-channel type MOS transistor, and is an example of a switch that electrically conducts / cuts off the ground potential and one end of the inductor L1. As described above, the drain of the MOS transistor Q2 is connected to one end of the inductor L1, the drain of the MOS transistor Q1, and one end of the current generation unit 2. The source of the MOS transistor Q2 is connected to the ground potential. A diode may be used instead of the MOS transistor Q2.

The other end of the inductor L1 is connected to one end of the output capacitor C1, one end of the voltage dividing resistor R1, and an output terminal for outputting the output voltage VOUT. The output voltage VOUT is supplied to a load (not shown). The other end of the output capacitor C1 is connected to the ground potential. The other end of the voltage dividing resistor R1 is connected to one end of the voltage dividing resistor R2, and the other end of the voltage dividing resistor R2 is connected to the ground potential.

The output capacitor C1 is a smoothing capacitor for reducing the ripple of the output voltage VOUT. Further, the voltage dividing resistors R1 and R2 divide the output voltage VOUT to generate a feedback voltage VFB, and supply the feedback voltage VFB to the switching control circuit 1. The drain-source voltage VDS1 of the MOS transistor Q1 is also supplied to the switching control circuit 1.

The switching control circuit 1 generates the gate signal G1 of the MOS transistor Q1 and the gate signal G2 of the MOS transistor Q2, and supplies the gate signals G1 and G2 to the gates of the MOS transistors Q1 and Q2. The switching control circuit 1 controls the current generation unit 2 by the digital data D1.

The current generation unit 2 generates a bleeder current IB. In other words, the current generation unit 2 draws the bleeder current IB from the connection node between the MOS transistor Q1, the MOS transistor Q2, and the inductor L1. As shown in FIG. 2, for example, the current generation unit 2 can be composed of a D / A converter 2A for inputting digital data D1, an operational amplifier 2B, an N-channel MOS transistor 2C, and a resistor 2D.

<Configuration example of switching control circuit>
FIG. 3 is a diagram showing a configuration example of the switching control circuit 1. In the example shown in FIG. 3, the switching control circuit 1 includes an error amplifier 11, a reference voltage source 12, a resistor R3, a capacitor C2, an oscillator 13, a slope circuit 14, a comparator 15, a timing control circuit 16, and the like. It includes a comparator 17, a constant voltage source 18, a D / A converter 19, a comparator 20, a comparator 21, and an external terminal T1.

The error amplifier 11 generates an error signal VC corresponding to the difference between the feedback voltage VFB and the reference voltage VREF output from the reference voltage source 12. The error signal VC is phase-compensated by a phase compensation circuit composed of a resistor R3 and a capacitor C2.

The oscillator 13 generates a clock signal CLK, outputs the clock signal CLK to the slope circuit 14, and outputs the clock signal CLK to the timing control circuit 16 as a set signal SET.

The slope circuit 14 generates a slope voltage VSLP based on the clock signal CLK, and outputs the slope voltage VSLP to the non-inverting input terminal of the comparator 15. The slope voltage VSLP is reset by the reset signal RST output from the comparator 15.

The comparator 15 compares the phase-compensated error signal VC with the slope voltage VSLP to generate a reset signal RST which is a comparison signal, and outputs the reset signal RST to the timing control circuit 16.

The switching power supply device shown in FIG. 1 is a voltage mode control type switching regulator. For example, the comparator 15 receives information on the current flowing through the inductor L1, and either the slope voltage SLP or the phase-compensated error signal VC is used. A current mode control type switching regulator may be obtained by applying an offset according to the current flowing through the inductor L1.

The timing control circuit 16 is a digital circuit. The timing control circuit 16 includes a mode switching unit 161, an output voltage range adjusting unit 162, and a current adjusting unit 163. The output voltage range adjusting unit 162 has a counter 164, and the current adjusting unit 163 has a counter 165.

The timing control circuit 16 has an intermittent operation mode and a non-intermittent operation mode.

The comparator 17 compares the drain-source voltage VDS1 of the MOS transistor Q1 with the constant voltage VR output from the constant voltage source 18. The output signal of the comparator 17 is supplied to the mode switching unit 161. In this embodiment, if the load current is 1 A (ampere) or more, the output signal of the comparator 17 becomes high level, and if the load current is less than 1 A (ampere), the output signal of the comparator 17 becomes low level. As described above, the value of the constant voltage VR is set. However, the above 1A (ampere) is just an example, and other values may be used. A total of the load current and the bleeder current IB flows through the MOS transistor Q1, but the current generator 2 sets the bleeder current IB to zero near the level switching of the output signal of the comparator 17. In addition, unlike this embodiment, a current detector that detects only the load current may be used.

If the output signal of the comparator 17 is at a high level, the mode switching unit 161 selects a non-intermittent operation mode. The non-intermittent operation mode is a mode in which the MOS transistors Q1 and Q2 are continuously switched. In the non-intermittent operation mode, the timing control circuit 16 switches the gate signal G1 from the low level to the high level when the set signal SET is switched from the high level to the low level, and when the reset signal RST is switched from the low level to the high level. The gate signal G1 is switched from high level to low level. In the non-intermittent operation mode, the timing control circuit 16 performs on / off control of the MOS transistor Q1 and the MOS transistor Q2 in a complementary manner. Therefore, in the non-intermittent operation mode, the MOS transistors Q1 and Q2 are PWM-controlled at a PWM (pulse width modulation) frequency equal to the frequency of the slope voltage VSSP. It is desirable to provide a dead time in which both the MOS transistor Q1 and the MOS transistor Q2 are off.

On the other hand, if the output signal of the comparator 17 is low level, the mode switching unit 161 selects the intermittent operation mode. In the intermittent operation mode, when the output voltage VOUT rises to the upper limit value VMAX, the switching operation of the MOS transistors Q1 and Q2 is suspended to start the pause period in which the MOS transistors Q1 and Q2 are put into a high impedance state (off state), and the output is performed. This mode starts a switching period in which the MOS transistors Q1 and Q2 are switched when the voltage VOUT drops to the lower limit value VMIN. In the intermittent operation mode, the timing control circuit 16 switches between the pause period and the switching period based on the output signals of the comparators 20 and 21. During the switching period, the timing control circuit 16 complementarily controls the MOS transistors Q1 and Q2 on and off. More specifically, in the switching period, the timing control circuit 16 PWM-controls, for example, MOS transistors Q1 and Q2.

The output voltage range adjusting unit 162 adjusts the upper limit value VMAX based on the state of the load to which the output voltage VOUT is applied. More specifically, the counter 164 monitors the total length of the switching period and the rest period, and the output voltage range adjusting unit 162 adjusts the upper limit value VMAX based on the monitoring result (counter value) of the counter 164.

The output voltage range adjusting unit 162 outputs the digital data D2 indicating the setting of the upper limit value VMAX to the D / A converter 19. The D / A converter 19 converts the digital data D2 into a voltage VH which is an analog voltage and outputs the digital data D2 to the inverting input terminal of the comparator 20. The value of the voltage VH is equal to the value obtained by multiplying the upper limit value VMAX by the voltage dividing ratio of the voltage dividing circuit composed of the voltage dividing resistors R1 and R2.

As shown in FIG. 4, the D / A converter 19 is composed of a constant current source 19A, a variable resistor 19B whose resistance value is variable according to digital data D2, an operational amplifier 19C, and a constant voltage source 19D. be able to. In the example shown in FIG. 4, the value of the voltage VH is equal to the value obtained by adding the reference voltage VREF and the potential difference across the variable resistor 19B. Note that, unlike the example shown in FIG. 4, the value of the voltage VH may not depend on the reference voltage VREF.

The comparator 20 compares the voltage VH output from the D / A converter 19 with the feedback voltage VFB. The comparator 21 compares the voltage VL corresponding to the lower limit value VMIN with the feedback voltage VFB. The value of the voltage VL is equal to the value obtained by multiplying the lower limit value VMIN by the voltage dividing ratio of the voltage dividing circuit composed of the voltage dividing resistors R1 and R2.

The current adjusting unit 163 adjusts the value of the bleeder current IB (see FIG. 1) based on the state of the load to which the output voltage VOUT is applied. More specifically, the counter 165 monitors the total length of the switching period and the rest period, and the current adjusting unit 163 adjusts the value of the bleeder current IB (see FIG. 1) based on the monitoring result (counter value) of the counter 165. To do.

The current adjusting unit 163 outputs digital data D1 indicating the setting of the value of the bleeder current IB (see FIG. 1) to the current generating unit 2 (see FIG. 1).

The external terminal T1 is provided in a semiconductor integrated circuit device including a timing control circuit 16. The external terminal T1 is a terminal for the semiconductor integrated circuit device including the timing control circuit 16 to establish a connection with the outside. Examples of the semiconductor integrated circuit device including the timing control circuit 16 include a semiconductor integrated circuit device including only the timing control circuit 16, a semiconductor integrated circuit device including only the switching control circuit 1, a switching control circuit 1, and switching elements Q1 and Q2. Examples thereof include semiconductor integrated circuit devices and the like. Various settings of the output voltage range adjustment unit 162 and the current adjustment unit 163 (the number of steps of the upper limit value VMAX) depending on the circuit constant of the external element connected to the external terminal T1 and the register setting data supplied from the outside to the external terminal T1. , Upper limit value VMAX step width, counter 164 monitoring time, number of bleeder current IB steps, bleeder current IB step width, counter 165 monitoring time, etc.). Although FIG. 1 illustrates a single terminal as the external terminal T1, the external terminal T1 may be composed of a plurality of external terminals.

<Intermittent operation mode>
Next, the details of the intermittent operation mode will be described with reference to the time chart of FIG. The number of steps, the value of the voltage VH, the value of the bleeder current IB, and the like, which will be described later, are merely examples and may be different from those of the present embodiment.

The output voltage range adjusting unit 162 adjusts the setting of the upper limit value VMAX in four steps. In the setting where the upper limit value VMAX is the largest, the value of the voltage VH is 1.030 times (REF + 3.0%) the reference voltage REF. In the setting where the upper limit value VMAX is the second largest, the value of the voltage VH is 1.025 times (REF + 2.5%) the reference voltage REF. In the setting where the upper limit value VMAX is the third largest, the value of the voltage VH is 1.020 times (REF + 2.0%) the reference voltage REF. In the setting where the upper limit value VMAX is the smallest, the value of the voltage VH is 1.015 times (REF + 1.5%) the reference voltage REF. The initial setting of the upper limit value VMAX is the setting in which the upper limit value VMAX is the largest.

If the counter value of the counter 164 is "0", the upper limit value VMAX is set to the maximum value. If the counter value of the counter 164 is "1", the upper limit value VMAX is set to the second largest. If the counter value of the counter 164 is "2", the upper limit value VMAX is set to the third largest. If the counter value of the counter 164 is "3", the upper limit value VMAX is set to the smallest setting.

The value of the voltage VL is 1.010 times (REF + 1.0%) the reference voltage REF.

At the time t1 when the non-intermittent operation mode is switched to the intermittent operation mode, the upper limit value VMAX is the initial setting, so the value of the voltage VH is REF + 3.0%.

The counter 164 monitors from the start of the switching period to the end of the rest period. From the start of the switching period to the end of the pause period, the output voltage range adjusting unit 162 lowers the setting of the upper limit value VMAX by one step every 32 μs elapses from the start time of the switching period. Therefore, in the example shown in FIG. 5, the upper limit value VMAX setting is lowered by one step at the time point t2 when 32 μs has passed from the start time point t1 of the switching period, and the upper limit value VMAX setting is further one step at the time point t3 when 32 μs has passed from the time point t2. The setting of the upper limit value VMAX is further lowered by one step at the time point t4 when 32 μs has passed from the time point t3. As a result, the amount of increase in the output voltage VOUT in the next switching period can be suppressed.

If the length from the start of the switching period to the end of the pause period is 16 μs or more and 32 μs or less, the output voltage range adjusting unit 162 maintains the setting of the upper limit value VMAX as it is. Therefore, in the example shown in FIG. 5, since the period from the time point t5 to the time point t6 and the period from the time point t6 to the time point t7 are 16 μs or more and 32 μs or less, respectively, the setting of the upper limit value VMAX is maintained as it is.

If the length from the start of the switching period to the end of the rest period is less than 16 μs, the output voltage range adjusting unit 162 raises the setting of the upper limit value VMAX by one step. Therefore, in the example shown in FIG. 5, since the period from the time point t7 to the time point t8 is less than 16 μs, the setting of the upper limit value VMAX is increased by one step at the time point t8. As a result, the amount of increase in the output voltage VOUT in the next switching period can be increased.

By adjusting the setting of the upper limit value VMAX based on the load state as described above, the length from the start of the switching period to the end of the rest period can be set to 32 μs or less. This makes it possible to prevent noise.

Further, by adjusting the setting of the upper limit value VMAX based on the load state as described above, the length from the start of the switching period to the end of the rest period can be set to 16 μs or more. This makes it possible to increase efficiency.

Note that, unlike the present embodiment, the counter 164 may monitor the "length of the pause period" instead of the "length from the start of the switching period to the end of the pause period".

When the load is very light, even if the upper limit value VMAX is set to the minimum value, the length from the start of the switching period to the end of the rest period may not be 32 μs or less. Therefore, in the present embodiment, the bleeder current IB can be passed when the upper limit value VMAX is the smallest setting.

Then, by adjusting the value of the bleeder current IB by the current adjusting unit 163 as shown in the time chart of FIG. 6, the loss caused by the bleeder current IB is suppressed as much as possible.

The current adjusting unit 163 adjusts the setting of the value of the bleeder current IB in 8 steps. The eight steps are 0mA (milliampere), 1mA (milliampere), 2mA (milliampere), 3mA (milliampere), 4mA (milliampere), 5mA (milliampere), 6mA (milliampere), and 7mA (milliampere). The initial setting of the value of the bleeder current IB is 0 mA (milliampere).

If the counter value of the counter 165 is "0", the bleeder current IB is 0 mA (milliampere). If the counter value of the counter 165 is "1", the bleeder current IB is 1 mA (milliampere). If the counter value of the counter 165 is "2", the bleeder current IB is 2 mA (milliampere). If the counter value of the counter 165 is "3", the bleeder current IB is 3 mA (milliampere). If the counter value of the counter 165 is "4", the bleeder current IB is 4 mA (milliampere). If the counter value of the counter 165 is "5", the bleeder current IB is 5 mA (milliampere). If the counter value of the counter 165 is "6", the bleeder current IB is 6 mA (milliampere).

When the upper limit value VMAX is the smallest setting, the counter 165 monitors from the start of the switching period to the end of the rest period. From the start of the switching period to the end of the rest period, the current adjusting unit 163 raises the setting of the bleeder current IB by one step every 32 μs from the start of the switching period. Therefore, in the example shown in FIG. 6, the setting of the bleeder current IB is increased by one step at the time point t12 when 32 μs has passed from the time point t11 when the upper limit value VMAX is set to the minimum, and the bleeder current IB is set at the time point t13 when 32 μs has passed from the time point t12. The setting of is raised by one step. This makes it possible to promote a decrease in the output voltage VOUT during the rest period.

If the length from the start of the switching period to the end of the rest period is 16 μs or more and 32 μs or less, the current adjusting unit 163 maintains the current setting of the bleeder current IB. Therefore, in the example shown in FIG. 6, since the period from the time point t14 to the time point t15 and the period from the time point t16 to the time point t17 are 16 μs or more and 32 μs or less, respectively, the setting of the bleeder current IB is maintained as it is.

If the length from the start of the switching period to the end of the rest period is less than 16 μs, the current adjusting unit 163 lowers the setting of the bleeder current IB by one step. Therefore, in the example shown in FIG. 6, since the period from the time point t15 to the time point t16 is less than 16 μs, the setting of the bleeder current IB is lowered by one step at the time point t16. As a result, the loss caused by the bleeder current IB can be suppressed.

By adjusting the setting of the bleeder current IB based on the load state as described above, the loss caused by the bleeder current IB can be suppressed as much as possible.

When the load current is in the vicinity of 1 A (ampere), the intermittent operation mode and the non-intermittent operation mode may be frequently switched. In this case, if the upper limit value VMAX and the bleeder current IB settings are initialized each time the non-intermittent operation mode is entered, the adjustments up to that point will not be fully utilized. Therefore, for example, even if the intermittent operation mode is switched to the non-intermittent operation mode, the PWM control in the non-intermittent operation mode returns to the intermittent operation mode in less than N (N is a natural number of 2 or more, for example, N = 5) cycle. In this case, the settings of the upper limit value VMAX and the bleeder current IB may not be initialized.

<Use>
Next, an application example of the switching power supply device shown in FIG. 1 will be described. FIG. 7 is an external view showing a configuration example of a vehicle equipped with an in-vehicle device. The vehicle X of this configuration example is equipped with a battery (not shown in FIG. 7), a switching power supply device shown in FIG. 1 (not shown in FIG. 7), and in-vehicle devices X11 to X17.

The switching power supply device shown in FIG. 1 inputs a DC voltage from a battery to generate an output voltage, and supplies the output voltage to at least one of the in-vehicle devices X11 to X17.

The in-vehicle device X11 is an engine control unit that performs control related to the engine (injection control, electronic throttle control, idling control, oxygen sensor heater control, auto cruise control, etc.).

The in-vehicle device X12 is a lamp control unit that controls turning on and off such as HID [high intensity discharged lamp] and DRL [daytime running lamp].

The in-vehicle device X13 is a transmission control unit that performs control related to the transmission.

The in-vehicle device X14 is a body control unit that performs controls related to the movement of the vehicle X (ABS [anti-lock brake system] control, EPS [electric power steering] control, electronic suspension control, etc.).

The in-vehicle device X15 is a security control unit that controls drive such as a door lock and a security alarm.

The in-vehicle device X16 is an electronic device incorporated in the vehicle X at the factory shipment stage as a standard equipment or a manufacturer's option such as a wiper, an electric door mirror, a power window, an electric sunroof, an electric seat, and an air conditioner.

The in-vehicle device X17 is an electronic device such as an in-vehicle A / V [audio / visual] device, a car navigation system, and an ETC [Electronic Toll Collection System] that is arbitrarily mounted on the vehicle X by the user.

<Points to note>
In addition to the above-described embodiment, the configuration of the present invention can be modified in various ways without departing from the gist of the invention. It should be considered that the embodiments are exemplary in all respects and are not restrictive, and the technical scope of the invention is indicated by the claims rather than the description of the embodiments. It should be understood that it includes all modifications that are equivalent to and within the scope of the claims.

For example, in the present embodiment, the timing control circuit 16 has an intermittent operation mode and a non-intermittent operation mode, but it is divided into a first control circuit having an intermittent operation mode and a second control circuit having a non-intermittent operation mode. May be good. The first control circuit is a circuit having an output voltage range adjusting unit 162 and a current adjusting unit 163, and the second control circuit is a circuit that generates gate signals G1 and G2 based on the set signal SET and the reset signal RST.

For example, unlike the present embodiment, the switching control circuit does not have to have a non-intermittent operation mode.

For example, the timing control circuit 1 may be configured as shown in FIG. The timing control circuit 1 of the configuration example shown in FIG. 8 has a configuration in which the D / A converter 22 is added to the timing control circuit 1 of the configuration example shown in FIG. In the configuration example shown in FIG. 8, the output voltage range adjusting unit 162 outputs the digital data D3 indicating the setting of the lower limit value VMIN to the D / A converter 22. The D / A converter 22 converts the digital data D3 into a voltage VL which is an analog voltage and outputs the digital data D3 to the inverting input terminal of the comparator 21. The output voltage range adjusting unit 162 generates digital data D3 regardless of the load state. For example, it is conceivable that the output voltage range adjusting unit 162 acquires the ambient temperature data of the switching power supply and generates the digital data D3 based on the ambient temperature of the switching power supply.

For example, in the present embodiment, the output voltage range adjusting unit 162 adjusts the upper limit value VMAX based on the load state, but conversely, the output voltage range adjusting unit 162 adjusts the lower limit value VMIN based on the load state. You may. That is, in the present embodiment, the output voltage range adjusting unit 162 decreases the upper limit value VMAX as the load is lighter, but may increase the lower limit value VMIN as the load is lighter.

When the output voltage range adjusting unit 162 adjusts the lower limit value VMIN based on the load state, the output voltage range adjusting unit 162 may adjust the upper limit value VMAX without being based on the load state.

Further, the output voltage range adjusting unit 162 may adjust both the upper limit value VMAX and the lower limit value VMIN based on the load state.

1 Switching control circuit 2 Current generator 162 Output voltage range adjuster 163 Current adjuster 164, 165 Counter X Vehicle

Claims (12)

When the output voltage of the switching power supply device rises to the upper limit value, a pause period for suspending the switching operation of the switching element of the switching power supply device is started, and when the output voltage drops to the lower limit value, the switching period for performing the switching operation is started. Has an intermittent operation mode to
A switching control circuit including an output voltage range adjusting unit that adjusts at least one of the upper limit value and the lower limit value based on the state of the load to which the output voltage is applied. The output voltage range adjusting unit has a first monitoring unit that monitors the total length of the switching period and the pause period or the length of the pause period, and the upper limit is based on the monitoring result of the first monitoring unit. The switching control circuit according to claim 1, wherein at least one of the value and the lower limit value is adjusted. The switching control circuit according to claim 1 or 2, wherein the output voltage range adjusting unit reduces the upper limit value as the load is lighter. The switching control circuit according to claim 3, further comprising a variable portion that changes the lower limit value without being based on the load state. The switching control circuit according to claim 1 or 2, wherein the output voltage range adjusting unit increases the lower limit value as the load is lighter. The switching control circuit according to claim 5, further comprising a variable portion that changes the upper limit value without being based on the load state. The switching control circuit according to claim 1 or 2, wherein the output voltage range adjusting unit reduces the upper limit value and increases the lower limit value as the load is lighter. Further equipped with a current generator
The current generation unit is in the rest period when the output voltage range adjusting unit sets the upper limit value to the minimum value of the adjusting range of the upper limit value and the lower limit value to the maximum value of the adjusting range of the lower limit value. The switching control circuit according to any one of claims 1 to 7, which generates a bleeder current that promotes a decrease in the output voltage. Equipped with a current regulator
The switching control circuit according to claim 8, wherein the current adjusting unit adjusts the value of the bleeder current based on the state of the load to which the output voltage is applied. The current adjusting unit has a second monitoring unit that monitors the total length of the switching period and the pause period or the length of the pause period, and the bleeder current is based on the monitoring result of the second monitoring unit. The switching control circuit according to claim 9, wherein the value is adjusted. Switching element and
The switching control circuit according to any one of claims 1 to 10, which controls switching of the switching element.
A switching power supply. The switching power supply device according to claim 11 and
A battery that supplies power to the switching power supply and
A vehicle equipped with.

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