JP2020161693A - Circuit board and manufacturing method of electric connection box including the same - Google Patents

Circuit board and manufacturing method of electric connection box including the same Download PDF

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JP2020161693A
JP2020161693A JP2019060937A JP2019060937A JP2020161693A JP 2020161693 A JP2020161693 A JP 2020161693A JP 2019060937 A JP2019060937 A JP 2019060937A JP 2019060937 A JP2019060937 A JP 2019060937A JP 2020161693 A JP2020161693 A JP 2020161693A
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terminal
conductive plate
chip terminal
circuit board
conductive
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原口 章
Akira Haraguchi
章 原口
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Sumitomo Wiring Systems Ltd
AutoNetworks Technologies Ltd
Sumitomo Electric Industries Ltd
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Sumitomo Wiring Systems Ltd
AutoNetworks Technologies Ltd
Sumitomo Electric Industries Ltd
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Priority to PCT/JP2020/002772 priority patent/WO2020195103A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02GINSTALLATION OF ELECTRIC CABLES OR LINES, OR OF COMBINED OPTICAL AND ELECTRIC CABLES OR LINES
    • H02G3/00Installations of electric cables or lines or protective tubing therefor in or on buildings, equivalent structures or vehicles
    • H02G3/02Details
    • H02G3/08Distribution boxes; Connection or junction boxes
    • H02G3/16Distribution boxes; Connection or junction boxes structurally associated with support for line-connecting terminals within the box
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K5/00Casings, cabinets or drawers for electric apparatus
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00Constructional details common to different types of electric apparatus
    • H05K7/02Arrangements of circuit components or wiring on supporting structure
    • H05K7/06Arrangements of circuit components or wiring on supporting structure on insulating boards, e.g. wiring harnesses

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Architecture (AREA)
  • Civil Engineering (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Connection Or Junction Boxes (AREA)
  • Casings For Electric Apparatus (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

To provide a circuit board which enables an electronic component having a narrow terminal pitch to be mounted thereon, and to provide a manufacturing method of an electric connection box including the circuit board.SOLUTION: In an electric connection box 100, electronic components 5, arranged parallel to each other and each including a first terminal and a second terminal, are mounted on a circuit board 1. The circuit board 1 includes an insulating holding member 2, a conductive plate 3, chip terminals 7, and a signal circuit 6. The conductive plate 3 is held by the holding member 2. The first terminal is joined to the conductive plate 3 and the chip terminal 7 is fitted into a hole formed in a surface of the holding member 2. The second terminal is joined to the chip terminal 7. The signal circuit 6 is formed on a surface of the holding member 2 by a conductive nano ink and an end part of the signal circuit 6 is joined to the chip terminal 7.SELECTED DRAWING: Figure 1

Description

本発明は、回路基板及び、回路基板を含む電気接続箱の製造方法に関する。 The present invention relates to a circuit board and a method for manufacturing an electrical junction box including the circuit board.

所定の配線パターン状に打ち抜いた金属板と高熱伝導性の複合絶縁材料とにより構成され、前記高熱伝導性の複合絶縁材料は前記金属板をこの金属板の少なくとも部品搭載部分を露出させた状態で一体化形成した電子部品搭載用放熱基板が知られている(例えば、特許文献1参照)。特許文献1の電子部品搭載用放熱基板(回路基板)を構成する金属板は、所定の配線パターン状に打ち抜くとともに少なくとも一部に折り曲げ加工あるいは絞り加工が施されている。 It is composed of a metal plate punched out in a predetermined wiring pattern and a high thermal conductive composite insulating material, and the high thermal conductive composite insulating material is in a state where the metal plate is exposed at least a component mounting portion of the metal plate. A heat-dissipating substrate for mounting electronic components that is integrally formed is known (see, for example, Patent Document 1). The metal plate constituting the heat radiating board (circuit board) for mounting electronic components of Patent Document 1 is punched into a predetermined wiring pattern and at least partially bent or drawn.

特開平09−321395号公報Japanese Unexamined Patent Publication No. 09-321395

しかしながら、回路基板に搭載される電子部品の小型化に伴い、当該電子部品の端子間の距離、すなわち端子ピッチが狭小する傾向にあり、特許文献1の回路基板では、このように端子ピッチが狭小な電子部品を搭載することが困難となることが懸念される。 However, as the size of the electronic component mounted on the circuit board is reduced, the distance between the terminals of the electronic component, that is, the terminal pitch tends to be narrowed, and the circuit board of Patent Document 1 has such a narrow terminal pitch. There is a concern that it will be difficult to mount various electronic components.

本発明は、端子ピッチが狭小な電子部品を搭載することができる回路基板等を提供することを目的とする。 An object of the present invention is to provide a circuit board or the like on which an electronic component having a narrow terminal pitch can be mounted.

本開示の一態様に係る回路基板は、並設された第1端子及び第2端子を含む電子部品が実装される回路基板であって、
絶縁性の保持部材と、導電板と、チップ端子と、信号回路とを備え、
前記導電板は、前記保持部材によって保持され、
前記第1端子は、前記導電板に接合され、
前記チップ端子は、前記保持部材の表面に形成された孔に篏合され、
前記第2端子は、前記チップ端子に接合され、
前記信号回路は、導電性ナノインクによって、前記保持部材の表面上に形成され、
前記信号回路の端部は、前記チップ端子と接合してある。
The circuit board according to one aspect of the present disclosure is a circuit board on which electronic components including the first terminal and the second terminal arranged side by side are mounted.
It is provided with an insulating holding member, a conductive plate, a chip terminal, and a signal circuit.
The conductive plate is held by the holding member and
The first terminal is joined to the conductive plate and
The chip terminal is fitted into a hole formed on the surface of the holding member.
The second terminal is joined to the chip terminal and
The signal circuit is formed on the surface of the holding member by the conductive nanoink.
The end of the signal circuit is joined to the chip terminal.

本開示の一態様によれば、端子ピッチが狭小な電子部品を搭載することができる回路基板等を提供することができる。 According to one aspect of the present disclosure, it is possible to provide a circuit board or the like on which an electronic component having a narrow terminal pitch can be mounted.

実施の形態1に係る回路基板を含む電気接続箱の斜視図である。It is a perspective view of the electric junction box including the circuit board which concerns on Embodiment 1. FIG. 導電板の構成を示す説明図である。It is explanatory drawing which shows the structure of the conductive plate. 導電板と保持部材とが一体化した状態の斜視図である。It is a perspective view of the state in which the conductive plate and the holding member are integrated. 保持部材の実装板部にチップ端子及び信号回路が設けられた状態の平面図である。It is a top view of the state which the chip terminal and the signal circuit are provided in the mounting plate part of a holding member. チップ端子及び信号回路の接合部の説明図である。It is explanatory drawing of the joint part of a chip terminal and a signal circuit. 回路基板を含む電気接続箱の平面図である。It is a top view of the electric junction box including a circuit board. 回路基板の要部(A−A)の模式的断面図である。It is a schematic cross-sectional view of the main part (AA) of a circuit board. 回路基板の要部(B−B)の模式的断面図である。It is a schematic cross-sectional view of the main part (BB) of a circuit board. 電子部品が実装された状態でのチップ端子及び信号回路の接合部の説明図である。It is explanatory drawing of the joint part of a chip terminal and a signal circuit in a state where an electronic component is mounted. 回路基板を含む電気接続箱製造方法の説明図(A,B)である。It is explanatory drawing (A, B) of the electric junction box manufacturing method including a circuit board. 回路基板を含む電気接続箱製造方法の説明図(C,D)である。It is explanatory drawing (C, D) of the electric junction box manufacturing method including a circuit board. 回路基板を含む電気接続箱製造方法の説明図(E,F)である。It is explanatory drawing (E, F) of the electric junction box manufacturing method including a circuit board. 回路基板を含む電気接続箱製造方法の説明図(G,H)である。It is explanatory drawing (G, H) of the electric junction box manufacturing method including a circuit board. 回路基板を含む電気接続箱製造方法の説明図(I,J)である。It is explanatory drawing (I, J) of the electric junction box manufacturing method including a circuit board.

[本開示の実施形態の説明]
最初に本開示の実施態様を列挙して説明する。また、以下に記載する実施形態の少なくとも一部を任意に組み合わせてもよい。
[Explanation of Embodiments of the present disclosure]
First, embodiments of the present disclosure will be listed and described. In addition, at least a part of the embodiments described below may be arbitrarily combined.

(1)本開示の一態様に係る回路基板は、並設された第1端子及び第2端子を含む電子部品が実装される回路基板であって、
絶縁性の保持部材と、導電板と、チップ端子と、信号回路とを備え、
前記導電板は、前記保持部材によって保持され、
前記第1端子は、前記導電板に接合され、
前記チップ端子は、前記保持部材の表面に形成された孔に篏合され、
前記第2端子は、前記チップ端子に接合され、
前記信号回路は、導電性ナノインクによって、前記保持部材の表面上に形成され、
前記信号回路の端部は、前記チップ端子と接合してある。
(1) The circuit board according to one aspect of the present disclosure is a circuit board on which electronic components including the first terminal and the second terminal arranged side by side are mounted.
It is provided with an insulating holding member, a conductive plate, a chip terminal, and a signal circuit.
The conductive plate is held by the holding member and
The first terminal is joined to the conductive plate and
The chip terminal is fitted into a hole formed on the surface of the holding member.
The second terminal is joined to the chip terminal and
The signal circuit is formed on the surface of the holding member by the conductive nanoink.
The end of the signal circuit is joined to the chip terminal.

本態様にあたっては、並設された第1端子及び第2端子を含む電子部品を回路基板に実装するにあたり、第1端子は導電板に接合し、第2端子はチップ端子に接合する。チップ端子と接合される信号回路は導電性ナノインクによって形成されているため、並設される第1端子及び第2端子の端子ピッチ(端子間の距離)が狭小な電子部品を実装した回路基板を提供することができる。導電板は保持部材により保持され、チップ端子及び導電性ナノインクによって形成された信号回路は、保持部材の表面に設けられる。保持部材は絶縁性であるため、導電板と、チップ端子及び信号回路との絶縁を担保することができる。 In this embodiment, when mounting the electronic components including the first terminal and the second terminal arranged side by side on the circuit board, the first terminal is joined to the conductive plate and the second terminal is joined to the chip terminal. Since the signal circuit joined to the chip terminals is formed of conductive nanoink, a circuit board on which electronic components with a narrow terminal pitch (distance between terminals) of the first and second terminals arranged side by side are mounted. Can be provided. The conductive plate is held by the holding member, and the signal circuit formed by the chip terminal and the conductive nanoink is provided on the surface of the holding member. Since the holding member is insulating, it is possible to ensure the insulation between the conductive plate, the chip terminal, and the signal circuit.

(2)本開示の一態様に係る回路基板は、前記孔の内周縁は、円形をなし、
前記チップ端子は、円板であり、
前記円板の外周縁が前記孔の内周縁に嵌り込んで、前記チップ端子は前記孔に篏合してある。
(2) In the circuit board according to one aspect of the present disclosure, the inner peripheral edge of the hole has a circular shape.
The chip terminal is a disk and
The outer peripheral edge of the disk is fitted into the inner peripheral edge of the hole, and the chip terminal is fitted into the hole.

本態様にあたっては、チップ端子は円形状の板であり、保持部材の表面に形成された孔の内周縁及び、孔の内周縁に対向するチップ端子の外周縁は、共に円形をなす。従って、回路基板の製造する際、チップ端子を孔に篏合する工程において、孔の内周縁に対するチップ端子の外周縁の回転角度を合わせることを不要とし、当該製造工程の効率化を図ることができる。 In this embodiment, the chip terminal is a circular plate, and the inner peripheral edge of the hole formed on the surface of the holding member and the outer peripheral edge of the chip terminal facing the inner peripheral edge of the hole are both circular. Therefore, when manufacturing a circuit board, it is not necessary to match the rotation angle of the outer peripheral edge of the chip terminal with respect to the inner peripheral edge of the hole in the step of fitting the chip terminal into the hole, and the efficiency of the manufacturing process can be improved. it can.

(3)本開示の一態様に係る回路基板は、前記チップ端子は、銅製又は銅を主成分とする合金製であり、
前記導電性ナノインクは、銅ナノ粒子が液中分散した導電性銅ナノインクである。
(3) In the circuit board according to one aspect of the present disclosure, the chip terminals are made of copper or an alloy containing copper as a main component.
The conductive nanoink is a conductive copper nanoink in which copper nanoparticles are dispersed in a liquid.

本態様にあたっては、チップ端子は銅製又は銅を主成分とする合金製(銅合金製)であるため、チップ端子及び導電性ナノインクによる信号回路は、電気的に接合される。すなわち、チップ端子の表面に導電性銅ナノインクを焼成させることで、チップ端子と導電性銅ナノインクにより形成される信号回路とは、電気的に接続され導通する。銅を主成分とする合金とは、C19020,C19720等の導電率が50%IACS(international annealed copper standard)以上の銅合金である。導電性ナノインクは、塗布乾燥させることにより銅ナノ粒子が緻密に並んだ薄膜が形成され、これを熱処理すると銅ナノ粒子特有の融点降下により銅ナノ粒子が融着し、金属結合を形成する。形成された銅ナノ粒子による金属結合と、銅性又は銅合金製のチップ端子とは、同種金属間による接合が行われるため、接合強度を向上させることができる。同種金属間による接合を行うことにより、当該接合部位において、チップ端子及び導電性ナノインクによる信号回路の線膨張係数を近似させることができ、熱衝撃に対する接合強度を向上させることができる。 In this embodiment, since the chip terminal is made of copper or an alloy containing copper as a main component (made of copper alloy), the chip terminal and the signal circuit using the conductive nanoink are electrically joined. That is, by firing the conductive copper nanoink on the surface of the chip terminal, the chip terminal and the signal circuit formed by the conductive copper nanoink are electrically connected and conductive. The copper-based alloy is a copper alloy such as C19020 or C19720 having a conductivity of 50% IACS (international annealed copper standard) or more. In the conductive nanoink, a thin film in which copper nanoparticles are densely arranged is formed by coating and drying, and when this is heat-treated, the copper nanoparticles are fused due to the melting point drop peculiar to the copper nanoparticles to form a metal bond. Since the metal bond formed by the formed copper nanoparticles and the chip terminal made of copper or a copper alloy are bonded by the same kind of metal, the bonding strength can be improved. By performing bonding between the same types of metals, the linear expansion coefficient of the signal circuit by the chip terminal and the conductive nano ink can be approximated at the bonding site, and the bonding strength against thermal shock can be improved.

(4)本開示の一態様に係る回路基板は、前記導電性ナノインクにより形成された前記信号回路の端部は、前記チップ端子上に設けられ、
前記信号回路の端部には、欠落部が形成されており、
前記チップ端子は、前記欠落部から露出している露出部を含み、
前記露出部には、前記チップ端子と前記第2端子とを接合するための半田が塗布され、
前記第2端子は、前記露出部に接合されている。
(4) In the circuit board according to one aspect of the present disclosure, the end of the signal circuit formed of the conductive nanoink is provided on the chip terminal.
A missing portion is formed at the end of the signal circuit.
The chip terminal includes an exposed portion exposed from the missing portion.
The exposed portion is coated with solder for joining the chip terminal and the second terminal.
The second terminal is joined to the exposed portion.

本態様にあたっては、導電性ナノインクの半田に対する濡れ性が低い場合であっても、第2端子をチップ端子の露出部に接合することにより、第2端子及びチップ端子を直接接合し、接合強度を向上させることができる。 In this embodiment, even when the wettability of the conductive nanoink to the solder is low, the second terminal and the chip terminal are directly bonded by bonding the second terminal to the exposed portion of the chip terminal to increase the bonding strength. Can be improved.

(5)本開示の一態様に係る回路基板は、前記欠落部によって前記信号回路の端部は、前記電子部品側に向けて開口した凹状をなし、
前記開口の幅は、前記露出部に接合される前記第2端子の幅よりも広い。
(5) In the circuit board according to one aspect of the present disclosure, the end portion of the signal circuit has a concave shape that opens toward the electronic component side due to the missing portion.
The width of the opening is wider than the width of the second terminal joined to the exposed portion.

本態様にあたっては、欠落部が設けられた信号回路の端部の開口の幅は、露出部に接続される第2端子の幅よりも広いため、第2端子が信号回路の端部に重なることを防止して第2端子及びチップ端子の露出部とを接合し、接合強度を向上させることができる。 In this embodiment, since the width of the opening at the end of the signal circuit provided with the missing portion is wider than the width of the second terminal connected to the exposed portion, the second terminal overlaps the end of the signal circuit. This can be prevented and the exposed portion of the second terminal and the chip terminal can be joined to improve the joining strength.

(6)本開示の一態様に係る回路基板は、前記導電板の一面には、前記一面から垂線方向に突出した凸部が設けられており、
前記第1端子は、前記凸部上に接合されている。
(6) In the circuit board according to one aspect of the present disclosure, one surface of the conductive plate is provided with a convex portion protruding in the perpendicular direction from the one surface.
The first terminal is joined on the convex portion.

本態様にあたっては、導電板に設けられた凸部を、第1端子を実装する部位として用いることにより、導電板と第1端子との間に介在される他の接続部品(接続点)を不要とし、第1端子と導電板との間の電気抵抗を減少させ、通電時の発熱量を抑制することができる。 In this embodiment, by using the convex portion provided on the conductive plate as a portion for mounting the first terminal, another connecting component (connection point) interposed between the conductive plate and the first terminal is unnecessary. Therefore, the electric resistance between the first terminal and the conductive plate can be reduced, and the amount of heat generated during energization can be suppressed.

(7)本開示の一態様に係る回路基板を含む電気接続箱の製造方法は、回路基板を含む電気接続箱の製造方法であって、
導電板を金型内に配置し、前記金型に樹脂を注入して、外枠及び実装板部を含む保持部材を形成すると共に、前記外枠内に前記導電板の少なくとも一部が収納されるように前記導電板と前記保持部材とを一体化する工程と、
前記実装板部に設けられた孔にチップ端子及び第2チップ端子を圧入する工程と、
前記実装板部上に導電性ナノインクによって、前記チップ端子及び前記第2チップ端子を電気的に接続する信号回路を印刷する工程と、
前記導電板の所定の領域及び前記チップ端子に半田ペーストを塗布する工程と、
前記半田ペーストが塗布された前記導電板の所定の領域及び前記チップ端子の夫々に、電子部品の第1端子及び第2端子の夫々を位置合わせして前記電子部品を載置し、リフロー炉により半田付けする工程と、
前記外枠内に前記電子部品を制御するための制御回路基板を収納し、前記外枠の両端の開口部を塞ぐように上蓋及びヒートシンクを固定する工程と
を含む。
(7) The method for manufacturing an electrical junction box including a circuit board according to one aspect of the present disclosure is a method for manufacturing an electrical junction box including a circuit board.
The conductive plate is arranged in the mold, and resin is injected into the mold to form a holding member including an outer frame and a mounting plate portion, and at least a part of the conductive plate is housed in the outer frame. The step of integrating the conductive plate and the holding member so as to
The process of press-fitting the chip terminal and the second chip terminal into the holes provided in the mounting plate portion,
A step of printing a signal circuit that electrically connects the chip terminal and the second chip terminal with conductive nanoink on the mounting plate portion.
A step of applying a solder paste to a predetermined area of the conductive plate and the chip terminal, and
The electronic component is placed in a predetermined area of the conductive plate coated with the solder paste and the chip terminal by aligning the first terminal and the second terminal of the electronic component, respectively, and the electronic component is placed in a reflow furnace. The soldering process and
A step of accommodating a control circuit board for controlling the electronic component in the outer frame and fixing the upper lid and the heat sink so as to close the openings at both ends of the outer frame is included.

本態様にあたっては、端子ピッチが狭小な電子部品を搭載することができる回路基板を含む電気接続箱を提供することができる。 In this embodiment, it is possible to provide an electric junction box including a circuit board on which electronic components having a narrow terminal pitch can be mounted.

[本開示の実施形態の詳細]
本開示の実施態様に係る回路基板1及び回路基板1を含む電気接続箱100の製造方法の具体例を以下に図面を参照しつつ説明する。なお、本開示はこれらの例示に限定されるものではなく、特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。
[Details of Embodiments of the present disclosure]
A specific example of a method of manufacturing the electrical junction box 100 including the circuit board 1 and the circuit board 1 according to the embodiment of the present disclosure will be described below with reference to the drawings. It should be noted that the present disclosure is not limited to these examples, and is indicated by the scope of claims, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

(実施形態1)
図1は、実施の形態1に係る回路基板1を含む電気接続箱100の斜視図である。図1においては、回路基板1を説明するにあたり、電気接続箱100の上蓋102及び制御回路基板101(図14参照)を取り外した状態を示している。電気接続箱100には、回路基板1が収納されている。回路基板1は、保持部材2、電子部品5、導電板3、第2導電板4、コネクタ端子105及び基板接続用コネクタ106を含む。
(Embodiment 1)
FIG. 1 is a perspective view of the electrical junction box 100 including the circuit board 1 according to the first embodiment. FIG. 1 shows a state in which the upper lid 102 of the electrical junction box 100 and the control circuit board 101 (see FIG. 14) are removed in order to explain the circuit board 1. The circuit board 1 is housed in the electric junction box 100. The circuit board 1 includes a holding member 2, an electronic component 5, a conductive plate 3, a second conductive plate 4, a connector terminal 105, and a board connecting connector 106.

保持部材2は、電気接続箱100の外郭を構成する矩形状の外枠21と、信号回路6が形成される実装板部22とを含み、導電板3、第2導電板4及びコネクタ端子105を保持する。実装板部22、導電板3及び第2導電板4により、回路基板1の基部が構成される。実装板部22の表面には、電子部品5、チップ端子7及び第2チップ端子8が実装され、チップ端子7と第2チップ端子8との間には信号回路6が形成してある。複数の電子部品5は、回路基板1上に並設されており、当該複数の電子部品5は、導電板3及び第2導電板4を跨ぐように配置(実装)されている。複数の電子部品5夫々は、信号回路6により基板接続用コネクタ106に接続されている。 The holding member 2 includes a rectangular outer frame 21 forming an outer shell of the electrical connection box 100 and a mounting plate portion 22 on which a signal circuit 6 is formed, and includes a conductive plate 3, a second conductive plate 4, and a connector terminal 105. To hold. The base portion of the circuit board 1 is formed by the mounting plate portion 22, the conductive plate 3, and the second conductive plate 4. An electronic component 5, a chip terminal 7, and a second chip terminal 8 are mounted on the surface of the mounting plate portion 22, and a signal circuit 6 is formed between the chip terminal 7 and the second chip terminal 8. The plurality of electronic components 5 are arranged side by side on the circuit board 1, and the plurality of electronic components 5 are arranged (mounted) so as to straddle the conductive plate 3 and the second conductive plate 4. Each of the plurality of electronic components 5 is connected to the board connection connector 106 by the signal circuit 6.

基板接続用コネクタ106に接続された制御回路基板101(図14参照)は、電子部品5を制御するための制御信号を、基板接続用コネクタ106を介して出力し、出力された制御信号は、例えば半導体スイッチ等の電子部品5に入力される。制御信号を受信した電子部品5(半導体スイッチ)は、スイッチを閉(オン)とすることにより、導電板3と第2導電板4との間を通電させる。このように構成される回路基板1を含む電気接続箱100は、例えば車両に搭載されたリチウム電池等の蓄電装置(図示せず)と車載負荷(図示せず)の間に介在され、車両用の給電装置として用いられる。 The control circuit board 101 (see FIG. 14) connected to the board connection connector 106 outputs a control signal for controlling the electronic component 5 via the board connection connector 106, and the output control signal is For example, it is input to an electronic component 5 such as a semiconductor switch. The electronic component 5 (semiconductor switch) that has received the control signal energizes between the conductive plate 3 and the second conductive plate 4 by closing (on) the switch. The electric junction box 100 including the circuit board 1 configured in this way is interposed between a power storage device (not shown) such as a lithium battery mounted on a vehicle and an in-vehicle load (not shown), and is used for a vehicle. It is used as a power supply device for.

図2は、導電板3の構成を示す説明図である。上述のごとく、回路基板1は、導電部材として、導電板3及び第2導電板4を含む。図2は、保持部材2を除いた状態での導電板3及び第2導電板4を示すものである。 FIG. 2 is an explanatory diagram showing the configuration of the conductive plate 3. As described above, the circuit board 1 includes a conductive plate 3 and a second conductive plate 4 as conductive members. FIG. 2 shows the conductive plate 3 and the second conductive plate 4 in a state where the holding member 2 is removed.

導電板3は、例えば純銅又は銅合金(銅等)の導電性の良い金属製であり、バスバと称される。導電板3は表面にニッケルメッキが施されたものであってもよい。導電板3は、平面視にて凸形状をなし、肉厚部32と、肉厚部32よりも板厚が小さい肉薄部33を含む。 The conductive plate 3 is made of a metal having good conductivity, for example, pure copper or a copper alloy (copper or the like), and is called a bus bar. The surface of the conductive plate 3 may be nickel-plated. The conductive plate 3 has a convex shape in a plan view, and includes a thick portion 32 and a thin portion 33 having a thickness smaller than that of the thick portion 32.

肉厚部32には、凸形状における突出片部が形成されており、突出片部の中央部には孔が設けられている。図1に示すごとく、突出片部は、外枠21から外部に突出するように設けられ、電気接続箱100を車両に搭載するにあたり、他の電気部品と電気的に接続するための締結部として用いられる。 A protruding piece portion having a convex shape is formed in the thick portion 32, and a hole is provided in the central portion of the protruding piece portion. As shown in FIG. 1, the protruding piece portion is provided so as to project outward from the outer frame 21, and serves as a fastening portion for electrically connecting to other electric parts when the electric junction box 100 is mounted on the vehicle. Used.

肉薄部33は矩形状となし、肉薄部33の短手方向長辺側の端縁側には、肉薄部33の表面から垂線方向に突出した複数の凸部31が並設されている。複数の凸部31夫々は矩形をなし、凸部31の短手方向の端縁(凸部31の長辺)は、肉薄部33の短手方向の端縁(肉薄部33の長辺)に沿うように、複数の凸部31夫々は、肉薄部33の表面に設けられている。詳細は後述するが、凸部31は電子部品5の端子を実装する部位として用いられる。 The thin portion 33 has a rectangular shape, and a plurality of convex portions 31 protruding in the vertical direction from the surface of the thin portion 33 are arranged side by side on the edge side of the thin portion 33 on the long side in the lateral direction. Each of the plurality of convex portions 31 forms a rectangle, and the lateral edge of the convex portion 31 (the long side of the convex portion 31) is the edge of the thin portion 33 in the lateral direction (the long side of the thin portion 33). Along, each of the plurality of convex portions 31 is provided on the surface of the thin portion 33. Although the details will be described later, the convex portion 31 is used as a portion for mounting the terminal of the electronic component 5.

肉厚部32の板厚(板幅)の大きさと、肉薄部33及び凸部31の板厚(板幅)の合計値の大きさは、同じである。すなわち、肉厚部32の表面と、凸部31の上面(表面)とは、同一平面上に位置し、いわゆる面一の形態を構成する。 The size of the plate thickness (plate width) of the wall-thick portion 32 and the total value of the plate thickness (plate width) of the thin-walled portion 33 and the convex portion 31 are the same. That is, the surface of the thick portion 32 and the upper surface (surface) of the convex portion 31 are located on the same plane and form a so-called flush surface.

第2導電板4は、例えば銅等の導電性の良い金属製であり、導電板3と同じ材質であることが望ましい。第2導電板4は表面にニッケルメッキが施されたものであってもよい。第2導電板4は、導電板3と同様に凸形状をなし、凸形状における突出片部の中央部には孔が設けられている。第2導電板4の突出片部も、導電板3と同様に外枠21から外部に突出するように設けられ、電気接続箱100を車両に搭載するにあたり他の電気部品と電気的に接続するための締結部として用いられる。 The second conductive plate 4 is made of a metal having good conductivity such as copper, and is preferably made of the same material as the conductive plate 3. The surface of the second conductive plate 4 may be nickel-plated. The second conductive plate 4 has a convex shape like the conductive plate 3, and a hole is provided in the central portion of the protruding piece portion in the convex shape. The protruding piece portion of the second conductive plate 4 is also provided so as to project outward from the outer frame 21 like the conductive plate 3, and is electrically connected to other electric parts when the electric connection box 100 is mounted on the vehicle. Used as a fastening part for

導電板3及び第2導電板4は、突出片部が設けられていない長手方向の側面夫々を対向させて、配置されている。すなわち、導電板3の突出片部が設けられていない長手方向の側面と、第2導電板4の突出片部が設けられていない長手方向の側面との間には、隙間が形成されている。当該隙間によって、導電板3及び第2導電板4は、非接触状態となるように配置されている。当該隙間には保持部材2を構成する樹脂が充填され、導電板3及び第2導電板4の絶縁が担保される。導電板3の肉厚部32の表面と、第2導電板4の表面とは、同一平面上に位置し、いわゆる面一の形態を構成する。 The conductive plate 3 and the second conductive plate 4 are arranged so that the side surfaces in the longitudinal direction in which the protruding piece portion is not provided face each other. That is, a gap is formed between the side surface in the longitudinal direction in which the protruding piece portion of the conductive plate 3 is not provided and the side surface in the longitudinal direction in which the protruding piece portion of the second conductive plate 4 is not provided. .. The conductive plate 3 and the second conductive plate 4 are arranged so as to be in a non-contact state by the gap. The gap is filled with the resin constituting the holding member 2, and the insulation of the conductive plate 3 and the second conductive plate 4 is ensured. The surface of the thick portion 32 of the conductive plate 3 and the surface of the second conductive plate 4 are located on the same plane and form a so-called flush surface.

図3は、導電板3と保持部材2とが一体化した状態の斜視図である。導電板3、第2導電板4及びL字状の2つのコネクタ端子105は、絶縁性を有する樹脂により構成された保持部材2により保持される。 FIG. 3 is a perspective view showing a state in which the conductive plate 3 and the holding member 2 are integrated. The conductive plate 3, the second conductive plate 4, and the two L-shaped connector terminals 105 are held by a holding member 2 made of an insulating resin.

導電板3及び第2導電板4は図2に示すような配置形態にて金型内に固定され、金型内には更にコネクタ端子105が固定されており、当該金型に保持部材2の材料となる樹脂が射出成形されるインサート成型により、導電板3、第2導電板4、コネクタ端子105及び保持部材2(実装板部22)が一体化した回路基板1(バスバインサート基板)が構成される。 The conductive plate 3 and the second conductive plate 4 are fixed in the mold in the arrangement as shown in FIG. 2, and the connector terminal 105 is further fixed in the mold, and the holding member 2 is attached to the mold. A circuit board 1 (bass bar insert board) in which a conductive plate 3, a second conductive plate 4, a connector terminal 105, and a holding member 2 (mounting plate portion 22) are integrated is configured by insert molding in which a resin as a material is injection-molded. Will be done.

保持部材2は、絶縁性の樹脂から成形され、当該樹脂は、例えばPPS(ポリネニレンサルファイド)等の熱可塑性樹脂である。保持部材2は、外枠21及び実装板部22を含む。 The holding member 2 is molded from an insulating resin, and the resin is a thermoplastic resin such as PPS (polyphenylene sulfide). The holding member 2 includes an outer frame 21 and a mounting plate portion 22.

外枠21は、矩形状の枠体をなし、電気接続箱100の外郭をなす。外枠21の内側に、導電板3、第2導電板4及び実装板部22から構成される回路基板1が位置するものとなる。 The outer frame 21 forms a rectangular frame and forms the outer shell of the electrical connection box 100. A circuit board 1 composed of a conductive plate 3, a second conductive plate 4, and a mounting plate portion 22 is located inside the outer frame 21.

実装板部22は、矩形状をなし、導電板3の肉厚部32と、第2導電板4との間に設けられている。すなわち、実装板部22は、導電板3の肉薄部33の表面に覆うように積層されている。従って、実装板部22の表面の形状及び面積は、導電板3の肉薄部33の表面の形状及び面積と同一である。導電板3の肉薄部33に突設された凸部31の上面(表面)は、露出するように実装板部22の肉厚は設定されている。従って、導電板3の肉厚部32の表面、実装板部22の表面、導電板3の肉薄部33に突設された凸部31の上面(表面)及び、第2導電板4の表面は、同一平面上に位置し、いわゆる面一の形態を構成する。 The mounting plate portion 22 has a rectangular shape and is provided between the thick portion 32 of the conductive plate 3 and the second conductive plate 4. That is, the mounting plate portion 22 is laminated so as to cover the surface of the thin portion 33 of the conductive plate 3. Therefore, the shape and area of the surface of the mounting plate portion 22 are the same as the shape and area of the surface of the thin portion 33 of the conductive plate 3. The wall thickness of the mounting plate portion 22 is set so that the upper surface (surface) of the convex portion 31 projecting from the thin portion 33 of the conductive plate 3 is exposed. Therefore, the surface of the thick portion 32 of the conductive plate 3, the surface of the mounting plate portion 22, the upper surface (surface) of the convex portion 31 projecting from the thin portion 33 of the conductive plate 3, and the surface of the second conductive plate 4 , Located on the same plane, forming a so-called flush form.

実装板部22の表面には、複数の嵌合孔221が設けられている。嵌合孔221は、チップ端子7が篏合される嵌合孔221と、第2チップ端子8が篏合される嵌合孔221を含む。 A plurality of fitting holes 221 are provided on the surface of the mounting plate portion 22. The fitting hole 221 includes a fitting hole 221 in which the chip terminal 7 is fitted and a fitting hole 221 in which the second chip terminal 8 is fitted.

チップ端子7が篏合される嵌合孔221夫々は、並設された凸部31の間に設けられている。すなわち、凸部31と当該嵌合孔221は、実装板部22の長手方向に沿って、交互となるように並設されている。嵌合孔221の内周縁は円形をなす。嵌合孔221の内周縁の直径は、隣接する凸部31の短手方向の長さよりも小さい。 The fitting holes 221 into which the chip terminals 7 are fitted are provided between the convex portions 31 arranged side by side. That is, the convex portions 31 and the fitting holes 221 are arranged side by side so as to alternate along the longitudinal direction of the mounting plate portion 22. The inner peripheral edge of the fitting hole 221 has a circular shape. The diameter of the inner peripheral edge of the fitting hole 221 is smaller than the length of the adjacent convex portion 31 in the lateral direction.

第2チップ端子8が篏合される嵌合孔221は、実装板部22の長手方向の端部側(短辺夫々の近傍)に、短手方向(短辺)に沿うように並設されている。第2チップ端子8が篏合される嵌合孔221の内周縁は円形をなし、内周縁の直径は、チップ端子7が篏合される嵌合孔221の直径と同一である。 The fitting holes 221 into which the second chip terminals 8 are fitted are arranged side by side along the short side (short side) on the end side (near each short side) of the mounting plate portion 22 in the longitudinal direction. ing. The inner peripheral edge of the fitting hole 221 into which the second chip terminal 8 is fitted has a circular shape, and the diameter of the inner peripheral edge is the same as the diameter of the fitting hole 221 in which the chip terminal 7 is fitted.

外枠21の外周面には筒状のコネクタハウジング23が設けられている。コネクタハウジング23が設けられた外枠21の場所には、コネクタ端子105を挿通するための穴が設けられ、コネクタ端子105は、外枠21を貫通するようにコネクタハウジング23の内部に設けられ、外枠21の内外における電気的接続を可能としている。 A tubular connector housing 23 is provided on the outer peripheral surface of the outer frame 21. A hole for inserting the connector terminal 105 is provided in the place of the outer frame 21 where the connector housing 23 is provided, and the connector terminal 105 is provided inside the connector housing 23 so as to penetrate the outer frame 21. It enables electrical connection inside and outside the outer frame 21.

図4は、保持部材2の実装板部22にチップ端子7及び信号回路6が設けられた状態の平面図である。実装板部22には、チップ端子7、第2チップ端子8及び信号回路6が設けられている。チップ端子7は、実装板部22の長手方向(長辺)に沿って並設された嵌合孔221に篏合される。第2チップ端子8は、実装板部22の短手方向(短辺)に沿って並設された嵌合孔221に篏合される。 FIG. 4 is a plan view showing a state in which the chip terminal 7 and the signal circuit 6 are provided on the mounting plate portion 22 of the holding member 2. The mounting plate portion 22 is provided with a chip terminal 7, a second chip terminal 8, and a signal circuit 6. The chip terminals 7 are fitted into fitting holes 221 arranged side by side along the longitudinal direction (long side) of the mounting plate portion 22. The second chip terminal 8 is fitted into the fitting holes 221 arranged side by side along the lateral direction (short side) of the mounting plate portion 22.

チップ端子7及び第2チップ端子8は、銅等の導電性の良い金属製の円形の板(円板)により構成される。当該円板の外径は嵌合孔221の内径と同一又は、円板の外径は嵌合孔221の内径より若干大きく、チップ端子7及び第2チップ端子8(円板)を嵌合孔221に圧入することにより嵌め込み、篏合するものであってもよい。又は、チップ端子7及び第2チップ端子8を嵌合孔221に挿入して嵌め込み、例えば超音波溶着により固着するものであってもよい。チップ端子7は電子部品5側の端子として機能し、第2チップ端子8は電子部品5に制御信号を出力する制御部品が搭載される制御回路基板101側の端子として機能する。 The chip terminal 7 and the second chip terminal 8 are formed of a circular plate (disk) made of a metal having good conductivity such as copper. The outer diameter of the disk is the same as the inner diameter of the fitting hole 221 or the outer diameter of the disk is slightly larger than the inner diameter of the fitting hole 221. It may be fitted and fitted by press-fitting into 221. Alternatively, the chip terminal 7 and the second chip terminal 8 may be inserted into the fitting hole 221 and fitted, and fixed by, for example, ultrasonic welding. The chip terminal 7 functions as a terminal on the electronic component 5 side, and the second chip terminal 8 functions as a terminal on the control circuit board 101 side on which a control component that outputs a control signal to the electronic component 5 is mounted.

実装板部22には、チップ端子7及び第2チップ端子8を電気的に接続するための信号回路6が設けられている。チップ端子7と、当該チップ端子7に対応する第2チップ端子8(当該チップ端子7に接続される電子部品5への制御信号が入力される第2チップ端子8)とは、実装板部22の表面に印刷(形成)された信号回路6によって、電気的に接続され、導通する。 The mounting plate portion 22 is provided with a signal circuit 6 for electrically connecting the chip terminal 7 and the second chip terminal 8. The chip terminal 7 and the second chip terminal 8 corresponding to the chip terminal 7 (the second chip terminal 8 into which the control signal to the electronic component 5 connected to the chip terminal 7 is input) are the mounting plate portion 22. It is electrically connected and conducted by a signal circuit 6 printed (formed) on the surface of the device.

信号回路6は、例えば導電性銅ナノインクにより形成されるものであり、すなわち導電性銅ナノインクを実装板部22の表面に印刷することにより形成される。導電性銅ナノインクとは、数から数十ナノメートルの銅ナノ粒子が液中分散したものである。導電性銅ナノインクを実装板部22の表面に印刷(塗布乾燥)させると、銅ナノ粒子が緻密に並んだ薄膜を得ることができる。当該薄膜(塗布膜)となった銅ナノ粒子を熱処理すると、ナノ粒子特有の融点降下によって粒子同士が融着し、金属結合を形成する。これにより、銅ナノインクによって得られる塗布膜は、金属箔(銅箔)に近いものとなる。導電性銅ナノインクの具体的な成分、組成は、例えば国際公開番号(WO2016/199811)の再公表公報によるものであってもよい。導電性銅ナノインクにより実装板部22の表面に印刷(形成)された信号回路6は、L字をなし、チップ端子7及び第2チップ端子8を電気的に接続する。信号回路6の端部61夫々は、チップ端子7及び第2チップ端子8の場所に位置する。 The signal circuit 6 is formed of, for example, conductive copper nano-ink, that is, is formed by printing the conductive copper nano-ink on the surface of the mounting plate portion 22. Conductive copper nanoinks are copper nanoparticles of several to several tens of nanometers dispersed in a liquid. When the conductive copper nanoink is printed (coated and dried) on the surface of the mounting plate portion 22, a thin film in which copper nanoparticles are densely arranged can be obtained. When the copper nanoparticles that have become the thin film (coating film) are heat-treated, the particles are fused to each other due to the melting point drop peculiar to the nanoparticles to form a metal bond. As a result, the coating film obtained by the copper nanoink becomes similar to a metal foil (copper foil). The specific components and compositions of the conductive copper nanoink may be, for example, according to the republication publication of International Publication No. (WO2016 / 199811). The signal circuit 6 printed (formed) on the surface of the mounting plate portion 22 with the conductive copper nanoink has an L shape and electrically connects the chip terminal 7 and the second chip terminal 8. Each end 61 of the signal circuit 6 is located at the location of the chip terminal 7 and the second chip terminal 8.

図5は、チップ端子7及び信号回路6の接合部の説明図である。図5は、図4における信号回路6の端部61夫々を拡大したものである。導電性銅ナノインクにより形成された信号回路6の夫々の端部61は、円形状において欠落部62を有する形状をなしている。円状をなす端部61の直径は、チップ端子7及び第2チップ端子8の外径(直径)と略同一となるように、信号回路6が形成されている。従って、円状をなす信号回路6の端部61は、チップ端子7及び第2チップ端子8を、実装板部22の表面側から覆うように設けられている。円状をなす信号回路6の端部61には、欠落部62(切り欠き部)が形成されている。信号回路6の端部61は、当該欠落部62により電子部品5側に開口する凹状(コ状/C状)をなしている。 FIG. 5 is an explanatory diagram of a joint portion between the chip terminal 7 and the signal circuit 6. FIG. 5 is an enlarged view of each end 61 of the signal circuit 6 in FIG. Each end 61 of the signal circuit 6 formed of the conductive copper nanoink has a circular shape having a missing portion 62. The signal circuit 6 is formed so that the diameter of the end portion 61 forming a circle is substantially the same as the outer diameter (diameter) of the chip terminal 7 and the second chip terminal 8. Therefore, the end portion 61 of the circular signal circuit 6 is provided so as to cover the chip terminal 7 and the second chip terminal 8 from the surface side of the mounting plate portion 22. A missing portion 62 (notch portion) is formed at the end portion 61 of the circular signal circuit 6. The end portion 61 of the signal circuit 6 has a concave shape (U-shape / C-shape) that is opened toward the electronic component 5 side by the missing portion 62.

上述のごとく、信号回路6の端部61は、チップ端子7及び第2チップ端子8を覆うように設けられているが、当該欠落部62によって、チップ端子7及び第2チップ端子8は、実装板部22の表面側に対し露出する露出部71を含む。詳細は後述するが、チップ端子7及び第2チップ端子8の露出部71には、半田ペースト9が塗布される。 As described above, the end portion 61 of the signal circuit 6 is provided so as to cover the chip terminal 7 and the second chip terminal 8, but the chip terminal 7 and the second chip terminal 8 are mounted by the missing portion 62. The exposed portion 71 exposed to the surface side of the plate portion 22 is included. Although details will be described later, the solder paste 9 is applied to the exposed portion 71 of the chip terminal 7 and the second chip terminal 8.

図6は、回路基板1を含む電気接続箱100の平面図である。図6は、電子部品5が実装された状態を示すものであり、図1に示す回路基板1を含む電気接続箱100の平面図に相当する。第2導電板4及び実装板部22を跨ぐように複数の電子部品5が、実装板部22の長手方向に沿って並設されている。 FIG. 6 is a plan view of the electrical junction box 100 including the circuit board 1. FIG. 6 shows a state in which the electronic component 5 is mounted, and corresponds to a plan view of the electrical junction box 100 including the circuit board 1 shown in FIG. A plurality of electronic components 5 are arranged side by side along the longitudinal direction of the mounting plate portion 22 so as to straddle the second conductive plate 4 and the mounting plate portion 22.

電子部品5は、電気回路がパッケージ(内包)された矩形状の外周器54及び、外周器54の周縁部から突出して設けられた第1端子51、第2端子52及び第3端子53を備え、例えばn型FET(Field effect transistor)である。第1端子51及び第2端子52は、外周器54の同じ縁部(辺、側面)から突出し、並設してある。電子部品5がn型FETである場合、第1端子51はソース端子に相当し、第2端子52はゲート端子に相当し、第3端子53はドレイン端子に相当する(図9参照)。第1端子51(ソース端子)は、導電板3(出力側バスバ)の凸部31の上面(表面)に半田ペースト9により接合される。第2端子52(ゲート端子)は、チップ端子7の露出部71に半田ペースト9により接合される。第3端子53(ドレイン端子)は、第2導電板4(入力側バスバ)の表面に半田ペースト9により接合される。 The electronic component 5 includes a rectangular outer peripheral device 54 in which an electric circuit is packaged (included), and a first terminal 51, a second terminal 52, and a third terminal 53 provided so as to project from the peripheral edge portion of the outer peripheral device 54. For example, an n-type FET (Field effect transistor). The first terminal 51 and the second terminal 52 project from the same edge (side, side surface) of the outer peripheral device 54 and are arranged side by side. When the electronic component 5 is an n-type FET, the first terminal 51 corresponds to the source terminal, the second terminal 52 corresponds to the gate terminal, and the third terminal 53 corresponds to the drain terminal (see FIG. 9). The first terminal 51 (source terminal) is joined to the upper surface (surface) of the convex portion 31 of the conductive plate 3 (output side bus bar) with the solder paste 9. The second terminal 52 (gate terminal) is joined to the exposed portion 71 of the chip terminal 7 with the solder paste 9. The third terminal 53 (drain terminal) is joined to the surface of the second conductive plate 4 (input side bus bar) with the solder paste 9.

第2チップ端子8は、実装板部22の長手方向の端部側(短辺夫々の近傍)に設けられた基板接続用コネクタ106と電気的に接続される。第2チップ端子8も、チップ端子7と同様に露出部71を含み、第2チップ端子8の露出部71と基板接続用コネクタ106とが半田ペースト9により接合される。 The second chip terminal 8 is electrically connected to the board connection connector 106 provided on the end side (near each short side) of the mounting plate portion 22 in the longitudinal direction. Like the chip terminal 7, the second chip terminal 8 also includes the exposed portion 71, and the exposed portion 71 of the second chip terminal 8 and the board connection connector 106 are joined by the solder paste 9.

図7は、回路基板1の要部(A−A)の模式的断面図である。図7は、図6における(A−A)断面を模式的に示すものであり、チップ端子7を含む模式的断面図である。チップ端子7は、実装板部22に設けられた嵌合孔221に嵌め込まれて、篏合されている。 FIG. 7 is a schematic cross-sectional view of a main part (AA) of the circuit board 1. FIG. 7 schematically shows the cross section (AA) in FIG. 6, and is a schematic cross-sectional view including the chip terminal 7. The chip terminal 7 is fitted and fitted into a fitting hole 221 provided in the mounting plate portion 22.

第2導電板4の表面(上面)、チップ端子7の表面(上面)、実装板部22の表面及び、導電板3の肉厚部32の表面(上面)は、同一平面上に位置し、いわゆる面一の形態を構成する。実装板部22を構成する樹脂、すなわち保持部材2の樹脂は、第2導電板4及び導電板3の隙間に充填されている。 The surface of the second conductive plate 4 (upper surface), the surface of the chip terminal 7 (upper surface), the surface of the mounting plate portion 22, and the surface of the thick portion 32 of the conductive plate 3 (upper surface) are located on the same plane. It constitutes a so-called flush form. The resin constituting the mounting plate portion 22, that is, the resin of the holding member 2, is filled in the gap between the second conductive plate 4 and the conductive plate 3.

第2導電板4の裏面(下面)、第2導電板4及び導電板3の隙間に充填された樹脂の裏面(第2導電板4の裏面側に露出している面)及び、導電板3の肉薄部33の裏面(下面)は、同一平面上に位置し、いわゆる面一の形態を構成する。 The back surface (lower surface) of the second conductive plate 4, the back surface of the resin filled in the gaps between the second conductive plate 4 and the conductive plate 3 (the surface exposed on the back surface side of the second conductive plate 4), and the conductive plate 3 The back surface (lower surface) of the thin portion 33 of the above is located on the same plane and constitutes a so-called flush surface.

電子部品5は、実装板部22の表面側(回路基板1の基部の表面側)に、電子部品5の外周器54が第2導電板4及びチップ端子7を跨ぐように実装されている。電子部品5がn型FETである場合、電子部品5(n型FET)の第2端子52(ゲート端子)は、チップ端子7上に載置され、チップ端子7と接合している。上述のごとくチップ端子7の露出部71には、半田ペースト9が塗布されており、第2端子52とチップ端子7とは、半田ペースト9により接合されている。電子部品5(n型FET)の第3端子53(ドレイン端子)は、第2導電板4(入力側バスバ)の表面上に載置され、当該表面上に塗布された半田ペースト9により、第3端子53と第2導電板4とは、接合されている。 The electronic component 5 is mounted on the surface side of the mounting plate portion 22 (the surface side of the base portion of the circuit board 1) so that the outer peripheral device 54 of the electronic component 5 straddles the second conductive plate 4 and the chip terminal 7. When the electronic component 5 is an n-type FET, the second terminal 52 (gate terminal) of the electronic component 5 (n-type FET) is placed on the chip terminal 7 and joined to the chip terminal 7. As described above, the exposed portion 71 of the chip terminal 7 is coated with the solder paste 9, and the second terminal 52 and the chip terminal 7 are joined by the solder paste 9. The third terminal 53 (drain terminal) of the electronic component 5 (n-type FET) is placed on the surface of the second conductive plate 4 (input side bus bar), and is formed by the solder paste 9 applied on the surface. The 3 terminal 53 and the 2nd conductive plate 4 are joined.

実装板部22の表面には、複数の信号回路6が導電性銅ナノインクによって形成されている。チップ端子7と信号回路6の端部61とは、信号回路6を形成する導電性銅ナノインクが焼成することにより固着してある。チップ端子7の表面に導電性銅ナノインクを焼成させることで、チップ端子7と導電性銅ナノインクにより形成される信号回路6とが、電気的に接続され導通する。 A plurality of signal circuits 6 are formed of conductive copper nanoinks on the surface of the mounting plate portion 22. The chip terminal 7 and the end portion 61 of the signal circuit 6 are fixed to each other by firing the conductive copper nanoink forming the signal circuit 6. By firing the conductive copper nanoink on the surface of the chip terminal 7, the chip terminal 7 and the signal circuit 6 formed by the conductive copper nanoink are electrically connected and conductive.

図8は、回路基板1の要部(B−B)の模式的断面図である。図8は、図6における(B−B)断面を模式的に示すものであり、凸部31を含む模式的断面図である。図7と共通する部位についての説明は省略する。 FIG. 8 is a schematic cross-sectional view of a main part (BB) of the circuit board 1. FIG. 8 schematically shows the cross section (BB) in FIG. 6, and is a schematic cross-sectional view including the convex portion 31. The description of the parts common to FIG. 7 will be omitted.

電子部品5は、実装板部22の表面側(回路基板1の基部の表面側)に、電子部品5の外周器54が第2導電板4及び導電板3の凸部31を跨ぐように実装されている。電子部品5(n型FET)の第1端子51(ソース端子)は、導電板3の凸部31の上面上(表面上)に載置され、当該表面上に塗布された半田ペースト9により、第1端子51と導電板3とは、接合されている。 The electronic component 5 is mounted on the surface side of the mounting plate portion 22 (the surface side of the base portion of the circuit board 1) so that the outer peripheral device 54 of the electronic component 5 straddles the second conductive plate 4 and the convex portion 31 of the conductive plate 3. Has been done. The first terminal 51 (source terminal) of the electronic component 5 (n-type FET) is placed on the upper surface (on the surface) of the convex portion 31 of the conductive plate 3, and is formed by the solder paste 9 applied on the surface. The first terminal 51 and the conductive plate 3 are joined.

図9は、電子部品5が実装された状態でのチップ端子7及び信号回路6の接合部の説明図である。図9は、図6における信号回路6の端部61と、チップ端子7との接合部を拡大したものである。上述のごとく、信号回路6の端部61は、円形状において欠落部62を有する形状をなし、チップ端子7の表面の一部を覆うように形成されている。すなわち、チップ端子7に接合される信号回路6の端部61には、その一部が切り欠かれた欠落部62(切り欠き部)が設けられている。欠落部62は、電子部品5側に設けられている。従って、信号回路6の端部61は、欠落部62により、電子部品5側に向けて開口する凹状(コ状/C状)をなしている。 FIG. 9 is an explanatory diagram of a joint portion between the chip terminal 7 and the signal circuit 6 in a state where the electronic component 5 is mounted. FIG. 9 is an enlarged view of the joint between the end 61 of the signal circuit 6 and the chip terminal 7 in FIG. As described above, the end portion 61 of the signal circuit 6 has a circular shape having a missing portion 62, and is formed so as to cover a part of the surface of the chip terminal 7. That is, the end 61 of the signal circuit 6 joined to the chip terminal 7 is provided with a missing portion 62 (notched portion) in which a part thereof is cut out. The missing portion 62 is provided on the electronic component 5 side. Therefore, the end portion 61 of the signal circuit 6 has a concave shape (U-shape / C-shape) that opens toward the electronic component 5 side due to the missing portion 62.

欠落部62から露出するチップ端子7の露出部71は、電子部品5側に形成される。チップ端子7の露出部71には半田ペースト9が塗布されるところ、欠落部62により信号回路6の端部61に凹状(コ状/C状)の開口を形成することにより、露出部71に塗布された半田ペースト9が露出部71から流れ出ることを抑制することができる。信号回路6の端部61において、当該欠落部62により欠落した以外の領域である残部が、チップ端子7と接合し、信号回路6及びチップ端子7が電気的に接続している。 The exposed portion 71 of the chip terminal 7 exposed from the missing portion 62 is formed on the electronic component 5 side. When the solder paste 9 is applied to the exposed portion 71 of the chip terminal 7, the missing portion 62 forms a concave (U-shaped / C-shaped) opening at the end 61 of the signal circuit 6 to form the exposed portion 71. It is possible to prevent the applied solder paste 9 from flowing out from the exposed portion 71. At the end 61 of the signal circuit 6, the rest of the region other than the missing portion 62 is joined to the chip terminal 7, and the signal circuit 6 and the chip terminal 7 are electrically connected to each other.

本実施形態にて、信号回路6の端部61は、欠落部62により電子部品5側に向けて開口した凹状(C状)をなすとしたが、これに限定されない。欠落部62は、円形をなす信号回路6の端部61に設けられた孔であってもよい。端部61に設けられた孔によって形成された欠落部62からは、チップ端子7の表面が露出し、当該露出している部分が、チップ端子7の露出部71に相当する。信号回路6の端部61に設けられた孔(欠落部62)の内周縁の形状は、チップ端子7の露出部71の外周縁の形状と同じとなる。チップ端子7の露出部71には半田ペースト9が塗布されるところ、信号回路6の端部61の欠落部62を孔により形成することにより、チップ端子7の露出部71は外周縁(閉ループ)により囲まれた形態となり、塗布された半田ペースト9が露出部71から流れ出ることを抑制することができる。 In the present embodiment, the end 61 of the signal circuit 6 has a concave shape (C shape) opened toward the electronic component 5 side by the missing portion 62, but the present invention is not limited to this. The missing portion 62 may be a hole provided at the end portion 61 of the circular signal circuit 6. The surface of the chip terminal 7 is exposed from the missing portion 62 formed by the holes provided in the end portion 61, and the exposed portion corresponds to the exposed portion 71 of the chip terminal 7. The shape of the inner peripheral edge of the hole (missing portion 62) provided at the end portion 61 of the signal circuit 6 is the same as the shape of the outer peripheral edge of the exposed portion 71 of the chip terminal 7. Where the solder paste 9 is applied to the exposed portion 71 of the chip terminal 7, the exposed portion 71 of the chip terminal 7 has an outer peripheral edge (closed loop) by forming the missing portion 62 of the end portion 61 of the signal circuit 6 with holes. It becomes a form surrounded by, and it is possible to prevent the applied solder paste 9 from flowing out from the exposed portion 71.

本実施形態にて、信号回路6の端部61は、円形をなしチップ端子7を覆うように形成されているとしたが、これに限定されない。信号回路6の端部61は、矩形等の多角形であってもよく、チップ端子7の表面を覆うように形成されていればよい。 In the present embodiment, the end 61 of the signal circuit 6 is circular and is formed so as to cover the chip terminal 7, but the present invention is not limited to this. The end 61 of the signal circuit 6 may be a polygon such as a rectangle, and may be formed so as to cover the surface of the chip terminal 7.

電子部品5(n型FET)の第2端子52(ゲート端子)は、矩形状をなし、チップ端子7の露出部71上に載置してある。第2端子52(ゲート端子)の短手方向(外周器54からの突出方向)の幅は、信号回路6の端部61に形成された開口の幅よりも小さくしてある。従って、第2端子52(ゲート端子)を開口の内側に載置することができ、すなわち信号回路6の端部61に重なることなく、第2端子52(ゲート端子)をチップ端子7の露出部71に載置することができる。 The second terminal 52 (gate terminal) of the electronic component 5 (n-type FET) has a rectangular shape and is placed on the exposed portion 71 of the chip terminal 7. The width of the second terminal 52 (gate terminal) in the lateral direction (protruding direction from the outer peripheral device 54) is smaller than the width of the opening formed at the end 61 of the signal circuit 6. Therefore, the second terminal 52 (gate terminal) can be placed inside the opening, that is, the second terminal 52 (gate terminal) is placed on the exposed portion of the chip terminal 7 without overlapping the end 61 of the signal circuit 6. It can be placed on 71.

チップ端子7の露出部71には、半田ペースト9が塗布されており、チップ端子7と第2端子52(ゲート端子)とは、半田ペースト9により接合される。第2端子52(ゲート端子)及びチップ端子7との接合部をこのような接合形態とすることにより、第2端子52(ゲート端子)と信号回路6とを半田ペースト9により接合することを不要とすることができる。本実施形態のように信号回路6を導電性銅ナノインクで形成する場合、導電性銅ナノインクがフラックスとして機能する成分を含んでいない場合、導電性銅ナノインクの半田に対する濡れ性は低いものとなる。しかしながら、導電性銅ナノインクで形成した信号回路6の端部61に欠落部62を設け、当該欠落部62から露出したチップ端子7の露出部71と第2端子52(ゲート端子)とを半田ペースト9で接合することにより接合力を担保することができる。 A solder paste 9 is applied to the exposed portion 71 of the chip terminal 7, and the chip terminal 7 and the second terminal 52 (gate terminal) are joined by the solder paste 9. By forming the joint between the second terminal 52 (gate terminal) and the chip terminal 7 in such a joining form, it is not necessary to join the second terminal 52 (gate terminal) and the signal circuit 6 with the solder paste 9. Can be. When the signal circuit 6 is formed of the conductive copper nanoink as in the present embodiment, the wettability of the conductive copper nanoink to the solder is low when the conductive copper nanoink does not contain a component that functions as a flux. However, a missing portion 62 is provided at the end 61 of the signal circuit 6 formed of the conductive copper nanoink, and the exposed portion 71 of the chip terminal 7 exposed from the missing portion 62 and the second terminal 52 (gate terminal) are solder-pasted. The joining force can be ensured by joining at 9.

本実施形態によれば、チップ端子7と接合される信号回路6は導電性銅ナノインクによって形成されているため、並設される第1端子51及び第2端子52の端子ピッチ(端子間の距離)が狭小な電子部品5を実装した回路基板1を提供することができる。 According to this embodiment, since the signal circuit 6 joined to the chip terminal 7 is formed of conductive copper nanoink, the terminal pitch (distance between the terminals) of the first terminal 51 and the second terminal 52 arranged side by side. ) Can provide a circuit board 1 on which a narrow electronic component 5 is mounted.

電子部品5がn型FETである場合、制御信号が入力される第2端子52(ゲート端子)を、チップ端子7を介して導電性銅ナノインクによって形成した信号回路6と電気的に接続することにより、第2端子52(ゲート端子)用のバスバを不要とすることができる。チップ端子7及び信号回路6の端部61の大きさは、バスバ等の板部材と比較すると小さい。従って、導電板3(出力バスバ)に接合される第1端子51(ソース端子)と、チップ端子7に接合される第2端子52(ゲート端子)との端子ピッチが小さい電子部品5を、導電板3及び第2導電板4を用いてインサート成型した回路基板1(バスバインサート基板)に実装することができる。 When the electronic component 5 is an n-type FET, the second terminal 52 (gate terminal) into which the control signal is input is electrically connected to the signal circuit 6 formed of the conductive copper nanoink via the chip terminal 7. Therefore, the bus bar for the second terminal 52 (gate terminal) can be eliminated. The size of the end 61 of the chip terminal 7 and the signal circuit 6 is smaller than that of a plate member such as a bus bar. Therefore, the electronic component 5 having a small terminal pitch between the first terminal 51 (source terminal) joined to the conductive plate 3 (output bus bar) and the second terminal 52 (gate terminal) joined to the chip terminal 7 is conductive. It can be mounted on a circuit board 1 (bass bar insert board) that is insert-molded using the board 3 and the second conductive board 4.

チップ端子7は円形状の板であり、チップ端子7が嵌め込まれる嵌合孔221も円形をなす。従って、回路基板1の製造する際、チップ端子7を嵌合孔221に圧入する工程において、孔の内周縁に対するチップ端子7の外周縁の回転角度を合わせることを不要とし、当該製造工程の効率化を図ることができる。 The chip terminal 7 is a circular plate, and the fitting hole 221 into which the chip terminal 7 is fitted also has a circular shape. Therefore, when manufacturing the circuit board 1, in the step of press-fitting the chip terminal 7 into the fitting hole 221, it is not necessary to match the rotation angle of the outer peripheral edge of the chip terminal 7 with respect to the inner peripheral edge of the hole, and the efficiency of the manufacturing process is improved. Can be achieved.

導電性銅ナノインクにより印刷(形成)された信号回路6の端部61は、チップ端子7の表面を覆うように設けられ、信号回路6の端部61には、欠落部62が設けられている。当該欠落部62により、信号回路6の端部61は、電子部品5側に向けて開口した凹状をなしている。従って、欠落部62によりチップ端子7の表面には、導電性銅ナノインクが印刷されていない露出部71が、形成されている。チップ端子7と第2端子52とを接合するための半田ペースト9は、露出部71に塗布されているため、導電性銅ナノインク(導電性ナノインク)の半田に対する濡れ性が低い場合であっても、第2端子52及びチップ端子7を直接、半田ペースト9により接合し、接合強度を向上させることができる。 The end 61 of the signal circuit 6 printed (formed) by the conductive copper nanoink is provided so as to cover the surface of the chip terminal 7, and the end 61 of the signal circuit 6 is provided with a missing portion 62. .. Due to the missing portion 62, the end portion 61 of the signal circuit 6 has a concave shape that opens toward the electronic component 5 side. Therefore, the missing portion 62 forms an exposed portion 71 on the surface of the chip terminal 7 on which the conductive copper nanoink is not printed. Since the solder paste 9 for joining the chip terminal 7 and the second terminal 52 is applied to the exposed portion 71, even when the conductive copper nanoink (conductive nanoink) has low wettability to solder. , The second terminal 52 and the chip terminal 7 can be directly bonded with the solder paste 9 to improve the bonding strength.

導電板3に設けられた凸部31を、第1端子51を実装する部位として用いることにより、導電板3と第1端子51との間に介在される他の接続部品(接続点)を不要とし、電子部品5の第1端子51と導電板3との間の電気抵抗を減少させ、通電時の発熱量を抑制することができる。 By using the convex portion 31 provided on the conductive plate 3 as a portion for mounting the first terminal 51, other connecting parts (connection points) interposed between the conductive plate 3 and the first terminal 51 are unnecessary. Therefore, the electric resistance between the first terminal 51 of the electronic component 5 and the conductive plate 3 can be reduced, and the amount of heat generated during energization can be suppressed.

図10、図11、図12、図13及び図14は、回路基板1を含む電気接続箱100の製造方法の説明図である。実施形態1に係る回路基板1を含む電気接続箱100の製造方法について、図10、図11、図12、図13及び図14に基づき、以下に説明する。 10, FIG. 11, FIG. 12, FIG. 13 and FIG. 14 are explanatory views of a method of manufacturing the electrical junction box 100 including the circuit board 1. A method of manufacturing the electrical junction box 100 including the circuit board 1 according to the first embodiment will be described below with reference to FIGS. 10, 11, 12, 13, and 14.

まず、導電板3(出力バスバ)及び第2導電板4(入力バスバ)の側面(端縁)を対向させ、側面間の間隔を開けて、この順番で並設する(図10A参照)。導電板3及び第2導電板4は、例えば板厚が2mmから3mmの純銅又は銅合金の板材を切削又はプレス加工により生成する。導電板3及び第2導電板4の表面には、ニッケルメッキが施されたものであってもよい。導電板3の表面の短手方向の端縁側には、例えば切削又はプレス加工により凸部31が設けられている。導電板3は、凸部31がもうけられている端縁を、第2導電板4の短手方向の端縁に対向してある。更にコネクタ端子105を用意する。 First, the side surfaces (edges) of the conductive plate 3 (output bus bar) and the second conductive plate 4 (input bus bar) are opposed to each other, and the side surfaces are spaced apart from each other and arranged side by side in this order (see FIG. 10A). The conductive plate 3 and the second conductive plate 4 are produced, for example, by cutting or pressing a plate material of pure copper or a copper alloy having a plate thickness of 2 mm to 3 mm. The surfaces of the conductive plate 3 and the second conductive plate 4 may be nickel-plated. A convex portion 31 is provided on the edge side of the surface of the conductive plate 3 in the lateral direction, for example, by cutting or pressing. In the conductive plate 3, the edge of the convex portion 31 is opposed to the edge of the second conductive plate 4 in the lateral direction. Further, a connector terminal 105 is prepared.

次に、導電板3、第2導電板4及びコネクタ端子105をインサート成型用金型内に配置し、射出成型機にて一体成形する。成形樹脂は、例えばPPS(ポリフェニレンサウファイド)等の耐熱性の高い熱可塑性樹脂を用いる(図10B参照)。ケース状となるように電気接続箱100の外郭をなす外枠21が成形される。導電板3の凸部31の上面(表面)、導電板3の肉厚部32の表面及び第2導電板4の表面を露出させる共に、これら表面夫々と、導電板3の肉薄部33の表面上に樹脂により形成された実装板部22の表面(実装面)とが、同一平面上(面一)となるように実装板部22が形成される。このように同一平面上に形成された導電板3、第2導電板4及び実装板部22により、回路基板1(バスバインサート基板)の基部が構成される。実装板部22の表面には、複数の嵌合孔221が形成される。これら複数の嵌合孔221は、後に搭載される電子部品5の第2端子52の位置又は基板接続用コネクタ106の位置に合わせて形成される。 Next, the conductive plate 3, the second conductive plate 4, and the connector terminal 105 are arranged in the insert molding die and integrally molded by an injection molding machine. As the molding resin, for example, a thermoplastic resin having high heat resistance such as PPS (polyphenylene sulfide) is used (see FIG. 10B). The outer frame 21 forming the outer shell of the electrical connection box 100 is formed so as to have a case shape. The upper surface (surface) of the convex portion 31 of the conductive plate 3, the surface of the thick portion 32 of the conductive plate 3 and the surface of the second conductive plate 4 are exposed, and each of these surfaces and the surface of the thin portion 33 of the conductive plate 3 are exposed. The mounting plate portion 22 is formed so that the surface (mounting surface) of the mounting plate portion 22 formed of resin on the surface is flush with the same plane (plane). The conductive plate 3, the second conductive plate 4, and the mounting plate portion 22 formed on the same plane in this way form a base portion of the circuit board 1 (bus bar insert substrate). A plurality of fitting holes 221 are formed on the surface of the mounting plate portion 22. These plurality of fitting holes 221 are formed according to the position of the second terminal 52 of the electronic component 5 to be mounted later or the position of the board connection connector 106.

次に、純銅又は銅合金製のチップ端子7を、実装板部22に形成された嵌合孔221に圧入し、チップ端子7を嵌合孔221に嵌合する(図11C、D参照)。当該篏合工程において、超音波振動圧入機を用いてチップ端子7を嵌合孔221に圧入し、実装板部22に固着するものであってもよい。チップ端子7の上面(表面)が、実装板部22の表面と同一平面上(面一)となるようにチップ端子7は嵌合孔221に圧入される。チップ端子7は円形の板であり、嵌合孔221の内周縁も円形であるため、チップ端子7を嵌合孔221に圧入するにあたり、嵌合孔221の内周縁に対し、チップ端子7の外周縁の角度を合わせることを不要とし、篏合工程の所要時間を低減させることができる。 Next, the chip terminal 7 made of pure copper or a copper alloy is press-fitted into the fitting hole 221 formed in the mounting plate portion 22, and the chip terminal 7 is fitted into the fitting hole 221 (see FIGS. 11C and D). In the merging step, the chip terminal 7 may be press-fitted into the fitting hole 221 using an ultrasonic vibration press-fitting machine and fixed to the mounting plate portion 22. The chip terminal 7 is press-fitted into the fitting hole 221 so that the upper surface (surface) of the chip terminal 7 is flush with the surface of the mounting plate portion 22 (flat). Since the chip terminal 7 is a circular plate and the inner peripheral edge of the fitting hole 221 is also circular, when the chip terminal 7 is press-fitted into the fitting hole 221, the chip terminal 7 is pressed against the inner peripheral edge of the fitting hole 221. It is not necessary to adjust the angle of the outer peripheral edge, and the time required for the merging process can be reduced.

次に、スクリーン印刷機を用いて、樹脂により形成された実装板部22の表面(実装面)に、導電性銅ナノインクを信号回路6の形状に印刷する(図12E参照)。導電性銅ナノインクは、焼成で溶融して導電性を発現する特徴を有し、銅等の金属は超微粒子化により劇的に融点が低下する。従って、120℃程度の温度で焼成することで銅配線が形成され、電気的接合が可能な信号回路6が形成される。 Next, using a screen printing machine, conductive copper nanoink is printed in the shape of the signal circuit 6 on the surface (mounting surface) of the mounting plate portion 22 formed of resin (see FIG. 12E). The conductive copper nanoink has a characteristic that it is melted by firing to exhibit conductivity, and the melting point of a metal such as copper is dramatically lowered due to ultrafine particles. Therefore, copper wiring is formed by firing at a temperature of about 120 ° C., and a signal circuit 6 capable of electrical bonding is formed.

チップ端子7上の導電性銅ナノインク(信号回路6の端部61)は、チップ端子7の表面の一部を覆うように印刷される。チップ端子7上の導電性銅ナノインクの形状(信号回路6の端部61の形状)を、第2導電板4側に向かって開口する凹状(コ状/C状)となるように導電性銅ナノインクを印刷する(図5参照)。導電性銅ナノインクが印刷されていないチップ端子7の表面の領域により、チップ端子7の露出部71が形成される。 The conductive copper nanoink (end 61 of the signal circuit 6) on the chip terminal 7 is printed so as to cover a part of the surface of the chip terminal 7. Conductive copper so that the shape of the conductive copper nanoink on the chip terminal 7 (the shape of the end 61 of the signal circuit 6) is concave (U-shaped / C-shaped) that opens toward the second conductive plate 4 side. Print the nanoink (see Figure 5). The exposed portion 71 of the chip terminal 7 is formed by the region on the surface of the chip terminal 7 on which the conductive copper nanoink is not printed.

チップ端子7上において、導電性銅ナノインクが印刷されていない領域は、信号回路6の端部61における欠落部62に相当する。チップ端子7上において、導電性銅ナノインクが印刷されている領域は、信号回路6の端部61における残部(チップ端子7の表面の一部を覆う領域)に相当する。すなわち、信号回路6の端部61における残部と、チップ端子7とが接合することにより、信号回路6及びチップ端子7は電気的に接続される。 The region on the chip terminal 7 where the conductive copper nanoink is not printed corresponds to the missing portion 62 at the end 61 of the signal circuit 6. The region on which the conductive copper nanoink is printed on the chip terminal 7 corresponds to the remaining portion (the region covering a part of the surface of the chip terminal 7) at the end 61 of the signal circuit 6. That is, the signal circuit 6 and the chip terminal 7 are electrically connected by joining the remaining portion of the end 61 of the signal circuit 6 with the chip terminal 7.

第2チップ端子8上の導電性銅ナノインク(信号回路6の端部61)は、チップ端子7と同様に、第2チップ端子8の表面の一部を覆うように印刷される。第2チップ端子8上の導電性銅ナノインクの形状(信号回路6の端部61の形状)を、信号回路6の配線方向とは逆に向かって開口する凹状(コ状/C状)となるように導電性銅ナノインクを印刷する(図5参照)。チップ端子7と同様に、導電性銅ナノインクが印刷されていない第2チップ端子8の表面の領域により、第2チップ端子8の露出部71が形成される。 The conductive copper nanoink (end 61 of the signal circuit 6) on the second chip terminal 8 is printed so as to cover a part of the surface of the second chip terminal 8 like the chip terminal 7. The shape of the conductive copper nanoink on the second chip terminal 8 (the shape of the end portion 61 of the signal circuit 6) is concave (U-shaped / C-shaped) that opens in the direction opposite to the wiring direction of the signal circuit 6. The conductive copper nanoink is printed in this manner (see FIG. 5). Similar to the chip terminal 7, the exposed portion 71 of the second chip terminal 8 is formed by the area on the surface of the second chip terminal 8 on which the conductive copper nanoink is not printed.

次に、チップ端子7の露出部71、導電板3の凸部31の上面の所定箇所、及び第2導電板4の上面の所定箇所に、半田ペースト9が塗布される(図12F参照)。塗布された半田ペースト9上に、夫々の端子(51,52,53)が載置されるように複数の電子部品5(図面上は7つ)を並設し、これら電子部品5夫々が、第2導電版及び導電板3の凸部31を跨ぐように実装する。従って、複数の電子部品5は、実装板部22と第2導電板4との境界線に沿うように並設される。 Next, the solder paste 9 is applied to the exposed portion 71 of the chip terminal 7, the predetermined portion on the upper surface of the convex portion 31 of the conductive plate 3, and the predetermined portion on the upper surface of the second conductive plate 4 (see FIG. 12F). A plurality of electronic components 5 (seven in the drawing) are arranged side by side so that the terminals (51, 52, 53) are placed on the coated solder paste 9, and each of these electronic components 5 is arranged. It is mounted so as to straddle the convex portion 31 of the second conductive plate and the conductive plate 3. Therefore, the plurality of electronic components 5 are arranged side by side along the boundary line between the mounting plate portion 22 and the second conductive plate 4.

電子部品5は、例えばn型FET等の半導体スイッチである。電子部品5がn型FETである場合、第1端子51(ソース端子)を導電板3の凸部31における半田ペースト9が塗布された領域に載置する。第2端子52(ゲート端子)をチップ端子7の露出部71における半田ペースト9が塗布された領域に載置する。第3端子53(ドレイン端子)を第2導電板4における半田ペースト9が塗布された領域に載置する。 The electronic component 5 is a semiconductor switch such as an n-type FET. When the electronic component 5 is an n-type FET, the first terminal 51 (source terminal) is placed on the convex portion 31 of the conductive plate 3 in the region where the solder paste 9 is applied. The second terminal 52 (gate terminal) is placed on the exposed portion 71 of the chip terminal 7 in the area where the solder paste 9 is applied. The third terminal 53 (drain terminal) is placed on the second conductive plate 4 in the region where the solder paste 9 is applied.

更に、夫々の基板接続用コネクタ106を実装板部22の長手方向の端部側(短辺の近傍)に設けられた第2チップ端子8に位置合わせして、実装板部22の表面上に実装する。複数の電子部品5及び基板接続用コネクタ106が実装された状態となったものをリフロー炉にて、半田付けを行う。これにより、電子部品5が実装された回路基板1(バスバインサート基板)を内包(収納)する電気接続箱100が生成される(図13G参照)。 Further, each board connection connector 106 is aligned with the second chip terminal 8 provided on the end side (near the short side) in the longitudinal direction of the mounting plate portion 22 and is placed on the surface of the mounting plate portion 22. Implement. A state in which a plurality of electronic components 5 and a board connection connector 106 are mounted is soldered in a reflow furnace. As a result, an electric junction box 100 that includes (stores) the circuit board 1 (bus bar insert board) on which the electronic component 5 is mounted is generated (see FIG. 13G).

次に、マイコン等を搭載した制御回路基板を、外枠21の内側に嵌め込み、制御回路基板の端子(図示せず)とコネクタ端子105とを半田により接合し、電気的に接続する(図13H参照)。制御回路基板を外枠21の内側に嵌め込むことにより、制御回路基板上に設けられた信号用端子を基板接続用コネクタ106と接合し、制御回路基板から出力される制御信号となる電圧(デューティ)は、電子部品5(n型FET)の第2端子52(ゲート端子)に印加(入力)される。制御回路基板の端子とコネクタ端子105とを半田により接合することより、電気接続箱100の外部から送信された信号が制御回路基板に入力され、当該信号を受信した制御回路基板上のマイコンは、電子部品5に制御信号を出力し電子部品5(n型FET)のオンオフ動作を可能とすることができる。 Next, the control circuit board on which the microcomputer or the like is mounted is fitted inside the outer frame 21, and the terminals (not shown) of the control circuit board and the connector terminals 105 are joined by solder and electrically connected (FIG. 13H). reference). By fitting the control circuit board inside the outer frame 21, the signal terminal provided on the control circuit board is joined to the board connection connector 106, and the voltage (duty) that becomes the control signal output from the control circuit board. ) Is applied (input) to the second terminal 52 (gate terminal) of the electronic component 5 (n-type FET). By joining the terminals of the control circuit board and the connector terminals 105 with solder, a signal transmitted from the outside of the electrical junction box 100 is input to the control circuit board, and the microcomputer on the control circuit board that receives the signal receives the signal. A control signal can be output to the electronic component 5 to enable on / off operation of the electronic component 5 (n-type FET).

次に、アルミニウム等の伝熱性の高い金属を用いたヒートシンク103を、ネジにより保持部材2に固定する(図14I参照)。ヒートシンク103の表面には、薄板状又はシート状の放熱材104(伝熱促進材)が設けられている。放熱材104は絶縁性を有し、ヒートシンク103と、導電板3及び第2導電板4とを絶縁しつつ、これらを接触させて熱的に接続する。ヒートシンク103を保持部材2に固定するにあたり、放熱材104の表面と、導電板3及び第2導電板4の裏面とを接触させて、ヒートシンク103は、ネジにより保持部材2に固定される。放熱材104は、ヒートシンク103と、導電板3及び第2導電板4との間に介在しており、導電板3及び第2導電板4と、ヒートシンク103とは、放熱材104を介して熱的に接続されている。従って、電子部品5等にて発生した熱を導電板3及び第2導電板4を介してヒートシンク103に伝熱し、放熱性を向上させることができる。 Next, the heat sink 103 using a metal having high heat conductivity such as aluminum is fixed to the holding member 2 with screws (see FIG. 14I). A thin plate-shaped or sheet-shaped heat radiating material 104 (heat transfer promoting material) is provided on the surface of the heat sink 103. The heat radiating material 104 has an insulating property, and while insulating the heat sink 103 and the conductive plate 3 and the second conductive plate 4, they are brought into contact with each other to be thermally connected. When fixing the heat sink 103 to the holding member 2, the front surface of the heat radiating material 104 is brought into contact with the back surfaces of the conductive plate 3 and the second conductive plate 4, and the heat sink 103 is fixed to the holding member 2 with screws. The heat radiating material 104 is interposed between the heat sink 103 and the conductive plate 3 and the second conductive plate 4, and the conductive plate 3 and the second conductive plate 4 and the heat sink 103 are heated via the heat radiating material 104. Is connected. Therefore, the heat generated by the electronic component 5 or the like can be transferred to the heat sink 103 via the conductive plate 3 and the second conductive plate 4, and the heat dissipation can be improved.

次に、上蓋102を保持部材2に固定する(図14I参照)。上蓋102を導電板3及び第2導電板4の表面側から被せるように保持部材2に固定することにより、電気接続箱100が完成する。(図14J参照) Next, the upper lid 102 is fixed to the holding member 2 (see FIG. 14I). The electrical connection box 100 is completed by fixing the upper lid 102 to the holding member 2 so as to cover the conductive plate 3 and the second conductive plate 4 from the surface side. (See Fig. 14J)

本製造方法によれば、端子ピッチが狭小な電子部品5を搭載することができる回路基板1を含む電気接続箱100を効率的に製造することができる。 According to this manufacturing method, it is possible to efficiently manufacture the electric junction box 100 including the circuit board 1 on which the electronic component 5 having a narrow terminal pitch can be mounted.

電子部品5がn型FET等の半導体スイッチである場合、第2端子52(ゲート端子)を接続するためのバスバに代わり、実装板部22の上に導電性銅ナノインクを印刷して形成した金属膜を用いる。これにより、第1端子51(ソース端子)を接続する導電板3(出力バスバ)と近接して、第2端子52(ゲート端子)に接続する信号回路6の端部61を配置することができる。従って、インサート成型により生成される回路基板1(バスバインサート基板)に端子間ピッチの狭い電子部品5を実装することができ、高密度実装により小型化した電気接続箱100を製造することができる。 When the electronic component 5 is a semiconductor switch such as an n-type FET, a metal formed by printing conductive copper nanoink on the mounting plate portion 22 instead of the bus bar for connecting the second terminal 52 (gate terminal). Use a membrane. As a result, the end 61 of the signal circuit 6 connected to the second terminal 52 (gate terminal) can be arranged in the vicinity of the conductive plate 3 (output bus bar) connecting the first terminal 51 (source terminal). .. Therefore, the electronic component 5 having a narrow pitch between terminals can be mounted on the circuit board 1 (bus bar insert board) generated by the insert molding, and the miniaturized electric junction box 100 can be manufactured by the high-density mounting.

今回開示された実施形態はすべての点で例示であって、制限的なものではないと考えられるべきである。本開示の範囲は、上記した意味ではなく、特許請求の範囲によって示され、特許請求の範囲と均等の意味及び範囲内でのすべての変更が含まれることが意図される。 The embodiments disclosed this time should be considered as exemplary in all respects and not restrictive. The scope of the present disclosure is indicated by the scope of claims, not the above-mentioned meaning, and is intended to include all modifications within the meaning and scope equivalent to the scope of claims.

1 回路基板
2 保持部材
21 外枠
22 実装板部
221 嵌合孔(孔)
23 コネクタハウジング
3 導電板(出力バスバ)
31 凸部
32 肉厚部
33 肉薄部
4 第2導電板(入力バスバ)
5 電子部品(n型FET)
51 第1端子(ソース端子)
52 第2端子(ゲート端子)
53 第3端子(ドレイン端子)
54 外周器
6 信号回路
61 端部
62 欠落部
7 チップ端子
71 露出部
8 第2チップ端子
9 半田ペースト
100 電気接続箱
101 制御回路基板
102 上蓋
103 ヒートシンク
104 放熱材
105 コネクタ端子
106 基板接続用コネクタ
1 Circuit board 2 Holding member 21 Outer frame 22 Mounting plate 221 Fitting hole (hole)
23 Connector housing 3 Conductive plate (output bus bar)
31 Convex part 32 Thick part 33 Thin part 4 Second conductive plate (input bus bar)
5 Electronic components (n-type FET)
51 1st terminal (source terminal)
52 Second terminal (gate terminal)
53 Third terminal (drain terminal)
54 Outer peripheral 6 Signal circuit 61 End 62 Missing part 7 Chip terminal 71 Exposed part 8 Second chip terminal 9 Solder paste 100 Electrical junction box 101 Control circuit board 102 Top lid 103 Heat sink 104 Heat dissipation material 105 Connector terminal 106 Board connection connector

Claims (7)

並設された第1端子及び第2端子を含む電子部品が実装される回路基板であって、
絶縁性の保持部材と、導電板と、チップ端子と、信号回路とを備え、
前記導電板は、前記保持部材によって保持され、
前記第1端子は、前記導電板に接合され、
前記チップ端子は、前記保持部材の表面に形成された孔に篏合され、
前記第2端子は、前記チップ端子に接合され、
前記信号回路は、導電性ナノインクによって、前記保持部材の表面上に形成され、
前記信号回路の端部は、前記チップ端子と接合してある
回路基板。
A circuit board on which electronic components including the first terminal and the second terminal arranged side by side are mounted.
It is provided with an insulating holding member, a conductive plate, a chip terminal, and a signal circuit.
The conductive plate is held by the holding member and
The first terminal is joined to the conductive plate and
The chip terminal is fitted into a hole formed on the surface of the holding member.
The second terminal is joined to the chip terminal and
The signal circuit is formed on the surface of the holding member by the conductive nanoink.
The end of the signal circuit is a circuit board joined to the chip terminal.
前記孔の内周縁は、円形をなし、
前記チップ端子は、円板であり、
前記円板の外周縁が前記孔の内周縁に嵌り込んで、前記チップ端子は前記孔に篏合してある
請求項1に記載の回路基板。
The inner peripheral edge of the hole has a circular shape.
The chip terminal is a disk and
The circuit board according to claim 1, wherein the outer peripheral edge of the disk is fitted into the inner peripheral edge of the hole, and the chip terminal is fitted into the hole.
前記チップ端子は、銅製又は銅を主成分とする合金製であり、
前記導電性ナノインクは、銅ナノ粒子が液中分散した導電性銅ナノインクである
請求項1又は請求項2に記載の回路基板。
The chip terminal is made of copper or an alloy containing copper as a main component, and is made of copper.
The circuit board according to claim 1 or 2, wherein the conductive nanoink is a conductive copper nanoink in which copper nanoparticles are dispersed in a liquid.
前記導電性ナノインクにより形成された前記信号回路の端部は、前記チップ端子上に設けられ、
前記信号回路の端部には、欠落部が形成されており、
前記チップ端子は、前記欠落部から露出している露出部を含み、
前記露出部には、前記チップ端子と前記第2端子とを接合するための半田が塗布され、
前記第2端子は、前記露出部に接合されている
請求項1から請求項3のいずれか一項に記載の回路基板。
The end of the signal circuit formed by the conductive nanoink is provided on the chip terminal.
A missing portion is formed at the end of the signal circuit.
The chip terminal includes an exposed portion exposed from the missing portion.
The exposed portion is coated with solder for joining the chip terminal and the second terminal.
The circuit board according to any one of claims 1 to 3, wherein the second terminal is joined to the exposed portion.
前記欠落部によって前記信号回路の端部は、前記電子部品側に向けて開口した凹状をなし、
前記開口の幅は、前記露出部に接合される前記第2端子の幅よりも広い
請求項4に記載の回路基板。
Due to the missing portion, the end portion of the signal circuit has a concave shape that opens toward the electronic component side.
The circuit board according to claim 4, wherein the width of the opening is wider than the width of the second terminal joined to the exposed portion.
前記導電板の一面には、前記一面から垂線方向に突出した凸部が設けられており、
前記第1端子は、前記凸部上に接合されている
請求項1から請求項5のいずれか一項に記載の回路基板。
One surface of the conductive plate is provided with a convex portion protruding in the perpendicular direction from the one surface.
The circuit board according to any one of claims 1 to 5, wherein the first terminal is joined on the convex portion.
回路基板を含む電気接続箱の製造方法であって、
導電板を金型内に配置し、前記金型に樹脂を注入して、外枠及び実装板部を含む保持部材を形成すると共に、前記外枠内に前記導電板の少なくとも一部が収納されるように前記導電板と前記保持部材とを一体化する工程と、
前記実装板部に設けられた孔にチップ端子及び第2チップ端子を圧入する工程と、
前記実装板部上に導電性ナノインクによって、前記チップ端子及び前記第2チップ端子を電気的に接続する信号回路を印刷する工程と、
前記導電板の所定の領域及び前記チップ端子に半田ペーストを塗布する工程と、
前記半田ペーストが塗布された前記導電板の所定の領域及び前記チップ端子の夫々に、電子部品の第1端子及び第2端子の夫々を位置合わせして前記電子部品を載置し、リフロー炉により半田付けする工程と、
前記外枠内に前記電子部品を制御するための制御回路基板を収納し、前記外枠の両端の開口部を塞ぐように上蓋及びヒートシンクを固定する工程と
を含む回路基板を含む電気接続箱の製造方法。
A method of manufacturing an electrical junction box that includes a circuit board.
The conductive plate is arranged in the mold, and resin is injected into the mold to form a holding member including an outer frame and a mounting plate portion, and at least a part of the conductive plate is housed in the outer frame. The step of integrating the conductive plate and the holding member so as to
The process of press-fitting the chip terminal and the second chip terminal into the holes provided in the mounting plate portion,
A step of printing a signal circuit that electrically connects the chip terminal and the second chip terminal with conductive nanoink on the mounting plate portion.
A step of applying a solder paste to a predetermined area of the conductive plate and the chip terminal, and
The electronic component is placed in a predetermined area of the conductive plate coated with the solder paste and the chip terminal by aligning the first terminal and the second terminal of the electronic component, respectively, and the electronic component is placed in a reflow furnace. The soldering process and
An electric junction box including a circuit board including a step of accommodating a control circuit board for controlling the electronic components in the outer frame and fixing an upper lid and a heat sink so as to close openings at both ends of the outer frame. Production method.
JP2019060937A 2019-03-27 2019-03-27 Circuit board and manufacturing method of electric connection box including the same Pending JP2020161693A (en)

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WO2024166314A1 (en) * 2023-02-09 2024-08-15 株式会社オートネットワーク技術研究所 Circuit body

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