JP2020140069A - Exposure apparatus and alignment method - Google Patents

Abstract

To accurately transfer a mask pattern onto a substrate while improving throughput, in a projection exposure apparatus.SOLUTION: A measuring device independent from the projection exposure apparatus measures a position of an alignment mark of a chip which is arranged in a matrix on the substrate in advance (S101), and determines an amount of inherent positional deviation inherent to each chip (S102). Then, the projection exposure apparatus measures the alignment mark for GA, and calculates the amount of positional deviation of each chip having linearity (S103); and then, calculates the position of the alignment mark of each chip, on the basis of the amount of inherent positional deviation (S104) and the amount of linear positional deviation, in a state in which the substrate is mounted on the exposure apparatus, and performs alignment exposure.SELECTED DRAWING: Figure 4

Description

The present invention relates to an exposure apparatus that forms a pattern on a substrate, and more particularly to an alignment with respect to the substrate.

In the exposure apparatus, high-precision alignment is required along with miniaturization of the pattern. Therefore, the alignment marks formed on the substrate are not only the marks provided at the four corners of the substrate for measuring the deformation of the entire substrate, but also the alignment marks are formed according to the one-shot exposure region.

It takes a lot of time to detect the positions of a huge number of alignment marks provided on the substrate in this way, and the throughput is lowered. Therefore, it is known that a measuring device for measuring the position of the alignment mark is provided independently of the exposure device (see Patent Document 1).

There, the position of the alignment mark in a predetermined exposure region is detected by the measuring device prior to the alignment adjustment by the exposure apparatus main body. Then, in the exposure apparatus, only the position of the alignment mark with respect to the entire substrate is detected by the GA method or the like, and the alignment is performed using the position information of the alignment mark detected earlier.

Japanese Unexamined Patent Publication No. 10-64804

For example, in the case of a FO-WLP (fanout-wafer level package) substrate in which a silicon chip is mounted on a carrier, a random chip arrangement error occurs due to chip mounting accuracy. On the other hand, the expansion and contraction and deformation of the substrate occur with each process, and the degree of expansion and contraction and deformation differs.

Therefore, the position of the alignment mark measured prior to the exposure apparatus may be different at the time of the alignment measurement by the exposure apparatus later, and an alignment error occurs at the time of alignment in the exposure process. In particular, in the process of repeating the exposure process of superimposing and transferring patterns on a plurality of layers, the alignment error becomes remarkable.

Therefore, when the position of the alignment mark is measured prior to the alignment by the exposure apparatus, it is required to be able to realize an accurate alignment.

The exposure apparatus of the present invention is an exposure apparatus capable of exposing a plurality of chips on a substrate and capable of communicating with an independent measuring apparatus that measures the position information of an alignment mark formed for each chip. A measuring unit for measuring the position of the GA (global alignment) alignment mark provided on the substrate is provided. Then, the alignment is performed based on the unique position deviation amount of each chip obtained from the alignment mark position information of each chip and the position information of the GA alignment mark measured by the measuring unit. Here, the amount of eccentric misalignment has linearity such as deformation and expansion / contraction of the entire substrate, and represents an error component peculiar to each chip, not an error that can be regarded as common among chips.

With regard to alignment, it is possible to obtain the amount of eigenposition deviation with an exposure apparatus, and the exposure apparatus determines the amount of die shift obtained by excluding the amount of deformation related to the entire substrate from the alignment mark position information of each chip. It is possible to provide a calculation unit for obtaining the deviation amount. For example, the calculation unit obtains the die shift amount by excluding the deformation amount of the linear component from the alignment mark position information.

On the other hand, the measuring device according to another aspect of the present invention, in which it is also possible to obtain the amount of natural misalignment with an independent measuring device, is an alignment mark measuring unit that measures the position information of the alignment mark formed for each chip. The unique position shift amount of each chip obtained from the alignment mark position information of each chip is obtained, and the data of the unique position shift amount is transmitted to the exposure apparatus.

In the alignment method according to another aspect of the present invention, the alignment mark position of each chip is provided on a substrate in which a plurality of chips are two-dimensionally arranged by a measuring device independent of the exposure device that measures the position of the alignment mark. Is measured, the position of the GA (global alignment) alignment mark provided on the substrate is measured by the measuring unit provided in the exposure apparatus, and the position of the alignment mark position information of each chip is obtained by the measuring apparatus or the exposure apparatus. Alignment is performed based on the amount of natural misalignment of each chip and the position information of the GA alignment mark measured by the measuring unit.

According to the present invention, in the projection exposure apparatus, the mask pattern can be accurately transferred to the substrate while improving the throughput.

It is a schematic block diagram of the projection exposure apparatus which is this embodiment. It is a figure which showed the shot arrangement formed on the substrate W. It is the figure which showed the shot arrangement error divided into components. It is a figure which showed the flowchart of the chip peculiar arrangement error calculation processing executed by the measuring apparatus 15. It is a figure which showed the exposure process including the alignment executed in the projection exposure apparatus 10.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a schematic block diagram of the projection exposure apparatus according to the present embodiment. Here, an exposure process is performed in which patterns are superimposed on a plurality of layers.

The projection exposure apparatus 10 is an exposure apparatus that transfers a mask pattern formed on a reticle R as a photomask to a substrate (work substrate) W according to a step & repeat method, and is a light source 20 such as a discharge lamp and a projection optical system 34. It has. The reticle R is made of a quartz material or the like, and a mask pattern having a light-shielding region is formed. As the substrate W, a substrate made of silicon, ceramics, glass or resin (for example, an interposer substrate) is applied here.

The illumination light emitted from the light source 20 enters the integrator 24 via the mirror 22, and the amount of illumination light becomes uniform. The uniform illumination light is incident on the collimator lens 28 through the mirror 26. As a result, parallel light is incident on the reticle R. The light source 20 is driven and controlled by the lamp driving unit 21.

The reticle R is mounted on the reticle stage 30 so that the mask pattern is at the focal position on the light source side of the projection optical system 34. The stage 30 on which the reticle R is mounted and the stage 40 on which the substrate W is mounted are defined with a three-axis coordinate system of XYZ orthogonal to each other. The stage 30 can be moved in the XY directions so as to move the reticle R along the focal plane, and is driven by the stage driving unit 32. The stage 30 can also be rotated in the XY coordinate plane. The position coordinates of the stage 30 are measured here by a laser interferometer or a linear encoder (not shown).

The light transmitted through the area where the mask pattern of the reticle R is formed is projected as the pattern light on the substrate W by the projection optical system 34. The substrate W is mounted on the substrate stage 40 so that its exposed surface coincides with the image-side focal position of the projection optical system 34.

The stage 40 can be moved in the XY directions so as to move the substrate W along the focal plane, and is driven by the stage driving unit 42. Further, the stage 40 can be moved in the Z-axis direction (the optical axis direction of the projection optical system 34) perpendicular to the focal plane (XY direction), and can also be rotated in the XY coordinate plane. The position coordinates of the stage 40 are measured by a laser interferometer or a linear encoder (not shown).

The control unit 50 controls the stage drive units 32 and 42 to position the reticle R and the substrate W, and also controls the lamp drive unit 21. Then, the exposure operation based on the step & repeat method is executed. A memory (not shown) provided in the control unit 50 stores the mask pattern position coordinates of the reticle R, the design position coordinates of the shot area formed on the substrate W, the step movement amount, and the like.

The alignment mark imaging unit 36 is a camera or microscope that images an alignment mark formed on the substrate W, and is an alignment provided on the substrate W by driving the stage driving unit 42 to move the stage 40 before exposure. Image the mark. The image processing unit 38 detects the position coordinates of the alignment mark based on the image signal sent from the alignment mark imaging unit 36. Here, the positions of GA (global alignment) alignment marks provided at the four corners of the substrate W are detected.

The control unit 50 sequentially transfers the mask pattern of the reticle R to each shot region formed on the substrate W according to the step & repeat method. That is, the control unit 50 intermittently moves the stage 40 according to the shot region interval, and when the shot region to be exposed is positioned at the projection position of the mask pattern, the control unit 50 drives the light source 20 to bring the pattern light into the shot region. Let it project.

The measuring device 15 is a device for measuring an alignment mark provided on the substrate W, includes an alignment mark measuring unit 15A, and is connected to the projection exposure device 10 so as to be capable of data communication with each other. The substrate W is composed of a FO-WLP substrate, and a large number (for example, 10,000) of silicon chips are arranged in a matrix on the carrier substrate. The substrate is not limited to the FO-WLP substrate, and may be an ordinary wafer substrate, a printed wiring board, or the like. The chips do not have to be the same type, and a plurality of types of chips may be arranged. Further, it may be a substrate in which a large number of circuit patterns (referred to as units) in a region smaller than the substrate are arranged in a matrix, and the substrate may be aligned and exposed with reference to the unit. There may be one or more chips inside the unit. The measuring device 15 measures the position of the alignment mark provided on each chip at the stage before patterning by the exposure device 10.

The measuring device 15 is composed of a board stage on which the board W is placed, a camera that captures an alignment mark, a scanning mechanism that moves the board relative to the camera, a measuring unit that measures the relative movement amount of the board, and a camera. It is equipped with an image processing unit that measures the position of the alignment mark from the image obtained by imaging, a data management unit that records the measured position information of the alignment mark as a file, and a controller that controls them (here, anyway). Not shown).

The measuring device 15 transmits a file regarding the position information of the alignment mark of each chip to the data server 60. The data server 60 records and manages a file in association with the ID of the board W to be measured.

The projection exposure apparatus 10 performs alignment when transferring (exposing) a mask pattern to each layer. That is, the alignment error, which is the arrangement error of the shot region, is detected, and the shot region of the substrate W and the projection area of the mask pattern are aligned in advance.

In the present embodiment, the projection exposure device 10 calculates the amount of misalignment peculiar to each chip from the position of the alignment mark of each chip measured by the measuring device 15, and the misalignment amount and the alignment mark imaging unit 36 determine the amount of misalignment. The exposure position of each chip in the exposure process is obtained by using the position of the GA alignment mark to be measured. The projection exposure apparatus 10 performs alignment exposure by a die-by-die (hereinafter, D / D) method according to the obtained exposure position of each chip. This will be described in detail below.

FIG. 2 is a diagram showing a shot arrangement formed on the substrate W. FIG. 3 is a diagram showing distortion of the shot arrangement due to deformation of the substrate W and the like.

As shown in FIG. 2, the substrate W is formed with a lower layer pattern in which chip CPs are arranged in a matrix at regular intervals according to a grid defined by an XY coordinate system. Here, each chip CP corresponds to a shot region, and a mask pattern formed on the reticle R is superposed on the chip CP (hereinafter, also referred to as a shot region). Further, an alignment mark AM for alignment is formed at an arbitrary position (center position at the left and right ends in FIG. 2) along the arrangement of the shot region CP. The alignment mark AM for alignment may be provided at a position near the shot region CP (for example, on the scribe line). Further, some of the alignment marks AM for alignment may also be used as the alignment marks for GA.

FIG. 3 shows a state in which the arrangement of the shot region CP is broken due to the deformation of the substrate W. When the substrate W is a wafer, the amount of deformation thereof is not so large, but it is a size that cannot be ignored when compared with the error range allowed by the overlay with the lower layer pattern. Further, when the substrate W is a printed circuit board or an interposer substrate, the deformation of the substrate W becomes even larger. Therefore, the position of each chip CP deviates from the design position.

When the substrate W is a FO-WLP substrate, a random chip arrangement error (called die shift) due to chip mounting accuracy occurs. On the other hand, the substrate W expands and contracts and deforms (collectively referred to as substrate deformation) every time the process is performed. Therefore, the position of the alignment mark AM of each chip CP at the time of exposure is different from the position of the alignment mark AM at the time of measurement by the measuring device 15.

In particular, when patterning is performed on a plurality of layers, the degree of expansion and contraction and deformation of the substrate W changes each time the exposure and the steps before and after the exposure (exposure, etching, heat treatment, etc.) are repeated, and the degree of expansion and contraction and deformation of the substrate W changes, which is measured by the measuring device 15. The positional deviation from the alignment mark AM becomes large.

FIG. 3 is a diagram showing the shot arrangement error divided into components. The chip arrangement error component (defined as the die shift amount) due to die shift has no relation or rule between the chip CPs. This relevance and non-regular arrangement error is defined as the amount of intrinsic misalignment. The amount of intrinsic misalignment can be regarded as a non-linear (non-linear) error component regardless of the deformation and expansion / contraction of the entire substrate W. On the other hand, the chip arrangement error component due to deformation, expansion and contraction of the substrate W is an arrangement error that occurs with a common rule among the chip CPs according to the degree of deformation of the substrate W as a whole, and is therefore regarded as a linear error component. be able to.

Therefore, the linear arrangement error amount is removed from the chip arrangement error amount between the position of the alignment mark AM of each chip CP and the design position first measured by the measuring device 15, and the unique position of each chip is obtained. Extract the amount of deviation. Then, the exposure apparatus 10 obtains the amount of linear chip arrangement error obtained from the GA alignment mark, and estimates the exposure position of each chip during the exposure process by combining the amount of the inherent position deviation of each chip.

FIG. 4 is a diagram showing a flowchart of a chip specific arrangement error calculation process executed by the measuring device 15.

When the position of the alignment mark provided on each chip of the substrate W is measured (S101), the difference between the position information of the alignment mark on each chip and the design position information (X, Y, θ).
Is calculated (S102). Then, a linear component is extracted from the obtained chip arrangement error amount using the least squares method or the like (S103), and by removing this, the X, Y, and θ components that are the amount of the inherent position deviation of each chip are obtained. (S104).

FIG. 5 is a diagram showing an exposure process including alignment performed in the projection exposure apparatus 10.

The position of the GA alignment mark provided on the substrate W (for example, the position of the alignment mark provided at the four corners of the substrate) is measured, and the difference from the design position is divided into an X component, a Y component, and a θ component. Calculate (S201). On the other hand, the data of the amount of unique position deviation of each chip obtained by the measuring device 15 is read from the data server 60 (S202).

The amount of misalignment of the GA alignment mark measured by the exposure apparatus 10 is the amount of linear misalignment (that is, the amount of deviation of X, Y, θ when the substrate is placed on the exposure apparatus, the expansion and contraction of the substrate, and the like. Since it can be regarded as the total amount of deformation such as the change in the degree of orthogonality), the amount of deformation of the entire substrate W in the exposure process can be calculated from this. Then, by the GA alignment method, the amount of misalignment of the X, Y, and θ components at the exposure position of each chip obtained from the amount of deformation of the entire substrate W can be calculated (obtained from the amount of deformation of the entire substrate W). The amount of misalignment at the exposure position of each chip is defined as the amount of linear misalignment). However, it is assumed that the deformation and expansion / contraction of the substrate W occur substantially uniformly over the entire substrate or with respect to the exposure target region.

Then, the exposure position of each chip is calculated based on the linear misalignment amount of each chip and the natural misalignment amount (S203). That is, the exposure position (exposure map) of each chip during the exposure process is calculated by adding the linear position shift amount and the natural position shift amount to the design exposure position. Although the projection exposure apparatus 10 does not measure the alignment mark of each chip, the exposure position of each chip is estimated by this calculation, and the exposure is performed by the die-by-die method (S204).

As described above, according to the present embodiment, the positions of the alignment marks of the chips matrix-arranged on the substrate W are measured in advance by the measuring device 15 independent of the projection exposure device 10, and the amount of unique misalignment unique to each chip is measured. Ask for. Then, the projection exposure apparatus 10 measures the GA alignment mark and calculates the amount of misalignment of each chip having linearity. Then, based on the amount of natural misalignment and the amount of linear misalignment, the exposure position of each chip is calculated and exposed in the situation where the substrate W is mounted on the exposure apparatus 10.

In this way, the linear misalignment amount that changes with the process is calculated during the exposure process, while the natural misalignment amount that occurs when the first chip is mounted and does not change even after the process is calculated before using the exposure apparatus. , Appropriate alignment can be performed. In particular, even when the repeated patterns are superimposed on the substrate W, appropriate alignment can be performed. This can also be applied to a substrate in which elements other than chips are arranged two-dimensionally.

Instead of the measuring device 15 calculating the chip-specific misalignment amount and outputting it to the projection exposure device 10, the data server 60 or the projection exposure device 10 may calculate the chip-specific misalignment amount. Further, the GA alignment mark is not limited to the one formed at a specific position with respect to the substrate W, and a predetermined alignment mark may be selected to obtain a linear misalignment amount. It is also possible to apply it to a maskless exposure apparatus instead of the projection exposure apparatus. In this case, the exposure data may be corrected based on the obtained position of the alignment mark specific position deviation amount of each chip.

Further, when exposing a predetermined layer of the substrate W, the measuring device 15 calculates the amount of misalignment peculiar to the chip and outputs it to the projection exposure device 10, and when exposing a layer above that layer, Alignment may be performed using the amount of misalignment peculiar to the chip already calculated.

10 Projection exposure device 40 Stage 42 Stage drive unit 50 Control unit W board AM alignment mark R reticle

Claims (5)

An exposure device that can expose a plurality of chips on a substrate and can communicate with an independent measuring device that measures the position information of an alignment mark formed for each chip.
A measuring unit for measuring the position of the GA (global alignment) alignment mark provided on the substrate is provided.
An exposure apparatus characterized in that alignment is performed based on the amount of natural misalignment of each chip obtained from the alignment mark position information of each chip and the position information of the GA alignment mark measured by the measuring unit. The exposure apparatus according to claim 1, further comprising a calculation unit for obtaining a die shift amount obtained by excluding the deformation amount related to the entire substrate from the alignment mark position information of each chip as a natural position deviation amount. The exposure apparatus according to claim 2, wherein the calculation unit obtains a die shift amount by excluding a deformation amount of a linear component. A measuring device capable of communicating with an exposure device capable of exposing a plurality of chips on a substrate.
Equipped with an alignment mark measuring unit that measures the position information of the alignment mark formed for each chip.
A measuring device characterized in that a unique position shift amount of each chip obtained from the alignment mark position information of each chip is obtained and data of the unique position shift amount is transmitted to the exposure apparatus. The alignment mark position of each chip provided on the substrate in which a plurality of chips are arranged two-dimensionally is measured by a measuring device independent of the exposure device that measures the position of the alignment mark.
The position of the GA (global alignment) alignment mark provided on the substrate is measured by the measuring unit provided in the exposure apparatus.
Alignment is performed based on the amount of natural misalignment of each chip obtained from the alignment mark position information of each chip by the measuring device or the exposure device and the position information of the GA alignment mark measured by the measuring unit. An alignment method characterized by.

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