JP2020115594A - Manufacturing method of wiring board - Google Patents

Abstract

To provide a manufacturing method of a wiring board capable of improving connection reliability and yield.SOLUTION: A manufacturing method of a wiring board includes a step of stacking a first metal layer and a second metal layer having a roughened upper surface or composed of particles in this order on a supporting substrate, and preparing the second metal layer provided with a support medium that can selectively perform etching with respect to the first metal layer, a step of forming a third metal layer selectively on the upper surface of the second metal layer, a step of dissolving the second metal layer not covered with the third metal layer while roughening the third metal layer with an etchant and forming a first wiring layer in which the third metal layer is laminated on the second metal layer, a step of forming an insulating layer that covers the first wiring layer on the first metal layer, and a step of removing the supporting substrate and further removing the first metal layer by etching.SELECTED DRAWING: Figure 3

Description

The present invention relates to a method of manufacturing a wiring board.

A support is known in which a thick foil made of copper, a release layer, and a thin foil made of copper are sequentially laminated on a support substrate. When manufacturing a wiring board using this support, first, a resist layer having openings is formed on a thin foil. Then, a wiring layer made of copper is formed on the thin foil exposed in the opening, the resist layer is removed, and then an insulating layer covering the wiring layer is formed on the thin foil. If necessary, after further laminating a wiring layer and an insulating layer on the insulating layer in sequence, the supporting substrate and the thick foil are mechanically removed via the release layer, and the thin foil is removed by etching (for example, Patent Document 1). 1).

Further, a support is known in which a thick foil made of copper, a peeling layer, and a thin foil made of a metal that can be selectively etched with respect to a wiring layer are sequentially laminated on a support substrate. When manufacturing a wiring board using this support, a resist layer having openings is formed on a thin foil. Then, a wiring layer is formed on the thin foil exposed in the opening, the resist layer is removed, and then an insulating layer for covering the wiring layer is formed on the thin foil. If necessary, after further laminating a wiring layer and an insulating layer on the insulating layer in sequence, the supporting substrate and the thick foil are mechanically removed via the release layer, and the thin foil is removed by etching (for example, Patent Document 1). 2).

Patent No. 4273895 JP, 2002-76578, A

However, in the method of manufacturing a wiring board described in Patent Document 1, since the thin foil and the wiring layer are soluble in the same etching solution, when the thin foil is removed by etching, the edge of the wiring layer is overetched. The portions are also etched, and the surface of the wiring layer is recessed from the surface of the insulating layer. If the surface of the wiring layer is dented from the surface of the insulating layer, when connecting the wiring layer and the semiconductor chip, etc. with solder, it is difficult for the solder to enter the dent, so the connection reliability between the wiring board and the semiconductor chip, etc. is reduced. May occur.

In the wiring board manufacturing method described in Patent Document 2, since the thin foil can be selectively etched with respect to the wiring layer, there is a problem that the thickness of the wiring layer decreases due to overetching in the step of removing the thin foil. Does not happen. However, for example, when the thin foil is nickel, the surface of nickel is likely to be oxidized and a passivation film is easily formed, so that the adhesion between nickel and the wiring layer may not be obtained, and the interface between the nickel and the wiring layer may peel off. is there. As a result, the yield of the wiring board decreases.

The present invention has been made in view of the above points, and an object of the present invention is to provide a method for manufacturing a wiring board that enables improvement in connection reliability and yield.

According to the method for manufacturing a wiring board of the present invention, a first metal layer and a second metal layer having a roughened upper surface or particles are sequentially laminated on a support substrate, and the second metal layer is A step of preparing a support capable of being selectively etched with respect to the first metal layer, a step of selectively forming a third metal layer on the upper surface of the second metal layer, and an etching solution. The third metal layer was roughened and at the same time the second metal layer not covered with the third metal layer was dissolved, and the third metal layer was laminated on the second metal layer. Forming a first wiring layer, forming an insulating layer covering the first wiring layer on the first metal layer, removing the support substrate, and further forming the first metal Removing the layer by etching.

According to the disclosed technology, it is possible to provide a method for manufacturing a wiring board that can improve connection reliability and yield.

It is a figure which illustrates the wiring board which concerns on 1st Embodiment. FIG. 6 is a diagram (part 1) illustrating the manufacturing process of the wiring board according to the first embodiment. FIG. 6 is a diagram (part 2) illustrating the manufacturing process of the wiring board according to the first embodiment. It is a figure which illustrates the wiring board concerning a 2nd embodiment. It is a figure (the 1) which illustrates the manufacturing process of the wiring board concerning a 2nd embodiment. It is a figure (the 2) which illustrates the manufacturing process of the wiring board concerning a 2nd embodiment. It is a figure (the 3) which illustrates the manufacturing process of the wiring board concerning a 2nd embodiment. It is sectional drawing which shows the modification of a support body.

Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings. In addition, in each drawing, the same components may be denoted by the same reference numerals, and redundant description may be omitted.

<First Embodiment>
[Structure of Wiring Board According to First Embodiment]
First, the structure of the wiring board according to the first embodiment will be described. FIG. 1 is a cross-sectional view illustrating a wiring board according to the first embodiment.

Referring to FIG. 1, wiring board 1 is a coreless wiring board having one wiring layer 10 and one insulating layer 60. The wiring layer 10 has a laminated structure in which the second layer 12 is laminated on the first layer 11.

In the wiring board 1, the wiring layer 10 is embedded in the lower surface side of the insulating layer 60. The lower surface of the wiring layer 10 is exposed from the lower surface of the insulating layer 60, and a part of the upper surface and the side surface of the wiring layer 10 is covered with the insulating layer 60. The upper surface of the wiring layer 10 is selectively exposed in the opening 60x of the insulating layer 60. The lower surface of the wiring layer 10 exposed from the lower surface of the insulating layer 60 has, for example, a circular planar shape, and can be used as a pad for connecting to a semiconductor chip. The upper surface of the wiring layer 10 that is selectively exposed in the opening 60x of the insulating layer 60 has, for example, a circular planar shape, and can be used as a pad for connecting to another wiring board or the like.

The wiring layer 10 may have a wiring pattern in which the lower surface is exposed from the lower surface of the insulating layer 60 and the upper and side surfaces are covered with the insulating layer 60.

In the present embodiment, for convenience, in the wiring substrate 1, the side where the opening 60x of the insulating layer 60 is opened is one side or the upper side, and the first layer 11 of the wiring layer 10 is exposed from the insulating layer 60. The lower side or the other side. Further, the surface of the insulating layer 60 on each side where the opening 60x is opened is one surface or the upper surface, and the surface on the side where the first layer 11 is exposed from the insulating layer 60 is the other surface or the lower surface. However, the wiring board 1 can be used upside down, or can be arranged at an arbitrary angle. Further, the plan view means that the object is viewed from the normal direction of one surface of the insulating layer 60, and the planar shape is the shape of the object viewed from the normal direction of one surface of the insulating layer 60. Shall be pointed out.

The first layer 11 forming the wiring layer 10 can be formed using, for example, copper (Cu) or the like. The thickness of the first layer 11 can be, for example, about 0.01 to 1.0 μm. The upper surface of the first layer 11 is a roughened surface. The surface roughness of the upper surface of the first layer 11 may be, for example, Ra 0.3 to 0.6 μm. The lower surface of the first layer 11 can be flush with the lower surface of the insulating layer 60, for example. Unlike the upper surface, the lower surface of the first layer 11 is not a roughened surface but a flat surface.

The second layer 12 forming the wiring layer 10 can be formed using, for example, copper (Cu) or the like. The thickness of the second layer 12 may be, for example, about 30 μm. The upper surface of the second layer 12 is selectively exposed in the opening 60x of the insulating layer 60. The upper surface and the side surface of the second layer 12 are roughened surfaces. The surface roughness of the upper surface and the side surface of the second layer 12 may be, for example, Ra 0.3 to 0.6 μm.

In this way, by making the upper surface of the first layer 11 a roughened surface, the adhesion with the lower surface of the second layer 12 can be improved. As a result, it is possible to prevent the first layer 11 and the second layer 12 from peeling off. Further, by making the upper surface and the side surface of the second layer 12 (the upper surface and the side surface of the wiring layer 10) roughened, the adhesion with the insulating layer 60 can be improved. Further, since the adhesion with the resist layer 900 described later is improved, highly reliable patterning is possible and fine wiring can be achieved.

The insulating layer 60 is a layer on which the wiring layer 10 is formed and also functions as a solder resist layer. As a material of the insulating layer 60, for example, a photosensitive epoxy-based insulating resin, an acrylic-based insulating resin, or the like can be used. However, as the material of the insulating layer 60, for example, a non-photosensitive (thermosetting resin) epoxy-based insulating resin or polyimide-based insulating resin may be used. The insulating layer 60 may have a thickness of, for example, about 10 to 50 μm. The thickness of the insulating layer 60 is the distance from the upper surface of the second layer 12 to the upper surface of the insulating layer 60 (the same applies to other insulating layers). The insulating layer 60 has an opening 60x that opens to the upper surface side, and a part of the upper surface of the second layer 12 of the wiring layer 10 is exposed in the opening 60x.

If necessary, an external connection terminal such as a solder ball may be provided on the upper surface of the second layer 12 exposed in the opening 60x. If necessary, a metal layer may be formed on the lower surface of the first layer 11 and the upper surface of the second layer 12 exposed in the opening 60x. Examples of the metal layer include an Au layer, a Ni/Au layer (a metal layer in which a Ni layer and an Au layer are stacked in this order), and a Ni/Pd/Au layer (a Ni layer, a Pd layer, and an Au layer in this order). Examples of the metal layer include a laminated metal layer. Further, instead of forming the metal layer, an antioxidant treatment such as an OSP (Organic Solderability Preservative) treatment may be performed. The surface treatment layer formed by the OSP treatment is an organic coating made of an azole compound, an imidazole compound, or the like.

[Method for Manufacturing Wiring Board According to First Embodiment]
Next, a method of manufacturing the wiring board according to the first embodiment will be described. 2 and 3 are views exemplifying the manufacturing steps of the wiring board according to the first embodiment. In this embodiment mode, an example of a process in which a plurality of wiring board portions are formed over a support, the support is removed, and then the pieces are divided into individual wiring boards is shown. However, one wiring board is provided on each support. May be prepared and the support may be removed.

First, in the step shown in FIG. 2A, a support 100 in which a metal layer 130, a metal layer 120, and a metal layer 110 are sequentially stacked on a support substrate 140 is prepared.

As the support substrate 140, for example, a cured prepreg can be used. The prepreg is, for example, a woven or non-woven fabric (not shown) such as glass fiber or aramid fiber impregnated with an epoxy insulating resin. The thickness of the support substrate 140 can be, for example, about 18 to 100 μm.

The metal layer 130 is, for example, a metal foil (carrier foil) made of copper and having a thickness of about 10 to 50 μm. On the metal layer 130, a metal layer 120 made of nickel or the like and having a thickness of about 1.5 to 5 μm is releasably attached via a release layer (not shown). A metal layer 110 made of copper or the like and having a thickness of about 0.01 to 1.0 μm is laminated on the metal layer 120. The upper surface of the metal layer 110 is a roughened surface and has a larger surface roughness than the lower surface. The roughened surface of the metal layer 110 may be formed by adjusting the composition of the plating solution in the electrolytic plating method, or may be formed by etching. The surface roughness of the upper surface of the metal layer 110 may be, for example, Ra 0.3 to 0.6 μm. Note that the combination of the metal layer 110 and the metal layer 120 is not limited to copper and nickel, and metals that can be selectively etched with each other can be used.

Next, in a step shown in FIG. 2B, a resist layer 900 is formed on the upper surface of the metal layer 110 of the support 100. Specifically, for example, a dry film resist made of a photosensitive resin is laminated as the resist layer 900 on the upper surface of the metal layer 110. Since the upper surface of the metal layer 110 is a roughened surface, the adhesion with the resist layer 900 can be improved.

Next, in a step shown in FIG. 2C, a resist layer 900 made of a dry film resist or the like is patterned by exposure and development, and an upper surface (roughened surface) of the metal layer 110 is selected in a portion where the wiring layer 10 is formed. An opening 900x that is exposed physically is formed.

Next, in the step shown in FIG. 2D, the upper surface (roughened surface) of the metal layer 110 exposed in the opening 900x of the resist layer 900 is formed by electrolytic plating using the metal layer 110 as a plating power supply layer. The second layer 12 is selectively formed. The lower surface of the second layer 12 is in contact with the upper surface of the metal layer 110, and the upper surface is exposed in the opening 900x. By forming a metal layer soluble in the same etching solution as the metal layer 110 as the second layer 12, the surfaces of the second layer 12 and the metal layer 110 are simultaneously roughened in the step shown in FIG. 3B. be able to. The second layer 12 and the metal layer 110 can be, for example, copper layers.

Next, in the step shown in FIG. 3A, the resist layer 900 shown in FIG. 2D is peeled off. The resist layer 900 can be stripped using, for example, a stripping solution containing sodium hydroxide or the like.

Next, in a step shown in FIG. 3B, the second layer 12 is roughened by an etching solution and, at the same time, the metal layer 110 not covered with the second layer 12 is dissolved and removed. As a result, the rest of the metal layer 110 becomes the first layer 11, and the wiring layer 10 in which the second layer 12 is laminated on the first layer 11 is formed. For example, when the first layer 11 and the second layer 12 are copper layers, an etchant such as hydrogen peroxide/sulfuric acid aqueous solution, sodium persulfate aqueous solution or ammonium persulfate aqueous solution can be used. At this time, when the metal layer 120 is made of nickel, the metal layer 120 serves as an etching stop layer, so that the metal layer 130 is not etched.

At the same time that the metal layer 110 not covered by the second layer 12 is removed by etching, the upper surface and the side surface of the second layer 12 are roughened (that is, the upper surface and the side surface of the wiring layer 10 are roughened). The surface roughness of the upper and side surfaces of the wiring layer 10 is preferably Ra 0.3 to 0.6 μm, and the etching amount in this case is 0.35 to 1.5 μm.

That is, in the step shown in FIG. 2A, the metal layer 110 is formed to a thickness (for example, about 0.01 to 1.0 μm) that can be removed with an etching amount of 0.35 to 1.5 μm. Thus, in the step shown in FIG. 3B, the upper surface and the side surface of the wiring layer 10 are etched aiming at Ra of 0.3 to 0.6 μm, and at the same time, the metal layer 110 not covered by the second layer 12 is etched. Can be removed.

Next, in the step shown in FIG. 3C, the insulating layer 60 that covers the wiring layer 10 is formed on the upper surface of the metal layer 120. The insulating layer 60 can be formed by applying a liquid or paste insulating resin so as to cover the wiring layer 10 by a screen printing method, a roll coating method, a spin coating method, or the like. Alternatively, a film-shaped insulating resin may be laminated so as to cover the wiring layer 10. As the insulating resin, for example, a photosensitive or non-photosensitive epoxy insulating resin, acrylic insulating resin, polyimide insulating resin, or the like can be used.

Then, the applied or laminated insulating resin is exposed and developed to form an opening 60x that selectively exposes the upper surface of the wiring layer 10 in the insulating layer 60 (photolithography method). When a non-photosensitive epoxy-based insulating resin, polyimide-based insulating resin, or the like is used as the material of the insulating layer 60, the opening 60x may be formed by laser processing, blasting, or the like. When the opening 60x is formed by the laser processing method, it is preferable to perform desmear treatment to remove the resin residue of the insulating layer 60 attached to the upper surface of the wiring layer 10 exposed in the opening 60x.

Next, in the step shown in FIG. 3D, a part of the support 100 is removed from the structure shown in FIG. Specifically, a mechanical force is applied to the support 100 to peel off the interface between the metal layer 120 and the metal layer 130. As described above, since the metal layer 120 is releasably attached to the metal layer 130 via the release layer (not shown), the interface between the metal layer 120 and the metal layer 130 can be easily formed. It can be peeled off. As a result, only the metal layer 120 remains on the insulating layer 60 side, and the other members (the metal layer 130 and the support substrate 140) forming the support 100 are removed.

Next, in the step shown in FIG. 3E, the metal layer 120 (see FIG. 3D) is removed. When the metal layer 120 is made of nickel (Ni) and the first layer 11 of the wiring layer 10 is made of copper, an etching solution that removes nickel (Ni) without removing copper is selected. For example, an etching solution such as hydrogen peroxide/nitric acid aqueous solution can be used. Thereby, only the metal layer 120 can be etched without etching the first layer 11 of the wiring layer 10. As a result, the lower surface of the first layer 11 of the wiring layer 10 is exposed on the lower surface of the insulating layer 60. The lower surface of the first layer 11 of the wiring layer 10 can be flush with the lower surface of the insulating layer 60, for example.

Note that when a residue of the metal layer 110 exists in a region of the lower surface of the insulating layer 60 other than where the lower surface of the first layer 11 is exposed, it can be removed by etching. At this time, since the amount of the residue is very small, there is almost no possibility that the lower surface of the first layer 11 is recessed by etching. Of course, the metal layer 110 not covered with the second layer 12 may be completely removed in the step of FIG.

If necessary, on the lower surface of the first layer 11 of the wiring layer 10 exposed on the lower surface of the insulating layer 60 or on the upper surface of the second layer 12 of the wiring layer 10 exposed in the opening 60x, for example, by electroless plating or the like. A metal layer may be formed. Examples of the metal layer are as described above. Further, the lower surface of the first layer 11 of the wiring layer 10 exposed on the lower surface of the insulating layer 60 and the upper surface of the second layer 12 of the wiring layer 10 exposed in the opening 60x are subjected to an antioxidant treatment such as an OSP treatment. May be.

After the step shown in FIG. 3E, the plurality of wiring boards 1 (see FIG. 1) are completed by cutting the structure shown in FIG. 3E at a cutting position C with a slicer or the like to divide it into individual pieces. To do. If necessary, an external connection terminal such as a solder ball may be provided on the upper surface of the second layer 12 of the wiring layer 10 exposed in the opening 60x.

As described above, according to the method of manufacturing the wiring board according to the first embodiment, the metal layer 120 and the metal layer 110 that can be selectively etched with respect to the metal layer 120 are sequentially stacked on the support substrate 140. Then, the support 100 in which the upper surface of the metal layer 110 is roughened is used. Then, the second layer 12 is selectively formed on the roughened surface of the metal layer 110, the second layer 12 is roughened by an etching solution, and at the same time, the metal layer 110 not covered by the second layer 12 is dissolved and removed. Then, the wiring layer 10 in which the second layer 12 is laminated on the first layer 11 is formed.

Accordingly, unlike the conventional method, the step of etching the metal layer 110 after removing the support substrate 140 and the metal layers 120 and 130 is unnecessary, so that the lower surface of the wiring layer 10 is recessed from the lower surface of the insulating layer 60. There is no. Therefore, when connecting the wiring layer 10 and the semiconductor chip or the like with solder, there is no problem that the solder is unlikely to enter the depression, so that the connection reliability between the wiring board 1 and the semiconductor chip or the like can be improved.

Further, in the conventional method, it is necessary to increase the original thickness of the wiring layer in consideration of the decrease in the thickness of the wiring layer due to the depression of the lower surface of the wiring layer from the lower surface of the insulating layer. In this case, the thickness of the resist layer used when selectively forming the wiring layer becomes thicker, which makes it difficult to increase the density (fine patterning) of the wiring layer. According to the method of manufacturing the wiring board according to the first embodiment, the thickness of the resist layer can be made smaller than that in the conventional method, so that the wiring layer can be made denser (fine patterning).

Further, according to the method of manufacturing the wiring board in the first embodiment, the metal layer 110 is formed on the metal layer 120 serving as an etching stop layer, and different materials are used for the metal layer 120 and the metal layer 110. You can choose. Therefore, even when nickel is selected as the material of the metal layer 120 serving as the etching stop layer, since the surface of nickel is covered with the metal layer 110, the formation of the passivation film due to the oxidation of the surface is suppressed. .. Further, by selecting copper or the like, which is hard to form a passivation film, as the material of the metal layer 110, it is possible to avoid a decrease in adhesion between the metal layer 110 and the second layer 12 due to the passivation film. As a result, the interface between the metal layer 110 and the second layer 12 is not separated, and the yield of the wiring board 1 can be improved.

In addition, in the method for manufacturing a wiring board according to the first embodiment, it is preferable that the second layer 12 is a metal layer that is soluble in the same etching solution as the metal layer 110. Accordingly, the metal layer 110 not covered with the second layer 12 can be removed, and at the same time, the side surface of the metal layer 110 covered with the second layer 12 and the upper surface and the side surface of the second layer 12 can be roughened. .. That is, since the unnecessary metal layer 110 can be removed and the roughening for improving the adhesion to the insulating layer 60 can be performed at the same time, the manufacturing process of the wiring board 1 can be simplified and the cost can be reduced. Become.

<Second Embodiment>
The second embodiment shows an example of a wiring board having a three-layer structure. In addition, in the second embodiment, description of the same components as those in the above-described embodiments may be omitted.

[Structure of Wiring Board According to Second Embodiment]
First, the structure of the wiring board according to the second embodiment will be described. FIG. 4 is a cross-sectional view illustrating a wiring board according to the second embodiment. Referring to FIG. 4, the wiring board 2 according to the second embodiment is different from the wiring board 1 in that an insulating layer 20, a wiring layer 30, an insulating layer 40, a wiring layer 50, and an insulating layer 70 are added. (See FIG. 1).

The insulating layer 20 is formed so as to cover the upper surface and the side surface of the wiring layer 10. As a material of the insulating layer 20, for example, a non-photosensitive (thermosetting resin) epoxy insulating resin, a polyimide insulating resin, or the like can be used. However, as the material of the insulating layer 60, for example, a photosensitive epoxy-based insulating resin or acrylic-based insulating resin may be used. The insulating layer 20 may contain a filler such as silica (SiO ₂ ). The insulating layer 20 can have a thickness of, for example, about 10 to 50 μm. The insulating layer 20 has a via hole 20x that opens to the upper surface side, and a part of the upper surface of the second layer 12 of the wiring layer 10 is exposed in the via hole 20x.

The wiring layer 30 is formed on the insulating layer 20. The wiring layer 30 is configured to include a via wiring filled in a via hole 20x penetrating the insulating layer 20 and exposing the upper surface of the wiring layer 10, and a wiring pattern formed on the upper surface of the insulating layer 20. The via hole 20x is an inverted frustoconical recess in which the diameter of the opening formed on the insulating layer 40 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 10. The wiring layer 30 is electrically connected to the wiring layer 10 exposed at the bottom of the via hole 20x.

The wiring layer 30 includes a first layer 31, a second layer 32, and a third layer 33. The first layer 31 is formed around the via hole 20x on the upper surface of the insulating layer 20. The second layer 32 is formed on the first layer 31, extends from the first layer 31 and is formed along the inner wall of the via hole 20x, and covers the upper surface of the wiring layer 10 exposed in the via hole 20x. ing. The third layer 33 is formed on the second layer 32 and fills the inside of the via hole 20x in which the second layer 32 is formed on the inner wall.

As a material for the first layer 31, the second layer 32, and the third layer 33, for example, copper or the like can be used. The thickness of the first layer 31 can be, for example, about 0.5 to 5 μm. The thickness of the second layer 32 can be, for example, about 0.3 to 1.5 μm. The thickness of the third layer 33 can be, for example, about 4 to 30 μm.

The side surface of the first layer 31 is a roughened surface. The side surface of the second layer 32 is a roughened surface. The upper surface and the side surface of the third layer 33 are roughened surfaces. That is, the upper surface and the side surface of the wiring layer 30 are roughened surfaces. The surface roughness of the side surface of the first layer 31, the side surface of the second layer 32, and the top surface and the side surface of the third layer 33 can be, for example, Ra 0.3 to 0.6 μm.

The insulating layer 40 is formed so as to cover the upper surface and the side surface of the wiring layer 30. The material and thickness of the insulating layer 40 can be similar to those of the insulating layer 20, for example. The insulating layer 40 has a via hole 40x opening to the upper surface side, and a part of the upper surface of the third layer 33 of the wiring layer 30 is exposed in the via hole 40x.

The wiring layer 50 is formed on the insulating layer 40. The wiring layer 50 is configured to include a via wiring filled in a via hole 40x penetrating the insulating layer 40 and exposing the upper surface of the wiring layer 30, and a wiring pattern formed on the upper surface of the insulating layer 40. The via hole 40x is an inverted frusto-conical recess in which the diameter of the opening opened on the insulating layer 60 side is larger than the diameter of the bottom surface of the opening formed by the upper surface of the wiring layer 30. The wiring layer 50 is electrically connected to the wiring layer 30 exposed at the bottom of the via hole 40x.

The wiring layer 50 includes a first layer 51, a second layer 52, and a third layer 53. The structures, materials, and the like of the first layer 51, the second layer 52, and the third layer 53 of the wiring layer 50 are similar to those of the first layer 31, the second layer 32, and the third layer 33 of the wiring layer 30. You can

The side surface of the first layer 51 is a roughened surface. The side surface of the second layer 52 is a roughened surface. The upper surface and the side surface of the third layer 53 are roughened surfaces. That is, the upper surface and the side surface of the wiring layer 50 are roughened surfaces. The surface roughness of the side surface of the first layer 51, the side surface of the second layer 52, and the upper surface and the side surface of the third layer 53 can be, for example, Ra 0.3 to 0.6 μm.

The insulating layer 60 is formed so as to cover the upper surface and the side surface of the wiring layer 50. A part of the upper surface of the third layer 53 of the wiring layer 50 is exposed in the opening 60x of the insulating layer 60. The upper surface of the wiring layer 50 that is selectively exposed in the opening 60x of the insulating layer 60 has, for example, a circular planar shape, and can be used as a pad for connecting to another wiring board or the like.

The insulating layer 70 is formed on the lower surface of the insulating layer 20 so as to cover the wiring layer 10, and functions as a solder resist layer. The insulating layer 70 has an opening 70x, and the opening 70x selectively exposes the wiring layer 10. The lower surface of the wiring layer 10 exposed in the opening 70x has, for example, a circular planar shape, and can be used as a pad for connecting to a semiconductor chip. The material and thickness of the insulating layer 70 can be similar to those of the insulating layer 60, for example.

[Method of Manufacturing Wiring Board According to Second Embodiment]
Next, a method of manufacturing the wiring board according to the second embodiment will be described. 5 to 7 are views exemplifying the manufacturing steps of the wiring board according to the second embodiment. In this embodiment mode, an example of a process in which a plurality of wiring board portions are formed over a support, the support is removed, and then the pieces are divided into individual wiring boards is shown. However, one wiring board is provided on each support. May be prepared and the support may be removed.

First, the steps shown in FIGS. 2A to 3B of the first embodiment are executed. Then, in the step shown in FIG. 5A, a metal foil 310 such as a copper foil is laminated on the insulating layer 20. Specifically, for example, a prepreg with a metal foil in which the metal foil 310 is bonded to one surface of the prepreg is prepared. Then, a prepreg with a metal foil is laminated on the upper surface of the metal layer 120 so that the prepreg covers the wiring layer 10, and is press-molded by a mold while being heat-treated. As a result, the prepreg is cured and the insulating layer 20 having the metal foil 310 laminated on the upper surface is formed. In addition to the prepreg, a photosensitive/non-photosensitive resin containing no glass cloth may be used.

Next, in a step shown in FIG. 5B, a via hole 20x which penetrates the metal foil 310 and the insulating layer 20 and exposes the upper surface of the wiring layer 10 is formed. The via hole 20x can be formed by, for example, a laser processing method in which the metal foil 310 and the insulating layer 20 are irradiated with laser light. When the via hole 20x is formed by the laser processing method, it is preferable to perform desmear processing to remove the resin residue of the insulating layer 20 attached to the upper surface of the wiring layer 10 exposed in the via hole 20x.

Next, in the step shown in FIG. 5C to the step shown in FIG. 6B, the wiring layer 30 is formed. The wiring layer 30 can be formed by, for example, a semi-additive method. In order to form the wiring layer 30 using the semi-additive method, first, as shown in FIG. 5C, a metal layer 320 made of copper or the like is formed as a seed layer by electroless plating or sputtering. .. The metal layer 320 is formed so as to continuously cover the entire upper surface of the metal foil 310, the inner wall surface of the via hole 20x, and the upper surface of the wiring layer 10 exposed in the via hole 20x. The thickness of the metal layer 320 may be, for example, about 0.3 to 1.5 μm.

It should be noted that only the prepreg which becomes the insulating layer 20 is laminated without laminating the metal foil 310 in the step shown in FIG. 5A, and the metal layer 320 is directly formed on the insulating layer 20 in the step shown in FIG. 5C. You may. However, when a prepreg with a metal foil is used, the adhesion between the insulating layer 20 and the metal foil 310 can be increased. Therefore, when the metal layer 320 is formed on the metal foil 310, as a result, the adhesion between the metal layer 320 and the insulating layer 20 is increased. It is preferable in that the property can be improved.

Next, as shown in FIG. 5D, a resist layer 910 (dry film resist or the like) having an opening 910x corresponding to the wiring layer 30 is formed on the metal layer 320. Then, as shown in FIG. 6A, copper or the like is deposited in the openings 910x of the resist layer 910 by an electroplating method using the metal layer 320 as a power feeding layer to form a third layer 33 which is an electroplating layer. Are selectively formed.

Next, as shown in FIG. 6B, after removing the resist layer 910, the metal foil 310 and the metal layer 320 which are not covered with the third layer 33 are removed by etching using the third layer 33 as a mask. To do. As a result, the first layer 31 is formed from the metal foil 310, the second layer 32 is formed from the metal layer 320, and the wiring layer 30 including the first layer 31, the second layer 32, and the third layer 33 is formed. Is formed. For example, when the first layer 31 and the second layer 32 are made of copper, an etchant such as hydrogen peroxide/sulfuric acid aqueous solution, sodium persulfate aqueous solution or ammonium persulfate aqueous solution can be used.

The metal foil 310 and the metal layer 320 which are not covered with the third layer 33 are removed by etching, and at the same time, the side surfaces of the first layer 31 and the second layer 32 and the upper surface and the side surface of the third layer 33 are roughened ( That is, the upper surface and the side surface of the wiring layer 30 are roughened). By roughening the upper surface and the side surfaces of the wiring layer 30, the adhesion between the wiring layer 30 and the insulating layer 40 formed in a later step can be improved. The surface roughness of the upper surface and the side surface of the wiring layer 30 is preferably Ra 0.3 to 0.6 μm, and the etching amount in this case is 0.35 to 1.5 μm.

That is, in the process shown in FIGS. 5A and 5C, the total thickness of the metal foil 310 and the metal layer 320 can be removed with an etching amount of 0.35 to 1.5 μm (for example, a thickness of 0). The metal foil 310 and the metal layer 320 are formed to have a thickness of 0.8 μm. As a result, in the step shown in FIG. 6B, the upper surface and the side surface of the wiring layer 30 are etched aiming at Ra of 0.3 to 0.6 μm, and at the same time, the metal foil 310 not covered with the third layer 33. And the metal layer 320 can be removed. Further, the removal of the seed layer and the roughening may be performed in separate steps.

Next, in the step shown in FIG. 6C, the same steps as those in FIGS. 5A to 6B are performed to form the insulating layer 40 and the wiring layer 50. Specifically, an insulating layer 40 that covers the wiring layer 30 is formed on the insulating layer 20, a via hole 40x that exposes the upper surface of the wiring layer 30 is formed in the insulating layer 40, and then the via hole 40x is formed on the insulating layer 40. The wiring layer 50 electrically connected to the wiring layer 30 is formed. The upper surface and the side surface of the wiring layer 50 are roughened similarly to the upper surface and the side surface of the wiring layer 30. By roughening the upper surface and the side surface of the wiring layer 50, the adhesion between the wiring layer 50 and the insulating layer 60 formed in a later step can be improved.

Next, in the step shown in FIG. 7A, similar to the step shown in FIG. 3D, a part of the support 100 is removed from the structure shown in FIG. 6C. Specifically, a mechanical force is applied to the support 100 to peel off the interface between the metal layer 120 and the metal layer 130. As a result, only the metal layer 120 remains on the insulating layer 20 side, and the other members (the metal layer 130 and the support substrate 140) forming the support body 100 are removed.

Next, in the step shown in FIG. 7B, the metal layer 120 (see FIG. 7A) is removed similarly to the step shown in FIG. As a result, the lower surface of the first layer 11 of the wiring layer 10 is exposed on the lower surface of the insulating layer 20. The lower surface of the first layer 11 of the wiring layer 10 can be flush with the lower surface of the insulating layer 20, for example.

Note that when a residue of the metal layer 110 exists in a region of the lower surface of the insulating layer 20 other than the exposed lower surface of the first layer 11, it can be removed by etching. At this time, since the amount of the residue is very small, there is almost no possibility that the lower surface of the first layer 11 is recessed by etching.

Next, in the step shown in FIG. 7C, the insulating layer 60 that covers the wiring layer 50 is formed on the upper surface of the insulating layer 40. Further, the insulating layer 70 that covers the wiring layer 10 is formed on the lower surface of the insulating layer 20. The insulating layers 60 and 70 are layers that function as solder resist layers. Then, an opening 60x that selectively exposes the upper surface of the wiring layer 50 is formed in the insulating layer 60. In addition, an opening 70x that selectively exposes the lower surface of the wiring layer 10 is formed in the insulating layer 70. The insulating layers 60 and 70 and the openings 60x and 70x can be formed, for example, by the same method as that of the insulating layer 60 and the opening 60x in the step shown in FIG.

If necessary, on the lower surface of the first layer 11 of the wiring layer 10 exposed on the lower surface of the insulating layer 20 or on the upper surface of the third layer 53 of the wiring layer 50 exposed in the opening 60x, for example, by electroless plating or the like. A metal layer may be formed. Examples of the metal layer are as described above. Further, the lower surface of the first layer 11 of the wiring layer 10 exposed on the lower surface of the insulating layer 20 and the upper surface of the third layer 53 of the wiring layer 50 exposed in the opening 60x are subjected to an antioxidant treatment such as an OSP treatment. May be.

The insulating layer 60 may be formed after the wiring layer 50 is formed in the step shown in FIG. Further, the insulating layer 70 may be formed as needed.

After the step shown in FIG. 7C, a plurality of wiring boards 2 (see FIG. 4) are completed by cutting the structure shown in FIG. To do. If necessary, an external connection terminal such as a solder ball may be provided on the upper surface of the third layer 53 of the wiring layer 50 exposed in the opening 60x.

In this way, the wiring board 2 having a three-layer structure can be realized. It is also possible to alternately stack a required number of insulating layers and wiring layers on the wiring layer 50 to form a wiring board having a four-layer structure or more. The wiring board 2 has the same effect as that of the first embodiment. Further, with respect to the second and subsequent wiring layers, the removal of the unnecessary metal layer and the roughening of the wiring layer for improving the adhesion with the insulating layer can be performed at the same time, so that the wiring board 2 is manufactured. It is possible to simplify the process and reduce the cost.

<Modification of support>
Here, a modified example of the support is shown. In the modified example of the support, the description of the same components as those in the above-described embodiment may be omitted.

FIG. 8: is sectional drawing which shows the modification of a support body. As shown in FIG. 8A, in the support 100A, the metal layer 150 formed by the sputtering method is laminated between the metal layer 120 and the metal layer 110. As a material of the metal layer 150, for example, copper, nickel, or the like can be used. The metal layer 150 may have a thickness of, for example, about 0.1 μm or less.

For example, when the metal layer 120 is made of nickel foil and the metal layer 110 is made of an electrolytic copper-plated layer, the adhesion between the two may not be ensured. In this case, by disposing the metal layer 150 formed by the sputtering method between them, the adhesion between them can be improved.

As shown in FIG. 8B, in the support 100B, the metal layer 130A is laminated between the support substrate 140 and the metal layer 120, and the lower surface of the metal layer 130A in contact with the support substrate 140 is a roughened surface. There is. The surface roughness of the lower surface of the metal layer 130A can be, for example, Ra 0.3 to 1.0 μm. As described above, by making the surface of the metal layer 130A in contact with the support substrate 140 a roughened surface, the adhesion between the metal layer 130A and the support substrate 140 can be improved. In the support 100B, the metal layer 150 formed by the sputtering method may be laminated between the metal layer 120 and the metal layer 110, similarly to the support 100A.

As shown in FIG. 8C, in the support 100C, a metal layer 110A made of particles is provided on the metal layer 120. The metal layer 110A is composed of primary particles 111 and secondary particles 112 formed from the primary particles 111.

The diameter of the primary particles 111 can be, for example, 10 to 200 nm. More preferably, it can be about 10-40 nm. The diameter φ ₁ of the secondary particles 112 can be set to, for example, about 1 μm or less. More preferably, it can be about 400 nm or less. However, the cross-sectional shapes of the primary particles 111 and the secondary particles 112 are not limited to circular shapes, and may be various shapes such as elliptical shapes and polygonal shapes.

The surface roughness of the upper surface of the metal layer 110A can be Rz≦2.0 μm (ten-point average roughness). The Rz also includes irregularities that follow the surface roughness of the underlying metal layer 120.

The metal layer 110A can be formed by depositing dendrite-like or fine-particle-like copper deposits on the surface of the metal layer 120 by cathodic electrolysis in a copper sulfate solution near the limiting current density, for example. Note that the upper surface of the metal layer 110A may be coated with copper plating or the like in order to prevent the copper deposits from falling off. The surface roughness at that time may follow the surface roughness of the upper surface of the metal layer 110A before being coated by copper plating or the like, or the surface of the copper plating or the like covering the upper surface of the metal layer 110A is newly added. It may be roughened.

Although the preferred embodiments and the like have been described above in detail, the present invention is not limited to the above-described embodiments and the like, and various embodiments and the like described above can be performed without departing from the scope described in the claims. Modifications and substitutions can be added.

For example, in the method of manufacturing the wiring board 1 or the wiring board 2, a support body in which the metal layer 130, the metal layer 120, and the metal layer 110 are sequentially laminated on both surfaces of the support substrate 140 may be used. In this case, it is possible to form a step of forming the respective constituent parts to be wiring boards on both sides of the support and then separating or removing unnecessary parts of the support.

Further, the release layer does not necessarily have to be provided in the support. For example, the support may have a structure in which the metal layer 120 and the metal layer 130 are bonded to each other only at the outer edge portion without providing a peeling layer. In this structure, except for the outer edge portion, the metal layer 120 and the metal layer 130 are only in contact with each other. In this case, in the step shown in FIG. 3D, the outer edge portion of the structure shown in FIG. 3C where the metal layer 120 and the metal layer 130 are adhered is cut and removed. The metal layer 120 and the support substrate 140 can be easily separated.

In addition, when the insulating layer 70 is formed, the first layer 11 may be removed by etching in the step of roughening the surface of the wiring layer 10, but in that case as well, the amount of depression is small and electronic parts are mounted. Has little effect on sex.

1, 2 Wiring board 10 Wiring layer 11, 31, 51 First layer 12, 32, 52 Second layer 20, 40, 60, 70 Insulating layer 20x, 40x Via hole 33, 53 Third layer 60x, 70x Opening 100, 100A, 100B Support 110, 110A, 120, 130, 130A, 150, 320 Metal layer 111 Primary particle 112 Secondary particle 140 Support substrate 310 Metal foil

Claims (9)

A first metal layer and a second metal layer whose upper surface is a roughened surface or is composed of particles are sequentially stacked on a supporting substrate, and the second metal layer is formed on the first metal layer with respect to the first metal layer. And preparing a support that can be selectively etched,
Selectively forming a third metal layer on the upper surface of the second metal layer;
The third metal layer is roughened by an etching solution, and at the same time, the second metal layer not covered with the third metal layer is dissolved, and the third metal layer is formed on the second metal layer. A step of forming a laminated first wiring layer,
Forming an insulating layer on the first metal layer to cover the first wiring layer;
A step of removing the support substrate and further removing the first metal layer by etching. The method of manufacturing a wiring board according to claim 1, comprising a step of forming a second wiring layer on the insulating layer. In the step of roughening the third metal layer with the etching solution and dissolving the second metal layer not covered with the third metal layer, the second metal layer is completely removed. Item 3. A method for manufacturing a wiring board according to Item 1 or 2. The third metal layer soluble in the same etching solution as the second metal layer is formed in the step of selectively forming the third metal layer. Of manufacturing wiring board. In the step of forming the second wiring layer, a step of forming a seed layer on the insulating layer;
A step of selectively forming an electrolytic plating layer on the seed layer,
The method for manufacturing a wiring board according to claim 2, wherein the seed layer not covered with the electrolytic plating layer is removed by etching to form a second wiring layer in which the electrolytic plating layer is laminated on the seed layer. .. The method for manufacturing a wiring board according to claim 1, wherein the first metal layer is nickel, and the second metal layer and the third metal layer are copper. The fourth metal layer formed by a sputtering method is laminated between the first metal layer and the second metal layer of the support body according to any one of claims 1 to 6. Wiring board manufacturing method. The method for manufacturing a wiring board according to claim 1, wherein a fifth metal layer is laminated between the support substrate of the support and the first metal layer. The method for manufacturing a wiring board according to claim 8, wherein a surface of the fifth metal layer that is in contact with the support substrate is a roughened surface.

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