JP2020113979A - マルチモード伝送線路及びそれを有するストレージ装置 - Google Patents
マルチモード伝送線路及びそれを有するストレージ装置 Download PDFInfo
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Abstract
Description
110 ストレージコントローラ
120、130 不揮発性メモリ装置
150、250 マルチモード伝送線路
151 下部導電層
152 上部導電層
153、154 貫通ビア
155−157 ブラインドビア
158 ストリップライン
159 ブラインド導電層
160 基板
Claims (20)
- 第1導電層と、
前記第1導電層より上に形成される第2導電層と、
第1方向に延在され、上下方向で前記第1導電層及び前記第2導電層に接するように形成される第1導波管ウォール(waveguide wall)と、
前記第1導波管ウォールと平行な方向に延在され、上下方向で前記第1導電層及び前記第2導電層に接する第2導波管ウォールと、
前記第1導電層と前記第2導電層との間、且つ前記第1導波管ウォールと前記第2導波管ウォールとの間に形成される少なくとも一つのストリップラインと、
前記第1導電層及び前記第2導電層のいずれか一つに連結されるか、又は前記第1導波管ウォール及び前記第2導波管ウォールのいずれか一つに連結されるブラインド導電体と、を備えることを特徴とする、マルチモード伝送線路。 - 前記少なくとも一つのストリップラインは、電気的に分離された第1ストリップライン及び第2ストリップラインを含み、前記第1ストリップラインと前記第2ストリップラインとが、前記ブラインド導電体によって電磁気的に遮蔽されることを特徴とする、請求項1に記載のマルチモード伝送線路。
- 前記第1導波管ウォールは、前記第1導電層及び前記第2導電層を貫通し、前記第1方向に配列される第1貫通ビアを含み、
前記第2導波管ウォールは、前記第1導電層及び前記第2導電層を貫通し、前記第1方向に配列される第2貫通ビアを含むことを特徴とする、請求項1又は2に記載のマルチモード伝送線路。 - 前記第1貫通ビアの第1ビア間隔又は前記第2貫通ビアの第2ビア間隔は、前記第1導電層と前記第2導電層との内側を進行するラジオ周波数信号(RF)の波長の1/10以下に形成されることを特徴とする、請求項3に記載のマルチモード伝送線路。
- 前記ブラインド導電体は、前記第1導電層及び前記第2導電層のいずれか一つを貫通し、前記第1貫通ビア又は前記第2貫通ビアよりも短く形成される複数のブラインドビアを含むことを特徴とする、請求項3又は4に記載のマルチモード伝送線路。
- 前記ブラインド導電体は、前記第1導波管ウォール又は前記第2導波管ウォールのいずれか一つに連結される導電膜として形成されることを特徴とする、請求項3又は4に記載のマルチモード伝送線路。
- 前記少なくとも一つのストリップラインは、電気的に分離された複数のストリップラインを含み、前記複数のストリップラインのうち、第1ストリップラインと第2ストリップラインは、前記ブラインド導電体による遮蔽なしに形成され、前記第1ストリップライン及び第2ストリップラインの各々は、互いに相補的な信号レベルを有するデータストローブ信号のセットを伝送することを特徴とする、請求項1に記載のマルチモード伝送線路。
- 前記少なくとも一つのストリップラインは、複数のチャンネルの各々に対応する信号を伝送し、前記ブラインド導電体は、前記複数のチャンネル単位で遮蔽を提供することを特徴とする、請求項1に記載のマルチモード伝送線路。
- 基板と、
前記基板の内部から上部導電層及び下部導電層を垂直に貫通する少なくとも2つの列に配列される複数の貫通ビアを含む基板集積導波管と、
前記基板集積導波管の内部で前記基板集積導波管の進行方向に延在される少なくとも一つのストリップラインと、を備え、
前記基板集積導波管は、
前記下部導電層、前記上部導電層、及び2つの列に配列される前記複数の貫通ビアで形成される導波管ウォールのうち、少なくとも一つと接し、前記基板集積導波管の内部に延在されるブラインド導電体、
を含むことを特徴とする、マルチモード伝送線路。 - 前記複数の貫通ビアは、
前記下部導電層及び前記上部導電層を貫通し、一定の間隔で前記基板集積導波管の進行方向に配列される第1貫通ビアと、
前記下部導電層及び前記上部導電層を貫通し、前記一定の間隔で前記第1貫通ビアと平行な方向に配列される第2貫通ビアを含むことを特徴とする、請求項9に記載のマルチモード伝送線路。 - 前記ブラインド導電体は、前記下部導電層及び前記上部導電層のいずれか一つを貫通し、前記第1貫通ビア又は前記第2貫通ビアよりも短く形成される複数のブラインドビアを含むことを特徴とする、請求項10に記載のマルチモード伝送線路。
- 前記複数のブラインドビアは、前記一定の間隔で、前記第1貫通ビア又は前記第2貫通ビアと平行な方向に配列されることを特徴とする、請求項11に記載のマルチモード伝送線路。
- 前記少なくとも一つのストリップラインは、各々互いに異なる信号を伝送する第1ストリップライン及び第2ストリップラインを含み、
前記複数のブラインドビアは、前記第1ストリップラインと前記第2ストリップラインとの間に配置されることを特徴とする、請求項11又は12に記載のマルチモード伝送線路。 - 前記ブラインド導電体は、前記第1貫通ビア及び前記第2貫通ビアのいずれか一方の貫通ビアによって貫通され、前記下部導電層又は前記上部導電層と平行に形成されるブラインド導電膜を含むことを特徴とする、請求項10に記載のマルチモード伝送線路。
- 前記基板は、プリント回路基板、フレキシブルプリント回路基板、及びシリコン基板のうち、少なくとも一つを含むことを特徴とする、請求項9乃至14のいずれか一項に記載のマルチモード伝送線路。
- 不揮発性メモリ装置と、
前記不揮発性メモリ装置とマルチモード通信を行うストレージコントローラと、
前記ストレージコントローラと前記不揮発性メモリ装置との間で、前記マルチモードで信号を伝達するマルチモード伝送線路と、を備え、
前記マルチモード伝送線路は、
上部導電層及び下部導電層を垂直に貫通する少なくとも2つの列に配列される複数の貫通ビアを含む基板集積導波管と、
前記基板集積導波管の内部で前記基板集積導波管の進行方向に延在される少なくとも一つのストリップラインと、を含み、
前記基板集積導波管は、
前記下部導電層、前記上部導電層、及び2つの列に配列される前記複数の貫通ビアで形成される導波管ウォールのうち、少なくとも一つと接し、前記基板集積導波管の内部に延在されるブラインド導電体、
を含むことを特徴とする、ストレージ装置。 - 前記複数の貫通ビアは、
前記下部導電層及び前記上部導電層を貫通し、各々一定の間隔で前記基板集積導波管の進行方向に配列される第1貫通ビアと、
前記下部導電層及び前記上部導電層を貫通し、各々前記一定の間隔で、前記第1貫通ビアと平行な方向に配列される第2貫通ビアと、を含むことを特徴とする、請求項16に記載のストレージ装置。 - 前記ブラインド導電体は、前記下部導電層及び前記上部導電層のいずれか一つを貫通し、前記第1貫通ビア又は前記第2貫通ビアよりも短く形成される複数のブラインドビアを含むことを特徴とする、請求項17に記載のストレージ装置。
- 前記少なくとも一つのストリップラインは、各々互いに異なる信号を伝送する第1ストリップライン及び第2ストリップラインを含み、
前記複数のブラインドビアは、前記第1ストリップラインと前記第2ストリップラインとの間に配置されることを特徴とする、請求項18に記載のストレージ装置。 - 前記ブラインド導電体は、前記第1貫通ビア及び前記第2貫通ビアのうち、いずれか一方の貫通ビアによって貫通され、前記下部導電層又は前記上部導電層と平行に形成されるブラインド導電膜を含むことを特徴とする、請求項17に記載のストレージ装置。
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Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10261841A (ja) | 1997-03-19 | 1998-09-29 | Toshiba Corp | 光集積回路 |
JP3732952B2 (ja) | 1998-05-28 | 2006-01-11 | 京セラ株式会社 | 高周波伝送線路の接続方法 |
JP4569913B2 (ja) | 2000-03-10 | 2010-10-27 | エルピーダメモリ株式会社 | メモリモジュール |
US6803252B2 (en) | 2001-11-21 | 2004-10-12 | Sierra Monolithics, Inc. | Single and multiple layer packaging of high-speed/high-density ICs |
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US7016198B2 (en) * | 2003-04-08 | 2006-03-21 | Lexmark International, Inc. | Printed circuit board having outer power planes |
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US8258892B2 (en) | 2008-02-19 | 2012-09-04 | The Royal Institution For The Advancement Of Learning/Mcgill University | High-speed bandpass serial data link |
CN101615711A (zh) | 2009-06-10 | 2009-12-30 | 东南大学 | 折叠半模基片集成波导 |
FR2953651B1 (fr) | 2009-12-07 | 2012-01-20 | Eads Defence & Security Sys | Dispositif de transition hyperfrequence entre une ligne a micro-ruban et un guide d'onde rectangulaire |
US9240619B2 (en) | 2011-04-28 | 2016-01-19 | Texas Instruments Incorporated | Differential transmission line pairs using a coupling orthogonalization approach to reduce cross-talk |
JP5948844B2 (ja) | 2011-12-14 | 2016-07-06 | ソニー株式会社 | 導波路およびこれを備えたインターポーザ基板ならびにモジュールおよび電子機器 |
US9755290B2 (en) | 2014-06-13 | 2017-09-05 | City University Of Hong Kong | Electromagnetic wave mode transducer |
CN105226359A (zh) | 2014-07-09 | 2016-01-06 | 上海交通大学 | 方同轴基片集成波导互连结构 |
US9531085B2 (en) | 2015-01-22 | 2016-12-27 | Huawei Technologies Co., Ltd. | Multi-mode feed network for antenna array |
CN106537684B (zh) | 2015-04-09 | 2019-11-01 | 株式会社村田制作所 | 复合传输线路以及电子设备 |
DE112015006967T5 (de) | 2015-09-25 | 2019-03-14 | Intel Corporation | Mikroelektronische Gehäusekommunikation unter Verwendung von durch Wellenleiter verbundenenFunkschnittstellen |
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US11264687B2 (en) * | 2018-04-03 | 2022-03-01 | Intel Corporation | Microelectronic assemblies comprising a package substrate portion integrated with a substrate integrated waveguide filter |
CN108777343B (zh) | 2018-05-28 | 2024-01-30 | 东南大学 | 基片集成波导传输结构、天线结构及连接方法 |
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