JP2020095722A5 - - Google Patents

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JP2020095722A5
JP2020095722A5 JP2019222969A JP2019222969A JP2020095722A5 JP 2020095722 A5 JP2020095722 A5 JP 2020095722A5 JP 2019222969 A JP2019222969 A JP 2019222969A JP 2019222969 A JP2019222969 A JP 2019222969A JP 2020095722 A5 JP2020095722 A5 JP 2020095722A5
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Japan
Prior art keywords
data elements
error correction
error
processing unit
correction code
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JP2019222969A
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Japanese (ja)
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JP2020095722A (ja
JP7356887B2 (ja
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Priority claimed from US16/271,777 external-priority patent/US11061772B2/en
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JP2019222969A 2018-12-14 2019-12-10 誤り訂正符号加速装置及びシステム Active JP7356887B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201862780185P 2018-12-14 2018-12-14
US62/780,185 2018-12-14
US16/271,777 US11061772B2 (en) 2018-12-14 2019-02-08 FPGA acceleration system for MSR codes
US16/271,777 2019-02-08

Publications (3)

Publication Number Publication Date
JP2020095722A JP2020095722A (ja) 2020-06-18
JP2020095722A5 true JP2020095722A5 (https=) 2022-12-13
JP7356887B2 JP7356887B2 (ja) 2023-10-05

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JP2019222969A Active JP7356887B2 (ja) 2018-12-14 2019-12-10 誤り訂正符号加速装置及びシステム

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US (3) US11061772B2 (https=)
JP (1) JP7356887B2 (https=)
KR (1) KR102491112B1 (https=)
CN (1) CN111324479B (https=)
TW (1) TWI791891B (https=)

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US11061772B2 (en) * 2018-12-14 2021-07-13 Samsung Electronics Co., Ltd. FPGA acceleration system for MSR codes
US11934330B2 (en) * 2020-05-08 2024-03-19 Intel Corporation Memory allocation for distributed processing devices
US11568089B2 (en) * 2020-08-31 2023-01-31 Frontiir Pte Ltd. Offloading operations from a primary processing device to a secondary processing device
US11868777B2 (en) 2020-12-16 2024-01-09 Advanced Micro Devices, Inc. Processor-guided execution of offloaded instructions using fixed function operations
US12073251B2 (en) * 2020-12-29 2024-08-27 Advanced Micro Devices, Inc. Offloading computations from a processor to remote execution logic
US11625249B2 (en) 2020-12-29 2023-04-11 Advanced Micro Devices, Inc. Preserving memory ordering between offloaded instructions and non-offloaded instructions
US12468474B2 (en) * 2021-11-15 2025-11-11 Samsung Electronics Co., Ltd. Storage device and method performing processing operation requested by host
US12197378B2 (en) 2022-06-01 2025-01-14 Advanced Micro Devices, Inc. Method and apparatus to expedite system services using processing-in-memory (PIM)
US12050531B2 (en) 2022-09-26 2024-07-30 Advanced Micro Devices, Inc. Data compression and decompression for processing in memory
US12147338B2 (en) 2022-12-27 2024-11-19 Advanced Micro Devices, Inc. Leveraging processing in memory registers as victim buffers
US12265470B1 (en) 2023-09-29 2025-04-01 Advanced Micro Devices, Inc. Bypassing cache directory lookups for processing-in-memory instructions
US12596650B2 (en) 2023-09-29 2026-04-07 Advanced Micro Devices, Inc. Preemptive flushing of processing-in-memory data structures
US12455826B2 (en) 2024-03-29 2025-10-28 Advanced Micro Devices, Inc. Dynamic caching policies for processing-in-memory

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