KR102491112B1 - Msr 코드를 위한 fpga 가속 시스템 - Google Patents

Msr 코드를 위한 fpga 가속 시스템 Download PDF

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KR102491112B1
KR102491112B1 KR1020190126494A KR20190126494A KR102491112B1 KR 102491112 B1 KR102491112 B1 KR 102491112B1 KR 1020190126494 A KR1020190126494 A KR 1020190126494A KR 20190126494 A KR20190126494 A KR 20190126494A KR 102491112 B1 KR102491112 B1 KR 102491112B1
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error correction
data elements
processing unit
correction code
data
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KR20200073978A (ko
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미엔 친
이주환
레카 피추마니
기양석
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삼성전자주식회사
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/079Root cause analysis, i.e. error or fault diagnosis
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G06F11/1096Parity calculation or recalculation after configuration or reconfiguration of the system
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0793Remedial or corrective actions
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1032Simple parity
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30079Pipeline control instructions, e.g. multicycle NOP
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/3009Thread control instructions
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6575Implementations based on combinatorial logic, e.g. Boolean circuits

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Software Systems (AREA)
  • Probability & Statistics with Applications (AREA)
  • Human Computer Interaction (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
KR1020190126494A 2018-12-14 2019-10-11 Msr 코드를 위한 fpga 가속 시스템 Active KR102491112B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201862780185P 2018-12-14 2018-12-14
US62/780,185 2018-12-14
US16/271,777 US11061772B2 (en) 2018-12-14 2019-02-08 FPGA acceleration system for MSR codes
US16/271,777 2019-02-08

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KR20200073978A KR20200073978A (ko) 2020-06-24
KR102491112B1 true KR102491112B1 (ko) 2023-01-20

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US (3) US11061772B2 (https=)
JP (1) JP7356887B2 (https=)
KR (1) KR102491112B1 (https=)
CN (1) CN111324479B (https=)
TW (1) TWI791891B (https=)

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WO2018176238A1 (en) 2017-03-28 2018-10-04 Intel Corporation Technologies for hybrid field-programmable gate array-application-specific integrated circuit code acceleration
US11061772B2 (en) * 2018-12-14 2021-07-13 Samsung Electronics Co., Ltd. FPGA acceleration system for MSR codes
US11934330B2 (en) * 2020-05-08 2024-03-19 Intel Corporation Memory allocation for distributed processing devices
US11568089B2 (en) * 2020-08-31 2023-01-31 Frontiir Pte Ltd. Offloading operations from a primary processing device to a secondary processing device
US11868777B2 (en) 2020-12-16 2024-01-09 Advanced Micro Devices, Inc. Processor-guided execution of offloaded instructions using fixed function operations
US12073251B2 (en) * 2020-12-29 2024-08-27 Advanced Micro Devices, Inc. Offloading computations from a processor to remote execution logic
US11625249B2 (en) 2020-12-29 2023-04-11 Advanced Micro Devices, Inc. Preserving memory ordering between offloaded instructions and non-offloaded instructions
US12468474B2 (en) * 2021-11-15 2025-11-11 Samsung Electronics Co., Ltd. Storage device and method performing processing operation requested by host
US12197378B2 (en) 2022-06-01 2025-01-14 Advanced Micro Devices, Inc. Method and apparatus to expedite system services using processing-in-memory (PIM)
US12050531B2 (en) 2022-09-26 2024-07-30 Advanced Micro Devices, Inc. Data compression and decompression for processing in memory
US12147338B2 (en) 2022-12-27 2024-11-19 Advanced Micro Devices, Inc. Leveraging processing in memory registers as victim buffers
US12265470B1 (en) 2023-09-29 2025-04-01 Advanced Micro Devices, Inc. Bypassing cache directory lookups for processing-in-memory instructions
US12596650B2 (en) 2023-09-29 2026-04-07 Advanced Micro Devices, Inc. Preemptive flushing of processing-in-memory data structures
US12455826B2 (en) 2024-03-29 2025-10-28 Advanced Micro Devices, Inc. Dynamic caching policies for processing-in-memory

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CN1040698A (zh) 1988-09-02 1990-03-21 三菱电机株式会社 错误校正电路
CN101740135A (zh) 2008-11-18 2010-06-16 富士通株式会社 错误判断电路和共享的存储器系统
US20140317222A1 (en) 2012-01-13 2014-10-23 Hui Li Data Storage Method, Device and Distributed Network Storage System
US20160110254A1 (en) 2014-10-15 2016-04-21 Empire Technology Development Llc Partial Cloud Data Storage
US20170179979A1 (en) 2015-12-18 2017-06-22 Netapp, Inc. Systems and Methods for Minimum Storage Regeneration Erasure Code Construction Using r-Ary Trees
US20180300201A1 (en) 2017-04-17 2018-10-18 Intel Corporation Bypassing error correction code (ecc) processing based on software hint

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CN1040698A (zh) 1988-09-02 1990-03-21 三菱电机株式会社 错误校正电路
CN101740135A (zh) 2008-11-18 2010-06-16 富士通株式会社 错误判断电路和共享的存储器系统
US20140317222A1 (en) 2012-01-13 2014-10-23 Hui Li Data Storage Method, Device and Distributed Network Storage System
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TWI791891B (zh) 2023-02-11
TW202026871A (zh) 2020-07-16
KR20200073978A (ko) 2020-06-24
JP2020095722A (ja) 2020-06-18
US20230367675A1 (en) 2023-11-16
US11726876B2 (en) 2023-08-15
CN111324479A (zh) 2020-06-23
US20200192757A1 (en) 2020-06-18
JP7356887B2 (ja) 2023-10-05
CN111324479B (zh) 2022-08-09
US11061772B2 (en) 2021-07-13
US20210334162A1 (en) 2021-10-28
US12117903B2 (en) 2024-10-15

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