JP2020087775A - DC breaker - Google Patents

Abstract

To provide a DC breaker that suppresses a surge voltage to a semiconductor switch element.SOLUTION: A DC breaker according to an embodiment includes a semiconductor switch circuit, a snubber circuit that is connected in parallel to the semiconductor switch circuit and commutates a current when the semiconductor switch circuit is cut off, a first arrester connected in parallel to the semiconductor switch circuit via a first wiring, and a second arrester that is connected in parallel to the first arrester via a second wiring different from the first wiring and connected to the semiconductor switch circuit via the first wiring and the second wiring.SELECTED DRAWING: Figure 1

Description

Embodiments of the present invention relate to a direct current interruption device.

Since the DC blocking device does not zero-cross unlike AC in the case of DC, various methods have been studied and proposed as to how to process energy at the time of blocking (for example, Patent Document 1).

In many DC interrupting devices, the energy at the time of breaking is properly commutated and processed. There is a direct current circuit breaker in which a snubber circuit absorbs energy interrupted by a switch circuit composed of a semiconductor element and a surge protection circuit such as an arrester absorbs an excess of the interrupted energy.

In a DC circuit breaker for a DC power system including DC power transmission, it is difficult to absorb the breaking energy with a single arrester when a system fault occurs, so use multiple arresters in parallel. There is.

Depending on the breaking energy, the external size of parts such as an arrester becomes large and the mutual wiring becomes long. The parasitic inductance generated in the wiring limits the current flowing from the switch circuit to the snubber circuit and the current flowing from the snubber circuit to the arrester, which causes a problem that a high surge voltage is applied to both ends of the switch circuit.

In order to suppress the surge voltage to such a switch circuit, the wiring length between the switch circuit and the snubber circuit is shortened, and the wiring length between the switch circuit and the arrester is also shortened to reduce the parasitic inductance. There is a need to. However, when multiple arresters are arranged, it is difficult to achieve both the shortest wiring length of the switch circuit and the snubber circuit and the shortest wiring between the switch circuit and all the arresters. ..

JP, 2016-127026, A

Embodiments provide a DC interrupting device that suppresses a surge voltage to a switch circuit.

The direct-current interruption device according to the embodiment includes a semiconductor switch circuit, a snubber circuit that is connected in parallel to the semiconductor switch circuit and commutates a current when the semiconductor switch circuit is interrupted, and a first wiring, A first arrester connected in parallel to the semiconductor switch circuit and a second wiring different from the first wiring are connected in parallel to the first arrester, and the first wiring and the second wiring are connected to each other. And a second arrester connected in parallel to the semiconductor switch circuit.

In the present embodiment, a DC cutoff device that suppresses surge voltage to the semiconductor switch element is realized.

It is a circuit diagram which illustrates the direct-current interruption device concerning an embodiment. FIG. 2A is a block diagram illustrating the direct current interruption device of the embodiment. FIG. 2B is a block diagram illustrating a DC power transmission system including the DC interrupting device of FIG. FIG. 3A and FIG. 3B are schematic wiring diagrams which substantially illustrate the respective elements of the DC interrupting device of FIG. FIG. 4A is a circuit diagram illustrating a DC interrupting device of a comparative example. FIG. 4B is a schematic wiring diagram exemplifying each element of the DC interrupting device of FIG. 4A.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
It should be noted that the drawings are schematic or conceptual, and the relationship between the thickness and width of each portion, the size ratio between the portions, and the like are not always the same as the actual ones. Even when the same portion is shown, the dimensions and ratios may be different depending on the drawings.
In the specification and the drawings of the application, components similar to those described in regard to a drawing thereinabove are marked with like reference numerals, and a detailed description is omitted as appropriate.

FIG. 1 is a circuit diagram illustrating a direct current interruption device according to an embodiment.
As shown in FIG. 1, the direct-current interruption device 10 of the embodiment includes an interruption circuit 20. The DC interrupting device 10 has terminals 11a to 11c, and DC wirings to be interrupted are connected to the terminals 11a and 11b. The data of the current value flowing in the DC wiring is input to the terminal 11c, and the DC interrupting device 10 starts the interrupting operation when the current value becomes equal to or higher than a preset threshold value. When the current flowing through the DC wiring is smaller than the threshold value, the DC interrupting device 10 closes the circuit and allows the DC current to flow.

The cutoff circuit 20 includes a semiconductor switch circuit 21, a snubber circuit 23, and a plurality of arresters 26 to 29. The semiconductor switch circuit 21 has terminals 22a and 22b. The semiconductor switch circuit 21 is connected to the terminal 11a of the DC interrupting device 10 via the terminal 22a and to the terminal 11b of the DC interrupting device 10 via the terminal 22b.

The snubber circuit 23 is connected in parallel with the semiconductor switch circuit 21. In addition, in detail, as will be described later, in the semiconductor switch circuit 21, a plurality of semiconductor switch elements are connected in series, and a snubber circuit in which each semiconductor switch element is connected in parallel is provided. The number of semiconductor switch elements in series is determined according to the breakdown voltage of the semiconductor switch elements and the DC voltage of the DC circuit in which the DC interrupter 10 is provided.

The arresters 26 to 29 are connected in parallel. The arresters 26 to 29 connected in parallel are connected to the semiconductor switch circuit 21 in parallel.

In the arresters 26 to 29, the limit voltage that limits the increase in voltage by passing a current is set to a value lower than the withstand voltage of the semiconductor switch circuit 21 and the snubber circuit 23. The limiting voltages of the arresters 26 to 29 have, for example, the same value at the same current value. The limiting voltages of the arresters 26 to 29 are not limited to the same value and may be different values.

The arrester (first arrester) 26 is arranged closer to the semiconductor switch circuit 21 than the other arresters (second arresters) 27 to 29. The arrester 26 is connected to one terminal 22a and the other terminal 22b of the semiconductor switch circuit 21 via the wiring 31a and the wiring 31b (first wiring).

The external dimensions of the arrester 26 and the arresters 27 to 29 are different. Preferably, arrester 26 has a smaller outer size than arresters 27-29. By making the external dimensions of the arrester 26 smaller, the arrester 26 can be arranged near the semiconductor switch circuit 21.

In this example, the arresters 27 to 29 all have the same outer size. The arrester 27a is connected to the other arresters 28 and 29 via the wirings 32a and 32b. The arrester 28 is connected to the other arresters 27 and 29 via the wirings 33a and 33b. The arrester 29 is connected to the other arresters 27 and 28 via the wirings 34a and 34b.

The arrester 26 is connected to the other arresters 27 to 29 via the wirings 35a and 35b. Therefore, the compact arrester 26 is connected to the semiconductor switch circuit 21 by the wirings 31a and 31b, and the other arresters 27 to 29 have the wirings 31a and 31b and the wiring (second wiring) 35a in addition to their own wirings. , 35b are connected to the semiconductor switch circuit 21.

In the drawing, the circuit diagram symbol of the inductance is shown by a broken line in each wiring. The symbol of the inductance of the broken line represents that it is a parasitic inductance generated according to the length of each wiring. The length of the wiring between the arrester 26 and the semiconductor switch circuit 21 is shorter than the length of the wiring between the other arresters 27 to 29 and the semiconductor switch circuit 21. Therefore, the parasitic inductance of the wirings 31a and 31b between the arrester 26 and the semiconductor switch circuit 21 can be made lower than the parasitic inductance of the other wirings.

The snubber circuit 23 is provided in the vicinity of the semiconductor switch circuit 21, and is therefore connected with a sufficiently short wiring length. In this figure, only the wires 36a and 36b at both ends of the snubber circuit 23 are drawn, but the wires to each semiconductor switch forming the semiconductor switch circuit 21 also have a short wire length.

The arrester 26 and the other arresters 27 to 29 are preferably arranged close to each other, and the length of wiring connecting them is short and the parasitic inductance is set small. As a result, the surplus of the breaking energy absorbed by the arrester 26 is easily commutated to the other arresters 27 to 29 as a breaking current.

When the limiting voltages of the arresters 26 to 29 are made different, the limiting voltage of the arrester 26 in which the wiring length with the semiconductor switch circuit 21 is short and the parasitic inductance is set to be smaller than that of the other arresters 27 to 29. Can be set low. By setting in this way, the breaking current can be more surely commutated to the arrester 26 first.

When the limiting voltage of the arrester 26 is set lower than the limiting voltages of the other arresters 27 to 29, the limiting voltage ratio of the arrester 26 is preferably set to be higher than that of the other arresters 27 to 29. As a result, after the breaking current is surely commutated to the arrester 26, the surplus breaking current can be smoothly commutated to the other arresters 27 to 29. The limiting voltage ratio of the arrester is a ratio of limiting voltages at different current values, and the limiting voltage ratio is defined as a limiting voltage at a large current/a limiting voltage at a small current.

FIG. 2A is a block diagram illustrating the direct current interruption device of the embodiment. FIG. 2B is a block diagram illustrating a DC power transmission system including the DC interrupting device of FIG.
FIG. 2A shows a more specific configuration example of the DC interrupting device 10. As shown in FIG. 2A, the DC interrupting device 10 of the embodiment further includes a breaking circuit 20, a main switch circuit 40, a mechanical breaker 50, and a control unit 60.

The main switch circuit 40 and the mechanical breaker 50 are connected in series. The series circuit of the main switch circuit 40 and the mechanical breaker 50 is connected between the terminals 11a and 11b.

The main switch circuit 40 is, for example, a self-turn-off type semiconductor element such as an IGBT. The main switch circuit 40 is normally conducting, and is shut off when a short-circuit accident or the like occurs in the DC wiring. In the main switch circuit 40, the cutoff current flows to the cutoff circuit 20 after the cutoff as in this example, and a high voltage is not applied to both ends. Therefore, in many cases, the number of series is one.

The mechanical breaker 50 is normally closed, and when a short circuit accident occurs in the DC wiring, the breaking current is commutated to the semiconductor switch circuit 21 and then opened.

The breaker circuit 20 is connected in parallel to the series circuit of the main switch circuit 40 and the mechanical breaker 50. The semiconductor switch circuit 21 of the cutoff circuit 20 is normally conducting. The semiconductor switch circuit 21 is cut off when a short circuit accident occurs in the DC wiring 2. When the main switch circuit 40 is cut off, a voltage due to arc discharge is applied to both ends in addition to the DC voltage input and output by the DC circuits 1a and 1b. Therefore, as described above, a large number of semiconductor switches forming the semiconductor switch circuit 21 are connected in series.

As shown in FIG. 2B, the DC interrupting device 10 is used by being connected in series to the DC wiring 2 between the DC circuits 1a and 1b. The DC circuits 1a and 1b are, for example, an AC/DC power converter for converting an AC voltage of a power system or the like into a DC voltage, a DC power source such as a photovoltaic power generation panel, a storage battery, or the like. The DC circuits 1a and 1b may include a DC load operated by a DC power supply. DC wiring 2 is, for example, a DC transmission line. A current detector 3 is provided on the DC wiring 2, and the DC interrupting device 10 inputs the current value Is detected by the current detector 3 so that the current value Is is equal to or more than a preset threshold value. In the case of, the interruption operation is started.

When the control unit 60 determines that the current value Is is equal to or more than the threshold value, first, the cutoff signal S1 is generated to cut off the main switch circuit 40. Since the main switch circuit 40 is cut off, the cutoff current is commutated to the semiconductor switch circuit 21.

Then, the control unit 60 generates the cutoff signal S2 to cut off the mechanical breaker 50. After the mechanical breaker 50 is cut off, the control unit 60 generates a cutoff signal S3 to cut off the semiconductor switch circuit 21 of the cutoff circuit 20.

The DC interrupting device 10 of the embodiment only needs to include the semiconductor switch circuit 21, and is not limited to the configuration example of FIG. 2A described above. Further, the DC interrupting device may include a current detector, or the DC interrupting device may include no control unit, and the interrupting control may be performed by, for example, a control device that controls the AC-DC power converter.

FIG. 3A and FIG. 3B are schematic wiring diagrams which substantially illustrate the respective elements of the DC interrupting device of FIG.
3A is a front view of the breaking circuit 20, and FIG. 3B is a plan view of the breaking circuit 20.
As shown in FIG. 3A, in the cutoff circuit 20, a snubber circuit including capacitors 24a to 24d and diodes 25a to 25d, a semiconductor switch circuit 21, and arresters 26 to 29 are provided on a substrate 30. The substrate 30 is a plate-shaped member made of an insulating material.

XYZ three-dimensional coordinates may be used to describe the actual arrangement of the cutoff circuit 20. The X axis and the Y axis are set so as to include a plane parallel to the plane on which the substrate 30 is provided. The X axis is set along the direction in which the capacitors 24a to 24d, the diodes 25a to 25d, the semiconductor switch circuit 21, and the arresters 26 to 29 are arranged. The Y axis is an axis orthogonal to the X axis, and the semiconductor switches 21a to 21d of the semiconductor switch circuit 21 are arranged in series along the Y axis.

Each of the semiconductor switches 21a to 21d of the semiconductor switch circuit 21 is, for example, a pressure-contact type semiconductor element, and the surface of the circular pressure-contact electrode of the package is parallel to the X axis, and the circular central axis of the package is parallel to the Y axis. Are arranged as follows. The semiconductor switches 21a to 21d are arranged in series on the substrate 30 as a stack connected in series with a heat sink sandwiched between the electrodes and extending in the Y-axis direction.

The semiconductor switches 21a to 21d are preferably self-extinguishing type semiconductor elements. For example, the semiconductor switches 21a to 21d are IGBTs or MOSFETs.

The arresters 26 to 29 have a cylindrical outer shape and are arranged such that the direction in which the cylinder extends is substantially parallel to the Y-axis direction. In this example, two arresters 26 to 29 are arranged on the substrate along the X-axis direction, and two more arresters are arranged above the two arranged arresters 28 and 29 (the positive direction of the Z-axis). 26 and 27 are arranged.

Preferably, arresters 26-29 are contactless. The contactless type arresters 26 to 29 are, for example, ZnO surge absorbers (ZnO elements) containing a sintered body of ZnO.

In the arresters 26 to 29 made of ZnO elements, disk-shaped ZnO elements are arranged in a cylindrical case in which the circular surfaces are arranged in parallel and the centers of the circular surfaces are aligned. In each case of arresters 26 to 29, ZnO elements having the same diameter and thickness and having the same characteristics are housed. The ZnO elements in the case are electrically connected in parallel. That is, as the number of parallel ZnO elements increases, the height of the cylindrical shape increases, and the cutoff energy that can be absorbed increases. In this example, the arrester 26 arranged closest to the semiconductor switch circuit 21 can be formed in a small size because the number of parallel ZnO elements is smaller than that of the other arresters 27 to 29.

The limit voltages of the arresters 26 to 29 are set to be substantially equal. Further, the limiting voltage ratios of the arresters 26 to 29 are also set to be substantially equal. Here, the limiting voltage of the arrester is the limiting voltage of the built-in ZnO element, and is the voltage across the electrodes of the ZnO element at a preset current value. The ZnO element has a current characteristic at a limiting voltage, and the higher the current, the higher the limiting voltage. The limiting voltage ratio of the arresters 26 to 29 is the limiting voltage ratio of the built-in ZnO element, and the limiting voltage ratio of the ZnO element is the ratio of the limiting voltages of the ZnO elements at different preset current values. The current value for setting the limiting voltage ratio is set to, for example, a small current of about several mA and a large current of several kA, and the limiting voltage ratio is defined as a limiting voltage at a large current/a limiting voltage at a small current. It

By making the limiting voltage of the ZnO element different, not only the case where all arresters 26 to 29 are equal, but different limiting voltages can be set. For example, by setting the limiting voltage of the ZnO element of the arrester 26 arranged closest to the semiconductor switch circuit 21 lower than the limiting voltage of the other arresters 27 to 29, the arrester 26 can more reliably absorb the voltage. You will be able to.

By setting the parallel number of ZnO elements of the arrester 26 smaller than the parallel number of ZnO elements of the other arresters 27 to 29, the limiting voltage ratio of the arrester 26 is made higher than the limiting voltage ratio of the other arresters 27 to 29. be able to. By setting the limit voltage ratio of the arrester 26 larger than the limit voltage ratio of the other arresters 27 to 29, the voltage absorption by the arrester 26 can be ensured.

As shown in FIG. 3B, the snubber circuit 23 includes capacitors 24a to 24d and diodes 25a to 25d. The set of the capacitor 24a and the diode 25a is connected to the semiconductor switch 21a. The set of the capacitor 24b and the diode 25b is connected to the semiconductor switch 21b. The set of the capacitor 24c and the diode 25c is connected to the semiconductor switch 21c. The set of the capacitor 24d and the diode 25d is connected to the semiconductor switch 21d.

In this example, the capacitor 24a and the diode 25a are connected in series and are connected so as to suppress a voltage increase between the collector and the emitter of the semiconductor switch 21a. More specifically, the cathode terminal of the diode 25a is connected to one terminal of the capacitor 24a, the anode terminal of the diode 25a is connected to the collector terminal of the semiconductor switch 21a, and the other terminal of the capacitor 24a is connected to the semiconductor switch 21a. Connected to the emitter terminal of. Each set of the capacitors 24b to 24d and the diodes 25b to 25d is also connected similarly to the semiconductor switches 21b to 21d.

In this example, the capacitors 24a to 24d have a rectangular parallelepiped outer shape, and are arranged along the Y-axis direction. The diodes 25a to 25d are also arranged along the Y-axis direction. The set of the capacitor 24a and the diode 25a is arranged close to the semiconductor switch 21a, and similarly, the set of the capacitors 24b to 24d and the diodes 25b to 25d are also arranged close to the semiconductor switches 21b to 21d, respectively. There is.

In FIG. 3B, a state in which the wirings of the respective circuit elements are routed to each other is schematically but substantively shown. The set of the capacitor 24a and the diode 25a of the snubber circuit 23 is arranged close to the semiconductor switch 21a, and the wiring is set short. Therefore, the length and area of the current loop L1 formed by the semiconductor switch 21a, the diode 25a, and the capacitor 24a can be reduced, and the influence of the parasitic inductance of the current flowing through the loop L1 can be reduced. When the semiconductor switch 21a is cut off, a sufficient breaking current is commutated to the snubber circuit 23. Similarly, with respect to the other sets of the capacitors 24b to 24d and the diodes 25b to 25d of the snubber circuit 23, a sufficient breaking current can be commutated. Therefore, it is less likely that an excessive surge voltage is applied between the collector and the emitter of the semiconductor switches 21a to 21d.

The arrester 26 is arranged closest to the semiconductor switch circuit 21, and is connected to both terminals 22a and 22b of the semiconductor switch circuit 21 by short wirings 31a and 31b. Therefore, the current loop L2 formed by the arrester 26, the semiconductor switch circuit 21, and the wirings 31a and 31b is smaller than the current loop formed by the other arresters 27 to 29, the semiconductor switch circuit 21, and each wiring. can do. Therefore, the influence of the parasitic inductance due to the wirings 31a and 31b on the current flowing through the loop L2 can be reduced. Therefore, the current commutated from the semiconductor switch can sufficiently flow, and the voltage applied to the semiconductor switch circuit 21 is suppressed.

The effects of the DC interrupting device 10 of the embodiment will be described in comparison with the DC interrupting device of the comparative example.
FIG. 4A is a circuit diagram illustrating a DC interrupting device of a comparative example. FIG. 4B is a schematic wiring diagram exemplifying each element of the DC interrupting device of FIG. 4A.
As shown in FIG. 4A, the direct-current interruption device 110 of the comparative example has an interruption circuit 120. The DC interrupting device 110 is connected in series to the DC wiring via the terminals 111a and 111b, and inputs the data of the current value flowing in the DC wiring via the terminal 111c. The configuration of the cutoff circuit 120 is similar to that of the embodiment, but the configuration and arrangement of the arrester are different.

The arresters 126 to 129 all have the same external dimensions and the same characteristics. The arrester 126 is connected to the terminals 22a and 22b of the semiconductor switch circuit 21 via wirings 131a and 131b, respectively. The arrester 127 is connected to the terminals 22a and 22b of the semiconductor switch circuit 21 via wirings 132a and 132b, respectively. The arrester 128 is connected to the terminals 22a and 22b of the semiconductor switch circuit 21 via wirings 133a and 133b, respectively. The arrester 129 is connected to the terminals 22a and 22b of the semiconductor switch circuit 21 via the wirings 134a and 134b, respectively.

As shown in FIG. 4B, the lengths of the wirings from the arresters 126 to 129 are made substantially equal by arranging the arresters 126 to 129 so as to surround the semiconductor switch circuit 21. The length can be shortened. As shown in the drawing, the current loop L2' including the wirings 133a and 133b, the arrester 127, and the semiconductor switch circuit 21 can have a relatively small wiring length and loop area.

However, the snubber circuit 23 has to be arranged at a position relatively distant from the arresters 126 to 129, and the wiring 136a from the anode terminals of the diodes 25a to 25d to the collector terminals of the semiconductor switches 21a to 21d, 136b becomes relatively long.

The path L1' including the semiconductor switch, the diode, and the capacitor becomes long, and the parasitic inductance becomes relatively large. Therefore, the current when the breaking current is commutated to the snubber circuit 23 is limited, and an excessive surge voltage can be applied across the semiconductor switch.

In the DC interrupting device 10 of this embodiment, the snubber circuit 23 is arranged near the semiconductor switch circuit 21, and at least one of the arresters connected in parallel is arranged near the semiconductor switch circuit 21. As a result, the path between the snubber circuit 23 and the semiconductor switch circuit 21 can be minimized while the path between the arrester and the semiconductor switch circuit 21 can be minimized. Therefore, the semiconductor switch circuit 21 is cut off, and the cutoff current can be easily commutated to the snubber circuit 23. When the voltage rises due to the commutation to the snubber circuit 23 and exceeds the breakdown voltage of the arrester, the current due to the excess cutoff energy flows to the nearest arrester and is then commutated to another arrester. Therefore, the breaking current can be commutated to the semiconductor switch circuit 21 without applying an excessive voltage.

The arrester arranged in the closest vicinity of the semiconductor switch circuit 21 is only required to be able to absorb the initial cutoff energy, and therefore a small one having a smaller energy capacity than other arresters can be used. Therefore, the cutoff circuit 20 can be made small, and the external size of the DC cutoff device 10 as a whole can be reduced.

The arrester arranged closest to the semiconductor switch circuit 21 may have a breakdown voltage slightly lower than that of other arresters. By selecting the breakdown voltage of the nearest arrester to be lower than that of other arresters, the initial breaking current can be surely commutated. Alternatively, even when the breakdown voltages of the arrester and the end arrester arranged in the closest vicinity are aligned, by selecting the operating resistance for the current of the voltage after breakdown in the nearest arrester to be larger than that of other arresters, The effect of can be obtained.

According to the embodiment described above, it is possible to realize the DC interrupting device that suppresses the surge voltage to the semiconductor switch element.

Although some embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the scope of the invention described in the claims and equivalents thereof. Further, the above-described respective embodiments can be implemented in combination with each other.

1a, 1b DC circuit, 2 DC wiring, 3 current detector, 10 DC interrupting device, 20 interrupting circuit, 21 semiconductor switch circuit, 23 snubber circuit, 24a-24d capacitor, 25a-25d diode, 26-29 arrester, 30 substrate , 31a to 36b wiring, 40 main switch circuit, 50 mechanical circuit breaker, 60 control unit

Claims (6)

A semiconductor switch circuit,
A snubber circuit that is connected in parallel to the semiconductor switch circuit and commutates the current when the semiconductor switch circuit is cut off,
A first arrester connected in parallel to the semiconductor switch circuit via a first wiring;
A second parallel wiring connected to the first arrester via a second wiring different from the first wiring, and a parallel connection to the semiconductor switch circuit via the first wiring and the second wiring; 2 arresters
DC interrupting device equipped with. The DC interrupting device according to claim 1, wherein the outer dimensions of the first arrester are smaller than the outer dimensions of the second arrester. The DC interrupting device according to claim 1, wherein the limiting voltage of the first arrester is lower than the limiting voltage of the second arrester. The DC interrupting device according to claim 3, wherein each of the first arrester and the second arrester includes a non-linear resistance element including a sintered body of zinc oxide. The first arrester and the second arrester each include a plurality of the non-linear resistance elements connected in parallel,
The DC interrupting device according to claim 4, wherein the number of parallel non-linear elements of the first arrester is smaller than the number of parallel non-linear elements of the second arrester. The DC interrupting device according to claim 4 or 5, wherein a limiting voltage ratio of the first arrester is larger than a limiting voltage ratio of the second arrester.

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