JP2020038983A - Stacked capacitor and its mounting structure - Google Patents

Abstract

To provide a stacked capacitor that prevents propagation of vibration to a substrate and has improved mounting stability.SOLUTION: A stacked capacitor 10 comprises: a rectangular parallelepiped stacked body 1 in which first internal electrodes 2a and second internal electrodes 2b are stacked with a dielectric layer 1a therebetween; a first external electrode 3a that is formed in a center part of a first side face 4e along the longitudinal direction of the stacked body 1 and is connected to the first internal electrodes 2a; and a second external electrode 3b that is formed in a center part of a second side face 4f along the longitudinal direction of the stacked body 1 and is connected to the second internal electrodes 2b. A length along the longitudinal direction of the first external electrode 3a is larger than 0.5 time a length along the longitudinal direction of the stacked body 1, and a length along the longitudinal direction of the second external electrode 3b is smaller than 0.35 time the length along the longitudinal direction of the stacked body 1.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a multilayer capacitor in which external electrodes are formed on a laminate in which a plurality of dielectric layers and internal electrodes are alternately laminated.

  In a multilayer capacitor, dielectric layers and internal electrodes are alternately laminated, and a ferroelectric material such as barium titanate having a relatively high dielectric constant is generally used as a ceramic material constituting the dielectric layer. Used. When a DC voltage on which an AC component is superimposed is applied to such a multilayer capacitor, distortion occurs in the dielectric layer due to an electrostrictive effect of the voltage, and the multilayer capacitor itself vibrates. The multilayer capacitor is mounted on the board via solder or the like, and the vibration of the multilayer capacitor propagates to the board, and the vibration propagated to the board causes the board to resonate and amplify the vibration. Occurs. Then, when the board resonates at the resonance frequency in the audible range, an audible sound is generated from the board, and a so-called “sound” phenomenon occurs. Specifically, in a multilayer capacitor, a pair of external electrodes and a substrate are mounted via solder, and the vibration of the multilayer capacitor deforms the substrate via a solder joint formed on the external electrode. Therefore, vibration noise is generated on the substrate.

  The multilayer capacitor has a small amount of vibration displacement due to the piezoelectric phenomenon in the width direction as compared to the longitudinal direction of the laminate, and reduces the "squeal" by using a pair of capacitors at the center of both sides along the longitudinal direction of the laminate. Are provided. Thus, in order to suppress the propagation of vibration to the substrate, the multilayer capacitor is provided with a pair of external electrodes on both side surfaces and the length of the external electrodes in the longitudinal direction is set to the length along the longitudinal direction of the laminate. It is smaller than half of the length to suppress "squeal". Such a multilayer capacitor is disclosed, for example, in Patent Document 1.

JP 2007-194412 A

  However, the above-described multilayer capacitor has a pair of external electrodes provided on both side surfaces along the longitudinal direction, and the length of the external electrodes along the longitudinal direction is smaller than half the length along the longitudinal direction of the multilayer body. Although the "sound" is suppressed by making it smaller, there is a problem that the length of the external electrode along the longitudinal direction of the laminate becomes small, and the mounting stability tends to be reduced.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a multilayer capacitor capable of suppressing "sound noise" and improving mounting stability.

  The multilayer capacitor according to the present invention includes a rectangular parallelepiped laminate in which a first internal electrode and a second internal electrode are laminated via a dielectric layer, and a first side surface along a longitudinal direction of the laminate. A first external electrode formed at a central portion and connected to the first internal electrode; and a second internal electrode formed at a central portion of a second side surface along the longitudinal direction of the laminate. And a second external electrode connected to the first and second external electrodes, wherein the ratio of the length of the first external electrode along the longitudinal direction of the laminate to the length of the laminate along the longitudinal direction of the laminate is , The ratio of the length of the second external electrode along the longitudinal direction of the laminate to the length of the laminate along the longitudinal direction of the laminate is less than 0.35. It is characterized by the following.

  According to the multilayer capacitor of the present invention, since the pair of external electrodes are formed so as to have different lengths along the longitudinal direction, the propagation of vibration to the substrate can be suppressed and the mounting stability can be improved. .

1A is a schematic perspective view showing a multilayer capacitor according to an embodiment, and FIG. 2B is an end view of a cut portion of the multilayer capacitor shown in FIG. (C) is sectional drawing cut | disconnected by the BB line of the multilayer capacitor shown to (a). (A)-(c) is a top view for explaining an internal electrode. FIG. 3 is a plan view showing dimensions of each part of the multilayer capacitor according to the embodiment. 2A is a schematic perspective view showing a state where the multilayer capacitor shown in FIG. 1 is mounted on a substrate, and FIG. 2B is a cross-sectional view taken along line CC of the multilayer capacitor shown in FIG. It is sectional drawing which shows the mounting structure mounted on a board. (A) is a graph showing a measurement result of a sound pressure obtained by simulation in the conventional multilayer capacitor, and (b) is a measurement of a sound pressure obtained by simulation in the multilayer capacitor according to the embodiment. It is a graph which shows a result. It is the schematic perspective view which shows the conventional multilayer capacitor, (b) is the top view seen from the Z-axis direction of a coordinate axis, (c) is mounting the multilayer capacitor of (b) on a board. FIG. 7 is a cross-sectional view showing a conventional mounting structure cut along the line DD. It is a schematic diagram of a measuring device of a sound pressure level. It is a graph which shows the actually measured sound pressure level of the noise of the multilayer capacitor in the conventional structure, and (b) is a graph which shows the sound pressure level obtained by simulation. 9 is a graph showing impedance measurement results when a DC bias of 4 V is applied to a conventional multilayer capacitor alone. FIG. 9 is a schematic view of a model of a conventional multilayer capacitor alone, which is used in a simulation of impedance by a finite element method. (A) is a perspective view showing the calculation result of the vibration of the conventional multilayer capacitor alone at 10 kHz as viewed from the symmetry plane side, and (b) shows the calculation result of the vibration of the conventional multilayer capacitor alone at 10 kHz. It is the perspective view seen from the surface side. (A) is a perspective view schematically showing a node of a vibration mode in the conventional multilayer capacitor alone, and (b) is an external electrode on a node of the vibration mode in the conventional multilayer capacitor alone. It is a perspective view which shows the state in which it was formed typically. (A) And (b) is explanatory drawing for demonstrating the mounting structure of the multilayer capacitor which concerns on embodiment. (A)-(d) is a perspective view for explaining another example of the external electrode of the multilayer capacitor which concerns on embodiment. (A) And (b) is explanatory drawing for demonstrating the creeping-up of the molten solder in a 1st external electrode typically.

<Embodiment>
Hereinafter, a multilayer capacitor 10 according to an embodiment of the present invention will be described with reference to the drawings. Further, the multilayer capacitor 10 may have any direction upward or downward, but for convenience, define a rectangular coordinate system XYZ, and define the upper side or the lower side with the positive side in the Z direction as the upper side. Shall be used. In the present embodiment, one of first and second main surfaces 4a and 4b is an upper surface, and the other is a lower surface. In the drawings, the same members and portions are denoted by the same reference numerals, and redundant description is omitted.

  FIG. 1A is a schematic perspective view showing a multilayer capacitor 10 according to an embodiment of the present invention. The multilayer capacitor 10 includes an internal electrode 2 (a first internal electrode 2a and a second internal electrode 2). 2b) are laminated alternately via the dielectric layer 1a, and the rectangular parallelepiped laminates 1 and the external electrodes 3 (the first external electrode 3a and the first external electrode 3a) formed on both side surfaces along the longitudinal direction of the laminate 1 2 external electrodes).

  The laminated body 1 has a first internal electrode 2a and a second internal electrode 2b formed therein, and the first internal electrodes 2a and the second internal electrodes 2b are alternately arranged via the dielectric layer 1a. They are stacked.

  The internal electrode 2 includes a first internal electrode 2a and a second internal electrode 2b, and the first internal electrode 2a and the second internal electrode 2b are opposed to each other at a predetermined interval, As shown in FIG. 1, the first main surface 4a and the second main surface 4a of the multilayer body 1 are alternately arranged at a predetermined interval in the stacking direction via a plurality of dielectric layers 1a in the multilayer body 1. Each is provided so as to be substantially parallel to the main surface 4b.

  The first external electrode 3a is formed at the center of the first side surface 4e along the longitudinal direction (X direction) of the multilayer body 1, and is electrically connected to the first internal electrode 2a extended to the first side surface 4e. The second external electrode 3b is formed at the center of the second side surface 4f along the longitudinal direction (X direction) of the multilayer body 1 and is drawn out to the second side surface 4f. Electrically connected to the second internal electrode 2b.

  The central portion of the first side surface 4e is a region including a bisector that bisects the longitudinal direction of the first side surface 4e along the longitudinal direction of the multilayer body 1, and the first external electrode 3a is It is formed including this region. The central portion of the second side surface 4f is a region including a bisector that bisects the longitudinal direction of the second side surface 4f along the longitudinal direction of the stacked body 1, and includes a second external electrode. 3b is formed including this region. In FIG. 2A, a bisector 8 that bisects the longitudinal direction of the laminated body 1 is shown, and the bisector 8 indicates the longitudinal length of the first side surface 4e or the second side surface 4f. The direction is bisected.

  As described above, the internal electrodes 2 are electrically connected to the different external electrodes 3 for each layer, and when a voltage is applied to the external electrodes 3, the pair of internal electrodes 2 connected to the different external electrodes 3 is formed. The capacitance is generated in the dielectric layer 1a sandwiched between the (first internal electrode 2a and the second internal electrode 2b).

  The multilayer capacitor 10 is mounted on a circuit board (hereinafter, referred to as a board 9) via solder, for example. The substrate 9 is used, for example, for a notebook personal computer, a smartphone, a mobile phone, or the like. For example, an electric circuit to which the multilayer capacitor 10 is electrically connected is formed on the surface. Note that the substrate 9 (substrate 90) is not shown with an insulating layer on the surface.

  4, the substrate electrode 9a and the substrate electrode 9b are provided on the surface on which the multilayer capacitor 10 is mounted, for example, and wiring (not shown) is provided from the substrate electrode 9a, as shown in FIG. Are extended, and wiring (not shown) extends from the substrate electrode 9b. In the multilayer capacitor 10, for example, the first external electrode 3a and the substrate electrode 9a are soldered by soldering, and the second external electrode 3b and the substrate electrode 9b are soldered by soldering.

  As shown in FIG. 1, the multilayer body 1 is formed by stacking a plurality of dielectric layers 1 a to form a substantially rectangular parallelepiped, and has a first main surface 4 a and a second main surface 4 b facing each other, The first and second main surfaces 4a and 4b are orthogonal to the first and second end surfaces 4c and 4d, and the first and second end surfaces 4c and 4d. And a first side face 4e and a second side face 4f facing each other.

  The first end surface 4c and the second end surface 4d facing each other connect the first main surface 4a and the second main surface 4b, and the first side surface 4e and the second side surface 4e facing each other. The side surface 4f connects between the first main surface 4a and the second main surface 4b and between the first end surface 4c and the second end surface 4d. The substantially rectangular parallelepiped shape includes not only a cubic shape or a rectangular parallelepiped shape but also, for example, a rectangular parallelepiped in which a ridge portion is chamfered and the ridge portion has an R shape.

  The laminate 1 is a sintered body obtained by laminating and firing a plurality of ceramic green sheets each having the internal electrode 2 formed on the surface of the dielectric layer 1a. As described above, the laminated body 1 is formed in a substantially rectangular parallelepiped shape, and a plane having a cross section (XY plane) in a direction orthogonal to the laminating direction (Z direction) of the dielectric layer 1a and the internal electrode 2 is rectangular. Has become.

  The dimension of the multilayer capacitor 10 having such a configuration is such that the length in the longitudinal direction (Y direction) is, for example, 0.6 (mm) to 2.2 (mm), and the length in the transverse direction (X direction). However, for example, the length is 0.3 (mm) to 1.5 (mm), and the length in the height direction (Z direction) is, for example, 0.3 (mm) to 1.2 (mm).

  The dielectric layer 1a has a rectangular shape in a plan view from the lamination direction, and the structures of the dielectric layer 1a and the internal electrode 2 shown in FIGS. 1B and 1C are schematic. In practice, a laminate of several to several hundred dielectric layers 1a and internal electrodes 2 is often used, and the thickness per layer is, for example, 0.2 (μm) to 3 (μm). ). The multilayer body 1 includes, for example, a plurality of dielectric layers 1a of 10 (layers) to 1000 (layers) and internal electrodes 2 stacked in the Z direction. The number of the internal electrodes 2 stacked in the multilayer body 1 is appropriately set according to the characteristics of the multilayer capacitor 10 and the like.

The dielectric layer 1a, for example, barium titanate (BaTiO _3), calcium titanate (CaTiO _3), a strontium titanate (SrTiO ₃₎ or calcium zirconate (CaZrO ₃₎ and the like. In addition, it is preferable to use barium titanate as the ferroelectric material having a high dielectric constant for the dielectric layer 1a from the viewpoint of a high dielectric constant.

  As shown in FIG. 2B, the first internal electrode 2a has a lead portion 2aa extending to the first side surface 4e at a central portion on the first side surface 4e side. As shown, it is provided between the dielectric layers 1a, and the lead portion 2aa is disposed so as to be drawn out to the first side surface 4e and exposed to the first side surface 4e.

  Further, as shown in FIG. 2C, the second internal electrode 2b has a lead portion 2ba extending to the second side surface 4f at a central portion on the second side surface 4f side, and the dielectric layer 1a The lead portion 2ba is provided between the second side surface 4f facing the first side surface 4e and is exposed to the second side surface 4f. The first internal electrode 2a and the second internal electrode 2b are not exposed on the first end face 4c and the second end face 4d. In FIG. 2A, the first internal electrode 2a exposed on the first side surface 4e is indicated by a solid line, and the second internal electrode 2b exposed on the second side surface 4f is indicated by a broken line.

As shown in FIG. 2, the first external electrode 3a and the second external electrode 3b are formed such that the lengths of the lead portions 2aa and 2ba in the longitudinal direction (X direction) are the same. The length W1 of the first external electrode 3a in the longitudinal direction is long, and the inductance can be reduced. As shown in FIG. 2, the first external electrode 3a and the second external electrode 3b are formed such that the lengths of the lead portions 2aa and 2ba in the longitudinal direction (X direction) are the same. However, the drawer 2aa and the drawer 2ba may be formed to have different lengths in the longitudinal direction (X direction). The lead portion 2aa can be formed to be larger than the lead portion 2ba in accordance with the length W1 of the first external electrode 3a in the longitudinal direction, and thus, the inductance can be reduced. .

  The conductive material of the internal electrodes 2 (the first internal electrode 2a and the second internal electrode 2b) is, for example, nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), gold (Au), or the like. Or an alloy material containing one or more of these metal materials, such as an Ag-Pd alloy. In addition, the thickness of the first internal electrode 2a and the second internal electrode 2b is, for example, 0.2 (μm) to 2 (μm), and the thickness may be appropriately set according to the application. . Preferably, the first internal electrode 2a and the second internal electrode 2b are formed of the same metal material or alloy material.

  The first external electrode 3a is formed at the center of the first side surface 4e along the length of the laminate, and the second external electrode 3b is formed on the second side along the length of the laminate. Is formed at the center of the side surface 4f of the first side. The first external electrode 3a is formed so as to cover the lead portion 2aa of the first internal electrode 2a drawn to the first side surface 4e, and is electrically connected to the first internal electrode 2a. . In addition, the second external electrode 3b is formed so as to cover the extraction portion 2ba of the second internal electrode 2b extended to the second side surface 4f, and is electrically connected to the second internal electrode 2b. ing. In addition, the first external electrode 3a and the second external electrode 3b can be formed on the first side surface 4e and the second side surface 4f by using, for example, a screen printing method or a roller transfer method.

  As shown in FIG. 1, the first external electrode 3a is formed on the first side surface 4e, and extends from the first side surface 4e to the surfaces of the first main surface 4a and the second main surface 4b, respectively. The second external electrode 3b is formed on the second side surface 4f, and extends from the first side surface 4f to the surfaces of the first main surface 4a and the second main surface 4b, respectively. Is formed.

  Thus, as shown in FIG. 1B, the pair of external electrodes 3 (the first external electrode 3a and the second external electrode 3b) are connected to the surface (the first side surface 4e and the second side electrode 4e) of the multilayer body 1. Side surface 4f, the first main surface 4a, and the second main surface 4b). The pair of external electrodes 3 includes a base electrode 5 and a metal layer 6 covering the base electrode 5.

  The pair of external electrodes 3 (the first external electrode 3a and the second external electrode 3b) include a base electrode 5 and a metal layer 6, and one of the pair of base electrodes 5 is formed from the first side surface 4e. It is formed so as to extend to first main surface 4a and second main surface 4b, and the other extends from second side surface 4f to first main surface 4a and second main surface 4b. Is formed. The metal layer 6 is formed on the surface of the base electrode 5 so as to cover the base electrode 5.

  One of the pair of base electrodes 5 is electrically connected to the first internal electrode 2a extended to the first side surface 4e, and the other is electrically connected to the second internal electrode 2b extended to the second side surface 4f. Connected. The conductive material of the base electrode 5 includes, for example, a metal material such as Cu (copper), nickel (Ni), silver (Ag), palladium (Pd), or gold (Au), or one or more of these metal materials. , For example, an alloy material such as a Cu-Ni alloy. Further, it is preferable that the pair of base electrodes 4 be formed on the surface of the laminate 1 with the same metal material or the same alloy material.

  As described above, the first external electrode 3a includes the base electrode 5 and the metal layer 6, and is provided on the first side surface 4e from the first main surface 4a to the second main surface 4b. The second external electrode 3b includes the base electrode 5 and the metal layer 6, and is provided on the second side surface 4f from the first main surface 4a to the second main surface 4b.

  As shown in FIG. 1C, the base electrode 5 is formed on the surface of the multilayer body 1, and the metal layer 6 is formed so as to cover the entire base electrode 5. 1C, the metal layer 6 includes a first metal layer 6a and a second metal layer 6b, and the first metal layer 6a covers the base electrode 5. It is formed, and the second metal layer 6b is located outside the first metal layer 6a.

  As shown in FIG. 1C, the first metal layer 6a is formed on the surface of the base electrode 5 so as to cover the base electrode 5, and the second metal layer 6b is formed on the surface of the first metal layer 6a. It is formed on the outside.

  As the metal layer 6, for example, a first metal layer 6a and a second metal layer 6b are formed by plating layers. The plating layer of the first metal layer 6a is formed so as to cover the base electrode 5, and the plating layer of the second metal layer 6b is formed so as to cover the plating layer of the first metal layer 6a. It is formed on the surface of the plating layer. The plating layers of the first metal layer 6a and the second metal layer 6b are, for example, a nickel (Ni) plating layer, a copper (Cu) plating layer, a gold (Au) plating layer, a silver (Ag) plating layer, or a tin ( Sn) It is formed of a plating layer or the like. The plating layer of the first metal layer 6a has a thickness of, for example, 5 (μm) to 10 (μm), and the plating layer of the second metal layer 6b has a thickness of, for example, 3 (μm) to 5 (μm). (Μm). In the multilayer capacitor 10, for example, the first metal layer 6a is a nickel (Ni) plating layer, and the second metal layer 6b is a tin (Sn) plating layer.

  As shown in FIG. 3, the length of the laminate 1 along the longitudinal direction is L1, the length of the laminate 1 along the lateral direction is L2, and the first external electrodes along the longitudinal direction of the laminate 1 The length of 2a is W1, and the length of the second external electrode 2b along the longitudinal direction of the laminate 1 is W2. In the present embodiment, L1> L2. In the multilayer capacitor 10, the first external electrode 3 a is formed such that the length W 1 of the first external electrode 2 a along the longitudinal direction of the multilayer body 1 is 0.5 of the length L 1 along the longitudinal direction of the multilayer body 1. The length W2 of the second external electrode 3b along the longitudinal direction of the multilayer body 1 is longer than the length L1 of the second external electrode 3b along the longitudinal direction of the multilayer body 1. Is formed so as to be smaller than 0.5 times.

  The length W1 of the first external electrode 3a is larger than 0.5 as a ratio (W1 / L1) to L1 from the viewpoint of mounting reliability, and the length W2 of the second external electrode 3b is From the viewpoint of reducing the vibration of the board when mounted on the board, the ratio (W1 / L1) to L1 is preferably smaller than 0.5, preferably smaller than 0.35. In addition, the lead portion 2aa of the first internal electrode 2 has the first exposed portion on the first side surface 4e in that the exposed portion on the first side surface 4e can maintain the symmetry of vibration and reduce elements that vibrate the board during mounting. It is preferable to include a bisector 8 in the longitudinal direction of the side surface 4e, and the lead portion 2ba of the second internal electrode 2b is an element that maintains the symmetry of vibration and vibrates the substrate during mounting. It is preferable that the exposed portion of the second side face 4f includes the bisector 8 in the longitudinal direction of the second side face 4f from the viewpoint that the second side face 4f can be reduced.

  The mounting structure of the multilayer capacitor 10 of the present embodiment will be described below.

FIG. 4A shows a state in which the multilayer capacitor 10 is mounted on the substrate 9. FIG. 4B shows a state in which the multilayer capacitor 10 is mounted on the substrate 9 in FIG. It is sectional drawing cut | disconnected by the -C line.

  In the mounting structure of the multilayer capacitor 10 of the present embodiment, as shown in FIG. 4, the first external electrode 3a of the multilayer capacitor 10 and the substrate electrode 9a on the substrate 9 are connected to the second external electrode 9a. The electrode 3b and the substrate electrode 9b on the substrate 9 are joined via a conductive material such as solder. In the present embodiment, the first main surface 4b of the multilayer capacitor 10 and the mounting surface of the substrate 9 face each other. Between the first external electrode 3a and the substrate electrode 9a and between the second external electrode 3b and the substrate electrode 9b, for example, the solder of the solder printed on the substrate electrode 9a and the substrate electrode 9b The fillet layer 7 is formed.

  On the other hand, as shown in FIG. 6A, a conventional multilayer capacitor 100 includes a substantially rectangular parallelepiped multilayer body 101 and external electrodes 103 provided on outer surfaces of both ends thereof. FIG. 6B is a plan view viewed from the z-axis direction in FIG. FIG. 6C is a cross-sectional view taken along line DD of FIG. 6B, and shows a conventional mounting structure of the multilayer capacitor 100 mounted on the substrate 9.

  As shown in FIG. 6C, the laminated body 101 is formed by alternately laminating the dielectric layers 101a and the internal electrodes 102. The internal electrode 102 is electrically connected to the external electrode 103 at one of both ends of the multilayer body 101. In the multilayer capacitor 100, the dielectric layer 104, the internal electrodes 102, and the external electrodes 103 are made of the same material as the multilayer capacitor 10 of the present embodiment.

  In the conventional multilayer capacitor 100, as shown in FIG. 6C, the external electrode 103 and the substrate electrodes 90a and 90b on the substrate 90 are fixed in a state where they are electrically connected via solder. You. The solder fillet layer 70 fills the gap between the external electrode 103 and the substrate electrodes 90a and 90b, and further covers the external electrode 103 that covers the side surface of the end of the laminated body 101 and part of the upper and lower main surfaces. ing.

  When an AC voltage is applied to the multilayer capacitor 100 mounted in such a state together with a DC voltage (DC bias), a piezoelectric property is generated in the dielectric layer 101a due to an electrostrictive effect of the DC voltage, and Piezoelectric vibration is generated by the voltage. Further, the piezoelectric vibration of the multilayer capacitor is transmitted to the substrate 90 via the solder fillet layer 70, and the substrate 90 vibrates. When the substrate 90 resonates at a resonance frequency in an audible range, a vibration sound called "squeal" is generated. I do.

  As an example, the noise when the conventional multilayer capacitor 100 was mounted on the substrate 90 was measured. In the measurement, a 1005 type multilayer capacitor (capacitance 10 μF, rated voltage 4 V, hereinafter also referred to as an evaluation component) was used as the multilayer capacitor 100, and a 100 × 40 mm, 0.8 mm thick FR4 (Flame retardant Type 4) was used as the substrate 90. A glass epoxy substrate made of a material was used. The multilayer capacitor 100 was mounted at the center of the substrate 90 using Sn-Ag-Cu (SAC) -based solder. After mounting the evaluation component on the substrate 90, the mounting state was observed with a microscope, and it was confirmed that the height of the solder fillet layer 70 was 460 μm and the distance C between the substrate 12 and the evaluation component was 45 μm.

The measurement was performed using a sound pressure level measuring device as shown in FIG. A mounting substrate 21 (hereinafter, also simply referred to as a mounting substrate) in which evaluation components are mounted on a substrate 90 is placed in an anechoic box 22 (inner size 600 × 700 mm, height 600 mm), and is perpendicular to the substrate 90 from the center of the substrate 90. The sound collecting microphone 23 was installed at a position separated by 3 mm in any direction. The sound was collected by the sound collecting microphone 23, and the sound pressure level of the collected sound was measured by the amplifier 24 and the FET analyzer 25 (DS2100 manufactured by Ono Sokki). FIG. 8A shows a result of a noise measurement when a DC voltage of 4 V (DC bias) and an AC voltage of 20 Hz to 20 kHz and 1 Vp-p are applied to the multilayer capacitor 100.

  In FIG. 8A, the sound pressure level is indicated by an A-weighted sound pressure level (dBA). 0 dBA of the A-weighted sound pressure level corresponds to the lowest sound pressure level that can be heard by humans as sound. The A-weighted sound pressure level is a sound pressure level weighted for each frequency so as to approximate human hearing, and is described in the standard of a sound level meter (sound level meter) (JISC1509-1: 2005).

  Next, a simulation was performed on the piezoelectric vibration of the multilayer capacitor 100 alone. First, the impedance was measured with a DC voltage (DC bias) of 4 V applied to the evaluation component. FIG. 9 shows the measurement results.

  In addition, impedance simulation was performed using a model based on the evaluation component (dielectric material: barium titanate-based material, internal electrode: Ni, external electrode: Cu, laminated body dimensions: 1100 × 620 × 620 μm, external electrode thickness 20 μm). went. For the piezoelectric resonance peak existing in the frequency region of 2 GHz or more, fitting of the material parameters of the evaluation component was performed so as to match the actually measured value. FIG. 10 schematically shows a model of the finite element method used for the simulation of impedance. This is a 1/8 model in which symmetry is taken into consideration, and the two cross sections appearing on the front surface in FIG. 10 and the lower cross section are symmetry planes.

Table 1 shows parameters (elastic stiffness c _ij and piezoelectric constant e _ij ) of the dielectric layer 101a obtained by the fitting. Table 1 shows that the material properties of the dielectric layer 101a of the evaluation component have anisotropy (c ₁₁ > c ₃₃ , c ₂₂ > c ₃₃ ). This is considered to be due to the compressive stress caused by the internal electrode 102.

  Based on the parameters of the obtained dielectric layer 101a and the mounting substrate 21 (the solder fillet layer height is 460 μm, the distance between the substrate and the evaluation component is 45 μm) used for the measurement, a model of the mounting structure is created and simulation is performed. Was. FIG. 8B is a graph showing the result of converting the vibration amplitude of the mounting board 21 obtained by the simulation into the A-weighted sound pressure level. Since the frequency characteristic of the sound squeal depends on the vibration characteristic of the evaluation component and the resonance mode of the mounting board 21, the simulation result shown in FIG. Both the sound pressure level and the frequency characteristics were in good agreement with the actually measured values shown in FIG. Therefore, by performing a simulation using these parameters, it is possible to confirm the influence on the noise when the mounting structure or the structure of the evaluation component itself is changed.

  Also, using the obtained parameters, the vibration mode of the evaluation component in the audible frequency range (20 Hz to 20 kHz) was calculated using the above-described ８ model. FIG. 11 shows the calculation result at 10 kHz. Note that FIG. 11A is viewed from the inside of the ８ model (the side of symmetry), and FIG. 11B is the opposite side of FIG. 11A, that is, the outside of the ８ model. Seen from the side (front side). Here, the broken line indicates the shape of the evaluation component in a state where no AC voltage is applied, and the solid line indicates the shape of the evaluation component in a state where the evaluation component is maximally displaced by the AC voltage.

  From this result, as shown in FIG. 12 schematically showing the entire evaluation component, the vibration amplitude is set at the center of each side of the pair of surfaces located in the stacking direction of the evaluation component. It can be seen that there is an area 15 that is small, that is, a node that can be called a node of vibration (hereinafter, referred to as a node portion). Since the multilayer capacitor 10 of the present embodiment is equivalent to an evaluation component, such a node 15 exists in the multilayer capacitor 10 of the present embodiment like the evaluation component. Therefore, it is considered that, by fixing the multilayer capacitor 10 to the substrate 9 at the node portion 15, the propagation of the piezoelectric vibration of the multilayer capacitor 10 to the substrate 9 is suppressed, and the noise can be reduced.

  In the present embodiment, as shown in FIG. 12 (b), the first external electrode 3a and the second external electrode 3b are provided on such a node 15 present in the multilayer capacitor 10. In addition, the multilayer capacitor 10 can be fixed to the substrate 9 at the nodal portions 15. The first external electrode 3a is formed so as to include a node 15 from the first main surface 4a or the second main surface 4b to the first side surface 4e, and the second external electrode 3b is , From the first main surface 4a or the second main surface 4b to the second side surface 4f so as to include the knotted portion 15, or from the first main surface 4a or the second main surface 4b to the second side surface. It is formed so as to be located inside the knot-like portion 15 over 4f.

  Using the following models of the multilayer capacitor 10 of the present embodiment and the conventional multilayer capacitor 100, a simulation of noise was performed. In this simulation, the height of the solder fillet layer was changed from 460 (μm) to 400 (μm) with respect to the conventional multilayer capacitor 100. The multilayer capacitor 10 has a length W1 of the first external electrode 3a of 650 (μm), a length of the second external electrode 3b of 280 (μm), P1 and P2 of 80 (μm), and a solder fillet. The height H0 of the layer was 400 (μm), and the distance C to the substrate was 45 (μm). In the multilayer capacitor 100, the height H0 of the solder fillet layer was 400 (μm), and the distance C from the substrate was 45 (μm). In the multilayer capacitor 10 and the multilayer capacitor 100, the dielectric material was a barium titanate-based material, the internal electrode was Ni, the external electrode was Cu, the multilayer body dimensions were 1100 × 620 × 620 μm, and the external electrode thickness was 70 μm.

FIG. 5A is a simulation result of the sound squeal of the mounting structure of the conventional multilayer capacitor 100, and FIG. 5B is a simulation result of the sound squeal of the mounting structure of the multilayer capacitor 10 of the present embodiment. is there.

  When the obtained results are averaged over a frequency range of 5 Hz to 20 kHz, the average value of the sound pressure level in the multilayer capacitor 10 of the present embodiment is reduced by about 10 dBA compared to the mounting structure of the conventional multilayer capacitor 100. It became. Further, the first external electrode 3a is formed so as to include the knot-like portion 15, and is larger than 0.5 times the length along the longitudinal direction of the laminate 1, that is, the laminate 1 Is formed so as to be larger than half the length of the multilayer capacitor 10, the multilayer capacitor 10 can be stably mounted on the substrate 9. Therefore, the multilayer capacitor 10 can suppress “squeal” and improve the mounting stability and the mounting reliability.

  For example, when the length W1 of the first external electrode 3a and the length W2 of the second external electrode 3b are smaller than 0.5 times the length L1 along the longitudinal direction of the multilayer body 1, solder joining is performed. When the reflow is performed, the multilayer capacitor floats due to the surface tension of the molten solder, and one end in the longitudinal direction of the multilayer body 1 may be inclined to the substrate 9 side to be soldered in contact with the substrate. . When the multilayer capacitor and the substrate 9 are soldered in contact with each other, the vibration of the multilayer capacitor is directly transmitted to the substrate 9, and the effect of suppressing "sound" tends to be reduced.

  However, although the multilayer capacitor 10 floats due to the surface tension of the molten solder during reflow for performing solder joining, the length W1 of the first external electrode 3a is larger than half the length L1 of the multilayer body 1. As a result, the multilayer capacitor 10 can be mounted horizontally with respect to the substrate 9 with good balance in the horizontal direction. That is, by forming the length of the first external electrode 3a to be longer than half the length L1 of the multilayer body 1, the end of the multilayer capacitor 10 in the longitudinal direction is less likely to contact the substrate 9. The multilayer capacitor 10 is joined to the substrate electrodes 9a and 9b in a state corresponding to a so-called three-point support state, and mounting stability is improved. Therefore, the end of the multilayer capacitor 10 in the longitudinal direction is less likely to contact the substrate, and the vibration of the multilayer capacitor 10 is less likely to be directly transmitted to the substrate 9.

  When the length W1 of the first external electrode 3a and the length W2 of the second external electrode 3b are smaller than 0.5 times the length L1 along the longitudinal direction of the multilayer body 1, the first Of the junction between the external electrode 3a and the substrate electrode tends to be unstable, and the junction of the junction between the second external electrode 3b and the substrate electrode tends to be unstable. There is a risk that the multilayer capacitor may be joined with an inclination to the substrate, that is, one end of both ends in the longitudinal direction of the multilayer capacitor is inclined to the substrate 9 side. In such a bonding state, for example, when the substrate 9 warps due to the influence of temperature or the like, the substrate easily comes into contact with the longitudinal end of the multilayer capacitor, and the vibration of the multilayer capacitor is directly applied to the substrate 9. The effect of suppressing the “squeal” tends to decrease.

  However, since the multilayer capacitor 10 is formed so that the length of the first external electrode 3a is larger than half the length L1 of the multilayer body 1, the horizontal balance is obtained and the It is easy to mount horizontally. Even if the substrate 9 warps due to the influence of temperature or the like, it becomes difficult for the substrate 9 to come into contact with the longitudinal end of the multilayer capacitor 10. Therefore, in the multilayer capacitor 10, it is difficult for the substrate 9 to come into contact with the longitudinal end, and it is difficult for the vibration of the multilayer capacitor 10 to be directly transmitted to the substrate 9.

  Further, for example, when the length W1 of the first external electrode 3a and the length W2 of the second external electrode 3b are larger than 0.5 times the length L1 along the longitudinal direction of the multilayer body 1, Although the mounting stability and the mounting reliability are improved, the effect of suppressing “sound noise” tends to decrease.

In the present embodiment, in the above-described simulation, the ratio (W2 / L1) of W2 (280 μm) to L1 (1100 μm) was set to 0.25.
Even so, the sound pressure level can be reduced by about 10 dBA compared to the related art. Further, W1 / L1 is preferably larger than 0.5 from the viewpoint of mountability.

  In the mounting structure of the present embodiment, the multilayer capacitor 10 does not directly contact the mounting surface of the substrate 9. In particular, in the sense of lowering the sound pressure level, the ratio (C / H1) of C, which is the distance between the multilayer capacitor 10 and the mounting surface of the substrate 9, to H1 (the height of the multilayer capacitor 10 in the stacking direction of the multilayer body 1). ) Is preferably 0.05 or more.

  Furthermore, according to the result of the vibration mode analysis of the evaluation component described above, the vibration amplitude is large near the center of each surface constituting the evaluation component. Therefore, on the first main surface 4a, the length P1 of the first external electrode 3a in the lateral direction of the multilayer body 1 is preferably not more than 0.25 as a ratio (P1 / L2) to L2. The length P2 of the second external electrode 3b is preferably not more than 0.25 as a ratio (P2 / L2) to L2.

  In the present embodiment, for example, in the case of the multilayer ceramic capacitor 10 in which a ferroelectric material such as barium titanate is used for the dielectric layer and a metal material such as Ni, Cu, Ag, and Ag-Pd is used for the internal electrode It is particularly preferably used. This embodiment can exert a remarkable effect particularly in the multilayer capacitor 10 of 1005 type or more.

  Further, as the external electrode 3, for example, in many multilayer capacitors, an external electrode obtained by plating an underlying electrode made of Cu with Ni and Sn is used, but only the plated electrode is used without using the underlying electrode. It can also be suitably used for those having the external electrode 3 configured. When the external electrode 3 having the base electrode is directly joined to the substrate electrodes (9a, 9b) of the substrate 9 via solder or the like, the base electrode made of Cu is relatively soft, so that the base electrode reduces the piezoelectric vibration of the laminated body 1. It absorbs and attenuates to some extent, and the noise is suppressed. On the other hand, when the external electrode 3 is composed of only the plating electrode, the piezoelectric vibration of the multilayer body 1 is not attenuated by the external electrode 3, and the noise becomes remarkable. Therefore, when the present embodiment is applied to a device having an external electrode composed of only a plating electrode, a greater noise suppression effect can be obtained.

  In the multilayer capacitor 10, one of the first external electrode 3a and the second external electrode 3b is electrically connected to a power supply line on the substrate, and the other is electrically connected to a ground line on the substrate. Further, the ground line is often connected to a ground electrode having a large area on the substrate, and the ground line and the ground electrode tend to have a large heat capacity. For example, as shown in FIG. 13, the first external electrode 3a is connected to a substrate electrode 9a electrically connected to a power supply line, and the second external electrode 3b is electrically connected to a ground line. It is connected to the substrate electrode 9b. The substrate electrode 9a is electrically connected to the power supply line, and the substrate electrode 9b is electrically connected to the ground electrode 11 via the via conductor layer 12. Note that the power supply line is electrically connected to the semiconductor element 13 via the bump 14.

  For example, when the electrode lengths W1 and W2 (electrode widths) along the longitudinal direction of the stacked body of the first external electrode 3a and the second external electrode 3b are the same and the same, the solder reflow At this time, due to the heat capacity of the ground line, the balance of the melting of the solder in the first external electrode 3a and the second external electrode 3b tends to be lost. That is, when the reflow condition is set with reference to the ground line, the ground line side has a large heat capacity, so that the temperature does not easily rise, the melting time of the solder is short, and the solder joint becomes insufficient. On the other hand, on the power supply line side, the temperature tends to rise, and the solder joint proceeds too much, and the joint tends to become brittle. Therefore, if an electrode having a large heat capacity is provided on the power supply line side and an electrode having a small heat capacity is provided on the ground line side, the balance of the heat capacity becomes uniform, the jointability of the solder becomes uniform, and the joint reliability is improved.

In the multilayer capacitor 10 of the present embodiment, the first external electrode 3a and the second external electrode 3b have different electrode lengths W1 and W2, and the first external electrode 3a has a laminated length W1. The length W2 of the second external electrode 3b is larger than 0.5 times the length along the longitudinal direction of the body 1 and smaller than 0.5 times the length of the laminate 1 along the longitudinal direction. Has become. Therefore, in the multilayer capacitor 10, the first external electrode 3 a is joined to the power supply line side and the second external electrode 3 b is joined to the ground line side, so that the joining property of the solder becomes uniform and the joining reliability is improved. The performance is improved. In other words, in the multilayer capacitor 10, by making the electrode length W1 of the first external electrode 3a different from the electrode length W2 of the second external electrode 3b, the bondability of the solder becomes uniform, and the bonding reliability is improved. Performance can be improved.

  Further, the second external electrode 3b is electrically connected to the ground line and the ground electrode, and the first external electrode 3a having a large electrode width has a length in the longitudinal direction (X direction) of the lead portion 2aa. By increasing the length in accordance with the length W1 of the first external electrode 3a, the cross-sectional area of the lead portion 2aa is increased and the inductance can be reduced.

  In the multilayer capacitor 10, the shape of the first external electrode 3a on the first side surface 4e and the shape of the second external electrode 3b on the second side surface 4f are not limited to rectangular shapes. The length of the first external electrode in the longitudinal direction may be greater on the first side surface 4e on the end side than on the center in the stacking direction (Z direction) of the stacked body 1. In the first external electrode 3a, the width of the electrode located at the center in the stacking direction (Z direction) on the first side surface 4e is smaller than the width of the electrodes located at both ends. That is, the first external electrode 3a may have a region where the width of the electrode is reduced in the center of the first side surface 4e in the stacking direction (Z direction).

  Similarly, the length of the second external electrode 3b in the longitudinal direction may be larger at the end side than at the center in the stacking direction (Z direction) on the second side surface 4f. In the second external electrode 3b, the width of the electrode located at the center in the stacking direction (Z direction) on the second side surface 4f is smaller than the width of the electrodes located at both ends. That is, the second external electrode 3b may have a region where the width of the electrode is reduced in the center of the second side surface 4f in the stacking direction (Z direction). Hereinafter, the shapes of the first external electrodes 3a1 to 3a4 will be described. Note that the same effects can be obtained when the shapes of the first external electrodes 3a1 to 3a4 are applied to the second external electrodes 3b, respectively.

  Further, the longitudinal length of the first external electrode 3a at the central portion may be the same as the longitudinal length W2 of the second external electrode 3b. By making the longitudinal length of the first external electrode 3a at the central portion the same as the longitudinal length W2 of the second external electrode 3b, the amount of solder can be made the same, and the balance of the solder joints on both side surfaces can be made. Can be taken.

  As described above, in the multilayer capacitor 10, as shown in FIG. 14, the length of the first external electrode 3a (the width of the first external electrode 3a) along the longitudinal direction of the multilayer body 1 is 1 is different between the central portion in the stacking direction (Z direction) and both end portions (the first main surface 4a side and the second main surface 4b side), and has a narrow electrode width region in the central portion. I have. In such a case, the maximum length of the first main surface 4b and the second main surface 4a is defined as the length W1 of the first external electrode 3a in the longitudinal direction.

  Since the first external electrodes 3a1 to 3a4 have a narrow electrode width region in the thickness direction (Z direction) of the multilayer body 1, solder creeping up is suppressed in the narrow electrode width region, and the vibration amplitude is large. The solder fillet layer 7 is less likely to be formed at the center of the first side surface 4e, and the vibration of the multilayer capacitor 10 is less likely to be transmitted to the substrate. Further, the electrode width is larger than the central portion at both end sides (the first main surface 4a side and the second main surface 4b side) in the thickness direction (Z direction) of the laminate 1, and The bonding strength with the substrate electrode 9a can be ensured. Therefore, the multilayer capacitor 10 can secure the bonding strength and improve the effect of suppressing “squeal”.

  As shown in FIG. 14A, the first external electrode 3a1 has a rectangular central portion cut out, and has a concave portion in the central portion of both sides of the rectangular shape. That is, the first external electrode 3a1 has a shape having a concave portion at the center on both sides of the first external electrode 3ag. As shown in FIG. 14B, the first external electrode 3a2 has a rectangular central portion cut out, and both corners 17 located inside the cut-out region have rounded shapes. Have.

  As shown in FIG. 15A, the first external electrode 3a2 has both rounded corners 17 located inside the cut-out region. For example, when the first external electrode 3a2 is subjected to reflow for soldering, In addition, the molten solder 16 creeps up along the rounded portion of the region sandwiched between the corners located in the lower part in the Z direction, so that the molten solder 16 tends to have a circular shape, and the surface tension effect increases. The first external electrode 3a2 has a narrow electrode width region at the center, and the molten solder 16 is hardly wet in the narrow electrode width region at the center due to the surface tension of the molten solder 16, and the molten solder 16 crawls. The rise is suppressed. Therefore, in the multilayer capacitor 10, the solder fillet layer 7 is less likely to be formed at the central portion of the first side surface 4 e having a large vibration amplitude or above the central portion, and the vibration is less likely to be transmitted to the substrate 9.

  Further, as shown in FIG. 14C, the first external electrode 3a3 has a rectangular central portion cut off, and further, both corners 17 located inside the cut-out region are formed. Both the rounded corners and the corners located outside the cut-out area are rounded. The first external electrode 3a3 has the same effect as the first external electrode 3a2.

  Further, as shown in FIG. 14D, the first external electrode 3a4 has an electrode width gradually increasing from the center toward both ends (the first main surface 4a side and the second main surface 4b side). Has become. That is, the first external electrode 3a4 has both sides curved inward, has a narrow electrode width region at the center, and the electrode width gradually increases from the center toward the top and bottom. .

  As shown in FIG. 15 (b), the first external electrode 3a4 has a curved portion 18 (roundness) that is concave inward on both sides. The molten solder 16 creeps up along the curved portion 18 in the region sandwiched by the curved portions 18, so that the molten solder 16 tends to be circular, and the surface tension effect increases. The first external electrode 3a4 has a narrow electrode width region at the center, and the molten solder 16 is less likely to wet in the narrow electrode width region at the center due to the surface tension of the molten solder 16, and the molten solder 16 crawls. The rise is suppressed. Therefore, in the multilayer capacitor 10, the solder fillet layer 7 is less likely to be formed at or above the center of the first side surface 4 e having a large vibration amplitude, and the vibration is less likely to be transmitted to the substrate 9. Further, the shape of the curved portion 18 is appropriately set according to the amount of the molten solder and the like.

  The present invention is not particularly limited to the embodiments described above, and various modifications and improvements can be made within the scope of the present invention.

DESCRIPTION OF SYMBOLS 1 Laminated body 1a Dielectric layer 2 Internal electrode 2a First internal electrode 2aa Leader 2b Second internal electrode 2ba Leader 3 External electrode 3a First external electrode 3b Second external electrode 4a First main surface 4b Second main surface 4c First end surface 4d Second end surface 4e First side surface 4f Second side surface 5 Base electrode 6 Metal layer 6a First metal layer 6b Second metal layer 7 Solder fillet layer 82, etc. Branch line 9 Substrate 9a, 9b Substrate electrode 10 Multilayer capacitor 11 Ground electrode 12 Via conductor 13 Semiconductor element 14 Bump 15 Knot-like portion 16 Molten solder 17 Corner portion 18 Curved portion

Claims (3)

A rectangular parallelepiped laminate in which a first internal electrode and a second internal electrode are laminated via a dielectric layer;
A first external electrode formed at the center of a first side surface along the longitudinal direction of the laminate and connected to the first internal electrode;
A second external electrode formed at a central portion of a second side surface along the longitudinal direction of the laminate, and connected to the second internal electrode;
The ratio of the length of the first external electrode along the longitudinal direction of the laminate to the length of the laminate along the longitudinal direction of the laminate is greater than 0.5,
A ratio of the length of the second external electrode along the longitudinal direction of the laminate to the length of the laminate along the longitudinal direction of the laminate is less than 0.35. Multilayer capacitor. The ratio of the length of the first external electrode on the main surface of the laminate along the transverse direction of the laminate to the length of the laminate along the transverse direction of the laminate is 0. 25 or less,
The ratio of the length of the second external electrode on the main surface of the laminate along the transverse direction of the laminate to the length of the laminate along the transverse direction of the laminate is 0. The multilayer capacitor according to claim 1, wherein the number is 25 or less. A substrate on which the multilayer capacitor according to any one of claims 1 and 2 is mounted is arranged such that a lower surface of the multilayer capacitor and a mounting surface of the substrate face each other with a space therebetween,
The ratio of the length of the interval along the stacking direction of the stack to the height of the stack along the stacking direction of the stack is 0.05 or more. Mounting structure.