JP2020021966A - Joint method of semiconductor chip and joint device of semiconductor chip - Google Patents

Abstract

To provide a joint method of a semiconductor chip capable of mounting the chip on a board while restraining heat deformation of the semiconductor chip.SOLUTION: In a joint method of a chip, a holding mechanism holds a second region, around a first region of a sheet, where the reverse face of the chip is bonded. Relative position of the holding mechanism can be changed for the sheet, in a direction not perpendicular to the front face of the board. In the joint method of the chip, the reverse face of the chip is pressed via the region and the front face of the chip is bonded to the front face of the board, in a state where the second region in the sheet is held by the holding mechanism. In the joint method of the chip, adhesion force to the reverse face of the chip is lowered in the first region of the sheet. In the joint method of the chip, pressing of the reverse face of the chip via the first region of the sheet is released in a state where the adhesion force to the reverse face of the chip is lowered, and the sheet is exfoliated from the reverse face of the chip.SELECTED DRAWING: Figure 5

Description

  Embodiments relate to a method for bonding semiconductor chips and a device for bonding semiconductor chips.

  In order to obtain a semiconductor device, a semiconductor chip may be mounted and bonded on a substrate. At this time, it is desired that the semiconductor chip be mounted on the substrate while suppressing thermal deformation of the semiconductor chip and suppressing displacement of a joint caused by a difference in thermal expansion coefficient between the semiconductor chip and the substrate.

JP 2008-535275 A JP 2014-103291 A

  In one embodiment, a semiconductor chip is placed on a substrate while suppressing thermal deformation of the semiconductor chip and suppressing / reducing bonding displacement and residual stress after bonding due to a difference in thermal expansion coefficient between the semiconductor chip and the substrate. It is an object of the present invention to provide a semiconductor chip bonding method and a semiconductor chip bonding apparatus that can be mounted on a semiconductor chip.

  According to one embodiment, a method for bonding chips is provided. In the chip joining method, the holding mechanism holds the second region around the first region of the sheet to which the back surface of the chip is adhered. The holding mechanism can change its position relative to the sheet in a direction that is not perpendicular to the surface of the substrate. In the chip bonding method, the back surface of the chip is pressed through the first region while the second region of the sheet is held by the holding mechanism, and the surface of the chip is brought into close contact with the surface of the substrate. In the chip bonding method, the adhesive strength to the back surface of the chip in the first region of the sheet is reduced. In the chip bonding method, the pressing of the chip back surface through the first region of the sheet is released in a state where the adhesive force to the chip back surface is reduced, and the sheet is peeled from the chip back surface.

FIG. 4 is an exemplary sectional view showing the method of bonding semiconductor chips according to the embodiment; FIG. 1 is a cross-sectional view illustrating a configuration of a semiconductor chip bonding apparatus according to an embodiment. FIG. 4 is an exemplary sectional view showing the method of bonding semiconductor chips according to the embodiment; FIG. 4 is an exemplary sectional view showing the method of bonding semiconductor chips according to the embodiment; FIG. 4 is an exemplary sectional view showing the method of bonding semiconductor chips according to the embodiment; FIG. 4 is an explanatory view showing a mechanism of plasma activated bonding in the embodiment. Sectional drawing which shows the joining method of the semiconductor chip concerning the modification of embodiment.

  Hereinafter, a method for bonding semiconductor chips according to an embodiment will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited by this embodiment.

(Embodiment)
A method for bonding semiconductor chips according to the embodiment will be described. The semiconductor chip bonding method is a method for mounting a semiconductor chip on a substrate.

  For example, in order to obtain a stacked device, it is necessary to stack a plurality of chips in a device packaging process. At this time, when chips having different chip sizes are mixed in a plurality of chips to be stacked, it is difficult to obtain a stacked device by joining the two substrates and then collectively separating the chips. Therefore, it is necessary to divide one substrate (semiconductor substrate) of the two substrates into a plurality of semiconductor chips and then mount the semiconductor chip on the other substrate.

  Alternatively, in order to obtain an optical device, it is necessary to laminate an optical element on a template substrate. At this time, when the substrate size of the optical element substrate to be divided into a plurality of optical elements and the substrate for the template substrate to be divided into a plurality of template substrates are different, the two substrates are joined to each other. Then, a useless area that does not contribute to obtaining an optical device is generated. For this reason, it is necessary to divide one optical element substrate (semiconductor substrate) of the two substrates into a plurality of semiconductor chips and then mount the chips on the other substrate.

  At this time, let us consider a case where conduction is established by interposing a solder bump between the pad electrode of the semiconductor chip and the pad electrode of the substrate.

  In this case, it is necessary to heat the semiconductor chip and the substrate to a high temperature (for example, 350 to 400 ° C.) in order to solder-bond the solder bumps to the pad electrodes of the semiconductor chip and the pad electrodes of the substrate. The substrate may be thermally deformed. When the semiconductor chip and the substrate are formed of materials having different coefficients of thermal expansion from each other, if the semiconductor chip and the substrate are thermally deformed, the alignment accuracy of the bonding between the pad electrode of the semiconductor chip and the pad electrode of the substrate is likely to be reduced, and the semiconductor chip and the substrate are likely to be mutually deformed. There is a possibility that conduction cannot be established.

  In this embodiment, as shown in FIGS. 1 to 5, the semiconductor chip is mounted on the substrate at room temperature by plasma-activated bonding of the semiconductor chip to the substrate. That is, the surface of the semiconductor chip and the surface of the substrate are activated by plasma, respectively, and the semiconductor chip is brought into close contact with the substrate, whereby the semiconductor chip is temporarily bonded to the substrate at room temperature. Thereafter, the semiconductor chip is heated and pressurized to be permanently bonded to the substrate. Since the bonding position of the semiconductor chip on the substrate can be substantially fixed by the temporary bonding, the accuracy of the alignment of the bonding of the semiconductor chip can be easily improved in the main bonding.

  When electrical connection is required between the semiconductor chip and the substrate, as in the case of bonding the semiconductor chip and the substrate using the above-described solder vap, a part of the surface of the semiconductor chip and the substrate to be activated is provided. A conductor electrode may be provided, and electrical connection between conductors may be made separately from the joining by plasma activation. For example, a solder electrode surrounded by an insulating film (silicon oxide film) is prepared on the surface of each of the semiconductor chip and the substrate. After joining the insulating films of the semiconductor chip and the substrate, the solder electrodes may be heated to melt the solder electrodes, and the solder electrodes may be joined to each other.

  1 (a) to 1 (g), 3 (a) to 3 (c), and 4 (a) to 4 (c) are process cross-sectional views showing a method for bonding semiconductor chips. FIG. 2A is a cross-sectional view illustrating a configuration of a semiconductor chip bonding apparatus. FIG. 2B is a bottom view of the pressing head in the joining device.

  Note that activation in plasma-activated bonding refers to terminating the surface of the semiconductor chip and the surface of the substrate with hydroxyl groups, respectively, so that water molecules are easily bonded. Further, the plasma activated bonding is sometimes called oxide film bonding (Oxide Bonding), fusion bonding (Fusion Bonding), spontaneous bonding, or the like.

  In the method of bonding semiconductor chips, the steps shown in FIGS. 1A to 1D and the steps shown in FIG. 1E to FIG. Will be

  In the step shown in FIG. 1A, a semiconductor substrate 10 to be divided into a plurality of semiconductor chips 11-1 to 11-6 (see FIG. 1B) is prepared. The portion of the semiconductor substrate 10 near the surface 10a (excluding the pad electrode) is formed of a material mainly containing any of silicon, silicon oxide, a III-V semiconductor, and an oxide of a III-V semiconductor. ing. When the portion of the semiconductor substrate 10 near the surface 10a is formed of a material containing silicon oxide as a main component, a region deeper than the portion of the semiconductor substrate 10 near the surface 10a contains a material containing silicon as a main component or III. It may be formed of a material containing a group V semiconductor as a main component. When the portion of the semiconductor substrate 10 near the surface 10a is formed of a material mainly containing an oxide of a III-V semiconductor, the region of the semiconductor substrate 10 deeper than the portion near the surface 10a is a III-V semiconductor. May be formed of a material mainly containing. III-V semiconductors include, for example, InP, GaAs, and GaN.

  The surface 10a of the semiconductor substrate 10 can have a flatness of 1 nm or less, more preferably 0.3 nm or less. If the flatness of the surface 10a becomes 0.3 nm or less, the flatness of the surface 11a of each singulated semiconductor chip 11 also becomes 0.3 nm or less. When the flatness of the surface 11a of each semiconductor chip 11 becomes 0.3 nm or less, voids are formed at the bonding interface when the semiconductor chip 11 is temporarily bonded to the substrate 20 in the main bonding step (the step shown in FIG. 5D). (Air gap) is formed, and it can be suppressed that the joining strength of the main joining does not reach the required strength.

  For example, by polishing the surface 10a of the semiconductor substrate 10 by a CMP method or the like, the flatness of the surface 10a can be reduced to 1 nm or less, or 0.3 nm or less.

  Next, the back surface 10b of the prepared semiconductor substrate 10 is attached to the front surface 1a of the adhesive sheet (dicing tape) 1. That is, the semiconductor substrate 10 is attached to the adhesive sheet 1 with the surface 10a exposed (face-up state). The adhesive sheet 1 has an adhesive formed on its surface 1a. As the adhesive, for example, an adhesive having UV curability can be used. The adhesive sheet 1 is stretched in the frame of the annular flat ring 2 and fixed to the flat ring 2. The adhesive sheet 1 is formed of, for example, a transparent resin having optical transparency.

  In the step shown in FIG. 1B, the semiconductor substrate 10 is divided into individual semiconductor chips 11-1 to 11-6. For example, the semiconductor substrate 10 is diced along a dicing line. Dicing may be performed by cutting with a dicing blade along a dicing line. At this time, the water jet formed by finely spraying water may be cut with a dicing blade while being introduced into the cut portion. Thereby, it is possible to prevent cutting chips (particles) from adhering to the surface 11a of the semiconductor chip 11. Alternatively, the dicing may be performed by irradiating a laser along a dicing line to perform laser processing.

  Thereafter, UV irradiation is performed on the adhesive sheet 1 from the back surface 1b side to cure the adhesive formed on the front surface 1a of the adhesive sheet 1 and reduce its adhesive force.

  In addition, cleaning (for example, ultrasonic cleaning) and a drying process are sequentially performed on the surface 11a of each semiconductor chip 11 while each semiconductor chip 11 is attached to the adhesive sheet 1. Accordingly, when particles are attached to the surface 11a of each semiconductor chip 11, the attached particles can be removed.

  In the step shown in FIG. 1C, the interval between the plurality of semiconductor chips 11-1 to 11-6 on the adhesive sheet 1 is increased.

  For example, once the adhesive sheet 1 is detached from the flat ring 2, the adhesive sheet 1 is pulled toward the periphery while the plurality of semiconductor chips 11-1 to 11-6 are attached. Thereby, the interval between the adjacent semiconductor chips 11-1 to 11-6 can be increased.

  At this time, as shown in FIG. 1C, the interval between the adjacent semiconductor chips 11-1 to 11-6 can be made larger than the thickness of each semiconductor chip 11. If the interval between the adjacent semiconductor chips 11-1 to 11-6 is smaller than the thickness of each semiconductor chip 11, in the step of pressing the semiconductor chip 11 over the adhesive sheet 1 (the step shown in FIG. 5A). There is a possibility that the side surface 11c of the semiconductor chip 11 to be pressed comes into contact with the side surface 11c of the adjacent semiconductor chip 11 to generate particles. When the generated particles adhere to the surface to be temporarily bonded, voids (air gaps) starting from the particles are formed at the bonding interface when the semiconductor chip 11 is temporarily bonded to the substrate 20, and the bonding strength of the temporary bonding is required. May be less than the required strength. For example, when particles having a diameter of 1 μm intervene in the bonding surface, a void having a width of about 1000 μm in the direction along the bonding interface may be formed.

  In the step shown in FIG. 1D, the surfaces 11a of the plurality of semiconductor chips 11-1 to 11-6 are collectively activated. For example, a flat ring 2 to which a plurality of semiconductor chips 11-1 to 11-6 are attached and which fixes the adhesive sheet 1 is placed on a stage in a processing chamber of a plasma processing apparatus (not shown). At this time, the surface 11a of each semiconductor chip 11 is on the upper side. When the surface 11a of each of the semiconductor chips 11-1 to 11-6 is irradiated with the plasma PL1 under reduced pressure, the surface 11a of each of the semiconductor chips 11-1 to 11-6 is activated. Thereafter, the flat ring 2 to which the plurality of semiconductor chips 11-1 to 11-6 are attached and which fixes the adhesive sheet 1 is carried out of the processing chamber.

  This makes it possible to remove contaminants such as organic substances attached to the surface 11a of each semiconductor chip 11, and terminate the surface 11a with a hydroxyl group. For example, the portion (excluding the pad electrode) near the surface 11a of each semiconductor chip 11 is made of a material mainly containing any of silicon, silicon oxide, a III-V semiconductor, and an oxide of a III-V semiconductor. It is formed with. In any case, the surface 11a can be activated by the step shown in FIG. 1C to terminate the surface 11a with a hydroxyl group.

  The surface 11a of each semiconductor chip 11 is activated by irradiating the surface 11a of each semiconductor chip 11 with an energy beam (bombardment) of atoms or ions of Ar or the like instead of irradiating the surface 11a of each semiconductor chip 11 with plasma. Irradiation may be performed.

  On the other hand, in the step shown in FIG. 1E, a substrate 20 on which the semiconductor chip 11 is to be mounted is prepared. The substrate 20 includes, for example, a semiconductor substrate or a glass substrate. When the substrate 20 is a semiconductor substrate, the portion of the substrate 20 near the surface 20a (excluding the pad electrode) is made of any of silicon, silicon oxide, III-V semiconductor, and III-V semiconductor oxide. It is formed of a material as a main component. When the portion of the substrate 20 near the surface 20a is formed of a material containing silicon oxide as a main component, a region deeper than the portion of the substrate 20 near the surface 20a contains a material containing silicon as a main component or III-V It may be formed of a material containing a group III semiconductor as a main component. When the portion of the semiconductor substrate 10 near the surface 10a is formed of a material mainly containing an oxide of a III-V semiconductor, the region of the semiconductor substrate 10 deeper than the portion near the surface 10a is a III-V semiconductor. May be formed of a material mainly containing. III-V semiconductors include, for example, InP, GaAs, and GaN. When the substrate 20 is a glass substrate, a portion (excluding the pad electrode) of the substrate 20 near the surface 20a is formed of, for example, a material mainly containing silicon oxide or sapphire.

  The surface 20a of the substrate 20 can have a flatness of 1 nm or less, more preferably 0.3 nm or less. If the flatness of the surface 20a becomes 0.3n or less, voids (air gaps) are formed in the bonding interface when the semiconductor chip 11 is temporarily bonded to the substrate 20 in the main bonding step (the step shown in FIG. 5D). ) Is formed, and it can be suppressed that the joining strength of the final joining becomes less than the required strength.

  For example, by polishing the surface 20a of the substrate 20 by a CMP method or the like, the flatness of the surface 20a can be reduced to 1 nm or less, or 0.3 nm or less.

  Cleaning (for example, ultrasonic cleaning) and a drying process are sequentially performed on the prepared surface 20a of the substrate 20. Thereby, when particles are attached to the surface 20a of the substrate 20, the attached particles can be removed.

  In the step shown in FIG. 1F, the surface 20a of the substrate 20 is activated. For example, the substrate 20 is placed on a stage in a processing chamber of a plasma processing apparatus (not shown) such that the surface 20a is on the upper side. Then, when plasma PL2 is irradiated on surface 20a of substrate 20 under reduced pressure, surface 20a of substrate 20 is activated. After that, the substrate 20 is carried out of the processing chamber.

  This makes it possible to remove contaminants such as organic substances attached to the surface 20a of the substrate 20, and to terminate the surface 20a with a hydroxyl group. The portion near the surface 20a of the substrate 20 (excluding the pad electrode) is formed of a material mainly containing any of silicon, silicon oxide, a III-V semiconductor, and an oxide of a III-V semiconductor. I have. In any case, the surface 20a can be activated by the step shown in FIG. 1F to terminate the surface 20a with a hydroxyl group.

  In the step shown in FIG. 1G, cleaning (for example, ultrasonic cleaning) and a drying process are sequentially performed on the surface 20a of the substrate 20. Thereby, when particles are attached to the surface 20a of the substrate 20, the attached particles can be removed.

  Next, in the semiconductor chip bonding method, temporary bonding in plasma activated bonding is performed.

  When the semiconductor chips 11 are temporarily bonded to the substrate 20, a case is considered in which each semiconductor chip 11 is temporarily picked up, removed from the adhesive sheet 1, and mounted on the substrate 20. In this case, when the front surface 11a or the side surface 11c of the semiconductor chip 11 is touched, a part of the semiconductor chip 11 is chipped to generate particles, and the generated particles may adhere to the surface 11a of the semiconductor chip 11. When the generated particles adhere to the surface 11a, when the semiconductor chip 11 is temporarily bonded to the substrate 20, a void (air gap) originating from the particles is formed at the bonding interface, and the bonding strength of the temporary bonding is required. May not be enough. For example, when particles having a diameter of 1 μm are interposed at the bonding interface, a void having a width of about 1000 μm in a direction along the bonding interface may be formed.

  Therefore, in the present embodiment, when the semiconductor chip 11 is temporarily bonded to the substrate 20, a device for handling the semiconductor chip 11 without touching the activated surface 11a of the semiconductor chip 11 is performed. That is, the activated surface 11a of the semiconductor chip 11 attached to the adhesive sheet 1 and the activated surface 20a of the substrate 20 are arranged to face each other, and the back surface 11b of the semiconductor chip 11 is pressed through the adhesive sheet 1. By temporarily bonding the semiconductor chip 11 to the substrate 20 in this manner, the temporary bonding is performed while suppressing generation of particles.

  Specifically, the temporary bonding of the plasma activated bonding is performed using a bonding apparatus 100 shown in FIGS. 2 (a) and 2 (b).

  As shown in FIG. 2A, the joining apparatus 100 includes an arrangement mechanism 110, an alignment mechanism 120, a pressing mechanism 130, a holding mechanism 140, a recognition mechanism 150, a decompression mechanism 160, and a controller 170. 2A and 2B, a direction perpendicular to the upper surface 112a of the substrate stage 112 is defined as a Z direction, and two directions orthogonal to each other in a plane parallel to the upper surface 112a are defined as an X direction and a Y direction.

  The controller 170 controls each part of the bonding apparatus 100 as a whole.

  The arrangement mechanism 110 moves the activated surface 11a of each semiconductor chip 11 and the activated surface 20a of the substrate 20 in a state where the back surface 11b of each semiconductor chip 11 is attached to the front surface 1a of the adhesive sheet 1. Place them facing each other. For example, the arrangement mechanism 110 has a sheet stage 111 and a substrate stage 112.

  The seat stage 111 has a substantially ring shape when viewed from the Z direction, corresponding to the flat ring 2. The flat ring 2 is placed on the upper surface 111a of the sheet stage 111 with the surface 11a of each semiconductor chip 11 facing downward. The sheet stage 111 may suck and hold the flat ring 2 by vacuum suction or electrostatic suction.

  The substrate stage 112 has a planar shape corresponding to the substrate 20 and including the substrate 20 inside when viewed from the Z direction. The substrate 20 is placed on the upper surface 112a of the substrate stage 112 with the front surface 20a facing upward. The substrate stage 112 may suck and hold the substrate 20 by vacuum suction or electrostatic suction.

  The alignment mechanism 120 aligns the relative positions of the semiconductor chip 11 and the substrate 20 under the control of the controller 170. For example, the alignment mechanism 120 has drive mechanisms 121 and 122. The drive mechanism 121 drives the sheet stage 111 in the X direction, the Y direction, and the θ direction according to a drive amount command received from the controller 170. The θ direction is a rotation direction about the Z axis. The driving mechanism 122 drives the substrate stage 112 in the X direction, the Y direction, and the θ direction in accordance with a driving amount command received from the controller 170.

  The alignment mechanism 120 may have a configuration in which one of the driving mechanisms 121 and 122 is omitted as long as the relative positions of the semiconductor chip 11 and the substrate 20 can be aligned.

  The pressure reducing mechanism 160 has a vacuum pump 161 and vacuum exhaust paths 162, 163-1 and 163-2.

  Under the control of the controller 170, the pressing mechanism 130 presses the back surface 11 b of the semiconductor chip 11 via the adhesive sheet 1 to change the activated surface 11 a of the semiconductor chip 11 to the activated surface 20 a of the substrate 20. Adhere (see FIG. 5A). Thereby, the semiconductor chip 11 is temporarily bonded to the substrate 20. Further, the pressing mechanism 130 peels the adhesive sheet 1 from the back surface 11b of the semiconductor chip 11 while maintaining the state where the activated surface 11a of the semiconductor chip 11 is in close contact with the activated surface 20a of the substrate 20 ( (See FIGS. 5B and 5C). For example, the pressing mechanism 130 includes a pressing head 131, a head driving unit 132, a pin 135, and a pin driving unit 136.

  The pressing head 131 has a pressing surface 131f corresponding to the back surface 11b of the semiconductor chip 11. The pressing surface 131f has a planar shape that includes the back surface 11b of the semiconductor chip 11 to be pressed and does not interfere with the adjacent semiconductor chip 11 when viewed from the Z direction. The pressing surface 131f may have, for example, an even planar shape on the back surface 11b of the semiconductor chip 11. The head driving unit 132 drives the pressing head 131 in the Z direction under the control of the controller 170. Thereby, the pressing head 131 can press the back surface 11 b of the semiconductor chip 11 via the adhesive sheet 1.

  The pressing head 131 has a cushioning member 131a on the pressing surface 131f. The buffer member 131a buffers the force applied to the back surface 11b of the semiconductor chip 11 when the pressing head 131 presses the back surface 11b of the semiconductor chip 11 over the adhesive sheet 1, and at the same time, measures the degree of parallelism between the chip surface and the substrate surface. By absorbing the displacement, it becomes possible to apply pressure uniformly to the activation surface. The buffer member 131a can be formed of, for example, an elastic body such as rubber.

  The pressing head 131 has a suction structure 131b for sucking the adhesive sheet 1 when the pressing head 131 presses the back surface 11b of the semiconductor chip 11 over the adhesive sheet 1. As shown in FIG. 2B, the suction structure 131b is formed by a gap between the hole 134 and the pin 135 and a communication path 137. The gap between the hole 134 and the pin 135 is communicated with the vacuum exhaust path 162 via the communication path 137, and can be evacuated by the vacuum pump 161 via the vacuum exhaust path 162. Thus, the suction structure 131b can vacuum-suction the adhesive sheet 1. The suction structure 131b may have another form as long as the adhesive sheet 1 can be vacuum-sucked to the pressing surface 131f of the pressing head 131. For example, the suction structure 131b may be formed by a hole communicated from the pressing surface 131f to the communication passage 137 and the communication passage 137 separately from the hole into which the pin 135 is inserted.

  The pin 135 can be changed between a state of being retracted from the pressing surface 131f toward the pressing head 131 and a state of protruding from the pressing surface 131f. The pin 135 is movable in the Z direction in the hole 134. The hole 134 extends inside the pressing head 131 in the Z direction. The pin driving section 136 moves the pin 135 in the Z direction along the hole 134 under the control of the controller 170. Thus, the pin 135 is retracted from the pressing surface 131f toward the pressing head 131 or protrudes from the pressing surface 131f.

  The holding mechanism 140 is arranged around the pressing mechanism 130. The holding mechanism 140 holds an area around the area to be pressed by the pressing mechanism 130 on the adhesive sheet 1. The holding mechanism 140 vacuum-adsorbs an area around the area to be pressed by the pressing mechanism 130 on the adhesive sheet 1. For example, the holding mechanism 140 has a plurality of sets for holding. The plurality of configurations are arranged at positions that are rotationally symmetric with respect to the pressing mechanism 130 when viewed from the Z direction. Each of the multiple sets of configurations has holding heads 141-1 and 141-2 and head driving units 142-1 and 142-2.

  The head driving units 142-1 and 142-2 drive the holding heads 141-1 and 141-2 in the Z direction under the control of the controller 170. Thereby, the holding heads 141-1 and 141-2 can vacuum-suction the adhesive sheet 1.

  Each of the holding heads 141-1 and 141-2 has cushioning members 141a-1 and 141a-2 on a surface 141f that comes into contact with the adhesive sheet 1. The buffer members 141a-1 and 141a-2 buffer the force applied to the back surface 11b of the semiconductor chip 11 when each of the holding heads 141-1 and 141-2 vacuum-adheres the adhesive sheet 1. The buffer members 141a-1 and 141a-2 can be formed of an elastic body such as rubber, for example.

  Each of the holding heads 141-1 and 141-2 has suction structures 141b-1 and 141b-2 for sucking the adhesive sheet 1. The suction structures 141b-1 and 141b-2 are formed by holes 144-1 and 144-2 and communication paths 147-1 and 147-2. The holes 144-1 and 144-2 are connected to the vacuum exhaust paths 163-1 and 163-2 via the communication paths 147-1 and 147-2, respectively, and are connected via the vacuum exhaust paths 163-1 and 163-2. The air can be evacuated by the vacuum pump 161. Thus, the suction structures 141b-1 and 141b-2 can vacuum-suction the adhesive sheet 1.

  The recognition mechanism 150 recognizes the semiconductor chip 11 and the substrate 20 respectively. For example, the recognition mechanism 150 recognizes the position of the semiconductor chip 11 and the position on the substrate 20 where the semiconductor chip 11 is to be mounted. The recognition mechanism 150 has, for example, a lens barrel 151, a camera 152, and a ring illumination 153. The recognition mechanism 150 illuminates the subject (for example, the semiconductor chip 11 and the substrate 20) with the ring illumination 153, and receives the reflected light from the camera 152 via the lens barrel 151. As a result, the recognition mechanism 150 can capture an image of the semiconductor chip 11 and the substrate 20, and supply the captured image to the controller 170.

  For example, the recognition mechanism 150 can recognize the respective positions of the semiconductor chip 11 and the substrate 20 by recognizing the respective contours of the semiconductor chip 11 and the substrate 20. Alternatively, for example, when alignment marks are formed on each of the semiconductor chip 11 and the substrate 20, the recognition mechanism 150 recognizes the respective alignment marks on the semiconductor chip 11 and the substrate 20 to recognize the alignment marks on the semiconductor chip 11 and the substrate 20. Each position can be recognized.

  Note that the recognition mechanism 150 may have coaxial illumination instead of the ring illumination 153. The coaxial illumination is provided, for example, in a lens barrel 151, and its optical axis is coaxial with the optical axis of the camera 152. Alternatively, the recognition mechanism 150 may have illumination provided below (for example, the upper surface 112a of the substrate stage 112) instead of the ring illumination 153. For example, when the substrate 20 is a glass substrate, the illumination may be provided in a region on the upper surface 112a of the substrate stage 112 where the substrate 20 is placed. For example, when the substrate 20 is a semiconductor substrate, the illumination may be provided on the upper surface 112a of the substrate stage 112 around the region where the substrate 20 is placed.

  Alternatively, the recognition mechanism 150 may include an IR illumination 154 indicated by a dashed line in FIG. 2A instead of the ring illumination 153. In this case, the camera 152 may be an IR camera. Accordingly, the recognition mechanism 150 illuminates the subject (for example, the semiconductor chip 11 and the substrate 20) with the IR light (infrared light) emitted from the IR illumination 154, and transmits the transmitted light (IR light) via the lens barrel 151. And can be received by the camera 152.

  Alternatively, although not shown, the recognition mechanism 150 may include a vertical simultaneous recognition camera instead of the camera 152. The upper and lower simultaneous recognition camera is inserted into a space between the plurality of semiconductor chips 11-1 to 11-6 and the substrate 20, and can simultaneously image the semiconductor chip 11 and the substrate 20. Accordingly, the recognition mechanism 150 can simultaneously recognize the respective positions of the semiconductor chip 11 and the substrate 20.

  In the method of bonding semiconductor chips, the steps shown in FIGS. 3A to 3C, 4A to 4C, and 5A to 5C are used as temporary bonding in plasma activated bonding. Is performed.

  In the step shown in FIG. 3A, the arrangement mechanism 110 arranges the activated surfaces 11a of the plurality of semiconductor chips 11-1 to 11-6 and the activated surface 20a of the substrate 20 so as to face each other. . The back surfaces 11b of the plurality of semiconductor chips 11-1 to 11-6 are attached to the front surface 1a of the adhesive sheet 1.

  At this time, the activated surface 11a of the semiconductor chip 11 and the activated surface 20a of the substrate 20 are each terminated with a hydroxyl group. However, as shown in FIG. 6A, a hydroxyl group (-O- Water molecules (HOH) are often bonded to H) by hydrogen bonds. FIGS. 6A to 6D are diagrams showing the mechanism of plasma activated bonding. 6A to 6D, in the semiconductor chip 11, the silicon oxide film 11i is located near the surface 11a, and the silicon region 11j is disposed deeper than the silicon oxide film 11i. The case where the silicon region 22 is arranged at a position deeper than the silicon oxide film 21 as the oxide film 21 is illustrated.

  Then, as shown in FIG. 3A, the recognition mechanism 150 recognizes a position on the substrate 20 where the semiconductor chip 11 is to be mounted. For example, the recognition mechanism 150 illuminates the substrate 20 with the ring illumination 153, and receives the reflected light from the camera 152 via the lens barrel 151. Thereby, the recognition mechanism 150 can image the substrate 20 and recognize the position indicated by the broken line in FIG. 3A as the position on the substrate 20 where the semiconductor chip 11-4 is to be mounted. The recognition mechanism 150 supplies the recognition result to the controller 170.

  In the step illustrated in FIG. 3B, the holding mechanism 140 holds an area around the area of the adhesive sheet 1 to be pressed by the pressing mechanism 130. For example, the controller 170 causes the suction structures 141b-1 and 141b-2 to be in a state capable of vacuum suction, and controls the head driving units 142-1 and 142-2 to change the holding heads 141-1 and 141-2 to-. It is moved in the Z direction (see FIG. 2A). Thereby, when the semiconductor chip 11-4 is selected as the semiconductor chip to be pressed among the plurality of semiconductor chips 11-1 to 11-6, the area around the area corresponding to the semiconductor chip 11-4 in the adhesive sheet 1 is determined. The area is vacuum-sucked by the holding mechanism 140. In FIG. 3B, regions corresponding to the semiconductor chips 11-2, 11-3, 11-5, and 11-6 in the adhesive sheet 1 are held by the holding heads 141-1 and 141-2. Although the case where vacuum suction is performed at −2 is illustrated, the area corresponding to the semiconductor chips 11-2, 11-3, 11-5, and 11-6 is provided around the area corresponding to the semiconductor chip 11-4. It is not limited to. This makes it possible to control the bending of the region of the adhesive sheet 1 to be pressed by the pressing mechanism 130.

  In the step shown in FIG. 3C, the recognition mechanism 150 recognizes the position of the adhesive sheet 1 to be pressed by the pressing mechanism 130. For example, the recognition mechanism 150 illuminates the adhesive sheet 1 and the semiconductor chip 11-4 with the ring illumination 153, and receives the reflected light from the camera 152 via the lens barrel 151. Thereby, the recognition mechanism 150 can image the adhesive sheet 1 and the semiconductor chip 11-4, and can recognize the position indicated by the broken line in FIG. 3C as the position of the adhesive sheet 1 to be pressed by the pressing mechanism 130. The recognition mechanism 150 supplies the recognition result to the controller 170.

  When the holding mechanism 140 vacuum-adheres the adhesive sheet 1 in the step shown in FIG. 3B, the positions of the adhesive sheet 1 and the semiconductor chip 11-4 (absolute position or relative position with respect to the substrate 20) may be shifted. However, in the process shown in FIG. 3C, since the position after the shift can be recognized, the recognized position is hardly affected by the shift.

  In the step illustrated in FIG. 4A, the pressing mechanism 130 vacuum-adsorbs the adhesive sheet 1. For example, the controller 170 obtains a driving amount of the sheet stage 111 for positioning a position of the adhesive sheet 1 to be pressed by the pressing mechanism 130 below the pressing mechanism 130 according to a recognition result by the recognition mechanism 150 and performs alignment. It is supplied to the drive mechanism 121 of the mechanism 120. The drive mechanism 121 drives the seat stage 111 in accordance with a drive amount command. Thereby, the position of the adhesive sheet 1 to be pressed by the pressing mechanism 130 is positioned below the pressing mechanism 130. Then, the controller 170 causes the suction structure 131b to be in a state capable of vacuum suction, and controls the head driving unit 132 to move the pressing head 131 in the −Z direction (see FIG. 2A). Thereby, the adhesive sheet 1 is vacuum-sucked to the pressing surface 131f of the pressing head 131. At this time, the pin 135 is maintained in a state of being retracted from the pressing surface 131f toward the pressing head 131.

  In the step shown in FIG. 4B, the recognition mechanism 150 recognizes the position of the semiconductor chip 11 (absolute position or relative position with respect to the substrate 20). For example, the recognition mechanism 150 illuminates the semiconductor chip 11-4 with the ring illumination 153, and receives the reflected light from the camera 152 via the lens barrel 151. Thereby, the recognition mechanism 150 can image the semiconductor chip 11-4 and recognize the position of the semiconductor chip 11. The recognition mechanism 150 supplies the recognition result to the controller 170.

  4A, when the pressing mechanism 130 vacuum-adsorbs the adhesive sheet 1 in the process illustrated in FIG. However, in the step shown in FIG. 4B, since the position after the shift can be recognized, the recognized position is hardly affected by the shift.

  In the step shown in FIG. 4C, the alignment mechanism 120 aligns the relative positions of the semiconductor chip 11 and the substrate 20. For example, the controller 170 obtains a drive amount for alignment based on the recognition result received in the step shown in FIG. 3A and the recognition result received in the step shown in FIG. 4B. For example, the controller 170 determines the difference ΔL between the position on the substrate 20 where the semiconductor chip 11-4 is to be mounted and the position of the semiconductor chip 11-4 (see FIG. 4B) in the X, Y, and θ directions. Ask for each. The controller 170 obtains the respective drive amounts in the X, Y, and θ directions that cancel the difference ΔL, and supplies the drive amounts to the drive mechanism 122 of the alignment mechanism 120. The drive mechanism 122 drives the substrate stage 112 in accordance with the drive amount command. Thereby, the position of the semiconductor chip 11-4 and the position on the substrate 20 where the semiconductor chip 11-4 is to be mounted are relatively aligned.

  In the step shown in FIG. 5A, the pressing mechanism 130 presses the back surface 11 b of the semiconductor chip 11 via the adhesive sheet 1. For example, the controller 170 controls the head driving unit 132 to further move the pressing head 131 in the −Z direction (see FIG. 2A). As a result, the pressing head 131 presses the back surface 11b of the semiconductor chip 11-4 via the adhesive sheet 1, and brings the activated surface 11a of the semiconductor chip 11-4 into close contact with the activated surface 20a of the substrate 20. Let it. As a result, the semiconductor chip 11-4 is temporarily joined to the substrate 20. Further, the adhesive sheet 1 is elastically deformed, and a tension is generated between the area pressed by the pressing mechanism 130 and the area held by the holding mechanism 140 (holding heads 141-1 and 141-2).

  At this time, the activated surface 11a of the semiconductor chip 11 and the activated surface 20a of the substrate 20 are, as shown in FIG. 6B, a water molecule (HOH) bonded to a hydroxyl group. The two are temporarily bonded by being bonded to each other by a hydrogen bond.

  In the step shown in FIG. 5B, the pressing mechanism 130 applies the adhesive sheet 1 to the semiconductor chip 11 while maintaining the activated surface 11a of the semiconductor chip 11 in close contact with the activated surface 20a of the substrate 20. 11 is peeled off from the back surface 11b. For example, the controller 170 controls the pin driving unit 136 so that the pins 135 press the back surface 11 b of the semiconductor chip 11 via the adhesive sheet 1. The controller 170 controls the pressure reducing mechanism 160 to release the vacuum suction of the suction structure 131b. The controller 170 controls the head driving unit 132 to move the pressing head 131 in the + Z direction while controlling the pin driving unit 136 to maintain the state where the pin 135 presses the back surface 11 b of the semiconductor chip 11 via the adhesive sheet 1. (See FIG. 2A). That is, as the pressing head 131 moves away from the back surface 11b of the semiconductor chip 11 in the + Z direction, the pins 135 move from the pressing surface 131f while maintaining the state of pressing the back surface 11b of the semiconductor chip 11 over the adhesive sheet 1. It will be in a protruding state.

  At this time, the adhesive force of the adhesive formed on the surface 1a of the adhesive sheet 1 has been reduced in the step shown in FIG. For this reason, due to the tension between the area pressed by the pressing mechanism 130 and the area held by the holding mechanism 140 in the adhesive sheet 1, the area around the area pressed by the pin 135 on the back surface 11 b of the semiconductor chip 11-4. The adhesive sheet 1 is easily peeled.

  In the step illustrated in FIG. 5C, the pressing mechanism 130 completes the separation of the adhesive sheet 1 from the back surface 11 b of the semiconductor chip 11. For example, the controller 170 controls the pin driving unit 136 to move the pins 135 in the + Z direction, and releases the state where the back surface 11 b of the semiconductor chip 11 is pressed via the adhesive sheet 1. The controller 170 may control the pin driving unit 136 so that the pin 135 is retracted from the pressing surface 131f toward the pressing head 131.

  Here, temporarily, the pin 135 does not press the back surface 11b of the semiconductor chip 11 over the adhesive sheet 1, but the pressing by the pressing head 131 is released to release the pressing of the semiconductor chip 11 to the back surface 11b at a stretch. Consider the case. In this case, substantially the entire back surface 11b of the semiconductor chip 11-4 is adhered to the adhesive sheet 1, and the area of the back surface 11b of the semiconductor chip 11-4 adhered to the adhesive sheet 1 is large. Therefore, the force of pulling the semiconductor chip 11-4 upward by the tension and the adhesive force of the adhesive sheet 1 is larger than the force of pulling the semiconductor chip 11-4 downward by the temporary bonding force of the semiconductor chip 11-4 to the substrate 20. Can be large. As a result, there is a possibility that the semiconductor chip 11-4 may be separated from the substrate 20 without maintaining the state in which the semiconductor chip 11-4 is temporarily bonded to the substrate 20.

  On the other hand, in the present embodiment, in the step shown in FIG. 5C, the area of the region adhered to the adhesive sheet 1 on the back surface 11b of the semiconductor chip 11-4 is reduced. For this reason, the force of pulling the semiconductor chip 11-4 downward by the temporary bonding force of the semiconductor chip 11-4 to the substrate 20 is easily changed by the tension of the adhesive sheet 1 and the force of pulling the semiconductor chip 11-4 upward by the adhesive force. Can be overcome. Thereby, the peeling of the adhesive sheet 1 from the back surface 11b of the semiconductor chip 11 can be completed while maintaining the state in which the semiconductor chip 11-4 is temporarily bonded to the substrate 20.

  Similarly, for the other semiconductor chips 11-1 to 11-3, 11-5, and 11-6 attached to the adhesive sheet 1, FIGS. 3A to 3C and FIGS. c), the steps shown in FIGS. 5A to 5C can be temporarily joined onto the substrate 20.

  Next, in the method of bonding semiconductor chips, the step shown in FIG. 5D is performed as the main bonding in the plasma activated bonding.

  In the step shown in FIG. 5D, the semiconductor chip 11 is heated while the back surface 11b of the semiconductor chip 11 is physically pressed. For example, the back surface 11b of the semiconductor chip 11 is brought into thermal contact with a hot plate via a buffer sheet (made of a heat-resistant material), and heated at, for example, 250 ° C. or less. Alternatively, the substrate 20 may be brought into contact with another hot plate from the back surface 20b side and heated at 250 ° C. or lower. It is desirable to set the heating temperature appropriately (for example, optimally) according to the material and structure of the semiconductor chip and the substrate. For example, in the case of materials having the same thermal expansion coefficient, it is possible to set the temperature to 1000 ° C. or more. Can shorten the time of the joining process and increase the productivity. On the other hand, in the case of bonding materials having different thermal expansion coefficients such as silicon and III-V semiconductor, the temperature is as low as possible, preferably 150 ° C. or less, in order to reduce residual thermal stress due to a temperature drop after the bonding process. It is recommended that

  In the above-described pressurization / heating process, at the bonding interface between the semiconductor chip 11 and the substrate 20, as shown in FIG. A hydrogen bond between (HOH) changes into a hydrogen bond between hydroxyl groups (-OH) or a covalent bond via an oxygen atom (-O-). Thus, the bonding interface width between the surface 11a of the semiconductor chip 11 and the surface 20a of the substrate 20 is reduced from G1 to G2 (<G1). As the bonding process further proceeds, at the bonding interface between the semiconductor chip 11 and the substrate 20, as shown in FIG. 6D, water molecules (H-O-H) are formed by hydrogen bonding between hydroxyl groups (-OH). ) Is replaced by a covalent bond via an oxygen atom (-O-). As a result, the bonding interface width between the surface 11a of the semiconductor chip 11 and the surface 20a of the substrate 20 is reduced from G2 to G3 (<< G2), and the oxide films 11i and 21 on the surface are substantially integrated with each other. Joined.

  As described above, in the embodiment, in the semiconductor chip bonding method, the surface 11a of the semiconductor chip 11 and the surface 20a of the substrate 20 are activated by plasma, respectively, and the semiconductor chip 11 is brought into close contact with the substrate 20. Thus, the semiconductor chip 11 can be temporarily bonded to the substrate 20 at room temperature without intervening the solder bumps, so that the semiconductor chip 11 can be mounted on the substrate 20 while suppressing thermal deformation of the semiconductor chip 11. As a result, the alignment accuracy of the bonding of the semiconductor chips during the temporary bonding can be easily improved. After that, the semiconductor chip 11 is heated and pressurized to be fully bonded to the substrate 20. Since the bonding position of the semiconductor chip 11 on the substrate 20 can be substantially fixed by temporary bonding, the alignment accuracy of the bonding of the semiconductor chip in the full bonding is performed. Can be easily improved.

  Further, in the embodiment, in the method of bonding semiconductor chips, the semiconductor chip 11 can be bonded onto the substrate 20 without intervening solder bumps, so that the arrangement density of pad electrodes on the semiconductor chip 11 can be easily improved. is there. For example, the arrangement pitch of the pad electrodes in the semiconductor chip can be reduced to about several μm. Thereby, the mounting density of the semiconductor chip 11 can be easily improved.

  Further, in the embodiment, in the method of bonding semiconductor chips, the activated surface 11a of the semiconductor chip 11 attached to the adhesive sheet 1 and the activated surface 20a of the substrate 20 are arranged so as to face each other. The semiconductor chip 11 is temporarily bonded to the substrate 20 by pressing the back surface 11b of the semiconductor chip 11 through the gap. Then, the adhesive sheet 1 is peeled from the back surface 11b of the semiconductor chip 11 while maintaining the state where the activated surface 11a of the semiconductor chip 11 is in close contact with the activated surface 20a of the substrate 20. Thereby, when the semiconductor chip 11 is temporarily bonded to the substrate 20, the semiconductor chip 11 can be handled without touching the activated surface 11a of the semiconductor chip 11, and the temporary bonding is completed while suppressing generation of particles. Can be done.

  Further, in the embodiment, in the method of bonding semiconductor chips, the activated front surfaces 11a of the plurality of semiconductor chips 11 and the activation of the substrate 20 in a state where the back surfaces 11b of the plurality of semiconductor chips 11 are attached to the adhesive sheet 1 The surface 20a thus arranged is arranged to face. Then, the back surface 11b of the semiconductor chip 11 selected from the plurality of semiconductor chips 11 is pressed to bring the activated surface 11a of the semiconductor chip 11 into close contact with the activated surface 20a of the substrate 20, and the state of the close contact The process of peeling the adhesive sheet 1 from the back surface 11b of the semiconductor chip 11 while maintaining the above conditions is sequentially performed for each semiconductor chip 11. Thereby, the temporary bonding of the plurality of semiconductor chips 11 to the substrate 20 can be efficiently performed while suppressing generation of particles.

  In the embodiment, in the method of bonding semiconductor chips, the plurality of activated surfaces 11a of the plurality of semiconductor chips 11 and the plurality of activated surfaces 20a of the substrate 20 are placed on the adhesive sheet 1 before being arranged to face each other. The distance between the semiconductor chips 11 is increased. For example, the interval between the plurality of semiconductor chips 11 on the adhesive sheet 1 is made larger than the thickness of the semiconductor chip 11. Accordingly, in the step of pressing the semiconductor chip 11 over the adhesive sheet 1, the side surface 11c of the semiconductor chip 11 to be pressed hardly comes into contact with the side surface 11c of the adjacent semiconductor chip 11, and generation of particles can be suppressed.

  In the embodiment, in the method of bonding semiconductor chips, in the step of pressing the back surface 11 b of the semiconductor chip 11 over the adhesive sheet 1, the area around the area to be pressed on the adhesive sheet 1 is held by the holding mechanism 140. Done in state. Thereby, the back surface 11b of the semiconductor chip 11 can be pressed over the adhesive sheet 1 in a state where the bending of the adhesive sheet 1 is appropriately controlled, and thereafter, the peeling of the adhesive sheet 1 from the back surface 11b of the semiconductor chip 11 is appropriately performed. Can be done.

  In the embodiment, in the semiconductor chip bonding apparatus, the pressing mechanism 130 presses the back surface 11 b of the semiconductor chip 11 via the adhesive sheet 1 to activate the activated surface 11 a of the semiconductor chip 11 to activate the substrate 20. To the surface 20a. Further, the pressing mechanism 130 peels the adhesive sheet 1 from the back surface 11b of the semiconductor chip 11 while maintaining the state where the activated surface 11a of the semiconductor chip 11 is in close contact with the activated surface 20a of the substrate 20. Accordingly, when the semiconductor chip 11 is temporarily bonded to the substrate 20, the semiconductor chip 11 can be handled without touching the activated surface 11a of the semiconductor chip 11, and the temporary bonding is performed while suppressing generation of particles. be able to.

  In the embodiment, in the pressing mechanism 130 of the semiconductor chip bonding apparatus, the pressing head 131 has a pressing surface 131f corresponding to the back surface 11b of the semiconductor chip 11. Thereby, the back surface 11b of the semiconductor chip 11 can be pressed in a plane with a substantially uniform force.

  In the embodiment, in the pressing mechanism 130 of the semiconductor chip bonding apparatus, the pin 135 can be changed between a state in which the pin 135 is retracted from the pressing surface 131f toward the pressing head 131 and a state in which the pin 135 projects from the pressing surface 131f. Thus, when the pressing head 131 presses the back surface 11b of the semiconductor chip 11 over the adhesive sheet 1, the pins 135 are retracted from the pressing surface 131f toward the pressing head 131, so that the pins 135 are pressed by the pressing head 131. It is possible not to disturb the operation. Further, by keeping the pins 135 protruding from the pressing surface 131f when the pressing by the pressing head 131 is released, the adhesive sheet is maintained while the semiconductor chip 11-4 is temporarily bonded to the substrate 20. Peeling of one semiconductor chip 11 from the back surface 11b can be easily completed.

  Further, in the embodiment, in the semiconductor chip bonding apparatus, the pressing mechanism 130 is connected to the adhesive sheet 1 via the adhesive sheet 1 in a state where the area around the area to be pressed by the pressing mechanism 130 is held by the holding mechanism 140. Then, the back surface 11b of the semiconductor chip 11 is pressed toward the substrate 20 side. Thereby, the back surface 11b of the semiconductor chip 11 can be pressed over the adhesive sheet 1 in a state where the bending of the adhesive sheet 1 is appropriately controlled, and thereafter, the peeling of the adhesive sheet 1 from the back surface 11b of the semiconductor chip 11 is appropriately performed. Can be done.

  In the embodiment, in the semiconductor chip bonding apparatus, the alignment mechanism 120 positions an area of the adhesive sheet 1 to be pressed by the pressing mechanism 130 based on the recognition result of the recognition mechanism 150. Further, the alignment mechanism 120 aligns the relative positions of the semiconductor chip 11 and the substrate 20 based on the recognition result of the recognition mechanism 150. Then, the pressing mechanism 130 presses the back surface 11b of the semiconductor chip 11 via the adhesive sheet 1 in a state where the relative positions of the semiconductor chip 11 and the substrate 20 are aligned. Thereby, the pressing mechanism 130 can press with high accuracy, and each of the plurality of semiconductor chips 11 attached to the adhesive sheet 1 can be mounted at an appropriate position on the substrate 20.

  In the step shown in FIG. 1C, for example, the interval between adjacent semiconductor chips 11-1 to 11-6 can be increased by thinning out the plurality of semiconductor chips 11-1 to 11-6. For example, by thinning out the semiconductor chips 11-2, 11-4, and 11-6 from the plurality of semiconductor chips 11-1 to 11-6, the interval between the adjacent semiconductor chips 11-1 to 11-6 is equivalent to one chip width. Can be spread out. However, particles may be generated when thinning the semiconductor chips 11-2, 11-4, and 11-6. For this reason, after thinning, the surface 11a of each semiconductor chip 11 is sequentially cleaned (eg, ultrasonically cleaned) and dried while the respective semiconductor chips 11 are still attached to the adhesive sheet 1. To do. Thereby, particles adhering to the surface 11a of each semiconductor chip 11 can be removed.

  The timing of performing the step of increasing the interval between the plurality of semiconductor chips 11-1 to 11-6 (the step illustrated in FIG. 1D) is determined by the step of disposing the semiconductor chip 11 and the substrate 20 to face each other (see FIG. It is sufficient that it is before the step shown in FIG. 1A), and it is not limited after the step shown in FIG. For example, the timing of performing the step of increasing the interval between the plurality of semiconductor chips 11-1 to 11-6 (the step illustrated in FIG. 1D) is shown in FIG. 3A after the step illustrated in FIG. It may be before the process.

  Further, in the method of joining semiconductor chips, the steps shown in FIGS. 7A to 7D may be performed instead of the steps shown in FIGS. 1A and 1B.

  In the step shown in FIG. 7A, a semiconductor substrate 10 similar to the one prepared in the step shown in FIG. 1A is prepared. The surface 10a of the prepared semiconductor substrate 10 is attached to the surface 3a of the adhesive sheet (dicing tape) 3. That is, the semiconductor substrate 10 is attached to the adhesive sheet 3 with the back surface 10b exposed (face-down state). The adhesive sheet 3 has an adhesive formed on its surface 3a. As the adhesive, for example, an adhesive having UV curability can be used. The adhesive sheet 3 is stretched in the frame of the annular flat ring 4 and fixed to the flat ring 4. The adhesive sheet 3 is formed of, for example, a transparent resin having optical transparency.

  In the step shown in FIG. 7B, the semiconductor substrate 10 is divided and divided into a plurality of semiconductor chips 11-1 to 11-6. For example, the semiconductor substrate 10 is diced along a dicing line. Dicing may be performed by cutting with a dicing blade along a dicing line. Alternatively, the dicing may be performed by irradiating a laser along a dicing line to perform laser processing.

  At this time, since the semiconductor substrate 10 is attached to the adhesive sheet 3 with the back surface 10b exposed (face-down state), particles can be prevented from adhering to the front surface 11a of the semiconductor chip 11.

  Thereafter, the adhesive sheet 3 is subjected to UV irradiation from the back surface 3b side to cure the adhesive formed on the front surface 3a of the adhesive sheet 3 and reduce its adhesive strength.

  Further, cleaning (for example, ultrasonic cleaning) and drying may be sequentially performed on the back surface 11b of each semiconductor chip 11 in a state where each semiconductor chip 11 is attached to the adhesive sheet 3. Thus, when particles are attached to the back surface 11b of each semiconductor chip 11, the attached particles can be removed.

  In the step shown in FIG. 7C, the front surface 1a of the adhesive sheet 1 is attached to the back surfaces 11b of the plurality of individual semiconductor chips 11-1 to 11-6. At this time, the adhesive force of the adhesive formed on the surface 3a of the adhesive sheet 3 has decreased in the step shown in FIG. Thereby, the plurality of semiconductor chips 11-1 to 11-6 are easily transferred from the adhesive sheet 3 to the adhesive sheet 1. That is, the semiconductor substrate 10 is attached to the adhesive sheet 1 with the surface 10a exposed (face-up state).

  In the step illustrated in FIG. 7D, the adhesive sheet 1 to which the plurality of semiconductor chips 11-1 to 11-6 have been transferred is stretched in the frame of the annular flat ring 2 and fixed by the flat ring 2.

  Thereafter, the steps shown in FIG. 1C and the subsequent steps are performed.

  As described above, since the dicing of the semiconductor substrate 10 is performed in a state where the semiconductor substrate 10 is in a face-down state, particles generated during the dicing can be further reduced from adhering to the surface 11a of each of the semiconductor chips 11 that are singulated. In addition, particles can be effectively prevented from intervening at the bonding interface when the semiconductor chip 11 is temporarily bonded to the substrate 20.

  Although several embodiments of the present invention have been described, these embodiments are provided by way of example and are not intended to limit the scope of the invention. These new embodiments can be implemented in other various forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and their equivalents.

  1,3 adhesive sheet, 11, 11-1 to 11-6 semiconductor chip, 20 substrates, 100 bonding apparatus, 110 placement mechanism, 120 alignment mechanism, 130 pressing mechanism, 140 holding mechanism, 150 recognition mechanism.

Claims (18)

A second area around the first area to which the back surface of the chip is adhered on the sheet is held by a holding mechanism whose position relative to the sheet can be changed in a direction not perpendicular to the surface of the substrate. That
In a state where the second area of the sheet is held by the holding mechanism, pressing the first area to bring the surface of the chip into close contact with the surface of the substrate;
Reducing the adhesive strength to the back surface of the chip in the first region of the sheet;
Release the pressing of the back surface of the chip through the first region of the sheet in a state where the adhesive force to the back surface of the chip is reduced, peeling the sheet from the back surface of the chip,
A chip joining method, comprising: 2. The method of claim 1, wherein reducing the adhesive force includes changing an adhesive area of the first region to the back surface of the chip from a first area to a second area smaller than the first area. 3. The method for joining chips according to the above. Decreasing the adhesive force means that bonding to a portion outside the center of the chip in the back surface of the first region is maintained while maintaining bonding to the center of the chip in the back surface of the first region. 2. The method for joining chips according to claim 1, comprising releasing the chip. Decreasing the adhesive force can be changed between a pressing head having a pressing surface corresponding to the back surface of the chip and a state of being retracted from the pressing surface toward the pressing head and a state of protruding from the pressing surface. 2. The chip according to claim 1, further comprising moving the pressing head away from the first area while pressing the first area toward a center side in the back surface of the chip with the pin in the pressing mechanism having a pin that is Joining method. 3. The method according to claim 2, wherein releasing the pressing of the back surface of the chip includes reducing a bonding area of the first region to the back surface of the chip. 4. The method according to claim 3, wherein releasing the pressure on the rear surface of the chip includes releasing adhesion of the first region to the center of the rear surface of the chip. 5. The method according to claim 4, wherein releasing the pressing of the back surface of the chip includes moving the pin away from the first region. 6. The method further comprises arranging an activated surface of the chip and an activated surface of the substrate in a state where the back surface of the chip is bonded to the first region of the sheet, and
The close contact is performed by pressing the first region while the second region of the sheet is held by the holding mechanism, so that the activated surface of the chip is brought into contact with the activated surface of the substrate. The method of joining chips according to claim 1, further comprising bringing the chips into close contact with each other. The method for bonding chips according to any one of claims 1 to 8, further comprising heating the chip after the separation. A pressing mechanism provided on the first side with respect to the sheet;
When a first area provided on a second side opposite to the first side with respect to the sheet and the back surface of the chip is adhered on the second side is pressed by the pressing mechanism, A holding mechanism capable of holding a second area around the first area of the sheet;
With
The pressing mechanism presses, in a first period, a first area corresponding to the chip on the sheet in a direction toward the second side to bring a surface of the chip into close contact with a surface of a substrate, and In a second period after the period, the adhesive force of the sheet to the back surface of the chip in the first region is reduced, and in a third period after the second period, the back surface of the chip is reduced. A bonding apparatus for releasing the chip from the back surface of the chip by releasing the pressing of the back surface of the chip through the first region of the sheet in a state where the adhesive force to the chip is reduced. . The method according to claim 10, wherein the pressing mechanism changes an adhesion area of the first region to the back surface of the chip in the second period from a first area to a second area smaller than the first area. An apparatus for joining chips according to the above. The pressing mechanism moves the first region to a portion outside the center in the back surface of the chip in the first region while maintaining the adhesion to the center in the back surface of the chip in the second period. The chip bonding apparatus according to claim 10, wherein the bonding of the chips is released. The pressing mechanism,
A pressing head having a pressing surface corresponding to the back surface of the chip,
A pin that can be changed between a state retracted from the pressing surface toward the pressing head and a state protruding from the pressing surface,
Has,
The chip according to claim 10, wherein the pressing mechanism moves the pressing head away from the first area while pressing the first area toward a center side in a back surface of the chip with the pin during the second period. Joining equipment. 12. The chip bonding apparatus according to claim 11, wherein the pressing mechanism sets the bonding area of the first region to the back surface of the chip in the third period to zero. 13. The chip joining apparatus according to claim 12, wherein the pressing mechanism releases the adhesion of the chip to the center of the back surface of the chip in the first region during the third period. 14. The chip joining apparatus according to claim 13, wherein the pressing mechanism moves the pin away from the first region during the third period. 11. An arrangement mechanism having a sheet stage capable of fixing the sheet on which the chip can be arranged and a substrate stage provided on the second side of the sheet and capable of providing the substrate. 17. The chip joining apparatus according to any one of items 1 to 16. The arrangement mechanism arranges an activated surface of the chip and an activated surface of the substrate in a state where the back surface of the chip is bonded to the first region of the sheet, and
The pressing mechanism presses the first area of the sheet in the direction of the second side in the first period to cause the activated surface of the chip to be activated on the activated surface of the substrate. The chip bonding apparatus according to claim 17, wherein the chip bonding is performed.

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