JP2019534556A - Front-side imaging device and method for manufacturing the device - Google Patents

Abstract

The present invention relates to a substrate having a p-type doped semiconductor support substrate (1), an electrically insulating layer (2), and a semiconductor layer (3) called an active layer in order, and a photodiode in the active layer of the substrate. A front-side imaging device comprising a matrix array, characterized in that the substrate has a p + -type doped semiconductor epitaxial layer (4) between the support substrate (1) and the electrically insulating layer (2). It is related with the front side surface type imaging device. The present invention also relates to a method for manufacturing the element.

Description

Field of Invention

  The present invention relates to a “front side” type image pickup device substrate, an image pickup device including the substrate, and a method of manufacturing the substrate.

Prior art

  U.S. Pat. No. 2016/0118431 describes a “front side” type imaging device (also referred to as “front side imager”).

  As shown in FIG. 1, this device has a semiconductor-on-insulator (SOI) substrate, which is a P + -doped silicon support substrate 1, an oxidation substrate in order from the back side to the front side. A silicon layer 2 and a P-doped silicon layer 3 called an active layer are included, and a matrix array of photodiodes, each of which is a pixel, is set in the silicon layer 3.

Conventionally, in P-doping, a P-type dopant (for example, boron) is added at a concentration of about 10 ¹⁴ to several 10 ¹⁵ at / cm ³ .

In P + doping, a P-type dopant is added at a concentration of several tens of ¹⁵ to 10 ¹⁹ at / cm ³ .

  The use of a P + doped silicon support substrate is used to minimize electron transfer from the support substrate to the active layer, which can generate dark currents that generate carriers in the photodiode even in the absence of light. It is. On the other hand, in order to collect the majority of carriers in the active layer at the interface between the active layer 3 and the silicon oxide layer 2, the support substrate can be biased at a voltage lower than that of the active layer. The silicon oxide layer 2 is provided to insulate the active layer 3 from the substrate 1 and prevent electrons from moving from the support substrate to the active layer.

  However, there is an interest in the difficulty of manufacturing P + doped substrates in the industrial production line for SOI substrates.

  In fact, in some manufacturing sites, for example, during the cleaning or heat treatment process, there is a situation where boron is diffused from the support substrate and scattered in the environment of the production line.

  The production line is generally not for only one type of SOI substrate, and in particular allows for the production of little or no doped substrates. Nevertheless, if boron scattered in the environment contaminates the substrates, the diffusion amount cannot be accurately controlled by this diffusion, and the electrical characteristics of the substrate may be changed.

  One of the objects of the present invention is to overcome the above-mentioned problems and provide a “front-side” imaging that includes a substrate that can minimize dark current without causing contamination problems in the substrate production line. It is to provide an element.

To that end, the present invention provides:
A front-side imaging device comprising a p-type doped semiconductor support substrate, an electrical insulating layer, and a substrate having a semiconductor layer called an active layer in sequence, and a matrix array of photodiodes in the active layer of the substrate. ,
Provided is a front-side imaging device characterized in that a substrate has a p + -type doped semiconductor epitaxial layer between a support substrate and an electrical insulating layer.

  In the context of this case, “front side” means the side on which the imaging device is intended to be irradiated with light radiation.

  When the support substrate is a laminate of different materials, “support substrate material” means the material located on the front side, where the epitaxial layer is the same (or sufficiently the same) as the underlying substrate. Grows with a near lattice constant.

  In some embodiments, the epitaxial layer is formed of the same semiconductor material as the support substrate.

  In particular, there are embodiments in which the support substrate and the epitaxial layer are formed of silicon.

  In some embodiments, the active layer is formed of silicon.

  The thickness of the electrically insulating layer is advantageously 10 to 50 nm.

  The thickness of the epitaxial layer is preferably 0.1 to 3 μm.

Another object of the present invention is to
Providing a p-type doped semiconductor support substrate;
-Epitaxially growing a p + doped semiconductor layer on the support substrate;
-Providing a donor substrate having a surface layer of semiconductor material;
-Bonding the epitaxial layer with the semiconductor material layer so that the electrically insulating layer is located at the interface;
Manufacturing a front-side imaging device comprising: thinning a donor substrate so that the semiconductor active layer is transferred onto a support substrate; and forming a matrix array of photodiodes in the active layer of the substrate It is about the method.

  An aspect in which the above manufacturing method includes a step of forming an embrittlement zone for separating the surface layer, and includes cutting the donor substrate along the embrittlement zone in thinning the donor substrate. is there.

  Further, in some embodiments, forming the embrittlement zone includes implanting atomic species into the donor substrate.

  There is also an aspect in which the manufacturing method further includes a step of providing a dopant diffusion barrier layer with respect to the epitaxial layer.

Further features and advantages of the present invention are described in detail below with reference to the accompanying drawings described below.
FIG. 1 is a cross-sectional view of an SOI substrate for a front side image sensor described in US Pat. No. US2016 / 0118431; FIG. 2 is a cross-sectional view of a substrate according to one aspect of the present invention; -Figures 3A to 3C are diagrams illustrating different steps of a method of manufacturing a substrate according to one aspect of the invention, -Figures 3A to 3C are diagrams illustrating different steps of a method of manufacturing a substrate according to one aspect of the invention, -Figures 3A to 3C are diagrams illustrating different steps of a method of manufacturing a substrate according to one aspect of the invention, FIG. 4 is a cross-sectional view of a pixel of a “front side” type imaging device comprising a substrate according to one aspect of the present invention; FIG. 5 shows the simulation results of the boron atom concentration in the substrate according to one embodiment of the present invention before the heat treatment (curve a) and after two normal heat treatments (curves b and c). ing.

  Note that different layers are not necessarily shown at the same enlargement ratio in order to make the drawing easier to see.

Detailed Description of the Invention

  FIG. 2 is a cross-sectional view of a substrate of a front-side image sensor according to one embodiment of the present invention.

  This substrate includes, in order from the back side to the front side, a p-type doped semiconductor support substrate 1, a p + type doped semiconductor layer 4, an electrical insulating layer 2, and a semiconductor layer 3 called an active layer. have.

  Layer 3 is adapted to correspond to a matrix array (not shown) of photodiodes capable of sensing an image. This layer 3 can advantageously be formed of silicon, but is not limited thereto. It is also possible to dope this layer slightly.

  The support substrate 1 is generally obtained by cutting a p-type doped single crystal ingot. The substrate 1 is advantageously made of silicon.

  The p + -type doped semiconductor layer 4 is formed by epitaxial growth on the support substrate 1. In order to minimize defects in the layer 4, the lattice constant of the layer 4 is close to the lattice constant of the support substrate 1. This epitaxial layer is advantageously the same material as the material of the support substrate 1 (for example, if the support substrate 1 is p-doped silicon, p + doped silicon), or a different material (for example, If the support substrate 1 is p-doped silicon, it may be p + doped SiGe). Of course, the materials are not limited to the examples given here.

  The thickness of the epitaxial layer 4 is advantageously 0.1 to 3 μm, and preferably 0.1 to 1 μm.

  The layer 2 sandwiched between the epitaxial layer 4 and the active layer electrically insulates these layers.

  While this layer 2 is formed of silicon oxide is one preferred embodiment, other dielectric materials may be suitable.

  The thickness of the electrical insulating layer 2 is advantageously 10 to 50 nm. As will be shown later, it is possible to apply an electrical bias to the p + doped layer at a lower voltage than the active layer 3 in order to concentrate most of the carriers in the active layer at the interface between the active layer 3 and the silicon oxide layer 2. It is.

  In the known substrate shown in FIG. 1, the structure provided by the present invention is a layer having two different doping levels, in contrast to the portion located on the back side of the silicon oxide layer being sufficiently p + doped. Consists of. That is, the p + doped layer 4 with a limited thickness located directly on the back side surface of the electrical insulating layer 2 and the support substrate 1 substantially thicker than the layer 4 located on the back side surface of the layer 4.

  This two-part structure can avoid or at least minimize the contamination phenomenon due to the diffusion of doping species from the substrate.

Indeed, even with the conventional arrangement, the exposed portion of the p + doped material (the portion where the substrate contacts the surrounding environment) in the arrangement of the present invention is substantially smaller. For example,
-In the case of a p + doped support substrate (corresponding to a conventional substrate) having a diameter of 30 cm, a thickness of 775 μm, and a chamfering width of 1 mm, the exposed portion is the sum of the back side surface area of the substrate, the side area of the substrate, and the area of the chamfered portion Equal, ie
π * 15 ² + 2 * π * 15 * 0.0775 + π * (15 ² −14.9 ² ) = 724 cm ²
And
-In the case of a 1 mm thick p + doped epitaxial layer (corresponding to one aspect of the present invention) formed on a p-doped substrate with a diameter of 30 cm and a chamfering width of 1 mm, the exposed part is the side area and chamfered part of this layer Equal to the sum of the areas of
2 * π * 15 * 0.0001 + π * (15 ² −14.9 ² ) = 9 cm ²
It is.

  Since the substrate is not strictly cylindrical and has a peripheral chamfered portion, when an SOI substrate is manufactured by layer transfer (for example, smart cut [registered trademark] method described later), the donor substrate is transferred to the center of the receiver substrate. Note that the chamfer is not transferred. That is, the receiver substrate is not covered with the transferred layer up to the chamfered portion. In order to avoid complicating the drawing, the chamfered portion is not shown in the drawing.

  In the example described above, the exposed portion of p + material on the substrate according to the invention is nearly 80 to 100 times smaller than that on the conventional substrate.

  As a result, the doping species contained in the epitaxial layer 4 are much less susceptible to contamination than the bulk support substrate.

  As an embodiment not shown, it is possible to further limit the diffusion of the doping species out of the substrate by providing a barrier layer for the p + epitaxial layer. Such a barrier layer can in particular be formed undoped with the same material as layer 1 or with the same lattice constant as layer 4. However, the formation of such a barrier layer requires an additional production process (for example, a lithographic and etching process for a marginal portion, whether or not including a chamfered portion). Increase complexity.

  A manufacturing method of the front-side image pickup device substrate according to the present invention, particularly a manufacturing method using the famous smart cut [registered trademark] method will be described below with reference to FIGS. 3A to 3C.

As shown in FIG. 3A, a p + doped support base is provided, and the p + doped layer 4 is epitaxially grown to a desired thickness. Thus, a receiver structure for transferring the active layer is formed. The thickness of layer 4 depends on the doping level of this layer, the higher the doping level (up to 10 ¹⁹ at / cm ³ ), the thinner the layer thickness, so that the doping species are not emitted too strongly from the substrate. Must. The barrier layer described above is useful for maintaining a predetermined thickness of layer 4 depending on the target doping level and the subsequent heat treatment to be performed.

  On the other hand, as shown in FIG. 3B, a donor substrate having a surface layer 31 of a semiconductor material for forming the active layer 3 of the SOI substrate is provided. The surface layer is advantageously delimited by an embrittlement zone 32. There is also an aspect in which the embrittlement zone 32 is formed by implanting atomic species such as hydrogen and / or helium. Alternatively, the embrittlement zone can be a porous zone.

  The surface layer 31 of the donor substrate advantageously has an electrical insulating layer for forming the buried insulating layer 2 of the SOI substrate. This electrically insulating layer 2 can also be an oxide of the material of the layer 31. In some cases, such an electrically insulating layer may be present on the epitaxial layer 4 of the receiver structure, or may be present in both the donor structure and the receiver structure.

  As shown in FIG. 3C, the donor substrate is bonded to the receiver structure so that the electrically insulating layer becomes a bonding interface.

  Although the planarity of the receiver structure may be deformed by forming an epitaxial layer on the support substrate, the applicant confirms that the bonding force between the donor substrate and the receiver structure is stably maintained. doing.

  Next, the front side semiconductor layer 31 is transferred to the support substrate 1 by thinning the donor substrate. According to the smart cut [registered trademark] method, in this thinning step, the donor substrate is cut along the embrittlement zone 32. Then, for example, possible finishing steps such as annealing, polishing and / or cleaning steps are performed to obtain the substrate shown in FIG.

  Alternatively (not shown), the donor substrate is not provided with any embrittlement zone, and the material is removed by polishing the donor substrate from the opposite side of the bonding interface, and the surface layer is transferred to the donor substrate. Transcript.

  Next, a matrix array of photodiodes is provided on the active layer 3. A method for manufacturing such a matrix array of photodiodes is well known to those skilled in the art and will not be described in detail here.

  FIG. 4 shows a part of a front-side image sensor according to the present invention. In this figure, only the element portion corresponding to the pixel is shown. This pixel is electrically insulated from other pixels formed in the active layer 3 by the insulating groove 7.

  An N-doped region 33 is formed below the front side surface of the active layer 3. This N-doped region 33 forms a photodiode with the P-doped active layer 3. The region 34 formed between the region 33 and the front side of the layer 3 is advantageously at a higher N-doping level than the region 33 in order to passivate the interface. A passivating layer 6 is formed on the active layer 3 so that a portion for electrically controlling the pixel can be protected.

  In some cases, other layers, such as a filter, may be formed on the passivation layer 6, but this is not shown in FIG.

  Since the structure of the image pickup element and the method for manufacturing the same are known to those skilled in the art, they will not be described in further detail.

  When the electrical insulating layer 2 is sufficiently thin (about 10 to 50 nm), it acts as a dielectric of the capacitor formed by the layers 3 and 4. When the image sensor is operated, the active layer 3 is generally biased with a voltage corresponding to the ground. The voltage V4 lower than the active layer 3, and thus V4 is a negative voltage, but it is advantageous if the voltage V4 biases the p + doped epitaxial layer. By applying the negative voltage V4 on the same principle as described in US Pat. No. 2016/0118431, most of the carriers (holes) of the layer 3 are formed at the interface between the electrical insulating layer 2 and the active layer 3. Encourage people to gather. This charge concentration generates a positive voltage V3 at the interface between the layer 3 and the electrical insulating layer 2. Thus, a potential difference V3-V4 is applied to this capacitor. The applied voltage V4 depends on the layer thickness of the electrical insulating layer 2.

  FIG. 5 shows one image of boron atom concentration in the substrate according to one embodiment of the present invention before the heat treatment (curve a) and after two normal heat treatments (curves b and c). The simulation results are shown within the range of manufacturing the device.

The horizontal axis represents the depth (unit: μm) of the SOI substrate starting from the front side of the active layer (the symbols 1 and 4 correspond to the respective symbols in FIGS. 2 and 3C). The vertical axis represents the concentration of boron atoms (unit: atoms / cm ³ ).

  The curve a has a gun-eye (Clenel) shape indicating that a high boron atom concentration is limited in the epitaxial layer 4.

  Curves b and c correspond to the same SOI substrate as curve a, but after two different heat treatments, the substrate of curve c shows a higher heat balance than the substrate of curve b. Both of these curves represent a slight diffusion of boron atoms from the layer 4 to the underlying support substrate 1, but the diffusion is limited. Therefore, the doping level of the epitaxial layer and its dark current prevention effect are maintained.

  An additional barrier layer of the same type as described above may be provided between the support substrate 1 and the epitaxial layer 4 to prevent diffusion as described above.

  There is also an aspect in which the epitaxial layer 4 has a predetermined doping gradient such that the doping amount increases toward the front side in contact with the electrical insulating layer 2. Even if diffusion occurs inside the layer 4 having such a gradient under the influence of the heat treatment, an average doping amount sufficient for the purpose of the present application can be maintained.

  US Patent US2016 / 0118431

Claims (10)

A substrate having a semiconductor support substrate (1) doped with p-type, an electrically insulating layer (2), and a semiconductor layer (3) called an active layer in order;-a photodiode in the active layer (3) of the substrate; A front-side imaging device comprising a matrix array,
A front-side imaging device, characterized in that the substrate has a p + -type doped semiconductor epitaxial layer (4) between the support substrate (1) and the electrically insulating layer (2).   2. The device according to claim 1, wherein the epitaxial layer (4) is made of the same semiconductor material as the support substrate (1).   3. Device according to claim 2, wherein the support substrate (1) and the epitaxial layer (4) are made of silicon.   The element according to claim 1, wherein the active layer is made of silicon.   The device according to claim 1, wherein the thickness of the electrical insulating layer is from 10 to 50 nm.   The device according to claim 1, wherein the epitaxial layer has a thickness of 0.1 to 3 μm. Providing a p-type doped semiconductor support substrate (1),
-Epitaxially growing a p + doped semiconductor layer (4) on the supporting substrate (1);
Providing a donor substrate (30) having a surface layer (31) of semiconductor material;
-Bonding the epitaxial layer (4) to the semiconductor material layer (31) and the electrically insulating layer (2) so as to be located at the bonding interface;
-Thinning the donor substrate (30) so that the semiconductor active layer (3) is transferred onto the support substrate (1); and-forming a matrix array of photodiodes in the semiconductor active layer (3). A method for manufacturing a front-side image sensor, comprising:   The embrittlement zone (32) for separating the surface layer (31) is formed in the donor substrate (30), and the embrittlement zone (32) is formed while the donor substrate (30) is thinned. The method of claim 7, comprising cutting along.   The method of claim 8, wherein forming the embrittlement zone (32) comprises implanting atomic species into the donor substrate (30).   The method according to any one of claims 7 to 9, further comprising the step of providing a dopant diffusion barrier layer with respect to the epitaxial layer (4).

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