JP2019506656A5 - - Google Patents

Download PDF

Info

Publication number
JP2019506656A5
JP2019506656A5 JP2018529234A JP2018529234A JP2019506656A5 JP 2019506656 A5 JP2019506656 A5 JP 2019506656A5 JP 2018529234 A JP2018529234 A JP 2018529234A JP 2018529234 A JP2018529234 A JP 2018529234A JP 2019506656 A5 JP2019506656 A5 JP 2019506656A5
Authority
JP
Japan
Prior art keywords
pulses
pulse
state change
devices
fault condition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2018529234A
Other languages
English (en)
Japanese (ja)
Other versions
JP6841828B2 (ja
JP2019506656A (ja
Filing date
Publication date
Priority claimed from US14/966,844 external-priority patent/US9973431B2/en
Application filed filed Critical
Publication of JP2019506656A publication Critical patent/JP2019506656A/ja
Publication of JP2019506656A5 publication Critical patent/JP2019506656A5/ja
Application granted granted Critical
Publication of JP6841828B2 publication Critical patent/JP6841828B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2018529234A 2015-12-11 2016-11-10 単一回線ｐｍｉｃホスト低レベル制御インターフェース Active JP6841828B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/966,844 US9973431B2 (en) 2015-12-11 2015-12-11 Single line PMIC-host low-level control interface
US14/966,844 2015-12-11
PCT/US2016/061392 WO2017099937A1 (en) 2015-12-11 2016-11-10 Single-line pmic-host low-level control interface

Publications (3)

Publication Number Publication Date
JP2019506656A JP2019506656A (ja) 2019-03-07
JP2019506656A5 true JP2019506656A5 (enExample) 2019-12-05
JP6841828B2 JP6841828B2 (ja) 2021-03-10

Family

ID=57406349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018529234A Active JP6841828B2 (ja) 2015-12-11 2016-11-10 単一回線ｐｍｉｃホスト低レベル制御インターフェース

Country Status (9)

Country Link
US (1) US9973431B2 (enExample)
EP (1) EP3387541A1 (enExample)
JP (1) JP6841828B2 (enExample)
KR (1) KR102728870B1 (enExample)
CN (1) CN108351855B (enExample)
AU (1) AU2016365655A1 (enExample)
BR (1) BR112018011714A2 (enExample)
TW (1) TW201721459A (enExample)
WO (1) WO2017099937A1 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190317911A1 (en) * 2018-04-17 2019-10-17 Qualcomm Incorporated General purpose input output triggered interface message
US10775424B2 (en) 2018-08-31 2020-09-15 Micron Technology, Inc. Capacitive voltage divider for monitoring multiple memory components
US10453541B1 (en) 2018-08-31 2019-10-22 Micron Technology, Inc. Capacitive voltage divider for power management
US10482979B1 (en) 2018-08-31 2019-11-19 Micron Technology, Inc. Capacitive voltage modifier for power management
US10872640B2 (en) 2018-08-31 2020-12-22 Micron Technology, Inc. Capacitive voltage dividers coupled to voltage regulators
KR102837804B1 (ko) * 2020-03-02 2025-07-22 삼성전자주식회사 듀얼 핀 인터페이스를 갖는 멀티플 전력 관리 집적 회로들 및 장치
US11323507B2 (en) * 2020-04-07 2022-05-03 Supercell Oy Server system and method of managing server system
CN113794539B (zh) * 2021-06-08 2024-03-22 龙迅半导体（合肥）股份有限公司 一种双向通信控制方法和装置
KR20230013732A (ko) 2021-07-19 2023-01-27 삼성전자주식회사 복수의 전력 관리 집적 회로들을 포함하는 전자 장치 및 그것의 동작 방법
CN113688094B (zh) * 2021-08-24 2024-03-22 中汽创智科技有限公司 一种车机系统的数据通信方法、装置、系统及存储介质

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5826068A (en) 1994-11-09 1998-10-20 Adaptec, Inc. Integrated circuit with a serial port having only one pin
KR100198669B1 (ko) 1996-10-24 1999-06-15 구본준 직렬 인터페이스장치 및 인터페이스 방법
TWI236264B (en) 2002-09-05 2005-07-11 Winbond Electronics Corp Single wire serial communication protocol method and circuit
US20040122917A1 (en) * 2002-12-18 2004-06-24 Menon Jaishankar Moothedath Distributed storage system for data-sharing among client computers running defferent operating system types
US7406100B2 (en) 2003-05-21 2008-07-29 Atmel Corporation Bi-directional single wire interface
US7181557B1 (en) 2003-09-15 2007-02-20 National Semiconductor Corporation Single wire bus for connecting devices and methods of operating the same
WO2007034613A1 (ja) * 2005-09-26 2007-03-29 Matsushita Electric Industrial Co., Ltd. 単線双方向通信装置及びシステム
US7788430B2 (en) * 2007-09-14 2010-08-31 Microchip Technology Incorporated Enhanced single-node protocol for data, address and control operations
US8405512B2 (en) * 2008-02-01 2013-03-26 Apple Inc. System and method for accessing diagnostic information
US9013305B2 (en) 2012-04-18 2015-04-21 Qualcomm Incorporated Bidirectional single-pin alarm interface
US9703737B2 (en) * 2013-03-15 2017-07-11 Intel Corporation Method, apparatus, and system for improving inter-chip and single-wire communication for a serial interface
US9400295B2 (en) * 2013-05-09 2016-07-26 Qualcomm Incorporated Method and devices for non-intrusive power monitoring
US9436248B2 (en) * 2013-07-31 2016-09-06 Freescale Semiconductor, Inc. Data processing system with protocol determination circuitry
KR101526874B1 (ko) * 2013-08-12 2015-06-09 현대오트론 주식회사 양방향 와치독 장치 및 그 제어 방법
US10108578B2 (en) 2013-09-11 2018-10-23 Texas Instruments Incorporated Single wire communications interface and protocol
KR101534974B1 (ko) * 2013-12-19 2015-07-08 현대자동차주식회사 다중 마이크로 코어 감시 장치 및 방법

Similar Documents

Publication Publication Date Title
JP2019506656A5 (enExample)
JP2017520053A5 (enExample)
WO2012125719A3 (en) Methods and apparatus for testing inaccessible interface circuits in a semiconductor device
WO2015066491A8 (en) Hand hygiene use and tracking in the clinical setting via wearable computers
IL277567A (en) A protocol-level controller for system-on-chip (SoC) reset factor and power management
WO2015195329A3 (en) Dynamically adjustable multi-line bus shared by multi-protocol devices
JP2016538747A5 (enExample)
JP2016538624A5 (enExample)
MA40436A (fr) Procédé et système de prise en charge d'opérations de protocole de commande de relais distribué (drcp) lors d'une mauvaise configuration
RU2017107192A (ru) Передача питания через питаемое устройство
MY184148A (en) Power management system
JP2018518911A5 (enExample)
EP3194989A4 (en) A structure and implementation method for implementing an embedded serial data test loopback, residing directly under the device under test within a printed circuit board
CN113656340B (zh) I2c总线的通信控制方法、系统和装置
AR109218A1 (es) Métodos y aparatos para la operación de por lo menos una unidad de red o un dispositivo de red en un sistema de comunicación inalámbrica, y unidades y dispositivos de red
AR107509A1 (es) Aparato para realizar la transferencia de configuración y datos mediante el movimiento físico de un dispositivo de transferencia de memoria rápida
JP2016533608A5 (enExample)
CO2017007205A2 (es) Interconexión y método para controlar la transferencia de mensajes electrónicos
EP3037833A3 (en) Test circuit and method of controlling test circuit
EP3462325A3 (en) Combining presence detect pin with device management bus reset and power disable
MX363410B (es) Disposición de prueba y método para probar una instalación de conmutación.
JP2015122694A5 (enExample)
JP2013229739A5 (enExample)
WO2015119753A3 (en) Uploading data from mobile devices
AU2015336090A8 (en) Autonomous control systems and methods