JP2019202504A - Semiconductor device, optical print head, and image formation device - Google Patents

Abstract

To reduce variation in quantity of light in plural light emitting thyristors which are arranged on the same base material part.SOLUTION: In a light emitting thyristor 100_n closest to an end of a semiconductor device 10, a distance X1 between a first surface 121 which includes an end face of a first semiconductor layer 109 on a side near the end and a second surface 122 which includes an end face of a third semiconductor layer 104, is smaller than a distance X2 between a third surface 123 which includes an end face of the first semiconductor layer 109 on a side far from the end and a fourth surface 124 which includes an end face of the third semiconductor layer 104. In the other light emitting thyristor 100_n-1 of the semiconductor device 10, a distance X3 between a fifth surface 131 which includes an end face of a fifth semiconductor layer 119 on one side and a sixth surface 132 which includes an end face of a seventh semiconductor layer 114, is equal to a distance X4 between a seventh surface 133 which includes an end face of the fifth semiconductor layer 119 on the other side and an eighth surface 134 which includes an end face of the seventh semiconductor layer 114, and the distance X2 is equal to the distance X3.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a semiconductor device having a plurality of light emitting thyristors, an optical print head having the semiconductor device, and an image forming apparatus having the optical print head.

  Conventionally, an optical print head having a plurality of light emitting element array chips has been used as an exposure device in an electrophotographic image forming apparatus. Each light emitting element array chip has, for example, a plurality of three-terminal light emitting elements, that is, a plurality of light emitting thyristors arranged in the longitudinal direction of the base material on the base material (see, for example, Patent Document 1).

Japanese Patent Laying-Open No. 2010-239084 (for example, see FIG. 9)

  In general, in the same light-emitting element array chip, the light amount of light emitted from the light-emitting thyristor closest to both ends in the longitudinal direction of the substrate among the plurality of light-emitting thyristors arranged on the substrate (that is, the light emission intensity) is It becomes larger than the amount of light emitted from the light emitting thyristors other than the light emitting thyristor closest to both ends. As a countermeasure, it is conceivable to reduce the amount of light by reducing the drive current supplied to the light emitting thyristor closest to both ends. However, when the light emitting element array chip is continuously driven, the amount of light emitted from the light emitting thyristor varies with the driving time, and the amount of variation depends on the current value of the driving current. For this reason, when the current value of the drive current is set to a different value for each light emitting thyristor, variations occur in the amount of light emitted from the plurality of light emitting thyristors.

  The present invention has been made to solve the above-described problems, and a semiconductor device capable of reducing variation in the amount of light emitted from a plurality of light-emitting thyristors, an optical print head having the semiconductor device, and the An object of the present invention is to provide an image forming apparatus having an optical print head.

  A semiconductor device according to one embodiment of the present invention includes a base material portion, and a plurality of light-emitting thyristors provided on the base material portion and arranged at intervals in the longitudinal direction of the base material portion, Of the plurality of light emitting thyristors, the first element that is the light emitting thyristor closest to the end portion in the longitudinal direction of the base portion is a first conductive type first semiconductor layer, the first conductive type, A second semiconductor layer of a different second conductivity type, a third semiconductor layer of a first conductivity type, and a fourth semiconductor layer of a second conductivity type are arranged from the base portion side to the fourth semiconductor layer. A first semiconductor multilayer structure in which the third semiconductor layer, the second semiconductor layer, and the first semiconductor layer are stacked in this order, and the first element of the plurality of light emitting thyristors The second element, which is a light emitting thyristor other than the first, has a first conductivity type fifth semiconductor layer and a second conductivity type second thyristor. A semiconductor layer of the first conductivity type, a semiconductor layer of the first conductivity type, and an eighth semiconductor layer of the second conductivity type from the base portion side, the eighth semiconductor layer, the seventh semiconductor layer, A first surface having a second semiconductor multilayer structure in which the sixth semiconductor layer and the fifth semiconductor layer are stacked in this order, including an end surface of the first semiconductor layer on a side close to the end; The first distance between the second surface including the end surface of the third semiconductor layer on the side close to the end portion is a third distance including the end surface of the first semiconductor layer on the side far from the end portion. Of the fifth semiconductor layer on one side in the longitudinal direction is smaller than a second distance between the first surface and the fourth surface including the end surface of the third semiconductor layer on the side far from the end. Between the fifth surface including the end surface and the sixth surface including the end surface of the seventh semiconductor layer on the one side The distance of 3 is the seventh surface including the end surface of the fifth semiconductor layer on the other side opposite to the one side and the eighth surface including the end surface of the seventh semiconductor layer on the other side. And the second distance is equal to the third distance.

  According to the present invention, variation in the amount of light emitted from a plurality of light emitting thyristors in the same semiconductor device can be reduced.

1 is a schematic plan view showing a light emitting element array chip as a semiconductor device according to a first embodiment of the present invention. It is a schematic sectional drawing which shows the cross-sectional structure which cuts the light emitting element array chip | tip of FIG. 1 by the 2A-2A line and 2B-2B line. It is a schematic sectional drawing (the 1) which shows the manufacturing method of the multilayer semiconductor layer in which the light emitting thyristor which concerns on 1st Embodiment is formed. It is a schematic sectional drawing (the 2) which shows the manufacturing method of the multilayer semiconductor layer in which the light emitting thyristor which concerns on 1st Embodiment is formed. It is a schematic sectional drawing (the 3) which shows the manufacturing method of the multilayer semiconductor layer in which the light emitting thyristor which concerns on 1st Embodiment is formed. It is a schematic sectional drawing which shows the cross-sectional structure which cuts the light emitting element array chip | tip of FIG. 1 by a 2B-2B line. It is a schematic plan view which shows the light emitting element array chip of a comparative example. It is a schematic sectional drawing which shows the cross-sectional structure which cuts the light emitting element array chip | tip of FIG. 7 by the 8A-8A line and the 8B-8B line. It is explanatory drawing which shows roughly the light quantity of the light radiate | emitted from the light emitting thyristor of the light emitting element array chip | tip of a comparative example. It is explanatory drawing which shows roughly the light quantity and light intensity distribution of the light radiate | emitted from the light emitting thyristor of the light emitting element array chip | tip of a comparative example. It is explanatory drawing which shows roughly the light quantity of the light radiate | emitted from the light emitting thyristor of the light emitting element array chip concerning 1st Embodiment. It is explanatory drawing which shows roughly the light quantity and light intensity distribution of the light radiate | emitted from the light emitting thyristor of the light emitting element array chip | tip of a comparative example (FIG. 7) and 1st Embodiment (FIG. 6). It is a schematic sectional drawing which shows the light emitting element array chip | tip as a semiconductor device concerning the 2nd Embodiment of this invention. It is a schematic sectional drawing which shows the light emitting element array chip as a semiconductor device which concerns on the 3rd Embodiment of this invention. It is a schematic sectional drawing which shows the light emitting element array chip as a semiconductor device which concerns on the 4th Embodiment of this invention. It is a schematic plan view which shows the light emitting element array chip as a semiconductor device which concerns on the 5th Embodiment of this invention. FIG. 17 is a schematic cross-sectional view illustrating a cross-sectional structure of the light-emitting element array chip in FIG. 16 cut along lines 17A-17A and 17B-17B. FIG. 17 is a schematic cross-sectional view illustrating a cross-sectional structure of the light-emitting element array chip in FIG. 16 taken along line 17B-17B. It is explanatory drawing which shows roughly the light quantity of the light radiate | emitted from the light emitting thyristor of the light emitting element array chip | tip of 5th Embodiment. It is explanatory drawing which shows roughly the light quantity and light intensity distribution of the light radiate | emitted from the light emitting thyristor of the light emitting element array chip | tip of a comparative example (FIG. 7) and 5th Embodiment (FIG. 18). It is explanatory drawing which shows roughly the light quantity and light intensity distribution of the light radiate | emitted from the light emitting thyristor of the light emitting element array chip of 1st Embodiment (FIG. 6) and 5th Embodiment (FIG. 18). It is a schematic perspective view which shows the principal part of the optical print head which concerns on the 6th Embodiment of this invention. It is a schematic sectional drawing which shows the structure of the optical print head concerning 6th Embodiment. It is a schematic sectional drawing which shows the structure of the image forming apparatus which concerns on the 7th Embodiment of this invention.

  Hereinafter, a light emitting element array chip, an optical print head, and an image forming apparatus, which are semiconductor devices according to embodiments of the present invention, will be described with reference to the accompanying drawings. The following embodiments are merely examples, and various modifications can be made within the scope of the present invention.

<< 1 >> First Embodiment << 1-1 >> Light Emitting Element Array Chip FIG. 1 is a schematic plan view showing a light emitting element array chip 10 as a semiconductor device according to the first embodiment. FIG. 2 is a schematic cross-sectional view showing a cross-sectional structure of the light-emitting element array chip 10 shown in FIG. 1 cut along lines 2A-2A and 2B-2B.

  As shown in FIG. 1 or 2, the light-emitting element array chip 10 includes a base material 151, a planarization layer 152 formed on the base material 151, a plurality of three-terminal light-emitting elements, that is, a plurality of light-emitting thyristors 100_1,. , 100_n. n is an integer of 2 or more. Further, the base material 151 and the planarizing layer 152 constitute a base material portion 150 on which the plurality of light emitting thyristors 100_1,..., 100_n, that is, the semiconductor multilayer structure 110 is formed.

  The light emitting thyristors 100_1,..., 100_n are disposed on the planarization layer 152 of the base member 150. The light emitting thyristors 100_1,..., 100_n are regularly arranged (for example, at equal intervals) with a gap in the longitudinal direction of the base member 150, that is, the longitudinal direction of the base member 151 (the lateral direction in FIG. 1 or FIG. 2). The A driving IC that is an integrated circuit that drives the light-emitting thyristors 100_1,..., 100_n may be provided inside the base material 151 and below the planarization layer 152. On the base material 151, a plurality of electrode pads 153 and electrode wiring (not shown) are provided. The base material 151 is made of Si (silicon), for example, and has a thickness of, for example, 250 μm.

  The surface of the planarizing layer 152 is planarized. The planarization layer 152 is formed of, for example, an organic film, an inorganic film, or a metal, and has a thickness of 2.00 μm, for example. The unevenness (that is, surface roughness) of the surface of the planarization layer 152 is desirably 10 nm or less. On the surface of the planarization layer 152, the semiconductor multilayer structure 110 is bonded. The semiconductor multilayer structure 110 includes light emitting thyristors 100_1,. The semiconductor multilayer structure 110 is formed from, for example, a semiconductor thin film (for example, an epitaxial growth film) which is a multilayer semiconductor layer (110a shown in FIGS. 3 to 5 described later). Note that, when the unevenness of the surface of the base material 151 (that is, the surface roughness) is 10 nm or less, the planarization layer 152 is not provided, and the semiconductor multilayer structure 110 is directly bonded on the surface of the base material 151. Good. In addition, the base material 151 of the base material part 150 may be formed from materials other than Si, such as glass, a ceramic, a plastic, or a metal.

<< 1-2 >> Manufacturing Method of Semiconductor Multilayer Structure FIGS. 3 to 5 are schematic cross-sectional views showing a manufacturing method of a multilayer semiconductor layer 110a in which the light-emitting thyristors 100_1,..., 100_n of FIG. ). 3 shows a formation process of the multilayer semiconductor layer 110a, FIG. 4 shows a peeling process of the multilayer semiconductor layer 110a, and FIG. 5 shows the multilayer semiconductor layer 110a on the planarization layer 152 of the base member 150. Shows the bonding process. The multilayer semiconductor layer 110a is a semiconductor thin film that forms the basis of the semiconductor multilayer structure 110 shown in FIG.

  As shown in FIG. 3, first, a buffer layer 702 for growing a multilayer semiconductor layer (for example, an epitaxial growth film) 110a is formed on a growth substrate 701. Next, a separation layer 703 serving as an etching layer for separating the multilayer semiconductor layer 110a from the growth substrate 701 is formed. The growth substrate 701 is, for example, an N-type GaAs (gallium arsenide) layer using Si as a dopant, and has a thickness of, for example, 550 μm. The buffer layer 702 is, for example, an N-type GaAs layer using Si as a dopant, and has a thickness of 0.20 μm, for example. The release layer 703 is, for example, an N-type AlAs (aluminum / arsenic) layer using Si as a dopant, and has a thickness of, for example, 0.05 μm.

As shown in FIG. 3, the multilayer semiconductor layer 110 a includes, for example, an N-type GaAs layer 101 a, an N-type Al _0.4 Ga _0.6 As layer 102 a, and an N-layer that are sequentially stacked from the growth substrate 701 side. Type Al _0.15 Ga _0.85 As layer 103a, P type Al _0.3 Ga _0.7 As layer 104a, N type Al _0.15 Ga _0.85 As layer 105a, and P type Al _0.4 It has a Ga _0.6 As layer 106a and a P-type GaAs layer 107a. The N-type GaAs layer 101a is formed using Si as a dopant, for example, and has a thickness of 1.00 μm, for example. The N-type Al _0.4 Ga _0.6 As layer 102a is formed using Si as a dopant, for example, and has a thickness of 0.50 μm, for example. The N-type Al _0.15 Ga _0.85 As layer 103a is formed using Si as a dopant, for example, and has a thickness of 0.50 μm, for example. The P-type Al _0.3 Ga _0.7 As layer 104a is formed using C (carbon) as a dopant, for example, and has a thickness of 0.40 μm, for example. The N-type Al _0.15 Ga _0.85 As layer 105a is formed using Si as a dopant, for example, and has a thickness of 0.20 μm, for example. The P-type Al _0.4 Ga _0.6 As layer 106a is formed using C (carbon) as a dopant, for example, and has a thickness of 0.50 μm, for example. The P-type GaAs layer 107a is formed using C (carbon) as a dopant, for example, and has a thickness of 0.05 μm, for example. The above configuration is only an example and can be changed. For example, the multilayer semiconductor layer 110a may have a configuration in which N-type and P-type indicating conductivity are reversed. In addition, the thickness of each semiconductor layer can be set to a value other than the above values.

  Next, as shown in FIG. 4, the peeling layer 703 is selectively etched so that the multilayer semiconductor layer 110a can be separated (separated) from the growth substrate 701, and a holding device (not shown) is used. The multi-layer semiconductor layer 110a is separated from the growth substrate 701 while the multi-layer semiconductor layer 110a is held.

  Next, as illustrated in FIG. 5, the multilayer semiconductor layer 110 a separated from the growth substrate 701 and the buffer layer 702 is placed on the planarization layer 152 of the base material portion 150 different from the growth substrate 701. The multilayer semiconductor layer 110a is bonded to the planarization layer 152 of the base member 150 by, for example, intermolecular force.

  After the multilayer semiconductor layer 110a is bonded onto the planarization layer 152, a known photolithography process and an etching process are performed, so that the multilayer semiconductor layer 110a illustrated in FIG. The semiconductor multilayer structure 110 including the light emitting thyristors 100_1,..., 100_n is formed. In other words, from the layers 101a to 107a constituting the multilayer semiconductor layer 110a shown in FIG. 5, the N-type cathode layer 101 constituting the light emitting thyristors 100_1,. Cladding layers 102 and 112, N-type active layers 103 and 113, P-type cladding layers 104 and 114, N-type gate layers 105 and 115, P-type anode layers 106 and 116, P-type anode contact layers 107, 117 is formed. For the etching step, for example, phosphoric acid, hydrogen peroxide solution, and a mixed solution of water can be used.

  Thereafter, a metal such as Ti (titanium), Pt (platinum), Au (gold), or an alloy of these metals, or an alloy of these metals, which can form an ohmic contact with the P-type anode contact layers 107 and 117 Au, Ge (germanium), Ni (nickel), which can form ohmic contacts with the anode electrode 141 made of a laminated structure of an alloy and the like, and each of the N-type gate layers 105 and 115 and the N-type cathode layer 101 A gate electrode 143 (FIG. 1) and a cathode electrode 142 (FIGS. 1 and 2) made of a metal such as Pt, an alloy of these metals, or a laminated structure of these metals and alloys are formed. At that time, the anode electrode 141, the gate electrode 143, and the cathode electrode 142 are respectively connected to the anode connection pad 131 (FIG. 1) and the gate connection pad 132 provided on the drive IC formation region in the base material 151 of the base material part 150. (FIG. 1), connected to the cathode connection pad 133 (FIG. 1).

  In the first embodiment, the anode electrode 141, the gate electrode 143, and the cathode electrode 142 also serve as connection wirings to the driving IC. However, the anode electrode 141, the gate electrode 143, the cathode electrode 142, and the semiconductor layer are connected to each other. Another wiring for electrical connection may be provided in the light emitting element array chip 10.

  In the figure, an insulating film made of an organic film such as polyimide or an inorganic film such as SiN (silicon nitride) formed on the surface of the semiconductor multilayer structure 110 and the base material portion 150 understands the shape of the semiconductor multilayer structure 110. For ease of illustration, it is not shown.

  In the first embodiment, each light emitting thyristor of the light emitting element array chip 10 has a structure in which the cathode layers 101 are connected to each other. However, the cathode layers 101 of the plurality of light emitting thyristors have a structure separated from each other. Also good.

  In the first embodiment, the cathode electrode 142 is shared by two adjacent light emitting thyristors. However, the cathode electrode may be formed for each light emitting thyristor, or three or more light emitting thyristors may be used. One cathode electrode 142 may be shared.

<< 1-3 >> Light-Emitting Thyristor FIG. 6 is a schematic cross-sectional view showing a cross-sectional structure of the light-emitting element array chip 10 of FIG. 1 taken along line 2B-2B. FIG. 6 shows an enlarged part of FIG. As shown in FIG. 1, FIG. 2, or FIG. 6, the light emitting element array chip 10 is provided on the base member 150, and a plurality of light emitting thyristors 100 </ b> _ <b> 1 arranged at intervals in the longitudinal direction of the base member 150. ,..., 100_n.

  Of the plurality of light-emitting thyristors 100_1,..., 100_n, the light-emitting thyristor (first element) 100_n closest to the end 150b in the longitudinal direction of the base member 150 includes the first semiconductor layer 109 of the first conductivity type, A second conductivity type second semiconductor layer (N-type gate layer) 105 different from the first conductivity type, a first conductivity type third semiconductor layer (P-type cladding layer) 104, and a second conductivity type The fourth semiconductor layer 108, the fourth semiconductor layer 108, the third semiconductor layer (P-type cladding layer) 104, and the second semiconductor layer (N-type gate layer) 105 from the base material part 150 side. , And the first semiconductor layer 109 are stacked in this order (that is, a part of the semiconductor multilayer structure 110). In the first embodiment, the first conductivity type is P-type, and the second conductivity type is N-type. The first semiconductor layer 109 includes a P-type anode layer 106 and a P-type anode contact layer 107 that are sequentially stacked from the base material part 150 side. The fourth semiconductor layer 108 includes an N-type cathode layer 101, an N-type cladding layer 102, and an N-type active layer 103 that are sequentially stacked from the base material part 150 side. The semiconductor layers 101 to 107 of the semiconductor multilayer structure 110 constituting the light-emitting thyristor (first element) 100_n are respectively formed from the multilayer semiconductor layers 101a to 107a shown in FIGS. The light-emitting thyristor (first element) 100_1 closest to the end 150a in the longitudinal direction of the base member 150 has a structure in which the left and right of the light-emitting thyristor 100_n are reversed.

  Light emitting thyristors (second elements) 100_2,..., 100_n− other than the light emitting thyristors (first elements) 100_1, 100_n closest to the longitudinal ends 150a, 150b among the light emitting thyristors 100_1,. 1 includes a first conductivity type fifth semiconductor layer 119, a second conductivity type sixth semiconductor layer (N-type gate layer) 115, and a first conductivity type seventh semiconductor layer (P-type semiconductor layer). (Clad layer) 114 and the second conductivity type eighth semiconductor layer (118) are the eighth semiconductor layer 118, seventh semiconductor layer (P-type clad layer) 114, 6 has a second semiconductor multilayer structure (that is, a part of the semiconductor multilayer structure 110) in which the sixth semiconductor layer (N-type gate layer) 115 and the fifth semiconductor layer 119 are stacked in this order. The fifth semiconductor layer 119 includes a P-type anode layer 116 and a P-type anode contact layer 117 that are sequentially stacked from the base material part 150 side. The eighth semiconductor layer 118 includes an N-type cathode layer 101, an N-type cladding layer 112, and an N-type active layer 113 that are sequentially stacked from the base material part 150 side. The semiconductor layers 101 and 112 to 117 of the semiconductor multilayer structure 110 constituting the light emitting thyristors (second elements) 100_2,..., 100_n−1 are formed from the multilayer semiconductor layers 101a to 107a shown in FIGS. Is done.

  In the light-emitting thyristor (first element) 100_n, the first surface 121 and the end portion 150b including the end surface of the first semiconductor layer 109 on the side close to the end portion (right end in FIG. 6) 150b of the base portion 150 are formed. A first distance between the second surface 122 including the end surface of the second semiconductor layer (N-type gate layer) 105 and the end surface of the third semiconductor layer (P-type cladding layer) 104 on the near side. X1 includes the third surface 123 including the end surface of the first semiconductor layer 109 on the side far from the end 150b, the end surface of the second semiconductor layer (N-type gate layer) 105 on the side far from the end 150b, and the first surface. And the fourth distance 124 between the third semiconductor layer (P-type cladding layer) 104 and the fourth surface 124. That is, in FIG. 6, X1 <X2 is satisfied. The light-emitting thyristor (first element) 100_1 has a structure similar to that of the light-emitting thyristor 100_n.

  In the light-emitting thyristors (second elements) 100_2,..., 100_n−1, the fifth includes the end surface of the fifth semiconductor layer 119 on one side (for example, the end 150b side) in the longitudinal direction of the base member 150. And a sixth surface including the sixth semiconductor layer (N-type gate layer) 115 and the end surface of the seventh semiconductor layer (P-type cladding layer) 114 on one side (on the end 150b side). A third distance X3 between the seventh surface 133 including the end surface of the fifth semiconductor layer 119 on the other side opposite to one side (on the end 150b side) and a sixth distance on the other side. The fourth distance X4 is equal to the eighth surface 134 including the semiconductor layer (N-type gate layer) 115 and the end surface of the seventh semiconductor layer (P-type cladding layer) 114. That is, in FIG. 6, X3 = X4 is established.

  In the light emitting element array chip 10, the second distance X2 is equal to the third distance X3. That is, in FIG. 6, X2 = X3 is established.

  Further, the longitudinal length W1 of the base portion 150 of the first semiconductor layer 109 of the light-emitting thyristors (first elements) 100_1 and 100_n is the light-emitting thyristor (second element) 100_2,. The fifth semiconductor layer 119 is equal to the length W2 in the longitudinal direction. That is, in FIG. 6, W1 = W2 is established. In other words, the planar shape of the first semiconductor layer 109 of the light emitting thyristors (first elements) 100_1 and 100_n is the plane of the fifth semiconductor layer 119 of the light emitting thyristors (second elements) 100_2,. The shape is the same.

<< 1-4 >> Comparative Example FIG. 7 is a schematic plan view showing a light emitting element array chip 70 of a comparative example. FIG. 8 is a schematic cross-sectional view showing a cross-sectional structure of the light-emitting element array chip 70 of FIG. 7 taken along lines 8A-8A and 8B-8B. 7 and 8, the same reference numerals as those shown in FIGS. 1 and 2 are given to the same or corresponding components as those shown in FIGS. 1 and 2. In the comparative example, the light emitting thyristor of the light emitting element array chip 10 according to the first embodiment has the structure of the two light emitting thyristors 700_1 and 700_n closest to the end in the longitudinal direction (lateral direction in FIG. 7) of the base member 150. Different from the structure of 100_1, 100_n. In the comparative example, the structures of the two light emitting thyristors 700_1, 700_n that are closest to the end in the longitudinal direction of the base member 150 are the same as the structures of the other light emitting thyristors 700_2,.

  In the comparative example, the light emitting thyristors 700 </ b> _ <b> 1 and 700 </ b> _n that are closest to the end in the longitudinal direction of the base member 150 are the P-type first semiconductor layer 109 b and the N-type second semiconductor layer (N-type gate layer). 105b, a P-type third semiconductor layer (P-type clad layer) 104b, and an N-type fourth semiconductor layer 108b are connected to the fourth semiconductor layer 108b and the third semiconductor from the base portion 150 side. A layer (P-type cladding layer) 104b, a second semiconductor layer (N-type gate layer) 105b, and a first semiconductor layer 109b are stacked in this order (that is, part of the semiconductor multilayer structure 710). . In the comparative example, the first semiconductor layer 109b includes a P-type anode layer 106b and a P-type anode contact layer 107b that are sequentially stacked from the base material part 150 side. The fourth semiconductor layer 108b includes an N-type cathode layer 101b, an N-type cladding layer 102b, and an N-type active layer 103b, which are sequentially stacked from the base material part 150 side.

  In the comparative example, the first surface including the end face of the first semiconductor layer 109b on the side close to the end 150b of the base member 150 and the second semiconductor layer (N-type gate layer) on the side close to the end 150b. The first distance X1b between the second face including the end face of 105b and the end face of the third semiconductor layer (P-type clad layer) 104b is the first semiconductor layer 109b on the side far from the end 150b. And the end surface of the second semiconductor layer (N-type gate layer) 105b and the end surface of the third semiconductor layer (P-type clad layer) 104b on the side far from the end 150b. It is equal to the second distance X2 between the fourth surface. That is, in FIG. 8, X1b = X2 is established. In FIG. 8, since X3 = X4, X1b = X2 = X3 = X4 is established.

FIG. 9 is an explanatory diagram schematically showing the amount of light emitted from the light emitting thyristors 700_1,..., 700_n of the light emitting element array chip 70 of the comparative example. In FIG. 9, the light emitted upward from the light emitting thyristors 700_1,..., 700_n is indicated by arrows for each emission surface (upward surface). From the light emitting thyristor 700_1 closest to the end portion 150a, light of a light amount L (L1s) is emitted in addition to the light amounts L (C1), L (L1), and L (R1). Similarly, light of a light amount L (Rns) is emitted from the light-emitting thyristor 700_n closest to the end 150b in addition to the light amounts L (Cn), L (Ln), and L (Rn). Therefore, when the amount of light emitted from the light-emitting thyristor 700_1 is L0 (1) and the amount of light emitted from the light-emitting thyristor 700_n is L0 (n), the following equation L0 (1) = L (C1 ) + L (L1) + L (R1) + L (L1s)
L0 (n) = L (Cn) + L (Ln) + L (Rn) + L (Rns)
Is established.

On the other hand, light of the light quantity L (C2), L (L2), and L (R2) is emitted from the light emitting thyristor 700_2. Similarly, light of a light amount L (C3), L (L3), and L (R3) is emitted from the light-emitting thyristor 700_3. Similarly, light emitting thyristors 700_n−1 emit light of light amounts L (Cn−1), L (Ln−1), and L (Rn−1). Therefore, the amount of light emitted from the light emitting thyristor 700_2 is L0 (2), the amount of light emitted from the light emitting thyristor 700_3 is L0 (3), and the amount of light emitted from the light emitting thyristor 700_n-1. Is L0 (n-1), the following formula L0 (2) = L (C2) + L (L2) + L (R2)
L0 (3) = L (C3) + L (L3) + L (R3)
L0 (n-1) = L (Cn-1) + L (Ln-1) + L (Rn-1)
Is established.

As described above, in the comparative example, from the light emitting thyristors 700_1 and 700_n closest to the end portions 150a and 150b, the light amount L (L1s) of light and the light amount L (Rns) caused by the end portion of the light emitting element array chip 70 are obtained. The amount of light emitted from the light emitting thyristors 700_2,..., 700_n−1 is increased by the light. That is, a state represented by the following expression occurs.
L0 (2) = L0 (3) = L0 (n−1) <L0 (1) = L0 (n)

FIG. 10 is an explanatory diagram schematically showing the light amount and light intensity distribution of light emitted from the light emitting thyristors 700_n−1 and 700_n of the light emitting element array chip 70 of the comparative example. The light intensity distribution of the light emitted from the light-emitting thyristor 700_n-1 is indicated by a broken line on the left side of the middle stage in FIG. The light intensity distribution of the light emitted from the light-emitting thyristor 700_n is indicated by a solid line on the right side of the middle stage in FIG. In the upper part of FIG. 10, two intensity distributions are overlapped so that the light intensity distribution of the light emitted from the light emitting thyristor 700 — n−1 and the light intensity distribution of the light emitted from the light emitting thyristor 700 — n can be easily compared. Has been. In the middle and upper stages of FIG. 10, the position of the horizontal axis of the coordinate system indicating the light intensity distribution corresponds to the position of the light emitting element array chip in the longitudinal direction. As can be understood from FIG. 10, in the comparative example, the light amount L0 (n) of the light emitted from the light emitting thyristor 700_n and the light amount L0 (1) of the light emitted from the light emitting thyristor 700_1 are emitted from the light emitting thyristor 700_n-1. Is greater than the amount of light L0 (n-1). That is, in the comparative example, a state that satisfies the following expression occurs.
L0 (n-1) <L0 (n) = L0 (1)

<< 1-5 >> Operation of First Embodiment FIG. 11 is an explanatory diagram schematically showing the amount of light emitted from the light emitting thyristors 100_1,..., 100_n of the light emitting element array chip 10 according to the first embodiment. It is. In FIG. 11, the light emitted from the light emitting thyristors 100_1,..., 100_n is represented by arrows for each of the emission surfaces. From the light emitting thyristor 100_1 closest to the end portion 150a, light of light amounts L (C1), L (L1a), L (R1), and L (L1s) is emitted. Similarly, light of the light amounts L (Cn), L (Ln), L (Rna), and L (Rns) is emitted from the light emitting thyristor 100_n that is closest to the end 150b. Therefore, when the amount of light emitted from the light emitting thyristor 100_1 is L1 (1) and the amount of light emitted from the light emitting thyristor 100_n is L1 (n),
L1 (1) = L (C1) + L (L1a) + L (R1) + L (L1s)
L1 (n) = L (Cn) + L (Ln) + L (Rna) + L (Rns)
Is established.

On the other hand, light of the light quantity L (C2), L (L2), and L (R2) is emitted from the light emitting thyristor 100_2. Similarly, light of a light amount L (C3), L (L3), and L (R3) is emitted from the light emitting thyristor 100_3. Similarly, the light-emitting thyristor 100_n−1 emits light of light amounts L (Cn−1), L (Ln−1), and L (Rn−1). Accordingly, the amount of light emitted from the light emitting thyristor 100_2 is L1 (2), the amount of light emitted from the light emitting thyristor 100_3 is L1 (3), and the amount of light emitted from the light emitting thyristor 100_n-1. Is L1 (n-1),
L1 (2) = L (C2) + L (L2) + L (R2)
L1 (3) = L (C3) + L (L3) + L (R3)
L1 (n-1) = L (Cn-1) + L (Ln-1) + L (Rn-1)
Is established.

  In the first embodiment, the length of the light emission surface of the light amount L (Rna) emitted from the light emitting thyristor 100_n (the length in the horizontal direction in FIG. 6) is the first distance X1, and the second It is smaller than the distance X2, the third distance X3, and the fourth distance X4. That is, the area of the light emission surface of the light amount L (Rna) emitted from the light-emitting thyristor 100 — n is small. Therefore, the light amount L (Rna) of light emitted from the end portion 105b side of the second semiconductor layer (N-type gate layer) 105 of the light-emitting thyristor 100_n is equal to the second semiconductor layer (N-type gate) of the light-emitting thyristor 100_n. Layer) 105, the light amount L (Ln) of light emitted from the opposite side of the end portion 105b of the layer 105, and the light amount L (Rn) of light emitted from the second semiconductor layer (N-type gate layer) 115 of the light-emitting thyristor 100_n-1. -1) and the light quantity L (Ln-1) of the light emitted from the second semiconductor layer (N-type gate layer) 115 of the light-emitting thyristor 100_n-1.

  FIG. 12 is an explanatory diagram schematically showing the light amount and light intensity distribution of light emitted from the light emitting thyristors 100_n−1 and 100_n of the light emitting element array chip 10 according to the first embodiment. The light intensity distribution of the light emitted from the light emitting thyristor 700_n of the comparative example is indicated by a broken line on the left side of the middle stage in FIG. On the right side of the middle stage of FIG. 12, the light intensity distribution of the light emitted from the light-emitting thyristor 100_n of the first embodiment is indicated by a solid line. In the upper part of FIG. 12, two intensity distributions are overlapped so that the light intensity distribution of the light emitted from the light-emitting thyristor 700_n and the light intensity distribution of the light emitted from the light-emitting thyristor 100_n can be easily compared. Yes. In the middle and upper stages of FIG. 12, the position of the horizontal axis of the coordinate system indicating the light intensity distribution corresponds to the position in the longitudinal direction of the light emitting element array chip. As can be understood from FIG. 12, in the first embodiment, the light amount L1 (n) of light emitted from the light-emitting thyristor 100_n is smaller than the light amount L0 (n-1) of light emitted from the light-emitting thyristor 700_n. This is because the light amount L (Rna) is reduced by narrowing the width (first distance X1) of the light emitting surface of the light-emitting thyristor 100_n.

As can be understood from FIGS. 11 and 12, in the first embodiment, the light amounts L1 (1) and L1 (n) of the light emitted from the light emitting thyristors 100_1 and 100_n, and the light emitting thyristors 100_2,. .., L1 (n−1) is reduced. In other words, by appropriately setting the first distance X1,
L1 (2) = L1 (3) = L1 (n−1) ≈L1 (1) = L1 (n)
Can be achieved.

<< 1-6 >> Effect As described above, the light emitting element array chip 10 according to the first embodiment has the light amount L (L1a) of light emitted from the vicinity of the gate layer on the end side of the light emitting thyristors 100_1 and 100_n. ), L (Rna) can be reduced, so that the amount of light L (L1a), L (Rna) is reduced by reducing the amount of light L (L1a), L (Rna). L1s) and L (Rns) are offset. In this way, the light quantity of the light emitting thyristors 100_1, 100_n can be made close to the light quantity of the light emitting thyristors 100_2,..., 100_n−1, so that the light quantity variation in the light emitting thyristors 100_1,.

  Further, in the light emitting element array chip 10 according to the first embodiment, the drive current of the light emitting thyristor can be made uniform, and the temporal change in the light emission amount due to the continuous operation becomes the same, so the light amount variation does not increase.

<< 2 >> Second Embodiment FIG. 13 is a schematic cross-sectional view showing a light emitting element array chip 20 as a semiconductor device according to a second embodiment. In FIG. 13, the same reference numerals as those shown in FIG. 6 are attached to the same or corresponding components as those in FIG. 6 (first embodiment). In the first embodiment, the case where the first conductivity type is the P type and the second conductivity type is the N type has been described. However, in the second embodiment, the first conductivity type is the N type and the second conductivity type. A case where the type is a P type will be described. As shown in FIG. 13, the light-emitting element array chip 20 includes a base member 150 and a plurality of light-emitting thyristors 200 </ b> _ 1 provided on the base member 150 and arranged at intervals in the longitudinal direction of the base member 150. ,..., 200 — n (only 200 — n−1 and 200 — n are shown in FIG. 13).

  The light emitting thyristors (first elements) 200_1 and 200_n closest to the longitudinal ends of the base member 150 (that is, the portions corresponding to the ends 150a and 150b in FIGS. 1 and 2) are N-type first. Semiconductor layer 209, P-type second semiconductor layer (P-type gate layer) 205, N-type third semiconductor layer (N-type cladding layer) 204, and P-type fourth semiconductor layer 208, the fourth semiconductor layer 208, the third semiconductor layer (N-type cladding layer) 204, the second semiconductor layer (P-type gate layer) 205, and the first semiconductor from the base material part 150 side. The first semiconductor multilayer structure (that is, a part of the semiconductor multilayer structure 210) is stacked in the order of the layers 209. The first semiconductor layer 209 includes an N-type cathode layer 206 and an N-type cathode contact layer 207 to which the cathode electrode 241 is bonded in order from the base material part 150 side. The fourth semiconductor layer 208 includes a P-type anode layer 201, a P-type cladding layer 202, and a P-type active layer 203 that are sequentially stacked from the base material part 150 side. An anode electrode 242 is joined on the P-type anode layer 201. The semiconductor layers 201 to 207 of the semiconductor multilayer structure 210 constituting the light emitting thyristors (first elements) 200_1 and 200_n are formed from the multilayer semiconductor layers 101a to 107a shown in FIGS.

  The light emitting thyristors (second elements) 200_2,..., 200_n−1 other than the light emitting thyristors (first elements) 200_1, 200_n closest to the end in the longitudinal direction of the base member 150 are N-type fifth semiconductors. A layer 219, a P-type sixth semiconductor layer (P-type gate layer) 215, an N-type seventh semiconductor layer (N-type cladding layer) 214, a P-type eighth semiconductor layer 218, Are the eighth semiconductor layer 218, the seventh semiconductor layer (N-type cladding layer) 214, the sixth semiconductor layer (P-type gate layer) 215, and the fifth semiconductor layer 219 from the base material part 150 side. The second semiconductor multilayer structure (that is, a part of the semiconductor multilayer structure 210) is stacked in this order. The fifth semiconductor layer 219 includes an N-type cathode layer 216 and an N-type cathode contact layer 217 to which the cathode electrode 241 is bonded in order from the base material part 150 side. The eighth semiconductor layer 218 includes a P-type anode layer 201, a P-type cladding layer 212, and a P-type active layer 213 that are sequentially stacked from the base material part 150 side. The semiconductor layers 201, 212 to 217 of the semiconductor multilayer structure 210 constituting the light emitting thyristors (second elements) 200_2,..., 200_n−1 are respectively formed from the multilayer semiconductor layers 101a to 107a shown in FIGS. Is done.

  In the light-emitting thyristor (first element) 200 — n, the first surface 221 including the end surface of the first semiconductor layer 209 on the side close to the end 150b of the base member 150 and the second on the side close to the end 150b. The first distance X1 between the end face of the semiconductor layer (P-type gate layer) 205 and the second face 222 including the end face of the third semiconductor layer (N-type clad layer) 204 is the end portion 150b. The third surface 223 including the end surface of the first semiconductor layer 209 on the side far from the end surface, the end surface of the second semiconductor layer (P-type gate layer) 205 on the side far from the end 150b, and the third semiconductor layer (N Smaller than the second distance X2 between the fourth surface 224 and the end surface of the mold cladding layer 204. That is, in FIG. 13, X1 <X2 is satisfied. The light-emitting thyristor (first element) 200_1 has a structure obtained by inverting the left and right of the light-emitting thyristor 200_n.

  In the light-emitting thyristor (second element) 200 — n−1, the fifth surface 231 including the end surface of the fifth semiconductor layer 219 on one side in the longitudinal direction of the base member 150 and the sixth semiconductor on one side The third distance X3 between the layer (P-type gate layer) 215 and the sixth surface 232 including the end surface of the seventh semiconductor layer (N-type cladding layer) 214 is the fifth distance on the other side. A seventh surface 233 including an end surface of the semiconductor layer 219, and a sixth semiconductor layer (P-type gate layer) 215 and an end surface of the seventh semiconductor layer (N-type cladding layer) 214 on the other side. It is equal to the fourth distance X4 between the eighth surface 234 and the fourth surface 234. That is, in FIG. 13, X3 = X4 is established. The light emitting thyristors (second elements) 200_2,..., 200_n-2 have the same structure as the light emitting thyristor 200_n-1.

  In the light emitting element array chip 20, the second distance X2 is equal to the third distance X3. That is, in FIG. 13, X2 = X3 is established.

  Further, the longitudinal length W1 of the base member 150 of the first semiconductor layer 209 is equal to the longitudinal length W2 of the base member 150 of the fifth semiconductor layer 219. That is, in FIG. 13, W1 = W2 is established. In other words, the planar shape of the first semiconductor layer 209 is the same as the planar shape of the fifth semiconductor layer 219.

  According to the light emitting element array chip 20 according to the second embodiment having the structure described above, it is possible to obtain the same effect as the effect of the light emitting element array chip 10 according to the first embodiment. That is, the increase in the amount of light due to the light emitted from the vicinity of the corner of the anode layer 201 of the light emitting element array chip 20 is offset by the reduction in the amount of light emitted from the vicinity of the gate layer on the end side of the light emitting thyristors 200_1 and 200_n. doing. For this reason, since the light quantity of light emitting thyristor 200_1,200_n can be closely approached to the light quantity of light emitting thyristor 200_2, ..., 200_n-1, the light quantity variation in light emitting thyristor 200_1, ..., 200_n can be suppressed.

<< 3 >> Third Embodiment FIG. 14 is a schematic cross-sectional view showing a light emitting element array chip 30 as a semiconductor device according to a third embodiment. In FIG. 14, the same reference numerals as those shown in FIG. 6 are given to the same or corresponding components as those in FIG. 6 (first embodiment). Although the case where the gate electrode (143 in FIG. 1) is provided on the second semiconductor layer (N-type gate layer) 105 has been described in the first embodiment, the third semiconductor is described in the third embodiment. A case where a gate electrode (that is, an electrode corresponding to 143 in FIG. 1) is provided on the layer (P-type gate layer) 304 will be described. As shown in FIG. 14, the light emitting element array chip 30 is provided on the base part 150 and the base part 150, and a plurality of light emitting thyristors 300 </ b> _ <b> 1 arranged at intervals in the longitudinal direction of the base part 150. ,..., 300_n (FIG. 14 shows only 300_n−1 and 300_n).

  The light emitting thyristors (first elements) 300_1 and 300_n closest to the longitudinal ends of the base member 150 (that is, portions corresponding to the ends 150a and 150b in FIGS. 1 and 2) are P-type first. Semiconductor layer 309, N-type second semiconductor layer (N-type gate layer) 305, P-type third semiconductor layer (P-type gate layer) 304, and N-type fourth semiconductor layer 308, the fourth semiconductor layer 308, the third semiconductor layer (P-type gate layer) 304, the second semiconductor layer (N-type gate layer) 305, and the first semiconductor from the base material part 150 side The first semiconductor multilayer structure (that is, a part of the semiconductor multilayer structure 310) is stacked in the order of the layers 309. The first semiconductor layer 309 includes a P-type anode layer 306 and a P-type anode contact layer 307 to which the anode electrode 341 is bonded in order from the base material part 150 side. The fourth semiconductor layer 308 includes an N-type cathode layer 301, an N-type cladding layer 302, and an N-type active layer 303 that are sequentially stacked from the base material part 150 side. A cathode electrode 342 is bonded onto the N-type cathode layer 301. The semiconductor layers 301 to 307 of the semiconductor multilayer structure 310 constituting the light emitting thyristors (first elements) 300_1 and 300_n are respectively formed from the multilayer semiconductor layers 101a to 107a shown in FIGS.

  The light emitting thyristors (second elements) 300_2,..., 300_n−1 other than the light emitting thyristors (first elements) 300_1, 300_n closest to the end in the longitudinal direction of the base member 150 are P-type fifth semiconductors. A layer 319, an N-type sixth semiconductor layer (N-type gate layer) 315, a P-type seventh semiconductor layer (P-type gate layer) 314, an N-type eighth semiconductor layer 318, Are the eighth semiconductor layer 318, the seventh semiconductor layer (P-type gate layer) 314, the sixth semiconductor layer (N-type gate layer) 315, and the fifth semiconductor layer 319 from the base portion 150 side. A second semiconductor multilayer structure (that is, a part of the semiconductor multilayer structure 310). The fifth semiconductor layer 319 includes a P-type anode layer 316 and a P-type anode contact layer 317 that are sequentially stacked from the base material part 150 side. The eighth semiconductor layer 318 includes an N-type cathode layer 301, an N-type cladding layer 312, and an N-type active layer 313 that are sequentially stacked from the base material part 150 side. The semiconductor layers 301 and 312 to 317 of the semiconductor multilayer structure 310 constituting the light emitting thyristors (second elements) 300_2,..., 300_n−1 are formed from the multilayer semiconductor layers 101a to 107a shown in FIG. Is done.

  In the light-emitting thyristor (first element) 300 </ b> _n, the end surface of the first semiconductor layer 309 and the end surface of the second semiconductor layer (N-type gate layer) 305 on the side close to the end portion 150 b of the base material portion 150 are formed. The first distance X1 between the first surface 321 including the second surface 322 including the end surface of the third semiconductor layer (N-type gate layer) 304 on the side close to the end 150b is equal to the end 150b. A third surface 323 including the end face of the first semiconductor layer 309 and the end face of the second semiconductor layer (P-type gate layer) 305 on the side far from the third semiconductor layer (on the side far from the end 150b). N-type cladding layer) 204 is smaller than the second distance X2 with respect to the fourth surface 324 including the end surface. That is, in FIG. 14, X1 <X2 is satisfied. The light-emitting thyristor (first element) 300_1 has a structure obtained by inverting the left and right of the light-emitting thyristor 300_n.

  In the light-emitting thyristor (second element) 300 — n−1, the end surface of the fifth semiconductor layer 319 on one side in the longitudinal direction of the base member 150 and the sixth semiconductor layer (N-type gate layer on one side) ) The third distance X3 between the fifth surface 331 including the end surface of 315 and the sixth surface 332 including the end surface of the seventh semiconductor layer (P-type gate layer) 314 on one side is: A seventh surface 333 including the end surface of the fifth semiconductor layer 319 on the other side in the longitudinal direction of the base member 150 and the end surface of the sixth semiconductor layer (N-type gate layer) 315 on the other side; The fourth distance X4 is equal to the eighth surface 334 including the end face of the seventh semiconductor layer (P-type gate layer) 314 on the first side. That is, in FIG. 14, X3 = X4 is established. The light emitting thyristors (second elements) 300_2,..., 300_n-2 have the same structure as the light emitting thyristor 300_n-1.

  In the light emitting element array chip 30, the second distance X2 is equal to the third distance X3. That is, in FIG. 14, X2 = X3 is established.

  In addition, the longitudinal length W1 of the base portion 150 of the first semiconductor layer 309 is equal to the longitudinal length W2 of the base portion 150 of the fifth semiconductor layer 319. That is, in FIG. 14, W1 = W2 is established. In other words, the planar shapes of the first semiconductor layer 309 and the second semiconductor layer 305 are the same as the planar shapes of the fifth semiconductor layer 319 and the sixth semiconductor layer 315.

  According to the light emitting element array chip 30 according to the third embodiment having the structure described above, the same effects as those obtained by the light emitting element array chip 10 according to the first embodiment can be obtained. That is, the increase in the amount of light due to the light emitted from the vicinity of the corner of the cathode layer 301 of the light emitting element array chip 30 is offset by the reduction in the amount of light emitted from the vicinity of the gate layer on the end side of the light emitting thyristors 300_1 and 300_n. doing. For this reason, since the light quantity of the light emitting thyristors 300_1, 300_n can be made close to the light quantity of the light emitting thyristors 300_2,..., 300_n−1, the light quantity variation in the light emitting thyristors 300_1,.

<< 4 >> Fourth Embodiment FIG. 15 is a schematic sectional view showing a light emitting element array chip 40 as a semiconductor device according to a fourth embodiment. 15, components that are the same as or correspond to those in FIG. 13 (second embodiment) are denoted by the same reference numerals as those shown in FIG. In the second embodiment, the case where the gate electrode (the electrode corresponding to 143 in FIG. 1) is provided on the second semiconductor layer (P-type gate layer) 205 has been described. In the fourth embodiment, A case where a gate electrode is provided over the third semiconductor layer (N-type gate layer) 404 will be described. As shown in FIG. 15, the light emitting element array chip 40 is provided on the base member 150 and the base member 150, and a plurality of light emitting thyristors 400 </ b> _ <b> 1 arranged at intervals in the longitudinal direction of the base member 150. ,..., 400_n (only 400_n-1 and 400_n are shown in the figure).

  The light emitting thyristors (first elements) 400_1 and 400_n closest to the longitudinal ends of the base member 150 (that is, the portions corresponding to the ends 150a and 150b in FIGS. 1 and 2) are the N-type first. Semiconductor layer 409, P-type second semiconductor layer (P-type gate layer) 405, N-type third semiconductor layer (N-type gate layer) 404, and P-type fourth semiconductor layer 408, the fourth semiconductor layer 408, the third semiconductor layer (N-type gate layer) 404, the second semiconductor layer (P-type gate layer) 405, and the first semiconductor from the base material part 150 side. The first semiconductor multilayer structure (that is, a part of the semiconductor multilayer structure 410) is stacked in the order of the layers 409. The first semiconductor layer 409 includes an N-type cathode layer 406 and an N-type cathode contact layer 407 to which the cathode electrode 441 is joined in order from the base material part 150 side. The fourth semiconductor layer 408 includes a P-type anode layer 401, a P-type cladding layer 402, and a P-type active layer 403 that are sequentially stacked from the base material part 150 side. An anode electrode 442 is joined on the anode layer 401. The semiconductor layers 401 to 407 of the semiconductor multilayer structure 410 constituting the light emitting thyristors (first elements) 400_1 and 400_n are respectively formed from the multilayer semiconductor layers 101a to 107a shown in FIGS.

  The light emitting thyristors (second elements) 400_2,..., 400_n−1 other than the light emitting thyristors (first elements) 400_1, 400_n closest to the end in the longitudinal direction of the base member 150 are N-type fifth semiconductors. A layer 419, a P-type sixth semiconductor layer (P-type gate layer) 415, an N-type seventh semiconductor layer (N-type gate layer) 414, a P-type eighth semiconductor layer 418, Are the eighth semiconductor layer 418, the seventh semiconductor layer (N-type gate layer) 414, the sixth semiconductor layer (P-type gate layer) 415, and the fifth semiconductor layer 419 from the base material part 150 side. The second semiconductor multilayer structure (that is, a part of the semiconductor multilayer structure 410) is stacked in this order. The fifth semiconductor layer 419 includes an N-type cathode layer 416 and an N-type cathode contact layer 417 that are sequentially stacked from the base material part 150 side. The eighth semiconductor layer 418 includes a P-type anode layer 401, a P-type cladding layer 412, and a P-type active layer 413 that are sequentially stacked from the base material part 150 side. The semiconductor layers 401, 412 to 417 of the semiconductor multilayer structure 410 constituting the light emitting thyristors (second elements) 400_2,..., 400_n−1 are formed from the multilayer semiconductor layers 101a to 107a shown in FIGS. Is done.

  In the light-emitting thyristor (first element) 400_n, the end surface of the first semiconductor layer 409 and the end surface of the second semiconductor layer (P-type gate layer) 405 on the side close to the end portion 150b of the base material portion 150 are formed. The first distance X1 between the first surface 421 including the second surface 422 including the end surface of the third semiconductor layer (P-type gate layer) 404 on the side close to the end 150b is from the end A third surface 423 including an end surface of the first semiconductor layer 409 on the far side and an end surface of the second semiconductor layer (N-type gate layer) 405 and a third semiconductor layer (N on the side far from the end portion 150b) Smaller than the second distance X2 with respect to the fourth surface 424 including the end surface of the mold gate layer) 404. That is, in FIG. 15, X1 <X2 is satisfied. The light-emitting thyristor (first element) 400_1 has a structure obtained by inverting the left and right of the light-emitting thyristor 400_n.

  In the light-emitting thyristor (second element) 400 — n−1, the end surface of the fifth semiconductor layer 419 and the end surface of the sixth semiconductor layer (P-type gate layer) 415 on one side in the longitudinal direction of the base material portion 150. The third distance X3 between the fifth surface 431 including the fifth surface 431 and the sixth surface 432 including the end surface of the seventh semiconductor layer (N-type gate layer) 414 on one side is the base material portion 150. The seventh surface 433 including the end surface of the fifth semiconductor layer 419 and the end surface of the sixth semiconductor layer (P-type gate layer) 415 on the other side in the longitudinal direction of the first semiconductor layer, and the seventh semiconductor layer on the other side (N-type gate layer) It is equal to the fourth distance X4 with respect to the eighth surface 334 including the end surface of 414. That is, in FIG. 14, X3 = X4 is established. The light emitting thyristors (second elements) 400_2,..., 400_n-2 have the same structure as the light emitting thyristor 400_n-1.

  In the light emitting element array chip 40, the second distance X2 is equal to the third distance X3. That is, in FIG. 15, X2 = X3 is established.

  Further, the longitudinal length W1 of the base member 150 of the first semiconductor layer 409 is equal to the longitudinal length W2 of the base member 150 of the fifth semiconductor layer 319. That is, in FIG. 15, W1 = W2 is established. In other words, the planar shapes of the first semiconductor layer 409 and the second semiconductor layer 405 are the same as the planar shapes of the fifth semiconductor layer 419 and the sixth semiconductor layer 415.

  According to the light emitting element array chip 40 according to the fourth embodiment having the structure described above, the same effects as those obtained by the light emitting element array chip 10 according to the first embodiment can be obtained. That is, the increase in the amount of light due to the light emitted from the vicinity of the corner of the anode layer 401 of the light emitting element array chip 40 is offset by the reduction in the amount of light emitted from the vicinity of the gate layer on the end side of the light emitting thyristors 400_1 and 400_n. doing. For this reason, since the light quantity of the light emitting thyristors 400_1, 400_n can be brought close to the light quantity of the light emitting thyristors 400_2,..., 400_n−1, the light quantity variation in the light emitting thyristors 400_1,.

<< 5 >> Fifth Embodiment << 5-1 >> Configuration FIG. 16 is a schematic plan view showing a light emitting element array chip 50 as a semiconductor device according to a fifth embodiment. In FIG. 16, the same reference numerals as those shown in FIG. 1 are given to the same or corresponding elements as those shown in FIG. 1 (first embodiment). 17 is a schematic cross-sectional view showing a cross-sectional structure of the light-emitting element array chip of FIG. 16 taken along lines 17A-17A and 17B-17B. In FIG. 17, the same reference numerals as those shown in FIG. 2 are given to the same or corresponding elements as those shown in FIG. 2 (first embodiment). 18 is a schematic cross-sectional view showing a cross-sectional structure of the light-emitting element array chip in FIG. 16 taken along line 17B-17B. 18, the same reference numerals as those shown in FIG. 2 are given to the same or corresponding elements as those shown in FIG. 6 (first embodiment).

  As shown in FIGS. 16 to 18, the light emitting element array chip 50 includes a base material part 150 and a plurality of base material parts 150 arranged at intervals in the longitudinal direction of the base material part 150. The light emitting thyristors 500_1,..., 500_n are included. As shown in FIGS. 16 to 18, the light-emitting element array chip 50 according to the fifth embodiment is provided between the ninth surface 521 and the second surface 122 which are the end portions of the N-type cathode layer 501. The fifth distance WEb is smaller than the sixth distance WE between the tenth surface 522 including the end surface of the base material portion 150 and the second surface 122 on the side close to the end portion. Except for this point, the light emitting element array chip 50 is the same as the light emitting element array chip 10 according to the first embodiment.

<< 5-2 >> Operation FIG. 19 is an explanatory diagram schematically showing the amount of light emitted from the light emitting thyristors 500_1,..., 500_n of the light emitting element array chip 50 according to the fifth embodiment. In FIG. 19, the light emitted from the light emitting thyristors 500_1,..., 500_n is represented by arrows for each of the emission surfaces. From the light emitting thyristor 500_1 closest to the end portion 150a, light of light amounts L (C1), L (L1a), L (R1), and L (L1sa) is emitted. Similarly, light of the light amounts L (Cn), L (Ln), L (Rna), and L (Rnsa) is emitted from the light-emitting thyristor 500_n that is closest to the end 150b. Therefore, when the amount of light emitted from the light-emitting thyristor 500_1 is L5 (1) and the amount of light emitted from the light-emitting thyristor 500_n is L5 (n),
L5 (1) = L (C1) + L (L1a) + L (R1) + L (L1sa)
L5 (n) = L (Cn) + L (Ln) + L (Rna) + L (Rnsa)
It is.

In contrast, the light emitting thyristor 500_2 emits light of the light amounts L (C2), L (L2), and L (R2). Similarly, light of a light amount L (C3), L (L3), and L (R3) is emitted from the light-emitting thyristor 500_3. Similarly, light emitting thyristors 500_n−1 emit light of light amounts L (Cn−1), L (Ln−1), and L (Rn−1). Therefore, the amount of light emitted from the light-emitting thyristor 500_2 is L5 (2), the amount of light emitted from the light-emitting thyristor 500_3 is L5 (3), and the amount of light emitted from the light-emitting thyristor 500_n-1. Is L5 (n-1),
L5 (2) = L (C2) + L (L2) + L (R2)
L5 (3) = L (C3) + L (L3) + L (R3)
L5 (n-1) = L (Cn-1) + L (Ln-1) + L (Rn-1)
It is.

  In the fifth embodiment, the length of the light emission surface of the light amount L (Rna) emitted from the light-emitting thyristor 500_n is the first distance X1, the second distance X2, the third distance X3, 4 is smaller than the distance X4. That is, the area of the light emission surface of the light amount L (Rna) emitted from the light-emitting thyristor 500 — n is small. For this reason, the light quantity L (Rna) is smaller than the light quantities L (Ln), L (Rn-1), and L (Ln-1).

  In the fifth embodiment, the length of the light emission surface of the light amount L (Rnsa) emitted from the light-emitting thyristor 500_n is the fifth distance WEb, and the sixth distance WE (FIGS. 6 and 18). Smaller). That is, the area of the light emission surface of the light amount L (Rnsa) emitted from the light-emitting thyristor 500_n is narrower than that of the first embodiment. For this reason, the light quantity L (Rnsa) is smaller than the light quantity L (Rns) in the comparative example (shown in FIG. 9) and the light quantity L (Rns) in the first embodiment (shown in FIG. 11).

  FIG. 20 is an explanatory diagram schematically showing the light quantity and light intensity distribution of light emitted from the light emitting thyristors of the light emitting element array chip of the comparative example (FIG. 5) and the fifth embodiment (FIG. 18). On the left side of the middle stage of FIG. 20, the light intensity distribution of the light emitted from the light emitting thyristor 700_n of the comparative example is indicated by a broken line. On the right side of the middle stage of FIG. 20, the light intensity distribution of the light emitted from the light emitting thyristor 500 — n according to the fifth embodiment is indicated by a solid line. In the upper part of FIG. 20, two intensity distributions are overlapped so that the light intensity distribution of the light emitted from the light-emitting thyristor 700 — n and the light intensity distribution of the light emitted from the light-emitting thyristor 500 — n can be easily compared. Yes. In the middle and upper stages of FIG. 20, the position of the horizontal axis of the coordinate system indicating the light intensity distribution corresponds to the position in the longitudinal direction of the light emitting element array chip. As can be understood from FIG. 20, in the fifth embodiment, the light amount L5 (n) of light emitted from the light-emitting thyristor 500_n is smaller than the light amount L0 (n) of light emitted from the light-emitting thyristor 700_n. This is because the light amounts L (Rna) and L (Rnsa) are reduced by reducing the width of the light emitting surface of the light-emitting thyristor 500_n (the first distance X1 and the fifth distance WEb).

  FIG. 21 is an explanatory diagram schematically showing the light amount and light intensity distribution of light emitted from the light emitting thyristors of the light emitting element array chip of the first embodiment (FIG. 3) and the fifth embodiment (FIG. 18). is there. On the left side of the middle stage of FIG. 21, the light intensity distribution of the light emitted from the light emitting thyristor 100_n of the first embodiment (FIG. 3) is indicated by a broken line. On the right side of the middle stage of FIG. 21, the light intensity distribution of the light emitted from the light emitting thyristor 500_n according to the fifth embodiment is indicated by a solid line. In the upper part of FIG. 21, two intensity distributions are overlapped so that the light intensity distribution of the light emitted from the light-emitting thyristor 100 — n can be easily compared with the light intensity distribution of the light emitted from the light-emitting thyristor 500 — n. Yes. In the middle and upper stages of FIG. 21, the position of the horizontal axis of the coordinate system indicating the light intensity distribution corresponds to the position in the longitudinal direction of the light emitting element array chip. As can be understood from FIG. 21, in the fifth embodiment, the light amount L5 (n) of the light emitted from the light emitting thyristor 500_n is smaller than the light amount L1 (n) of the light emitted from the light emitting thyristor 100_n. This is because the light amount L (Rnsa) is reduced by narrowing the width of the light emission surface (fifth distance WEb) of the light-emitting thyristor 500_n.

As can be understood from FIG. 19, FIG. 20, and FIG. 21, in the fifth embodiment, the light amounts L5 (1), L5 (n) of the light emitted from the light emitting thyristors 500_1, 500_n, and the light emitting thyristors 500_2,. , 500_n−1, the difference from the light amounts L5 (2),. That is, by appropriately setting the first distance X1 and the fifth distance WEb,
L5 (2) = L5 (3) = L5 (n−1) ≈L5 (1) = L5 (n)
Can be achieved.

<< 5-3 >> Effect As described above, the light emitting element array chip 50 according to the fifth embodiment has the light amount L (L1a) of light emitted from the vicinity of the gate layer on the end side of the light emitting thyristors 500_1 and 500_n. ), L (Rna) and the light quantity L (L1sa), L (Rnsa) of the light emitted from the vicinity of the cathode layer on the end side can be reduced, so that the light quantity variation in the light emitting thyristors 500_1,. Can be suppressed.

  Further, in the light emitting element array chip 50 according to the fifth embodiment, the drive current of the light emitting thyristor can be made uniform, and the temporal change of the light emission amount by the continuous operation becomes the same, so the light amount variation does not increase.

  Note that the condition of the fifth distance WEb to the end surface of the semiconductor layer on the base member 150 side in the fifth embodiment may be applied to any of the light emitting element array chips in the second to fourth embodiments. Good.

<< 6 >> Sixth Embodiment FIG. 22 is a schematic perspective view showing a structure of a main part of an optical print head according to a sixth embodiment. As shown in FIG. 22, the board unit as the main part includes a printed wiring board 801 that is a mounting board and a plurality of light emitting element array chips 10 arranged in an array. The light emitting element array chip 10 is fixed on the printed wiring board 801 with a thermosetting resin or the like. The electrode pad 153 for external connection of the light emitting element array chip 10 and the connection pad 802 of the printed wiring board 801 are electrically connected by a bonding wire 803. In addition, various types of wiring patterns, electronic components, connectors, and the like may be mounted on the printed wiring board 801. Further, instead of the light emitting element array chip 10, any one of the light emitting element array chips 20, 30, 40, 50 described in the second to fifth embodiments may be used.

  FIG. 23 is a schematic sectional view showing the structure of an optical print head 800 according to the sixth embodiment. The optical print head 800 is an exposure apparatus of an electrophotographic printer as an electrophotographic image forming apparatus. As shown in FIG. 23, the optical print head 800 includes a base member 811, a printed wiring board 801, a light emitting element array chip 10 (or 20, 30, 40, 50), and a plurality of erecting equal-magnification images. A lens array 813 including lenses, a lens holder 814, and a clamper 815 that is a spring member are provided. The base member 811 is a member for fixing the printed wiring board 801. On the side surface of the base member 811, an opening 812 for fixing the printed wiring board 801 and the lens holder 814 to the base member 811 using a clamper 815 is provided. The lens holder 814 is formed, for example, by injection molding an organic polymer material or the like. The lens array 813 is an optical lens group that images light emitted from the light emitting element array chip 10 (or 20, 30, 40, 50) on a photosensitive drum as an image carrier. The lens holder 814 holds the lens array 813 at a predetermined position of the base member 811. The clamper 815 sandwiches and holds each component through the opening 812 of the base member 811 and the opening of the lens holder 814.

  In the optical print head 800, the light emitting thyristor of the light emitting element array chip 10 selectively emits light according to the print data, and the light emitted from the light emitting thyristor is uniformly charged on the photosensitive drum by the lens array 813. Imaged. As a result, an electrostatic latent image is formed on the photosensitive drum, and then an image made of a developer is formed (printed) on the print medium (paper) through a development process, a transfer process, and a fixing process.

  As described above, the optical print head 800 according to the sixth embodiment includes the light emitting element array chip 10 (or 20, 30, 40, 50) having a small variation in light emission intensity. By installing in the forming apparatus, the printing quality can be improved.

<< 7 >> Seventh Embodiment FIG. 24 is a schematic sectional view showing the structure of an image forming apparatus 900 according to a seventh embodiment. The image forming apparatus 900 is, for example, a color printer that uses an electrophotographic process.

  As shown in FIG. 24, the image forming apparatus 900 has an image forming unit (that is, a process) that forms a toner image (that is, a developer image) on a recording medium P such as paper by an electrophotographic process as a main configuration. Unit) 910K, 910Y, 910M, 910C, a medium supply unit 920 that supplies the recording medium P to the image forming units 910K, 910Y, 910M, 910C, a transport unit 930 that transports the recording medium P, and an image forming unit 910K, Transfer rollers 940K, 940Y, 940M, and 940C serving as transfer portions disposed so as to correspond to each of 910Y, 910M, and 910C, a fixing device 950 that fixes the toner image transferred onto the recording medium P, and a fixing device A guide as a medium discharge unit that discharges the recording medium P that has passed through 950 to the outside of the housing of the image forming apparatus 900. 926 and having a pair of discharge rollers 925. The number of image forming units included in the image forming apparatus 900 may be 3 or less, or 5 or more. The image forming apparatus 900 may be a monochrome printer having one image forming unit as long as the image forming apparatus 900 forms an image on the recording medium P by an electrophotographic process.

  As shown in FIG. 24, the medium supply unit 920 includes a medium cassette 921, a hopping roller 922 that feeds out the recording media P stacked in the medium cassette 921 one by one, and a recording medium P that is fed out from the medium cassette 921. A guide 970 for guiding the recording medium P, and a registration roller / pinch roller 924 for correcting the skew of the recording medium P.

  The image forming units 910K, 910Y, 910M, and 910C display a black (K) toner image, a yellow (Y) toner image, a magenta (M) toner image, and a cyan (C) toner image on the recording medium P. Form each one. The image forming units 910K, 910Y, 910M, and 910C are arranged side by side along the medium conveyance path from the upstream side to the downstream side in the medium conveyance direction (that is, from right to left in FIG. 1). Each of the image forming units 910K, 910Y, 910M, and 910C may be a detachable unit. The image forming units 910K, 910Y, 910M, and 910C basically have the same structure except that the colors of the toners stored are different.

  The image forming units 910K, 910Y, 910M, and 910C have optical print heads 911K, 911Y, 911M, and 911C as exposure apparatuses for the respective colors. Each of the optical print heads 911K, 911Y, 911M, and 911C is the optical print head 800 according to the sixth embodiment.

  The image forming units 910K, 910Y, 910M, and 910C have uniform surfaces on the photosensitive drums 913K, 913Y, 913M, and 913C as image bearing members that are rotatably supported and the photosensitive drums 913K, 913Y, 913M, and 913C. Electrostatic latent images are formed on the surfaces of the photosensitive drums 913K, 913Y, 913M, and 913C by exposure with charging rollers 914K, 914Y, 914M, and 914C as charging members to be charged to the surface and the optical print heads 911K, 911Y, 911M, and 911C. After that, the developing drums 915K, 915Y, 915M, and 915C for supplying toner to the surfaces of the photosensitive drums 913K, 913Y, 913M, and 913C and forming toner images corresponding to the electrostatic latent images are provided.

  The developing units 915K, 915Y, 915M, and 915C supply toner to a toner storage unit as a developer storage unit that forms a developer storage space for storing toner and the surface of the photosensitive drums 913K, 913Y, 913M, and 913C. Developing rollers 916K, 916Y, 916M, 916C as developer carriers, supply rollers 917K, 917Y, 917M, 917C for supplying the toner stored in the toner storage portion to the developing rollers 916K, 916Y, 916M, 916C, and development Developing blades 918K, 918Y, 918M, and 918C as toner regulating members that regulate the thickness of the toner layers on the surfaces of the rollers 916K, 916Y, 916M, and 916C.

  Exposure by the optical print heads 911K, 911Y, 911M, and 911C is executed based on image data for printing on the surface of the uniformly charged photosensitive drums 913K, 913Y, 913M, and 913C. The optical print heads 911K, 911Y, 911M, and 911C include a light emitting element array in which light emitting thyristors are arranged as a plurality of light emitting elements in the axial direction of the photosensitive drums 913K, 913Y, 913M, and 913C.

  As shown in FIG. 24, the transport unit 930 includes a transport belt (transfer belt) 933 that electrostatically attracts and transports the recording medium P, a drive roller 931 that is rotated by a drive unit and drives the transport belt 933, A tension roller (driven roller) 932 that stretches the conveying belt 933 in a pair with the driving roller 931 is provided.

  As shown in FIG. 24, the transfer rollers 940K, 940Y, 940M, and 940C face the photosensitive drums 913K, 913Y, 913M, and 913C of the image forming units 910K, 910Y, 910M, and 910C with the conveyance belt 933 interposed therebetween. Has been placed. The toner images formed on the surfaces of the photosensitive drums 913K, 913Y, 913M, and 913C of the image forming units 910K, 910Y, 910M, and 910C are transferred along the medium conveyance path by the transfer rollers 940K, 940Y, 940M, and 940C. Transfer is sequentially performed on the upper surface of the recording medium P conveyed in the direction of the arrow. The image forming units 910K, 910Y, 910M, and 910C remain on the photosensitive drums 913K, 913Y, 913M, and 913C after the toner images developed on the photosensitive drums 913K, 913Y, 913M, and 913C are transferred to the recording medium P. Cleaning devices 919K, 919Y, 919M, and 919C for removing toner are included.

  The fixing device 950 includes a pair of rollers 951 and 952 that are pressed against each other. The roller 951 is a roller 951 (heat roller) incorporating a heater, and the roller 952 is a pressure roller pressed against the roller 951. The recording medium P having an unfixed toner image passes between a pair of rollers 951 and 952 of the fixing device 950. At this time, the unfixed toner image is heated and pressurized and fixed on the recording medium P.

  Further, a cleaning mechanism including a cleaning blade 934 and a waste toner container (not shown) is provided on the lower surface of the transport belt 933.

  At the time of printing, the recording medium P in the medium cassette 921 is fed out by the hopping roller 922 and sent to the roller pair 923. Subsequently, the recording medium P is sent from the roller pair 923 to the conveying belt 933 via the registration roller / pinch roller 924, and is conveyed to the image forming units 910K, 910Y, 910M, and 910C as the conveying belt 933 travels. Is done. In the image forming units 910K, 910Y, 910M, and 910C, the surfaces of the photosensitive drums 913K, 913Y, 913M, and 913C are charged by the charging rollers 914K, 914Y, 914M, and 914C, and the optical print heads 911K, 911Y, 911M, and 911C are used. Exposure is performed to form an electrostatic latent image. To the electrostatic latent image, toner thinned on the developing rollers 916K, 916Y, 916M, and 916C is electrostatically attached to form a toner image of each color. The toner images of the respective colors are transferred to the recording medium P by the transfer rollers 940K, 940Y, 940M, and 940C, and a color toner image is formed on the recording medium P. After the transfer, toner remaining on the photosensitive drums 913K, 913Y, 913M, and 913C is removed by the cleaning devices 919K, 919Y, 919M, and 919C. The recording medium P on which the color toner image is formed is sent to the fixing device 950. In the fixing device 950, the color toner image is fixed on the recording medium P, and a color image is formed. The recording medium P on which the color image is formed is conveyed along the guide 926 and discharged to the stacker by the discharge roller pair 925.

  As described above, the image forming apparatus 900 according to the seventh embodiment uses the optical print head 800 according to the sixth embodiment as the optical print heads 911K, 911Y, 911M, and 911C. Printing quality by the apparatus 900 can be improved.

  10, 20, 30, 40, 50 Light emitting element array chip (semiconductor device), 100_1, 100_n, 200_1, 200_n, 300_1, 300_n, 400_1, 400_n, 500_1, 500_n The light emitting thyristor closest to the end (first element) , 100_2, ..., 100_n-1, 200_2, ..., 200_n-1, 300_2, ..., 300_n-1, 400_2, ..., 400_n-1, 500_2, ..., 500_n-1 light emitting thyristor (second element), 101 , 301, 501 N-type cathode layer, 102, 302 N-type cladding layer, 103, 303 N-type active layer, 104, 304 Third semiconductor layer (P-type cladding layer, P-type gate layer), 105,305 Second semiconductor layer (N-type gate layer), 106,306 P Type anode layer, 107,307 P type anode contact layer, 108,308,508 fourth semiconductor layer, 109,309 first semiconductor layer, 110,310,510 semiconductor multilayer structure, 110a multilayer semiconductor layer, 112, 312 N-type cladding layer, 113,313 N-type active layer, 114,314 Seventh semiconductor layer (P-type cladding layer), 115,315 Sixth semiconductor layer (N-type gate layer), 116,316 P-type anode layer, 117,317 P-type anode contact layer, 118,318 eighth semiconductor layer, 119,319 fifth semiconductor layer, 201,401 P-type anode layer, 202,402 P Type cladding layer, 203,403 P-type active layer, 204,404 third semiconductor layer (N-type cladding layer, Type gate layer), 205, 405 second semiconductor layer (P type gate layer), 206, 406 N type cathode layer, 207, 407 N type cathode contact layer, 208, 408 fourth semiconductor layer, 209, 409 first semiconductor layer, 210, 410 semiconductor multilayer structure, 212, 412 P-type cladding layer, 213, 413 P-type active layer, 214, 414 seventh semiconductor layer (N-type cladding layer), 215,415 sixth semiconductor layer (P-type gate layer), 216,416 N-type cathode layer, 217,417 N-type cathode contact layer, 218,418 eighth semiconductor layer, 219,419 fifth Semiconductor layer 121,221,321,421 first surface 122,222,322,422 second surface 123,223,323 , 423 third surface, 124, 224, 324, 424 fourth surface, 131, 231, 331, 431 fifth surface, 132, 232, 332, 432 sixth surface, 133, 233, 333, 433 7th surface, 134,234,334,434 8th surface, 150 base material part, 150a, 150b edge part, 151 base material, 152 planarization layer, 153 electrode pad, 701 growth substrate, 702 buffer layer, 703 Release layer, 800 optical print head, 900 image forming apparatus, X1 first distance, X2 second distance, X3 third distance, X4 fourth distance, WEb fifth distance, WE sixth distance.

Claims (15)

A base material part;
A plurality of light emitting thyristors provided on the base material portion and arranged at intervals in the longitudinal direction of the base material portion;
Have
Of the plurality of light emitting thyristors, the first element that is the light emitting thyristor closest to the end portion in the longitudinal direction of the base portion is a first conductive type first semiconductor layer, the first conductive type, A second semiconductor layer of a different second conductivity type, a third semiconductor layer of a first conductivity type, and a fourth semiconductor layer of a second conductivity type are arranged from the base portion side to the fourth semiconductor layer. A first semiconductor multilayer structure in which the third semiconductor layer, the second semiconductor layer, and the first semiconductor layer are stacked in this order.
A second element that is a light emitting thyristor other than the first element of the plurality of light emitting thyristors includes a first conductivity type fifth semiconductor layer, a second conductivity type sixth semiconductor layer, and a second element. A first conductivity type seventh semiconductor layer and a second conductivity type eighth semiconductor layer include the eighth semiconductor layer, the seventh semiconductor layer, and the sixth semiconductor layer from the base portion side. And a second semiconductor multilayer structure laminated in the order of the fifth semiconductor layer,
The first surface between the first surface including the end surface of the first semiconductor layer on the side close to the end portion and the second surface including the end surface of the third semiconductor layer on the side close to the end portion. The distance is between the third surface including the end surface of the first semiconductor layer on the side far from the end and the fourth surface including the end surface of the third semiconductor layer on the side far from the end. Less than the second distance,
A third distance between a fifth surface including the end surface of the fifth semiconductor layer on one side in the longitudinal direction and a sixth surface including the end surface of the seventh semiconductor layer on the one side. Is between the seventh surface including the end surface of the fifth semiconductor layer on the other side opposite to the one side and the eighth surface including the end surface of the seventh semiconductor layer on the other side. Is equal to the fourth distance of
The semiconductor device is characterized in that the second distance is equal to the third distance. The second surface further includes an end surface of the second semiconductor layer on a side close to the end portion,
The fourth surface further includes an end surface of the second semiconductor layer on a side far from the end portion,
The sixth surface further includes an end surface of the sixth semiconductor layer on the one side;
The semiconductor device according to claim 1, wherein the eighth surface further includes an end surface of the sixth semiconductor layer on the other side. The first conductivity type is P type,
The second conductivity type is an N type,
Each of the first semiconductor layer and the fifth semiconductor layer includes a P-type anode layer,
Each of the second semiconductor layer and the sixth semiconductor layer includes an N-type gate layer,
Each of the third semiconductor layer and the seventh semiconductor layer includes a P-type cladding layer,
The semiconductor device according to claim 2, wherein each of the fourth semiconductor layer and the eighth semiconductor layer includes an N-type cathode layer. Each of the fourth semiconductor layer and the eighth semiconductor layer includes:
An N-type cladding layer disposed on the N-type cathode layer;
An N-type active layer disposed between the N-type cladding layer and the P-type cladding layer;
The semiconductor device according to claim 3, further comprising: The first conductivity type is an N type,
The second conductivity type is P type,
Each of the first semiconductor layer and the fifth semiconductor layer includes an N-type cathode layer;
Each of the second semiconductor layer and the sixth semiconductor layer includes a P-type gate layer,
Each of the third semiconductor layer and the seventh semiconductor layer includes an N-type cladding layer,
The semiconductor device according to claim 2, wherein each of the fourth semiconductor layer and the eighth semiconductor layer includes a P-type anode layer. Each of the fourth semiconductor layer and the eighth semiconductor layer includes:
A P-type cladding layer disposed on the P-type anode layer;
A P-type active layer disposed between the P-type cladding layer and the N-type cladding layer;
The semiconductor device according to claim 5, further comprising: The first surface further includes an end surface of the second semiconductor layer on a side close to the end portion,
The third surface further includes an end surface of the second semiconductor layer on a side far from the end portion,
The fifth surface further includes an end surface of the sixth semiconductor layer on the one side;
The semiconductor device according to claim 1, wherein the seventh surface further includes an end surface of the sixth semiconductor layer on the other side. The first conductivity type is P type,
The second conductivity type is an N type,
Each of the first semiconductor layer and the fifth semiconductor layer includes a P-type anode layer,
Each of the second semiconductor layer and the sixth semiconductor layer includes an N-type gate layer,
Each of the third semiconductor layer and the seventh semiconductor layer includes a P-type gate layer,
The semiconductor device according to claim 7, wherein each of the fourth semiconductor layer and the eighth semiconductor layer includes an N-type cathode layer. The first conductivity type is an N type,
The second conductivity type is P type,
Each of the first semiconductor layer and the fifth semiconductor layer includes an N-type cathode layer;
Each of the second semiconductor layer and the sixth semiconductor layer includes a P-type gate layer,
Each of the third semiconductor layer and the seventh semiconductor layer includes an N-type gate layer,
The semiconductor device according to claim 7, wherein each of the fourth semiconductor layer and the eighth semiconductor layer includes a P-type anode layer. The fifth distance between the ninth surface including the end surface of the fourth semiconductor layer on the side close to the end portion and the second surface on the side close to the end portion is:
2. It is smaller than a sixth distance between a tenth surface including an end surface of the base material portion on a side close to the end portion and the second surface on a side close to the end portion. 10. The semiconductor device according to any one of 1 to 9.   11. The semiconductor device according to claim 1, wherein a length of the first semiconductor layer in the longitudinal direction is equal to a length of the fifth semiconductor layer in the longitudinal direction. .   12. The semiconductor device according to claim 1, wherein the planar shape of the first semiconductor layer is the same as the planar shape of the fifth semiconductor layer.   The semiconductor device according to claim 1, wherein the base portion includes a circuit that drives the plurality of light emitting thyristors.   An optical print head comprising the semiconductor device according to claim 1.   An image forming apparatus comprising the optical print head according to claim 14.

Images