JP2019187123A - Switch drive circuit - Google Patents

Abstract

To provide a switch drive circuit capable of reducing the circuit scale.SOLUTION: A drive circuit 60 drives a first switch element SWA, a second switch element SWB, and a third switch element SWC that are connected in parallel to each other. The drive circuit 60 includes a first drive control unit 77 provided corresponding to the first switch element SWA, and a second drive control unit 87 provided corresponding to the second switch element SWB and the third switch element SWC. The current capacity of a parallel connection body of the second switch element SWB and the third switch element SWC is larger than the current capacity of the first switch element SWA.SELECTED DRAWING: Figure 8

Description

  The present invention relates to a switch drive circuit.

  Conventionally, a drive circuit that drives a plurality of switch elements connected in parallel to each other is known. For example, Patent Document 1 describes a drive circuit that is provided corresponding to each of two IGBTs connected in parallel and includes a drive control unit that drives the corresponding IGBT.

Japanese Patent Laid-Open No. 2006-146717

  When the current to be supplied to the parallel connection body of switch elements increases, the number of switch elements connected in parallel tends to increase. As the number of switch elements connected in parallel increases, the drive control unit also increases accordingly. As a result, the circuit scale of the drive circuit becomes large.

  The main object of the present invention is to provide a switch drive circuit capable of reducing the circuit scale.

  The present invention provides a switch drive circuit for driving a plurality of switch elements connected in parallel to each other, wherein the plurality of switch elements are provided corresponding to each of the switch sections configured to constitute the corresponding switch section. A drive control unit that drives the switch element, and among the plurality of switch elements, the current capacity of some of the switch elements is made larger than the current capacity of the other switch elements.

  In the present invention, the current capacity of some switch elements among the plurality of switch elements is made larger than the current capacity of other switch elements. For this reason, even when the current to be passed through the parallel connection body of each switch element is large, the number of switch elements connected in parallel is reduced as compared with the configuration in which the current capacities of the respective switch elements are equal Can do. Thereby, the drive control part which drives a switch element can be reduced, and the circuit scale of a switch drive circuit can be made small by extension.

The whole block diagram of the control system of the rotary electric machine which concerns on 1st Embodiment. The figure which shows the structure of a drive circuit. The flowchart which shows the procedure of the process performed by the control apparatus. The figure which shows the structure of the drive circuit which concerns on the modification 3 of 1st Embodiment. The flowchart which shows the procedure of the process performed by the control apparatus which concerns on 2nd Embodiment. The figure which shows the structure of the drive circuit which concerns on 3rd Embodiment. The whole block diagram of the control system of the rotary electric machine which concerns on 4th Embodiment. The figure which shows the structure of a drive circuit. The figure which shows the selection method of the switch element made into an ON state. The flowchart which shows the procedure of the process performed by the 1st drive control part. The flowchart which shows the procedure of the process performed by the 2nd drive control part. The time chart which shows the drive mode of the 1st-3rd switch element which concerns on 5th Embodiment. The time chart which shows the drive mode of the 1st-3rd switch element which concerns on 6th Embodiment. The figure which shows the structure of the drive circuit which concerns on 7th Embodiment.

<First Embodiment>
Hereinafter, a first embodiment in which a drive circuit according to the present invention is embodied will be described with reference to the drawings.

  As shown in FIG. 1, the control system includes a rotating electrical machine 10, an inverter 20 as a power converter, a boost converter 30, a storage battery 40, and a control device 50. In the present embodiment, the rotating electrical machine 10 includes a three-phase winding 11 connected in a star shape. The control system is mounted on a vehicle, for example. In this case, the rotor of the rotating electrical machine 10 is connected to a drive wheel of the vehicle so that power can be transmitted, for example. The rotating electrical machine 10 is, for example, a synchronous machine.

  The rotating electrical machine 10 is connected to the storage battery 40 via the inverter 20 and the boost converter 30. A smoothing capacitor 21 is provided between the boost converter 30 and the inverter 20.

  Boost converter 30 has a function of boosting the output voltage of storage battery 40 to target voltage VH * and outputting it to inverter 20.

  The inverter 20 includes a series connection body of upper and lower arm switch elements for each of the U, V, and W phases. In the present embodiment, each of the upper and lower arms is configured by a parallel connection body of first and second switch elements SWA and SWB. In the upper arm, the first terminal of the smoothing capacitor 21 is connected to the high potential side terminals of the switch elements SWA and SWB, and the smoothing capacitor 21 is connected to the low potential side terminal of the switch elements SWA and SWB in the lower arm. The 2nd end of is connected. The high potential side terminals of the switch elements SWA and SWB of the lower arm are connected to the low potential side terminals of the switch elements SWA and SWB of the upper arm. The first end of the winding 11 of the rotating electrical machine 10 is connected to a connection point between the low potential side terminals of the switch elements SWA and SWB of the upper arm and the high potential side terminals of the switch elements SWA and SWB of the lower arm. ing. The second ends of the windings 11 of each phase are connected at a neutral point. In the present embodiment, IGBTs are used as the switch elements SWA and SWB. Therefore, the high potential side terminals of the switch elements SWA and SWB are collectors, and the low potential side terminals are emitters. First and second freewheel diodes DA and DB are connected in antiparallel to the first and second switch elements SWA and SWB. In the present embodiment, each of the first and second switch elements SWA and SWB constitutes the first and second switch sections.

  The control system includes a voltage detection unit 22, a phase current detection unit 23, and an angle detection unit 24. The voltage detector 22 detects the terminal voltage of the smoothing capacitor 21 as the power supply voltage VHr. The phase current detection unit 23 detects a current for at least two phases among the phase currents flowing through the rotating electrical machine 10. The angle detection unit 24 is, for example, a resolver, and outputs an angle signal that is a signal corresponding to the electrical angle of the rotor of the rotating electrical machine 10. Output signals from the detection units 22 to 24 are input to the control device 50.

  Control device 50 controls boost converter 30 to control power supply voltage VHr detected by voltage detection unit 22 to target voltage VH *. The control device 50 controls the inverter 20 to control the control amount of the rotating electrical machine 10 to the command value based on the detection values of the detection units 22 to 24. The control amount is, for example, torque. The control device 50 outputs drive signals corresponding to the switch elements of the upper and lower arms to the drive circuit 60 in order to alternately turn on the switch elements of the upper and lower arms of the inverter 20 with a dead time interposed therebetween. The drive signal takes either an on command for instructing switching of the switch element to the on state or an off command for instructing switching to the off state. The drive circuit 60 is provided individually corresponding to each arm of each phase.

  Next, the configuration of the drive circuit 60 will be described with reference to FIG.

  The drive circuit 60 includes a first drive IC 70 and a second drive IC 80. The first drive IC 70 targets the first switch element SWA, and the second drive IC 80 targets the second switch element SWB.

  The first drive IC 70 includes a first charge switch 71 and a first discharge switch 72. In the present embodiment, the first charge switch 71 is a P-channel MOSFET, and the first discharge switch 72 is an N-channel MOSFET. A first constant voltage power source 73 is connected to the source of the first charging switch 71.

  The drive circuit 60 includes a first charging resistor 74, a first common resistor 75, and a first discharge resistor 76. The first end of the first charging resistor 74 is connected to the drain of the first charging switch 71, and the first end of the first common resistor 75 is connected to the second end of the first charging resistor 74. ing. The gate of the first switch element SWA is connected to the second end of the first common resistor 75.

  A first end of the first discharge resistor 76 is connected to a first end of the first common resistor 75, and a drain of the first discharge switch 72 is connected to a second end of the first discharge resistor 76. ing. The emitter of the first switch element SWA is connected to the source of the first discharge switch 72.

  The second drive IC 80 includes a second charge switch 81 and a second discharge switch 82. In the present embodiment, the second charge switch 81 is a P-channel MOSFET, and the second discharge switch 82 is an N-channel MOSFET. A second constant voltage power supply 83 is connected to the source of the second charge switch 81.

  The drive circuit 60 includes a second charging resistor 84, a second common resistor 85, and a second discharge resistor 86. A first end of the second charging resistor 84 is connected to the drain of the second charging switch 81, and a first end of the second common resistor 85 is connected to the second end of the second charging resistor 84. ing. The gate of the second switch element SWB is connected to the second end of the second common resistor 85.

  The first end of the second common resistor 85 is connected to the first end of the second discharge resistor 86, and the second end of the second discharge resistor 86 is connected to the drain of the second discharge switch 82. ing. The emitter of the second switch element SWB is connected to the source of the second discharge switch 82.

  The inverter 20 includes a first temperature detection unit 100 that detects the temperature of the first switch element SWA, and a second temperature detection unit 110 that detects the temperature of the second switch element SWB. Each temperature detection part 100,110 is comprised by the temperature sensitive diode, for example. For example, the first and second temperature detection units 100 and 110 are incorporated in a semiconductor module including the first and second switch elements SWA and SWB. The detection value of the first temperature detection unit 100 is input to the first drive control unit 77, and the detection value of the second temperature detection unit 110 is input to the second drive control unit 87.

  The first drive control unit 77 turns on and off the first charge switch 71 and the first discharge switch 72 based on the first drive signal G1 acquired from the control device 50. When the first drive control unit 77 determines that the acquired first drive signal G1 is an on command, the first drive control unit 77 performs a charging process to turn on the first charge switch 71 and turn off the first discharge switch 72. As a result, a charging current is supplied to the gate of the first switch element SWA, and the gate voltage of the first switch element SWA is set to be equal to or higher than the threshold voltage Vth of the first switch element SWA. As a result, the first switch element SWA is switched on, and current flow from the collector to the emitter of the first switch element SWA is allowed.

  When the first drive control unit 77 determines that the acquired first drive signal G1 is an off command, the first drive control unit 77 performs a discharge process to turn the first charge switch 71 off and the first discharge switch 72 on. As a result, the gate voltage of the first switch element SWA becomes less than the threshold voltage Vth, and the first switch element SWA is switched to the off state.

  The second drive control unit 87 turns on and off the second charge switch 81 and the second discharge switch 82 based on the second drive signal G2 acquired from the control device 50. When the second drive control unit 87 determines that the acquired second drive signal G2 is an on command, the second drive control unit 87 performs a charging process of turning on the second charge switch 81 and turning off the second discharge switch 82. Thereby, the gate voltage of the second switch element SWB is set to be equal to or higher than the threshold voltage Vth of the second switch element SWB, and the second switch element SWB is switched to the ON state.

  When the second drive control unit 87 determines that the acquired second drive signal G2 is an off command, the second drive control unit 87 performs a discharge process to turn the second charge switch 81 off and the second discharge switch 82 on. As a result, the gate voltage of the second switch element SWB becomes less than the threshold voltage Vth, and the second switch element SWB is switched to the off state.

  The functions provided by the first and second drive control units 77 and 87 may be provided by, for example, software recorded in a substantial memory device and a computer that executes the software, hardware, or a combination thereof. it can.

  In the present embodiment, the first current capacity CpA which is the current capacity of the first switch element SWA is smaller than the second current capacity CpB which is the current capacity of the second switch element SWB. In the present embodiment, the current capacity is an allowable upper limit value of a current (collector current) flowing through one switch element. For example, the current capacity is set so that a failure of the switch element does not occur. In the present embodiment, the element that determines the current capacity includes not only the chip size of the switch element but also the semiconductor element (for example, Si, SiC, GaN, etc.) and the cooling performance of the switch element. In the present embodiment, the magnitude relationship between the first current capacity CpA and the second current capacity CpB is determined by comprehensively adjusting these factors. For this reason, in the parallel connection body of a plurality of switch elements, for example, even if the elements of the switch elements are different from each other, the current capacities of the switch elements are not necessarily different from each other.

  In the present embodiment, the on-resistance of the first switch element SWA that is in the on state is larger than the on-resistance of the second switch element SWB that is in the on state. For this reason, when both the first and second switch elements SWA and SWB are turned on, the collector current flowing through the second switch element SWB is larger than the collector current flowing through the first switch element SWA.

  Based on the amplitude of the phase current detected by the phase current detector 23, the control device 50 selects a switch element to be switched to the ON state from the first and second switch elements SWA and SWB.

  FIG. 3 shows a procedure of processing executed by the control device 50. This process is repeatedly executed at a predetermined control cycle, for example.

  In step S10, the phase current detected by the phase current detector 23 is acquired. The process of step S10 corresponds to a current acquisition unit.

  In step S11, it is determined whether or not the acquired amplitude of the phase current is included in the small current region. The small current region is a region that is larger than 0 and equal to or smaller than the first determination current IH1. In the present embodiment, the first determination current is set to the first current capacity CpA.

  When an affirmative determination is made in step S11, the process proceeds to step S12, and only the first switch element SWA among the first and second switch elements SWA and SWB is selected as a target to be switched on. For this reason, the first drive signal G1 output to the first drive control unit 77 is a signal in which the on command and the off command appear alternately. Accordingly, the first switch element SWA is turned on / off. On the other hand, the second drive signal G2 output to the second drive controller 87 is an off command. Thereby, the second switch element SWB is maintained in the off state.

  If a negative determination is made in step S11, the process proceeds to step S13, and it is determined whether or not the phase current amplitude is included in a medium current region larger than the small current region. The middle current region is a region that is larger than the first determination current IH1 and equal to or less than the second determination current IH2 (> IH1). In the present embodiment, the second determination current IH2 is set to the second current capacity CpB.

  When an affirmative determination is made in step S13, the process proceeds to step S14, and only the second switch element SWA among the first and second switch elements SWA and SWB is selected as a target to be switched on. Therefore, the first drive signal G1 output to the first drive control unit 77 is an off command. On the other hand, the second drive signal G2 output to the second drive control unit 87 is a signal in which an ON command and an OFF command appear alternately.

  If a negative determination is made in step S13, the process proceeds to step S15 to determine whether or not the amplitude of the phase current is included in a large current region that is larger than the medium current region. The large current region is a current region larger than the second determination current IH2. Specifically, the large current region is a region that is larger than the second determination current IH2 and equal to or less than the third determination current IH3 (> IH2). In the present embodiment, the third determination current IH3 is set to the sum of the first current capacity CpA and the second current capacity CpB.

  When an affirmative determination is made in step S15, the process proceeds to step S16, and both the first and second switch elements SWA and SWB are selected as objects to be switched on. For this reason, the first and second drive signals G1 and G2 output to the first and second drive control units 77 and 87 are signals in which the ON command and the OFF command appear alternately. Here, the timing for switching to the ON command and the timing for switching to the OFF command are synchronized in the first and second drive signals G1, G2.

  If a negative determination is made in step S15, it may be determined that an overcurrent is flowing, and the first and second switch elements SWA and SWB may be forcibly switched to an off state. Moreover, the process of step S11-S16 is equivalent to a selection part.

  According to the embodiment described in detail above, the following effects can be obtained.

  The second current capacity CpB of the second switch element SWB is larger than the first current capacity CpA of the first switch element SWA. For this reason, even if the amplitude of the phase current is large, the number of switch elements connected in parallel can be reduced as compared with the configuration in which the current capacities of the first and second switch elements SWA and SWB are equal to each other. it can. Thereby, the drive control part which drives a switch element can be reduced, and the circuit scale of the drive circuit 60 can be made small by extension.

  In addition, according to the present embodiment, the number of switch elements to be selected as a switch target to be turned on can be finely switched according to the amount of current that flows through the parallel connection body of the switch elements SWA and SWB. For example, a configuration in which the current capacities of both switch elements SWA and SWB are the first current capacities CpA is taken as a comparative example. In the comparative example, when the amount of current to flow through the parallel connection body of the switch elements SWA and SWB is the same value as the second current capacity CpB (> CpA), both the first and second switch elements SWA and SWB are used. Must be switched on. In contrast, in the present embodiment, the current capacities CpA and CpB of the first and second switch elements SWA and SWB are different. For this reason, when the amount of current to flow through the parallel connection body of the switch elements SWA and SWB is the same value as the second current capacity CpB, only the second switch element SWB needs to be switched to the on state. Thereby, the loss which generate | occur | produces in the drive circuit 60 when switching the drive state of a switch element can be reduced.

<Variation 1 of the first embodiment>
In order to make the second current capacity CpB larger than the first current capacity CpA, the chip size of the second switch element SWB may be made larger than the chip size of the first switch element SWA.

<Modification 2 of the first embodiment>
The first and second switch elements SWA and SWB are not limited to the IGBTs. For example, the first switch element SWA may be an N-channel MOSFET, and the second switch element SWB may be an IGBT. In this case, in the region where the current is smaller than the predetermined current, the drain-source voltage for the drain current of the first switch element SWA is lower than the collector-emitter voltage for the collector current of the second switch element SWB. On the other hand, in the region where the current is larger than the predetermined current, the collector-emitter voltage for the collector current of the second switch element SWB is lower than the drain-source voltage for the drain current of the first switch element SWA.

<Modification 3 of the first embodiment>
As shown in FIG. 4, the common drive signal G from the control device 50 may be input to each of the first drive control unit 77 and the second drive control unit 87. In FIG. 4, the same components as those shown in FIG. 2 are given the same reference numerals for the sake of convenience.

  The control device 50 outputs a command to switch the first switch element SWA to the on state to the first drive control unit 77 and a command to switch the second switch element SWB to the on state to the second drive control unit 87. Output. The first drive control unit 77 is based on the input drive signal G on the condition that it is determined that a command to switch the first switch element SWA to the on state is input. Similarly, a charging process or a discharging process is performed. The second drive control unit 87 performs the first implementation based on the input drive signal G on the condition that it is determined that a command to switch the second switch element SWB to the on state is input. The charge process or the discharge process is performed in the same manner as the embodiment.

Second Embodiment
Hereinafter, the second embodiment will be described with reference to the drawings with a focus on differences from the first embodiment. In the present embodiment, the first temperature TDA that is the temperature detected by the first temperature detection unit 100 exceeds the first determination temperature TthA, and the second temperature that is the temperature detected by the second temperature detection unit 110. When TDB is equal to or lower than the second determination temperature TthB, the first switch element SWA is maintained in the off state even when the first drive signal G1 is an on command. Further, when the first temperature TDA is equal to or lower than the first determination temperature TthA and the second temperature TDB exceeds the second determination temperature TthB, the second drive signal G2 is an on command. However, the second switch element SWB is maintained in the off state. When the first temperature TDA exceeds the first determination temperature TthA and the second temperature TDB exceeds the second determination temperature TthB, both the first and second switch elements SWA and SWB are turned on. Allow. In the present embodiment, information on the first temperature TDA and the second temperature TDA is input to the control device 50.

  FIG. 5 shows a procedure of processing executed by the control device 50. This process is repeatedly executed at a predetermined control cycle, for example.

  In step S20, the first temperature TDA and the second temperature TDB are acquired. The process of step S20 corresponds to a temperature acquisition unit.

  In step S21, it is determined whether or not the first temperature TDA exceeds the first determination temperature TthA. For example, the first determination temperature TthA is set to the allowable upper limit temperature of the first switch element SWA.

  When it is determined in step S21 that the first temperature TDA is equal to or lower than the first determination temperature TthA, the process proceeds to step S22, and it is determined whether or not the second temperature TDB exceeds the second determination temperature TthB. For example, the second determination temperature TthB is set to the allowable upper limit temperature of the second switch element SWB.

  If it is determined in step S22 that the second temperature TDB is equal to or lower than the second determination temperature TthB, the process proceeds to step S23, and both the first and second switch elements SWA and SWB are selected as objects to be switched on. .

  If it is determined in step S22 that the second temperature TDB exceeds the second determination temperature TthB, the process proceeds to step S24, and only the first switch element SWA is turned on among the first and second switch elements SWA and SWB. Select to switch to state.

  If it is determined in step S21 that the first temperature TDA exceeds the first determination temperature TthA, the process proceeds to step S25, and it is determined whether or not the second temperature TDB exceeds the second determination temperature TthB. If it is determined in step S25 that the second temperature TDB is equal to or lower than the second determination temperature TthB, the process proceeds to step S26, and only the second switch element SWB is turned on among the first and second switch elements SWA and SWB. Select to switch to. On the other hand, when it determines with 2nd temperature TDB exceeding 2nd determination temperature TthB in step S25, it progresses to step S23. According to the processing in step S23, it is possible to prevent any one of the first and second switch elements SWA and SWB from continuing to generate heat.

  Note that the processing in steps S21 to S24 corresponds to a selection unit.

  According to the present embodiment described above, an object to be switched to the ON state is appropriately selected from the first and second switch elements SWA and SWB according to the temperatures of the first and second switch elements SWA and SWB. be able to.

<Modification of Second Embodiment>
Each of the temperature detection units 100 and 110 may detect a temperature having a correlation with the temperature of the switch element instead of the temperature of the switch element. Examples of the temperature having a correlation with the temperature of the switch element include the ambient temperature of the switch or the temperature of the cooling fluid that cools the semiconductor module incorporating the switch.

<Third Embodiment>
Hereinafter, the third embodiment will be described with reference to the drawings with a focus on differences from the first embodiment. In this embodiment, instead of the phase current, the switch element to be switched to the on state is selected based on the sense voltage.

  FIG. 6 shows a drive circuit 60 according to this embodiment. In FIG. 6, the same components as those shown in FIG. 2 are given the same reference numerals for the sake of convenience.

  The first switch element SWA has a first sense terminal StA through which a minute current having a correlation with a collector current flowing therethrough flows. The first end of the first sense resistor 78 is connected to the first sense terminal StA, and the emitter of the first switch element SWA is connected to the second end of the first sense resistor 78. A small amount of current flowing through the first sense terminal StA causes a voltage drop amount in the first sense resistor 78. Therefore, the first sense voltage VseA, which is the potential on the first sense terminal StA side of the first sense resistor 78, is an electrical state quantity correlated with the collector current. In the present embodiment, the emitter potential of the first switch element SWA is set to 0, and the sign of the first sense voltage VseA higher than the emitter potential is defined as positive.

  The first terminal of the first sense resistor 78 is connected to the non-inverting input terminal of the first comparator 101 of the first drive IC 70. The first current threshold value VTA is input to the inverting input terminal of the first comparator 101. The first current threshold value VTA is set to a value with which it can be determined that an overcurrent flows through the first switch element SWA. When the first sense voltage VseA is lower than the first current threshold value VTA, the logic of the output signal of the first comparator 101 is L. On the other hand, when the first sense voltage VseA is larger than the first current threshold value VTA, the logic of the output signal of the first comparator 101 is H.

  An output signal of the first comparator 101 is input to the first drive control unit 77. When the first drive control unit 77 determines that the logic of the output signal of the first comparator 101 is L, the first drive control unit 77 performs the charging process or the discharging process according to the input first driving signal G1. On the other hand, when the first drive control unit 77 determines that the logic of the output signal of the first comparator 101 is H, the first drive control unit 77 prohibits execution of the charging process regardless of the logic of the input first drive signal G1. Then, discharge treatment is performed. Thereby, the first switch element SWA is maintained in the off state.

  The second switch element SWB has a second sense terminal StB through which a minute current having a correlation with a collector current flowing therethrough flows. A second end of the second sense resistor 88 is connected to the second sense terminal StB, and an emitter of the second switch element SWB is connected to a second end of the second sense resistor 88. With this configuration, the second sense voltage VseB, which is the potential on the second sense terminal StB side of the second sense resistor 88, is an electrical state quantity correlated with the collector current. In the present embodiment, the emitter potential of the second switch element SWB is set to 0, and the sign of the second sense voltage VseB higher than this emitter potential is defined as positive.

  The first end of the second sense resistor 88 is connected to the non-inverting input terminal of the second comparator 111 of the second drive IC 80. The second current threshold value VTB is input to the inverting input terminal of the second comparator 111. The second current threshold value VTB is set to a value with which it can be determined that an overcurrent flows through the second switch element SWB. In the present embodiment, the second current threshold value VTB is set to a value larger than the first current threshold value VTA.

  When the second sense voltage VseB is lower than the second current threshold value VTB, the logic of the output signal of the second comparator 111 is L. On the other hand, when the second sense voltage VseB is larger than the second current threshold value VTB, the logic of the output signal of the second comparator 111 is H.

  The output signal of the second comparator 111 is input to the second drive control unit 87. When the second drive control unit 87 determines that the logic of the output signal of the second comparator 111 is L, the second drive control unit 87 performs the charging process or the discharging process according to the input second driving signal G2. On the other hand, when the second drive control unit 87 determines that the logic of the output signal of the second comparator 111 is H, the second drive control unit 87 prohibits execution of the charging process regardless of the logic of the input second drive signal G2. Then, discharge treatment is performed. Thereby, the second switch element SWB is maintained in the off state.

  According to the present embodiment described above, the switch element determined to have an overcurrent can be turned off.

<Fourth embodiment>
Hereinafter, the fourth embodiment will be described with reference to the drawings with a focus on differences from the third embodiment. In the present embodiment, as shown in FIG. 7, each arm of each phase of the inverter 20 is configured by a parallel connection body of three switch elements. The third switch element is referred to as a third switch SWC. A third freewheel diode DC is connected in antiparallel to the third switch SWC. In FIG. 7, the same components as those shown in FIG. 1 are given the same reference numerals for the sake of convenience.

  FIG. 8 shows a drive circuit 60 according to this embodiment. In FIG. 8, the same components as those shown in FIG. 6 are given the same reference numerals for the sake of convenience. In the present embodiment, the second common resistor 85 shown in FIG. 6 is referred to as a second A common resistor 85a.

  The first drive IC 70 targets the first switch SWA, and the second drive IC 80 targets the second and third switches SWB and SWC. In the present embodiment, the first switch element SWA corresponds to the first switch part, and the parallel connection body of the second and third switch elements SWB and SWC corresponds to the second switch part. The current capacity of the third switch element SWC is defined as a third current capacity CpC. In the present embodiment, the current capacities CpA, CpB, and CpC are set so that the added value of the second current capacity CpB and the second current capacity CpB is larger than the first current capacity CpA. Each current capacity has a different value. As an example, in this embodiment, “CpC> CpB> CpA”. In addition to this, for example, “CpA <CpB = CpC” or “CpA = CpB <CpC” may be used.

  The drive circuit 60 includes a second B common resistor 85b. The second end of the second charging resistor 84 is connected to the first end of the second B common resistor 85b. The gate of the third switch SWC is connected to the second end of the second B common resistor 85b. The first end of each of the second A common resistor 85a and the second B common resistor 85b is connected to the first end of the second discharge resistor 86, and the second end of the second discharge resistor 86 is connected to the second end. The drain of the discharge switch 82 is connected. The emitters of the second and third switches SWB and SWC are connected to the source of the second discharge switch 82. In the present embodiment, the resistance value of the second A common resistor 85a and the resistance value of the second B common resistor 85b are set to the same value.

  The second drive control unit 87 turns on and off the second charge switch 81 and the second discharge switch 82 based on the second drive signal G2 acquired from the control device 50. Accordingly, in the present embodiment, the second switch element SWB and the third switch element SWA are turned on and off in synchronization.

  The third switch element SWC has a third sense terminal StC through which a minute current having a correlation with a collector current flowing therethrough flows. A first end of the third sense resistor 89 is connected to the third sense terminal StC, and an emitter of the third switch element SWC is connected to the second end of the third sense resistor 89. With this configuration, the third sense voltage VseC, which is the potential on the third sense terminal StC side of the third sense resistor 89, is an electrical state quantity correlated with the collector current. In the present embodiment, the emitter potential of the third switch element SWC is set to 0, and the sign of the third sense voltage VseC higher than this emitter potential is defined as positive.

  The first sense voltage VseA is input to the first drive control unit 77. The second sense voltage VseB and the third sense voltage VseC are input to the second drive control unit 87. Each of the first drive control unit 77 and the second drive control unit 87 is configured to be able to exchange a sense voltage acquired by itself.

  In the present embodiment, as shown in FIG. 9, the switch element to be switched to the ON state is changed in each half period of the phase current according to the amplitude of the sinusoidal phase current. FIG. 9 shows the case where the phase current has a positive half cycle, but the same applies to the case where the phase current has a negative half cycle.

  FIG. 10 shows a procedure of processing executed by the first drive control unit 77. This process is repeatedly executed at a predetermined control cycle, for example.

  In step S30, first to third sense voltages VseA to VseC are acquired. For example, the second and third sense voltages VseB and VseC may be obtained directly from the second drive control unit 87, or when the second and third sense voltages VseB and VseC are input to the control device 50, You may acquire via the 2 drive control part 87 and the control apparatus 50. FIG. The process of step S30 corresponds to a current acquisition unit.

  In step S31, based on the sum of the acquired first to third sense voltages VseA to VseC, a total current that is a total value of currents flowing through the parallel connection bodies of the first to third switch elements SWA to SWC is a small current region. It is determined whether it is included in. The small current region corresponds to the first current region, and is a region that is greater than 0 and equal to or less than the first determination current IK1. In the present embodiment, the first determination current IK1 is set to the first current capacity CpA.

  If a negative determination is made in step S31, the process proceeds to step S32 to determine whether or not the total current is included in the large current region. The large current region corresponds to the second current region, and is a region that is larger than the second determination current IK2 (> IK1) and equal to or less than the third determination current IK3 (> IK2). In the present embodiment, the second determination current IK2 is set to the added value of the second current capacity CpB and the third current capacity CpC, and the third determination current IK3 is the first current capacity CpA, the second current capacity CpB, and the second current capacity CpB. It is set to the added value of the three current capacities CpC.

  If a negative determination is made in step S32, it is determined that the total current is included in the medium current region, and the first switch element SWA is maintained in the off state. The middle current region is a region that is larger than the first determination current IK1 and less than or equal to the second determination current IK2.

  When an affirmative determination is made in step S31 or S32, the process proceeds to step S33, and the first switch element SWA is selected as a switching target to be turned on.

  FIG. 11 shows a procedure of processing executed by the second drive control unit 87. This process is repeatedly executed at a predetermined control cycle, for example.

  In step S40, first to third sense voltages VseA to VseC are acquired. For example, the first sense voltage VseA may be acquired directly from the first drive control unit 77. When the first sense voltage VseA is input to the control device 50, the first drive control unit 77 and the control device 50 are connected. You may get through. The process of step S40 corresponds to a current acquisition unit.

  In step S41, it is determined based on the sum of the acquired first to third sense voltages VseA to VseC whether the total current is included in the middle current region.

  If a negative determination is made in step S41, the process proceeds to step S42 to determine whether or not the total current is included in the large current region. When a negative determination is made in step S42, it is determined that the total current is included in the small current region, and the OFF state of the second and third switch elements SWB and SWC is maintained.

  When an affirmative determination is made in step S41 or S42, the process proceeds to step S43, and the second and third switch elements SWB, SWC are selected as objects to be switched to the on state.

  Note that steps S31 to S33 in FIG. 10 and steps S41 to S43 in FIG. 11 correspond to the selection unit.

  According to the embodiment described above, the following effects can be obtained.

  The second and third switch elements SWB and SWC are driven by the common second drive control unit 87. For this reason, a drive control part can be reduced compared with the structure with which a drive control part is individually provided corresponding to each of 2nd, 3rd switch element SWB and SWC.

  When it is determined that the total current is included in the middle current region, the second and third switch elements SWB and SWC are switched to the off state by the common second drive control unit 87. Hereinafter, a configuration contrasting with this configuration is used as a comparative example. The comparative example is a configuration in which individual drive control units are provided corresponding to the second and third switch elements SWB and SWC, respectively.

  In the comparative example, even if the second and third switch elements SWB and SWC are synchronized and switched to the on state or the off state, the second and third switch elements SWB and SWC are driven by different drive control units. Therefore, the timing for switching to the off state may be shifted. In this case, of the second and third switch elements SWB and SWC, the collector current of the switch element that has been switched to the OFF state first decreases, but the collector current of the switch element that has not yet been switched to the OFF state temporarily Starts decreasing after increasing. As a result, current imbalance, which is a phenomenon in which collector currents flowing in the second and third switch elements SWB and SWC are greatly shifted, occurs, and switching loss increases.

  On the other hand, in the present embodiment, the second and third switch elements SWB and SWC are switched to the off state by the common second drive control unit 87. For this reason, it is possible to reduce the shift amount of the switching timing of each of the second and third switch elements SWB and SWC to the off state, and to suppress the occurrence of current imbalance. Even when the second and third switch elements SWB and SWC are switched to the on state, the occurrence of current imbalance can be suppressed as in the case of switching to the off state.

  When it is determined that the total current is included in the small current region, only the first switch element SWA among the first to third switch elements SWA to SWC is selected as the target to be switched on. As a result, the number of switch elements through which the tail current flows when switching to the off state can be reduced, and the switching loss can be reduced.

<Modification of Fourth Embodiment>
Instead of the sense voltage, the switch element to be switched to the on state may be selected based on the amplitude of the phase current detected by the phase current detector 23.

<Fifth Embodiment>
Hereinafter, the fifth embodiment will be described with reference to the drawings with a focus on differences from the fourth embodiment. In the present embodiment, the sense voltages VseA to VseC are input to the control device 50. When determining that the total current is included in the large current region based on the sum of the sense voltages VseA to VseC, the control device 50 switches the first drive signal G1 to the off command as shown in FIG. The timing is set earlier than the timing at which the second drive signal G2 is switched to the off command. Thereby, the switching timing of the first switch element SWA to the OFF state is earlier than the switching timing of the second and third switch elements SWB and SWC to the OFF state. 12A shows the transition of the first drive signal G1 output from the control device 50, and FIG. 12B shows the transition of the second drive signal G2 output from the control device 50.

  Even if the first to third switch elements SWA to SWC are synchronized and switched to the off state, the switching timing of the switch elements SWA to SWC to the off state may be shifted. Here, among the first to third switch elements SWA to SWC, when the parallel connection body of the second and third switch elements SWB and SWC having a large current capacity is switched to the OFF state first, the parallel connection body flows. The collector current that has been flowing flows through the first switch element SWA that has not yet been switched off. As a result, the collector current flowing through the first switch element SWA having a smaller current capacity than the parallel connection body of the second and third switch elements SWB and SWC may exceed the current capacity Cpt.

  Therefore, the control device 50 advances the timing for switching the first drive signal G1 to the off command earlier than the timing for switching the second drive signal G2 to the off command. Thereby, although the collector current that has flowed through the first switch element SWA flows into the parallel connection body of the second and third switch elements SWB and SWC that have not been switched to the OFF state, the current capacity of the parallel connection body is The current capacity of the first switch element SWA is larger. For this reason, it can suppress that the collector current which flows into 1st switch element SWA exceeds current capacity.

  In the present embodiment, when the control device 50 determines that the total current is included in the large current region, as shown in FIG. 12, the timing for switching the second drive signal G2 to the ON command is set to the first drive signal. It is earlier than the timing for switching G1 to the ON command. Thereby, the switching timing of the second and third switch elements SWB, SWC to the on state is set earlier than the switching timing of the first switch element SWA to the on state.

  Even if the first to third switch elements SWA to SWC are synchronized and switched to the on state, the switching timing of the switch elements SWA to SWC to the on state may be shifted. Here, among the first to third switch elements SWA to SWC, when the first switch element SWA having a small current capacity is switched to the off state first, the second and third switch elements SWB and SWC are subsequently turned on. Until switching, the collector current in the large current region flows through the first switch element SWA. As a result, the collector current that flows through the first switch element SWA may exceed the current capacity Cpt of the first switch element SWA.

  Therefore, the control device 50 advances the timing for switching the second drive signal G2 to the on command earlier than the timing for switching the first drive signal G1 to the on command. Thereby, it is possible to prevent the collector current in the large current region from being handled only by the first switch element SWA. For this reason, it can suppress that the collector current which flows into 1st switch element SWA exceeds current capacity Cpt.

  In the present embodiment, when it is determined that the total current is included in the medium current region or the large current region, the second and third switch elements SWB that try to switch to the on state or the off state synchronously. , SWC are driven by a common second drive control unit 87. It may be difficult to switch the two switch elements to the on state or the off state in synchronization by different drive control units. This is due to, for example, individual differences between the different drive control units. When driven by different drive control units, there is a concern that the deviation of the switching timing of the two switch elements to the on state or the off state becomes large. On the other hand, in this embodiment, since it drives by the common 2nd drive control part 87, the shift | offset | difference of the switching timing to the ON state of the two switch elements or an OFF state can be made small.

<Modification 1 of 5th Embodiment>
The configuration in which the switching timing of the first switch element SWA to the off state is earlier than the switching timing of the second and third switch elements SWB and SWC to the off state is not limited to the configuration described in the fifth embodiment. A configuration is also conceivable in which the timings at which the first and second drive signals G1, G2 are switched to the off command are synchronized. Even in this case, the drive circuit 60 is configured to delay the switching timing of the second and third switch elements SWB and SWC to the OFF state from the switching timing of the first switch element SWA to the OFF state. Therefore, the switching timing of the first switch element SWA to the off state may be set earlier than the switching timing of the second and third switch elements SWB and SWC to the off state.

  A configuration in which the timings at which the first and second drive signals G1 and G2 are switched to the on command is synchronized is also conceivable. Even in this case, the drive circuit 60 is configured to delay the switching timing of the first switch element SWA to the on state from the switching timing of the second and third switch elements SWB and SWC to the on state. Therefore, the switching timing of the third switch elements SWB and SWC to the on state may be set earlier than the switching timing of the first switch element SWA to the on state.

<Modification 2 of Fifth Embodiment>
The configuration of the fifth embodiment can also be applied to the first embodiment in which each of the first and second switch units has one switch element.

<Sixth Embodiment>
Hereinafter, the sixth embodiment will be described with reference to the drawings with a focus on differences from the fourth embodiment. In the present embodiment, as shown in FIG. 13, the switch elements are switched to the ON state in the order of the second switch element SWB and the third switch element SWC. In the present embodiment, the resistance value of the second A common resistor 85a shown in FIG. 8 is made smaller than the resistance value of the second B common resistor 85b. For this reason, the charge rate of the gate charge of the second switch element SWB is higher than the charge rate of the gate charge of the third switch element SWC. As a result, the second and third switch elements SWB and SWC are switched on by the second drive control unit 87 with the common second drive signal G2, but the second switch element SWB is more than the third switch element SWC. Switched on first. Here, FIG. 13A shows the transition of the first drive signal G1 output from the control device 50, and FIG. 13B shows the transition of the drive state of the first switch element SWA. FIG. 12C shows the transition of the second drive signal G2 output from the control device 50, and FIGS. 13D and 13E show the transition of the drive state of the second and third switch elements SWB and SWC. . Note that the time lag from when the first drive signal G1 is switched to the ON command to when the first switch element SWA is switched to the ON state is, for example, a delay in signal transmission from the control device 50 to the drive circuit 60, and the drive This is due to the configuration in the circuit 60. The same applies to the time lag related to the second drive signal G2.

  The first drive control unit 77 switches the first switch element SWA to the on state after the second switch control unit 87 switches the third switch element SWC to the on state. Accordingly, the switch elements are switched to the ON state in the order of the second switch element SWB, the third switch element SWC, and the first switch element SWA. The reason why the first switch element SWA is switched to the on state after the third switch element SWC is switched to the on state is for the reason described below.

  The second and third switch elements SWB and SWC are driven by a common second drive control unit 87. Further, the second and third switch elements SWB, SWC have different resistance values of the second A and B common resistors 85a, 85b, and therefore the timing for switching to the on state is different. In this case, the period from when the second switch element SWB is switched to the on state to when the third switch element SWC is switched to the on state is short, and the first drive different from the second drive control unit 87 is within this period. It is difficult for the controller 77 to switch the first switch element SWA to the on state.

  Therefore, in the present embodiment, the first switch element SWA is turned on during the switching timing of the second and third switch elements SWB and SWC driven by the common second drive control unit 87 to the on state. Avoided switching timing setting.

  In the present embodiment, as shown in FIG. 13, the switch elements are switched to the OFF state in the order of the second switch element SWB and the third switch element SWC. As described above, since the resistance value of the second A common resistor 85a is smaller than the resistance value of the second B common resistor 85b, the discharge rate of the gate charge of the second switch element SWB is the third switch element. It is higher than the discharge rate of the gate charge of the SWC. As a result, the second and third switch elements SWB and SWC are switched off by the second drive control unit 87 with the common second drive signal G2, but the second switch element SWB is more than the third switch element SWC. Switched off first.

  The first drive control unit 77 switches the first switch element SWA to the off state before the second drive control unit 87 switches the second switch element SWB to the off state. Accordingly, the switch elements are switched to the OFF state in the order of the first switch element SWA, the second switch element SWB, and the third switch element SWC. The reason why the first switch element SWA is switched to the off state before the second switch element SWB is switched to the off state is that the third switch element SWC is switched to the off state after the second switch element SWB is switched to the off state. This is because it is difficult to switch the first switch element SWA to the OFF state by the first drive control unit 77 different from the second drive control unit 87 within a short period until it is completed.

<Modification 1 of 6th Embodiment>
The first switch element SWA may be switched to the on state before the second switch element SWB is switched to the on state. In this case, the switch elements are switched to the ON state in the order of the first switch element SWA, the second switch element SWB, and the third switch element SWC.

<Modification 2 of 6th Embodiment>
The first switch element SWA may be switched to the off state after the third switch element SWC is switched to the off state. In this case, the switch elements are switched to the OFF state in the order of the second switch element SWB, the third switch element SWC, and the first switch element SWA.

<Seventh embodiment>
Hereinafter, the seventh embodiment will be described with reference to the drawings with a focus on differences from the fourth embodiment. In the present embodiment, as shown in FIG. 14, the driving state of the second and third switches SWB and SWC constituting the second switch unit can be individually driven by the second drive control unit 87. Therefore, the second and third drive signals G2 and G3 are transmitted from the control device 50 to the second drive control unit 87. The second drive signal G2 is a drive signal for the second switch element SWB, and the third drive signal G3 is a drive signal for the third switch element SWC.

  In the present embodiment, the second switch SWB of the second current capacity CpB corresponds to a small capacity switch, and the third switch SWC of the third current capacity CpC corresponds to a large capacity switch. In this embodiment, “CpC> CpB> CpA”. 14, for the sake of convenience, the same components as those shown in FIG. 8 are given the same reference numerals. In FIG. 14, the illustration of the configuration of resistors, switches, and the like on the electrical path connecting the drive control units 77 and 87 and the gates of the switch elements SWA, SWB, and SWC is omitted.

  According to the present embodiment, when the amount of current desired to flow through the parallel connection body of the switches SWA to SWC is finely switched, it is possible to suppress the switching of the drive IC to be driven. For example, the medium current region is divided into a first medium current region and a second medium current region. The first medium current region is a region in which the total current is larger than the first current capacity CpA and not more than the second current capacity CpB. The second middle current region is a region where the total current is larger than the second current capacity CpB and not more than the third current capacity CpC. When the total current is included in the first medium current region, only the second switch element SWB among the switch elements SWA to SWC is selected as an object to be switched to the ON state. On the other hand, when the total current is included in the second middle current region, only the third switch element SWC among the switch elements SWA to SWC is selected as the target to be switched to the ON state.

  Here, according to the present embodiment, even when the region including the total current is switched from the first middle current region to the second middle current region, the switch element selected as the target for switching to the on state is It is driven by the common second drive control unit 87. For this reason, when the current amount desired to flow is finely switched, the drive IC that drives the switch element remains the second drive IC 80. For this reason, the loss which generate | occur | produces in the drive circuit 60 can be reduced. Note that the first and second drive ICs 70 and 80 may be in a dormant state in which their operation is stopped when the switch element to be driven is not selected as the switch target to be turned on. In this case, the effect of reducing the loss generated in the drive circuit 60 can be enhanced.

<Other embodiments>
Each of the above embodiments may be modified as follows.

  In the first embodiment, the control device 50 is turned on from the first and second switch elements SWA and SWB based on the power supply voltage VHr detected by the voltage detector 22 instead of the amplitude of the phase current. A switch element to be switched to may be selected.

  -The number of parallel connection of the switch elements constituting each arm of each phase may be four or more. In this case, the drive circuit 60 may be provided with three or more drive control units.

  In the drive circuit 60, the first drive IC 70 and the second drive IC 80 may be a common IC.

  The boost converter 30 may not be provided in the control system. In this case, the inverter 20 is connected to the storage battery 40.

  60 ... Drive circuit, 77 ... First drive control unit, 87 ... Second drive control unit, SWA ... First switch element, SWB ... Second switch element.

Claims (9)

In a switch drive circuit (60) for driving a plurality of switch elements connected in parallel to each other,
A plurality of the switch elements are provided corresponding to each switch unit configured, and provided with a drive control unit (77, 87) for driving the switch elements constituting the corresponding switch unit,
The switch drive circuit in which the current capacity of some switch elements (SWA) among the plurality of switch elements is larger than the current capacity of other switch elements (SWB, SWC). The switch element is three or more,
2. The switch drive circuit according to claim 1, wherein at least one of the switch units includes two or more switch elements connected in parallel to each other. A current acquisition unit for acquiring information on a current to flow through a parallel connection body of the plurality of switch elements;
The switch drive circuit according to claim 2, further comprising: a selection unit that selects a switch unit to be switched on from the switch units based on information acquired by the current acquisition unit. As each switch part, a first switch part and a second switch part having a larger current capacity than the first switch part are provided,
Based on the information acquired by the current acquisition unit, the selection unit has a second current that is greater than the first current region or the first current region in the parallel connection body of the plurality of switch elements. When it is determined whether the current region is included, and when it is determined that the current region is included, only the switch elements constituting the first switch unit among the plurality of switch elements are turned on. When selecting as a switching target and determining that it is included in the second current region, select the switching element constituting both the first switch unit and the second switch unit as a switching target to be turned on,
When both the first switch unit and the second switch unit are selected by the selection unit, the switching timing of the switch element constituting the first switch unit to the OFF state is determined by the second switch unit. The switch drive circuit according to claim 3, wherein the switch drive circuit is earlier than a switching timing of the switch element to be turned off. As each switch part, a first switch part and a second switch part having a larger current capacity than the first switch part are provided,
Based on the information acquired by the current acquisition unit, the selection unit has a second current that is greater than the first current region or the first current region in the parallel connection body of the plurality of switch elements. When it is determined whether the current region is included, and when it is determined that the current region is included, only the switch elements constituting the first switch unit among the plurality of switch elements are turned on. When selecting as a switching target and determining that it is included in the second current region, select the switching element constituting both the first switch unit and the second switch unit as a switching target to be turned on,
When both the first switch unit and the second switch unit are selected by the selection unit, the switching timing of the switch element constituting the second switch unit to the ON state is determined by the first switch unit. The switch drive circuit according to claim 3, wherein the switch drive circuit is earlier than the switching timing of the switch element to be turned on. A temperature acquisition unit for acquiring temperature information of each switch unit;
The switch according to any one of claims 2 to 5, further comprising: a selection unit that selects a switch unit to be switched on from the switch units based on the temperature information acquired by the temperature acquisition unit. Driving circuit. As each of the switch units, a first switch unit and a second switch unit including the switch elements larger than the number of the switch elements included in the first switch unit are provided.
Of the drive control units, a drive control unit that drives the switch element that constitutes the first switch unit is a first drive control unit (77), and the switch element that constitutes the second switch unit is driven. The drive control unit is a second drive control unit (87),
The first drive control unit includes the switch that configures the first switch unit before or after the drive state of each switch element that configures the second switch unit is switched by the second drive control unit. The switch drive circuit according to claim 2, wherein the drive state of the element is switched.   The second drive control unit sequentially switches the driving state of the switch elements constituting the second switch unit by changing the moving speed of the gate charge of the switch elements constituting the second switch unit. The switch drive circuit according to claim 7. As each switch part, a first switch part and a second switch part are provided,
The second switch unit includes a small capacity switch (SWB) and a large capacity switch (SWC) having a larger current capacity than the small capacity switch,
Of the drive control units, a drive control unit that drives the switch element that constitutes the first switch unit is a first drive control unit (77), and the switch element that constitutes the second switch unit is driven. The drive control unit is a second drive control unit (87),
The switch drive circuit according to any one of claims 2 to 6, wherein each of the small-capacity switch and the large-capacity switch can be individually driven by the second drive control unit.

Images