JP2019166009A - Game machine - Google Patents

Abstract

To provide a game machine which can prevent a light emitter from emitting light in a light emission pattern different from a light emission pattern represented with drive data.SOLUTION: A sub CPU 120 outputs drive data for driving LEDs to each driver IC 121-131 to control the LEDs. The sub CPU 120 outputs the drive data to the master driver IC 121 by means of a three-wire type serial. The slave driver ICs 122-131 are connected directly or via another slave driver IC to the master driver IC. Each driver IC 121-123, 127-129 outputs the drive data to another slave driver IC by means of a differential signal. The driver ICs 121-131 are connected by means of a pair line of data positive and data negative for transmitting the drive data, and a pair line of clock positive and clock negative for transmitting a synchronized clock of the drive data.SELECTED DRAWING: Figure 9

Description

  The present invention relates to a gaming machine such as a pachislot machine.

  Conventionally, it is detected that a plurality of reels having a plurality of symbols arranged on each surface, a game medal, a coin or the like (hereinafter referred to as “game medium”), and the start lever is operated by the player, A start switch that requests the start of rotation of a plurality of reels and a stop button provided corresponding to each of the plurality of reels are detected by the player, and the stop of rotation of the corresponding reel is requested. A stop switch that outputs a signal, a stepping motor that is provided corresponding to each of the plurality of reels, and that transmits each driving force to each reel, and a stepping motor based on the signals output by the start switch and the stop switch A reel control device that controls the operation of each reel and rotates and stops each reel, and the start lever is operated. Is detected, the lottery is performed based on the random number value, and the reel rotation is stopped based on the result of the lottery (hereinafter referred to as “internal winning combination”) and the timing at which the stop button is detected. There is known a so-called pachislot machine that performs the above.

  As this type of gaming machine, Patent Document 1 proposes an LED driver IC that is connected to a sub-control device through serial communication to drive an effect LED by controlling the sub-control device.

JP 2017-143854 A

  Generally, serial communication is vulnerable to noise. When drive data of a light emitting body such as a production LED is transmitted via a serial line, if noise enters the serial line, the LED driver IC malfunctions and the light emission pattern represented by the drive data There may be a problem that the light emitter is driven with a different light emission pattern.

  The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of preventing a light emitter from emitting light with a light emission pattern different from a light emission pattern represented by drive data. To do.

The gaming machine according to the present invention is
A plurality of light emitters (LED module LEDs);
A plurality of drivers (drivers 121 to 131) for driving the light emitter;
A control unit (sub CPU 120) that outputs and controls drive data for driving the light emitter to the driver,
The driver includes a master driver (driver 121) connected to the control unit and a plurality of slave drivers (for example, drivers 122 to 131).
The plurality of slave drivers are connected directly to the master driver or via other slave drivers, respectively.
Each of the master driver and the slave driver is
An address setting terminal (A0 to A5) capable of setting a driver address;
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
An input setting terminal (MODE) capable of setting whether the drive data is input to the input terminal as a differential signal or a three-wire serial;
An output circuit (each of the drivers 121 to 131) that outputs the drive data input to the input terminal as a differential signal;
A drive circuit (for example, each of the drivers 121 to 131) for driving the light emitter,
The control unit outputs the drive data to the master driver in the 3-wire serial,
The master driver has the input setting terminal set to input the drive data to the input terminal in a three-wire serial manner,
In the slave driver, the input setting terminal is set so that the drive data is input to the input terminal as a differential signal,
Each driver of the master driver and the slave driver, when the driver address of the drive data input to the input terminal matches the driver address set by the address setting terminal, the drive based on the drive data Output a drive signal for driving the light emitter from the circuit,
Between each driver of the master driver and the slave driver,
A data positive and data negative pair line for transmitting the driving data;
The clock positive and clock negative pair lines for transmitting the clock for synchronizing the driving data transmitted by the data positive and data negative pair lines are connected.

  With this configuration, the gaming machine according to the present invention transfers the drive data between the drivers with a differential signal that is more resistant to noise than a general serial signal, so that noise is generated on the line that transmits the drive data between the drivers. In order to prevent mixing, it is possible to prevent the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

  In addition, the gaming machine according to the present invention transfers the drive data between each driver using a data positive and data negative pair line that is more resistant to noise than the single-ended method, and uses a clock positive and clock negative pair line that is resistant to noise. Since the drive data synchronization clock is transferred between the drivers, the light emission pattern is different from the light emission pattern represented by the drive data in order to prevent noise from entering each line that transmits the drive data and clock between the drivers. It is possible to prevent the light emitter from emitting light.

  According to the present invention, it is possible to provide a gaming machine capable of preventing the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

It is a front perspective view of the gaming machine according to the embodiment of the present invention. It is a back surface perspective view of the game machine concerning an embodiment of the invention. 1 is a front view of a gaming machine according to an embodiment of the present invention. 1 is a front view of a gaming machine when an upper door mechanism and a lower door mechanism according to an embodiment of the present invention are opened. 1 is an exploded perspective view of a gaming machine according to an embodiment of the present invention. It is the longitudinal cross-sectional view which cut | disconnected the display unit of the game machine which concerns on embodiment of this invention in the direction orthogonal to the left-right direction. It is a figure which shows the relationship between the irradiation range of the light projected from the projector of the game machine which concerns on embodiment of this invention, and a main screen. 1 is a block diagram showing an electrical configuration of a gaming machine according to an embodiment of the present invention. It is a block diagram for demonstrating the LED signal line for controlling LED provided in the game machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the sub relay board | substrate in the gaming machine which concerns on embodiment of this invention. It is a timing chart for demonstrating the mode of the driver provided in the sub relay board | substrate in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the other connection aspect of a structure of the sub relay board | substrate in the gaming machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the lower periphery connection board | substrate in the gaming machine which concerns on embodiment of this invention, and its periphery board | substrate. It is a block diagram which shows the structure of the lower left LED board in the game machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the lower right LED board | substrate in the game machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the top relay board | substrate in the gaming machine which concerns on embodiment of this invention, a side right LED board, and a top center LED board. It is a block diagram which shows the structure of the side left LED board in the game machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the top side left LED board in the game machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the top side right LED board | substrate in the game machine which concerns on embodiment of this invention. It is a conceptual diagram which shows the 1st example of the data output toward each driver from the sub CPU in the gaming machine according to the embodiment of the present invention. It is a conceptual diagram which shows the 2nd example of the data output toward each driver from the sub CPU in the gaming machine according to the embodiment of the present invention. It is a conceptual diagram which shows the 3rd example of the data output toward each driver from the sub CPU in the gaming machine according to the embodiment of the present invention. It is a conceptual diagram which shows the 4th example of the data output toward each driver from the sub CPU in the gaming machine according to the embodiment of the present invention.

  Embodiments of the present invention will be described below with reference to the drawings.

  First, the configuration will be described. As shown in FIGS. 1 to 5, the gaming machine 1 is a so-called pachislot machine. The gaming machine 1 can be played using coins, medals, game balls, tokens, and the like, as well as game media such as a card storing game value information assigned to or attached to a player. In the following description, medals are used.

  In the following description, the side (direction) from the gaming machine 1 toward the player is referred to as the front side (front direction) of the gaming machine 1, and the opposite side to the front side is referred to as the rear side (rear direction, depth direction). The right side and the left side when viewed from the player are referred to as the right side (right direction) and the left side (left direction) of the gaming machine 1, respectively. The direction including the front side and the rear side is referred to as the front-rear direction or the thickness direction, and the direction including the right side and the left side is referred to as the left-right direction or the width direction. The direction orthogonal to the front-rear direction (thickness direction) and the left-right direction (width direction) is referred to as the up-down direction or the height direction.

  As shown in FIGS. 1 and 2, the appearance of the gaming machine 1 is constituted by a rectangular box-shaped housing 2. The housing 2 includes a metal cabinet G having a rectangular opening on the front side as a gaming machine main body, an upper door mechanism UD disposed at the upper front of the cabinet G, and a lower disposed at the lower front of the cabinet G. And a door mechanism DD.

  In addition, two openings G41 penetrating in the vertical direction are formed in the upper surface wall G4 of the cabinet G at a predetermined interval in the horizontal direction. A wooden plate member G42 is attached to the upper surface wall G4 so as to close each of the two openings G41.

  As shown in FIGS. 3 and 4, the upper door mechanism UD and the lower door mechanism DD are formed to correspond to the shape and size of the opening of the cabinet G. The upper door mechanism UD and the lower door mechanism DD are provided so that the upper part and the lower part of the opening in the cabinet G can be closed. The upper door mechanism UD has an upper display window UD1 at the center. The upper display window UD1 is provided with a transparent panel UD11 that transmits light. Further, an upper left speaker UD25L and an upper right speaker UD25R are provided on the upper portion of the upper door mechanism UD.

  The lower door mechanism DD is provided with a main display window DD4 formed as a rectangular opening at a substantially upper central portion. A reel unit RU attached from the inside of the cabinet G is mounted on the back side of the main display window DD4. Further, a main control board 71 is attached to the rear surface of the reel unit RU.

  The reel unit RU is mainly composed of three reels RL (left reel), RC (middle reel), and RR (right reel) each having a plurality of types of symbols drawn on the outer peripheral surface thereof. These reels RL, RC, RR are arranged in parallel (one horizontal row) so that each of them can rotate in the vertical direction at a constant speed. The reels RL, RC, RR can visually recognize the operations of the reels RL, RC, RR and the symbols drawn on the reels RL, RC, RR through the main display window DD4.

  A transparent panel made of a rectangular acrylic plate or the like is attached and fixed to the surface of the main display window DD4 so that a player or the like cannot touch the reel unit RU. Below the main display window DD4, first, second and third pedestals DD2a, DD2b and DD2c having substantially horizontal surfaces are formed. The first pedestal portion DD2a located on the right side of the main display window DD4 is provided with a medal insertion slot DD5 for inserting medals. The medal insertion port DD5 is an opening through which a medal is inserted by the player. The medal inserted from the medal slot DD5 is credited or bet on the game.

  The second pedestal portion DD2b located on the left side of the main display window DD4 is provided with a maximum BET button DD8 (also referred to as a MAXBET button) as an effective line setting means for betting a credited medal. When the maximum BET button DD8 is pressed, “3” is selected as the number of inserted medals.

  On the front side of the maximum BET button DD8, there is provided a start lever DD6 for driving the reels RL, RC, RR to rotate by the player's operation and starting the display of the symbols in the main display window DD4. The start lever DD6 is attached to be tiltable within a predetermined angle range.

  Three stop buttons for stopping the rotation of the three reels RL, RC, and RR by the player's pressing operation (stop operation) on the right side of the start lever DD6 and on the front side of the third pedestal portion DD2c. DD7L, DD7C, and DD7R are provided.

  A C / P button (not shown) is provided in the vicinity of the maximum BET button DD8. The C / P button is used to switch the credit / payout of medals acquired by the player in the game by a push button operation. When the payout is selected by switching the C / P button (non-credit state), medals are paid out from the medal payout opening DD14 (cancellation chute) provided in the coin guard plate portion on the lower side of the lower door mechanism DD. The paid-out medals are stored in the medal receiving part DD15.

  A waist panel DD18 (waist light guide plate) is disposed on the lower side of the start lever DD6 and stop buttons DD7L, DD7C, DD7R. The waist panel DD18 is configured as a makeup panel using an acrylic plate or the like. On the waist panel DD18, a name representing the model of the gaming machine 1 and various patterns are displayed.

  A lower right speaker DD25R is provided on the right side of the medal payout opening DD14. On the other hand, a lower left woofer DD25L is provided on the left side of the medal payout opening DD14. Further, an opening communicating with the outlet of the bass reflex port of the enclosure unit 20 described later is provided on the right side of the lower left woofer DD25L.

  The enclosure unit 20 (see FIG. 4) includes an enclosure (housing) 21 attached to the back side of the lower door mechanism DD, and a lower left woofer DD25L accommodated in the enclosure 21. The lower right speaker DD25R and the lower left woofer DD25L notify the player of various information related to the game using sounds such as voice and music.

  A sub display device DD19 is disposed on the left side of the main display window DD4. The sub display device DD19 displays, for example, the number of medals paid out when a winning is established and the remaining number of medals that have been credited. Normally, since the maximum number of medals credited to the gaming machine 1 is 50, a credit number of 50 or less is displayed. When the maximum number of medals is credited, the inserted medals are paid out as they are from the medal payout exit DD14. Further, the sub display device DD19 may include a touch panel on the front surface.

  An operation unit 150 is disposed above the sub display device DD19. The operation unit 150 includes a LEFT button, a RIGHT button, an UP button, a DOWN button, and an ENTER button, and accepts various operations from the player. A right chance button 157 is disposed on the right side of the main display window DD4, and a middle chance button 158 is disposed on the lower side of the main display window DD4. The right chance button 157 and the middle chance button 158 are operated by the player along with the effects related to the game.

  As shown in FIG. 4, in the cabinet G, an upper opening G101 that opens forward is formed on the upper side with the intermediate support plate G1 interposed therebetween, and is opened forward on the lower side with the intermediate support plate G1 interposed therebetween. A lower opening G102 is formed. The inside of the cabinet G is partitioned into an upper space and a lower space with the intermediate support plate G1 interposed therebetween, that is, the intermediate support plate G1 functions as a partition plate that partitions the cabinet G into an upper space and a lower space. Yes. The upper space is a space on the rear side of the upper door mechanism UD in the cabinet G and accommodates the display unit A and the like. The lower space is a space on the rear side of the lower door mechanism DD in the cabinet G, and a main control board 71 and a sub control board 72 (see FIG. 8) that control the operation of the reel unit RU and the gaming machine 1 as a whole. Etc. are accommodated. The main control board 71 constitutes a circuit (main control circuit) that controls the main flow of the game in the gaming machine 1 such as determination of the internal winning combination, rotation and stop of the reels RL, RC, RR, and determination of the presence or absence of winning. To do. The sub-control board 72 constitutes a circuit (sub-control circuit) that controls execution of effects by displaying images.

  The upper door mechanism UD can close or open the upper opening G101, and constitutes the opening / closing member of the present invention. The lower opening G102 can be closed or opened by the lower door mechanism DD.

(Display unit A)
As shown in FIG. 5, the display unit A is placed on the intermediate support plate G <b> 1 in the cabinet G so as to be replaceable. The display unit A is a so-called projection mapping apparatus having an irradiation unit B that emits irradiation light for displaying an image and a screen device C that causes an image to appear when the irradiation light from the irradiation unit B is irradiated. .

  Here, the projection mapping apparatus is for projecting an image on the surface of a three-dimensional object such as a structure or a natural object. For example, the position (projection distance or angle) of an object that is a screen described later is used. Etc.) and an image corresponding to the effect information generated based on the shape is projected, thereby enabling an advanced and powerful effect.

  As shown in FIG. 5, the display unit A has a housing A1 with an opening formed in the front. The casing A1 includes a projector cover B1 that forms the upper part of the irradiation unit B, and a projector casing C10 that includes a mirror mechanism B3. The projector housing C10 has a box shape having a bottom plate C1, a right side plate C2, a left side plate C3, and a back plate C4. The projector cover B1 is replaceably attached to the upper surface of the projector casing C10.

(Display unit A: Irradiation unit B)
As shown in FIG. 6, the irradiation unit B includes a projector device B <b> 2 that emits irradiation light downward. Since the projector apparatus B2 projects light including images and videos including still images and moving images, for convenience of explanation, the image projected from the projector apparatus B2 will be described as “image”.

(Display unit A: Irradiation unit B: Projector device B2)
As shown in FIG. 6, the projector apparatus B2 is attached to the projector cover B1, and is arranged at the rear part in the cabinet G (see FIG. 4). The projector cover B1 is attached to the right side plate C2 and the left side plate C3 of the projector housing C10, and has an upper cover 171 and a lower cover 172.

  A lens unit and an optical mechanism (not shown) are provided inside the projector cover B1.

  The lens unit is arranged so that the irradiation light emitted from the plurality of LED light sources of the optical mechanism and reflected by the DMD (Digital Micromirror Device) is emitted toward the lower mirror mechanism B3 via the lens or the like.

  A mirror mechanism B3 is disposed below the projector device B2 (in the emission direction of the irradiation light). The mirror mechanism B3 includes a mirror holder 173, an optical mirror 174 supported by the mirror holder 173, and a mirror holder bracket 175 that supports the mirror holder 173 and the optical mirror 174. The mirror holder bracket 175 is fixed to the bottom plate C1 of the projector casing C10. The light irradiated downward from the projector device B2 is reflected forward by the optical mirror 174.

(Upper door mechanism UD and screen device C)
As shown in FIG. 6, the upper door mechanism UD includes a front panel 180 and a back panel 181. A screen device C is attached to the front surface of the front panel 180. The screen device C faces the player, and an optical mirror 174 and a projector device B2 are installed behind the screen device C.

  The screen device C includes a main screen 182 and a projection sheet 183 attached in close contact with the back surface of the main screen 182. The main screen 182 is mainly made of a resin such as a translucent acrylic plate or a glass plate, and has a uniform thickness over the entire surface.

  The projection sheet 183 is a transmissive screen that is displayed by projecting an image from the rear. The projection surface 183 receives a light incident on the back surface on which light projected from the projector device B2 is incident, and light incident on the light incident surface. And a front display surface on which an image is projected by being transmitted.

  The projection sheet 183 is formed to have a uniform thickness over the entire surface using, for example, a light-transmitting glass plate, acrylic plate, or resin film as a main material, and is milky white, translucent when not projected, or Presents a gray color.

  When the light projected from the projector device B2 is incident on the incident surface (rear surface) of the projection sheet 183, an image (game surface) is displayed on the display surface (front surface) of the projection sheet 183. A still image or an image including a moving image) is displayed.

  Since the main screen 182 is formed transparently and there is no structure that blocks the player's field of view in front of the main screen 182, when an image is displayed on the projection sheet 183, the image is displayed from the player. Visible.

  FIG. 7 is a diagram showing the relationship between the irradiation range of the light projected from the projector device B2 and the screen device C on the upper door mechanism UD side. In FIG. 7, the display surface of the screen device C on the upper door mechanism UD side is shaded. The irradiation range of the light projected from the projector device B2 is wider than that of the screen device C.

  Specifically, the light projected from the projector device B2 is incident on the entire surface of the screen device C (region indicated by hatching) and passes through the peripheral region of the screen device C on the upper door mechanism UD side. In FIG. 7, the peripheral area of the screen device C is indicated by hatching in the irradiation range of the light projected from the projector device B2.

[Electric configuration of gaming machine 1]
Hereinafter, the electrical configuration of the gaming machine 1 will be described with reference to FIGS.

  As shown in FIG. 8, the gaming machine 1 includes a main control board 71 disposed in the reel unit RU and a sub control board 72 disposed in the cabinet G. The main control board 71 controls the gaming operation of the gaming machine 1. The sub control board 72 controls the effect.

  The main control board 71 is connected to the rotary relay board 53, the door relay board 54, and the sub relay board 69 by a harness or the like. On the rotating relay board 53, a first rotating drum unit 51L, a second rotating drum unit 51C, a third rotating drum unit 51R, an external terminal plate 56, a hopper device HP, and an auxiliary storage 57 are harnesses. Connected by such as.

  The rotating relay board 53 is located between the main control board 71 and the first rotating cylinder unit 51L, the second rotating cylinder unit 51C, the third rotating cylinder unit 51R, the external terminal board 56, the hopper device HP, and the auxiliary storage 57. Relays the input and output signals.

  As described above, the first cylinder unit 51L, the second cylinder unit 51C, the third cylinder unit 51R, the external terminal plate 56, the hopper device HP, and the auxiliary storage 57 are mainly controlled via the cylinder relay board 53. It is connected to the substrate 71.

  The first drum unit 51L, the second drum unit 51C, and the third drum unit 51R are respectively disposed inside the reel bodies of the reels RL, RC, and RR. The first drum unit 51L, the second drum unit 51C, and the third drum unit 51R each have a two-phase excitation stepping motor.

  Each stepping motor changes its design by rotating each reel RL, RC, RR under the control of the main control board 71 based on the establishment of a predetermined start condition, that is, the start lever DD6 being operated (start operation). .

  The external terminal board 56 is attached to the cabinet G and is provided for outputting signals such as a medal insertion signal, a medal payout signal, external signals 1 to 4 and a security signal to the outside of the gaming machine 1.

  The hopper device HP stores medals. The hopper device HP pays out medals under the control of the main control board 71. The hopper device HP outputs information indicating the number of medals paid out to the main control board 71.

  In the auxiliary storage 57, medals overflowing from the hopper device HP are stored. The auxiliary storage 57 is provided with an auxiliary storage switch (not shown) that passes through the auxiliary storage 57. This auxiliary storage switch detects whether or not the auxiliary storage 57 is full of medals, and outputs the detection result to the main control board 71.

  The door relay board 54 has a medal selector 46, a door opening / closing switch 61, a closing / settlement switch 62, a start switch 64, a stop switch board 65, a game state, which are connected to the medal slot DD5 and arranged on the back side of the lower door mechanism DD. The display board 66 and the error release switch 67 are connected by a harness or the like.

  As described above, the medal selector 46, the door opening / closing switch 61, the insertion / settlement switch 62, the start switch 64, the stop switch board 65, the game state display board 66, and the error release switch 67 are connected to the main control board via the door relay board 54. 71 is connected.

  The medal selector 46 detects that a medal has passed through the inside, and outputs the detection result to the main control board 71. Further, the medal selector 46 discharges the medal inserted into the medal insertion slot DD5 to the medal payout outlet DD14 under the control of the main control board 71. The door opening / closing switch 61 outputs a security signal for notifying the opening / closing of the upper door mechanism UD and the lower door mechanism DD to the outside of the gaming machine 1.

  The insertion / settlement switch 62 detects that the MAX bet button DD8 and the 1-bet button are pressed, and outputs a detection result to the main control board 71, and detects that the settlement button is pressed. And a settlement switch for outputting the detection result to the main control board 71. The start switch 64 detects that the start lever DD6 has been operated (start operation), and outputs the detection result to the main control board 71.

  The stop switch board 65 is provided with stop switches (not shown) corresponding to the three reels RL, RC, and RR. The stop switch detects a stop operation for stopping the rotation of the reels RL, RC, RR, that is, detects that each stop button DD7L, DD7C, DD7R is pressed, and outputs the detection result to the main control board 71. .

  The game state display board 66 displays information relating to the game such as the number of medals bet, the number of paid-out medals when a winning is established, the remaining number of medals credited, the re-game operating state, the game waiting state, and the like (not shown). To display.

  The error release switch 67 detects an operation of an error release button (not shown) for canceling error notification, changing the setting of the gaming machine 1 and confirming the setting of the gaming machine 1, and the detection result Is output to the main control board 71.

  A sub-relay board 69 is connected to the sub-control board 72 by BtoB (Board to Board). The sub control board 72 is connected to the sub control board 72 from the main control board 71 via the sub relay board 69 by a one-way asynchronous (also referred to as “asynchronous”) serial communication.

  A unidirectional (one) optical fiber is interposed between the main control board 71 and the sub-relay board 69. By this optical fiber, a signal is transmitted in one direction from the main control board 71 to the sub-relay board 69.

  The sub relay board 69 relays the wiring connecting the sub control board 72 and the main control board 71. The sub relay board 69 relays the sub control board 72 and a plurality of boards arranged around the sub control board 72 and wirings connecting the input / output devices.

  Specifically, the upper relay board 81, the lower peripheral connection board 82, the lower right speaker DD25R, and the lower left woofer DD25L are connected to the sub relay board 69 by a harness or the like. When the sub display device DD19 includes a touch panel on the front surface, the touch panel is connected to the sub relay board 69 by a harness or the like.

  Thus, the upper relay board 81, the lower peripheral connection board 82, the panel relay board 83, the lower right speaker DD25R, the lower left woofer DD25L, and the sub display unit 84 are connected via the sub relay board 69. It is connected to the control board 72.

  The upper relay board 81 is disposed in the upper door mechanism UD. A top center LED substrate 90, an upper left speaker UD25L, an upper right speaker UD25R, a side right LED substrate 91, and a side left LED substrate 92 are connected to the upper relay substrate 81 by a harness or the like.

  As described above, the top center LED substrate 90, the upper left speaker UD25L, the upper right speaker UD25R, the side right LED substrate 91, and the side left LED substrate 92 are disposed via the upper relay substrate 81 and the sub relay substrate 69. It is connected to the sub control board 72. The side right LED substrate 91 and the side left LED substrate 92 are disposed at the right end and the left end of the upper door mechanism UD, respectively.

  A top side right LED substrate 93 and a top side left LED substrate 94 are connected to the top center LED substrate 90 by a harness or the like.

  Thus, the top side right LED board 93 and the top side left LED board 94 are connected to the sub control board 72 via the top center LED board 90, the upper relay board 81, and the sub relay board 69. The top side right LED substrate 93 and the top side left LED substrate 94 are respectively disposed in the vicinity of the upper left speaker UD25L and the upper right speaker UD25R of the upper door mechanism UD.

  The lower peripheral connection board 82 is disposed in the lower door mechanism DD. The lower peripheral connection board 82 includes a lower left LED board 101, a lower right LED board 102, a middle right LED board 103, a navigation LED board 104, a rotary illumination board 105, and a stop button LED board 106. / Settlement unit 107, right chance button unit 108, middle chance button unit 109, first cylinder back light 110, second cylinder back light 111, and third cylinder back light 112 are connected by a harness or the like. It is connected.

  In this way, the lower left LED board 101, the lower right LED board 102, the middle right LED board 103, the navigation LED board 104, the rotary illumination board 105, the stop button LED board 106, and the input / payment unit 107 The right chance button unit 108, the middle chance button unit 109, the first trunk backlight 110, the second trunk backlight 111, and the third trunk backlight 112, the lower peripheral connection board 82 and It is connected to the sub control board 72 via the sub relay board 69.

  The lower left LED substrate 101 is provided at the left end of the lower door mechanism DD. The lower right LED board 102 is provided at the right end of the lower door mechanism DD. The middle right LED substrate 103 is provided above the lower door mechanism DD in the lower door mechanism DD.

  The navigation LED board 104 has a plurality of LEDs corresponding to the reels RL, RC, RR, and is provided in the vicinity of the main display window DD4. For example, the sub control board 72 notifies the operation order of the stop buttons DD7L, DD7C, DD7R by causing each LED of the navigation LED board 104 to emit light.

  The rotating illumination board 105 is provided in the reel unit RU so as to irradiate the reels RL, RC, RR from the outside under the control of the sub-control board 72. The stop button LED board 106 includes LEDs that irradiate the stop buttons DD7L, DD7C, and DD7R with light from the back surface under the control of the sub-control board 72.

  The insertion / settlement unit 107 includes a MAX bet button DD8, a 1-bet button, a settlement button, and a placement / settlement switch 62. Under control of the sub-control board 72, an LED for irradiating the MAX bet button DD8 with light from the back side Have.

  The right chance button unit 108 includes a right chance button 157, and includes an LED that irradiates the right chance button 157 with light from the back surface under the control of the sub-control board 72.

  The middle chance button unit 109 is configured to include a middle chance button 158, and has an LED that irradiates the middle chance button 158 with light from the back surface under the control of the sub-control board 72.

  The first cylinder backlight 110, the second cylinder backlight 111, and the third cylinder backlight 112 irradiate the reels RL, RC, and RR with light from the inside under the control of the sub-control board 72, respectively. Thus, it is provided in the reel unit RU.

  In addition to the sub relay board 69, a sub ROM board 76 and a graphic board 73 are connected to the sub control board 72. The sub-ROM board 76 stores a control program executed by the sub-control board 72, production images (images), sound, light (LED group 75), and communication data.

  The image relay board 77 converts the image signals transmitted from the sub control board 72 to the projector device B2 as the main display device and the sub display device DD19 according to the signal standards of each display device and relays them.

  An image signal is transmitted from the image relay board 77 to the projector device B2 by differential transmission conforming to LVDS (Low voltage differential signaling). Furthermore, an optical fiber in one direction (one) is interposed between the image relay substrate 77 and the projector device B2.

  That is, the image relay board 77 converts a differential signal representing an image into an optical signal and transmits the optical signal to the projector apparatus B2, and the projector apparatus B2 converts the received optical signal into a differential signal and converts the converted differential signal. The image represented by the signal is projected.

  In this embodiment, an example in which the projector device B2 is applied as a main display device will be described, but another display device such as a liquid crystal display device or an organic EL display device may be applied as the main display device.

  When another display device such as a liquid crystal display device or an organic EL display device is applied as the main display device, the image relay substrate 77 is configured to transmit an image signal by a method according to the standard of the main display device. The Further, it is not always necessary to interpose an optical fiber between the image relay board 77 and the main display device.

  The sub relay board 69 and the sub control board 72, the sub control board 72 and the sub ROM board 76, the sub control board 72 and the graphic board 73, and the graphic board 73 and the image relay board 77 are connected by a board-to-board connector, respectively. ing. The sub-control board 72 acquires the control program and production image, sound, light, and communication data from the sub-ROM board 76 in conformity with serial ATA (Advanced Technology Attachment).

  The gaming machine 1 has a power supply unit 44. The power supply unit 44 is composed of a stabilized power supply circuit that generates a DC voltage of 12 V and a DC voltage of 24 V from a commercial power supply (AC 100 V) supplied when a power switch (not shown) is turned on.

  A DC voltage of 12 V is supplied to the rotating relay substrate 53 and the sub relay substrate 69. The DC voltage of 24V is supplied to an amplifier (not shown) that drives the lower left woofer DD25L. The other board is supplied with the DC voltage of 12V supplied to the sub-relay board 69. For this reason, in FIG. 8, the illustration of the power supply lines of other substrates is omitted.

[LED signal line]
Hereinafter, LED signal lines for controlling the LEDs provided in the gaming machine 1 will be described.

  As shown in FIG. 9, the sub control board 72 has a sub CPU 120 as a control unit. The sub relay board 69 has a driver IC 121 in which 3FH is set as a driver address. The upper relay substrate 81 has a driver IC 122 in which 10H is set as a driver address.

  The top center LED substrate 90 has a driver IC 123 in which 11H is set as a driver address. The top side left LED board 94 has a driver IC 124 in which 12H is set as a driver address.

  The top side right LED board 93 has a driver IC 125 in which 13H is set as a driver address. The side left LED board 92 has a driver IC 126 in which 14H is set as a driver address.

  The lower peripheral connection board 82 includes a driver IC 127 in which 01H is set as a driver address, a driver IC 128 in which 02H is set as a driver address, and a driver IC 129 in which 03H is set as a driver address.

  The lower left LED substrate 101 has a driver IC 130 in which 04H is set as a driver address. The lower right LED substrate 102 includes a driver IC 131 in which 05H is set as a driver address.

  The sub CPU 120 outputs drive data for driving each LED to the driver IC 121 in a three-wire serial manner. In the present embodiment, the sub CPU 120 outputs drive data to the driver IC 121 by an SPI (Serial Peripheral Interface) using the sub CPU 120 as a master.

  That is, the sub CPU 120 and the driver IC 121 include a data line for transmitting drive data, a clock line for transmitting a clock for synchronizing drive data, and a chip select line for selecting a driver that transmits data. Connected by.

  The driver IC 121 relays drive data to the driver IC 122 and the driver IC 127 as differential signals. In the present embodiment, the driver IC 122 relays drive data using a two-wire serial LVDS (Low Voltage Differential Signaling) that is one type of differential signal.

  Note that the driver IC 122 may relay drive data using V-by-One, DisplayPort, or the like in addition to the two-wire serial LVDS as long as it is a differential signal.

  That is, the driver IC 121, the driver IC 122, and the driver IC 127 include a data positive and data negative pair line for transmitting drive data, and a clock positive and clock negative pair line for transmitting a clock for synchronizing drive data. And connected by.

  The driver IC 122 relays drive data to the driver IC 123 and the driver IC 126 using a 2-wire serial LVDS. Further, the driver IC 122 outputs a drive signal based on the drive data from the output terminals OUT00 to OUT23 (not shown) to the side right LED substrate 91.

  The driver IC 123 relays drive data to the driver IC 124 and the driver IC 125 using a 2-wire serial LVDS. The driver IC 127 relays drive data to the driver IC 128 and the driver IC 129 using a 2-wire serial LVDS. Further, the driver IC 127 outputs a drive signal based on the drive data to the stop button LED board 106 and the input / settlement unit 107 from the output terminals OUT00 to OUT23 (not shown).

  The driver IC 128 relays the drive data to the driver IC 130 using a 2-wire serial LVDS. The driver IC 128 sends drive signals based on drive data from output terminals OUT00 to OUT23 (not shown) to the navigation LED board 104, the right chance button unit 108, the middle chance button unit 109, and the middle right LED board 103. Output.

  The driver IC 129 relays drive data to the driver IC 131 using a 2-wire serial LVDS. In addition, the driver IC 129 sends drive signals based on drive data from output terminals OUT00 to OUT23 (not shown) to the first cylinder backlight 110, the second cylinder backlight 111, the third cylinder backlight 112, Output to the rotary illumination board 105.

<Sub-relay board>
As shown in FIG. 10, the driver IC 121 provided on the sub-relay board 69 has address setting terminals A0 to A5 that can set driver addresses, input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn, and drive data to the input terminals. It has an input setting terminal MODE that can set whether to input using 2-wire serial LVDS or input using 3-wire serial (in this embodiment, SPI).

  The driver IC 121 constitutes a drive circuit and has output terminals OUT00 to OUT23 that output drive signals based on drive data of light emitters such as LEDs. The output terminals OUT00 to OUT23 of the driver IC 121 are open drain outputs in order to ensure expandability. The driver IC 121 has relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn.

  In the driver IC 121, 3FH is set as the driver address by the address setting terminals A0 to A5. The driver IC 121 in which 3FH is set as the driver address functions as a master driver. Therefore, hereinafter, the driver IC 121 is also referred to as a “master driver”.

  The driver address is set by connecting each of the address setting terminals A0 to A5 of the driver IC 121 to the driver IC 130 to the power supply line (VCC) or the ground line (GND). For example, in the case of a driver IC 126 described later, the driver address is set to 14H. In this case, the address setting terminal A0 = ground line, the address setting terminal A1 = ground line, the address setting terminal A2 = power supply line, address setting. The terminal A3 is connected to the ground line, the address setting terminal A4 is connected to the power supply line, and the address setting terminal A5 is connected to the ground line.

  When any of 01H to 3EH is set as the driver address, the driver IC 121 is designed to function as a slave driver. Therefore, hereinafter, the drivers that function as slave drivers (in the present embodiment, driver IC 122 to driver IC 131) are also referred to as “slave drivers”.

  In this embodiment, when the driver address is set to 3FH, the master driver is used. However, for example, the driver address is set to 00H as the master driver, and the driver addresses 01H to 3FH are set as slave drivers. Good. The master driver may be set to any one of 01H to 3EH whose driver address is other than 00H and 3FH, and a slave driver other than the address set to the master driver may be used.

  Since drive data is input from the sub CPU 120 to the driver IC 121 in a three-wire serial manner, the input setting terminal MODE is connected to the power supply line and set to the high level. Note that when drive data is input to the driver IC 121 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the Low level.

  When the input setting terminal MODE is High, the input terminal SCL_INp is an SPI clock (SCK) input terminal, the input terminal SCL_INn is an SPI chip select (CS) input terminal, and the input terminal SDA_INp is an SPI data (SI) input terminal. Thus, the input terminal SDA_INn is an unused terminal and is therefore connected to the ground line and fixed at the low level.

  When the input setting terminal MODE is Low, the input terminal SCL_INp is a clock positive input terminal, the input terminal SCL_INn is a clock negative input terminal, the input terminal SDA_INp is a data positive input terminal, and the input terminal SDA_INn is Data negative input pin.

  The driver IC 121 constitutes an output circuit, and outputs drive data input by the 3-wire serial or 2-wire serial LVDS from the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, SDA_OUTn by the 2-wire serial LVDS.

  Specifically, the driver IC 121 outputs a positive clock signal for synchronization from the relay output terminal SCL_OUTp, outputs a negative clock signal for synchronization from the relay output terminal SCL_OUTp, and represents positive drive data from the output terminal SDA_OUTp. A signal is output, and a signal representing negative drive data is output from the output terminal SDA_OUTn.

  As described above, the driver IC 121 converts the drive data input in the 3-wire serial to the 2-wire serial LVDS format and outputs the data from the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, SDA_OUTn, and the 2-wire serial. It has a repeater function that outputs drive data input by LVDS from relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, SDA_OUTn in two-line serial, and can drive data to other drivers by two-wire serial LVDS . The driver IC 121 outputs drive data by one-way communication in order to reduce the processing load required for returning a response signal such as ACK to the sub CPU 120 and the relay destination driver.

  The driver IC 121 includes an internal setting register (address 00H) and registers (addresses 01H to 18H) corresponding to the output terminals OUT00 to OUT23. Data including a driver address (first byte), a register address (second byte), and a register value (third and subsequent bytes) is serially input to the driver IC 121.

  When the driver address set by the address setting terminals A0 to A5 matches the driver address of the input data, the driver IC 121 sequentially sets register values from the register indicated by the register address.

  The driver IC 121 constitutes PWM control means, and executes PWM (Pulse Width Modulation) control, so that the drive signal controlled based on the duty ratio of the register value set in each register is output to each output terminal OUT00-OUT23. Output from.

  In the present embodiment, when the register value is FFH (255), a drive signal with a duty ratio of 100% is output, the luminance of the LED to be driven is the highest, and when the register value is 0, A drive signal having a duty ratio of 0% is output (output of the drive signal is stopped), and the LED to be driven is in a non-light emitting (light-off) state.

  When the output terminals OUT00 to OUT23 are started to be driven simultaneously, switching noise generated from each output terminal is generated at the same time, which amplifies the noise and causes the LED connected to the output terminal to malfunction.

  For this reason, the driver IC 121 constitutes a delay means, and can delay the drive signals output from the output terminals OUT00 to OUT23. The driver IC 121 can start outputting drive signals from the output terminals OUT00 to OUT23 by sequentially changing the phases at the output terminals OUT00 to OUT23 in order to reduce switching noise.

  Further, the driver IC 121 constitutes a mode setting means, which is either the first mode in which the output terminals OUT00 to OUT23 are grouped into a group for each predetermined number of terminals or the second mode in which the output terminals OUT00 to OUT23 are not grouped. The mode can be set.

  In the present embodiment, the driver IC 121 enters the first mode when a predetermined bit (8th bit, BIT7) of the internal setting register (address 00H) is 1, and when the bit is 0 The second mode is entered.

  As shown in FIG. 11A, in the second mode, the driver IC 121 starts outputting drive signals from the output terminals OUT00 to OUT23 at fixed delay Td intervals. In the present embodiment, the fixed delay Td is set to a 1-byte transmission time of a serial signal (the above-described 3-wire serial or 2-wire serial LVDS). For example, assuming that the serial signal clock is 10 MHz, the fixed delay Td is 0.8 μs.

  In this way, by making the register reading interval (drive signal output interval) coincide with the register writing interval (serial signal reception interval), the driver IC 121 allows the register reading period and the writing period to be changed. Prevent overlapping.

  In the first mode, the driver IC 121 according to the present embodiment groups the output terminals OUT00 to OUT23 into groups for every three terminals. That is, the driver IC 121 includes output terminals OUT00 to OUT02, output terminals OUT03 to OUT05, output terminals OUT06 to OUT08, output terminals OUT09 to OUT11, output terminals OUT12 to OUT14, output terminals OUT15 to OUT17, output terminals OUT18 to OUT20, and output terminals. OUT21 to OUT23 are grouped into 8 groups of groups 0 to 7 for each of a predetermined number of 3 terminals.

  With this grouping, for example, when an LED is connected to an output terminal that constitutes each group, power is supplied to the LED from a plurality of output terminals. Can be used (see, for example, FIG. 18, FIG. 19, etc.).

  As shown in FIG. 11B, in the first mode, the driver IC 121 starts outputting drive signals from the group 0 to the group 7 at a fixed delay Tgd interval. The fixed delay Tgd is set according to the number of terminals constituting the group.

  Therefore, the fixed delay Tgd in the present embodiment is set to the transmission time of 3 bytes of the serial signal. For example, assuming that the serial signal clock is 10 MHz, the fixed delay is 2.4 μs. As described above, as in the second mode, the driver IC 121 prevents the reading period and writing period of each register from overlapping.

  In FIG. 10, the driver IC 121 according to the present embodiment sets the state of all output terminals OUT00 to OUT23 when a predetermined bit (seventh bit, BIT6) of the internal setting register (address 00H) is 0. When the bit is set to 1 in a disabled state, all the output terminals OUT00 to OUT23 are enabled.

  That is, the driver IC 121 has a duty ratio of 0% from the output terminals OUT00 to OUT23 when a predetermined bit (seventh bit, BIT6) of the internal setting register (address 00H) is set to 0. A drive signal is output (output of the drive signal is stopped). Therefore, when LEDs are connected to the output terminals OUT00 to OUT23, all LEDs are in a non-light emitting (light-off) state.

  When the driver IC 121 that functions as a master driver detects a pulse (active low pulse) of a certain time (200 ns in this embodiment) or more at the input terminal SCL_INn, the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, Signals that initialize the driver IC 122 and the driver IC 127 directly connected to the SDA_OUTn and each driver connected via the driver IC 122 or the driver IC 127 are output from the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn.

  Therefore, the sub CPU 120 can initialize all the other driver ICs 122 to 131 (see FIG. 9) by outputting an active low pulse of 200 ns or more to the input terminal SCL_INn of the driver IC 121.

  In this embodiment, no LED is connected to the output terminals OUT00 to OUT23 of the driver IC 121. However, as described above, the output terminals OUT00 to OUT23 are open so that more current can flow than the constant current sink output. Since it is a drain output, for example, as shown in FIG. 12, a device driven by a relatively large electric power such as a patrol lamp 5 may be connected.

<Lower peripheral connection board and peripheral board>
In FIG. 13, as described above, the lower peripheral connection board 82 includes a driver IC 127 in which 01H is set as the driver address, a driver IC 128 in which 02H is set as the driver address, and a driver IC 129 in which 03H is set as the driver address. And have.

  Each driver IC 127, driver IC 128, and driver IC 129 are identical to the driver IC 121 described with reference to FIG. 10 except that the output terminals OUT00 to OUT23 are constant current sink outputs in order to suppress current consumption. Since it is configured, detailed description is omitted.

  In the driver IC 127, 01H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 127 functions as a slave driver. Since drive data is input to the driver IC 127 from the driver IC 121 of the sub-relay board 69 by the 2-wire serial LVDS, the input setting terminal MODE is set to Low (ground level).

  The input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn of the driver IC 127 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn of the driver IC 121 of the sub relay board 69, respectively.

  The driver IC 127 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped. The output terminals OUT00 to OUT02 of the driver IC 127 are connected to the input / settlement unit 107. The charging / settlement unit 107 is provided with an LED module 107a for irradiating the MAX bet button DD8 with light from the back surface. The LED module is an electronic component in which one or more LEDs are modularized, and is configured by a chip or a package.

  The LED module 107a is a full-color LED having a red (R) LED, a green (G) LED, and a blue (B) LED, and a drive voltage VCC (+5 V) supplied from the sub-relay board 69 is supplied to each LED. Has been. Each LED emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT00 to OUT02 of the driver IC 127.

  The output terminals OUT03 to OUT11 of the driver IC 127 are connected to the stop button LED board 106. The stop button LED substrate 106 is provided with LED modules 106a, 106b, and 106c that irradiate light from the back surface to the stop buttons DD7L, DD7C, and DD7R, respectively.

  The LED module 106a has a red (R) LED, a green (G) LED, and a blue (B) LED, and a drive voltage VCC (+5 V) supplied from the sub-relay board 69 is supplied to each LED. . Each LED emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT03 to OUT05 of the driver IC 127.

  The LED module 106b includes a red (R) LED, a green (G) LED, and a blue (B) LED, and the drive voltage VCC (+5 V) supplied from the sub relay board 69 is supplied to each LED. . Each LED emits light or goes off according to the duty ratio of each drive signal output from the output terminals OUT06 to OUT08 of the driver IC 127.

  The LED module 106c has a red (R) LED, a green (G) LED, and a blue (B) LED, and the drive voltage VCC (+5 V) supplied from the sub relay board 69 is supplied to each LED. . Each LED emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT09 to OUT11 of the driver IC 127.

  In the driver IC 128, 02H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 128 functions as a slave driver. Since drive data is input to the driver IC 128 from the driver IC 127 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn of the driver IC 128 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn of the driver IC 127, respectively.

  The driver IC 128 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped. The output terminals OUT00 to OUT08 of the driver IC 128 are connected to the navigation LED board 104.

  The navigation LED board 104 is provided with LED modules 104a and 104b corresponding to the reel RL, LED modules 104c and 104d corresponding to the reel RC, and LED modules 104e and 104f corresponding to the reel RR.

  The LED module 104a and the LED module 104b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 104a has an anode connected to the cathode of each LED of the LED module 104b, and a cathode connected to each output terminal OUT00 to OUT02 of the driver IC 128.

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 104b. Each LED of the LED module 104a and each LED of the LED module 104b emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT00 to OUT02 of the driver IC 128.

  The LED module 104c and the LED module 104d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 104c has an anode connected to the cathode of each LED of the LED module 104d, and a cathode connected to each output terminal OUT03 to OUT05 of the driver IC 128.

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 104d. Each LED of the LED module 104c and each LED of the LED module 104d emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT03 to OUT05 of the driver IC 128.

  The LED module 104e and the LED module 104f are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 104e has an anode connected to the cathode of each LED of the LED module 104f, and a cathode connected to each output terminal OUT06 to OUT08 of the driver IC 128.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 104f. Each LED of the LED module 104e and each LED of the LED module 104f emit light or extinguish according to the duty ratio of each drive signal output from the output terminals OUT06 to OUT08 of the driver IC 128.

  Output terminals OUT09 to OUT11 of the driver IC 128 are connected to the middle chance button unit 109. The middle chance button unit 109 is provided with LED modules 109a and 109b that irradiate the middle chance button 158 with light from the back surface.

  The LED module 109a and the LED module 109b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 109a has an anode connected to the cathode of each LED of the LED module 109b, and a cathode connected to each output terminal OUT09 to OUT11 of the driver IC 128.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 109b. Each LED of the LED module 109a and each LED of the LED module 109b emits light or goes off according to the duty ratio of each drive signal output from the output terminals OUT09 to OUT11 of the driver IC 128.

  Output terminals OUT12 to OUT14 of the driver IC 128 are connected to the right chance button unit 108. The right chance button unit 108 is provided with LED modules 108a and 108b for irradiating the right chance button 157 with light from the back surface.

  The LED module 108a and the LED module 108b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 108a has an anode connected to the cathode of each LED of the LED module 108b, and a cathode connected to each output terminal OUT12 to OUT14 of the driver IC 128.

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 108b. Each LED of the LED module 108a and each LED of the LED module 108b emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT12 to OUT14 of the driver IC 128.

  Output terminals OUT15 to OUT17 of the driver IC 128 are connected to the middle right LED substrate 103. The middle right LED substrate 103 is provided with LED modules 103a and 103b.

  The LED module 103a and the LED module 103b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 103a has an anode connected to the cathode of each LED of the LED module 103b, and a cathode connected to each output terminal OUT15 to OUT17 of the driver IC 128.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 103b. Each LED of the LED module 103a and each LED of the LED module 103b emits light or goes off according to the duty ratio of each drive signal output from the output terminals OUT15 to OUT17 of the driver IC 128.

  In the driver IC 129, 03H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 129 functions as a slave driver. Since drive data is input to the driver IC 129 from the driver IC 127 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn of the driver IC 129 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn of the driver IC 127, respectively.

  The driver IC 129 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped. Output terminals OUT00 to OUT02 of the driver IC 129 are connected to the first trunk backlight 110.

  The first trunk backlight 110 includes LED modules 110a and 110b that emit light from the inside to the upper stage of the reel RL, 110c and 110d that emit light from the inside to the middle stage of the reel RL, and an inner side to the lower stage of the reel RL. 110e and 110f for irradiating light are provided.

  The LED module 110a and the LED module 110b have transparent light LEDs. The LED of the LED module 110a has an anode connected to the cathode of the LED of the LED module 110b and a cathode connected to the output terminal OUT00 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 110b. The LED of the LED module 110a and the LED of the LED module 110b emit or turn off according to the duty ratio of the drive signal output from the output terminal OUT00 of the driver IC 129.

  The LED module 110c and the LED module 110d have transparent light LEDs. The LED of the LED module 110c has an anode connected to the cathode of the LED of the LED module 110d and a cathode connected to the output terminal OUT01 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 110d. The LED of the LED module 110c and the LED of the LED module 110d emit or extinguish according to the duty ratio of the drive signal output from the output terminal OUT01 of the driver IC 129.

  The LED module 110e and the LED module 110f have transparent light LEDs. The LED of the LED module 110e has an anode connected to the cathode of the LED of the LED module 110f, and a cathode connected to the output terminal OUT02 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 110f. The LED of the LED module 110e and the LED of the LED module 110f emit or turn off according to the duty ratio of the drive signal output from the output terminal OUT02 of the driver IC 129.

  Output terminals OUT03 to OUT05 of the driver IC 129 are connected to the second trunk backlight 111. The second cylinder backlight 111 includes LED modules 111a and 111b that emit light from the inside to the upper stage of the reel RC, 111c and 111d that emit light from the inside to the middle stage of the reel RC, and an inner side to the lower stage of the reel RC. 111e and 111f which irradiate light from are provided.

  The LED module 111a and the LED module 111b have transparent light LEDs. The LED of the LED module 111a has an anode connected to the cathode of the LED of the LED module 111b and a cathode connected to the output terminal OUT03 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 111b. The LEDs of the LED module 111a and the LEDs of the LED module 111b emit or turn off according to the duty ratio of the drive signal output from the output terminal OUT03 of the driver IC 129.

  The LED module 111c and the LED module 111d have transparent light LEDs. The LED of the LED module 111c has an anode connected to the cathode of the LED of the LED module 111d and a cathode connected to the output terminal OUT04 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 111d. The LED of the LED module 111c and the LED of the LED module 111d emit or turn off according to the duty ratio of the drive signal output from the output terminal OUT04 of the driver IC 129.

  The LED module 111e and the LED module 111f include transparent light LEDs. The LED of the LED module 111e has an anode connected to the cathode of the LED of the LED module 111f and a cathode connected to the output terminal OUT05 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 111f. The LED of the LED module 111e and the LED of the LED module 111f emit or turn off according to the duty ratio of the drive signal output from the output terminal OUT05 of the driver IC 129.

  Output terminals OUT06 to OUT08 of the driver IC 129 are connected to the third cylinder backlight 112. The third cylinder backlight 112 includes LED modules 112a and 112b that emit light from the inside to the upper stage of the reel RR, 112c and 112d that emit light from the inside to the middle stage of the reel RR, and an inner part to the lower stage of the reel RR. 112e and 112f for irradiating light are provided.

  The LED module 112a and the LED module 112b have transparent light LEDs. The LED of the LED module 112a has an anode connected to the cathode of the LED of the LED module 112b and a cathode connected to the output terminal OUT06 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of the LED of the LED module 112b. The LED of the LED module 112a and the LED of the LED module 112b emit light or turn off according to the duty ratio of the drive signal output from the output terminal OUT06 of the driver IC 129.

  The LED module 112c and the LED module 112d have transparent light LEDs. The LED of the LED module 112c has an anode connected to the cathode of the LED of the LED module 112d and a cathode connected to the output terminal OUT07 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 112d. The LED of the LED module 112c and the LED of the LED module 112d emit light or turn off according to the duty ratio of the drive signal output from the output terminal OUT07 of the driver IC 129.

  The LED module 112e and the LED module 112f include transparent light LEDs. The LED of the LED module 112e has an anode connected to the cathode of the LED of the LED module 112f, and a cathode connected to the output terminal OUT08 of the driver IC 129.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 112f. The LED of the LED module 112e and the LED of the LED module 112f emit light or turn off according to the duty ratio of the drive signal output from the output terminal OUT08 of the driver IC 129.

  Output terminals OUT09 to OUT11 of the driver IC 129 are connected to the rotating cylinder illumination board 105. The rotating illumination board 105 is irradiated with light from the outside by the LED modules 105a, 105b, and 105c that irradiate light to the reel RL, 105d, 105e, and 105f that irradiates light from the outside to the reel RC, and light from the outside to the reel RR. 105g, 105h, and 105j are provided.

  The LED module 105a and the LED module 105b include transparent light LEDs. The LED module 105c includes a transparent light LED. The LED of the LED module 105a has an anode connected to the cathode of the LED of the LED module 105b and a cathode connected to the output terminal OUT09 of the driver IC 129. The LED of the LED module 105b has an anode connected to the cathode of the LED of the LED module 105c.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 105c. The LED of the LED module 105a, the LED of the LED module 105b, and the LED of the LED module 105c emit light or extinguish according to the duty ratio of the drive signal output from the output terminal OUT09 of the driver IC 129.

  The LED module 105d and the LED module 105e have transparent light LEDs. The LED module 105f includes a transparent light LED. The LED of the LED module 105d has an anode connected to the cathode of the LED of the LED module 105e and a cathode connected to the output terminal OUT10 of the driver IC 129. The LED of the LED module 105e has an anode connected to the cathode of the LED of the LED module 105f.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 105f. The LED of the LED module 105d, the LED of the LED module 105e, and the LED of the LED module 105f emit light or extinguish according to the duty ratio of the drive signal output from the output terminal OUT10 of the driver IC 129.

  The LED module 105g and the LED module 105h include a transparent light LED. The LED module 105j includes a transparent light LED. The LED of the LED module 105g has an anode connected to the cathode of the LED of the LED module 105h and a cathode connected to the output terminal OUT11 of the driver IC 129. The LED of the LED module 105h has an anode connected to the cathode of the LED of the LED module 105j.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of the LED of the LED module 105j. The LED of the LED module 105g, the LED of the LED module 105h, and the LED of the LED module 105j emit light or extinguish according to the duty ratio of the drive signal output from the output terminal OUT11 of the driver IC 129.

<Lower left LED board>
In FIG. 14, the lower left LED substrate 101 has the driver IC 130 in which 04H is set as the driver address, as described above. The driver IC 130 has the same configuration as the driver IC 127 described with reference to FIG.

  In the driver IC 130, 04H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 130 functions as a slave driver. Since drive data is input to the driver IC 130 from the driver IC 128 of the lower peripheral connection board 82 by the two-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, SDA_INn of the driver IC 130 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, SDA_OUTn of the driver IC 128 of the lower peripheral connection board 82, respectively.

  The driver IC 130 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped. The lower left LED substrate 101 is provided with LED modules 130a, 130b, 130c, 130d, 130e, 130f, 130g, 130h, 130i, 130j, 130k, and 130m.

  The LED module 130a and the LED module 130b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 130a has an anode connected to the cathode of each LED of the LED module 130b, and a cathode connected to each output terminal OUT00 to OUT02 of the driver IC 130.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 130b. Each LED of the LED module 130a and each LED of the LED module 130b emit light or extinguish according to the duty ratio of each drive signal output from the output terminals OUT00 to OUT02 of the driver IC 130.

  The LED module 130c and the LED module 130d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 130c has an anode connected to the cathode of each LED of the LED module 130d, and a cathode connected to each output terminal OUT03 to OUT05 of the driver IC 130.

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 130d. Each LED of the LED module 130c and each LED of the LED module 130d emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT03 to OUT05 of the driver IC 130.

  The LED module 130e and the LED module 130f are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 130e has an anode connected to the cathode of each LED of the LED module 130f, and a cathode connected to each output terminal OUT06 to OUT08 of the driver IC 130.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 130f. Each LED of the LED module 130e and each LED of the LED module 130f emit light or extinguish according to the duty ratio of each drive signal output from the output terminals OUT06 to OUT08 of the driver IC 130.

  The LED module 130g and the LED module 130h are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 130g has an anode connected to the cathode of each LED of the LED module 130h, and a cathode connected to each output terminal OUT09 to OUT11 of the driver IC 130.

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 130h. Each LED of the LED module 130g and each LED of the LED module 130h emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT09 to OUT11 of the driver IC 130.

  The LED module 130i and the LED module 130j are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 130i has an anode connected to the cathode of each LED of the LED module 130j, and a cathode connected to each output terminal OUT12 to OUT14 of the driver IC 130.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 130j. Each LED of the LED module 130i and each LED of the LED module 130j emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT12 to OUT14 of the driver IC 130.

  The LED module 130k and the LED module 130m are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 130k has an anode connected to the cathode of each LED of the LED module 130m, and a cathode connected to each output terminal OUT15 to OUT17 of the driver IC 130.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 130m. Each LED of the LED module 130k and each LED of the LED module 130m emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT15 to OUT17 of the driver IC 130.

<Lower right LED board>
In FIG. 15, the lower right LED substrate 102 has the driver IC 131 in which 05H is set as the driver address, as described above. The driver IC 131 has the same configuration as the driver IC 127 described with reference to FIG.

  In the driver IC 131, 05H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 131 functions as a slave driver. Since drive data is input to the driver IC 131 from the driver IC 129 of the lower peripheral connection board 82 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the Low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, SDA_INn of the driver IC 131 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, SDA_OUTn of the driver IC 129 of the lower peripheral connection board 82, respectively.

  The driver IC 131 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped. The lower right LED board 102 is provided with LED modules 131a, 131b, 131c, 131d, 131e, 131f, 131g, 131h, 131i, 131j, 131k, and 131m.

  The LED module 131a and the LED module 131b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 131a has an anode connected to the cathode of each LED of the LED module 131b and a cathode connected to each output terminal OUT00 to OUT02 of the driver IC 131.

  The 12V drive voltage supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 131b. Each LED of the LED module 131a and each LED of the LED module 131b emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT00 to OUT02 of the driver IC 131.

  The LED module 131c and the LED module 131d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 131c has an anode connected to the cathode of each LED of the LED module 131d, and a cathode connected to each output terminal OUT03 to OUT05 of the driver IC 131.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 131d. Each LED of the LED module 131c and each LED of the LED module 131d emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT03 to OUT05 of the driver IC 131.

  The LED module 131e and the LED module 131f are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 131e has an anode connected to the cathode of each LED of the LED module 131f, and a cathode connected to each output terminal OUT06 to OUT08 of the driver IC 131.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 131f. Each LED of the LED module 131e and each LED of the LED module 131f emit light or extinguish according to the duty ratio of each drive signal output from the output terminals OUT06 to OUT08 of the driver IC 131.

  The LED module 131g and the LED module 131h are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 131g has an anode connected to the cathode of each LED of the LED module 131h, and a cathode connected to each output terminal OUT09 to OUT11 of the driver IC 131.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 131h. Each LED of the LED module 131g and each LED of the LED module 131h emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT09 to OUT11 of the driver IC 131.

  The LED module 131i and the LED module 131j are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 131i has an anode connected to the cathode of each LED of the LED module 131j, and a cathode connected to each output terminal OUT12 to OUT14 of the driver IC 131.

  The drive voltage of 12V supplied from the sub relay board 69 is supplied to the anode of each LED of the LED module 131j. Each LED of the LED module 131i and each LED of the LED module 131j emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT12 to OUT14 of the driver IC 131.

  The LED module 131k and the LED module 131m are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 131k has an anode connected to the cathode of each LED of the LED module 131m, and a cathode connected to each output terminal OUT15 to OUT17 of the driver IC 131.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 131m. Each LED of the LED module 131k and each LED of the LED module 131m emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT15 to OUT17 of the driver IC 131.

<Upper relay board / Side right LED board / Top center LED board>
In FIG. 16, the upper relay substrate 81 includes the driver IC 122 in which 10H is set as the driver address, as described above. The driver IC 122 has the same configuration as the driver IC 127 described with reference to FIG.

  In the driver IC 122, 10H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 122 functions as a slave driver. Since drive data is input to the driver IC 122 from the driver IC 121 of the sub-relay board 69 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the Low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn of the driver IC 122 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn of the driver IC 121 of the sub relay board 69, respectively.

  The driver IC 122 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped. The output terminals OUT00 to OUT20 of the driver IC 122 are connected to the side right LED substrate 91.

  The side right LED substrate 91 is provided with LED modules 91a, 91b, 91c, 91d, 91e, 91f, 91g, 91h, 91i, 91j, 91k, 91m, 91n, 91p.

  The LED module 91a and the LED module 91b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 91a has an anode connected to the cathode of each LED of the LED module 91b, and a cathode connected to each output terminal OUT00 to OUT02 of the driver IC 122.

  The 12V drive voltage supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 91b. Each LED of the LED module 91a and each LED of the LED module 91b emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT00 to OUT02 of the driver IC 122.

  The LED module 91c and the LED module 91d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 91c has an anode connected to the cathode of each LED of the LED module 91d, and a cathode connected to each output terminal OUT03 to OUT05 of the driver IC 122.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 91d. Each LED of the LED module 91c and each LED of the LED module 91d emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT03 to OUT05 of the driver IC 122.

  The LED module 91e and the LED module 91f are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 91e has an anode connected to the cathode of each LED of the LED module 91f, and a cathode connected to each output terminal OUT06 to OUT08 of the driver IC 122.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 91f. Each LED of the LED module 91e and each LED of the LED module 91f emit light or extinguish according to the duty ratio of each drive signal output from the output terminals OUT06 to OUT08 of the driver IC 122.

  The LED module 91g and the LED module 91h are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 91g has an anode connected to the cathode of each LED of the LED module 91h, and a cathode connected to each output terminal OUT09 to OUT11 of the driver IC 122.

  The 12V drive voltage supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 91h. Each LED of the LED module 91g and each LED of the LED module 91h emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT09 to OUT11 of the driver IC 122.

  The LED module 91i and the LED module 91j are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 91i has an anode connected to the cathode of each LED of the LED module 91j, and a cathode connected to each output terminal OUT12 to OUT14 of the driver IC 122.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 91j. Each LED of the LED module 91i and each LED of the LED module 91j emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT12 to OUT14 of the driver IC 122.

  The LED module 91k and the LED module 91m are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 91k has an anode connected to the cathode of each LED of the LED module 91m, and a cathode connected to each output terminal OUT15 to OUT17 of the driver IC 122.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 91m. Each LED of the LED module 91k and each LED of the LED module 91m emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT15 to OUT17 of the driver IC 122.

  The LED module 91n and the LED module 91p are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 91n has an anode connected to the cathode of each LED of the LED module 91p, and a cathode connected to each output terminal OUT18 to OUT20 of the driver IC 122.

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 91p. Each LED of the LED module 91n and each LED of the LED module 91p emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT18 to OUT20 of the driver IC 122.

  As described above, the top center LED substrate 90 includes the driver IC 123 in which 11H is set as the driver address. The driver IC 123 has the same configuration as the driver IC 127 described with reference to FIG.

  In the driver IC 123, 11H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 123 functions as a slave driver. Since drive data is input to the driver IC 123 from the driver IC 122 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn of the driver IC 123 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn of the driver IC 122, respectively.

  The driver IC 123 is set to the first mode in which the output terminals OUT00 to OUT23 are grouped. The top center LED substrate 90 is provided with LED modules 123a, 123b, 123c, and 123d.

  The LED module 123a and the LED module 123b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 123a has an anode connected to the cathode of each LED of the LED module 123b, and a cathode connected to each group 0 to 2 of the output terminal of the driver IC 123 (that is, a group of output terminals OUT00 to OUT02, an output terminal OUT03 to OUT05 group and output terminals OUT06 to OUT08).

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 123b. Each LED of the LED module 123a and each LED of the LED module 123b emits light or extinguishes according to the duty ratio of each drive signal output from each group 0 to 2 of the output terminal of the driver IC 123.

  The LED module 123c and the LED module 123d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 123c has an anode connected to a cathode of each LED of the LED module 123d, and a cathode connected to each group 3 to 5 of the output terminals of the driver IC 123 (that is, a group of output terminals OUT09 to OUT11, output terminals OUT12 to OUT14 group, and output terminals OUT15 to OUT17).

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 123d. Each LED of the LED module 123c and each LED of the LED module 123d emit or turn off according to the duty ratio of each drive signal output from each of the groups 3 to 5 of the output terminals of the driver IC 123.

<Side left LED board>
In FIG. 17, the side left LED substrate 92 has the driver IC 126 in which 14H is set as the driver address, as described above. The driver IC 126 has the same configuration as the driver IC 127 described with reference to FIG.

  In the driver IC 126, 14H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 126 functions as a slave driver. Since drive data is input to the driver IC 126 from the driver IC 122 of the upper relay substrate 81 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the Low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, SDA_INn of the driver IC 126 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, SDA_OUTn of the driver IC 122 of the upper relay board 81, respectively.

  The driver IC 126 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped. The side left LED board 92 is provided with LED modules 126a, 126b, 126c, 126d, 126e, 126f, 126g, 126h, 126i, 126j, 126k, 126m, 126n, and 126p.

  The LED module 126a and the LED module 126b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 126a has an anode connected to the cathode of each LED of the LED module 126b, and a cathode connected to each output terminal OUT00 to OUT02 of the driver IC 126.

  The 12V drive voltage supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 126b. Each LED of the LED module 126a and each LED of the LED module 126b emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT00 to OUT02 of the driver IC 126.

  The LED module 126c and the LED module 126d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 126c has an anode connected to the cathode of each LED of the LED module 126d, and a cathode connected to each output terminal OUT03 to OUT05 of the driver IC 126.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 126d. Each LED of the LED module 126c and each LED of the LED module 126d emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT03 to OUT05 of the driver IC 126.

  The LED module 126e and the LED module 126f are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 126e has an anode connected to the cathode of each LED of the LED module 126f, and a cathode connected to each output terminal OUT06 to OUT08 of the driver IC 126.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 126f. Each LED of the LED module 126e and each LED of the LED module 126f emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT06 to OUT08 of the driver IC 126.

  The LED module 126g and the LED module 126h are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 126g has an anode connected to the cathode of each LED of the LED module 126h, and a cathode connected to each output terminal OUT09 to OUT11 of the driver IC 126.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 126h. Each LED of the LED module 126g and each LED of the LED module 126h emit or turn off according to the duty ratio of each drive signal output from the output terminals OUT09 to OUT11 of the driver IC 126.

  The LED module 126i and the LED module 126j are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 126i has an anode connected to the cathode of each LED of the LED module 126j, and a cathode connected to each output terminal OUT12 to OUT14 of the driver IC 126.

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 126j. Each LED of the LED module 126i and each LED of the LED module 126j emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT12 to OUT14 of the driver IC 126.

  The LED module 126k and the LED module 126m are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 126k has an anode connected to the cathode of each LED of the LED module 126m, and a cathode connected to each output terminal OUT15 to OUT17 of the driver IC 126.

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 126m. Each LED of the LED module 126k and each LED of the LED module 126m emits light or extinguishes according to the duty ratio of each drive signal output from the output terminals OUT15 to OUT17 of the driver IC 126.

  The LED module 126n and the LED module 126p are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 126n has an anode connected to the cathode of each LED of the LED module 126p, and a cathode connected to each output terminal OUT18 to OUT20 of the driver IC 126.

  The drive voltage of 12V supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 126p. Each LED of the LED module 126n and each LED of the LED module 126p emit light or turn off according to the duty ratio of each drive signal output from the output terminals OUT18 to OUT20 of the driver IC 126.

<Top side left LED board>
In FIG. 18, the top side left LED board 94 has the driver IC 124 in which 12H is set as the driver address as described above. The driver IC 124 has the same configuration as the driver IC 127 described with reference to FIG.

  In the driver IC 124, 12H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 124 functions as a slave driver. Since drive data is input to the driver IC 124 from the driver IC 123 of the top center LED substrate 90 by the 2-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the Low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn of the driver IC 124 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn of the driver IC 123 of the top center LED substrate 90, respectively.

  The driver IC 124 is set to the first mode in which the output terminals OUT00 to OUT23 are grouped. The top side left LED substrate 94 is provided with LED modules 124a, 124b, 124c, and 124d.

  The LED module 124a and the LED module 124b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 124a has an anode connected to a cathode of each LED of the LED module 124b, and a cathode connected to each group 0 to 2 of the output terminal of the driver IC 124 (that is, a group of output terminals OUT00 to OUT02, an output terminal OUT03 to OUT05 group and output terminals OUT06 to OUT08).

  The 12V drive voltage supplied from the sub-relay board 69 is supplied to the anode of each LED of the LED module 124b. Each LED of the LED module 124a and each LED of the LED module 124b emits light or extinguishes according to the duty ratio of each drive signal output from each group 0 to 2 of the output terminal of the driver IC 124.

  The LED module 124c and the LED module 124d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 124c has an anode connected to the cathode of each LED of the LED module 124d, and a cathode connected to each of the groups 3 to 5 of the output terminals of the driver IC 124 (that is, a group of output terminals OUT09 to OUT11, output terminals OUT12 to OUT14 group, and output terminals OUT15 to OUT17).

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 124d. Each LED of the LED module 124c and each LED of the LED module 124d emits light or extinguishes according to the duty ratio of each drive signal output from each of the groups 3 to 5 of the output terminals of the driver IC 124.

<Topside right LED board>
In FIG. 19, the top side right LED substrate 93 has the driver IC 125 in which 13H is set as the driver address, as described above. The driver IC 125 has the same configuration as the driver IC 127 described with reference to FIG.

  In the driver IC 125, 13H is set as the driver address by the address setting terminals A0 to A5. Therefore, the driver IC 125 functions as a slave driver. Since drive data is input to the driver IC 125 from the driver IC 123 of the top center LED substrate 90 by the two-wire serial LVDS, the input setting terminal MODE is connected to the ground line and set to the Low level.

  The input terminals SCL_INp, SCL_INn, SDA_INp, and SDA_INn of the driver IC 125 are connected to the relay output terminals SCL_OUTp, SCL_OUTn, SDA_OUTp, and SDA_OUTn of the driver IC 123 of the top center LED board 90, respectively.

  The driver IC 125 is set to the first mode in which the output terminals OUT00 to OUT23 are grouped. The top side right LED substrate 93 is provided with LED modules 125a, 125b, 125c, and 125d.

  The LED module 125a and the LED module 125b are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 125a has an anode connected to the cathode of each LED of the LED module 125b, and a cathode connected to each group 0 to 2 of the output terminal of the driver IC 125 (that is, a group of output terminals OUT00 to OUT02, an output terminal OUT03 to OUT05 group and output terminals OUT06 to OUT08).

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 125b. Each LED of the LED module 125a and each LED of the LED module 125b emits light or extinguishes according to the duty ratio of each drive signal output from each group 0 to 2 of the output terminal of the driver IC 125.

  The LED module 125c and the LED module 125d are full-color LEDs having a red (R) LED, a green (G) LED, and a blue (B) LED. Each LED of the LED module 125c has an anode connected to the cathode of each LED of the LED module 125d, and a cathode connected to each group 3 to 5 of the output terminals of the driver IC 125 (that is, a group of output terminals OUT09 to OUT11, output terminals OUT12 to OUT14 group, and output terminals OUT15 to OUT17).

  The drive voltage of 12V supplied from the sub-relay substrate 69 is supplied to the anode of each LED of the LED module 125d. Each LED of the LED module 125c and each LED of the LED module 125d emit or turn off according to the duty ratio of each drive signal output from each of the groups 3 to 5 of the output terminals of the driver IC 125.

  In this embodiment, the LEDs connected to the output terminals OUT00 to OUT23 of the master driver and the slave driver all adopt a static lighting method with less LED flickering. In order to reduce the number of harnesses, a dynamic lighting method may be adopted to control LED drive.

<Specific Example of Data Output from Sub CPU to Each Driver>
Hereinafter, specific examples of data output from the sub CPU 120 to each driver will be described with reference to FIGS.

  As described above, data including a driver address (first byte), a register address (second byte), and a register value (third and subsequent bytes) is serially input to each driver of the driver ICs 121 to 131.

  FIG. 20 shows LED modules 126a, 126b, 126c, 126d, 126e, 126f, 126g, 126h, 126i, 126j, 126k, 126m, 126n, 126p (see FIG. 17) connected to the driver IC 126 of the side left LED board 92. The 1st example of the data which controls is shown.

  In FIG. 20, the driver address 14H of the driver IC 126 is set in the first byte of the data. 00H is set as the register address in the second byte of the data.

  Therefore, in the third byte of data, the register value of the register at register address 00H (hereinafter, the register specified by the register address is described as “register 00H” or the like). Register values after 01H are set.

  With this data, B0H is set in the register 00H. Accordingly, since a predetermined bit (seventh bit, BIT6) of the internal setting register 00H is set to 1, all the output terminals OUT00 to OUT23 of the driver IC 126 are enabled.

  Further, since a predetermined bit (8th bit, BIT7) of the internal setting register 00H is set to 0, the driver IC 126 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped.

  Further, the registers 01H to 03H, 07H to 09H, 0DH to 0FH, and 13H to 15H are set to 00H, and the registers 04H to 06H, 0AH to 0CH, and 10H to 12H are set to FFH.

  That is, with this data, a drive signal with a duty ratio of 0% is output (output of the drive signal is stopped) from the output terminals OUT00 to OUT02, OUT06 to OUT08, OUT12 to OUT14, and OUT18 to OUT20 of the driver IC 126. A drive signal having a duty ratio of 100% is output from the output terminals OUT03 to OUT05, OUT09 to OUT11, and OUT15 to OUT17.

  As a result, the LED modules 126a, 126b, 126e, 126f, 126i, 126j, 126n, and 126p are turned off, and the LED modules 126c, 126d, 126g, 126h, 126k, and 126m are turned on with the highest luminance.

  FIG. 21 shows LED modules 126a, 126b, 126c, 126d, 126e, 126f, 126g, 126h, 126i, 126j, 126k, 126m, 126n, 126p (see FIG. 17) connected to the driver IC 126 of the side left LED board 92. The 2nd example of the data which controls is shown.

  In FIG. 21, the driver address 14H of the driver IC 126 is set in the first byte of the data. 00H is set as the register address in the second byte of the data. Therefore, the register value of the register 00H is set in the third byte of data, and the register value after the register 01H is set in the fourth and subsequent bytes of data.

  With this data, B0H is set in the register 00H. Accordingly, since a predetermined bit (seventh bit, BIT6) of the internal setting register 00H is set to 1, all the output terminals OUT00 to OUT23 of the driver IC 126 are enabled.

  Further, since a predetermined bit (8th bit, BIT7) of the internal setting register 00H is set to 0, the driver IC 126 is set to the second mode in which the output terminals OUT00 to OUT23 are not grouped.

  Also, by this data, the registers 02H, 03H, 05H, 06H, 08H, 09H, 0BH, 0CH, 0EH, 0FH, 11H, 12H, 14H, and 15H are set to 00H, and the registers 01H, 04H, 07H, 10H, 13H , 0AH, 0DH, 10H, and 13H are set to FFH.

  That is, with this data, a drive signal with a duty ratio of 0% is output from the output terminals OUT01, OUT02, OUT04, OUT05, OUT07, OUT08, OUT10, OUT11, OUT13, OUT14, OUT16, OUT17, OUT19, and OUT20 of the driver IC 126 ( The output of the drive signal is stopped), and a drive signal with a duty ratio of 100% is output from the output terminals OUT00, OUT03, OUT06, OUT09, OUT12, OUT15, and OUT18 of the driver IC 126.

  As a result, each LED module 126b, 126d, 126f, 126h, 126j, 126m, 126p was connected to the green (G) LED and blue (B) LED, and to each of these green (G) LED and blue (B) LED. The green (G) LED and the blue (B) LED of each LED module 126a, 126c, 126e, 126g, 126i, 126k, 126n are turned off.

  In addition, the red (R) LEDs of the LED modules 126b, 126d, 126f, 126h, 126j, 126m, and 126p, and the LED modules 126a, 126c, 126e, 126g, 126i, and 126k connected to the red (R). 126n red (R) LEDs are lit with the highest luminance.

  FIG. 22 shows LED modules 126a, 126b, 126c, 126d, 126e, 126f, 126g, 126h, 126i, 126j, 126k, 126m, 126n, 126p (see FIG. 17) connected to the driver IC 126 of the side left LED board 92. 3 shows a third example of data for controlling the.

  In FIG. 22, the driver address 14H of the driver IC 126 is set in the first byte of the data. In the second byte of data, 10H is set as the register address. Accordingly, the register value of the register 10H is set in the third byte of data, and the register value of the register 11H and later is set in the fourth and subsequent bytes of data.

  Also, with this data, the register 10H is set to 00H, the register 11H is set to FFH, and the register 12H is set to 00H. The values of other registers including the internal setting register 00H are maintained.

  That is, with this data, a drive signal with a duty ratio of 0% is output from the output terminals OUT15 and OUT17 of the driver IC 126 (the drive signal is in the same state as the OFF state), and a duty ratio of 100% is output from the output terminal OUT16 of the driver IC 126. A drive signal is output.

  As a result, the red (R) LED and blue (B) LED of the LED module 126m, and the red (R) LED and blue (B) of the LED module 126k connected to each of these red (R) and blue (B) LEDs. LED turns off.

  The green (R) LED of the LED module 126m and the green (R) LED of the LED module 126k connected to the green (R) are lit with the highest luminance. The lighting states of the LEDs of the LED modules other than the LED modules 126k and 126m are maintained.

  FIG. 23 shows LED modules 126a, 126b, 126c, 126d, 126e, 126f, 126g, 126h, 126i, 126j, 126k, 126m, 126n, 126p (see FIG. 17) connected to the driver IC 126 of the side left LED board 92. 4 shows a fourth example of data for controlling the.

  In FIG. 23, the driver address 14H of the driver IC 126 is set in the first byte of the data. 00H is set as the register address in the second byte of the data.

  Therefore, the register value of the register 00H is set in the third byte of the data. With this data, 00H is set in the register 00H. Therefore, since a predetermined bit (seventh bit, BIT6) of the internal setting register 00H is set to 0, all the output terminals OUT00 to OUT23 of the driver IC 126 are disabled.

  Therefore, with this data, all the output terminals OUT00 to OUT23 of the driver IC 126 are turned off (the same state as when a drive signal with a duty ratio of 0% is output), and the LED modules 126a, 126b, 126c, and 126d. , 126e, 126f, 126g, 126h, 126i, 126j, 126k, 126m, 126n, and 126p, all the LEDs are turned off.

  In this embodiment, an example in which drive data is output from the sub CPU 120 to the master driver in a three-wire serial manner, drive data is output from the master driver to the slave driver, and drive data is output from the slave driver to other slave drivers. As described above, the drive data may be output from the sub CPU 120 to the master driver using the 2-wire serial LVDS, the drive data from the master driver to the slave driver, and the drive data from the slave driver to the other slave driver. You may output by 3-wire serial.

<Various effects>
As described above, the gaming machine 1 according to the embodiment of the present invention has a plurality of output terminals in order to reduce switching noise generated from each of the driver ICs 121 to 122 and 126 to 131 set in the second mode. In order to prevent the drive signal from interfering between the plurality of output terminals OUT00 to OUT23 by starting the output of the drive signal from the plurality of output terminals OUT00 to OUT23 by sequentially changing the phase at OUT00 to OUT23. It can prevent that light emission of each LED as a body flickers.

  In addition, the gaming machine 1 according to the embodiment of the present invention sequentially shifts the phase in a group of the plurality of output terminals OUT00 to OUT23 in order to reduce the switching noise emitted from each of the driver ICs 123 to 125 set in the first mode. Are started to output drive signals from a plurality of output terminals OUT00 to OUT23, thereby preventing the drive signals from interfering between groups of the plurality of output terminals OUT00 to OUT23. This can be prevented.

  In addition, the gaming machine 1 according to the embodiment of the present invention is configured so that each LED connected to each of the plurality of output terminals OUT00 to OUT23 of each of the driver ICs 121 to 131 is in a non-light emitting (light-off) state. The value of the position corresponding to a predetermined bit (seventh bit, BIT6) of the internal setting register (address 00H) is controlled without controlling each of the driver ICs 121 to 131 with the drive data for turning off the LED. Since each of the driver ICs 121 to 131 can be controlled by driving data that is 0, the control by the sub CPU 120 can be simplified.

  In addition, the gaming machine 1 according to the embodiment of the present invention transfers the drive data between the driver ICs 121 to 131 by a two-wire serial LVDS that is a differential signal that is more resistant to noise than a general serial signal. In order to prevent noise from being mixed into a line for transmitting drive data between the driver ICs 121 to 131, it is possible to prevent each LED from emitting light with a light emission pattern different from the light emission pattern represented by the drive data (so-called malfunction). Can do.

  Further, in the gaming machine 1 according to the embodiment of the present invention, the drive circuit of the master driver IC 121 is an open drain output, so that the expandability of functions can be ensured, and the drive circuits of the slave driver ICs 122 to 131 are fixed. Since it is a current sink output, current consumption can be suppressed.

  In addition, the gaming machine 1 according to the embodiment of the present invention transfers the drive data between the driver ICs 121 to 131 by using a data positive and data negative pair line that is more resistant to noise than the single-ended method, and a clock that is resistant to noise. Since the drive data synchronization clock is transferred between the driver ICs 121 to 131 using the positive and clock negative pair lines, it is possible to prevent noise from being mixed into each line that transmits the drive data and clock between the driver ICs 121 to 131. Therefore, each LED can be prevented from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

  In the gaming machine according to the present invention, since each driver IC 121-131 outputs drive data by one-way communication, the load required for returning a response signal such as ACK to the sub CPU 120 and the relay destination driver is reduced. be able to.

  In addition, in the gaming machine according to the present invention, when all the slave driver ICs 122 to 131 are initialized, the master driver is not controlled by the data for initializing the slave driver ICs 122 to 131 without controlling the slave driver ICs 122 to 131. Since all slave driver ICs 122 to 131 can be initialized by inputting a pulse of 200 ns or more to the input terminal SCL_INn (chip select input) of the IC 121, the control at the time of driver initialization by the sub CPU 120 is simplified. Can do.

  As mentioned above, although the case where embodiment of this invention was applied to the pachislot machine was demonstrated, this invention can also be applied to other game machines (for example, a pachinko machine, a slot machine, etc.).

[Other expandability of gaming machine according to the present invention]
In the pachislot machine (game machine 1) of the above embodiment, the player's medal insertion operation (that is, the operation of inserting a medal into the medal insertion slot DD5 or the credited medal with the MAX bet button DD8 or When the game is started by the operation of operating the 1-bet button and the medals are paid out when the game is finished, the hopper device HP is driven and the medals are paid out from the medal payout outlet DD14. Or although the credited form was demonstrated, this invention is not limited to this.

  For example, a game medium necessary for a game is inserted by a player, a game is performed based on the game medium, and a privilege is given based on the result of the game (for example, a medal is paid out), The present invention can be applied. That is, not only the form in which the game medium is inserted (hanged) by the physical player's action and the game medium is paid out, but also the main control circuit (main control board 71) itself has the game medium held by the player. It may be configured to be managed electromagnetically and to allow a game without medals. In this case, the game media management device that manages the game media that is attached (connected) to the main control circuit (main control board 71) and that manages the game media owned by the player in an electromagnetic manner. Also good.

  In this case, the game medium management device has a ROM and an RWM (or RAM) and is provided in the game machine, and can communicate bidirectionally with an external game medium handling device (not shown) through a predetermined interface. The game medium lending operation (that is, the operation of providing the game medium necessary for the player to perform the game medium insertion operation) or winning the game medium payout (the relevant The game media payout operation (that is, the operation to acquire the game media necessary for paying out the game media to the player) or the game media used for the game is electromagnetic It is sufficient that the recording operation can be performed. The game medium management device not only manages the actual number of game media but also displays the number of game media held (not shown), for example, based on the management result of the number of game media. May be provided on the front surface of the pachislot machine (game machine 1) to manage the number of game media displayed on the possessed game media number display device. In other words, the game medium management device may record and display the total number of game media that the player can use for the game by an electromagnetic method.

  In this case, the game medium management device may have a performance (function) that allows a player to freely transmit a signal indicating the number of recorded game media to an external game medium handling device. desirable. Further, it is desirable that the game medium management device has a performance that cannot reduce the number of recorded game media except when the player directly operates. Further, when an external connection terminal plate (not shown) is provided between the game medium management device and the external game medium handling device, the game medium management device is not via the external connection terminal plate, It is desirable that the player has a performance that cannot transmit a signal indicating the number of recorded game media.

  In addition to the above, the gaming machine is provided with a lending operation means that can be operated by the player, a return (settlement) operation means, an external connection terminal plate, and the gaming medium handling device has a valuable input such as banknotes, Slots for recording media (for example, IC cards), non-contact communication antennas for depositing electronic money, etc. from portable terminals, other operation means such as lending operation means, return operation means, external connection on game media handling device side A terminal board may be provided (both not shown).

  As a flow of the game at that time, for example, the player deposits the valuable value with respect to the game medium handling device by any one of the above methods, and a predetermined number of valuable values based on the operation of any one of the lending operation means. And the number of game media corresponding to the subtracted value is increased from the game media handling device to the game media management device. Then, the player plays a game and repeats the above operation when a game medium is required. After that, when a predetermined number of game media are acquired as a result of the game and the game is ended, the number of game media is transferred from the game media management device to the game media handling device by operating one of the return operation means. The game medium handling device discharges the recording medium on which the number of game media is recorded. Further, when the game medium management device transmits the number of game media, the game medium management device clears the number of game media stored in itself. The player takes the discharged recording medium to a prize counter or the like to exchange prizes, or moves the gaming table to play a game on another gaming table based on the recorded gaming medium.

  In the above example, the total number of game media is transmitted from the game media management device to the game media handling device. However, the game machine or the game media handling device transmits only the number of game media desired by the player, A game medium possessed by a person may be divided and processed. In the above example, the game medium handling device discharges the recording medium. However, cash or cash equivalents may be discharged or stored in a portable terminal or the like. In addition, the game medium handling device may be able to insert a member recording medium of the game hall, store the game medium in the member recording medium, and replay the game later using the stored game medium. .

  In addition, in the gaming machine or the game medium handling device, a lock operation for locking the game medium or the valuable data communication can be performed on the game medium handling device or the game medium management device by operating a predetermined operation means (not shown). It is good. In that case, the player may be stored by setting information that can only be known by the player, such as a one-time password, or by imaging means provided in the gaming machine or the game medium handling device.

  As described above, the game medium management device may be one that allows games only without medals, or a game medium is inserted (hanged) by a physical player's action, and the game medium is It may be possible to play a game in both a payout form and a form allowing a game without medals. In the latter case, the game medium management device can adopt a method of directly controlling the medal selector 46 and the hopper device HP described above, and these are controlled by the main control circuit (main control board 71). Further, based on the transmission of the control result, it is also possible to adopt a method in which the player can control to record and display the total number of game media that can be used for games by an electromagnetic method.

  In the above example, the case where the game medium management device is applied to a pachislot is described. However, for example, a game medium management device is similarly provided in a slot machine using a game ball or an enclosed game machine, and the player It is also possible to manage the game media.

  In the case where the above-described game medium management device is provided, devices such as the medal selector 46 and the hopper device HP in the game machine can be reduced as compared with the case where the game medium is physically provided for the game. Not only can the cost and manufacturing cost of the machine be reduced, but also the player can be prevented from touching the game media directly, the gaming environment can be improved, noise can be reduced, and the game can be reduced by reducing the number of devices. It is also possible to reduce the power consumption of the machine. Further, in the case where the above-described game medium management device is provided, it is possible to prevent an illegal act through a game medium or a game medium slot or payout port. That is, when the above-described game medium management device is provided, it is possible to provide a gaming machine that can improve various environments surrounding the gaming machine.

[Summary of the Invention]
<Summary 1>
Japanese Patent Application Laid-Open No. 2007-282925 proposes performing LED lighting control in accordance with images and sound effects by setting a duty ratio to an effect LED drive signal and performing PWM control.

  In PWM control, switching noise occurs when ON / OFF control is performed on the output signal output from the output terminal of the LED driver IC. For this reason, when ON / OFF control is performed on a plurality of output terminals at the same time, the output signal may interfere due to switching noise emitted from the respective terminals, and light emission from a light emitter such as an effect LED may flicker.

  The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine that can prevent the light emission of the light emitter from flickering.

The gaming machine according to the present invention is
A plurality of light emitters (each LED of each LED module);
Drivers for driving the light emitters (each of the drivers 121 to 131);
A control unit (sub CPU 120) that outputs and controls drive data to the driver,
The driver is
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
A plurality of output terminals (OUT00 to OUT23) for driving the light emitter;
PWM control means (each of the drivers 121 to 131) that PWM-controls a drive signal output from each of the plurality of output terminals based on drive data input to the input terminal;
Delay means (each driver 121-131) capable of delaying the drive signal PWM-controlled by the PWM control means,
The delay means has a configuration capable of starting the output of the drive signal from the plurality of output terminals by changing the phase between the plurality of output terminals.

  With this configuration, the gaming machine according to the present invention outputs drive signals from the plurality of output terminals by sequentially changing the phase between the plurality of output terminals in order to reduce switching noise generated from the driver that drives the light emitter. Since the drive signal is prevented from interfering between the plurality of output terminals by starting the operation, it is possible to prevent the light emission of the light emitter from flickering.

  According to the present invention, it is possible to provide a gaming machine that can prevent the light emitting body from flickering.

<Summary 2>
In order to solve the same problems as the first aspect, the gaming machine according to the present invention is:
A plurality of light emitters (each LED of each LED module);
Drivers for driving the light emitters (each of the drivers 121 to 131);
A control unit (sub CPU 120) that outputs and controls drive data to the driver,
The driver is
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
A plurality of output terminals (OUT00 to OUT23) for driving the light emitter;
PWM control means (each of the drivers 121 to 131) that PWM-controls a drive signal output from each of the plurality of output terminals based on drive data input to the input terminal;
Delay means (each driver 121-131) capable of delaying a drive signal PWM-controlled by the PWM control means;
Mode setting means capable of setting the delay means in any one of a first mode in which the plurality of output terminals are grouped into groups for each predetermined number of terminals and a second mode in which the plurality of output terminals are not grouped. Each driver 121-131),
The delay means is
In the first mode, it is possible to start outputting the drive signal from the plurality of output terminals by changing the phase between the groups.
The second mode has a configuration in which the output of the drive signal can be started from the plurality of output terminals by changing the phase between the plurality of output terminals.

  With this configuration, when the delay means is in the second mode, the gaming machine according to the present invention sequentially shifts the phase between the plurality of output terminals in order to reduce the switching noise generated from the driver that drives the light emitter. By starting the output of the drive signal from the plurality of output terminals in a different manner, the drive signal is prevented from interfering between the plurality of output terminals, so that the light emission of the light emitter can be prevented from flickering.

  In addition, in the gaming machine according to the present invention, when the delay means is in the first mode, the phase is sequentially set between the groups of the plurality of output terminals in order to reduce the switching noise generated from the driver that drives the light emitter. By starting output of drive signals from a plurality of output terminals in a different manner, it is possible to prevent the drive signals from interfering between groups of the plurality of output terminals, so that the light emission of the light emitter can be prevented from flickering. .

  According to the present invention, it is possible to provide a gaming machine that can prevent the light emitting body from flickering.

<Summary 3>
In order to solve the same problems as the first aspect, the gaming machine according to the present invention is:
A plurality of light emitters (eg, each LED of each LED module);
Drivers for driving the light emitters (each of the drivers 121 to 131);
A control unit (sub CPU 120) that outputs and controls drive data to the driver,
The driver is
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
A plurality of output terminals (OUT00 to OUT23) for driving the light emitter;
PWM control means (each of the drivers 121 to 131) that PWM-controls a drive signal output from each of the plurality of output terminals based on drive data input to the input terminal;
Delay means (each driver 121-131) capable of delaying the drive signal PWM-controlled by the PWM control means,
The delay means can start output of the drive signal from the plurality of output terminals with different phases between the plurality of output terminals,
In the driver, a value of a predetermined position (a position corresponding to a predetermined bit (seventh bit, BIT6) of the internal setting register (address 00H)) of the driving data input to the input terminal is a predetermined value (0). In this case, the plurality of light emitters respectively connected to the plurality of output terminals are set in a non-light emitting state.

  With this configuration, the gaming machine according to the present invention outputs drive signals from the plurality of output terminals by sequentially changing the phase between the plurality of output terminals in order to reduce switching noise generated from the driver that drives the light emitter. Since the drive signal is prevented from interfering between the plurality of output terminals by starting the operation, it is possible to prevent the light emission of the light emitter from flickering.

  In addition, the gaming machine according to the present invention controls the driver by driving data for setting each light emitter to the non-light emitting state when the plurality of light emitters respectively connected to the plurality of output terminals of the driver are set to the non-light emitting state. Therefore, since the driver can be controlled by the drive data in which the value of the predetermined position is the predetermined value, the control by the control unit can be simplified.

  According to the present invention, it is possible to provide a gaming machine that can prevent the light emitting body from flickering.

<Summary 4>
As this type of gaming machine, Japanese Patent Application Laid-Open No. 2017-143854 proposes an LED driver IC connected to a sub-control device through serial communication to drive the production LED under the control of the sub-control device.

  Generally, serial communication is vulnerable to noise. When drive data of a light emitting body such as a production LED is transmitted via a serial line, if noise enters the serial line, the LED driver IC malfunctions and the light emission pattern represented by the drive data There may be a problem that the light emitter is driven with a different light emission pattern.

  The present invention has been made to solve such a problem, and an object of the present invention is to provide a gaming machine capable of preventing a light emitter from emitting light with a light emission pattern different from a light emission pattern represented by drive data. To do.

The gaming machine according to the present invention is
A plurality of light emitters (LED module LEDs);
A plurality of drivers (drivers 121 to 131) for driving the light emitter;
A control unit (sub CPU 120) that outputs and controls drive data for driving the light emitter to the driver,
The driver includes a master driver (driver 121) connected to the control unit and a plurality of slave drivers (drivers 122 to 131).
The plurality of slave drivers are connected directly to the master driver or via other slave drivers, respectively.
Each of the master driver and the slave driver is
An address setting terminal (A0 to A5) capable of setting a driver address;
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
An input setting terminal (MODE) capable of setting whether the drive data is input to the input terminal as a differential signal or a three-wire serial;
An output circuit (each of the drivers 121 to 131) that outputs the drive data input to the input terminal as a differential signal;
A drive circuit (each of the drivers 121 to 131) for driving the light emitter,
The control unit outputs the drive data to the master driver in the 3-wire serial,
The master driver has the input setting terminal set to input the drive data to the input terminal in a three-wire serial manner,
In the slave driver, the input setting terminal is set so that the drive data is input to the input terminal as a differential signal,
Each driver of the master driver and the slave driver, when the driver address of the drive data input to the input terminal matches the driver address set by the address setting terminal, the drive based on the drive data The circuit outputs a drive signal for driving the light emitter.

  With this configuration, the gaming machine according to the present invention transfers the drive data between the drivers with a differential signal that is more resistant to noise than a general serial signal, so that noise is generated on the line that transmits the drive data between the drivers. In order to prevent mixing, it is possible to prevent the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

  According to the present invention, it is possible to provide a gaming machine capable of preventing the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

<Summary 5>
In order to solve the same problem as the fourth aspect, the gaming machine according to the present invention is:
A plurality of light emitters (LED module LEDs);
A plurality of drivers (drivers 121 to 131) for driving the light emitter;
A control unit (sub CPU 120) that outputs and controls drive data for driving the light emitter to the driver,
The driver includes a master driver (driver 121) connected to the control unit and a plurality of slave drivers (for example, drivers 122 to 131).
The plurality of slave drivers are connected directly to the master driver or via other slave drivers, respectively.
Each of the master driver and the slave driver is
An address setting terminal (A0 to A5) capable of setting a driver address;
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
An input setting terminal (MODE) capable of setting whether the drive data is input to the input terminal as a differential signal or a three-wire serial;
An output circuit (each of the drivers 121 to 131) that outputs the drive data input to the input terminal as a differential signal;
A drive circuit (for example, each of the drivers 121 to 131) for driving the light emitter,
The control unit outputs the drive data to the master driver in the 3-wire serial,
The master driver has the input setting terminal set to input the drive data to the input terminal in a three-wire serial manner,
In the slave driver, the input setting terminal is set so that the drive data is input to the input terminal as a differential signal,
Each driver of the master driver and the slave driver, when the driver address of the drive data input to the input terminal matches the driver address set by the address setting terminal, the drive based on the drive data Output a drive signal for driving the light emitter from the circuit,
The drive circuit of the master driver is an open drain output,
The drive circuit of the slave driver has a configuration that is a constant current sink output.

  With this configuration, the gaming machine according to the present invention transfers the drive data between the drivers with a differential signal that is more resistant to noise than a general serial signal, so that noise is generated on the line that transmits the drive data between the drivers. In order to prevent mixing, it is possible to prevent the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

  Further, in the gaming machine according to the present invention, since the drive circuit of the master driver is an open drain output, the expandability of the function can be ensured, and since the drive circuit of the slave driver is a constant current sink output, Can be suppressed.

  According to the present invention, it is possible to provide a gaming machine capable of preventing the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

<Summary 6>
In order to solve the same problem as the fourth aspect, the gaming machine according to the present invention is:
A plurality of light emitters (LED module LEDs);
A plurality of drivers (drivers 121 to 131) for driving the light emitter;
A control unit (sub CPU 120) that outputs and controls drive data for driving the light emitter to the driver,
The driver includes a master driver (driver 121) connected to the control unit and a plurality of slave drivers (for example, drivers 122 to 131).
The plurality of slave drivers are connected directly to the master driver or via other slave drivers, respectively.
Each of the master driver and the slave driver is
An address setting terminal (A0 to A5) capable of setting a driver address;
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
An input setting terminal (MODE) capable of setting whether the drive data is input to the input terminal as a differential signal or a three-wire serial;
An output circuit (each of the drivers 121 to 131) that outputs the drive data input to the input terminal as a differential signal;
A drive circuit (for example, each of the drivers 121 to 131) for driving the light emitter,
The control unit outputs the drive data to the master driver in the 3-wire serial,
The master driver has the input setting terminal set to input the drive data to the input terminal in a three-wire serial manner,
In the slave driver, the input setting terminal is set so that the drive data is input to the input terminal as a differential signal,
Each driver of the master driver and the slave driver, when the driver address of the drive data input to the input terminal matches the driver address set by the address setting terminal, the drive based on the drive data Output a drive signal for driving the light emitter from the circuit,
Between each driver of the master driver and the slave driver,
A data positive and data negative pair line for transmitting the driving data;
The clock positive and clock negative pair lines for transmitting the clock for synchronizing the driving data transmitted by the data positive and data negative pair lines are connected.

  With this configuration, the gaming machine according to the present invention transfers the drive data between the drivers with a differential signal that is more resistant to noise than a general serial signal, so that noise is generated on the line that transmits the drive data between the drivers. In order to prevent mixing, it is possible to prevent the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

  In addition, the gaming machine according to the present invention transfers the drive data between each driver using a data positive and data negative pair line that is more resistant to noise than the single-ended method, and uses a clock positive and clock negative pair line that is resistant to noise. Since the drive data synchronization clock is transferred between the drivers, the light emission pattern is different from the light emission pattern represented by the drive data in order to prevent noise from entering each line that transmits the drive data and clock between the drivers. It is possible to prevent the light emitter from emitting light.

  According to the present invention, it is possible to provide a gaming machine capable of preventing the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

<Summary 7>
In order to solve the same problem as the fourth aspect, the gaming machine according to the present invention is:
A plurality of light emitters (LED module LEDs);
A plurality of drivers (drivers 121 to 131) for driving the light emitter;
A control unit (sub CPU 120) that outputs and controls drive data for driving the light emitter to the driver,
The driver includes a master driver (driver 121) connected to the control unit and a plurality of slave drivers (for example, drivers 122 to 131).
The plurality of slave drivers are connected directly to the master driver or via other slave drivers, respectively.
Each of the master driver and the slave driver is
An address setting terminal (A0 to A5) capable of setting a driver address;
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
An input setting terminal (MODE) capable of setting whether the drive data is input to the input terminal as a differential signal or a three-wire serial;
An output circuit (each of the drivers 121 to 131) that outputs the drive data input to the input terminal as a differential signal;
A drive circuit (for example, each of the drivers 121 to 131) for driving the light emitter,
The control unit outputs the drive data to the master driver in the 3-wire serial,
The master driver has the input setting terminal set to input the drive data to the input terminal in a three-wire serial manner,
In the slave driver, the input setting terminal is set so that the drive data is input to the input terminal as a differential signal,
Each driver of the master driver and the slave driver, when the driver address of the drive data input to the input terminal matches the driver address set by the address setting terminal, the drive based on the drive data Output a drive signal for driving the light emitter from the circuit,
The output circuit of each of the master driver and the slave driver has a configuration for outputting the drive data input to the input terminal by one-way communication.

  With this configuration, the gaming machine according to the present invention transfers the drive data between the drivers with a differential signal that is more resistant to noise than a general serial signal, so that noise is generated on the line that transmits the drive data between the drivers. In order to prevent mixing, it is possible to prevent the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

  In addition, since the output circuit of each driver outputs the drive data by one-way communication, the gaming machine according to the present invention can reduce the load required for returning a response signal such as ACK to the relay destination driver. .

  According to the present invention, it is possible to provide a gaming machine capable of preventing the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

<Summary 8>
In order to solve the same problem as the fourth aspect, the gaming machine according to the present invention is:
A plurality of light emitters (LED module LEDs);
A plurality of drivers (drivers 121 to 131) for driving the light emitter;
A control unit (sub CPU 120) that outputs and controls drive data for driving the light emitter to the driver,
The driver includes a master driver (driver 121) connected to the control unit and a plurality of slave drivers (for example, drivers 122 to 131).
The plurality of slave drivers are connected directly to the master driver or via other slave drivers, respectively.
Each of the master driver and the slave driver is
An address setting terminal (A0 to A5) capable of setting a driver address;
Input terminals (SCL_INp, SCL_INn, SDA_INp, SDA_INn) for inputting the drive data by serial communication;
An input setting terminal (MODE) capable of setting whether the drive data is input to the input terminal as a differential signal or a three-wire serial;
An output circuit (each of the drivers 121 to 131) that outputs the drive data input to the input terminal as a differential signal;
A drive circuit (for example, each of the drivers 121 to 131) for driving the light emitter,
The control unit outputs the drive data to the master driver in the 3-wire serial,
The master driver has the input setting terminal set to input the drive data to the input terminal in a three-wire serial manner,
In the slave driver, the input setting terminal is set so that the drive data is input to the input terminal as a differential signal,
Each driver of the master driver and the slave driver, when the driver address of the drive data input to the input terminal matches the driver address set by the address setting terminal, the drive based on the drive data Output a drive signal for driving the light emitter from the circuit,
The master driver includes a data input (SDA_INp), a clock input (SCL_INp), and a chip select input (SCL_INn) included in the three-wire serial input. When a pulse is input, the output circuit outputs a signal for initializing a slave driver connected to the output circuit directly or via another slave driver.

  With this configuration, the gaming machine according to the present invention transfers the drive data between the drivers with a differential signal that is more resistant to noise than a general serial signal, so that noise is generated on the line that transmits the drive data between the drivers. In order to prevent mixing, it is possible to prevent the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

  In addition, in the gaming machine according to the present invention, when all slave drivers are initialized, each slave driver is not controlled by data for initializing each slave driver, and the chip select input of the master driver is set for a certain time or more. Since all the slave drivers can be initialized by inputting a pulse, the control at the time of driver initialization by the control unit can be simplified.

  According to the present invention, it is possible to provide a gaming machine capable of preventing the light emitter from emitting light with a light emission pattern different from the light emission pattern represented by the drive data.

1 gaming machines 91a-91p, 103a, 103b, 104a-104f, 105a-105j, 106a-106c, 107a, 108a, 108b, 109a, 109b, 110a-110f, 111a-111f, 112a-112f, 123a-123d, 124a -124d, 125a-125d, 126a-126p, 130a-130m, 131a-131m LED module 120 Sub CPU (control unit)
121 Driver IC (driver, master driver)
122 to 131 Driver IC (Driver, Slave Driver)
A0 to A5 Address setting terminal MODE input setting terminal OUT00 to OUT23 (output terminal)
SCL_INp input terminal (clock input)
SCL_INn input terminal (chip select input)
SDA_INp input terminal (data input)
SDA_INn input terminal

Claims (1)

A plurality of light emitters;
A plurality of drivers for driving the light emitter;
A control unit that outputs and controls drive data for driving the light emitter to the driver,
The driver includes a master driver connected to the control unit and a plurality of slave drivers.
The plurality of slave drivers are connected directly to the master driver or via other slave drivers, respectively.
Each of the master driver and the slave driver is
An address setting terminal capable of setting a driver address;
An input terminal for inputting the drive data by serial communication;
An input setting terminal capable of setting whether to input the drive data to the input terminal as a differential signal or to input with a three-wire serial;
An output circuit that outputs the drive data input to the input terminal as a differential signal;
A drive circuit for driving the light emitter, and
The control unit outputs the drive data to the master driver in the 3-wire serial,
The master driver has the input setting terminal set to input the drive data to the input terminal in a three-wire serial manner,
In the slave driver, the input setting terminal is set so that the drive data is input to the input terminal as a differential signal,
Each driver of the master driver and the slave driver, when the driver address of the drive data input to the input terminal matches the driver address set by the address setting terminal, the drive based on the drive data Output a drive signal for driving the light emitter from the circuit,
Between each driver of the master driver and the slave driver,
A data positive and data negative pair line for transmitting the driving data;
A gaming machine connected by a clock positive and clock negative pair line for transmitting a clock for synchronizing driving data transmitted by the data positive and data negative pair lines.

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