JP2019145839A - Multilayer ceramic electronic component - Google Patents

Abstract

To provide a multilayer ceramic electronic component which can suppress cracking and is also less likely to cause reduction in capacitance even when the thickness of a dielectric layer is reduced.SOLUTION: The thickness of a dielectric layer 10 is 0.4 μm or less. A width dimension (W0) along the width direction of a ceramic body 4 is 0.59 mm or less. A gap dimension (Wgap) along the width direction of the ceramic body 4 from the outer surface of the ceramic body 4 to an end of an internal electrode layer 12 is between 0.010 and 0.025 mm. The ratio of gap dimension to width dimension (Wgap/W0 dimension) is 0.025 or greater.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a multilayer ceramic electronic component having a very thin dielectric layer.

  Along with miniaturization and thinning of electronic devices, there is a demand for miniaturization and thinning of multilayer ceramic electronic components housed therein. Therefore, it is required to make the dielectric layer in the multilayer ceramic electronic component thin.

  For example, as shown in Patent Document 1, it is known that when a dielectric layer in a multilayer ceramic electronic component is thinned, a crack is generated during its manufacture, and a method for preventing the crack has been developed.

  Conventionally, however, the thickness of the dielectric layer is limited to about 1 μm. However, due to recent technological innovation, a technique for reducing the thickness of the dielectric layer to 0.5 μm or less has been developed. Conventionally, a technology has been established regarding how to prevent the occurrence of cracks and ensure the capacitance when the thickness of the dielectric layer is reduced to 0.5 μm or less, and further to 0.4 μm or less. Was not.

Japanese Patent Laid-Open No. 7-74047

  The present invention has been made in view of such a situation, and an object of the present invention is to provide a multilayer ceramic electronic component that can suppress the generation of cracks even when the thickness of the dielectric layer is reduced, and has a small decrease in capacitance. Is to provide.

  As a result of intensive studies on the above-mentioned object, the present inventors have only satisfied a specific dimensional relationship, and even when the thickness of the dielectric layer is reduced to 0.5 μm or less, and further to 0.4 μm or less, cracks are generated. It has been found that a multilayer ceramic electronic component can be provided that can suppress the decrease in electrostatic capacity and has a small decrease in capacitance, and the present invention has been completed.

That is, the multilayer ceramic electronic component according to the present invention is
A ceramic body formed by alternately laminating a plurality of dielectric layers and a plurality of internal electrode layers;
A multilayer ceramic electronic component having at least a pair of external electrodes connected to the internal electrode layer on the surface of the ceramic body,
The dielectric layer has a thickness of 0.4 μm or less,
The width dimension (W0) along the width direction of the ceramic body is 0.59 mm or less,
A gap dimension (Wgap) from the outer surface of the ceramic body to the end of the internal electrode layer along the width direction of the ceramic body is 0.010 to 0.025 mm.
The ratio between the gap dimension and the width dimension (Wgap / W0 dimension) is 0.025 or more.

  According to the present invention, even when the thickness of the dielectric layer is reduced to 0.5 μm or less, and further to 0.4 μm or less, the occurrence of cracks can be suppressed, and the multilayer ceramic electronic with a small decrease in capacitance is obtained. Parts can be provided.

  Preferably, a ratio (te / td) between the thickness (te) of the internal electrode layer and the thickness (td) of the dielectric layer is 1.05 or less.

Preferably, the average particle diameter of the first dielectric particles constituting the dielectric layer positioned between the internal electrode layers along the stacking direction is Di,
When the average particle diameter of the second dielectric particles located in the exterior region located outside the interior direction of the interior region in which the internal electrode layer is laminated with the dielectric layer sandwiched along the lamination direction is Dg,
Dg / Di ≧ 1.

Alternatively, preferably, the average particle diameter of the particles constituting the dielectric layer positioned between the internal electrode layers along the stacking direction is Di,
When the average particle diameter of the third dielectric particles constituting the extraction region located between the extraction portions of the internal electrode layer connected to any one of the external electrodes is Dh,
Dh / Di ≧ 1.

  In such a relationship, even if the dielectric layer is thinned, the capacitance is further improved. In general, it has been reported that the dielectric constant decreases as the dielectric layer becomes thinner. However, the present inventors have found that by controlling the particle size of the dielectric particles in a specific region, it is possible to suppress a decrease in relative dielectric constant even if the dielectric layer is thinned.

FIG. 1 is a schematic cross-sectional view of a multilayer ceramic capacitor according to an embodiment of the present invention. 2 is a cross-sectional view taken along line II-II shown in FIG. FIG. 3 is a schematic cross-sectional view showing a green sheet laminating process in the manufacturing process of the multilayer ceramic capacitor shown in FIG. FIG. 4 is a plan view showing a part of the pattern of the internal electrode layer along the line IV-IV shown in FIG. FIG. 5A is a schematic cross-sectional view parallel to the XZ axis plane of the laminated body after the green sheets shown in FIG. 3 are laminated. 5B is a schematic enlarged cross-sectional view parallel to the YZ axis plane of the laminated body after the green sheets shown in FIG. 3 are laminated.

  Hereinafter, the present invention will be described based on embodiments shown in the drawings.

First, the overall configuration of a multilayer ceramic capacitor will be described as an embodiment of the multilayer ceramic electronic component according to the present invention.

  As shown in FIG. 1, the multilayer ceramic capacitor 2 according to this embodiment includes a capacitor body 4, a first terminal electrode 6, and a second terminal electrode 8. The capacitor body 4 has inner dielectric layers 10 and internal electrode layers 12, and the internal electrode layers 12 are alternately stacked between the inner dielectric layers 10. A portion where the inner dielectric layer 10 and the internal electrode layer 12 are alternately laminated is an interior region 13.

  The capacitor body 4 has an exterior region 11 on both end faces in the stacking direction Z (Z axis). The exterior region 11 is formed by laminating a plurality of dielectric layers thicker than the inner dielectric layer 10 constituting the interior region 13.

  One of the internal electrode layers 12 that are alternately stacked is electrically connected to the inside of the first terminal electrode 6 that is formed outside the first end of the capacitor body 4 in the Y-axis direction. Part 12A. The other internal electrode layers 12 that are alternately stacked are electrically connected to the inside of the second terminal electrode 8 formed outside the second end of the capacitor body 4 in the Y-axis direction. It has a drawer 12B.

  The interior area 13 includes a capacity area 14 and lead areas 15A and 15B. The capacitance region 14 is a region where the internal electrode layer 12 is laminated with the inner dielectric layer 10 sandwiched along the lamination direction. The lead area 15 </ b> A is an area located between the lead portions 12 </ b> A of the internal electrode layer 12 connected to the external electrode 6. The lead area 15 </ b> B is an area located between the lead portions 12 </ b> B of the internal electrode layer 12 connected to the external electrode 8.

  As shown in FIG. 2, side protection regions 16 are formed at both ends of the capacitor body 4 in the X-axis direction. The side surface protection region 16 is made of the same or different dielectric material as the dielectric material constituting the inner dielectric layer 10 and / or the dielectric layer of the exterior region 11. The lead regions 15A and 15B are made of the same or different dielectric material as the dielectric material constituting the inner dielectric layer 10.

The materials of the dielectric layers constituting the inner dielectric layer 10 and the exterior region 11 may be the same or different, and are not particularly limited. For example, ABO3 It is composed of a dielectric material having a perovskite structure. ABO3 In the above, A is at least one of Ca, Ba, Sr and the like, for example, and B is at least one of Ti, Zr and the like. The molar ratio of A / B is not particularly limited, and is 0.980 to 1.020.

  Although the material of the internal electrode layer 12 is not particularly limited, for example, a metal such as Ni, Cu, Ag, Pd, Al, or an alloy thereof can be used.

  The material of the terminal electrodes 6 and 8 is not particularly limited, but usually at least one of Ni, Pd, Ag, Au, Cu, Pt, Rh, Ru, Ir, or an alloy thereof can be used. Usually, Cu, Cu alloy, Ni, Ni alloy, etc., Ag, Ag—Pd alloy, In—Ga alloy, etc. are used.

  The shape and size of the multilayer ceramic capacitor 2 may be appropriately determined according to the purpose and application. When the multilayer ceramic capacitor 2 has a rectangular parallelepiped shape, the longitudinal dimension L0 (see FIG. 1) is usually 0.2 to 5.7 mm, but in the present embodiment, preferably 0.3 to 3.2 mm. The thickness is preferably 0.38 to 2.1 mm, particularly preferably 0.38 to 1.60 mm.

  In FIG. 1, the vertical dimension L0 of the multilayer ceramic capacitor 2 is drawn as the length in the Y-axis direction of the capacitor element body 4, but the length of the multilayer ceramic capacitor 2 including the terminal electrodes 6 and 8 is It is almost the same. In the drawing, the thicknesses of the terminal electrodes 6 and 8 are drawn to be thicker than the actual thickness for ease of illustration, but in actuality, each is about 10 to 50 μm, which is much larger than the vertical dimension L0. thin. In the drawings, the X axis, the Y axis, and the Z axis are perpendicular to each other, the Z axis coincides with the stacking direction of the inner dielectric layer 10 and the internal electrode layer 12, and the Y axis indicates the extraction region 15A and This corresponds to the direction in which 15B (leaders 12A and 12B) is formed.

  As shown in FIG. 2, the height dimension H0 of the multilayer ceramic capacitor 2 varies depending on the number of laminated inner dielectric layers 10 and internal electrode layers 12, but is generally 0.2 to 3.2 mm. In this embodiment, it is preferably 0.2 to 1.6 mm. In FIG. 2, the height dimension H0 of the multilayer ceramic capacitor 2 is depicted as the thickness of the capacitor element body 4 in the Z-axis direction, but the terminal electrodes 6 and 8 shown in FIG. The thickness including these is substantially the same.

  The width dimension W0 of the multilayer ceramic capacitor 2 is generally 0.2 to 5.0 mm, but in this embodiment, it is 0.59 mm or less, preferably 0.10 to 0.59 mm, and more preferably 0. .15 to 0.59 mm, particularly preferably 0.185 to 0.47 mm. In the case where the thickness of the dielectric layer is 0.4 μm or less, if the width dimension W0 is too large, cracks are likely to occur in the manufactured capacitor body. The following can be considered as the cause.

  When the thickness of the dielectric layer is reduced, the density of the internal electrode layer is relatively increased in the interior region 13 that is the capacitance forming portion, and between the ceramic layers constituting the side protection region 16 and the exterior region 11 during firing. It is conceivable that the acting stress increases. In particular, when the thickness of the dielectric layer is 0.4 μm or less and the width dimension W0 is 0.80 mm or more, the density of the internal electrodes in the interior region 13 that is the capacity forming portion is large, and the area (volume) occupied in the ceramic capacitor is further increased. ) Is also large, and the influence of stress is large and cracks are likely to occur.

  The thickness td (see FIG. 2) of each inner dielectric layer 10 is generally several μm to several tens of μm, but in the present embodiment, 0.4 μm or less, preferably 0.4 to 0.1 μm. More preferably, it is 0.4 to 0.3 μm. The thickness te (see FIG. 2) of the internal electrode layer 12 is preferably about the same as the thickness of the inner dielectric layer 10, but more preferably determined so that te / td is less than 1.25. Preferably, te / td is determined to be 0.95 to 1.05. By comprising in this way, the crack suppression effect improves.

  In the present embodiment, the width Wgap in the X-axis direction of each side surface protection region 16 shown in FIG. 2 is the outer surface (X-axis) of the ceramic body 4 along the width direction (X-axis direction) of the ceramic body 4. (The end surface in the direction) to the end of the internal electrode layer 12. The width Wgap is 0.010 to 0.025 mm, preferably 0.015 to 0.025 mm. If the width Wgap is too small, cracks are likely to occur. If the width Wgap is too large, the capacitance tends to decrease greatly.

  The width Wgap is determined in relation to the width dimension W0 of the capacitor 2. In this embodiment, the ratio Wgap / W0 is 0.025 or more. If this ratio is too small, cracks are likely to occur. Tend to be. Note that the width Wgap in the X-axis direction of each side surface protection region 16 formed on both sides in the X-axis direction of the capacitor element body 4 is the same or different from each other on the condition that the above condition is satisfied. Also good.

  Further, the thickness t0 (see FIG. 1) of the exterior region 11 is not particularly limited, but is preferably in the range of 15 to 200 μm, more preferably 15 to 80 μm. By setting the thickness t0 as described above, the internal electrode layer 12 and the inner dielectric layer 10 can be protected while suppressing cracks, and the size can be reduced. Each of the thicknesses t0 of the exterior regions 11 formed on both sides in the Z-axis direction of the capacitor body 4 may be the same as or different from each other on the condition that the above conditions are satisfied.

  In particular, in the present embodiment, when the average particle diameter of the first dielectric particles constituting the inner dielectric layer 10 is Di and the average particle diameter of the second dielectric particles located in the exterior region 11 is Dg, The relationship is preferably Dg / Di ≧ 1, more preferably Dg / Di ≧ 1.05, and particularly preferably Dg / Di ≧ 1.15. With this configuration, even when the dielectric layer is thinned, the capacitance is further improved. In general, it has been reported that the dielectric constant decreases as the dielectric layer becomes thinner. However, the present inventors have found that by controlling the particle size of the dielectric particles in a specific region, it is possible to suppress a decrease in relative dielectric constant even if the dielectric layer is thinned.

  In the present embodiment, when the average particle diameter of the first dielectric particles constituting the inner dielectric layer 10 is Di and the average particle diameter of the third dielectric particles constituting the extraction regions 15A and 15B is Dh. Preferably, Dh / Di ≧ 1, more preferably Dh / Di ≧ 1.1, and particularly preferably Dh / Di ≧ 1.2. With this configuration, even when the dielectric layer is thinned, the capacitance is further improved. In general, it has been reported that the dielectric constant decreases as the dielectric layer becomes thinner. However, the present inventors have found that by controlling the particle size of the dielectric particles in a specific region, it is possible to suppress a decrease in relative dielectric constant even if the dielectric layer is thinned.

  The reason why the decrease in the dielectric constant can be suppressed even if the dielectric layer is made thin is considered as follows, for example.

  That is, by making the average particle size of the dielectric particles constituting the exterior region 11 or the extraction regions 15A and 15B larger than the average particle size of the dielectric particles in the capacitance region 14, the compressive stress is applied to the dielectric in the capacitance region 14. It is thought that will be given. Therefore, it is considered that the relative dielectric constant may be improved. Since the dielectric of the capacitance region 14 of the multilayer ceramic capacitor 2 is a polycrystal, the compression direction is not limited. In particular, increasing the crystal grain size of the dielectric in the exterior region 11 or the extraction regions 15A and 15B It is thought that it contributes to the improvement of the dielectric constant.

  In particular, it was confirmed that the dielectric layer 10 was particularly effective when the thickness was 0.5 μm or less. In the case of having a dielectric layer thicker than 0.5 μm, the relative dielectric constant is high even if compressive stress is not applied to the dielectric in the capacitance region of the multilayer ceramic capacitor (even if the particle ratio is not controlled). In the dielectric layer of 5 μm or less, it is possible to suppress the decrease in the relative permittivity and to improve the relative permittivity.

  From this point of view, the same can be said for the dielectric particles in the side surface protection region 16 that can be composed of the same dielectric particles as the extraction regions 15A and 15B. That is, when the average particle diameter of the first dielectric particles constituting the inner dielectric layer 10 is Di and the average particle diameter of the fourth dielectric particles constituting the side surface protection region 16 is Dh ′, preferably Dh '/ Di ≧ 1, more preferably Dh ′ / Di ≧ 1.1, particularly preferably Dh ′ / Di ≧ 1.2.

Manufacturing Method of Multilayer Ceramic Capacitor Next, a manufacturing method of the multilayer ceramic capacitor 2 as one embodiment of the present invention will be described.

  First, in order to manufacture the inner green sheet 10a that will constitute the inner dielectric layer 10 shown in FIG. 1 and the outer green sheet 11a that will constitute the outer dielectric layer of the exterior region 11 after firing, A sheet paste and an outer green sheet paste are prepared.

  The inner green sheet paste and the outer green sheet paste are usually composed of an organic solvent-based paste or an aqueous paste obtained by kneading ceramic powder and an organic vehicle.

  The raw material for the ceramic powder is appropriately selected from various compounds to be composite oxides and oxides, such as carbonates, nitrates, hydroxides, organometallic compounds, and the like, and can be used as a mixture. In this embodiment, the raw material of the ceramic powder is used as a powder having an average particle size of 0.45 μm or less, preferably about 0.1 to 0.3 μm. In order to make the inner green sheet extremely thin, it is desirable to use a powder finer than the thickness of the green sheet.

  An organic vehicle is obtained by dissolving a binder in an organic solvent. The binder used for the organic vehicle is not particularly limited, and may be appropriately selected from usual various binders such as ethyl cellulose and polyvinyl butyral.

  Further, the organic solvent to be used is not particularly limited, and may be appropriately selected from various organic solvents such as terpineol, butyl carbitol, acetone, toluene and the like according to a method to be used such as a printing method or a sheet method.

  The green sheet paste may contain additives selected from various dispersants, plasticizers, dielectrics, subcomponent compounds, glass frit, insulators and the like, if necessary.

  Examples of the plasticizer include phthalate esters such as dioctyl phthalate and benzylbutyl phthalate, adipic acid, phosphate esters, glycols, and the like.

  Next, an internal electrode pattern layer paste for forming the internal electrode layer 12 shown in FIG. 1 is prepared. The internal electrode pattern layer paste is obtained by kneading the above-mentioned organic vehicle with various conductive metals and alloys as described above, or various oxides, organometallic compounds, resinates, etc. that become the above-mentioned conductive materials after firing. Prepare. The internal electrode pattern layer paste may contain a ceramic powder as a co-material, if necessary. The common material has an effect of suppressing the sintering of the conductive powder in the firing process.

  Using the inner green sheet paste and the internal electrode pattern layer paste prepared above, as shown in FIG. 3, an inner green sheet 10a that becomes the inner dielectric layer 10 after firing, and the inner electrode layer 12 after firing. The internal electrode pattern layers 12a are alternately laminated, and the internal laminate 13a that becomes the interior region 13 after firing is manufactured. And after manufacturing the inner laminated body 13a, or before that, the outer side green sheet 11a used as the outer side dielectric layer of the exterior area | region 11 is formed after baking using the paste for outer side green sheets.

  Specifically, first, the inner green sheet 10a is formed on a carrier sheet (for example, a PET film) as a support by a doctor blade method or the like. The inner green sheet 10a is dried after being formed on the carrier sheet.

  Next, the internal electrode pattern layer 12a is formed on the surface of the inner green sheet 10a formed above using the internal electrode pattern layer paste, and the inner green sheet 10a having the internal electrode pattern layer 12a is obtained. And the inner side green sheet 10a which has the obtained internal electrode pattern layer 12a is laminated | stacked alternately, and the internal laminated body 13a is obtained. A method for forming the internal electrode pattern layer 12a is not particularly limited, and examples thereof include a printing method and a transfer method. In addition, you may laminate | stack the inner side green sheet 10a which has the internal electrode pattern layer 12a through the contact bonding layer.

  The outer green sheet 11a is formed on a carrier sheet as a support similarly to the inner green sheet 10a. The outer green sheet 11a is dried after being formed on the carrier sheet. The outer green sheet 11a is sufficiently thicker than the inner green sheet 10a.

  As shown in FIG. 4, an internal electrode pattern layer 12a is formed on the surface of the inner green sheet 10a, and a gap 30 along the longitudinal direction Y of the internal electrode pattern layer 12a and an internal electrode pattern are formed between them. A gap 32 is formed along the lateral direction X of the layer 12a, and these form a lattice-like pattern when viewed from the plane. The step absorption layer 20 shown in FIG. 3 may be formed in the gaps 30 and 32 of these lattice patterns. In FIG. 3, only the gap 32 is shown.

  By forming the step absorption layer 20 in the gaps 30 and 32, there is no step due to the internal electrode pattern layer 12a on the surface of the green sheet 10a, which contributes to prevention of deformation of the capacitor body 4 finally obtained. The step absorption layer 20 is formed by a printing method or the like, for example, similarly to the internal electrode pattern layer 12a. The step absorption layer 20 includes a ceramic powder and an organic vehicle similar to the green sheet 10a. However, unlike the green sheet 11a, the step absorption layer 20 is formed by printing and is adjusted so that printing is easy. Examples of the printing method include screen printing and gravure printing, and are not particularly limited, but screen printing is preferable.

  The organic binder component (polymer resin + plasticizer) and various additives in the printing paste for forming the step absorption layer 20 are the same as those used in the green sheet slurry. However, these are not necessarily the same as those used for the green sheet slurry, and may be different. The thickness of the step absorption layer 20 is not particularly limited, but is preferably 50 to 100% of the thickness of the internal electrode pattern layer 12a.

  Instead of laminating the inner laminate 13a on the outer green sheet 11a, a predetermined number of inner green sheets 10a and inner electrode pattern layers 12a may be alternately laminated on the outer green sheet 11a. Alternatively, a laminate unit in which a plurality of inner green sheets 10a and a plurality of internal electrode pattern layers 12a are alternately stacked may be prepared in advance, and a predetermined number of them may be stacked on the outer green sheet 11a.

  As shown in FIGS. 5A and 5B, the obtained green laminated body 4a is cut into a predetermined size along a cutting line C, for example, to obtain a green chip. The green chip is solidified by removing the plasticizer by solidification drying. The green chip after solidification drying is put into a barrel container together with a medium and a polishing liquid, and barrel-polished by a horizontal centrifugal barrel machine or the like. The green chip after barrel polishing is washed with water and dried. The capacitor body 4 shown in FIG. 1 is obtained by performing a binder removal process, a firing process, and an annealing process performed as necessary on the dried green chip. 5A and 5B are schematic cross-sectional views only, and the number of layers and the dimensional relationship are different from actual ones.

  The sintered body (element body 4) thus obtained is subjected to end face polishing by barrel polishing or the like, and terminal electrode paste is baked to form terminal electrodes 6 and 8. Then, if necessary, a pad layer is formed on the terminal electrodes 6 and 8 by plating or the like. The terminal electrode paste may be prepared in the same manner as the internal electrode pattern layer paste described above.

  The multilayer ceramic capacitor 2 manufactured in this way is mounted on a printed circuit board by soldering or the like and used for various electronic devices.

  According to the multilayer ceramic capacitor 2 of the present embodiment, the thickness of the dielectric layer 10 is 0.4 μm or less, the width dimension W0 is 0.59 mm or less, and the gap dimension Wgap is 0.010 to 0.025 mm. The ratio Wgap / W0 between the gap dimension and the width dimension is 0.025 or more. For this reason, even when the thickness of the dielectric layer is reduced, the generation of cracks can be suppressed, and the capacitance is hardly reduced.

  The present invention is not limited to the above-described embodiment, and can be variously modified within the scope of the present invention.

  For example, in the normal manufacturing method described above, a dielectric paste is used as a raw material for forming each dielectric particle constituting the inner dielectric layer 10, the exterior region 11, and the extraction regions 15A and 15B shown in FIGS. The contained dielectric particles have substantially the same particle size. Therefore, in the resulting multilayer ceramic capacitor 2 shown in FIGS. 1 and 2, if the thickness of the dielectric layer 10 sandwiched between the internal electrode layers 12 is reduced to 0.4 μm or less, the dielectric layer 10 is sandwiched between the internal electrode layers 12. The dielectric particles 10 in the dielectric layer 10 have a larger average particle size than the dielectric particles in the regions 11, 15A and 15B that are not sandwiched between the internal electrode layers. The reason is considered that the grain growth of the dielectric layer 10 sandwiched between the internal electrode layers 12 is more likely to proceed.

  That is, in the above-described embodiment, when the average particle diameter of the first dielectric particles constituting the dielectric layer 10 is Di and the average particle diameter of the second dielectric particles located in the exterior region 11 is Dg, Dg / Di <1. In the above-described embodiment, Dh / Di <1 when the average particle diameter of the third dielectric particles constituting the extraction regions 15A and 15B is Dh. Furthermore, when the average particle diameter of the fourth dielectric particles constituting the side surface protection region 16 is Dh ′, Dh ′ / Di <1.

  Therefore, in the manufacturing method according to another embodiment of the present invention, the average particle diameter of dielectric particles as a dielectric paste material for constituting the inner dielectric layer 10 shown in FIGS. And / or larger than the average particle size of the dielectric particles contained in the dielectric paste material for forming the dielectric particles constituting the extraction regions 15A and 15B. Or, conversely, each dielectric constituting the exterior region 11 and / or the extraction regions 15A and 15B in comparison with the average particle size of dielectric particles as a dielectric paste raw material for constituting the inner dielectric layer 10 The average particle diameter of the dielectric particles contained in the dielectric paste raw material for forming the particles is reduced.

  As a result, the capacitor body 4 after firing can satisfy the relationship of Dg / Di ≧ 1, or Dh / Di ≧ 1, or Dh ′ / Di ≧ 1, or all of these relationships. The reason can be considered as follows. The smaller the particle size of the dielectric particles of the dielectric paste material, the more active it is against heat. Therefore, grain growth is likely to occur during firing. Therefore, the average particle size of the dielectric particles constituting the exterior region 11 and / or the extraction regions 15A and 15B is made smaller than the average particle size of the dielectric particles for constituting the inner dielectric layer 10 that is the capacitor portion. As a result, the dielectric particles constituting the exterior region 11 and / or the extraction regions 15A and 15B are more easily grown than the dielectric particles for constituting the inner dielectric layer 10 which is the capacitor portion. As a result, the dielectric particles in the exterior region 11 and / or the extraction regions 15A and 15B can be made larger.

  In such a relationship, even if the inner dielectric layer 10 is thinned, the capacitance is further improved. In general, it has been reported that the dielectric constant decreases as the dielectric layer 10 becomes thinner. However, the present inventors have found that by controlling the particle size of dielectric particles in a specific region, it is possible to suppress a decrease in relative dielectric constant even if the dielectric layer 10 is thinned.

  Furthermore, in the present invention, the above-described relationship may be satisfied in the sintered capacitor body 4 by a method other than changing the average particle diameter of the dielectric particles of the dielectric paste raw material. For example, compared with the composition of dielectric particles as a dielectric paste raw material for constituting the inner dielectric layer 10, each dielectric particle constituting the exterior region 11 and / or the extraction regions 15A and 15B is formed. The composition of the dielectric particles contained in the dielectric paste raw material may be varied. For example, the composition of the dielectric particles contained in the dielectric paste raw material for forming the dielectric particles constituting the exterior region 11 and / or the extraction regions 15A and 15B may be a composition that facilitates grain growth.

  Alternatively, the particle size of the dielectric particles after firing can be controlled by interposing a dummy electrode not connected to the terminal electrodes 6 and 8 between the outer dielectric green sheets in the exterior region 11. .

  The multilayer ceramic electronic component of the present invention can be applied not only to multilayer ceramic capacitors but also to other multilayer ceramic electronic components. Other multilayer ceramic electronic components are all electronic components in which dielectric layers are laminated via internal electrodes, such as bandpass filters, inductors, laminated three-terminal filters, piezoelectric elements, PTC thermistors, NTC thermistors, Examples include varistors.

  Hereinafter, although this invention is demonstrated based on a more detailed Example, this invention is not limited to these Examples.

Example 1
First, the main mean particle size as a raw material powder of the raw material is _{100nm {(Ba 1-x-} y Ca x Sr y) O} u (Ti 1-z Zr z) v O 3 powder (x = 0.05, y = 0, Z = 0.05, u / v = 1.004), and then MgCO ₃ , MnCO ₃ , Y ₂ O ₃ and SiO ₂ were prepared as subcomponents. In addition, the auxiliary component was preliminarily crushed and processed to about 40 nm, which is smaller than the particle diameter of the barium titanate raw material.

Then each raw material powder was prepared previously for the main raw material 100 moles, MgCO ₃ powder 0.5 mol, MnCO ₃ powder 0.3 _mol, Y 2 _{O 3} powder 0.2 mol and SiO ₂ powder Was weighed 2 moles. Each of these powders was wet-mixed and dried for 20 hours by a ball mill to obtain a dielectric material for a capacity part. The BaCO ₃ and MnCO ₃ added at this time are contained in the dielectric ceramic composition as BaO and MnO, respectively, after firing.

  Next, the obtained dielectric material: 100 parts by weight, polyvinyl butyral resin: 10 parts by weight, dioctyl phthalate (DOP) as a plasticizer: 5 parts by weight, and alcohol as a solvent: 100 parts by weight with a ball mill The mixture was made into a paste, and a dielectric layer paste in the capacitor region 14 was obtained.

  In addition to the above, Ni particles: 44.6 parts by weight, terpineol: 52 parts by weight, ethyl cellulose: 3 parts by weight, and benzotriazole: 0.4 parts by weight are kneaded by three rolls to obtain a paste. To prepare an internal electrode layer paste.

  Further, as the dielectric material for the exterior region 11, a main material powder having an average particle diameter of 100 nm, which is the same as that of the dielectric particles in the capacitor region 14, was prepared. By the same method as that for the dielectric material in the interior region 13, subcomponents were wet mixed and pasted to obtain a dielectric paste in the exterior region.

  And the green sheet was formed on PET film using the dielectric layer paste produced above. At this time, the thickness of the green sheet was adjusted so as to obtain the thickness td of the dielectric layer after firing shown in Table 1. Next, the electrode layer was printed in a predetermined pattern using the internal electrode layer paste. The thickness of the electrode layer of the predetermined pattern was adjusted so that the thickness te of the internal electrode layer after firing shown in Table 1 was obtained.

  Further, in order to fill the step in the portion where the electrode is not printed, pattern printing is performed using the same paste as the dielectric paste in the capacitor region 14, thereby forming the step absorption layer 20, and the internal electrode pattern layer 12a. And a green sheet 10a having a step absorption layer 20 was produced.

  Next, a green sheet was formed on the PET film using a dielectric paste for forming the exterior region 11. The thickness of the green sheet for forming the exterior region 11 was 10 μm. At this time, a green sheet using a dielectric material of 100 nm was used to form a green sheet for forming the exterior region 11.

  A plurality of green sheets for the interior region 13 having an internal electrode layer and a plurality of green sheets for the exterior region 11 are laminated and pressure-bonded to form a green laminate, and the green laminate is cut into a predetermined size. As a result, a green chip was obtained.

  Next, the obtained green chip was subjected to binder removal processing, firing and annealing under the following conditions to obtain a multilayer ceramic fired body.

  The binder removal treatment conditions were a temperature increase rate of 25 ° C./hour, a holding temperature: 235 ° C., a holding time: 8 hours, and an atmosphere: in the air.

The firing conditions were a temperature rising rate of 600 to 1000 ° C./hour, a holding temperature of 1100 to 1150 ° C., and a holding time of 1 hour. The cooling rate was 200 ° C./hour. The atmospheric gas was a humidified N ₂ + H ₂ mixed gas, and the oxygen partial pressure was 10 ⁻¹² MPa.

The annealing conditions are as follows: heating rate: 200 ° C./hour, holding temperature of 1050 ° C., holding time: 3 hours, cooling rate: 200 ° C./hour, atmospheric gas: humidified N ₂ gas (oxygen partial pressure: 10 ⁻⁷ MPa) It was.

  A wetter was used for humidifying the atmospheric gas during firing and annealing.

  Next, after end-barreling the end face of the obtained multilayer ceramic fired body, Cu paste was applied as an external electrode and baked in a reducing atmosphere, and the multilayer ceramic capacitor samples (sample numbers 1 to 25 shown in Table 1) Hereinafter, it may be simply referred to as “capacitor sample”).

  As shown in Table 1, the vertical dimension L0, the width dimension W0, and the width Wgap of the obtained capacitor sample were changed for each sample.

  About the obtained capacitor | condenser sample, the electrostatic capacitance and the crack generation rate were confirmed by the method shown below.

(Capacitance)
The capacitance was measured with respect to the capacitor sample at a reference temperature of 25 ° C. with a digital LCR meter under the conditions of a frequency of 1.0 kHz and an input signal level (measurement voltage) of 1.0 Vrms. However, the numerical value of the electrostatic capacity shown in Table 1 is the electrostatic capacity when the electrostatic capacity when Wgap is 0.020 is set to 1 with respect to a specific capacitor body of L0 size and W0 size. Represents the ratio. For example, the capacitances of sample numbers 3 to 7 are ratios based on the capacitance of sample number 5. The electrostatic capacity was 0.90 or more. The results are shown in Table 1.

(Crack occurrence rate)
The method for measuring the crack occurrence rate is the ratio at which cracks were detected by visually observing the appearance of the prepared sample (n = 1000) using a microscope or the like. A crack generation rate of 0 to 1.0 is good, and 0 to 0.1 is particularly good. The results are shown in Table 1.

Example 2
As shown in Table 2, a multilayer ceramic capacitor sample was obtained in the same manner as in Example 1 except that the thickness td of the fired dielectric layer 10 and the thickness te of the fired internal electrode layer 12 were set to 0.3 μm. Were prepared, and their capacitance and crack generation rate were measured. The results are shown in Table 2.

Evaluation 1
From the results shown in Table 1 and Table 2, the thickness td of the dielectric layer is 0.4 μm or less, the width dimension W0 is 0.59 mm or less, the gap dimension Wgap is 0.010 to 0.025 mm, and the ratio (Wgap / W0 dimension) was 0.025 or more, and it was confirmed that a multilayer ceramic capacitor with a low crack generation rate and a small decrease in capacitance was obtained.

Example 3
As shown in Table 3, samples of the multilayer ceramic capacitor were prepared in the same manner as in Example 1 except that the thickness te of the internal electrode layer 12 after firing was changed, and their capacitance and crack generation rate. Was measured. The results are shown in Table 3.

Evaluation 2
From the results shown in Table 3, when te / td is less than 1.25, particularly preferably, when te / td is 0.95 to 1.05, the number of cracks is small, and the decrease in capacitance is small. It was confirmed that a ceramic capacitor was obtained.

Example 4
As shown in Table 4, the sample 16 of Example 1 is the same as the sample 16 of Example 1 except that the average particle diameter Dg of the dielectric particles in the exterior region 11 is changed as compared with the average particle diameter Di of the dielectric particles in the capacitor region 14. Similarly, samples of multilayer ceramic capacitors (sample numbers 16a to 16b) were prepared, and their capacitance and crack generation rate were measured. The results are shown in Table 4. In order to obtain a relationship of Dg / Di of 1 or more, the average particle diameter of the raw material dielectric particles contained in the dielectric paste for forming the exterior region 11 was set to 60 nm.

Example 5
As shown in Table 5, the sample of Example 1 except that the average particle diameter Dh of the dielectric particles in the extraction regions 15A and 15B was changed as compared with the average particle diameter Di of the dielectric particles in the capacitance region 14 In the same manner as in Example 16, samples of multilayer ceramic capacitors (sample numbers 16c to 16d) were prepared, and their capacitance and crack generation rate were measured. The results are shown in Table 5. In order to obtain a relationship of Dh / Di of 1 or more, the average particle diameter of the raw material dielectric particles contained in the step absorption dielectric paste for forming the extraction regions 12A and 12B and the side surface protection region 16 was set to 60 nm. .

  The average particle size of the dielectric particles after firing was confirmed by the method shown below.

(Average particle size of dielectric)
The capacitor sample was set up vertically so that the stacking direction was on the upper side, and the periphery of the sample was filled with a cured resin using a Teflon (registered trademark) container having a diameter of 25 mm and a length of 20 mm. Then, after polishing so that a cross section in the longitudinal direction of the sample appeared using a sandpaper and a microfabricated polishing machine, milling using argon ions was performed in order to remove surface damage.

  The processed sample was magnified 20,000 times with an electron microscope to observe the dielectric particles in the capacitance region 14, the exterior region 11, and the extraction regions 15A and 15B, and the cross-sectional area of 500 particles using image processing software From this, the equivalent circle diameter was calculated.

Evaluation 3
From the results shown in Table 4, when the relationship of Dg / Di ≧ 1, more preferably Dg / Di ≧ 1.05, particularly preferably Dg / Di ≧ 1.15, the dielectric layer is thinned. It was confirmed that the electrostatic capacity was further improved and the crack generation rate was low.

  Further, from the results shown in Table 5, when the relationship Dh / Di ≧ 1, more preferably Dh / Di ≧ 1.1, particularly preferably Dh / Di ≧ 1.2, the dielectric layer is thinned. It was confirmed that the electrostatic capacity was further improved and the crack generation rate was low.

  In Example 5, since the average particle size of the raw material dielectric particles contained in the step absorbing dielectric paste was set to 60 nm, the average particle size of the fired dielectric particles contained in the side surface protection region 16 shown in FIG. It is confirmed that the diameter Dh ′ is larger than the average particle diameter Di of the dielectric particles in the capacitance region 14, and Dh ′ / Di is substantially the same as Dh / Di.

2 ... multilayer ceramic capacitor 4 ... capacitor body 6 ... first terminal electrode 8 ... second terminal electrode 10 ... inner dielectric layer 10a ... inner green sheet 11 ... exterior region 11a ... outer green sheet 12 ... inner electrode layer 12A, 12B ... Lead-out part 12a ... Internal electrode pattern layer 13 ... Interior area 13a ... Internal laminated body 14 ... Capacity area 15A, 15B ... Lead-out area 16 ... Side surface protection area 20 ... Step absorption layer

Claims (11)

A ceramic body formed by alternately laminating a plurality of dielectric layers and a plurality of internal electrode layers;
A multilayer ceramic electronic component having at least a pair of external electrodes connected to the internal electrode layer on the surface of the ceramic body,
The dielectric layer has a thickness of 0.5 μm or less,
The average particle diameter of the first dielectric particles constituting the dielectric layer located between the internal electrode layers along the stacking direction is Di,
When the average particle diameter of the fourth dielectric particles constituting the side surface protection region is Dh ′,
A multilayer ceramic electronic component, wherein Dh ′ / Di> 1. A ceramic body formed by alternately laminating a plurality of dielectric layers and a plurality of internal electrode layers;
A multilayer ceramic electronic component having at least a pair of external electrodes connected to the internal electrode layer on the surface of the ceramic body,
The dielectric layer has a thickness of 0.5 μm or less,
The average particle diameter of the first dielectric particles constituting the dielectric layer located between the internal electrode layers along the stacking direction is Di,
When the average particle diameter of the third dielectric particles constituting the extraction region located between the extraction portions of the internal electrode layer connected to any one of the external electrodes is Dh,
A multilayer ceramic electronic component, wherein Dh / Di> 1. A ceramic body formed by alternately laminating a plurality of dielectric layers and a plurality of internal electrode layers;
A multilayer ceramic electronic component having at least a pair of external electrodes connected to the internal electrode layer on the surface of the ceramic body,
The average particle diameter of the first dielectric particles constituting the dielectric layer located between the internal electrode layers along the stacking direction is Di,
When the average particle diameter of the fourth dielectric particles constituting the side surface protection region is Dh ′,
Dh ′ / Di> 1 and
When the average particle diameter of the third dielectric particles constituting the extraction region located between the extraction portions of the internal electrode layer connected to any one of the external electrodes is Dh,
A multilayer ceramic electronic component, wherein Dh / Di> 1. A ceramic body formed by alternately laminating a plurality of dielectric layers and a plurality of internal electrode layers;
A multilayer ceramic electronic component having at least a pair of external electrodes connected to the internal electrode layer on the surface of the ceramic body,
The average particle diameter of the first dielectric particles constituting the dielectric layer located between the internal electrode layers along the stacking direction is Di,
When the average particle diameter of the fourth dielectric particles constituting the side surface protection region is Dh ′,
Dh ′ / Di> 1 and
When the average particle diameter of the second dielectric particles located in the exterior region located outside the interior direction of the interior region in which the internal electrode layer is laminated with the dielectric layer sandwiched along the lamination direction is Dg,
A multilayer ceramic electronic component in which Dg / Di> 1. A ceramic body formed by alternately laminating a plurality of dielectric layers and a plurality of internal electrode layers;
A multilayer ceramic electronic component having at least a pair of external electrodes connected to the internal electrode layer on the surface of the ceramic body,
The average particle diameter of the first dielectric particles constituting the dielectric layer located between the internal electrode layers along the stacking direction is Di,
When the average particle diameter of the third dielectric particles constituting the extraction region located between the extraction portions of the internal electrode layer connected to any one of the external electrodes is Dh,
Dh / Di> 1 and
When the average particle diameter of the second dielectric particles located in the exterior region located outside the interior direction of the interior region in which the internal electrode layer is laminated with the dielectric layer sandwiched along the lamination direction is Dg,
A multilayer ceramic electronic component in which Dg / Di> 1.   The multilayer ceramic electronic component according to claim 1, wherein Dh ′ / Di ≧ 1.1.   The multilayer ceramic electronic component according to claim 2, wherein Dh / Di ≧ 1.1.   The multilayer ceramic electronic component according to claim 4, wherein Dg / Di ≧ 1.05.   The multilayer ceramic electronic component according to claim 1, wherein a ratio (te / td) of a thickness (te) of the internal electrode layer and a thickness (td) of the dielectric layer is less than 1.25. .   The multilayer ceramic electronic component according to claim 3, wherein the dielectric layer has a thickness of 0.5 μm or less. The width dimension (W0) along the width direction of the ceramic body is 0.59 mm or less,
A gap dimension (Wgap) from the outer surface of the ceramic body to the end of the internal electrode layer along the width direction of the ceramic body is 0.010 to 0.025 mm.
The multilayer ceramic electronic component according to any one of claims 1 to 10, wherein a ratio (Wgap / W0 dimension) between the gap dimension and the width dimension is 0.025 or more.

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