JP2019144528A - 表示装置及びその動作方法、並びに電子機器 - Google Patents
表示装置及びその動作方法、並びに電子機器 Download PDFInfo
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- JP2019144528A JP2019144528A JP2018207883A JP2018207883A JP2019144528A JP 2019144528 A JP2019144528 A JP 2019144528A JP 2018207883 A JP2018207883 A JP 2018207883A JP 2018207883 A JP2018207883 A JP 2018207883A JP 2019144528 A JP2019144528 A JP 2019144528A
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Classifications
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- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
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Abstract
Description
本実施の形態では、本発明の一態様である表示装置について、図面を参照して説明する。
図1は、本発明の一態様の表示装置に用いることができる画素10aを説明する図である。画素10aは、トランジスタ102と、トランジスタ111と、トランジスタ112と、トランジスタ114と、容量素子103と、容量素子113と、EL素子104を有する。
図2(A)、(B)に示すタイミングチャートを用いて、画素10aの動作例の詳細を説明する。なお、以下の説明においては、高電位を電位VDD、低電位を電位VSSで表す。ここで、電位VSSは、例えば接地電位とすることができる。また、配線124に供給される画像信号S1の電位VS1は正負の任意の電位とすることができるが、ここでは電位VSS以上の電位である場合を説明する。
図5は、本発明の一態様の表示装置の構成例を示すブロック図である。当該表示装置は、画素10がマトリクス状に設けられた画素アレイと、ゲートドライバ12と、ソースドライバ13と、照度センサ14と、デマルチプレクサ15と、を有する。画素10としては、前述した画素10aを適用することができる。なお、デマルチプレクサ15の個数は、例えば画素アレイに設けられた画素10の列数と同数とすることができる。また、ソースドライバ13と、デマルチプレクサ15と、をまとめてソースドライバと呼んでもよい。つまり、デマルチプレクサ15は、ソースドライバに含まれるとしてもよい。
次に、画素10の変形例について説明する。画素10は、図7(A)に示す画素10bの構成とすることもできる。画素10bは、画素10aからトランジスタ102を省いた構成である。
本実施の形態では、EL素子を用いた表示装置の構成例について説明する。
本実施の形態では、上記実施の形態に示した各トランジスタに置き換えて用いることのできるトランジスタの一例について、図面を用いて説明する。
図12(A1)は、ボトムゲート型のトランジスタの一種であるチャネル保護型のトランジスタ810の断面図である。図12(A1)において、トランジスタ810は基板771上に形成されている。また、トランジスタ810は、基板771上に絶縁層772を介して電極746を有する。また、電極746上に絶縁層726を介して半導体層742を有する。電極746はゲート電極としての機能を有する。絶縁層726はゲート絶縁層としての機能を有する。
図13(A1)に例示するトランジスタ842は、トップゲート型のトランジスタの1つである。トランジスタ842は、絶縁層729を形成した後に電極744a及び電極744bを形成する。電極744a及び電極744bは、絶縁層728及び絶縁層729に形成した開口部において半導体層742と電気的に接続する。
本発明の一態様に係る表示装置を用いることができる電子機器として、表示機器、パーソナルコンピュータ、記録媒体を備えた画像記憶装置又は画像再生装置、携帯電話、携帯型を含むゲーム機、携帯データ端末、電子書籍端末、ビデオカメラ又はデジタルスチルカメラ等のカメラ、ゴーグル型ディスプレイ(ヘッドマウントディスプレイ)、ナビゲーションシステム、音響再生装置(カーオーディオ、デジタルオーディオプレイヤー等)、複写機、ファクシミリ、プリンタ、プリンタ複合機、現金自動預け入れ払い機(ATM)、自動販売機等が挙げられる。これら電子機器の具体例を図14に示す。
本実施の形態では、上記実施の形態で例示した、画像記憶装置等の記憶装置に適用可能な半導体装置について説明する。
10a 画素
10b 画素
10c 画素
10d 画素
12 ゲートドライバ
13 ソースドライバ
14 照度センサ
15 デマルチプレクサ
102 トランジスタ
103 容量素子
104 EL素子
105 トランジスタ
111 トランジスタ
112 トランジスタ
113 容量素子
114 トランジスタ
121 配線
122 配線
124 配線
125 配線
126 配線
128 電源線
129 共通配線
130 配線
200 表示装置
215 表示部
221 走査線駆動回路
231 信号線駆動回路
232 信号線駆動回路
241 共通線駆動回路
723 電極
726 絶縁層
728 絶縁層
729 絶縁層
741 絶縁層
742 半導体層
744a 電極
744b 電極
746 電極
755 不純物
771 基板
772 絶縁層
810 トランジスタ
811 トランジスタ
820 トランジスタ
821 トランジスタ
825 トランジスタ
826 トランジスタ
842 トランジスタ
843 トランジスタ
844 トランジスタ
845 トランジスタ
846 トランジスタ
847 トランジスタ
901 筐体
902 表示部
903 表示部
904 センサ
911 筐体
912 表示部
913 スピーカ
919 カメラ
921 柱
922 表示部
951 筐体
952 表示部
953 操作ボタン
954 外部接続ポート
955 スピーカ
956 マイク
957 カメラ
961 筐体
962 シャッターボタン
963 マイク
965 表示部
966 操作キー
967 スピーカ
968 ズームレバー
969 レンズ
971 筐体
973 表示部
974 操作キー
975 スピーカ
976 通信用接続端子
977 光センサ
1000 DOSRAM
1001 メモリセル
1002 センスアンプ部
1003 セルアレイ部
4001 基板
4005 シール材
4006 基板
4010 トランジスタ
4011 トランジスタ
4014 配線
4015 電極
4017 電極
4018 FPC
4019 異方性導電層
4020 容量素子
4021 電極
4030 電極層
4031 電極層
4041 プリント基板
4042 集積回路
4102 絶縁層
4103 絶縁層
4110 絶縁層
4111 絶縁層
4112 絶縁層
4200 入力装置
4210 タッチパネル
4227 電極
4228 電極
4237 配線
4238 配線
4239 配線
4263 基板
4272 FPC
4273 IC
4301 着色層
4302 遮光層
4510 隔壁
4511 発光層
4513 発光素子
4514 充填材
Claims (12)
- 画素と、回路と、を有する表示装置であって、
前記画素は、第1のトランジスタと、第2のトランジスタと、第3のトランジスタと、第4のトランジスタと、第1の容量素子と、第2の容量素子と、表示素子と、を有し、
前記第1のトランジスタのソース又はドレインの一方は、前記第1の容量素子の一方の電極と電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、第1の配線と電気的に接続され、
前記第2のトランジスタのソース又はドレインの一方は、前記第1の容量素子の他方の電極と電気的に接続され、
前記第2のトランジスタのソース又はドレインの他方は、第2の配線と電気的に接続され、
前記第1の容量素子の一方の電極は、前記第3のトランジスタのゲートと電気的に接続され、
前記第3のトランジスタのゲートは、前記第2の容量素子の一方の電極と電気的に接続され、
前記第3のトランジスタのソース又はドレインの一方は、前記第2の容量素子の他方の電極と電気的に接続され、
前記第2の容量素子の他方の電極は、前記第4のトランジスタのソース又はドレインの一方と電気的に接続され、
前記第4のトランジスタのソース又はドレインの他方は、前記表示素子の一方の電極と電気的に接続され、
前記回路は、前記第1の配線及び前記第2の配線と電気的に接続され、
前記回路は、前記第1の配線に、第1の画像信号を供給する機能を有し、
前記回路は、前記第2の配線に、参照電位を供給する機能を有し、
前記回路は、前記第2の配線に、第2の画像信号を供給する機能を有することを特徴とする表示装置。 - 請求項1において、
前記参照電位は、外光の照度に応じた大きさの電位であることを特徴とする表示装置。 - 請求項2において、
前記外光の照度が高いほど、前記参照電位の電位は小さいことを特徴とする表示装置。 - 請求項2又は3において、
前記参照電位は、負電位であることを特徴とする表示装置。 - 請求項1乃至4のいずれか一項において、
前記第1の容量素子の容量値は、前記第2の容量素子の容量値より大きいことを特徴とする表示装置。 - 請求項1乃至5のいずれか一項において、
前記表示素子は、有機EL素子であることを特徴とする表示装置。 - 請求項1乃至6のいずれか一項において、
前記第1のトランジスタは、チャネル形成領域に金属酸化物を有し、
前記金属酸化物は、Inと、Znと、M(MはAl、Ti、Ga、Sn、Y、Zr、La、Ce、Nd又はHf)と、を有することを特徴とする表示装置。 - 請求項1乃至7のいずれか一項に記載の表示装置と、カメラと、を有することを特徴とする電子機器。
- 表示素子と、第1の配線及び第2の配線と電気的に接続されたメモリ回路と、が設けられた画素を有する表示装置の動作方法であって、
前記第1の配線に、参照電位を供給し、
前記第2の配線を介して、前記メモリ回路に第1の画像信号を格納し、
前記第1の配線を介して、前記メモリ回路に第2の画像信号を供給することにより、前記第1の画像信号に前記第2の画像信号を付加し、
前記表示素子により、前記第1の画像信号に対応する画像と、前記第2の画像信号に対応する画像と、を重ね合わせた画像を表示することを特徴とする表示装置の動作方法。 - 請求項9において、前記参照電位は、外光の照度に応じた大きさの電位であることを特徴とする表示装置の動作方法。
- 請求項10において、
前記外光の照度が高いほど、前記参照電位の電位は小さいことを特徴とする表示装置の動作方法。 - 請求項10又は11において、
前記参照電位は、負電位であることを特徴とする表示装置の動作方法。
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