JP2019124569A - measuring device - Google Patents

Abstract

To increase the accuracy of measuring the position of a measuring device with an encoder.SOLUTION: The measuring device includes: a light source emitting light; a scale having a plurality of tracks with different patterns, the scale causing at least a part of the light emitted from the light source to pass through the scale; a light receiving unit having a plurality of light receiving elements outputting a light signal according to the intensity of light received through each track; an output amplifier for adjusting the waveforms of a plurality of light signals; and a controller for receiving control data for controlling the output amplifier. The controller has a digital filter 54a for outputting a second sampling value different from the first sampling value obtained by sampling at a sampling clock immediately before a plurality of sampling clocks under the condition that a plurality of sampling values are the same obtained by sampling the received control data at a shorter sampling clock than the cycle of the control data.SELECTED DRAWING: Figure 5

Description

  The present invention relates to a measuring device having an encoder.

  An optical encoder is known as a measuring device that measures the position or displacement amount of an object to be measured by specifying the positional relationship between a scale and a light receiving element. Patent Document 1 discloses an optical encoder that outputs an optical signal corresponding to the intensity of light received through a track provided on a scale.

Patent No. 5976279

  In order to make the offset and the amplitude of the optical signal in a good state, it is necessary to adjust the waveform of the optical signal based on control data output from a CPU (Central Processing Unit). When the CPU is mounted in the vicinity of a light receiving unit that receives light via a track, there is a problem that heat generated by the CPU affects the characteristics of the light receiving unit. Therefore, it is conceivable to increase the distance between the CPU and the light receiving unit by connecting the CPU and the light receiving unit with a cable.

  However, when the CPU and the light receiving unit are connected by a cable, the effect of external noise causes a problem that data error occurs in control data output from the CPU. When a data error occurs in the control data, the waveform of the optical signal is disturbed, and there is a problem that the measurement accuracy of the position of the object based on the optical signal is lowered.

  Then, this invention is made in view of these points, and an object of this invention is to improve the measurement precision of the position in the measuring apparatus which has an encoder.

  The measuring apparatus according to the present invention includes a light emitting unit that emits light, a scale having a plurality of tracks each having a different pattern, and at least a portion of the light emitted by the light emitting unit, and the plurality of tracks. A light receiving unit having a plurality of light receiving elements outputting light signals according to the intensity of the received light; a waveform adjusting unit adjusting the waveforms of the plurality of light signals; and control data for controlling the waveform adjusting unit And a communication processing unit for receiving.

  The communication processing unit includes: a receiving unit for receiving the control data; a sampling unit for sampling the control data received by the receiving unit with a sampling clock having a cycle shorter than a cycle of the control data; A sampling clock obtained immediately before sampling of the plurality of sampling clocks, provided that sampling values obtained by the sampling unit sampling the control data at a plurality of adjacent transition timings coincide with each other, And a digital filter unit that outputs a second sampling value different from one sampling value.

  The digital filter unit outputs an output value when the shift register that outputs a plurality of delay signals obtained by delaying the control data in synchronization with the sampling clock matches the values of the plurality of delay signals. And a match detection unit that does not change the output value to the values of the plurality of delay signals when the values of the plurality of delay signals do not match. The digital filter unit may further include a clock selection unit that selects the sampling clock from a plurality of clocks.

  The clock selection unit may select the sampling clock from the plurality of clocks including a first clock and a second clock obtained by dividing the first clock. Further, the clock selection unit may select the sampling clock from the plurality of clocks based on the control data received via the reception unit.

  The measuring apparatus further includes a control unit that switches between a first mode in which the communication processing unit receives the control data and a second mode in which the communication processing unit transmits a serial signal in which the plurality of optical signals are multiplexed. You may

  The measurement apparatus may further include a position specifying unit that transmits the control data and specifies the positional relationship between the scale and the light receiving unit based on the plurality of optical signals included in the serial signal. Good.

  A second sampling unit that samples the clock data with a second sampling clock whose cycle is shorter than a cycle of clock data that functions as a clock indicating a timing of acquiring the serial signal; The sampling is performed using the sampling clock immediately before the plurality of sampling clocks, provided that the plurality of sampling values obtained by the second sampling unit sampling the serial signal at a plurality of transition timings adjacent to each other in the sampling clock match. And a second digital filter unit that outputs a second sampling value different from the first sampling value obtained by

  According to the present invention, it is possible to improve the measurement accuracy of the position in the measurement device having the encoder.

It is a figure which shows typically the structure of a measuring apparatus. It is a figure which shows the structure of a signal generation part. It is a figure which shows the timing relationship of the serial signal and clock which a signal generation part outputs. It is a figure which shows the state on which noise was superimposed by input data. It is a figure which shows the structure of the digital filter which is an example of a digital filter. It is a figure for demonstrating the operation | movement of a digital filter. It is a figure showing composition of a digital filter concerning a 2nd embodiment. It is a figure showing composition of a digital filter concerning a 3rd embodiment.

[Overview of Measurement Device S]
FIG. 1 is a view schematically showing the configuration of the measuring apparatus S. As shown in FIG. The measuring device S is a device for measuring the position of an object to be measured using an incremental method and an absolute method. The incremental method is a method of measuring the position by continuously specifying the relative position of the scale with respect to the initial position set after the start of operation. The absolute method is a method of measuring the position by specifying the absolute position of the scale with respect to a predetermined measurement reference position before the start of operation.

  The measuring device S includes a light source 1, a lens 2, an optical grating 3, a scale 4, a light receiving unit 5, a cable 6, and a processing device 7. The light source 1, the lens 2, the optical grating 3, the scale 4 and the light receiving unit 5 function as a position detection encoder. The cable 6 functions as a transmission path for transmitting the serial signal transmitted by the light receiving unit 5. The processing device 7 transmits a serial signal including control data for controlling the light receiving unit 5 via the cable 6 as a transmission path. The processing device 7 also functions as a position specifying unit that specifies the positional relationship between the scale 4 and the light receiving unit 5 based on a plurality of light signals included in the serial signal received from the light receiving unit 5.

  When noise is superimposed on the serial signal transmitted from the processing device 7 via the cable 6, the measuring device S sends a signal to the light receiving unit 5 so that the light receiving unit 5 does not erroneously recognize control data included in the serial signal. A digital filter is provided to remove noise superimposed on the serial signal. Details of the digital filter will be described later.

[Configuration of measuring apparatus S]
The light source 1 is a device that functions as a light emitting unit that emits light, and is, for example, a light emitting diode (LED). The light source 1 is provided in a direction for emitting light toward the lens 2.

  The lens 2 changes the direction of the light incident from the light source 1 so that the light emitted from the light source 1 illuminates a predetermined area of the scale 4. Specifically, the lens 2 converts the light emitted from the light source 1 into parallel rays so that the light emitted from the light source 1 passes through the plurality of tracks formed on the scale 4 and reaches the light receiving unit 5 Do. The light converted into parallel rays in the lens 2 is incident on the optical grating 3.

  The optical grating 3 makes the illuminance of light incident through the lens 2 uniform. Specifically, the optical grating 3 makes the illuminance distribution of parallel rays incident from the lens 2 be uniform in the area for detecting the light in the light receiving unit 5. When the illuminance distribution of parallel rays emitted from the lens 2 is sufficiently uniform, the optical grating 3 may not be provided in the measuring device S.

  The scale 4 is a panel having a plurality of tracks each having a different pattern, which transmits at least a part of the light emitted by the light source 1. The scale 4 has, in the longitudinal direction, a first track 41, a second track 42, and a third track 43 in which an area transmitting light and an area not transmitting light are sequentially arranged. The scale 4 partially transmits the light incident through the optical grating 3 in the first track 41, the second track 42, and the third track 43, and the transmitted light whose intensity varies depending on the position in the light receiving unit 5 generate.

  The first track 41 and the third track 43 are absolute scale patterns (hereinafter referred to as ABS patterns) used to specify the position of the object under measurement in an absolute manner. The period of the pattern of the first track 41 is different from the period of the pattern of the third track 43.

  The second track 42 is an incremental scale pattern (hereinafter referred to as an INC pattern) used to specify the position of the object in an incremental manner. The cycle of the pattern of the second track 42 is shorter than the cycle of the pattern of the first track 41 and the cycle of the pattern of the third track 43.

The light receiving unit 5 includes a light receiving unit 51, a signal generating unit 52, and a communication unit 53.
The light receiving unit 51 outputs a plurality of first light signals having different phases based on the light passing through the first track 41. The light receiving unit 51 outputs a plurality of second light signals having different phases based on the light passing through the second track 42. The light receiving unit 51 outputs a plurality of third light signals having different phases based on the light having passed through the third track 43.

  The light receiving unit 51 outputs an optical signal according to the intensity of the light received through each of the first track 41, the second track 42, and the third track 43 in order to output a plurality of optical signals having different phases. And a plurality of light receiving elements. The plurality of light receiving elements are, for example, photoelectric elements that convert light into current.

  The plurality of first light receiving elements that receive light via the first track 41 are arranged in the longitudinal direction of the scale 4 at a ratio of four in one cycle of the ABS pattern formed on the first track 41. The plurality of second light receiving elements receiving light through the second track 42 are arranged in the longitudinal direction of the scale 4 at a ratio of four in one cycle of the INC pattern formed in the second track 42. The plurality of third light receiving elements receiving light through the third track 43 are arranged in the longitudinal direction of the scale 4 at a ratio of four in one cycle of the ABS pattern formed in the third track 43.

  Since four light receiving elements are inserted in one cycle of the pattern formed on the scale 4, the four light receiving elements output four optical signals each having a phase difference of 90 degrees. In the present specification, four optical signals having different phases are referred to as an A signal, an AB signal, a B signal, and a BB signal. The B signal is 90 degrees behind the A signal in phase. The AB signal is 180 degrees out of phase with the A signal. The BB signal is 270 degrees behind the A signal in phase.

  The light receiving unit 51 generates an A signal, an AB signal, a B signal, and a BB signal corresponding to each of the first track 41, the second track 42, and the third track 43. That is, the light receiving unit 51 generates 12 optical signals based on the light received through each of the first track 41, the second track 42, and the third track 43, and transmits the generated optical signals to the signal generating unit 52. input.

  The signal generator 52 time-division multiplexes the plurality of optical signals input from the light receiver 51 to generate a serial signal. The signal generation unit 52 transmits the generated serial signal to the processing device 7 via the cable 6. Details of the configuration example of the signal generation unit 52 will be described later.

The communication unit 53 transmits and receives clock and control data to and from the processing device 7 via the cable 6. The communication unit 53 is a communication device corresponding to, for example, SPI (Serial Peripheral Interface), receives the clock SK and the input data DI from the processing device 7, and transmits the output data DO to the processing device 7.
Hereinafter, the details of the signal generation unit 52 will be described.

[Configuration of Signal Generation Unit 52]
FIG. 2 is a diagram showing the configuration of the signal generation unit 52. As shown in FIG. The signal generation unit 52 includes an input amplifier 521, a signal selection unit 522, output amplifiers 523 (523-1 and 523-2), DA converters 524 (524-1 and 524-2), and a control unit 525. Have. The signal generation unit 52 is an integrated circuit in which, for example, a digital circuit and an analog circuit are mixed.

  The input amplifier 521 converts the photocurrent signal input from the light receiving unit 51 into a voltage signal. In the example shown in FIG. 2, the signal generation unit 52 has twelve input amplifiers 521. The signals from M1A to M1BB in FIG. 2 are an A signal, an AB signal, a B signal, and a BB signal corresponding to the first track 41. Similarly, the signals from M2A to M2BB and the signals from M3A to M3BB are an A signal, an AB signal, a B signal, and a BB signal corresponding to the second track 42 and the third track 43, respectively.

  The signal selection unit 522 outputs one optical signal of the plurality of optical signals as a selection signal. Specifically, one end of the signal selection unit 522 is connected to the output terminal of each of the plurality of input amplifiers 521, and the other end is connected to the input terminal of either the output amplifier 523-1 or the output amplifier 523-2. Have multiple switches. In the example shown in FIG. 2, the other end of the switch corresponding to the A signal and the B signal is connected to the output amplifier 523-1, and the other end of the switch corresponding to the AB signal and the BB signal is the output amplifier 523-2. It is connected to the.

  Based on the control of the control unit 525, the signal selection unit 522 brings one switch out of the plurality of switches whose other ends are connected to the same output amplifier 523 into a conduction state, and brings the other switches into a non-conduction state. be able to. By doing this, the signal selection unit 522 inputs one light signal of the plurality of A signals and B signals to the output amplifier 523-1 and one light of the plurality of AB signals and BB signals. A signal can be input to the output amplifier 523-2.

  The signal selection unit 522 selects a switch to be turned on based on the selection signal input from the control unit 525. The selection signal is data of a bit width (for example, 6 bits) corresponding to the number of switches included in the signal selection unit 522. The signal selection unit 522 outputs the M1A signal, the M1B signal, the M2A signal, the M2B signal, the M3A signal, and the M3B signal as output amplifiers, for example, when the lower 3 bits of the selection signal are 000, 001, 010, 011, 100, and 101, respectively. A switch for inputting to 523-1 is made conductive. Further, the signal selection unit 522 outputs the M1AB signal, the M1BB signal, the M2AB signal, the M2BB signal, the M3AB signal, and the M3BB signal when the upper three bits of the selection signal are 000, 001, 010, 011, 100, and 101, respectively. A switch for input to the amplifier 523-1 is turned on.

  The output amplifier 523 functions as a waveform adjustment unit that adjusts the waveform of the optical signal input via the signal selection unit 522. Specifically, the output amplifier 523 outputs the adjusted optical signal to the cable 6 by changing the offset of the input optical signal or amplifying the optical signal. The output amplifier 523 can switch the amplification factor in multiple stages based on the control of the control unit 525 that has received the control data from the processing device 7. The output amplifier 523-1 outputs the amplified optical signal from the OUT1 terminal, and the output amplifier 523-2 outputs the amplified optical signal from the OUT2 terminal.

  The DA converter 524 generates an offset cancellation voltage of the amplifier included in the output amplifier 523 based on the control of the control unit 525. The DA converter 524 outputs, for example, an offset cancellation voltage for canceling the offset component of the amplifier. The DA converter 524-1 generates an offset cancellation voltage input to the output amplifier 523-1, and the DA converter 524-2 generates an offset cancellation voltage input to the output amplifier 523-2.

  The control unit 525 includes a central processing unit (CPU), a read only memory (ROM), and a random access memory (RAM). The control unit 525 functions as a communication processing unit in cooperation with the communication unit 53 by executing a program stored in the ROM. The control unit 525 receives control data for controlling the respective units (for example, the output amplifier 523 and the DA converter 524) of the signal generation unit 52 through the communication unit 53. The control unit 525 adjusts the offset of the optical signal or adjusts the amplitude of the optical signal by controlling the output amplifier 523 and the DA converter 524 based on the control data.

  Further, the control unit 525 has a circuit that functions as a selection signal generation unit that generates a selection signal for selecting one optical signal input to the output amplifier 523-1 or the output amplifier 523-2 by the signal selection unit 522. . The control unit 525 generates a selection signal in synchronization with the clock SK received from the processing device 7 via the cable 6.

  The controller 525 generates a selection signal that switches in a cycle shorter than the cycle of the plurality of optical signals input from the light receiver 51. Here, the period of the optical signal corresponding to the second track 42 generated when the scale 4 moves at the maximum displacement speed defined by the specification of the measuring device S is T1. Further, it is assumed that the number of multiplexed optical signals, that is, the number of optical signals input to the output amplifier 523-1 or the output amplifier 523-2 is M. In this case, the switching time interval T2 of the selection signal generated by the control unit 525 is set such that T2 ≦ T1 ÷ 2 ÷ M.

  By setting T2 to satisfy the above conditions, each of the plurality of optical signals is sampled at a frequency twice or more the frequency of each optical signal (that is, a frequency higher than the Nyquist frequency), and time division is performed. It is output to the processing unit 7 as a multiplexed serial signal. Therefore, the processing device 7 can reproduce the light signal output from the light receiving unit 51 based on the light signal included in the serial signal.

FIG. 3 is a diagram showing the timing relationship between the serial signal output from the signal generation unit 52 and the clock SK. The input data DI is data output from the processing device 7 and is data indicating a period in which the signal generation unit 52 can transmit a serial signal. The control unit 525 also functions as a timing signal generation unit that generates a timing signal that defines the timing at which the processing device 7 acquires a plurality of optical signals included in the serial signal. Specifically, when the control unit 525 detects that the input data DI has become low level, it outputs output data obtained by delaying the clock SK by the time t _d as a timing signal used by the processing device 7 to acquire an optical signal. A DO is generated, and the generated output data DO is output to the communication unit 53.

  By switching the value of the selection signal in synchronization with the falling timing of the clock SK, the OUT1 signal, which is the first serial signal output from the OUT1 terminal, is sequentially the M1A signal in synchronization with the falling timing of the clock SK. It is switched to the M1B signal, the M2A signal, the M2B signal, the M3A signal and the M3B signal. Similarly, the OUT2 signal, which is the second serial signal output from the OUT2 terminal, is sequentially switched to the M1AB signal, the M1BB signal, the M2AB signal, the M2BB signal, the M3AB signal, and the M3BB signal. The OUT1 signal is time division multiplexed with a plurality of optical signals of the first phase, and the OUT2 signal is time division multiplexed with a plurality of optical signals with a second phase that has a phase difference of 180 degrees with the first phase. There is.

The processing device 7 acquires the optical signal included in the OUT1 signal received via the cable 6 at the rising timing of the output data DO. The processing device 7 acquires the OUT1 signal and the OUT2 signal, for example, by executing the interrupt processing at the rising timing of the output data DO. The output data DO, since delayed by time _{t d} with respect to the clock SK, at the timing OUT1 signal and OUT2 signal does not change. Therefore, since the processing device 7 can acquire the OUT1 signal and the OUT2 signal at the timing when the values of the OUT1 signal and the OUT2 signal are stabilized, the probability of occurrence of data error is low.

  The processing device 7 specifies the position within one cycle of the ABS pattern formed in the first track 41 based on the M1A signal, the M1B signal, the M1AB signal, and the M1BB signal included in the OUT1 signal and the OUT2 signal. . Further, the processing device 7 determines the position within one cycle of the ABS pattern formed in the third track 43 based on the M3A signal, the M3B signal, the M3AB signal and the M3BB signal included in the OUT1 signal and the OUT2 signal. Identify.

  Then, the processing device 7 is based on the combination of the position in one cycle of the ABS pattern formed in the specified first track 41 and the position in one cycle of the ABS pattern formed in the third track 43. The phase synthesis is performed to specify the absolute position of the light receiving unit 5 with respect to the scale 4. The processing device 7 may further specify the relative position to the reference position based on the M2A signal, the M2B signal, the M2AB signal, and the M2BB signal included in the OUT1 signal and the OUT2 signal.

[Operation mode of communication unit 53]
The signal generation unit 52 adjusts the offset and the amplitude of the optical signal to be transmitted as a serial signal via the communication unit 53 based on the control data received from the processing device 7 via the communication unit 53. The communication unit 53 acquires input data DI including control data in synchronization with the clock SK transmitted from the processing device 7, and notifies the control unit 525 of the acquired input data DI. Further, the communication unit 53 transmits the output data DO generated by the control unit 525 to the processing device 7 in synchronization with the clock SK.

  The control unit 525 can perform the process of receiving the control data and the process of transmitting the output data DO in parallel, but based on an external instruction, the operation mode for receiving the control data and the output data DO And the operation mode for transmitting the Since the control unit 525 can reduce the load in the process of transmitting the output data DO by switching the operation mode in this manner, the process can be easily realized by software.

First Embodiment of Digital Filter 54
The control unit 525 has a digital filter 54 for removing the noise superimposed on the input data DI so that the control data is not erroneously recognized due to the effect of the noise superimposed on the input data DI received from the processing device 7. FIG. 4 is a diagram showing a state in which noise is superimposed on input data DI. As shown in FIG. 4, when noise is superimposed on the input data DI at the falling timing of the clock SK, the control unit 525 may misrecognize the control data. Remove the noise.

  FIG. 5 is a diagram showing the configuration of the digital filter 54a according to the first embodiment. The digital filter 54 a includes a shift register that outputs a plurality of delay signals obtained by delaying control data in synchronization with the sampling clock, and a match detection circuit 544. In the example shown in FIG. 5, a plurality of cascade-connected flip-flops (flip-flops 541, 542, 543) constitute a shift register, and control data received by communication unit 53 has a cycle shorter than that of control data. It functions as a sampling unit that performs sampling with a clock SCLK that is a sampling clock.

  The input data DI and the clock SCLK are input to the flip flop 541. Flip-flop 541 latches input data DI at the rising timing of clock SCLK, and outputs the latched data to flip-flop 542 and match detection circuit 544.

  The data input from the flip flop 541 and the clock SCLK are input to the flip flop 542. Flip-flop 542 latches data at the rising timing of clock SCLK, and outputs the latched data to flip-flop 543 and match detection circuit 544.

  Similarly, data input from the flip flop 542 and the clock SCLK are input to the flip flop 543. Flip-flop 543 latches data at the rising timing of clock SCLK, and outputs the latched data to match detection circuit 544.

  The coincidence detection circuit 544 generates a plurality of sampling clocks under the condition that a plurality of sampling values obtained by the flip-flops 541, 542, 543 sampling control data at a plurality of transition timings adjacent to each other in the clock SCLK coincide. A second sampling value different from the first sampling value obtained by sampling with the immediately preceding sampling clock is output. The plurality of transition timings are, for example, rising timings of the clock SCLK.

  The coincidence detection circuit 544 changes the output value to a plurality of delay signal values when the values of the plurality of delay signals output from the flip flops 541, 542 and 543 coincide with each other. Further, the match detection circuit 544 prevents the output value from changing to the values of the plurality of delay signals when the values of the plurality of delay signals do not match. In other words, it is determined whether or not all the data input from the flip flop 541, the flip flop 542, and the flip flop 543 match, and if all the data match, the matched value is output.

FIG. 6 is a diagram for explaining the operation of the digital filter 54a shown in FIG. FIG. 6A shows a state in which the input data DI has changed from the low level (logical value 0) to the high level (logical value 1). Black circles indicate timings at which the input data DI is sampled by the clock SCLK. The period of the clock SCLK in FIG. 6 is t _f .

  The solid line in FIG. 6B indicates data output from the coincidence detection circuit 544 when the input data DI shown in FIG. 6A is input to the digital filter 54a. The low level changes to the high level at a timing delayed with respect to the input data DI indicated by a broken line in FIG.

FIG. 6C shows a state in which noise is superimposed on the input data DI. The solid line in FIG. 6 (d) indicates data output from the coincidence detection circuit 544 when the input data DI shown in FIG. 6 (c) is input to the digital filter 54a. As shown in FIG. 6D, it can be confirmed that noise of a length shorter than the delay time in the shift register of the digital filter 54a is removed.
Although FIG. 6 shows the state in which the input data DI changes from low level (logical value 0) to high level (logical value 1), the digital data can be digital even when the input data DI changes from high level to low level. The filter 54a can also remove noise.

Second Embodiment of Digital Filter 54
FIG. 7 is a view showing the configuration of a digital filter 54b according to the second embodiment. The digital filter 54 b is different from the digital filter 54 a shown in FIG. 5 in that the digital filter 54 b further includes a clock selection unit 545 for selecting a clock to be used as a sampling clock from a plurality of clocks.

  The clock selection unit 545 selects a clock to be used as a sampling clock from a plurality of clocks including the first clock and a second clock obtained by dividing the first clock. In the example illustrated in FIG. 7, the clock selection unit 545 includes a clock SCLK as a first clock, a second clock obtained by dividing the clock SCLK by 8, a third clock obtained by dividing the clock SCLK, and a clock SCLK. The fourth clock divided by 32 is input. The clock selection unit 545 selects one clock from a plurality of input clocks based on control data received via the communication unit 53 under the control of the CPU of the control unit 525, for example, and flips the selected clock Input 541, 542, 543.

  As described above, the digital filter 54 b having the clock selection unit 545 makes it possible to control the width and the delay amount of noise that can be removed by the digital filter 54 b. For example, when it is necessary to transmit control data having a short data length, the processing device 7 raises the frequency of the clock SK and interlocks with the frequency of the clock SK to select a sampling clock with a higher frequency as the clock selection unit 545 Select to. In this way, when transmitting control data with a short data length, it is possible to prevent the delay amount from becoming too large relative to the data length.

Third Embodiment of Digital Filter 54
FIG. 8 is a view showing the configuration of a digital filter 54c according to the third embodiment. The digital filter 54c does not have the flip flop 543 in the digital filter 54a shown in FIG. In the configuration of the digital filter 54c, a clock selection unit 545 included in the digital filter 54b may be provided.

  Also, the delay amount in the digital filter 54 may be variable. For example, in the digital filter 54, the number of flip flops from the input stage to the match detection circuit 544 can be adjusted, and the number of flip flops may be switched based on control data transmitted from the processing device 7. In this way, it is possible to control the width and the amount of delay of noise that can be removed by the digital filter 54.

[Modification 1]
In the above description, although the case where the light receiving unit 5 has the digital filter 54 is illustrated, the processing device 7 may have the digital filter. Specifically, the processing device 7 functioning as a position specifying unit is a digital filter having the same configuration as the digital filter 54a shown in FIG. 5, the digital filter 54b shown in FIG. 7, or the digital filter 54c shown in FIG. May be included.

  In other words, the processing device 7 has the second sampling unit that samples the output data DO functioning as clock data indicating the timing of acquiring the serial signal, with the second sampling clock whose cycle is shorter than the cycle of the output data DO. . In addition, the processing device 7 immediately before the plurality of sampling clocks on condition that the plurality of sampling values obtained by the second sampling unit sampling the serial signal at the plurality of transition timings adjacent to each other in the two sampling clocks match. And a second digital filter unit that outputs a second sampling value different from the first sampling value obtained by sampling with the sampling clock of

  In this case, the processing device 7 can remove the noise superimposed on the output data DO by sampling the output data DO transmitted by the light receiving unit 5 with the second sampling clock. By doing this, when the processing device 7 receives a serial signal in which a plurality of optical signals are time-division multiplexed, it is erroneous even if noise is superimposed on the output data DO used for sampling the serial signal. Do not capture serial signal at timing. As a result, it is possible to improve the measurement accuracy by the measuring device S.

[Modification 2]
In the above description, although the case where the measuring device S supports both the incremental method and the absolute method has been exemplified, the measuring device S may have only either the incremental method or the absolute method.

[Modification 3]
In the above description, although the case where the transmission path between the light receiving unit 5 and the processing device 7 as the position specifying unit is the cable 6 is illustrated, the transmission path is not limited to the cable 6. The light receiving unit 5 and the processing device 7 may be provided on the same printed circuit board, and the conductive pattern formed on the printed circuit board may function as a transmission path.

[Modification 4]
In the above description, although the case where the digital filter 54 is realized by an electric circuit is illustrated, the digital filter 54 may be realized by software. For example, the CPU included in the control unit 525 may execute the program stored in the memory to function in the same manner as the digital filters 54a to 54c.

  As mentioned above, although the present invention was explained using an embodiment, the technical scope of the present invention is not limited to the range given in the above-mentioned embodiment, and various modification and change are possible within the range of the gist. is there. For example, a specific embodiment of device distribution and integration is not limited to the above embodiment, and all or a part thereof may be functionally or physically distributed and integrated in any unit. Can. In addition, new embodiments produced by any combination of a plurality of embodiments are also included in the embodiments of the present invention. The effects of the new embodiment generated by the combination combine the effects of the original embodiment.

Reference Signs List 1 light source 2 lens 3 optical grating 4 scale 5 light receiving unit 6 cable 7 processing device 51 light receiving unit 52 signal generating unit 53 communication unit 54 digital filter 521 input amplifier 522 signal selecting unit 523 output amplifier 524 DA converter 525 control units 541 and 542, 543 Flip-flop 544 Match detection circuit 545 Clock selection unit

Claims (8)

A light emitting unit that emits light;
A scale having a plurality of tracks each having a different pattern, allowing at least a part of the light emitted by the light emitting unit to pass through;
A light receiving unit having a plurality of light receiving elements for outputting a light signal according to the intensity of light received through each of the plurality of tracks;
A waveform adjustment unit that adjusts the waveforms of the plurality of optical signals;
A communication processing unit that receives control data for controlling the waveform adjustment unit;
Equipped with
The communication processing unit
A receiver for receiving the control data;
A sampling unit that samples the control data received by the receiving unit with a sampling clock whose cycle is shorter than that of the control data;
Sampling at a sampling clock immediately before the plurality of sampling clocks, on condition that a plurality of sampling values obtained by sampling the control data by the sampling unit at a plurality of transition timings adjacent to each other in the sampling clock coincide with each other. A digital filter unit that outputs a second sampling value different from the first sampling value obtained by
Measuring device with. The digital filter unit is
A shift register for outputting a plurality of delay signals obtained by delaying the control data in synchronization with the sampling clock;
When the values of the plurality of delay signals match, the output value is changed to the values of the plurality of delay signals, and when the values of the plurality of delay signals do not match, the plurality of output values are selected. A coincidence detection unit that does not change the value of the delay signal;
Have
The measuring device according to claim 1. The digital filter unit further includes a clock selection unit that selects the sampling clock from a plurality of clocks.
The measuring device according to claim 1 or 2. The clock selection unit selects the sampling clock from the plurality of clocks including a first clock and a second clock obtained by dividing the first clock.
The measuring device according to claim 3. The clock selection unit selects the sampling clock from the plurality of clocks based on the control data received via the reception unit.
The measuring device according to claim 3 or 4. The communication control unit further includes a control unit that switches between a first mode in which the communication processing unit receives the control data and a second mode in which the communication processing unit transmits a serial signal in which the plurality of optical signals are multiplexed.
The measuring device according to any one of claims 1 to 5. The apparatus further includes a position specifying unit that transmits the control data and specifies a positional relationship between the scale and the light receiving unit based on the plurality of optical signals included in the serial signal.
The measuring device according to claim 6. The position specifying unit is a second sampling unit that samples the clock data with a second sampling clock having a cycle shorter than a cycle of the clock data functioning as a clock indicating a timing of acquiring the serial signal;
The sampling immediately before the plurality of sampling clocks is performed on the condition that the plurality of sampling values obtained by the second sampling unit sampling the serial signal at a plurality of transition timings adjacent to each other in the second sampling clock coincide with each other. A second digital filter unit that outputs a second sampling value different from the first sampling value obtained by sampling with a clock;
Have
The measuring device according to claim 7.