JP5747342B2 - Optical encoder - Google Patents

Description

  The present invention is used for position control and speed control of various devices, and particularly relates to an optical encoder (hereinafter referred to as an encoder) that irradiates light on an object and uses optical information obtained from the object. .

The encoder includes a light emitting unit composed of an LED or the like, a detection unit configured by projecting light emitted from the light emitting unit on a scale and detecting a diffraction pattern of the reflected light, a photodiode or a phototransistor, and a detection unit based on the diffraction pattern. And a signal processing unit that processes the generated position signal and origin signal as an encoder signal, and makes it possible to detect the displacement of the object from the relative movement amount between the encoder and the scale. As the position signal, an A-phase signal and a B-phase signal that are 90 degrees out of phase with each other are used to indicate the moving direction. As the origin signal, for example, the power is turned off (OFF) and then the power is turned on again. Sometimes a Z-phase signal is used to detect the correct origin position.
As a conventional technique, Patent Document 1 discloses a technique in which when synchronizing the A phase signal, the B phase signal, and the Z phase signal, the synchronization position with the position signal can be selected according to the way of outputting the origin signal. Has been. Patent Document 2 discloses a technique for stably performing origin detection synchronized with the AB phase in an encoder used for displacement detection. The encoder detects the displacement of the moving body. Position signal generating means for generating a periodic signal according to movement of the moving body, origin detecting signal generating means for generating an origin detecting signal when the moving body is at a predetermined position, and origin detecting signal generating means An origin detection circuit that detects that the moving body is at the origin position in synchronization with the periodic signal generated by the position signal generation means based on the origin detection signal generated by Selecting means capable of selecting a synchronized phase position from the plurality of phase positions.

Japanese Patent Laid-Open No. 2003-83771 JP-A-2-281104

As the resolution and accuracy of encoders increase, it is necessary to improve the accuracy of the origin signal, and the same resolution, accuracy, and timing as the AB phase signal are required to be synchronized with the AB phase signal. Has been. That is, an origin signal having a narrow detection width and good reproducibility is required. Therefore, encoders are required to suppress deterioration in origin detection accuracy and detection timing deviation due to unstable elements as a system.
When the origin detection is synchronized with the AB phase while detecting the AB phase signal and the Z phase signal with separate optical systems, the phase of the A phase or B phase signal and the Z phase signal is accurately synchronized, or an appropriate phase difference If it is not provided, there is a possibility that a position shifted by one cycle of the AB phase signal is set as the origin due to a detection timing shift.

Conventionally, the Z-phase signal for generating the origin signal of the encoder uses, for example, the Z-phase scale shown in FIG. The Z-phase output signal (analog) was obtained by receiving light (FIG. 10B). Then, the Z phase output signal (analog) is binarized to obtain a stepped Z phase output signal (digital) (FIG. 10C). As shown in FIG. 11, the Z-phase output signal (digital) (FIG. 11 (a)) is used as an origin detection signal, and the A-phase output signal (digital) (FIG. 11 (b)), which is a position signal, When the origin signal is formed in synchronization with the output signal (digital), if a pulse is created at the timing of high / low switching of the Z phase signal and the fall (rise) of the A phase (or B phase), Depending on the scanning direction, as shown in FIG. 11C, the generated origin signal is shifted by one cycle, and accurate position information and velocity information are shifted by one cycle.
Further, in the case where the Z-phase scale has a pattern in the center, the Z-phase analog output is formed in a pulse shape when the pattern has a sufficiently wide pattern width compared to the irradiation region of light emitted from the light source. However, when the pattern width is narrower than the light irradiation region, it is difficult to create a stable Z-phase pulse (FIG. 12B).

  The present invention has been made under such circumstances, and provides an encoder that is less dependent on the scanning direction and can stably perform origin detection in synchronization with an A-phase signal or a B-phase signal.

The optical encoder of the present invention includes a light emitting unit, a detection unit that projects light emitted from the light emitting unit onto a scale, and generates a position signal and an origin detection signal from a diffraction pattern of the reflected light, and the position signal. and the origin detection signal and digitizes, comprising a said signal processor for generating a pulsed origin signal from the origin detection signal, the position signal is a signal corresponding to the diffraction pattern of the reflected light, The origin detection signal is a signal corresponding to the diffraction pattern of the reflected light, and is a signal for detecting the origin position, in order to indicate the moving direction. The unit digitizes the position signal and the origin detection signal by binarizing and performs a logical product operation of the digitized position signal and origin detection signal. The origin detection signal generated by the detection unit is a signal that changes with a predetermined gradient from a low level to a high level or from a high level to a low level. In the signal processing unit, The origin detection signal digitized by the binarization circuit composed of the second comparison circuit and the AND circuit and generated by the detection unit is the positive input terminal of the first comparison circuit and the second input circuit. A first reference voltage from the low level to the high level is input to the negative input terminal of the first comparison circuit, and a positive input terminal of the second comparison circuit. Is supplied with a second reference voltage higher than the first reference voltage between the low level and the high level, and the outputs of the first and second comparison circuits are input to the AND circuit. It is characterized in that the reduction has been the origin detection signal is generated. The light emitting unit and the detection unit are attached to either the movable unit or the fixed unit of the object, and the scale used when operating the optical encoder is either the movable unit or the fixed unit. You may make it attach to the other.

  According to the present invention, it is possible to obtain an encoder suitable for use in displacement detection that is less dependent on the scanning direction and can stably perform origin detection in synchronization with an A-phase signal or a B-phase signal.

1 is a block diagram showing a signal processing circuit that constitutes an encoder according to Embodiment 1. FIG. FIG. 2 is a waveform diagram showing a time change of a signal input to and output from the signal processing circuit of FIG. 1. The circuit diagram of the synchronous circuit which forms the origin signal which comprises the signal processing circuit shown in FIG. The circuit diagram of the binary circuit which forms the signal for origin detection which comprises the signal processing circuit shown in FIG. 1, and the wave form diagram of the signal which flows through this binary circuit. FIG. 2 is a waveform diagram of a signal flowing through the signal processing circuit shown in FIG. 1. Sectional drawing of the semiconductor substrate in which the encoder of Example 1 was formed, and the top view of the scale arrange | positioned at intervals in this semiconductor substrate. The top view of the semiconductor substrate shown in FIG. The top view of the scale shown in FIG. The top view of the Z phase scale used in Example 1, and the wave form diagram of the Z phase signal which flows through the signal processing circuit of FIG. (A) Plan view of Z-phase scale for forming a conventional encoder Z-phase output signal, (b) Waveform diagram of a Z-phase output signal (analog) for forming a conventional origin signal, (c) Conventional The wave form diagram of the Z phase output signal (digital) for forming an origin signal. (A) Waveform diagram of conventional Z-phase output signal (digital), (b) Waveform diagram of A-phase output signal (digital) synchronized with conventional Z-phase output signal (digital), (c) Conventional scanning direction The wave form diagram of two origin signals produced by a difference. (A) Z-phase scale plan view in which the conventional pattern width is sufficiently wider than the light irradiation region and a waveform diagram of the Z-phase output signal (analog) formed by this Z-phase scale, (b) the conventional pattern width is in the light irradiation region A plan view of a narrower Z-phase scale and a waveform diagram of a Z-phase output signal (analog) formed by the Z-phase scale.

  Hereinafter, embodiments of the invention will be described with reference to examples.

Embodiment 1 will be described with reference to FIGS. FIG. 7 is a plan view of the semiconductor substrate on which the encoder according to the first embodiment is formed, and FIG. 6 illustrates a cross-sectional view taken along broken line ab in FIG. 7 and a scale shown in the plan view.
As shown in FIG. 6, the encoder 100 is formed on the semiconductor substrate 1. The semiconductor substrate 1 includes a light emitting unit, a detection unit that projects light emitted from the light emitting unit on a scale, detects a diffraction pattern of the reflected light, and a signal processing circuit that processes a signal of the detection unit as an encoder signal. It is equipped with. The light emitting unit includes, for example, a light emitting element such as an LED, and includes a first light emitting unit 22 and a second light emitting unit 32. The detection unit includes, for example, a photodiode (PD) and includes a first detection unit 21 and a second detection unit 31. Although not shown, the signal processing circuit is formed on the semiconductor substrate 1 to form a position signal and an origin signal as encoder signals.

  The encoder signal is an A-phase signal and a B-phase signal that are position signals that are 90 degrees out of phase with each other to indicate the moving direction. For example, when the power is turned off (OFF) and then the power is turned on (ON) again, It is formed from the Z-phase signal that becomes the origin signal for detecting the position. In addition, a solid pattern consisting of two regions of a light reflection region and a light transmission region is used for the Z phase scale for forming the Z phase signal, and the origin signal is formed from the Z phase scale. It is obtained by synchronizing the pulse signal obtained by digitizing the Z-phase output signal (analog) with the A-phase signal or B-phase signal.

  The light emitted from the first light emitting unit 22 is reflected by the Z-phase scale 41, and the reflected light is input to the photodiode of the first detection unit 21 and outputs a Z-phase output signal (analog). The Z-phase output signal (analog) is converted into a pulsed Z-phase output signal by a binarization circuit in the signal processing circuit. In addition, the light emitted from the second light emitting unit 32 is reflected by the AB phase scale 42, and the reflected light is input to the photodiode of the second detection unit 31 to output the A phase or B phase output signal (analog). Is output. The A-phase or B-phase output signal (analog) is converted into a position signal by a binarization circuit in the signal processing circuit. Since light emitted from the LEDs of the light emitting units 22 and 32 has no directionality, the light emitted from the Z phase scale 41 or AB phase scale 42 and the light emitting unit 22 before being reflected or transmitted by the Z phase scale 41 or AB phase scale 42. , 32 can be given directionality through a scale (not shown) disposed between them. The Z-phase output signal forming unit 2 and the AB-phase output signal forming unit 3 of the semiconductor substrate 1 are built in the semiconductor substrate 1, but the LEDs of the light emitting units 22 and 32 are formed as chips different from these in the semiconductor substrate 1. Attached to.

  FIG. 7 is a plan view of the semiconductor substrate 1 on which the encoder shown in FIG. 6 is formed. The semiconductor substrate 1 has a Z-phase output signal formation unit 2 and an AB-phase output signal formation unit 3, and the Z-phase output signal formation unit 2 has a first light emitting unit 22 and a first detection unit 21. The AB phase output signal forming unit 3 includes a second light emitting unit 32 and a first detection unit 31. A scale 4 is disposed away from the semiconductor substrate 1. The scale 4 used here is composed of a Z-phase scale 41 and an AB-phase scale 42 (FIG. 8). However, it is also possible to form the Z phase scale and the AB phase scale separately.

Next, a signal processing circuit constituting the encoder will be described with reference to FIGS. 1 to 5 and FIG.
The signal processing circuit 5 converts the phase A output signal (a) (analog) and the phase B output signal (b) (analog) into a position signal (c) (digital) and a position signal (d) (digital), respectively. A binarization circuit 52 for converting a Z-phase output signal (e) (analog) into an origin detection signal (f) (digital), and an origin detection signal (f) (digital) as a position signal (c) Or a synchronizing circuit 53 for generating the origin signal (g) in synchronization with the position signal (d). The A phase output signal (a) or the B phase output signal (b) reflects the light emitted from the second light emitting unit 32 of the semiconductor substrate 1 on which the encoder 100 is formed by the AB phase scale 42, Obtained by inputting to the detector 31. Similarly, the Z-phase output signal (e) is obtained by reflecting the light emitted from the first light emitting unit 22 of the semiconductor substrate 1 with the Z-phase scale 41 and inputting it to the first detecting unit 21.

As shown in FIG. 2, the A-phase output signal (a), the B-phase output signal (b), and the Z-phase output signal (e) are analog signals, and the position signals (c) and (d) are used for origin detection. The signal (f) and the origin signal (g) are digital signals. FIG. 2 is a timing chart showing a state in which input signals from the first detector 21 and the second detector 31 are processed in the signal processing circuit 5, and the horizontal axis represents time and the object The change (waveform) of each signal when the displacement at a constant speed occurs is shown.
The formation of the Z-phase output signal (digital) (origin detection signal (f)) will be described with reference to FIG. The Z-phase output signal (analog) that forms the origin signal is formed by using the Z-phase scale and receiving the reflected light from the scale. The Z-phase scale is composed of a white region that transmits incident light, and a black region that is a light reflection region that reflects incident light and reflects the incident light to the first detector 21 and moves. A Z-phase output signal (analog) corresponding to is formed. Thereafter, the Z-phase output signal (analog) is binarized by the binarization circuit 52 (see FIG. 1) to form a Z-phase output signal (digital) that becomes the origin detection signal (f). The Z-phase output signal (analog) has a waveform that changes from a level of 0 V to a level of 10 V, for example, corresponding to the shape of the Z-phase scale. The Z-phase output (digital) signal formed from the Z-phase output (analog) signal is generated via two comparators with different thresholds, for example, obtained via a comparator having thresholds at 3V and 7V. A pulse width is formed from the two signals.

4A shows a binarization circuit 52 for forming the origin detection signal (f) (Z-phase output signal (digital)) in the signal processing circuit 5 shown in FIG. The binarization circuit 52 includes a first comparison circuit 521, a second comparison circuit 522, and an AND circuit 523. The Z-phase output signal (e) detected by the first detector 21 is input to the input end. An origin detection signal (f) is output from the output terminal (the output terminal of the AND circuit 523). The waveform diagram of the Z-phase output signal (e) is shown in FIG. The pulse width of the origin detection signal (f) is determined from the voltage at any two points between the low level (0 V in this embodiment) and the high level (10 V in this embodiment) of the Z-phase output signal (e). . In this embodiment, the two points are, for example, 3V and 7V.
The Z-phase output signal (e) is input to the positive (+) input terminal of the first comparison circuit 521 and the negative (−) input terminal of the second comparison circuit 522. The first reference voltage (Ref1) (3 V in this embodiment) is input to the negative (−) input terminal of the first comparison circuit 521, and the first (+) input terminal of the second comparison circuit 522 is connected to the first (−) input terminal. 2 reference voltage (Ref2) (7V in this embodiment) is input.

The Z-phase output signal (e) changes from the low level 0V to the high level 10V with the relative movement of the object. Since the reference voltage (Ref1) is 3V, the first comparison circuit 521 outputs a low level (0V) until the Z-phase output signal (e) exceeds 3V. When the reference voltage (Ref1) exceeds 3V, the first comparison circuit 521 changes to a high level. ) Is output. In the second comparison circuit 522, since the reference voltage (Ref2) is 7V and the Z-phase output signal (e) is input to the negative (−) input terminal, the second comparison circuit 522 is high until the Z-phase output signal (e) is 7V. The level is output, and when it exceeds 7V, it changes to the low level and the signal (i) is output.
Next, the signal (h) is input to the first input terminal of the logic circuit (AND (logical product)) 523, and the signal (i) is input to the second input terminal. The logic circuit 523 receives the signals (h) and (i) and outputs the origin detection signal (f) (see FIGS. 4B and 4C).

Next, the origin signal (g) is formed by the synchronizing circuit 53 (FIG. 3). The synchronization circuit 53 is a logic circuit (AND). The position signal (c) formed from the phase A output signal (a) is input to the first input terminal of the logic circuit (AND) 53, and the origin detection signal (f) is input to the second input terminal. The origin signal (g) is output.
The synchronizing circuit 53 synchronizes the position signal (d) formed from the B-phase output signal (b) with the origin detection signal (f) and outputs the origin signal (g).
As shown in FIG. 5, a pulsed digital Z-phase output signal is obtained from an analog Z-phase output signal using a scale having a solid pattern composed of two regions of a light reflection region and a light transmission region, and a pulsed Z-phase signal is obtained. The origin signal is obtained at the same position regardless of the scanning direction by creating a pulse by taking the AND of the signal and the A phase signal or the B phase signal. In this way, an encoder can be obtained in which the dependence on the scanning direction is small and the origin detection synchronized with the A phase signal or the B phase signal can be performed stably.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Z phase output signal formation part 3 ... AB phase output signal formation part 4 ... Scale 5 ... Signal processing circuit 21 ... 1st detection part 22 ... First light emitting unit 31 ... second detection unit 32 ... second light emitting unit 41 ... Z phase scale 42 ... AB phase scale 51, 52 ... binarization circuit 53 ..Synchronous circuit 100 ... Encoder

Claims (1)

A light emitting unit, a light that is emitted from the light emitting unit is projected onto a scale, a detection unit that generates a position signal and an origin detection signal from a diffraction pattern of the reflected light, and the position signal and the origin detection signal are digitally And a signal processing unit that generates a pulsed origin signal from the origin detection signal , and the position signal is a signal corresponding to the diffraction pattern of the reflected light, and is 90 to each other to indicate the moving direction. The origin detection signal is a signal corresponding to the diffraction pattern of the reflected light, and is a signal for detecting the origin position, and the signal processing unit is configured to output the position signal and the signal The origin detection signal is digitized by binarization, and the origin signal is generated by performing a logical product operation of the digitized position signal and origin detection signal, and the detection is performed. The origin detection signal generated by the unit changes from a low level to a high level or from a high level to a low level with a predetermined gradient. In the signal processing unit, the first and second comparison circuits and the AND circuit The origin detection signal digitized by the binarization circuit configured from the above and generated by the detection unit is input to the positive input terminal of the first comparison circuit and the negative input terminal of the second comparison circuit. The first reference voltage between the low level and the high level is input to the negative input terminal of the first comparison circuit, and the low input signal from the low level to the high level is input to the positive input terminal of the second comparison circuit. A second reference voltage higher than the first reference voltage is input, and outputs of the first and second comparison circuits are input to the AND circuit to generate the digitized origin detection signal. Optical encoder characterized in that it is.

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