JP2019104029A - Lead-free solder alloy, electronic circuit mounting board and electronic control device - Google Patents

Abstract

To provide a lead-free solder alloy, an electronic circuit mounting board having a solder joining part formed by using the lead-free solder alloy and an electronic control device capable of restraining crack progress of the solder joining part even under a severe environment such as a difference between cold and warm is violent and vibration is loaded, capable of restraining the crack progress in the interface vicinity between an electronic part and the solder joining part even when executing solder joining by using an electronic part of not executing Ni/Pd/AU plating and Ni/Au plating and capable of restraining the occurrence of a lift-off phenomenon even in mounting by a through-hole mounting method.SOLUTION: In a lead-free solder alloy, Ag includes 1 mass%-4 mass%, Cu includes 0.1 mass%-1 mass%, SB includes 3 mass%-5 mass%, Bi includes 0.1 mass%-0.7 mass%, Ni includes 0.01 mass%-0.25 mass%, and a residual part is composed of Sn.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a lead-free solder alloy, and an electronic circuit mounted substrate and an electronic control device having a solder joint portion formed using the lead-free solder alloy.

As a method of bonding an electronic component to a conductor pattern formed on an electronic circuit substrate such as a printed wiring board or a module substrate, there is a solder bonding method using a solder alloy. Formerly, lead was used in this solder alloy. However, since the use of lead is restricted by the RoHS directive and the like from the viewpoint of environmental load, in recent years, a solder bonding method using a so-called lead-free solder alloy containing no lead is becoming popular.
As this lead-free solder alloy, for example, Sn-Cu-based, Sn-Ag-Cu-based, Sn-Bi-based, and Sn-Zn-based solder alloys are well known. Among them, Sn-3Ag-0.5Cu solder alloy is often used in consumer electronic devices used in TVs, mobile phones and the like and in-vehicle electronic devices mounted in automobiles.
Lead-free solder alloys are somewhat inferior in solderability to lead-containing solder alloys. However, improvements in flux and soldering equipment have covered this solderability problem. Therefore, for example, even in a vehicle electronic circuit mounting substrate, a Sn-3Ag-0.5Cu solder alloy is used in a case where it is placed under a relatively mild environment although there is a temperature difference like a car interior of a car. There are no major problems with the solder joints formed.

However, in recent years, for example, placement in an engine compartment, direct mounting on an engine, placement in a machine-electric integrated with a motor such as an electronic circuit mounting substrate used in an electronic control device has been studied and put into practical use. ing. These are in a severe environment where the temperature difference is particularly severe (for example, a temperature difference of -30 ° C. to 110 ° C., -40 ° C. to 125 ° C., -40 ° C. to 150 ° C.) and vibration load. In such an extremely severe environment of temperature difference, a mounted electronic component and a substrate in an electronic circuit mounting substrate (in the present specification, simply referred to as a "substrate", a plate before forming a conductor pattern, a conductor pattern are formed Is a plate that can be electrically connected to an electronic component, and a plate portion of the electronic circuit mounting board on which the electronic component is mounted that does not include the electronic component, and refers to either as appropriate depending on the case. Is a thermal displacement of the solder joint due to the difference of the linear expansion coefficient with "a plate portion not including the electronic component mounted on the electronic component mounted board" and a stress accompanying the same easily occur. And the repetition of the plastic deformation due to the temperature difference tends to cause a crack in the solder joint.
Furthermore, since the stress repeatedly applied to the solder joint with the passage of time concentrates near the tip of the generated crack, the crack tends to spread across the depth of the solder joint. Such a remarkably developed crack causes a break in the electrical connection between the electronic component and the conductor pattern formed on the substrate. Particularly in an environment where vibration is applied to the electronic circuit mounting substrate in addition to the severe temperature difference, the above-mentioned crack and its progress are more likely to occur.
Therefore, the demand for Sn-Ag-Cu-based solder alloy that can exhibit a sufficient crack growth suppression effect is expected in the future while the increase in the number of in-vehicle electronic circuit mounting substrates and electronic control devices placed under the above-mentioned severe environment It is expected to grow bigger and bigger.

Moreover, many electronic components mounted on a vehicle-mounted electronic circuit board are mounted by the surface mounting method. However, in the case of an electronic component having a portion (in the case of a connector, an insulator portion) which is deformed by the influence of heat, such as a connector, for example, a warp or the like occurs in the electronic component itself. There is a possibility that the terminal and the electrode (land) can not be soldered together.
Therefore, in the case of such an electronic component, a mounting method (through hole mounting method) is used in which a through hole is provided in a substrate, a terminal of the electronic component is inserted into the through hole, and soldering is performed by flow or reflow method. The terminals of the electronic component inserted into the through holes and the lands are electrically connected through solder joints (fillets) formed on the substrate, but depending on the composition of the solder alloy, the lands and the fillets There is a possibility that a phenomenon in which a gap occurs (lift-off phenomenon) may occur. And, the generation of the gap may cause the disconnection of the electrical connection between the electronic component and the conductor pattern formed on the substrate.

  Therefore, particularly in the case of a vehicle-mounted electronic circuit mounting substrate on which surface-mounted electronic components and through-hole-mounted electronic components are mixedly mounted, even under severe environments where the temperature difference is very large and vibration is applied. It is expected that the demand for a solder alloy which can suppress the above-mentioned lift-off phenomenon while exhibiting a crack growth suppression effect will be further increased in the future.

  In the past, by adding elements such as Ag and Bi to Sn-Ag-Cu solder alloy, the strength of the solder joint and the accompanying thermal fatigue characteristics are improved, thereby suppressing the crack growth of the solder joint There are several disclosures (see Patent Literature 1 to Patent Literature 7).

JP-A-5-228685 Unexamined-Japanese-Patent No. 9-326554 Japanese Patent Laid-Open No. 2000-190090 JP 2000-349433 A JP 2008-28413 A International Publication Pamphlet WO2009 / 011341 JP 2012-81521 A

  When Bi is added to the solder alloy, Bi enters the lattice of the atomic arrangement of the solder alloy and displaces it with Sn to distort the lattice of the atomic arrangement. Since this strengthens the Sn matrix and improves the alloy strength, it is expected that a certain improvement in solder crack growth inhibition can be achieved by the addition of Bi.

However, in the mounting of the electronic component by the above-described through-hole mounting method, the heat permeating the inside of the substrate by the flow or reflow in the cooling step after the flow or reflow has a higher thermal conductivity, ie, the inside of the through hole. Conducts to the land (Cu) on the substrate through the provided Cu. On the other hand, although the fillet provided on the substrate solidifies from the surface by cooling, the fillet present at the interface with the land where the above-described thermal conduction has occurred becomes difficult to solidify.
As described above, in a state in which the fillet in the vicinity of the interface with the land hardly solidifies, a contraction force (working perpendicular to the substrate) occurs due to solidification contraction from the surface of the fillet and from the inside of the through hole and thermal contraction of the substrate. Also, the surface of the fillet tends to peel off from the land, which may cause a gap between the two.

  This phenomenon is likely to occur particularly when Bi is added to the solder alloy forming the fillet. During the cooling process after flow and reflow, Bi tends to be concentrated in a portion of the inside of the fillet that is hard to solidify, that is, near the interface with the land, and the concentration of Bi becomes high in this vicinity. Since Bi is an alloying element with a low melting point, the fillet becomes more difficult to solidify near the interface where the concentration of Bi is high. Therefore, surface contraction of the fillets from the lands is more likely to occur when a contraction force that acts perpendicularly to the substrate described above is generated.

  As described above, although it may be difficult to improve the reliability of the on-vehicle electronic circuit mounting substrate only by increasing the strength by the addition of Bi, the above-mentioned Patent Documents 1 to 7 disclose these phenomena and their suppression. There is no disclosure or suggestion about

Also, in recent years, instead of Ni / Pd / Au plating or Ni / Au plating, the lead portion and the lower surface electrode of electronic parts such as QFP (Quad Flat Package) and SOP (Small Outline Package) mounted on automotive electronic circuit boards. Those to be Sn-plated are increasing.
At the time of solder bonding, the Sn-plated electronic component is likely to cause mutual diffusion between Sn contained in the Sn plating and the solder joint and Cu contained in the lead portion and the lower surface electrode. This interdiffusion causes uneven growth of the intermetallic compound (Cu ₃ Sn layer) in a region near the interface between the solder joint and the lead portion or the lower electrode (hereinafter referred to as “interface region”). It is easy to do. The Cu ₃ Sn layer originally has a hard and brittle property, and the Cu ₃ Sn layer grown largely in a concavo-convex shape becomes more brittle. Therefore, in an environment where the temperature difference is severe, the concavo-convex Cu ₃ Sn layer There is also a problem that the crack growth and the electrical short circuit caused thereby are very likely to occur.

The present invention aims to provide a lead-free solder alloy that can solve the above-mentioned problems, specifically the following problems, and an electronic circuit mounting substrate and an electronic control device having a solder joint portion formed using the lead-free solder alloy. I assume.
・ It is possible to suppress the growth of cracks in solder joints even under severe environments where the temperature difference is severe and vibration is applied.
-It is possible to suppress the occurrence of the lift-off phenomenon in through-hole mounting while improving the strength by adding Bi to the lead-free solder alloy.
Even when solder bonding is performed using an electronic component that is not plated with Ni / Pd / Au or Ni / Au, it is possible to suppress crack growth near the interface between the lead portion of the electronic component and the lower surface electrode and the solder joint. can do.

(1) The lead-free solder alloy of the present invention contains 1% to 4% by mass of Ag, 0.1% to 1% by mass of Cu, and 3% to 5% by mass of Sb, It is characterized in that it contains 0.1% by mass or more and 0.7% by mass or less of Bi and 0.01% by mass or more and 0.25% by mass or less of Ni, with the balance being from Sn.

(2) In the configuration described in the above (1), the lead-free solder alloy of the present invention is characterized by further containing 0.001% by mass or more and 0.25% by mass or less of Co.

(3) In the configuration described in the above (1) or (2), the content of Sb is 3.5% by mass or more and 5% by mass or less. Lead-free solder alloy.

(4) In the configuration according to any one of (1) to (3) above, the lead-free solder alloy of the present invention has heat flow (mW) on the vertical axis and temperature on the horizontal axis based on the DSC measurement result The temperature (T1) at which the heat flow is less than −0.5, the heat flow (H1) at the temperature (T1), and the temperature (T2) at which the heat flow shows a peak in the DSC curve (° C.) The feature is that the heat flow (H2) in (T2) satisfies the following formula (A).
| T1-T2 | / | H1-H2 | ≦ 1.05 (A)
(In the above formula (A), the values of | T1-T2 | and | H1-H2 | are both absolute values.)

(5) In the configuration according to any one of the above (1) to (4), the lead-free solder alloy of the present invention further comprises at least one of P, Ga and Ge in total of 0.001% by mass It is characterized by including at least 0.05 mass%.

(6) In the configuration according to any one of the above (1) to (5), the lead-free solder alloy of the present invention further comprises a total of at least one of Fe, Mn, Cr and Mo in total 0.001. It is characterized in that it contains not less than mass% and not more than 0.05 mass%.

(7) The electronic circuit mounting board of the present invention is characterized by having a solder joint portion formed using the lead-free solder alloy according to any one of the above (1) to (6).

(8) The electronic control unit according to the present invention is characterized by including the electronic circuit mounting board according to (7).

The lead-free solder alloy of the present invention, and the electronic circuit mounted substrate and the electronic control device having a solder joint formed using the lead-free solder alloy have the following effects.
・ It is possible to suppress the growth of cracks in solder joints even under severe environments where the temperature difference is severe and vibration is applied.
-It is possible to suppress the occurrence of the lift-off phenomenon in through-hole mounting while improving the strength by adding Bi to the lead-free solder alloy.
Even when solder bonding is performed using an electronic component that is not plated with Ni / Pd / Au or Ni / Au, it is possible to suppress crack growth near the interface between the lead portion of the electronic component and the lower surface electrode and the solder joint. can do.

The DSC curve which made heat flow (mW) the vertical axis | shaft based on the DSC measurement result of the lead-free solder alloy which concerns on Example 1, and made the horizontal axis temperature (degreeC). The DSC curve which made heat flow (mW) the vertical axis | shaft based on the DSC measurement result of the lead-free solder alloy which concerns on Example 2, and made temperature (degreeC) the horizontal axis. The DSC curve which made the heat flow (mW) a vertical axis | shaft the temperature (degreeC) on the horizontal axis based on the DSC measurement result of the lead free solder alloy which concerns on the comparative example 2. FIG. The DSC curve which made the heat flow (mW) the vertical axis | shaft the temperature (degreeC) on the horizontal axis based on the DSC measurement result of the lead-free solder alloy which concerns on the comparative example 3. FIG. The DSC curve which made heat flow (mW) a vertical axis | shaft the temperature (degreeC) on the horizontal axis based on the DSC measurement result of the lead-free solder alloy which concerns on the comparative example 4. FIG. The test board which concerns on the comparative example of this invention WHEREIN: The electron micrograph which represents the cross section which the void generate | occur | produced in the fillet part of chip components. In order to show "the area under the electrode of the chip part" and "the area in which the fillet is formed" which observes the presence or absence of the void generation in the example and the comparative example of the present invention, the general chip part mounting substrate Photograph taken from the chip part side using the device.

  Hereinafter, one embodiment of a lead-free solder alloy, an electronic circuit mounting substrate, and an electronic control device of the present invention will be described in detail. The present invention is not limited to the following embodiments.

(1) Lead-Free Solder Alloy The lead-free solder alloy of the present embodiment can contain 1% by mass or more and 4% by mass or less of Ag. By adding Ag within this range, an Ag ₃ Sn compound can be precipitated in the Sn grain boundaries of a lead-free solder alloy, mechanical strength can be imparted, and the balance with the ductility of the lead-free solder alloy is achieved. Can be
However, when the content of Ag is less than 1% by mass, precipitation of the Ag ₃ Sn compound is small, and the mechanical strength and the thermal shock resistance of the lead-free solder alloy are unfavorably reduced. On the other hand, if the content of Ag exceeds 4% by mass, the stretchability of the lead-free solder alloy is inhibited, and the heat-resistant fatigue properties of the solder joint formed using this may be deteriorated.
When the content of Ag is 2% by mass or more and 3.8% by mass or less, the balance between the strength and the stretchability of the lead-free solder alloy can be made better. More preferable content of Ag is 2.5 mass% or more and 3.8 mass% or less.

The lead-free solder alloy of the present embodiment can contain Cu of 0.1% by mass or more and 1% by mass or less. By adding Cu in this range, the Cu ₆ Sn ₅ compound precipitates in the Sn grain boundaries, so the thermal shock resistance of the lead-free solder alloy can be improved.
In addition, when the content of Cu is 0.1 mass% or more and 0.7 mass% or less, the viscosity of the lead-free solder alloy at melting can be maintained in a good state, and the generation of voids at the time of reflow is further suppressed. The thermal shock resistance of the solder joint to be formed can be improved. Furthermore, in this case, the fine Cu ₆ Sn ₅ is dispersed in the Sn grain boundaries of the melted lead-free solder alloy, thereby suppressing the change in the crystal orientation of Sn and suppressing the deformation of the solder joint shape (fillet shape). can do.
If the content of Cu exceeds 1% by mass, the Cu ₆ Sn ₅ compound is likely to be precipitated in the vicinity of the interface between the solder joint and the electronic component and the interface between the solder joint and the land of the substrate. It is not preferable because there is a possibility of impairing the stretchability of the solder joint.

Here, a solder joint generally formed using a lead-free solder alloy containing Sn, Ag and Cu is an intermetallic compound (for example, Ag ₃ Sn, Cu ₆ Sn ₅ or the like) at the interface between Sn particles. As a result, it becomes a structure capable of preventing a phenomenon in which Sn particles slide and deform even when a tensile force is applied to a solder joint, and so-called mechanical characteristics can be developed. That is, the above-mentioned intermetallic compound plays a role of anti-slip of Sn particles.
Therefore, in the case of the lead-free solder alloy of the present embodiment, the balance of the content of Ag and Cu is 1 mass% to 4 mass% of Ag, 0.1 mass% to 1 mass% of Cu, and the Ag content By making the content of Cu equal to or more than the content of Cu, Ag ₃ Sn can be easily formed as the above-mentioned intermetallic compound, and the content of Cu can express at least relatively good mechanical properties. That is, even if the content of Cu is 1% by mass or less, it contributes to the anti-slip effect of Ag ₃ Sn while a part thereof becomes an intermetallic compound, so both Ag ₃ Sn and Cu are favorable. It is thought that it can exhibit various mechanical properties.

  The lead-free solder alloy of the present embodiment can contain 3% by mass or more and 5% by mass or less of Sb. By adding Sb in this range, it is possible to improve the crack growth suppression effect of the solder joint without inhibiting the stretchability of the Sn—Ag—Cu-based solder alloy. When the content of Sb is 3% by mass or more and 4.5% by mass or less, more preferably 3.5% by mass or more and 4% by mass or less, the crack growth suppressing effect can be further improved.

Here, in order to withstand the external stress of being exposed to a severe environment where the temperature difference is severe for a long time, the toughness (size of the area surrounded by the stress-distortion line) of the lead-free solder alloy is increased and stretched. It is considered effective to make the solid solution strengthening by improving the properties and adding an element that is dissolved in the Sn matrix. And Sb becomes an optimal element in order to perform solid solution strengthening of a lead free solder alloy, ensuring sufficient toughness and ductility.
That is, by adding Sb in the above range to a lead-free solder alloy having Sn substantially as the base material (in this specification, the main components of the lead-free solder alloy, the same applies hereinafter). Part of the crystal lattice is replaced with Sb, and distortion occurs in the crystal lattice. Therefore, in a solder joint formed using such a lead-free solder alloy, the energy required for the transition in the crystal is increased by the Sb substitution of a part of the Sn crystal lattice, and the metal structure is strengthened. . Furthermore, in this case, fine SnSb and ε-Ag ₃ (Sn, Sb) compounds are precipitated at the Sn grain boundaries, so that the slip deformation of the Sn grain boundaries is prevented to suppress the development of cracks generated in the solder joint. It can.

In addition, compared with Sn-3Ag-0.5Cu solder alloy, the structure of the solder joint formed with lead-free solder alloy with Sb added in the above range is exposed for a long time under severe environment with severe temperature difference. It was confirmed that the Sn crystal maintained a fine state even after the heat treatment, and it was a structure in which the crack did not easily progress. This is because SnSb and ε-Ag ₃ (Sn, Sb) compounds deposited at the Sn grain boundaries are finely dispersed in the solder joint even after prolonged exposure to a severe environment where the temperature difference is severe. Therefore, it is considered that the coarsening of the Sn crystal is suppressed. That is, in a solder joint using a lead-free solder alloy to which Sb is added within the above range, solid solution of Sb in the Sn matrix is performed at high temperature, and SnSb, ε-Ag ₃ (Sn, Sb) at low temperature Since precipitation of the compound occurs, excellent cold heat resistance is achieved by repeating the solid solution strengthening at high temperatures and the precipitation strengthening process at low temperatures even when exposed to a severe environment with severe temperature differences. It is considered that the impact resistance can be secured.

When the content of Sb is less than 3% by mass, energy necessary for transition in the crystal is increased by Sb substitution in part of the Sn crystal lattice, and the metal structure can be solid solution strengthened, but SnSb, Fine compounds such as ε-Ag ₃ (Sn, Sb) can not be sufficiently precipitated at Sn grain boundaries. Therefore, if a solder joint formed using such a solder alloy is exposed to a severe environment where the temperature difference is severe for a long time, the Sn crystal is enlarged and changes to a structure in which a crack is easily developed. It is difficult to secure sufficient thermal fatigue resistance in the part.
If the content of Sb exceeds 5% by mass, the melting temperature of the lead-free solder alloy will rise, and Sb will not re-dissolve at high temperatures. Therefore, when a solder joint formed using such a lead-free solder alloy is exposed for a long time to a severe environment where the temperature difference is severe, only precipitation strengthening by SnSb and ε-Ag ₃ (Sn, Sb) compounds Is done. Therefore, in this case, these intermetallic compounds are coarsened with the passage of time, and the effect of suppressing the slip deformation of the Sn grain boundaries is lost. Further, in this case, the heat resistance temperature of the electronic component also becomes a problem due to the increase of the melting temperature of the lead-free solder alloy, which is not preferable.

The lead-free solder alloy of this embodiment can contain 0.1 mass% or more and 0.7 mass% or less of Bi. By adding Bi within this range, it is possible to suppress the occurrence of the lift-off phenomenon while improving the strength of the lead-free solder alloy. When the content of Bi is set to 0.4% by mass or more and 0.7% by mass or less, the strength of the lead-free solder alloy can be further improved while suppressing the occurrence of the lift-off phenomenon.
When the content of Bi is less than 0.1% by mass, the improvement of the interface strength between the fillet and the land is not sufficient, and when the content of Bi exceeds 0.7% by mass, the liftoff phenomenon at the interface between the fillet and the land Is not preferable because there is a risk of

The lead-free solder alloy of the present embodiment can contain 0.01 mass% or more and 0.25 mass% or less of Ni. In the case of the configuration of the lead-free solder alloy of the present embodiment, by adding Ni in this range, fine (Cu, Ni) ₆ Sn ₅ is formed in the molten lead-free solder alloy, and it is formed in the base material Because of the dispersion, it is possible to suppress the development of cracks in the solder joint and to further improve the heat-resistant fatigue characteristics thereof.
Further, in the lead-free solder alloy of the present embodiment, even in the case where an electronic component which is not subjected to Ni / Pd / Au plating or Ni / Au plating is soldered to a substrate, Ni is in the interface region at the time of solder bonding. In order to move to form fine (Cu, Ni) ₆ Sn ₅ , the growth of the Cu ₃ Sn layer in the interface region can be suppressed, and the crack growth suppressing effect in the interface region can be improved.

However, if the content of Ni is less than 0.01% by mass, the effect of modifying the intermetallic compound is insufficient, so that it is difficult to sufficiently obtain the crack suppressing effect of the interface region. In addition, when the content of Ni exceeds 0.25% by mass, supercooling is less likely to occur as compared to the conventional Sn-3Ag-0.5Cu alloy, and the timing of solidification of the solder alloy is accelerated. In this case, in the fillet of the solder joint to be formed, the gas, which was intended to come out during melting of the solder alloy, solidifies while remaining in it, and a gas void (void) is generated in the fillet. The case is confirmed. The void in this fillet causes the thermal fatigue characteristics of the solder joint to deteriorate especially under the environment of a large temperature difference such as -40 ° C to 140 ° C and -40 ° C to 150 ° C, and the crack caused by the void Is more likely to occur.
As described above, Ni is apt to generate voids in the fillet, but in the configuration of the lead-free solder alloy of the present embodiment, Ni is contained in an amount of 0. 0 in view of the balance between the content of Ni and other elements. Even if 25 mass% or less is contained, generation | occurrence | production of the said void can be suppressed.

  In addition, when the content of Ni is set to 0.01 mass% or more and 0.15 mass% or less, the suppression of void formation can be improved while improving the crack growth suppression effect and the heat fatigue resistance characteristics of the interface region.

In addition to Ni, the lead-free solder alloy of the present embodiment can contain 0.001% by mass or more and 0.25% by mass or less of Co. In the case of the configuration of the lead-free solder alloy according to the present embodiment, the addition of Co within this range enhances the above-described effect of Ni addition and further fines (Cu, Co) ₆ Sn _{5 in the} melted lead-free solder alloy Is formed and dispersed in the matrix. Therefore, in this case, while suppressing the creep deformation of the solder joint and the growth of the crack, it is possible to improve the heat-resistant fatigue characteristics of the solder joint even under an environment where the temperature difference is particularly severe.
Further, in the lead-free solder alloy of the present embodiment, the above-mentioned effect of Ni addition is enhanced and the Co is added even when solder bonding electronic parts not subjected to Ni / Pd / Au plating or Ni / Au plating. At the time of solder bonding, it moves to the interface area to form fine (Cu, Co) ₆ Sn ₅ . Therefore, in this case, the growth of the Cu ₃ Sn layer in the interface region can be suppressed, and the crack growth suppressing effect in the interface region can be improved.

However, when the content of Co is less than 0.001% by mass, it is difficult to obtain the modifying effect of the intermetallic compound by the addition of Co, and when the content of Co exceeds 0.25% by mass, the conventional As compared with Sn-3Ag-0.5Cu alloy, supercooling is less likely to occur, and the timing of solidification of the solder alloy is quickened. In this case, in the case of the fillet of the solder joint to be formed, the gas which is intended to come out during melting of the solder alloy solidifies while remaining in the case, and a void due to the gas is generated in the fillet. Is confirmed. Since the void in the fillet is essentially a void in the portion where the alloy should be, solder joints in a severe temperature difference environment such as -40 ° C to 140 ° C and -40 ° C to 150 ° C. The heat-resistant fatigue properties of the above are deteriorated, and cracks resulting from voids are easily generated.
As described above, Co is apt to generate voids in the fillet, but in the configuration of the lead-free solder alloy according to the present embodiment, Co is preferably 0. 0 in view of the balance between the content of Co and other elements. Even if 25 mass% or less is contained, generation | occurrence | production of the said void can be suppressed.

  When the content of Co is set to 0.001% by mass or more and 0.15% by mass or less, the suppression of void formation can be improved while improving the favorable crack growth suppressing effect and the heat fatigue resistance.

  Further, at least one of P, Ga, and Ge can be contained in the lead-free solder alloy of the present embodiment in an amount of 0.001% by mass or more and 0.05% by mass or less. Oxidation of the lead-free solder alloy can be prevented by adding at least one of P, Ga and Ge within the total amount range. However, if the total amount of these components exceeds 0.05% by mass, the melting temperature of the lead-free solder alloy is increased, or voids are easily generated in the welded joint, which is not preferable.

  Furthermore, at least one of Fe, Mn, Cr and Mo can be contained in the lead-free solder alloy of the present embodiment in an amount of 0.001% by mass or more and 0.05% by mass or less. By adding at least one of Fe, Mn, Cr and Mo within the range of the total amount, the crack growth suppressing effect of the lead-free solder alloy can be improved. However, if the total amount of these components exceeds 0.05% by mass, the melting temperature of the lead-free solder alloy is increased, or voids are easily generated in the welded joint, which is not preferable.

  In the lead-free solder alloy of this embodiment, other components (elements), such as In, Cd, Tl, Se, Au, Ti, Si, Al, Mg, Zn, etc., are included in the range which does not inhibit the effect. It can be contained. Also, the lead-free solder alloy of the present embodiment naturally includes unavoidable impurities.

  Further, in the lead-free solder alloy of the present embodiment, the remaining portion is preferably made of Sn. The preferable content of Sn is 88.7% by mass or more and 95.79% by mass or less.

The lead-free solder alloy of the present embodiment adds Bi by setting the balance of the contents of Ag, Cu, Sb, Bi and Ni as described above, and improves the strength while lifting off in the through hole mounting method. The occurrence of the phenomenon can also be suppressed.
In addition, since the dip process after the reflow process can be omitted by suppressing the occurrence of the lift-off phenomenon, cost reduction due to the reduction in the number of processes can also be expected.

Furthermore, the heat flow of the lead-free solder alloy of the present embodiment is less than −0.5 in a DSC curve in which the heat flow (mW) is on the vertical axis and the temperature (° C.) on the horizontal axis based on DSC measurement results. The heat flow (H1) at the temperature (T1) and the temperature (T1), the temperature (T2) at which the heat flow shows a peak, and the heat flow (H2) at the temperature (T2) satisfy the following formula (A) Is preferred.
| T1-T2 | / | H1-H2 | ≦ 1.05 (A)
In the above formula (A), the values of | T1-T2 | and | H1-H2 | are both absolute values.

  The "temperature (T1) at which the heat flow is less than -0.5" refers to the temperature at which the heat flow first showed less than -0.5 in the DSC measurement result.

  In this embodiment, T1 and T2 are rounded off to three decimal places, H1 and H2 are rounded off to five decimal places, and | T1-T2 | / | H1-H2 | are rounded off to three decimal places. did. In this case, the values of | T1-T2 | and | H1-H2 | are both absolute values.

In the present embodiment, the measurement conditions in the DSC measurement are as follows.
・ Measurement device: Differential scanning calorimeter (product name: DSC Q2000, manufactured by TA Instruments)
Measurement jig: Aluminum pan (product name: T-ZERO pan, manufactured by TA Instruments), aluminum lid (product name: T-ZERO lid, manufactured by TA Instruments)
・ Measurement condition: Heating rate 2 ° C / min
Nitrogen flow rate: 50 mL / min
・ Sample amount: 10 mg

Among the lead-free solder alloys of this embodiment, lead-free solder alloys in which the temperature (T1), the temperature (T2), the heat flow (H1) and the heat flow (H2) satisfy the above formula (A) were used. When solder bonding is performed by through-hole mounting, while the crack propagation effect of the fillet formed by the addition of Bi is exhibited, the formation of a low melting point alloy phase occurs near the interface with the land of the fillet during solder solidification. Since the amount is small, the occurrence of the lift-off phenomenon can be further suppressed in through-hole mounting.
It is more preferable that │T1-T2│ / │H1-H2│ be 1.00 or less. Also in this case, the values of | T1-T2 | and | H1-H2 | are both absolute values.

  The formation of the solder joint of this embodiment may be any method as long as the solder joint can be formed, for example, a flow method, mounting with a solder ball, a reflow method using a solder paste composition, etc. . Among them, a reflow method using a solder paste composition is particularly preferably used.

(2) Solder paste composition As such a solder paste composition, it is produced, for example, by kneading the powdered lead-free solder alloy of the present embodiment and a flux to form a paste.

  As such a flux, for example, a flux containing a resin, a thixo agent, an activator, and a solvent is used.

Examples of the resin include rosin-based resins including rosin derivatives such as tall oil rosin, gum rosin, rosin such as wood rosin, hydrogenated rosin, hydrogenated rosin, polymerized rosin, heterogeneous rosin, acrylic acid modified rosin, and maleic acid modified rosin; , Various esters of methacrylic acid and acrylic acid, various esters of methacrylic acid, crotonic acid, itaconic acid, maleic acid, maleic anhydride, esters of maleic acid, esters of maleic anhydride, acrylonitrile, methacrylonitrile, acrylamide, methacrylamide An acrylic resin formed by polymerizing at least one monomer such as vinyl chloride and vinyl acetate; an epoxy resin; a phenol resin and the like. These may be used alone or in combination of two or more.
Among these, rosin-based resins, particularly, hydrogenated acid-modified rosin obtained by hydrogenating acid-modified rosin are preferably used. Moreover, combined use of a hydrogenated acid-modified rosin and an acrylic resin is also preferable.

  The acid value of the resin is preferably 10 mg KOH / g or more and 250 mg KOH / g or less. Moreover, it is preferable that the compounding quantity of the said resin is 10 to 90 mass% with respect to the flux whole quantity.

  Examples of the thixotropic agent include hydrogenated castor oil, fatty acid amides and oxyfatty acids. These may be used alone or in combination of two or more. It is preferable that the compounding quantity of the said thixotropic agent is 3 mass% or more and 15 mass% or less with respect to the flux whole quantity.

  As the activator, for example, amine salts (inorganic acid salts and organic acid salts) such as hydrogen halides of organic amines, organic acids, organic acid salts, organic amine salts and the like can be blended. More specifically, diphenylguanidine hydrobromide, cyclohexylamine hydrobromide, diethylamine salt, acid salt, succinic acid, adipic acid, sebacic acid, malonic acid, dodecanedioic acid and the like can be mentioned. These may be used alone or in combination of two or more. It is preferable that the compounding quantity of the said activator is 5 mass% or more and 15 mass% or less with respect to the flux whole quantity.

  As the solvent, for example, isopropyl alcohol, ethanol, acetone, toluene, xylene, ethyl acetate, ethyl cellosolve, butyl cellosolve, glycol ether and the like can be used. These may be used alone or in combination of two or more. It is preferable that the compounding quantity of the said solvent is 20 mass% or more and 40 mass% or less with respect to the flux whole quantity.

  An antioxidant can be added to the flux for the purpose of suppressing oxidation of the lead-free solder alloy. Examples of the antioxidant include hindered phenol-based antioxidants, phenol-based antioxidants, bisphenol-based antioxidants, polymer-type antioxidants, and the like. Among them, hindered phenol-based antioxidants are particularly preferably used. These may be used alone or in combination of two or more. Although the compounding quantity of the said antioxidant is not specifically limited, Generally, it is preferable that they are 0.5 mass% or more and about 5 mass% or less with respect to the flux whole quantity.

The flux may contain additives such as halogen, a matting agent, an antifoaming agent and an inorganic filler.
It is preferable that the compounding quantity of the said additive is 10 mass% or less with respect to the flux whole quantity. Moreover, the further preferable compounding quantity of these is 5 mass% or less with respect to the whole flux.

  The compounding ratio of the alloy powder to the flux of the lead-free solder alloy is preferably 65:35 to 95: 5 in the ratio of alloy powder: flux. A more preferable blending ratio is 85:15 to 93: 7, and a particularly preferred blending ratio is 87:13 to 92: 8.

  The particle diameter of the alloy powder is preferably 1 μm to 40 μm, more preferably 5 μm to 35 μm, and particularly preferably 10 μm to 30 μm.

(3) Solder joint part As a solder joint part formed using a solder paste composition of this embodiment, it is formed of the following methods, for example.
-Surface mounting method The electrode and insulating layer of a predetermined pattern are formed in the predetermined position on a board | substrate, and the said solder paste composition is printed according to this pattern. Then, the electronic component is mounted at a predetermined position on the substrate, and reflowed at a temperature of 230 ° C. to 260 ° C., for example, to form the solder joint portion of the present embodiment. The solder joint thus formed electrically joins an electrode (terminal) provided on the electronic component and an electrode formed on the substrate.
In addition, as a board | substrate which mounts an electronic component, if it is used for mounting and mounting of electronic components, such as an electronic circuit board | substrates, such as a printed wiring board and a module board, a silicon wafer, a ceramic package board | substrate, it can use not only these.

Through-hole mounting method An electrode and an insulating layer having a predetermined pattern are formed at predetermined positions on a substrate, and a through hole is formed in the substrate according to the pattern, and Cu is plated on the inside of the through hole. Apply. Then, the solder paste composition is printed on the substrate so as to cover the upper part of the through hole, and the terminal provided on the electronic component is mounted so as to be inserted into the through hole. Then, by reflowing this at a temperature of, for example, 230 ° C. to 260 ° C., the solder joint portion (fillet) of the present embodiment is formed. The solder joint thus formed electrically joins the terminal of the electronic component and the electrode formed on the substrate.
As the substrate for mounting electronic components, as in the surface mounting method, through holes can be provided such as electronic circuit substrates such as printed wiring boards and module substrates, ceramic package substrates, etc., and are used for mounting and mounting of electronic components. If it is a thing, it can use not only in these.

And it is preferable that the electronic circuit mounting board | substrate of this embodiment has the said solder joint part.
Since the solder joint has an alloy composition that exhibits a crack growth suppressing effect, even if a crack occurs in the solder joint, the crack can be suppressed from growing. In addition, even when Ni / Pd / Au plating or Ni / Au plating is not performed on the electrodes (terminals) of the electronic component, in particular, the crack growth suppressing effect in the vicinity of the interface between the solder joint and the electronic component is also exhibited. be able to. Moreover, the electrode peeling phenomenon of an electronic component can also be suppressed by this.
Furthermore, since the solder joint has an alloy composition capable of suppressing the occurrence of the lift-off phenomenon, both the crack growth suppressing effect and the occurrence of the lift-off phenomenon can be suppressed even when solder bonding is performed by the through-hole mounting method. It can be demonstrated.
And the electronic circuit mounting board which has such a solder joint part is put under the environment where the difference of temperature is large, and can be used suitably especially for the electronic circuit mounting board for vehicles by which high reliability is required.

(4) Electronic control device Moreover, the electronic control device of this embodiment is produced by incorporating the electronic circuit mounting substrate of this embodiment.

  Hereinafter, the present invention will be described in detail by way of examples and comparative examples. The present invention is not limited to these examples.

Preparation of Flux Each of the following components was kneaded to obtain a flux according to an example and a comparative example.
Hydrogenated acid-modified rosin (Product name: KE-604, manufactured by Arakawa Chemical Industries, Ltd.) 51% by mass
Hardened castor oil 6% by mass
10 mass% of dodecanedioic acid (Product name: SL-12, manufactured by Okamura Oil Co., Ltd.)
Malonic acid 1% by mass
Diphenylguanidine hydrobromide 2% by mass
Hindered phenolic antioxidant (Product name: Irganox 245, manufactured by BASF Japan Ltd.) 1% by mass
Diethylene glycol monohexyl ether 29 mass%

Preparation of solder paste composition 11 mass% of the flux and 89 mass% of powder (powder particle size 20 μm to 38 μm) of each lead-free solder alloy listed in Table 1 and Table 2 are mixed, and Example 1 to Example Respective solder paste compositions according to No. 29 and Comparative Examples 1 to 19 were produced.

(1) DSC Measurement The lead-free solder alloys of Example 1 and Example 2 and Comparative Examples 2 to 4 were subjected to DSC measurement under the following conditions, and based on the results, the vertical axis represents heat flow ( A DSC curve was created with mW) and temperature (° C.) on the horizontal axis. Each is shown in FIGS. 1 to 5.
In addition, T1 and T2 were rounded off to three decimal places, H1 and H2 were rounded off to five decimal places, and | T1-T2 | / | H1-H2 | were rounded off to three decimal places. In this case, the values of | T1-T2 | and | H1-H2 | are both absolute values.

<Measurement conditions>
・ Measurement device: Differential scanning calorimeter (product name: DSC Q2000, manufactured by TA Instruments)
Measurement jig: Aluminum pan (product name: T-ZERO pan, manufactured by TA Instruments), aluminum lid (product name: T-ZERO lid, manufactured by TA Instruments)
・ Measurement condition: Heating rate 2 ° C / min
Nitrogen flow rate: 50 mL / min
・ Sample amount: 10 mg

  Table 1 shows the results of T1, T2, H1 and H2 shown in FIGS. 1 to 5 and the results of | T1-T2 | / | H1-H2 | for each lead-free solder alloy.

(2) Solder crack test (-40 ° C to 125 ° C)
a) 3.2 mm x 1.6 mm chip parts (Chip A)
The following tools were prepared.
· Chip parts of 3.2 mm × 1.6 mm in size (Ni / Sn plated)
· Printed wiring board provided with a solder resist having a pattern capable of mounting the chip component of the above size and an electrode (1.6 mm × 1.2 mm) connecting the chip component · 150 μm thick metal mask having the above pattern Each solder paste composition was printed on the printed wiring board using the metal mask, and the chip parts were mounted.
Thereafter, each printed wiring board was heated using a reflow furnace (product name: TNP-538EM, manufactured by Tamura Corporation) to produce each electronic circuit mounting substrate having a solder joint. Reflow conditions at this time are: preheat 170 ° C. to 190 ° C. for 110 seconds, peak temperature 245 ° C., 200 ° C. or more for 65 seconds, 220 ° C. or more for 45 seconds, peak temperature to 200 ° C. The cooling rate was 3 ° C. to 8 ° C./sec, and the oxygen concentration was set to 1500 ± 500 ppm.

Next, using a thermal shock test device (product name: ES-76 LMS, manufactured by Hitachi Appliances, Ltd.) set to a condition of -40 ° C. (30 minutes) to 125 ° C. (30 minutes), the thermal shock cycle is 1, 1, Each electronic circuit mounting substrate was exposed to each other in an environment repeated for 000, 1,500, 2,000, 2,500, and 3,000 cycles, and then taken out to prepare each test substrate.
Then, a target portion of each test substrate was cut out and sealed with an epoxy resin (product name: Epomount (main agent and curing agent), Refinetech Co., Ltd.). Furthermore, a solder joint formed by using a wet polisher (product name: TegraPol-25, manufactured by Marumoto Struers Co., Ltd.) to make it possible to see the central cross section of the chip component mounted on each test substrate It was observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corp.) whether or not the crack that occurred in the coating had completely broken across the solder joint, and based on the following criteria: It evaluated. The results are shown in Tables 4 and 5. The number of evaluation chips in each thermal shock cycle was ten.
:: no cracks completely crossing the solder joint up to 3,000 cycles ○: a crack completely crossing the solder joints between 2,501 to 3,000 cycles Δ: 2,001 to 2 , The crack completely crosses the solder joint in 500 cycles. ×: The crack completely crosses the solder joint in less than 2,000 cycles.

b) 2.0 x 1.2 mm chip parts (Chip B)
Each test substrate was produced on the same conditions as said 3.2 mm x 1.6 mm chip components except using the following tools, and it evaluated by the same method. The results are shown in Tables 4 and 5.
・ Chip parts of 2.0 × 1.2 mm in size (Ni / Sn plating)
· Printed wiring board provided with solder resist having a pattern capable of mounting a chip component of the above size and an electrode (1.25 mm × 1.0 mm) connecting the chip component · Metal mask having a thickness of 150 μm having the above pattern

(3) Solder crack test in Sn plating SON The following tools were prepared.
・ 1.3mm pitch SON (Small Outline Non-leaded package) parts of 6mm x 5mm x 0.8tmm size (number of pins 8 pins, product name: STL60N3LLH5, manufactured by STMicroelectronics)
-Printed wiring board provided with a solder resist having a pattern capable of mounting the above SON component and an electrode (according to a manufacturer recommended design) for connecting the above SON component-Metal mask with a thickness of 150 μm having the above pattern Each solder paste composition was printed using the above-mentioned metal mask, and the above-mentioned SON parts were mounted on each. After that, each electronic circuit mounting manufactured under the same conditions as the above-mentioned solder crack test (1) except that each electronic circuit mounting substrate is placed in an environment where a thermal shock cycle is repeated 1,000, 2,000, 3,000 cycles. The substrate was subjected to thermal shock to prepare each test substrate.
Then, a target portion of each test substrate was cut out and sealed with an epoxy resin (product name: Epomount (main agent and curing agent), Refinetech Co., Ltd.). Furthermore, a crack generated in the solder joint was made such that the central cross section of the SON component mounted on each test substrate could be seen using a wet polisher (product name: TegraPol-25, manufactured by Marumoto Struers Co., Ltd.) It was observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corp.) whether or not the solder had completely broken across the solder joint.
Based on this observation, regarding the solder joint, the solder base material (in the present specification, the solder base material refers to a portion other than the interface of the electrode of the SON part and its vicinity in the solder joint. The same applies hereinafter. Table 4 And in Table 5, it is divided into the crack generated in “base material” and the crack generated in the interface between the solder joint and the electrode of the SON part, and evaluated as follows. . The results are shown in Tables 4 and 5. The evaluation SON number in each thermal shock cycle was 20, and one terminal of the gate electrode was observed per SON, and a cross section of a total of 20 terminals was confirmed.

· Cracks in the solder matrix ◎: no cracks completely across the solder matrix up to 3,000 cycles ○: cracks completely across the solder matrix in the 2,001 to 3,000 cycles Occurrence Δ: Cracking completely across the solder matrix occurred between 1,001 and 2,000 cycles ×: Crack completely crossing the solder matrix occurred less than 1,000 cycles

· Cracks generated at the interface between the solder joint and the electrode of the SON part ◎: Cracks completely crossing the interface are not generated up to 3,000 cycles ○: The interface is completely completed between 2, 001 and 3,000 cycles亀 裂: Cracks occur completely across the interface between 1,001 and 2,000 cycles ×: Cracks completely traverse the interface less than 1,000 cycles

(4) Solder crack test (-40 ° C to 150 ° C)
Since automotive electronic circuit boards and the like are placed under a very severe environment of temperature difference, the solder alloy used for this is required to exhibit a good crack growth suppressing effect even under such environment. Be Therefore, in order to clarify whether the solder alloy according to the present embodiment can exhibit the effect even under such severe conditions, -40 ° C to 150 ° C using a liquid bath type thermal shock tester. Solder crack test was conducted at the temperature difference of The conditions are as follows.
Liquid bath type cold thermal shock test equipment (product name: ETAC WINTECH LT80, Kushimoto Co., Ltd.) in which each electronic circuit mounting substrate after forming a solder joint portion is set to the condition of -40 ° C (5 minutes) to 150 ° C (5 minutes) Product) under the same conditions as the above solder crack test (1) except that it is exposed to the environment where the thermal shock cycle is repeated 1,000, 2,000, 3,000 cycles. Each test board of mounting and 2.0x1.2 mm chip component mounting was produced.
Then, a target portion of each test substrate was cut out and sealed with an epoxy resin (product name: Epomount (main agent and curing agent), Refinetech Co., Ltd.). Furthermore, a wet polisher (product name: TegraPol-25, Marumoto Struas Co., Ltd.)
Made in a state where the central cross-section of the chip component mounted on each test substrate can be seen using a chip), and whether or not a crack generated in the formed solder joint completely breaks the solder joint or not Ka was observed using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corporation) and evaluated according to the following criteria. The results are shown in Tables 4 and 5. The number of evaluation chips in each thermal shock cycle was ten.
:: no cracks completely crossing the solder joint up to 3,000 cycles ○: a crack completely crossing the solder joints between 2,001 to 3,000 cycles Δ: 1,001 to 2 Cracks completely across the solder joint between 10,000 cycles ×: cracks completely across the solder joint less than 1,000 cycles

(5) Void test The following tools were prepared.
・ Chip parts of 2.0 × 1.2 mm in size (Ni / Sn plating)
-Printed wiring board provided with solder resist having a pattern capable of mounting a chip component of the above size and an electrode (1.25 mm x 1.0 mm) connecting the chip component-Metal mask having a thickness of 150 μm having the above pattern Each solder paste composition is printed on the printed wiring board using the metal mask, and the chip parts are mounted, respectively, using the reflow furnace (product name: TNP-538EM, manufactured by Tamura Corporation). The printed wiring board was heated to produce each test substrate (electronic circuit mounting substrate) having a solder joint. The reflow conditions were the same as in the solder crack test (1).
Next, the surface condition of each test substrate is observed with an X-ray transmission device (product name: SMX-160E, manufactured by Shimadzu Corporation), and the area under the electrode of the chip component at 40 lands in each test substrate (Figure Area ratio of void occupied by area (a) of 7 surrounded by broken line (ratio of total area of void. The same applies hereinafter) and area where fillet is formed (area (b) enclosed by broken line in FIG. 7) The average value of the area ratio of the void which occupies to was calculated | required, and it evaluated as follows about each. The results are shown in Tables 4 and 5.
A: The average value of the area ratio of voids is 3% or less, and the effect of suppressing void formation is extremely good. O: The average value of the area ratio of voids is more than 3% and 5% or less. Good: Average value of area ratio of voids is more than 5% and 8% or less, and the effect of suppressing void generation is sufficient. ×: Average value of area ratio of voids exceeds 8%, the effect of suppressing void generation is insufficient

(6) Lift-off test The following tools were prepared.
A printed wiring board having a structure in which 15 copper vias each having a diameter of 1.6 mm and a through hole having a diameter of 1.0 mm are linearly arranged at a pitch of 2.5 mm. A diameter of 2. at a pitch of 5 mm. Each solder paste composition is printed on the printed wiring board using the metal mask, and a connector part (product name: S15B-EH (LF)). A terminal of (SN), manufactured by Nippon Crimp Terminal Mfg. Co., Ltd., was inserted. Next, each printed wiring board is heated using a reflow furnace (product name: TNP-538EM, manufactured by Tamura Corporation), and each test substrate (electronic circuit mounted substrate) having a solder joint (fillet) is obtained. Made. The reflow conditions were the same as in the solder crack test (1).
Then, a target portion of each test substrate was cut out and sealed with an epoxy resin (product name: Epomount (main agent and curing agent), Refinetech Co., Ltd.). Furthermore, a wet polisher (product name: TegraPol-25, Marumoto Struas Co., Ltd.)
) And using a scanning electron microscope (product name: TM-1000, manufactured by Hitachi High-Technologies Corp.) to confirm the central cross section of the terminal of the connector part mounted on each test substrate. And evaluated according to the following criteria. The results are shown in Tables 4 and 5. The number of evaluation terminals was eight.
○: No lift-off phenomenon occurred ×: Lift-off phenomenon occurred

As described above, the solder joints formed using the lead-free solder alloy according to the embodiment have different chip sizes regardless of the severe environment where the temperature difference is severe and vibration is applied. In addition, regardless of whether the electrode is plated with Ni / Pd / Au or Ni / Au, the effect of suppressing the crack growth in the solder joint and the interface area can be exhibited. In particular, even in a very severe environment where the temperature difference is −40 ° C. to 150 ° C. using a liquid bath type thermal shock test apparatus, it is found that the solder joint portion of the example exhibits a good crack suppressing effect.
Further, it is understood that the lead-free solder alloy according to the example can exhibit both the crack growth suppressing effect and the lift-off phenomenon generation suppressing effect even in the solder bonding by the through hole mounting method. Such a lead-free solder alloy can be suitably used also for an electronic circuit mounting substrate on which an electronic component mounted by a surface mounting method and an electronic component mounted by a through hole mounting method are mixedly mounted.
And the electronic circuit mounting board which has such a solder joint part can be suitably used also as an electronic circuit mounting board by which high reliability is called for, such as a car-mounted electronic circuit mounting board. Furthermore, such an electronic circuit mounting substrate can be suitably used for an electronic control device that requires higher reliability.

Claims (8)

  1% to 4% by mass of Ag, 0.1% to 1% by mass of Cu, 3% to 5% by mass of Sb, 0.1% to 0.7% of Bi A lead-free solder alloy comprising:% or less, Ni in an amount of 0.01% by mass to 0.25% by mass, and the balance being Sn.   The lead-free solder alloy according to claim 1, further comprising 0.001% by mass or more and 0.25% by mass or less of Co.   The content of Sb is 3.5 mass% or more and 5 mass% or less, The lead free solder alloy of Claim 1 or Claim 2 characterized by the above-mentioned. In the DSC curve, the heat flow (mW) on the vertical axis and the temperature (° C.) on the horizontal axis based on the DSC measurement results,
A temperature (T1) at which the heat flow is less than −0.5, and a heat flow (H1) at the temperature (T1);
The temperature (T2) which a heat flow shows a peak, and the heat flow (H2) in the said temperature (T2) satisfy | fill the following formula (A), It is characterized by the above-mentioned. Lead-free solder alloy.
| T1-T2 | / | H1-H2 | ≦ 1.05 (A)
(In the above formula (A), the values of | T1-T2 | and | H1-H2 | are both absolute values.)   The lead-free solder alloy according to any one of claims 1 to 4, further comprising 0.001 to 0.05 mass% in total of at least one of P, Ga and Ge. .   The lead-free according to any one of claims 1 to 5, further comprising 0.001 to 0.05 mass% in total of at least one of Fe, Mn, Cr and Mo. Solder alloy.   An electronic circuit mounting substrate comprising a solder joint portion formed using the lead-free solder alloy according to any one of claims 1 to 6.   An electronic control unit comprising the electronic circuit mounting board according to claim 7.