JP2019096691A5 - - Google Patents
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- JP2019096691A5 JP2019096691A5 JP2017223643A JP2017223643A JP2019096691A5 JP 2019096691 A5 JP2019096691 A5 JP 2019096691A5 JP 2017223643 A JP2017223643 A JP 2017223643A JP 2017223643 A JP2017223643 A JP 2017223643A JP 2019096691 A5 JP2019096691 A5 JP 2019096691A5
- Authority
- JP
- Japan
- Prior art keywords
- pair
- differential signal
- vias
- dielectric
- ground conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004020 conductor Substances 0.000 claims 30
- 230000005540 biological transmission Effects 0.000 claims 10
- 230000003287 optical Effects 0.000 claims 8
- 230000001702 transmitter Effects 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 2
Claims (8)
前記誘電体を貫通するように設けられるN個(Nは2以上の整数)の差動信号ビアの対と、
前記誘電体の第一面上に設けられるN個の第一ストリップ導体対と、
前記誘電体の内部に設けられて前記N個の第一ストリップ導体対および前記誘電体とそれぞれN個の第一差動伝送線路を構成する第一接地導体層と、
前記誘電体の第二面上に設けられるN個の第二ストリップ導体対と、
前記誘電体の内部に設けられて前記N個の第二ストリップ導体対および前記誘電体とそれぞれN個の第二差動伝送線路を構成する第二接地導体層と、
を有し、
前記N個の第一ストリップ導体対と第二ストリップ導体対は前記N個の差動信号ビアの対を介して各々が接続され、
前記第一接地導体層は、前記N個の差動信号ビアの対と絶縁するための単一の第一開口を備え、と前記第二接地導体層は、前記N個の差動信号ビアの対と絶縁するための単一の第二開口を備え、
前記N個の差動信号ビアの対は、前記単一の第一及び第二開口を貫通するとともに、前記第一及び第二開口内で一の方向に沿って配置される、
プリント回路基板。 Dielectric and
A pair of N differential signal vias (N is an integer of 2 or more) provided so as to penetrate the dielectric, and
N first strip conductor pairs provided on the first surface of the dielectric and
The N first strip conductor pair provided inside the dielectric and the first ground conductor layer constituting the dielectric and N first differential transmission lines, respectively.
N second strip conductor pairs provided on the second surface of the dielectric and
The N second strip conductor pairs provided inside the dielectric and the second ground conductor layer constituting the dielectric and N second differential transmission lines, respectively.
Have,
The N first strip conductor pair and the second strip conductor pair are connected to each other via the pair of the N differential signal vias.
The first ground conductor layer comprises a single first opening for insulating from a pair of the N differential signal vias, and the second ground conductor layer is of the N differential signal vias. With a single second opening to insulate the pair
Said pair of N differential signal vias, as well as through the single first and second openings are arranged along one direction in the first and in the second opening,
Printed circuit board.
前記N個の差動信号ビアの対のそれぞれを取り囲むように配置される(2N+2)個の接地導体ビアをさらに有し、
前記(2N+2)個の接地導体ビアのうちの2個の接地導体ビアは、前記N個の差動信号ビアの対のうちの隣接する2つの差動信号ビアの対との間に、前記第一及び第二開口を挟んで対向するよう配置され、
前記(2N+2)個の接地導体ビアは前記第一及び第二開口の外側において前記第一及び第二接地導体層に接続する、
ことを特徴とするプリント回路基板。 The printed circuit board according to claim 1.
It further has (2N + 2) ground conductor vias arranged to surround each of the pairs of N differential signal vias.
Two ground conductor vias of the (2N + 2) ground conductor vias are placed between the pair of two adjacent differential signal vias of the pair of the N differential signal vias. arranged to face each other across the first and second openings,
The (2N + 2) ground conductor vias connect to the first and second ground conductor layers outside the first and second openings.
A printed circuit board characterized by that.
前記N個の差動信号ビアの対のうち、隣接する二つの差動信号ビアの対の中心間距離D1、前記隣接する二つの差動信号ビアの対に接続される隣接する二つの第一差動伝送線路の中心間距離Pとする場合、(D1,P)は、(0.6mm,1.2mm)、(0.9m
m,1.6mm)、(1.2mm,2.2mm)、(0.6mm,2.2mm)を頂点と
する四角形の辺上又は該四角形の範囲の側に位置する、
ことを特徴とするプリント回路基板。 The printed circuit board according to claim 1 .
Of the N differential signal via pairs, the center-to-center distance D1 of the pair of two adjacent differential signal vias, and the two adjacent first pairs connected to the pair of the two adjacent differential signal vias. When the distance between the centers of the differential transmission line is P, (D1, P) are (0.6 mm, 1.2 mm) and (0.9 m).
m, 1.6 mm), (1.2 mm, 2.2 mm), (0.6 mm, 2.2 mm) is located on the side of the quadrangle or on the side of the range of the quadrangle.
A printed circuit board characterized by that.
前記誘電体を貫通するように設けられるN個(Nは2以上の整数)の差動信号ビアの対と、
前記誘電体の第一面上に設けられるN個の第一ストリップ導体対と、
前記誘電体の内部に設けられて前記N個の第一ストリップ導体対および前記誘電体とそれぞれN個の第一差動伝送線路を構成する第一接地導体層と、
前記誘電体の第二面上に設けられるN個の第二ストリップ導体対と、
前記誘電体の内部に設けられて前記N個の第二ストリップ導体対および前記誘電体とそれぞれN個の第二差動伝送線路を構成する第二接地導体層と、
を有し、
前記N個の第一ストリップ導体対と第二ストリップ導体対は前記N個の差動信号ビアの対を介して各々が接続され、
前記N個の差動信号ビアの対のうち、隣接する二つの差動信号ビアの対の中心間距離D1、前記隣接する二つの差動信号ビアの対に接続される隣接する二つの第一差動伝送線路の中心間距離Pとする場合、(D1,P)は、(0.6mm,1.2mm)、(0.9m
m,1.6mm)、(1.2mm,2.2mm)、(0.6mm,2.2mm)を頂点と
する四角形の辺上又は該四角形の範囲の側に位置する、
ことを特徴とするプリント回路基板。 Dielectric and
A pair of N differential signal vias (N is an integer of 2 or more) provided so as to penetrate the dielectric, and
N first strip conductor pairs provided on the first surface of the dielectric and
The N first strip conductor pair provided inside the dielectric and the first ground conductor layer constituting the dielectric and N first differential transmission lines, respectively.
N second strip conductor pairs provided on the second surface of the dielectric and
The N second strip conductor pairs provided inside the dielectric and the second ground conductor layer constituting the dielectric and N second differential transmission lines, respectively.
Have,
The N first strip conductor pair and the second strip conductor pair are connected to each other via the pair of the N differential signal vias.
Of the N pairs of differential signal vias, the distance D1 between the centers of the pairs of two adjacent differential signal vias, and the two adjacent first pairs connected to the pair of the two adjacent differential signal vias. When the distance between the centers of the differential transmission line is P, (D1, P) are (0.6 mm, 1.2 mm) and (0.9 m).
m, 1.6 mm), (1.2 mm, 2.2 mm), (0.6 mm, 2.2 mm) is located on the side of the quadrangle or on the side of the range of the quadrangle.
A printed circuit board characterized by that.
前記第一接地導体層は、前記N個の差動信号ビアの対と絶縁するための単一の第一開口を備え、と前記第二接地導体層は、前記N個の差動信号ビアの対と絶縁するための単一の第二開口を備え、
前記N個の差動信号ビアの対は、前記単一の第一及び第二開口を貫通するとともに、前記第一及び第二開口内で一の方向に沿って配置される、
ことを特徴とするプリント回路基板。 The printed circuit board according to claim 4.
The first ground conductor layer comprises a single first opening for insulating from a pair of the N differential signal vias, and the second ground conductor layer is of the N differential signal vias. With a single second opening to insulate the pair
Said pair of N differential signal vias, as well as through the single first and second openings are arranged along one direction in the first and in the second opening,
A printed circuit board characterized by that.
前記N個の差動信号ビアの対のそれぞれを取り囲むように配置される(2N+2)個の接地導体ビアをさらに有し、
前記(2N+2)個の接地導体ビアのうちの2個の接地導体ビアは、前記N個の差動信号ビアの対のうちの隣接する2つの差動信号ビアの対との間に、前記第一及び第二開口を挟んで対向するよう配置され、
前記(2N+2)個の接地導体ビアは前記第一及び第二開口の外側において前記第一及び第二接地導体層に接続する、
ことを特徴とするプリント回路基板。 The printed circuit board according to claim 4 .
It further has (2N + 2) ground conductor vias arranged to surround each of the pairs of N differential signal vias.
Two ground conductor vias of the (2N + 2) ground conductor vias are placed between the pair of two adjacent differential signal vias of the pair of the N differential signal vias. arranged to face each other across the first and second openings,
The (2N + 2) ground conductor vias connect to the first and second ground conductor layers outside the first and second openings.
A printed circuit board characterized by that.
光信号を出力する光送信サブアセンブリと、
入力される光信号を電気信号に変換する光受信サブアセンブリと、
N個の第三差動伝送線路が形成されたフレキシブル基板と、
ICと、
前記プリント回路基板、前記光受信サブアセンブリ、前記フレキシブル基板、そして前記ICを格納するケースと、をさらに備え、
前記電気信号は、前記フレキシブル基板の前記第三差動伝送線路を介して前記プリント回路基板の前記第一差動伝送線路に接続される、
ことを特徴とする光送受信器。 The optical transmitter / receiver according to claim 7.
An optical transmission subassembly that outputs an optical signal,
An optical receiving subassembly that converts an input optical signal into an electrical signal,
A flexible substrate on which N third differential transmission lines are formed,
IC and
The printed circuit board, the optical receiving subassembly, the flexible board, and a case for storing the IC are further provided.
Before SL electrical signal through the third differential transmission line of the flexible substrate is coupled to the first differential transmission line of the printed circuit board,
An optical transmitter / receiver characterized by that.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017223643A JP6894352B2 (en) | 2017-11-21 | 2017-11-21 | A printed circuit board and an optical transmitter / receiver provided with the printed circuit board. |
US16/185,036 US10470293B2 (en) | 2017-11-21 | 2018-11-09 | Printed circuit board and optical transceiver with the printed circuit board |
US16/673,239 US11057986B2 (en) | 2017-11-21 | 2019-11-04 | Printed circuit board and optical transceiver with the printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017223643A JP6894352B2 (en) | 2017-11-21 | 2017-11-21 | A printed circuit board and an optical transmitter / receiver provided with the printed circuit board. |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2019096691A JP2019096691A (en) | 2019-06-20 |
JP2019096691A5 true JP2019096691A5 (en) | 2021-01-07 |
JP6894352B2 JP6894352B2 (en) | 2021-06-30 |
Family
ID=66534686
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017223643A Active JP6894352B2 (en) | 2017-11-21 | 2017-11-21 | A printed circuit board and an optical transmitter / receiver provided with the printed circuit board. |
Country Status (2)
Country | Link |
---|---|
US (2) | US10470293B2 (en) |
JP (1) | JP6894352B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6894352B2 (en) | 2017-11-21 | 2021-06-30 | 日本ルメンタム株式会社 | A printed circuit board and an optical transmitter / receiver provided with the printed circuit board. |
JP7151567B2 (en) * | 2019-03-14 | 2022-10-12 | 株式会社オートネットワーク技術研究所 | Connection structure between circuit device and electronic control unit and circuit device |
CN113133186A (en) * | 2021-04-15 | 2021-07-16 | 山东英信计算机技术有限公司 | High-density connector PCB structure based on PCIe 5.0 protocol |
US11924964B2 (en) * | 2022-04-07 | 2024-03-05 | Western Digital Technologies, Inc. | Printed circuit board for galvanic effect reduction |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SG135183A1 (en) * | 2004-02-13 | 2007-09-28 | Molex Inc | Preferential ground and via exit structures for printed circuit boards |
JP2005243864A (en) * | 2004-02-26 | 2005-09-08 | Kyocera Corp | Wiring board |
JP4852979B2 (en) * | 2005-10-31 | 2012-01-11 | ソニー株式会社 | Flex-rigid board, optical transceiver module and optical transceiver |
WO2008047852A1 (en) * | 2006-10-13 | 2008-04-24 | Nec Corporation | Multilayer substrate |
US7999192B2 (en) * | 2007-03-14 | 2011-08-16 | Amphenol Corporation | Adjacent plated through holes with staggered couplings for crosstalk reduction in high speed printed circuit boards |
JP4625822B2 (en) * | 2007-03-16 | 2011-02-02 | 株式会社東芝 | Semiconductor memory device and manufacturing method thereof |
JPWO2008133010A1 (en) * | 2007-04-12 | 2010-07-22 | 日本電気株式会社 | Filter circuit element and electronic circuit device |
JP4892514B2 (en) * | 2008-04-22 | 2012-03-07 | 日本オプネクスト株式会社 | Optical communication module and flexible printed circuit board |
JP5216147B2 (en) * | 2011-03-08 | 2013-06-19 | 日本オクラロ株式会社 | Differential transmission circuit, optical transceiver module, and information processing apparatus |
JP2014138015A (en) | 2013-01-15 | 2014-07-28 | Fujitsu Ltd | Printed board and method for manufacturing printed board |
JP5983780B2 (en) * | 2013-01-24 | 2016-09-06 | 日本電気株式会社 | Printed wiring board, electronic device and wiring connection method |
US9554455B2 (en) | 2014-06-09 | 2017-01-24 | Hirose Electric Co., Ltd. | Method and apparatus for reducing far-end crosstalk in electrical connectors |
JP6894352B2 (en) | 2017-11-21 | 2021-06-30 | 日本ルメンタム株式会社 | A printed circuit board and an optical transmitter / receiver provided with the printed circuit board. |
-
2017
- 2017-11-21 JP JP2017223643A patent/JP6894352B2/en active Active
-
2018
- 2018-11-09 US US16/185,036 patent/US10470293B2/en active Active
-
2019
- 2019-11-04 US US16/673,239 patent/US11057986B2/en active Active
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