JP2019058016A - Power supply device - Google Patents

Abstract

To reduce reactive loss at a switching element in a power supply device.SOLUTION: A power supply device has a high-side first switching element, a low-side second switching element, switching control means performing switching control by synchronizing the first switching element and the second switching element with a reference clock, current detection means detecting current flowing through the first switching element, and driving voltage switchover means selecting, when a detection result of the current detection means is larger than a predetermined threshold value, a first power supply as a power supply supplying driving voltage to either or both of the first switching element or/and the second switching element, and selecting, when the detection result of the current detection means is smaller than the predetermined threshold value, a second power supply as the power supply supplying the driving voltage to either or both of the first switching element or/and the second switching element.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power supply device operable as a switching power supply device.

  In recent years, large-scale integrated circuits (hereinafter referred to as LSIs) mounted on electronic devices such as digital cameras and smartphones have become increasingly integrated as a result of advances in LSI design and manufacturing technology, and advanced functions have been implemented on a single chip. It became possible to realize. However, the demand for higher efficiency required for power supply devices has become stricter as the voltage decreases with the miniaturization of the manufacturing process and the load current increases with higher functionality.

  The reactive loss in the switch element in the power supply apparatus is mainly a switching loss when the switch element is turned on and off, and a conduction loss when the switch element is turned on. This reactive loss occurs when switching loss is dominant and conduction loss is dominant depending on the input voltage, the oscillation frequency of the switch element, the supply voltage to the subsequent device, and the load current to the subsequent device. And divided. When a MOSFET is used as the switch element, the switching loss and the conduction loss are almost determined by the total gate charge amount Qg and the characteristics of the on-resistance RON between the drain and the source, respectively. However, these two characteristics are in a trade-off relationship, and it is generally known that if the MOSFET element area is increased in order to cope with an increase in load current, RON is reduced but Qg is increased. It has been.

  Patent Document 1 describes a method of selectively using RON emphasis and Qg emphasis by switching and controlling a plurality of MOSFETs having different characteristics according to input voltage and load current.

JP 2003-319645 A

  However, in the method described in Patent Document 1, since it is necessary to prepare a plurality of switch elements having different characteristics, the circuit scale increases, leading to an increase in cost and an increase in component area. In addition, there is a concern that an increase in reactive loss due to a long wiring from the switch element, an increase in parasitic inductance, and an increase in high-frequency noise due to an increase in parasitic diodes.

  Therefore, it is desired to reduce the reactive loss in the switch element in the power supply apparatus according to the input voltage, the oscillation frequency of the switch element, the supply voltage to the subsequent device, and the load current to the subsequent device.

  One of the power supply devices according to the present invention includes a high-side first switching element, a low-side second switching element, the first switching element, and the second switching element as a reference clock. Switching control means for controlling switching in synchronization, current detection means for detecting a current flowing through the first switching element, and when the detection result of the current detection means is greater than a predetermined threshold, When a first power source is selected as a power source for supplying a driving voltage to one or both of the switching element and the second switching element, and the detection result of the current detection means is smaller than the predetermined threshold, As a power supply for supplying a drive voltage to one or both of the first switching element and the second switching element, And a driving voltage switching means for selecting the power supply.

  One of the power supply devices according to the present invention includes a high-side first switching element, a low-side second switching element, the first switching element, and the second switching element as a reference clock. Switching control means for performing switching control in synchronism, current detection means for detecting current flowing through the first switching element, and detecting a time ratio during on / off control of the first switching element and the second switching element A time ratio detecting means, a storage means for storing a set value according to the detection result of the time ratio detecting means, a detection result of the current detecting means and a set value according to the detection result of the time ratio detecting means. As a result of the comparison, if the detection result of the current detection means is continuously large for a predetermined time or more every switching period, the first scan is performed. The first power supply is selected as a power supply for supplying a driving voltage to either or both of the switching element and the second switching element, and the detection result of the current detection means continues continuously for a predetermined time or more every switching period. Drive voltage switching means for selecting a second power supply as a power supply for supplying a drive voltage to either or both of the first switching element and the second switching element.

  One of the power supply devices according to the present invention is a power supply device, which is a first switching element on a high side, a second switching element on a low side, the first switching element, and the second switching element. Switching control means for controlling switching of the element in synchronization with a reference clock, current detection means for detecting a current flowing through the first switching element, and first voltage detection means for detecting an input voltage of the power supply device A second voltage detecting means for detecting an output voltage of the power supply device; a storage means for storing a set value corresponding to a detection result of the first voltage detecting means and the second voltage detecting means; and the current As a result of comparing the detection result of the detection means with the set values corresponding to the detection results of the first voltage detection means and the second voltage detection means, the detection result of the current detection means Is continuously large for a predetermined time or more every switching cycle, a first power source is used as a power source for supplying a drive voltage to one or both of the first switching element and the second switching element. And when the detection result of the current detection means is continuously small for a predetermined time or more every switching period, a drive voltage is applied to either or both of the first switching element and the second switching element. Drive voltage switching means for selecting a second power source as a power source for supplying the power.

  One of the power supply devices according to the present invention includes a high-side first switching element, a low-side second switching element, the first switching element, and the second switching element as a reference clock. Switching control means for performing switching control in synchronism, current detection means for detecting current flowing through the first switching element, and detecting a time ratio during on / off control of the first switching element and the second switching element A time ratio detecting means, a storage means for storing a set value corresponding to a detection result of the time ratio detecting means, an A / D converter for digitizing a detection result of the current detecting means, and an A / D converter As a result of comparing the output with the set value corresponding to the detection result of the duty ratio detection means, the output of the A / D converter is When continuously large for a predetermined time or more every time, the first power supply is selected as a power supply for supplying a drive voltage to either or both of the first switching element and the second switching element, When the output of the A / D converter is continuously small for a predetermined time or more every switching cycle, a drive voltage is supplied to one or both of the first switching element and the second switching element. Drive voltage switching means for selecting a second power source as the power source.

  One of the power supply devices according to the present invention is a power supply device, which is a first switching element on a high side, a second switching element on a low side, the first switching element, and the second switching element. Switching control means for controlling switching of the element in synchronization with a reference clock, current detection means for detecting a current flowing through the first switching element, and first voltage detection means for detecting an input voltage of the power supply device A second voltage detecting means for detecting an output voltage of the power supply device; a storage means for storing a set value corresponding to a detection result of the first voltage detecting means and the second voltage detecting means; and the current An A / D converter that digitizes the detection result of the detection means, an output of the A / D converter, and detection of the first voltage detection means and the second voltage detection means. When the output of the A / D converter is continuously large for a predetermined time or more every switching period as a result of comparison with a set value corresponding to the result, the first switching element and the second switching When a first power source is selected as a power source for supplying a driving voltage to one or both of the elements, and the output of the A / D converter is continuously small for a predetermined time or more every switching cycle, the first power source Drive voltage switching means for selecting a second power supply as a power supply for supplying a drive voltage to one or both of the one switching element and the second switching element.

  ADVANTAGE OF THE INVENTION According to this invention, the reactive loss of the switch element in a power supply device can be reduced.

3 is a block diagram for explaining components of a power supply device 13 according to Embodiment 1. FIG. FIG. 6 is a diagram illustrating voltage / current waveforms for explaining an operation example of the power supply device 13. 5 is a flowchart for explaining an operation example of a Bias switching control unit 35. It is a figure which shows the setting table for demonstrating the operation example of the Bias switching control part.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to the following embodiments.

[Embodiment 1]
First, components of the power supply device 13 will be described with reference to FIG. The power supply device 13 is a power supply device that supplies driving power to a subsequent device, and operates as, for example, a current mode synchronous rectification switching power supply device. The feedback mechanism for maintaining the voltage is realized by comparing the voltage loop signal and the current loop signal by the PWM comparator 24. The voltage loop signal is obtained by dividing the output voltage by the output setting resistor 30 and comparing and amplifying it with the reference voltage 22 by the error amplifier 23. The current loop signal can be obtained by adding slope compensation for preventing unstable operation by the slope compensator 37 to the current flowing through the main side P-channel FET (QA) 20. The current flowing through the QA 20 is detected by amplifying a potential difference caused by the on-resistance between the drain and source of the QA 20 by the differential amplifier 29. The output of the PWM comparator 24 is connected to the reset input of the subsequent R-S flip-flop 25, and the signal of the OSC 31 that is the reference clock for PWM duty control is connected to the set input. A dead time is added to the output of the flip-flop 25 by the PWM controller 26 so that the QA 20 and the FET of the N-channel FET (QB) 21 on the synchronous rectification side are not simultaneously turned on. By the drive signal, QA 20 and QB 21 are controlled to be turned on and off via the main-side FET pre-driver 27 and the synchronous-side FET pre-driver 28, respectively. According to the on / off control of the QA 20 and the QB 21, the current flowing through the inductor 19 is controlled, and this is smoothed by the smoothing capacitor 38 to obtain a constant output voltage. When the output voltage is low due to load fluctuation or the like, the output of the error amplifier 23 increases, and the time for the PWM comparator 24 to output High becomes long. That is, the on-duty of the QA 20 is increased, and the control works in the direction of increasing the output voltage. The same applies to the case where the input voltage is low and the QA 20 current rises slowly. Conversely, when the output voltage is high or the input voltage is high, the time for the PWM comparator 24 to output High becomes short. In other words, the on-duty of the QA 20 becomes small and the control works in the direction of decreasing the output voltage. Further, when an excessive current flows due to a load short circuit or the like, the PWM comparator 24 immediately outputs High to turn off the QA 20 to prevent the overcurrent from flowing for a long time.

  In the first embodiment, PWR1 and PWR2 power can be selectively supplied to the main-side FET pre-driver 27 and the synchronous-side FET pre-driver 28 as bias power for driving and controlling the QA 20 and QB 21. The block for controlling the switching of the Bias power source includes an A / D converter 33, a CLK delay unit 32, a storage unit 34, a Bias switching control unit 35, and a Bias switching SW 36. The current detected by the current detector 29 is input to the A / D converter 33 and converted into a digital signal. Sampling of the A / D converter 33 is performed at the rising edge of ADCLK obtained by delaying the reference clock OSC 31 for power control by the CLK delay unit 32. The A / D converted digital data of the current value is transmitted to the Bias switching control unit 35. The Bias switching control unit 35 controls the Bias switching SW 36 from the current value from the A / D converter 33, the input voltage, the output voltage, and the set value in the storage unit 34. The Bias switch SW 36 supplies drive power for the QA 20 and QB 21 to the main-side FET pre-driver 27 and the synchronous-side FET pre-driver 28, respectively. The detailed operation of the bias switching control unit 35 including the reason for delaying ADCLK will be described later.

  Next, an operation example of the power supply device 13 will be described with reference to the voltage / current waveforms in FIGS. 2 (a) to 2 (j).

FIG. 2A shows a reference CLK (OSC) 31 of the power supply device 13, and blocks in the power supply device 13 operate in synchronization with the signal of the OSC 31. FIG. 2B shows the load current drawn from the power supply device 13. Here, a sine wave having a frequency fL is used for the sake of simplicity. FIG. 2C shows the output voltage that the power supply device 13 supplies to the subsequent device. Although it is ideally a constant value, there actually exists a component that does not follow the load fluctuation of FIG. 2B and fluctuates and a ripple voltage component synchronized with switching as shown here. FIG. 2D shows the result of comparing and amplifying the divided voltage of FIG. 2C with the reference value by the error amplifier 23. If the output shown in FIG. 2C is the same as the set value, it becomes zero. However, since the error as described above actually occurs, the error is inverted and amplified. FIG. 2 (e) is a waveform showing the state of QA20, and FIG. 2 (f) is a waveform showing the state of QB21. For convenience, ON is indicated as High and OFF is indicated as Low. As described above, the OSC 31 signal is connected to the set input of the RS flip-flop 25, and the output of the PWM comparator 24 is connected to the reset input. With this configuration, the output of the flip-flop 25 is High, that is, the ON signal of the QA 20 is output with the rise of the OSC at the start of the cycle. When the QA 20 is turned on and the flowing current increases and the current loop signal potential exceeds the voltage loop signal potential, the PWM comparator 24 outputs High, the reset signal is input to the flip-flop 25, and the output of the flip-flop 25 is Low. That is, an off signal of the QA 20 is output. For this reason, one cycle period including ON / OFF is always equal to the OSC period. In FIG. 2F, the above-described dead time for preventing penetration is added. FIG. 2G shows the current of the inductor 19. When the QA 20 is turned on, the load current Io flows through the inductor 19 through the path of the battery 18 -QA 20 -inductor 19, whereby energy is stored in the inductor 19. The current slope dI / dt_on in this case is
dI / dt_on = (Vi−Vo) / L (Expression 1)
It is represented by Since Vi, Vo, and L are substantially constant under normal conditions within a short period of one cycle of OSC, dI / dt becomes a fixed value, and the current of the inductor 19 increases linearly with a linear function. In this case, the QB 21 is off so that the battery 18 does not short to GND. Thereafter, when the condition that the output of the PWM comparator 24 becomes High is satisfied and the QA 20 is in the OFF period, the QB 21 is turned ON, and the energy stored in the inductor 19 is released through the path of GND-QB 21 -inductor 19. The current slope dI / dt_off in this case is
dI / dt_off = −Vo / L (Expression 2)
Similarly, linearly decreases with a linear function. In the on / off cycle, a continuous current waveform having a triangular wave shape is obtained, and the average current is equal to the load current in FIG. FIG. 2 (h) shows the output of the current detection unit 29. A waveform is obtained by converting the current flowing through the QA 20 into a voltage by the on-resistance of the QA 20 itself. The current of the QA 20 flows only when the QA 20 is on, and the current in this case is equal to the current of the inductor 19 in FIG. 2 (g), so that the rising slope as shown in the figure is proportional to the current of the inductor 19. The waveform becomes a shape. In this figure, the current and the slope of the inductor 19 are the same for easy understanding. FIG. 2 (i) shows ADCLK that is the sampling CLK of the A / D converter 33. The reason for delaying ADCLK with respect to the signal of OSC 31 is to adjust the sampling timing. Due to the operation delay of the RS flip-flop 25 and the PWM controller 26 described above and the delay from the fall of the gate signal to the rise of the current of the P-channel FET, there is a delay from the rise of the signal of the OSC 31 to the rise of the current of the QA 20. Therefore, if sampling is performed at the rising edge of the signal of the OSC 31, the A / D value can be obtained only near zero. On the other hand, if the delay amount is too large, sampling may occur in the off section when the on-duty is small, such as when the load current increases or the input voltage increases. Here, considering these conditions, the delay amount td is about 30% of one cycle period, but the delay amount td may be changed depending on the input / output voltage. FIG. 2 (j) shows the result of A / D sampling of the current signal of the current detector 29 in FIG. 2 (h) in accordance with ADCLK in FIG. 2 (i). Although it is discretized every cycle, digital data having a current value close to the load current in FIG. 2B is obtained.

  Next, an operation example of the Bias switching control unit 35 will be described with reference to the flowchart of FIG. 3 and the setting table (hereinafter referred to as LUT) of FIG. The LUT illustrated in FIG. 4 is stored in the storage unit 34.

  The bias switching control unit 35 is a control means for selecting the driving voltage of the QA 20 and QB 21 from the input / output voltage and the load current, controlling the bias switching SW unit 36, and minimizing the power loss in the QA 20 and QB 21. is there. First, the Bias switching control unit 35 detects an input voltage value and an output voltage value (step S301). Here, the input voltage value and the output voltage value may be directly input to an A / D (not shown) to obtain a data value, or may be obtained as digital data from a CPU (not shown) via communication means (not shown). Also good. Next, the Bias switching control unit 35 reads a load current threshold value for switching the driving voltages of the QA 20 and the QB 21 from the LUT (see FIG. 4) stored in the storage unit 34 (step S302). In the LUT, for a predetermined input / output voltage value, a threshold value that is switched depending on the load current in the magnitude relationship between the power loss when the QA 20 and the QB 21 are driven by the PWR1 and the power loss when the PWR2 is driven is prepared in advance. ing. That is, the bias switching control unit 35 can read from the LUT whether the power loss is reduced by selecting PWR1 or PWR2 according to the load current for the driving voltage of the QA 20 and QB 21 in a certain input / output state. . Next, the Bias switching control unit 35 compares the data value from the A / D converter 33 with the load current threshold value read from the LUT (Steps S303 and S304). Next, the Bias switching control unit 35 performs the A / D If the data value from the converter 33 continues to exceed the load current threshold read from the LUT for a predetermined time or longer, PWR2 is selected, and if the data value continues to be lower than the predetermined time or longer, PWR1 is selected (steps S305 to S308). Next, the Bias switching control unit 35 controls the Bias switching SW unit 36 in synchronization with the signal of the OSC 31, and switches the power sources of PWR1 and PWR2 as voltages for driving the QA 20 and QB 21 (Step S309 and Step S310). For example, if the input voltage is 3.5 V, the output voltage is 1.0 V, and the load current is 0.5 A and is stable for a predetermined time or longer, the bias switching SW unit 36 has selected PWR2 by the LUT. , QA20 and QB21 are driven by PWR2. Here, when the driving mode of the electronic device changes and the load current continues to be 0.1 A for a predetermined time or more, the bias switching control unit 35 controls the bias switching SW unit 36 in synchronization with the signal of the OSC 31. The drive voltage of QA20 and QB21 is switched to PWR1. When switching the drive voltage, it is in a state where it is always connected to one of the power supplies, and the output of the Bias switch SW unit 36 is controlled so as not to be in an open state. Here, the comparison with the load current threshold is based on the condition that it has continued for a predetermined time or more because when the transient rush current is detected, the drive voltage of QA20 and QB21 is not switched. It is. If the above-described conditions do not exist, when the load current exceeds the load current threshold value due to the rush current from a state where the load current is less than the threshold value, the drive voltage of the QA 20 and QB 21 is switched and controlled. However, when the time of the rush current is less than one cycle of the OSC 31, switching control of the drive voltage is performed after the rush current is exhausted, and therefore, unnecessary switching control is performed. In the first embodiment, the sampling frequency of the A / D converter 33 is the same as that of the OSC 31. However, when the sampling frequency is lowered, the time during which the above-described unnecessary switching control is performed becomes longer. It will cause extra reactive loss. In addition, even if the drive voltage of QA 20 and QB 21 is switched and controlled following a transient change in load current, a large power saving effect cannot be obtained, and the drive time of the device is extended by reducing battery consumption. I can't. In addition, when continuous load current fluctuations that cross the load current threshold are matched, if the drive voltage of the QA 20 and QB 21 is switched and tracked accordingly, reactive loss and switching noise generated in the Bias switching SW unit 36 are performed. Is concerned about the impact of Therefore, the increase in the reactive loss and the switching noise can be suppressed by making it a condition that it continues for a predetermined time or more in comparison with the load current threshold.

  As described above, according to the power supply device 13, the ineffective loss of the switch element in the power supply device is reduced according to the input voltage, the oscillation frequency of the switch element, the supply voltage to the subsequent device, and the load current to the subsequent device. Can be made.

[Other Embodiments]
The embodiment of the present invention is not limited to the first embodiment described above. The first embodiment which is changed or modified without departing from the gist of the invention is also included in the embodiment of the present invention.

  For example, in the first embodiment, the current detection of the QA 20 is realized by amplifying the potential difference due to the ON resistance between the drain and source of the QA with a differential amplifier, but the current of the FET mirrored with the current mirror configuration is detected. May be.

  For example, in the first embodiment, the current is detected by the QA 20, but the current may be detected by the QB 21.

  For example, in the first embodiment, the sampling period of the A / D converter 33 is the same as the reference clock of the power supply, but sampling may be performed using another clock.

  For example, in the first embodiment, the load current is sampled by the A / D converter 33, but the output from the current detection unit 29 is compared with a predetermined threshold without digital conversion, and continuously for each switching cycle. You may make it detect continuing for more than predetermined time.

  For example, in the first embodiment, the input / output voltage is detected and compared with the current threshold value corresponding thereto, but the time ratio at the time of on / off control of QA20 and QB21 is detected, and the current threshold value according to the time ratio is determined. You may make it compare.

  For example, in the first embodiment, the load current threshold value is described as one fixed value. However, the threshold value when the load current increases and the threshold value when the load current decreases are given a predetermined width, and the vicinity of the threshold value is set. This chattering operation may be prevented.

  For example, in the first embodiment, the drive voltages of the QA 20 and the QB 21 are switched and controlled at the same time, but they may be controlled with different drive voltages with different load current thresholds.

  For example, in the first embodiment, the oscillation frequency of the switch element is fixed, but switching control may be performed with a load current threshold for each settable oscillation frequency.

  For example, in the first embodiment, two power sources PWR1 and PWR2 are switched as drive voltages, but three or more power sources may be switched.

13: Power supply device 18: Battery 19: Inductor 20: Main side PchFET (QA)
21: Synchronous NchFET (QB)
22: D / A converter for reference voltage 23: Error amplifier 24: PWM comparator 25: RS flip-flop 26: PWM controller 27: Main side FET pre-driver 28: Synchronous side FET pre-driver 29: Current detector 30: Voltage Setting resistor 31: Reference CLK (OSC)
32: CLK delay unit 33: A / D converter 34: Storage unit 35: Bias switching control unit 36: Bias switching SW unit 37: Slope compensation unit 38: Smoothing capacitor

Claims (6)

A first switching element on the high side;
A second switching element on the low side;
Switching control means for controlling the switching of the first switching element and the second switching element in synchronization with a reference clock;
Current detecting means for detecting a current flowing through the first switching element;
When the detection result of the current detection means is larger than a predetermined threshold value, the first power supply is selected as a power supply for supplying a drive voltage to one or both of the first switching element and the second switching element. When the detection result of the current detection means is smaller than the predetermined threshold value, the second power supply supplies a drive voltage to one or both of the first switching element and the second switching element. Drive voltage switching means for selecting the power source of
A power supply device comprising: A first switching element on the high side;
A second switching element on the low side;
Switching control means for controlling the switching of the first switching element and the second switching element in synchronization with a reference clock;
Current detecting means for detecting a current flowing through the first switching element;
A time ratio detecting means for detecting a time ratio during on / off control of the first switching element and the second switching element;
Storage means for storing a set value corresponding to a detection result of the duty ratio detection means;
When the detection result of the current detection means and the set value corresponding to the detection result of the duty ratio detection means are compared, the detection result of the current detection means is continuously large for a predetermined time or more every switching period. The first power supply is selected as a power supply for supplying a drive voltage to either or both of the first switching element and the second switching element, and the detection result of the current detection means is continuous every switching period. Driving voltage switching means for selecting a second power source as a power source for supplying a driving voltage to one or both of the first switching element and the second switching element when the voltage is continuously small for a predetermined time or more. When,
A power supply device comprising: A power supply unit,
A first switching element on the high side;
A second switching element on the low side;
Switching control means for controlling the switching of the first switching element and the second switching element in synchronization with a reference clock;
Current detecting means for detecting a current flowing through the first switching element;
First voltage detecting means for detecting an input voltage of the power supply device;
Second voltage detecting means for detecting an output voltage of the power supply device;
Storage means for storing set values according to detection results of the first voltage detection means and the second voltage detection means;
As a result of comparing the detection result of the current detection means with the set value corresponding to the detection results of the first voltage detection means and the second voltage detection means, the detection result of the current detection means is continuous every switching period. If the power is continuously large for a predetermined time or more, a first power supply is selected as a power supply for supplying a drive voltage to one or both of the first switching element and the second switching element, and the current detection When the detection result of the means is continuously small for a predetermined time or more continuously for each switching cycle, the first power supply for supplying a drive voltage to one or both of the first switching element and the second switching element is used. Drive voltage switching means for selecting a second power source;
A power supply device comprising: A first switching element on the high side;
A second switching element on the low side;
Switching control means for controlling the switching of the first switching element and the second switching element in synchronization with a reference clock;
Current detecting means for detecting a current flowing through the first switching element;
A time ratio detecting means for detecting a time ratio during on / off control of the first switching element and the second switching element;
Storage means for storing a set value corresponding to a detection result of the duty ratio detection means;
An A / D converter for digitizing the detection result of the current detection means;
When the output of the A / D converter and the set value corresponding to the detection result of the duty ratio detection means are compared, the output of the A / D converter is continuously large for a predetermined time or more every switching period. The first power supply is selected as a power supply for supplying a drive voltage to either or both of the first switching element and the second switching element, and the output of the A / D converter is continuous every switching period. Driving voltage switching means for selecting a second power source as a power source for supplying a driving voltage to one or both of the first switching element and the second switching element when the voltage is continuously small for a predetermined time or more. When,
A power supply device comprising: A power supply unit,
A first switching element on the high side;
A second switching element on the low side;
Switching control means for controlling the switching of the first switching element and the second switching element in synchronization with a reference clock;
Current detecting means for detecting a current flowing through the first switching element;
First voltage detecting means for detecting an input voltage of the power supply device;
Second voltage detecting means for detecting an output voltage of the power supply device;
Storage means for storing set values according to detection results of the first voltage detection means and the second voltage detection means;
An A / D converter for digitizing the detection result of the current detection means;
As a result of comparing the output of the A / D converter with the set value corresponding to the detection results of the first voltage detection means and the second voltage detection means, the output of the A / D converter is continuous every switching period. If the power is continuously large for a predetermined time or more, a first power source is selected as a power source for supplying a driving voltage to one or both of the first switching element and the second switching element, and the A / When the output of the D converter is continuously small for a predetermined time or more continuously for each switching cycle, the first power source that supplies a drive voltage to either or both of the first switching element and the second switching element Drive voltage switching means for selecting a second power source;
A power supply device comprising:   6. The setting value stored in the storage unit includes a setting value for the first switching element and a setting value for the second switching element. 6. The power supply device described in 1.