JP2019053734A5 - - Google Patents

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JP2019053734A5
JP2019053734A5 JP2018171047A JP2018171047A JP2019053734A5 JP 2019053734 A5 JP2019053734 A5 JP 2019053734A5 JP 2018171047 A JP2018171047 A JP 2018171047A JP 2018171047 A JP2018171047 A JP 2018171047A JP 2019053734 A5 JP2019053734 A5 JP 2019053734A5
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processing unit
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memory
task
die
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US201762558745P 2017-09-14 2017-09-14
US62/558,745 2017-09-14
US15/825,047 US10474600B2 (en) 2017-09-14 2017-11-28 Heterogeneous accelerator for highly efficient learning systems
US15/825,047 2017-11-28

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JP2019053734A JP2019053734A (ja) 2019-04-04
JP2019053734A5 true JP2019053734A5 (enExample) 2021-09-02
JP7028745B2 JP7028745B2 (ja) 2022-03-02

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JP (1) JP7028745B2 (enExample)
KR (1) KR102689910B1 (enExample)
CN (1) CN109508316B (enExample)
TW (1) TWI754752B (enExample)

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