JP2019050499A - Oscillation circuit, signal generator using the same, signal analyzer, and voltage measuring method - Google Patents

Abstract

To provide: an oscillation circuit which can perform measurement of an input voltage to gain a desired oscillatory frequency of a voltage control oscillator at low cost efficiently; a signal generator and a signal analyzer each using the oscillation circuit; and a method for voltage measurement.SOLUTION: An oscillation circuit 10 comprises: a VCO 12 which controls an output signal frequency according to an input voltage; a SW 25 for selecting one of signals generated by a plurality of signal generator units 23 and 24; a first mixer 26 which outputs a signal gained by mixing an output of SW 25 and an output signal of VCO 12 to a second down convert unit 14; a PFD 15 which outputs a signal depending on a phase difference of an output of the second down convert unit 14 and an output of a first PLL circuit 11; and a loop filter 16 which allows an output of PFD 15 to pass through itself with a predetermined loop bandwidth and inputs to VCO 12. A frequency change unit 31 changes a VCO oscillatory frequency by sequentially switching the polarity of PFD 15 and SW 25.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an oscillation circuit, a signal generator and a signal analyzer using the same, and a voltage measurement method.

  2. Description of the Related Art Conventionally, a phase locked loop (PLL) is used as an oscillation circuit in signal analyzers such as signal generators and spectrum analyzers. The PLL circuit includes a voltage controlled oscillator (VCO), and has a configuration for phase-locking an output signal of the VCO to an input signal (see, for example, Patent Document 1).

  As shown in FIG. 6, the oscillation circuit disclosed in Patent Document 1 uses a VCO 74 that controls the frequency Fvco of the output signal according to the voltage of the input signal, a local signal generated by the local oscillator 75, and an output signal. Mixing 76, an in-loop frequency divider 77 that divides the output of the mixer 76 by 1 / N, a reference frequency divider 71 that divides the reference signal by 1 / R, and an output of the in-loop frequency divider 77 A basic configuration is provided with a phase comparator 72 that outputs a signal according to the phase difference with the output of the reference frequency divider 71, and a loop filter 73 that allows low frequency components to pass through and is provided to the VCO 74.

  In the above basic configuration, in order to suppress deterioration of phase noise, frequency division is performed using mixer 76 in addition to in-loop frequency divider 77, so that the division ratio of in-loop frequency divider 77 can be reduced. It's smaller.

  Such a multi-loop oscillation circuit is pre-tuned by the pre-tune circuit to adjust the voltage (hereinafter also referred to as "VCO tuning voltage") Vt of the input signal to be given to the VCO 74 to make Fvco the target frequency. The VCO tuning voltage characteristics are measured in advance.

Patent No. 4055956

  However, in the conventional oscillation circuit as disclosed in Patent Document 1 in which frequency conversion is performed using a mixer, if the pretuning is performed at a stage where the VCO tuning voltage characteristic is unknown, the applied voltage is inaccurate. In some cases, the high / low relationship between the output signal of the VCO and the frequency of the local signal input to the mixer may be reversed. In such a case, the control direction of the loop is opposite to the direction in which the phase is synchronized, and there is a possibility that lock-off or mis-lock from the target frequency may occur.

  Therefore, a configuration is conceivable in which a single loop path including a VCO is added to the oscillation circuit to acquire VCO tuning voltage characteristics while preventing locking failure. However, the addition of such a dedicated circuit has the problem of cost.

  The present invention has been made to solve such conventional problems, and an oscillator circuit capable of efficiently measuring an input voltage for obtaining a desired oscillation frequency of a voltage controlled oscillator at low cost. It is an object of the present invention to provide a signal generator and a signal analyzer using the same, and a voltage measurement method.

  In order to solve the above problems, an oscillation circuit according to the present invention comprises: a voltage controlled oscillator that controls the frequency of an output signal according to an input voltage; a first downconversion unit that downconverts the output signal; A second down conversion unit for down converting the output of the down conversion unit, a first oscillation circuit for outputting a signal of a predetermined frequency, an output of the second down conversion unit, and an output of the first oscillation circuit A phase comparator for outputting a signal according to a phase difference, a loop filter for passing the output of the phase comparator with a predetermined loop bandwidth and inputting it to the voltage controlled oscillator, and a frequency of the output signal of the voltage controlled oscillator The voltage control oscillator is outputting the output signal whose frequency has been changed by the frequency change unit that changes the frequency change unit and the voltage control oscillator. And a voltage measurement unit that measures the input voltage of the control oscillator, wherein the first down-conversion unit generates a plurality of signal generation units that generate signals of different frequencies, and the plurality of signal generation units A signal selection unit for selecting one of the signals, a signal obtained by mixing the signal selected by the signal selection unit, and the output signal of the voltage controlled oscillator, the second down conversion unit A second mixer for outputting a signal of a predetermined frequency, a second oscillator circuit for outputting a signal of a predetermined frequency, an output of the first mixer, and an output of the second oscillator circuit. And a second mixer for outputting a signal obtained by mixing the signals to the phase comparator, and the frequency changing unit is configured to select the polarity of the phase difference and the signal to be selected by the signal selection unit. By switching sequentially A configuration for changing the frequency of the output signal of the voltage controlled oscillator.

  With this configuration, the oscillation circuit according to the present invention can easily change the frequency of the output signal of the voltage control oscillator stepwise to a frequency that does not fail to lock. Therefore, the oscillation circuit according to the present invention can efficiently acquire the relationship between the input voltage of the voltage control oscillator and the frequency of the output signal (VCO tuning voltage characteristic). Also, this makes it possible to obtain VCO tuning voltage characteristics at low cost without the addition of a dedicated circuit.

  The oscillation circuit according to the present invention may further include a voltage input unit for inputting the input voltage measured by the voltage measurement unit to the voltage controlled oscillator.

  With this configuration, the oscillation circuit according to the present invention can perform high-precision pre-tuning.

  In the oscillation circuit according to the present invention, the signal selected by the signal selection unit is currently determined based on the current polarity of the phase difference and the frequency of the signal scheduled to be selected next by the signal selection unit. Before switching from the state, a frequency calculation unit that calculates in advance the frequency of the output signal of the voltage control oscillator, and whether the frequency calculated by the frequency calculation unit falls within the oscillation frequency range of the voltage control oscillator And the frequency change unit determines the polarity of the phase difference and the signal selected by the signal selection unit when the frequency determination unit makes a negative determination. It may be configured to switch from the current state.

  With this configuration, the oscillation circuit according to the present invention can automatically change the frequency of the output signal of the voltage controlled oscillator to lower when the output signal of the voltage controlled oscillator reaches the upper limit frequency that can be oscillated. it can. Similarly, the oscillation circuit according to the present invention can automatically change the frequency of the output signal of the voltage control oscillator in the direction of raising the frequency when the output signal of the voltage control oscillator reaches the lower limit frequency that can be oscillated. .

  In the signal generator according to the present invention, a waveform data generation unit for outputting waveform data of I-phase component and Q-phase component orthogonal to each other, waveform data of the I-phase component and Q-phase component as I-phase component and A D / A converter for converting into an analog signal of Q phase component, a local oscillator for outputting a local oscillation signal of a desired frequency, and orthogonal modulation of the local oscillation signal with analog signals of the I phase component and the Q phase component A quadrature modulator for outputting a quadrature modulation signal, and the local oscillator includes the oscillation circuit described in any of the above.

  With this configuration, the signal generating apparatus according to the present invention can efficiently measure the VCO tuning voltage characteristics as needed, without adding a dedicated circuit for measuring the VCO tuning voltage characteristics.

  Further, the signal analysis device according to the present invention extracts a signal of a predetermined intermediate frequency band obtained by mixing a local oscillator that outputs a local oscillation signal whose frequency is swept and a signal to be measured and the local oscillation signal. A signal extraction unit, an A / D converter that samples the output of the signal extraction unit and converts it into digital time-series data, and the A / D converter while the frequency of the local oscillation signal is swept A signal processing unit that acquires a spectrum waveform of the time-series data to be output, and the local oscillator includes the oscillation circuit described in any of the above.

  With this configuration, the signal analysis device according to the present invention can efficiently measure the VCO tuning voltage characteristics as needed without adding a dedicated circuit for measuring the VCO tuning voltage characteristics.

  A voltage measurement method according to the present invention is the voltage measurement method using the oscillation circuit described in any of the above, wherein the polarity of the phase difference and the signal selected by the signal selection unit are sequentially switched. A frequency changing step of changing a frequency of the output signal of the voltage controlled oscillator, and a state in which the voltage controlled oscillator outputs the output signal whose frequency is changed in the frequency changing step; And V. measuring the input voltage.

  According to this configuration, in the voltage measurement method according to the present invention, it is easy to stepwise change the frequency of the output signal of the voltage control oscillator to a frequency that does not fail to lock. Therefore, the oscillation circuit according to the present invention can efficiently acquire the VCO tuning voltage characteristic. Also, this makes it possible to obtain VCO tuning voltage characteristics at low cost without the addition of a dedicated circuit.

  The present invention provides an oscillator circuit capable of efficiently measuring an input voltage for obtaining a desired oscillation frequency of a voltage controlled oscillator, a signal generator and a signal analyzer using the same, and a voltage measurement method. It is provided.

It is a block diagram showing composition of an oscillation circuit concerning a 1st embodiment of the present invention. FIG. 6 is an explanatory view showing an example of a change in VCO oscillation frequency in the oscillation circuit according to the first embodiment of the present invention. It is a flowchart for demonstrating the process of the voltage measurement method using the oscillation circuit which concerns on the 1st Embodiment of this invention. It is a block diagram which shows the structure of the signal generator which concerns on the 2nd Embodiment of this invention. It is a block diagram showing composition of a signal analysis device concerning a 3rd embodiment of the present invention. It is a block diagram which shows the structure of the conventional oscillation circuit.

  Hereinafter, embodiments of an oscillation circuit according to the present invention, a signal generation device and a signal analysis device using the oscillation circuit, and a voltage measurement method will be described using the drawings.

First Embodiment
First, the configuration of the oscillator circuit 10 according to the first embodiment of the present invention will be described. The oscillation circuit 10 of the present embodiment is a multi-loop system configured of a plurality of PLL circuits.

  As shown in FIG. 1, the oscillation circuit 10 includes a first PLL circuit 11 as a first oscillation circuit, a VCO 12, a first down conversion unit 13, a second down conversion unit 14, and a phase comparator (Phase Frequency Detector). : PFD 15, loop filter 16, switch (SW) 17, A / D converter (ADC) 18 as a voltage measurement unit, D / A converter (DAC) 19 as a voltage input unit, An input voltage storage unit 20, an operation unit 21, and a control unit 22 are provided.

  The first PLL circuit 11 is adapted to output a signal of a predetermined frequency. In the present embodiment, the first PLL circuit 11 outputs a signal having a frequency of 0.5 GHz, for example.

  The VCO 12 controls the frequency of the output signal (hereinafter also referred to as "VCO oscillation frequency") according to the input voltage Vt, and more specifically, the VCO 12 has a VCO oscillation frequency f (Vt) substantially proportional to the input voltage Vt. A signal is output as an output signal. In the present embodiment, the VCO oscillation frequency f (Vt) is, for example, 10.0 GHz to 20.0 GHz.

  The first down-conversion unit 13 includes a plurality of signal generation units 23 and 24, a switch (SW) 25 as a signal selection unit, a first mixer 26, and a first low pass filter (LPF) 27. The output signal of the VCO 12 is down converted.

  The signal generation units 23 and 24 are configured to generate signals of different frequencies. In the present embodiment, the signal generation unit 23 generates a signal of, for example, a frequency of 14.0 GHz, and the signal generation unit 24 generates a signal of, for example, a frequency of 16.0 GHz.

  The SW 25 is configured to select one of the signals generated by the plurality of signal generation units 23 and 24.

  The first mixer 26 mixes the signal selected by the SW 25 with the output signal of the VCO 12 to generate a signal including the sum and difference frequency components of the two signals. Furthermore, the first mixer 26 is configured to output the signal obtained by the above mixing to the second down-conversion unit 14 via the first LPF 27.

  The first LPF 27 is configured to pass a signal including a difference frequency component among the signals including the above-mentioned sum and difference frequency components output from the first mixer 26.

  Although the frequency of the signal generated by each of the signal generation units 23 and 24 may be any value, it is higher than the lower limit value of the VCO oscillation frequency f (Vt), and the VCO oscillation frequency f (Vt) Lower than the upper limit of is desirable. Thereby, the frequency of the output of the first LPF 27 can be suppressed low.

  The second down conversion unit 14 includes a second PLL circuit 28 as a second oscillation circuit, a second mixer 29, and a second LPF 30, and is configured to down convert the output of the first down conversion unit 13. There is.

  The second PLL circuit 28 is adapted to output a signal of a predetermined frequency. In the present embodiment, the second PLL circuit 28 outputs a signal having a frequency of 3.0 GHz, for example.

  The second mixer 29 mixes the output of the first LPF 27 with the output of the second PLL circuit 28 to generate a signal including frequency components of the sum and difference of the two signals. Furthermore, the second mixer 29 is configured to output the signal obtained by the above mixing to the PFD 15 via the second LPF 30.

  The second LPF 30 is configured to pass a signal including a difference frequency component among the signals including the sum and difference frequency components output from the second mixer 29.

  The frequency of the output of the second PLL circuit 28 may be any value, but is higher than the lower limit of the frequency of the output of the first LPF 27 and lower than the upper limit of the frequency of the output of the first LPF 27 desirable. In the present embodiment, the lower limit value and the upper limit value of the frequency of the output of the first LPF 27 are, for example, 0 GHz and 6 GHz, respectively. Thereby, the frequency of the output of the second LPF 30 can be suppressed low.

  The PFD 15 detects a phase difference between the output of the second LPF 30 and the output of the first PLL circuit 11, and outputs a voltage signal having a pulse width proportional to the phase difference. The PFD 15 internally includes a charge pump for outputting a voltage signal having a pulse width proportional to the phase difference. Furthermore, the PFD 15 has a polarity inverting unit 15 a that outputs a voltage signal obtained by inverting the polarity of the phase difference according to the control signal from the control unit 22.

  In the following, the PFD 15 outputs a voltage signal for lowering the output frequency of the second down-conversion unit 14 when the output frequency of the second down-conversion unit 14 is high with reference to the output frequency of the first PLL circuit 11 In this state, the polarity of the PFD 15 is positive. In addition, when the output frequency of the second down-conversion unit 14 is low with reference to the output frequency of the first PLL circuit 11, the PFD 15 outputs a voltage signal for increasing the output frequency of the second down-conversion unit 14. Assume that the polarity of the PFD 15 is positive. In other words, these states are states in which the polarity inverting unit 15a of the PFD 15 does not invert the polarity of the phase difference.

  On the other hand, when the output frequency of the second down-conversion unit 14 is high with the output frequency of the first PLL circuit 11 as a reference, the PFD 15 outputs a voltage signal for increasing the output frequency of the second down-conversion unit 14. Assume that the polarity of the PFD 15 is negative. In addition, when the output frequency of the second down-conversion unit 14 is low with reference to the output frequency of the first PLL circuit 11, the PFD 15 outputs a voltage signal for reducing the output frequency of the second down-conversion unit 14. Assume that the polarity of the PFD 15 is negative. In other words, these states are states in which the polarity inverting unit 15a of the PFD 15 inverts the polarity of the phase difference.

  The loop filter 16 passes the output of the PFD 15 with a predetermined loop bandwidth and inputs it to the VCO 12. When the loop filter 16 includes the configuration of an inverting amplifier using an operational amplifier, the loop filter 16 inverts the output of the PFD 15 and inputs it to the VCO 12. Therefore, when the polarity of the PFD 15 is negative, the polarity of the output of the loop filter 16 is positive. Conversely, when the polarity of the PFD 15 is positive, the polarity of the output of the loop filter 16 is negative.

  The SW 17 connects the output of the loop filter 16 to the ADC 18, connects the output of the loop filter 16 to the DAC 19, or disconnects the output of the loop filter 16 from the ADC 18 and the DAC 19. It is configured to take.

  The ADC 18 measures an input voltage Vt of the VCO 12, that is, a VCO tuning voltage Vt, in a state where the VCO 12 outputs an output signal whose frequency has been changed by the frequency change unit 31 described later. At this time, the ADC 18 converts the VCO tuning voltage Vt into digital data in a state where the output side of the loop filter 16 and the ADC 18 are connected by the SW 17.

  Furthermore, the ADC 18 stores digital data of the VCO tuning voltage Vt in the input voltage storage unit 20 in association with the frequency calculated by the frequency calculation unit 32 described later.

  The DAC 19 converts the digital data of the VCO tuning voltage Vt recorded in the input voltage storage unit 20 into an analog voltage signal while the DAC 19 is connected to the output side of the loop filter 16 by the SW 17 and converts the analog data The voltage signal of is input to the VCO 12.

  The control unit 22 is constituted by, for example, a CPU, a microcomputer including a ROM, a RAM, an HDD, etc. constituting the input voltage storage unit 20 or a personal computer etc. Further, the control unit 22 can configure the frequency change unit 31, the frequency calculation unit 32, and the frequency determination unit 33 described later as software by executing a predetermined program.

  The frequency changing unit 31, the frequency calculating unit 32, and the frequency determining unit 33 can also be configured by digital circuits such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). Alternatively, the frequency change unit 31, the frequency calculation unit 32, and the frequency determination unit 33 can be configured by appropriately combining hardware processing by a digital circuit and software processing by a predetermined program.

  The frequency changing unit 31 sequentially switches the polarity of the phase difference detected by the PFD 15 and the signal selected by the SW 25 by outputting the control signal to the polarity inverting unit 15 a of the PFD 15 and the SW 25 to sequentially switch the VCO oscillation frequency f ( Vt) is to be changed. Furthermore, the frequency changing unit 31 is configured to switch the polarity of the phase difference and the signal selected by the SW 25 from the current state when the frequency determination unit 33 described later makes a negative determination.

  The frequency calculation unit 32 calculates the VCO oscillation frequency f (before the signal selected by the SW 25 switches from the current state based on the polarity of the current phase difference and the frequency of the signal scheduled to be selected next by the SW 25. It is designed to calculate Vt in advance.

  The frequency determination unit 33 is configured to determine whether the frequency calculated by the frequency calculation unit 32 falls within the frequency range in which the VCO 12 can oscillate.

  The operation unit 21 is for performing operation input by the user, and is configured of, for example, a touch panel provided on a display screen of a display device such as an LCD or a CRT. Alternatively, the operation unit 21 may be configured to include an input device such as a keyboard or a mouse. The operation unit 21 may be configured by an external control device that performs remote control by a remote command or the like.

  The input operation by the operation unit 21 is detected by the control unit 22. For example, the user can specify start or stop of measurement of the VCO tuning voltage Vt by the operation unit 21. Further, the user can specify a desired VCO oscillation frequency f (Vt) by means of the operation unit 21. Furthermore, the user may manually designate inversion of the polarity of the phase difference and switching of the signal selected by the SW 25 by the operation unit 21.

  Hereinafter, the change of the VCO oscillation frequency f (Vt) by the frequency change unit 31 will be described based on the oscillation circuit 10 configured as shown in FIG. The frequency of the output of the first PLL circuit 11 is 0.5 GHz, and the frequency of the output of the second PLL circuit 28 is 3.0 GHz. The polarity of the output of the mixer 29 is inverted.

  When the polarity of the PFD 15 is positive (that is, the polarity of the output of the loop filter 16 is negative), the signal of the signal generation unit 23 by the SW 25 causes the output of the first LPF 27 to be 2.5 GHz which is the boundary of polarity. When 14.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 11.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 11.5 GHz, the VCO oscillation frequency f (Vt) is finally locked to 10.5 GHz. Conversely, if the VCO oscillation frequency f (Vt) at a certain point in time is higher than 11.5 GHz, the VCO oscillation frequency f (Vt) eventually locks to 16.5 GHz.

  In addition, when the polarity of the PFD 15 is positive (that is, the polarity of the output of the loop filter 16 is negative), the SW of the signal generation unit 23 causes the output of the first LPF 27 to be 3.5 GHz which is the boundary of the polarity. When the signal (14.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 17.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 17.5 GHz, the VCO oscillation frequency f (Vt) is finally locked to 16.5 GHz. Conversely, if the VCO oscillation frequency f (Vt) at a certain point in time is higher than 17.5 GHz, the VCO oscillation frequency f (Vt) does not lock within 10.0 GHz to 20.0 GHz.

  In addition, when the polarity of the PFD 15 is positive (that is, the polarity of the output of the loop filter 16 is negative), the output of the first LPF 27 becomes 2.5 GHz, which is the boundary of the polarity, by the SW 25 of the signal generation unit 24. When the signal (16.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 13.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 13.5 GHz, the VCO oscillation frequency f (Vt) is finally locked to 12.5 GHz. Conversely, if the VCO oscillation frequency f (Vt) at a certain point is higher than 13.5 GHz, the VCO oscillation frequency f (Vt) is locked to 18.5 GHz.

  In addition, when the polarity of the PFD 15 is positive (that is, the polarity of the output of the loop filter 16 is negative), the SW of the signal generation unit 23 causes the output of the first LPF 27 to be 3.5 GHz which is the boundary of the polarity. When the signal (16.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 19.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 19.5 GHz, the VCO oscillation frequency f (Vt) is finally locked to 18.5 GHz. Conversely, if the VCO oscillation frequency f (Vt) at a certain point in time is higher than 19.5 GHz, the VCO oscillation frequency f (Vt) does not lock within 10.0 GHz to 20.0 GHz.

  In addition, when the polarity of the PFD 15 is negative (that is, the polarity of the output of the loop filter 16 is positive), the output of the first LPF 27 becomes 2.5 GHz, which is the boundary of the polarity, by the SW 25 of the signal generator 23. When the signal (14.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 16.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 16.5 GHz, the VCO oscillation frequency f (Vt) is finally locked to 11.5 GHz. Conversely, if the VCO oscillation frequency f (Vt) at a certain point is higher than 16.5 GHz, the VCO oscillation frequency f (Vt) is locked to 17.5 GHz.

  When the polarity of the PFD 15 is negative (that is, the polarity of the output of the loop filter 16 is positive), the output of the first LPF 27 becomes 3.5 GHz, which is the boundary of the polarity, by the SW 25 of the signal generation unit 23 When the signal (14.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 10.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 10.5 GHz, the VCO oscillation frequency f (Vt) is not locked within 10.0 GHz to 20.0 GHz. Conversely, when the VCO oscillation frequency f (Vt) at a certain point is higher than 10.5 GHz, the VCO oscillation frequency f (Vt) is locked to 11.5 GHz.

  In addition, when the polarity of the PFD 15 is negative (that is, the polarity of the output of the loop filter 16 is positive), the output of the first LPF 27 becomes 2.5 GHz, which is the boundary of the polarity, by the SW 25 of the signal generation unit 24. When the signal (16.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 18.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 18.5 GHz, the VCO oscillation frequency f (Vt) is finally locked to 13.5 GHz. Conversely, if the VCO oscillation frequency f (Vt) at a certain point in time is higher than 18.5 GHz, the VCO oscillation frequency f (Vt) finally locks to 19.5 GHz.

  When the polarity of the PFD 15 is negative (that is, the polarity of the output of the loop filter 16 is positive), the output of the first LPF 27 becomes 3.5 GHz, which is the boundary of the polarity, by the SW 25 of the signal generation unit 24 When the signal (16.0 GHz) is selected, the VCO oscillation frequency f (Vt) is 12.5 GHz. Therefore, when the VCO oscillation frequency f (Vt) at a certain point is lower than 12.5 GHz, the VCO oscillation frequency f (Vt) is not locked within 10.0 GHz to 20.0 GHz. Conversely, if the VCO oscillation frequency f (Vt) at a certain point in time is higher than 12.5 GHz, the VCO oscillation frequency f (Vt) eventually locks to 13.5 GHz.

  FIG. 2 shows an example of the change of the VCO oscillation frequency f (Vt) by the frequency change unit 31.

(State 1) Locking to 10.5 GHz First, at a stage where the VCO tuning voltage is unknown, the frequency changing unit 31 adjusts the VCO oscillation frequency f (Vt) to 10.5 GHz, which is a frequency at which there is little risk of mislocking. At this time, the signal (14.0 GHz) of the signal generation unit 23 is selected by the SW 25 and the polarity of the PFD 15 is positive.

(State 2) Lock to 12.5 GHz When the VCO oscillation frequency f (Vt) is locked to 10.5 GHz and the polarity of the PFD 15 is positive, the signal (16.0 GHz) of the signal generation unit 24 is selected by the SW 25 Then, the frequency of the output of the first LPF 27 is 5.5 GHz, and the frequency of the output of the second LPF 30 is 2.5 GHz. Since this 2.5 GHz is higher than the frequency (0.5 GHz) of the output of the first PLL circuit 11, the PFD 15 outputs a voltage signal to the loop filter 16 to lower the VCO oscillation frequency f (Vt) by 2.0 GHz. . Since the voltage of this voltage signal is inverted by the loop filter 16, the VCO oscillation frequency f (Vt) is increased by 2.0 GHz, and the VCO oscillation frequency f (Vt) is locked at 12.5 GHz.

(State 3) Locked to 16.5 GHz With the VCO oscillation frequency f (Vt) locked to 12.5 GHz higher than 11.5 GHz that is the boundary of polarity and the polarity of PFD 15 is positive, signal generation by SW 25 When the signal (14.0 GHz) of the section 23 is selected, the VCO oscillation frequency f (Vt) finally locks to 16.5 GHz as described above.

(State 4) Lock to 18.5 GHz The VCO oscillation frequency f (Vt) is locked to 16.5 GHz higher than 13.5 GHz which is the boundary of polarity and the polarity of PFD 15 is positive, signal generation by SW 25 When the signal (16.0 GHz) of the part 24 is selected, the VCO oscillation frequency f (Vt) finally locks to 18.5 GHz as described above.

(State 5) Locked at 17.5 GHz The signal of the signal generation unit 23 is output by the SW 25 in a state where the VCO oscillation frequency f (Vt) is locked at 18.5 GHz and the polarity of the PFD 15 is inverted to negative by the polarity inversion unit 15a. When (14.0 GHz) is selected, the frequency of the output of the first LPF 27 is 4.5 GHz, and the frequency of the output of the second LPF 30 is 1.5 GHz. Since this 1.5 GHz is higher than the frequency (0.5 GHz) of the output of the first PLL circuit 11, the PFD 15 outputs to the loop filter 16 a voltage signal that raises the VCO oscillation frequency f (Vt) by 1.0 GHz. . Since the polarity of this voltage signal is inverted by the loop filter 16, the VCO oscillation frequency f (Vt) is lowered by 1.0 GHz, and the VCO oscillation frequency f (Vt) is locked at 17.5 GHz.

(State 6) Locked to 13.5 GHz The VCO oscillation frequency f (Vt) is locked to 17.5 GHz lower than 18.5 GHz which is the boundary of polarity and the polarity of PFD 15 is negative, signal generation by SW 25 When the signal (16.0 GHz) of the unit 24 is selected, the VCO oscillation frequency f (Vt) finally locks to 13.5 GHz as described above.

(State 7) Lock to 11.5 GHz The VCO oscillation frequency f (Vt) is locked to 13.5 GHz lower than 16.5 GHz which is the boundary of polarity and the polarity of PFD 15 is negative, signal generation by SW 25 When the signal (14.0 GHz) of the section 23 is selected, the VCO oscillation frequency f (Vt) finally locks to 11.5 GHz as described above.

  Hereinafter, an example of the process of the voltage measurement method using the oscillation circuit 10 according to the present embodiment will be described with reference to the flowchart of FIG. 3.

  First, the control unit 22 performs various initial settings for adjusting the VCO oscillation frequency f (Vt) to a frequency (for example, 10.5 GHz) in which there is little risk of mislocking (step S1). At this time, the polarity of the PFD 15 is set to either positive or negative, and the SW 25 selects one of the signals of the signal generation units 23 and 24.

  Next, the control unit 22 stands by for a predetermined time (for example, 500 μsec) until the VCO oscillation frequency f (Vt) is locked (step S2).

  Next, the control unit 22 turns on the SW 17 in a direction to connect the output side of the loop filter 16 and the ADC 18 and controls the ADC 18 to measure the output voltage of the loop filter 16, that is, the VCO tuning voltage Vt (voltage measurement step S3).

  Next, the frequency calculation unit 32 calculates the VCO oscillation frequency f (Vt) in advance based on the current polarity of the PFD 15 and the frequency of the signal to be selected next by the SW 25 (step S4).

  Next, the frequency determination unit 33 determines whether the frequency calculated by the frequency calculation unit 32 falls within the frequency range in which the VCO 12 can oscillate (for example, 10.0 GHz to 20.0 GHz) (step S5). If the determination is affirmative, the process proceeds to the frequency change step S6. If the determination is negative, the process proceeds to the frequency change step S7.

  In the frequency change step S6, the frequency change unit 31 switches the signal selected by the SW 25.

  In the frequency change step S7, the frequency change unit 31 switches the polarity of the PFD 15 and the signal selected by the SW 25 from the current state (step S7). As a result, as in the case of the change from (state 4) to (state 5) in FIG. 2, the increase / decrease direction of the VCO oscillation frequency f (Vt) changes.

  Next, the control unit 22 stands by for a predetermined time (for example, 100 μsec) until the VCO oscillation frequency f (Vt) is locked (step S8).

  Next, the control unit 22 controls the ADC 18 to measure the output voltage of the loop filter 16, that is, the VCO tuning voltage Vt (voltage measurement step S9).

  Next, the control unit 22 determines whether measurement of the VCO tuning voltage Vt for all the VCO oscillation frequencies f (Vt) to be measured is completed (step S10). If the determination is negative, the process returns to step S4, and if the determination is affirmative, the process ends.

  The processes in steps S1 to S10 may be performed before shipping, or may be performed by the user at any timing.

  As described above, the oscillation circuit 10 according to the present embodiment can easily change the VCO oscillation frequency to a frequency that does not fail in locking stepwise by sequentially switching the polarity of the PFD 15 and the SW 25. Therefore, the oscillation circuit 10 according to the present embodiment adjusts the VCO oscillation frequency to a frequency low in the risk of failure to lock even if the VCO tuning voltage characteristic is unknown, and then sequentially changes the VCO oscillation frequency. VCO tuning voltage characteristics can be efficiently acquired by This makes it possible to obtain VCO tuning voltage characteristics at low cost without the addition of a dedicated circuit.

  In addition, the oscillation circuit 10 according to the present embodiment can implement high-precision pre-tuning by further including the DAC 19 that inputs the VCO tuning voltage Vt measured by the ADC 18 to the VCO 12.

  In addition, the oscillation circuit 10 according to the present embodiment can automatically change the frequency of the output signal of the VCO 12 in the direction of lowering when the output signal of the VCO 12 reaches the upper limit frequency that can be oscillated. Similarly, the oscillation circuit 10 according to the present embodiment can automatically change the frequency of the output signal of the VCO 12 in the direction of raising the frequency when the output signal of the VCO 12 reaches the lower limit frequency that can be oscillated.

Second Embodiment
Subsequently, a signal generator 40 according to a second embodiment of the present invention will be described with reference to the drawings. The same components as those of the first embodiment are denoted by the same reference numerals, and the description thereof will be appropriately omitted. The description of the same operation as that of the first embodiment will also be omitted as appropriate.

  As shown in FIG. 4, the signal generator 40 includes a waveform data generator 41, a DAC 42, an LPF 43, the oscillator circuit 10 according to the first embodiment which constitutes a local oscillator, an orthogonal modulator 44, and an amplifier. 45, the display unit 46, the operation unit 47, and the control unit 48.

  The waveform data generation unit 41 generates baseband data of I phase (in-phase component) and Q phase (quadrature component) orthogonal to each other as baseband signals of the quadrature modulation signal output from the quadrature modulator 44 (digital Value) is output. Hereinafter, the waveform data of the baseband of the I-phase component is also referred to as "I waveform data", and the waveform data of the baseband of the Q-phase component is also referred to as "Q waveform data".

  As a communication standard to which I waveform data and Q waveform data correspond, for example, cellular (LTE, LTE-A, W-CDMA (registered trademark), GSM (registered trademark), CDMA2000, 1xEV-DO, TD-SCDMA, etc.) Wireless LAN (IEEE 802.11b / g / a / n / ac / ad etc.), Bluetooth (registered trademark), GNSS (GPS, Galileo, GLONASS, BeiDou etc.), FM, and digital broadcasting (DVB-H, ISDB- T etc.).

  For example, the waveform data generation unit 41 stores I waveform data and Q waveform data corresponding to various communication standards as individual waveform files, and I to I from waveform files corresponding to the communication standard selected by the operation unit 47. The waveform data and the Q waveform data are expanded and output to the DAC 42 in the subsequent stage. Alternatively, the waveform data generation unit 41 may sequentially generate and output I waveform data and Q waveform data corresponding to the communication standard selected by the operation unit 47 by using a DSP (Digital Signal Processor).

  The DAC 42 converts the I waveform data and the Q waveform data, which are digital signals, into an analog signal of an I phase component and a Q phase component, respectively. Hereinafter, the analog signal of the I phase component is also referred to as “I waveform analog signal”, and the analog signal of the Q phase component as “Q waveform analog signal”.

  The LPF 43 is configured to remove high frequency components of the output signals of the I-waveform analog signal and the Q-waveform analog signal output from the DAC 42.

  The oscillation circuit 10 outputs a local oscillation signal (local signal) of a desired frequency based on a control signal from the control unit 48 to the quadrature modulator 44.

  The quadrature modulator 44 quadrature modulates the local signal input from the oscillation circuit 10 with the I-waveform analog signal and the Q-waveform analog signal passing through the LPF 43, and outputs it as a quadrature modulation signal. 44a, multipliers 44b and 44c, and an adder 44d.

  The local signal from the oscillation circuit 10 is directly input to the multiplier 44b and, after being phase-shifted by 90 ° by the phase shifter 44a, input to the multiplier 44c. The I waveform analog signal and the Q waveform analog signal that have passed through the LPF 43 are input to the multipliers 44 b and 44 c, respectively.

  The multiplier 44b multiplies the local signal by the I waveform analog signal and outputs the result to the adder 44d. The multiplier 44c multiplies the 90 ° phase-shifted local signal and the Q waveform analog signal, and outputs the result to the adder 44d. The adder 44d adds the outputs of the multipliers 44b and 44c, and outputs the result as a quadrature modulation signal. The quadrature modulation signal output from the quadrature modulator 44 is amplified by the amplifier 45.

  The display unit 46 is configured of, for example, a display device such as an LCD or a CRT, and is configured to display various display contents in accordance with a control signal from the control unit 48. The display contents include a plurality of communication standards, a list of a plurality of waveform data, and the like.

  The operation unit 47 is for performing operation input by the user. For example, the user uses the operation unit 47 to set the communication standard of the quadrature modulation signal output from the signal generator 40 to a plurality of communication standards. You can choose from In addition, it is also possible to set the frequency of the output signal from the oscillation circuit 10 by the operation unit 47 or the like.

  The control unit 48 controls the operation of the above-described units that constitute the signal generation device 40. The operation unit 47 and the control unit 48 may be common to the operation unit 20 and the control unit 22 in the first embodiment, respectively.

  As described above, the signal generating apparatus 40 according to the present embodiment uses the oscillation circuit 10 of the first embodiment as a local oscillator, without adding a dedicated circuit for measuring the VCO tuning voltage characteristic. The measurement of the VCO tuning voltage characteristic can be efficiently performed as needed.

Third Embodiment
Subsequently, a signal analysis device 50 according to a third embodiment of the present invention will be described with reference to the drawings. The same components as those of the first embodiment are denoted by the same reference numerals, and the description thereof will be appropriately omitted. The description of the same operation as that of the first embodiment will also be omitted as appropriate.

  As shown in FIG. 5, the signal analysis apparatus 50 according to the third embodiment of the present invention includes an attenuator (ATT) 51, the oscillation circuit 10 according to the first embodiment that constitutes a local oscillator, and a mixer 52 , IF filter 53, detector 54, video filter 55, ADCs 56 and 57, sweep unit 58, signal processing unit 59, operation unit 60, display unit 61, and control unit 62. , And analyze the measured signal S output from the DUT 1.

  The ATT 51 is an electronic component that has a resistance inside and that attenuates the high frequency measured signal S from the DUT 1 to a signal level that can be processed by the signal processing unit 59 in the subsequent stage, and does not change the impedance.

In the present embodiment, the frequency f _{L of the} local oscillation signal (local signal) oscillated from the oscillation circuit 10 is swept over a predetermined frequency range by the sweep ramp signal output from the sweep unit 58. The frequency of the local signal oscillated from the oscillation circuit 10 is set by the controller 62 in accordance with the desired analysis band.

The mixer 52 mixes the measured signal _S of the frequency f _S attenuated by the ATT 51 with the local signal of the frequency f _L oscillated from the oscillation circuit 10, and an output including the frequency component of the sum and difference of the two signals It generates a signal.

The IF filter 53 is adapted to filter the output signal from the mixer 52. IF filter 53 mixes an intermediate frequency signal of intermediate frequency | f _L −f _S | or f _L + f _{S obtained} by mixing measured signal S and the local signal by mixer 52 in a predetermined intermediate frequency band. Output an intermediate frequency signal of

  The IF filter 53 is configured by an RBW (Resolution Band Width) filter configured by an analog band pass filter and the like and a logarithmic amplifier (log amplifier).

  Since the logarithmic amplifier included in the IF filter 53 is an amplifier that outputs an amplified signal corresponding to the logarithm of the signal to be measured S, if the signal to be measured S is allowed to pass through the IF filter 53, large dynamic It can be handled collectively as a signal of range. Therefore, the signal analysis device 50 can perform display corresponding to decibels using a linear display device.

  In the present embodiment, the output signal from the mixer 52 changes in synchronization with the sweep operation. Therefore, according to the change, the signal which is a time-series waveform in each frequency component of the signal to be measured S converted into the intermediate frequency signal over time within one sweep time (sweep period) by IF filter It is extracted.

  The oscillation circuit 10, the mixer 52, and the IF filter 53 constitute a signal extraction unit that extracts a signal of a predetermined intermediate frequency band obtained by mixing the local signal and the signal to be measured S.

  The detector 54 is, for example, an envelope detector, and is configured to convert the signal extracted by the IF filter 53 into a direct current.

  The detector 54 detects a peak value at each time axis position in the analog frequency spectrum waveform output from the IF filter 53, and outputs a frequency spectrum waveform in a state of envelope detection.

  The signal detected within the sweep period by the detector 54 indicates the magnitude of the time series waveform at the swept frequency. In this case, when the display unit 61 displays a graph with the horizontal axis as frequency and the vertical axis as amplitude level (decibel), the displayed graph becomes a frequency spectrum waveform.

  The video filter 55 is a video bandwidth (VBW) filter and functions as a filter not for the spectrum of the signal detected by the detector 54 but for the time variation of the detected signal. With this function, the video filter 55 obtains the intensity of the signal to be measured S for each frequency, and outputs a signal for displaying a frequency spectrum waveform.

  The ADC 56 samples the signal output from the video filter 55 at a predetermined sampling rate and converts it into time series data as digital data. The time-series data here indicates the frequency characteristic of the amplitude of the signal to be measured S.

The sweep unit 58 generates a sweep ramp signal for sweeping the frequency f _{L of the} local signal oscillated from the oscillation circuit 10 over a predetermined frequency range, and generates the sweep ramp signal according to the set sweep time. Control.

  The ADC 57 converts the sweep ramp signal generated in the sweep unit 58 into digital data and outputs the digital data to the control unit 62.

  Thereby, the control unit 62 controls a sweep period or the like for generating a sweep ramp signal in the sweep unit 58 based on the digital data from the ADC 57.

  The signal processing unit 59 is configured to acquire a frequency spectrum waveform of a predetermined frequency range from time series data output from the ADC 56 while the local signal is frequency swept. Further, the signal processing unit 59 is configured to output the acquired data of the frequency spectrum waveform to the display unit 61.

  The display unit 61 is configured of a display device such as an LCD or a CRT, for example, and displays data of the frequency spectrum waveform output by the signal processing unit 59 in the frequency domain (horizontal axis is frequency, vertical axis is amplitude). ing.

  The operation unit 60 is for performing operation input by the user. For example, the user can use the operation unit 60 to set a display frequency range of measurement results and the like.

  The control unit 62 controls the operation of each of the units constituting the signal generation device 40. The operation unit 60 and the control unit 62 may be common to the operation unit 20 and the control unit 22 of the first embodiment, respectively.

  As described above, the signal analysis apparatus 50 according to the present embodiment uses the oscillation circuit 10 of the first embodiment as a local oscillator, without adding a dedicated circuit for measuring the VCO tuning voltage characteristic. The measurement of the VCO tuning voltage characteristic can be efficiently performed as needed.

10 oscillator circuit 11 first PLL circuit 12 VCO
13 first down conversion unit 14 second down conversion unit 15 PFD
15a Polarity Inversion Unit 16 Loop Filter 18, 56 ADC
19, 42 DAC
23, 24 Signal generator 25 SW
26 1st mixer 28 2nd PLL circuit 29 2nd mixer 31 frequency change part 32 frequency calculation part 33 frequency judgment part 40 signal generator 41 waveform data generation part 44 quadrature modulator 50 signal analysis device 52 mixer 53 IF filter 59 signal processing part

Claims (6)

A voltage controlled oscillator (12) that controls the frequency of the output signal according to the input voltage;
A first down-conversion unit (13) for down-converting the output signal;
A second down-converting unit (14) for down-converting the output of the first down-converting unit;
A first oscillation circuit (11) that outputs a signal of a predetermined frequency;
A phase comparator (15) that outputs a signal according to the phase difference between the output of the second down-conversion unit and the output of the first oscillation circuit;
A loop filter (16) which passes the output of the phase comparator with a predetermined loop bandwidth and inputs it to the voltage controlled oscillator;
A frequency changer (31) for changing the frequency of the output signal of the voltage controlled oscillator;
A voltage measuring unit (18) for measuring the input voltage of the voltage controlled oscillator in a state where the voltage controlled oscillator outputs the output signal whose frequency is changed by the frequency changing unit;
The first down-conversion unit
A plurality of signal generating units (23, 24) that generate signals of different frequencies;
A signal selection unit (25) for selecting one of the signals generated by the plurality of signal generation units;
And a first mixer (26) that outputs a signal obtained by mixing the signal selected by the signal selection unit and the output signal of the voltage control oscillator to the second down-conversion unit. ,
The second down conversion unit
A second oscillation circuit (28) that outputs a signal of a predetermined frequency;
And a second mixer (29) for outputting a signal obtained by mixing the output of the first mixer and the output of the second oscillation circuit to the phase comparator.
The oscillation circuit characterized in that the frequency changing unit changes the frequency of the output signal of the voltage controlled oscillator by sequentially switching the polarity of the phase difference and the signal selected by the signal selecting unit.   The oscillation circuit according to claim 1, further comprising a voltage input unit (19) for inputting the input voltage measured by the voltage measurement unit to the voltage control oscillator. The voltage controlled oscillator before the signal selected by the signal selection unit switches from the current state based on the current polarity of the phase difference and the frequency of the signal scheduled to be selected next by the signal selection unit A frequency calculation unit (32) which previously calculates the frequency of the output signal of
And a frequency determination unit (33) that determines whether the frequency calculated by the frequency calculation unit falls within the frequency range in which the voltage control oscillator can oscillate.
The frequency changer is configured to switch the polarity of the phase difference and the signal selected by the signal selector both from the current state when the frequency determiner makes a negative determination. Or the oscillation circuit of Claim 2. A waveform data generation unit (41) for outputting waveform data of I-phase component and Q-phase component orthogonal to each other;
A D / A converter (42) for converting the waveform data of the I phase component and the Q phase component into analog signals of the I phase component and the Q phase component, respectively;
A local oscillator (10) for outputting a local oscillation signal of a desired frequency;
An orthogonal modulator (44) for orthogonally modulating the local oscillation signal with the analog signal of the I-phase component and the Q-phase component and outputting it as an orthogonal modulation signal;
A signal generator characterized in that the local oscillator includes the oscillation circuit according to any one of claims 1 to 3. A local oscillator (10) that outputs a frequency-swept local oscillation signal;
A signal extraction unit (10, 52, 53) for extracting a signal of a predetermined intermediate frequency band obtained by mixing the measured signal and the local oscillation signal;
An A / D converter (56) which samples the output of the signal extraction unit and converts it into digital time series data;
A signal processor (59) for acquiring a spectrum waveform of the time series data output from the A / D converter while the frequency of the local oscillation signal is swept.
A signal analysis apparatus characterized in that the local oscillator includes the oscillation circuit according to any one of claims 1 to 3. A voltage measurement method using the oscillation circuit according to any one of claims 1 to 3,
A frequency change step (S6, S7) of changing the frequency of the output signal of the voltage controlled oscillator by sequentially switching the polarity of the phase difference and the signal selected by the signal selection unit;
And a voltage measuring step (S3, S9) of measuring the input voltage of the voltage controlled oscillator in a state where the voltage controlled oscillator outputs the output signal whose frequency is changed in the frequency changing step. A voltage measurement method characterized by

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