JP2019033366A - Radio transmitter, radio receiver and radio communication system - Google Patents

Abstract

To provide a radio transceiver that enables modulation with a high multi-value degree in a frequency band larger than 100 GHz.SOLUTION: A radio transmitter comprises: a multi-value modulation transmission unit that outputs a multi-value modulation signal having a carrier frequency equal to or less than 100 GHz; a frequency up-conversion mixer that up-converts the multi-value modulation signal so as to be in a frequency band larger than 100 GHz; a mixer driving signal source that drives the frequency up-conversion mixer; and a power amplifier that amplifies an output signal of the frequency up-conversion mixer. The multi-value modulation transmission unit is configured by using a CMOS transistor. The frequency up-conversion mixer and the mixer driving signal source are configured by using a CMOS transistor or a compound semiconductor transistor. The power amplifier is configured by using a compound semiconductor transistor.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a wireless communication system that handles high-frequency electrical signals.

  In wireless communication, techniques for improving the data rate have been proposed. In order to improve the data rate, there are two approaches: (1) improving the frequency utilization efficiency and increasing the amount of data that can be transmitted in the same bandwidth, and (2) expanding the bandwidth itself used for data transmission. Exists. Here, in a low frequency band such as a microwave band, a usable frequency band is limited because bands are allocated to various applications, and the approach (1) has been selected. Specifically, frequency utilization efficiency is improved by using multilevel modulation techniques such as QPSK (Quadrature Phase Shift Keying), 16QAM (Quadrature Amplitude Modulation), and 64QAM.

  On the other hand, in the high frequency band above the millimeter wave band, there are many bands that can be freely used as compared with the low frequency band, so the approach (2) is often selected. Further, the approach (2) is often taken from the advantage that a large band can be used with a small specific band by using a frequency equal to or higher than the millimeter wave band.

  In other words, narrowband analog circuit components used in electronic circuits constituting transceivers for wireless communication can be operated only within a certain band, which limits the entire band of the radio. However, these analog circuit components tend to have their operating range determined by the value (ratio band) obtained by standardizing the actual band with the center frequency, so when the center frequency increases, the actual band that can operate in the same ratio band. Becomes wider. Since the data rate can be increased as the actual bandwidth of the radio is wider, a radio with a higher data rate can be realized by increasing the carrier frequency.

  For example, in Non-Patent Document 1, data transmission of 10 Gbps is performed by ASK modulation using a band of approximately 15 GHz in the 120 GHz band. In Non-Patent Document 2, ASK modulation is performed using a band of approximately 30 GHz in the 300 GHz band. 20 Gbps data transmission.

  Both of these wireless devices are realized by an electronic circuit using InP-HEMT, which is a transistor having excellent high frequency characteristics. In general, in order to realize a radio device using a frequency band of 100 GHz or higher, it is necessary to use an electronic circuit having excellent high frequency characteristics. Therefore, not an SiCMOS transistor often used in general-purpose electronic circuits, but an InP-HEMT. A transistor using an InP-based compound semiconductor such as InP-HBT is used. This is because the maximum oscillation frequency (fmax) of the transistor is greatly different between the CMOS transistor and the InP compound semiconductor transistor.

  Since fmax is a frequency at which the power gain of the transistor is 1, amplifiers having a power amplification function that is indispensable for wireless communication, such as a power amplifier (PA) for a transmitter or a receiver, at a frequency equal to or higher than fmax. It is difficult to realize a low-noise amplifier (LNA) for use, a buffer amplifier for a gain block, and the like. In CMOS transistors, fmax is about 300 GHz even when using a state-of-the-art process (see, for example, “Non-patent Document 3”), whereas in InP-based compound semiconductor transistors, fmax exceeds 1 THz (for example, “non- (See Patent Document 4).) InP-based transistors are advantageous for circuit design in a frequency band of 300 GHz or higher.

Hirata, Akihiko, et al. "120-GHz-band wireless link technologies for outdoor 10-Gbit / s data transmission. IEEE Transactions on Microwave Theory and Techniques 60.3 (2012): 881-895. Hamada, Hiroshi, et al. "300-GHz band 20-Gbps ASK transmitter module based on InP-HEMT MMICs." Compound Semiconductor Integrated Circuit Symposium (CSICS), 2015 IEEE. IEEE, 2015. Tsai, Kuen-Jou, Jing-Lin Kuo, and Huei Wang. "A W-band power amplifier in 65-nm CMOS with 27GHz bandwidth and 14.8 dBm saturated output power." Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE. IEEE, 2012. Lai, R., et al. "Fabrication of InP HEMT devices with extremely high Fmax." Indium Phosphide and Related Materials, 2008. IPRM 2008. 20th International Conference on. IEEE, 2008. Song, Ho-Jin, et al. "50-Gb / s direct conversion QPSK modulator and demodulator MMICs for terahertz communications at 300 GHz." IEEE Transactions on Microwave Theory and Techniques 62.3 (2014): 600-609. Kawai, Seitaro, et al. "A digitally-calibrated 20-Gb / s 60-GHz direct-conversion transceiver in 65-nm CMOS." Radio Frequency Integrated Circuits Symposium (RFIC), 2013 IEEE. IEEE, 2013. Okada, Kenichi, et al. "20.3 A 64-QAM 60GHz CMOS transceiver with 4-channel bonding." Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International.IEEE, 2014.

  As described above, in order to increase the data rate of wireless communication, in the low frequency band, (1) the approach using the multi-level modulation technique to increase the frequency utilization efficiency is used. Approaches have been taken to widen the bandwidth used. In principle, wireless communication at a very high data rate can be realized by a combined method of these approaches, that is, a method using multilevel modulation in a high frequency band of the millimeter wave band or higher. For example, in Non-Patent Document 5, a data rate of 50 Gbps is realized by performing QPSK modulation in the 300 GHz band. The wireless device of Non-Patent Document 5 is designed using InP-HBT, which is a transistor having excellent high-frequency characteristics, like InP-HEMT.

  However, in the high frequency band, as in the low frequency band, it is difficult to perform an approach for increasing the frequency utilization efficiency by using 16QAM or 64QAM having a higher multilevel. This is because the characteristics required for the quadrature modulator / demodulator which is a component part of the transmitter and receiver for multi-level modulation become severe as the multi-level degree is improved.

  In an orthogonal modulator / demodulator, it is ideal that an I (In-phase) signal and a Q (Quadrature) signal have equal amplitude and a phase difference of 90 °. However, if the amplitude and phase deviate from ideal values, wireless communication The bit error rate (BER) in Along with the improvement of the multi-value degree, the restriction on the amplitude error required for the I signal and the Q signal, and the phase error from 90 ° becomes stricter, so by using an auxiliary circuit such as an IQ mismatch compensation circuit together, The conditions for the amplitude error required for the quadrature modulator and the phase error from 90 ° are relaxed (see, for example, “Non-Patent Document 6”).

  Since the IQ mismatch compensation circuit has a complicated circuit block such as an analog / digital converter as in Non-Patent Document 6, it is usually realized by an electronic circuit using a CMOS transistor capable of realizing a high degree of circuit integration. This is because a compound semiconductor transistor has a characteristic variation larger than that of a CMOS transistor, and is difficult to apply to an electronic circuit using a large number of transistors such as logic. An InP-based compound semiconductor transistor used in a high frequency band is superior to a CMOS transistor in terms of high-frequency performance, but it is difficult to realize a complicated circuit that requires a high degree of integration.

  InP-based compound semiconductor transistors have a high operating frequency for electronic circuits, so they are suitable for application to electronic circuits for high-frequency transceivers, but it is difficult to support high-level modulation methods. There's a problem. On the other hand, in the case of using a CMOS transistor, since the degree of integration can be increased, a complicated circuit such as an IQ mismatch compensation circuit can be realized and a modulation method with a high multilevel can be supported, but the fmax of the transistor is low. It is difficult to realize an electronic circuit that operates in a frequency band exceeding 300 GHz, in particular, PA or LNA, and it is difficult to realize a transceiver for wireless communication using a carrier wave exceeding 300 GHz.

  As described above, in order to realize high-speed wireless communication, there is a method using multilevel modulation in a high frequency band. However, when a frequency band of 300 GHz or more is used as a carrier wave, a CMOS transistor lacks fmax. A high-frequency analog circuit that constitutes a transceiver for wireless communication such as an amplifier cannot be realized. On the other hand, with an InP-based compound semiconductor transistor, a high-frequency analog circuit such as an amplifier can be realized, but an IQ mismatch compensation circuit or the like is complicated. Since it is difficult to realize a circuit, there is a problem in that it is not possible to cope with a modulation system having a high multilevel value.

  In addition, since an actual circuit element has a high-frequency loss of wiring and a loss due to impedance mismatch, an amplifier having an amplification factor in a frequency band close to fmax where the power gain of the transistor only slightly exceeds 1 is realized. Is difficult. In a transistor having a maximum fmax of about 300 GHz such as a CMOS transistor, the frequency band in which a high-performance amplifier can be realized is actually a frequency band near 100 GHz.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a radio transceiver capable of high-level modulation in a frequency band exceeding 100 GHz.

  In order to solve the above problems, a wireless transmitter of the present invention includes a multilevel modulation transmitter that outputs a multilevel modulation signal having a carrier frequency of 100 GHz or less, and the multilevel modulation signal in a frequency band exceeding 100 GHz. A frequency up-conversion mixer for up-conversion, a mixer driving signal source for driving the frequency up-conversion mixer, and a power amplifier for amplifying an output signal of the frequency up-conversion mixer, the multi-level modulation transmission The device is configured using CMOS transistors, the frequency up-conversion mixer and the mixer driving signal source are configured using CMOS transistors or compound semiconductor transistors, and the power amplifier is configured using compound semiconductor transistors. Is done.

  In order to solve the above problems, a wireless receiver of the present invention includes a low noise amplifier that amplifies a multilevel modulation signal having a carrier frequency exceeding 100 GHz, and an output signal of the low noise amplifier in a frequency band of 100 GHz or less. A frequency down-conversion mixer for down-conversion, a mixer driving signal source for driving the frequency down-conversion mixer, and a multi-level modulation signal having a carrier frequency of 100 GHz or less output from the frequency down-conversion mixer The low-noise amplifier is configured using a compound semiconductor transistor, and the frequency down-conversion mixer and the mixer driving signal source are configured using a CMOS transistor or a compound semiconductor transistor. The multi-level demodulation receiver is It constructed using CMOS transistor.

  In order to solve the above problems, a communication system of the present invention includes the above-described wireless transmitter and wireless receiver.

  In order to solve the above problems, a wireless transmitter of the present invention includes a plurality of multi-level modulation transmitters that output a multi-level modulation signal having a carrier frequency of 100 GHz or less, and a plurality of the multi-level modulation signals at 100 GHz. A plurality of frequency up-conversion mixers for up-conversion to a frequency band exceeding, a plurality of mixer driving signal sources for driving the plurality of frequency up-conversion mixers, and an output signal of the plurality of frequency up-conversion mixers in a frequency domain A multi-level modulation transmitter and a power amplifier for amplifying an output signal of the frequency multiplexing circuit, wherein the multilevel modulation transmitter is configured using a CMOS transistor, and the frequency up-conversion mixer and the mixer The driving signal source can be a CMOS transistor or a compound semiconductor transistor. Is constructed using the data, the power amplifier is constructed of a compound semiconductor transistor.

  In order to solve the above problems, a radio receiver according to the present invention includes a low noise amplifier that amplifies a multilevel modulation signal having a carrier frequency exceeding 100 GHz, and a frequency at which an output signal of the low noise amplifier is divided in a frequency domain. A division circuit, a plurality of frequency down-conversion mixers for down-converting an output signal of the frequency division circuit to a frequency band of 100 GHz or less, a plurality of mixer driving signal sources for driving the frequency down-conversion mixer, and the frequency A plurality of multi-level demodulation receivers for demodulating a multi-level modulation signal having a carrier frequency of 100 GHz or less output from the down-conversion mixer, wherein the low noise amplifier is configured using a compound semiconductor transistor, and the frequency The down conversion mixer and the mixer driving signal source are CM Is constructed using the S transistor or a compound semiconductor transistor, said multilevel demodulator receiver is constructed using CMOS transistors.

  In order to solve the above problems, a communication system of the present invention includes the above-described wireless transmitter and wireless receiver.

  According to the present invention, it is possible to provide a radio transceiver capable of high-level modulation in a frequency band exceeding 100 GHz.

FIG. 1 is a configuration example of a radio communication system according to an embodiment of the present invention. FIG. 2 is another configuration example of the radio communication system according to the embodiment of the present invention. FIG. 3 is a specific example of the radio communication system according to the embodiment of the present invention.

  In this embodiment, a compound semiconductor transistor such as InP is used for a circuit block that requires high-speed operation in a wireless transceiver for wireless communication, and a CMOS transistor is used for a circuit block that requires high integration, thereby reducing 100 GHz. A radio transceiver capable of high modulation / demodulation in a frequency band exceeding the above is realized.

  Specifically, in the wireless transmitter of the present embodiment, a multi-level modulation transmitter using a carrier frequency up to about 100 GHz or less configured using a CMOS transistor and a frequency configured using a CMOS transistor or a compound semiconductor transistor. A mixer for up-conversion and a signal source for driving the mixer, and a PA configured using a compound semiconductor and capable of operating in a frequency band exceeding 100 GHz.

  Similarly, in the wireless receiver of the present invention, an LNA that can operate in a frequency band exceeding 100 GHz realized by using a compound semiconductor, a mixer for frequency down-conversion realized by using a CMOS transistor or a compound semiconductor, and a CMOS transistor Alternatively, a signal source for driving the mixer configured using a compound semiconductor and a receiver for multilevel modulation radio using a carrier frequency up to about 100 GHz or less configured using a CMOS transistor are provided.

  1 and 2 show a configuration example of a radio communication system according to an embodiment of the present invention. In FIG. 1, the frequency of a signal of 100 GHz or less handled by a modulator or demodulator configured with a CMOS transistor is indicated by f1, and the frequency of 100 GHz or more handled by a PA or LNA configured by a compound semiconductor transistor is indicated by f2.

  In the wireless transmitter 1 of FIG. 1, the multilevel modulation signal having the carrier frequency f1 generated by the CMOS multilevel modulation transmitter 10 and the LO signal having the frequency f2-f1 output from the signal source 12 for driving the mixer are obtained. Multiplication is performed by the frequency up-conversion mixer 11 to generate a multi-level modulation signal having a carrier frequency f2. Then, the multi-level modulation signal of the carrier frequency f2 is amplified by the PA 13 composed of an InP-based compound semiconductor transistor, and is spatially propagated by the antenna 14 and transmitted.

  In the wireless receiver 2 of FIG. 1, the multi-level modulation signal having the carrier frequency f2 received by the antenna 24 is amplified by the LNA 23 composed of an InP compound semiconductor transistor, and the mixer driving signal source 22 outputs f2-f1. Is multiplied by the frequency down-conversion mixer 21 to generate a multi-level modulation signal having a carrier frequency f1. Then, this multilevel modulation signal is input to the CMOS multilevel demodulation receiver 20 to demodulate data.

  As described above, PAs and LNAs that require high-speed operation are configured by using InP-based compound semiconductor transistors, and CMOS transistors are used in multi-level modulators and demodulators that require high integration. A radio transmitter / receiver capable of modulation / demodulation with high value can be realized.

  In the configuration of FIG. 1, modulation / demodulation with a high multilevel can be realized in a frequency band exceeding 100 GHz, but the data rate is equal to the data rate supported by the CMOS multilevel modulation transmitter. As described above, by increasing the carrier frequency, the band that can actually be used is increased even in the same ratio band. Therefore, the data rate can be further improved by taking advantage of this advantage.

  FIG. 2 shows a configuration in which a frequency multiplexing circuit (MUX) and a frequency division path (DEMUX) are added to the transceiver shown in FIG. With such a configuration, a plurality of multilevel modulation signals can be multiplexed in a frequency band exceeding 100 GHz, and the data rate can be improved.

  In the wireless transmitter 1 of FIG. 2, the multi-level modulation signals generated by the N CMOS multi-level modulation transmitters (10-1 to 10-4) are up-converted by LO signals (LO1-LO4) having different frequencies. These signals are frequency-multiplexed by the MUX 30 and transmitted. On the other hand, in the wireless receiver 2, the multiplexed multilevel modulation signal is divided into N multilevel modulation signals for each frequency by the DEMUX 31, and each multilevel modulation signal is divided into LO signals (LO1- (LO1-)) having the same frequency as that of the transmission side. LO4) is used for down-conversion and input to the CMOS multilevel demodulation receiver (20-1 to 20-4). With this configuration, the data rate can be N times that of FIG. FIG. 2 shows a case where N = 4.

  A specific example of the wireless communication system will be described with reference to FIG. FIG. 3 shows a wireless communication system using a 60-GHz band CMOS multilevel modulation transmitter and a 300-GHz band circuit using an InP-based compound semiconductor.

  In FIG. 3, a multilevel modulation transmitter (10-1 to 10-3) having a transmission rate of 28 Gbps using 16QAM is used as a CMOS multilevel modulation transmitter in the 60 GHz band. For example, such a CMOS multilevel modulation transmitter is described in Non-Patent Document 7. As the 300 GHz band PA 13 of the wireless transmitter 1, one having an operation band of 300 GHz ± 14 GHz and a saturation output power of about 10 dBm is used. For example, such PA is described in Non-Patent Document 2. The LNA 23 of the wireless receiver 2 also has the same bandwidth as that of the PA 13 and has a bandwidth of about NF10. As the up-conversion mixers (11-1 to 11-3) and the down-conversion mixers (21-1 to 21-3), for example, if the distributed modulator described in Non-Patent Document 2 is used, the conversion gain is -15 dB. Both up-conversion and down-conversion can be realized.

  For example, since the bandwidth of the transceiver described in Non-Patent Document 7 is 8.64 GHz, if a PA with an operating bandwidth of 300 GHz ± 14 GHz is used as shown in FIG. 3, frequency multiplexing for 3 channels is performed within the PA bandwidth. Therefore, when the transmission rate of the CMOS multilevel modulation transmitter is 28 Gbps, wireless transmission of 28 × 3 = 84 Gbps can be realized.

  Here, if the bandwidth of the PA 13, LNA 23 and mixer is expanded to about 45 GHz, frequency multiplexing for 5 channels is possible, and wireless transmission of 28 × 5 = 140 Gbps is also possible. Since the center frequency is 300 GHz, the specific band when the band is 45 GHz is 15%, and a high-frequency circuit such as PA can be sufficiently realized.

  As described above, according to the embodiment of the present invention, a circuit block that requires high-speed operation is configured with an InP-based compound semiconductor transistor, and a circuit block that requires high integration is configured with a CMOS transistor, thereby providing a CMOS transistor. It is possible to realize a high data rate wireless transceiver by combining the advantages of InP-based compound semiconductor transistors.

  DESCRIPTION OF SYMBOLS 1 ... Wireless transmitter, 2 ... Wireless receiver, 10 ... Multi-value modulation transmitter, 11 ... Frequency up-conversion mixer, 12 ... Signal source for driving mixer, 13 ... Power amplifier (PA), 14 ... Antenna (transmission) ), 20 ... Multi-level demodulation receiver, 21 ... Frequency down-conversion mixer, 22 ... Mixer drive signal source, 23 ... Power amplifier (PA), 24 ... Antenna (reception), 30 ... Frequency multiplexing circuit, 31 ... Frequency Split circuit.

Claims (6)

A multilevel modulation transmitter for outputting a multilevel modulation signal having a carrier frequency of 100 GHz or less, a frequency upconversion mixer for upconverting the multilevel modulation signal to a frequency band exceeding 100 GHz, and the frequency upconversion mixer. A mixer driving signal source for driving, and a power amplifier for amplifying an output signal of the frequency up-conversion mixer,
The multilevel modulation transmitter is configured using a CMOS transistor, the frequency up-conversion mixer and the mixer driving signal source are configured using a CMOS transistor or a compound semiconductor transistor, and the power amplifier is a compound semiconductor. A wireless transmitter comprising a transistor. A low-noise amplifier that amplifies a multi-level modulation signal having a carrier frequency exceeding 100 GHz, a frequency down-conversion mixer that down-converts an output signal of the low-noise amplifier to a frequency band of 100 GHz or less, and the frequency down-conversion mixer A mixer driving signal source for driving, and a multilevel demodulation receiver for demodulating a multilevel modulation signal having a carrier frequency of 100 GHz or less output from the frequency downconversion mixer,
The low-noise amplifier is configured using a compound semiconductor transistor, the frequency down-conversion mixer and the mixer driving signal source are configured using a CMOS transistor or a compound semiconductor transistor, and the multilevel demodulation receiver includes: A wireless receiver comprising a CMOS transistor.   A wireless communication system comprising the wireless transmitter according to claim 1 and the wireless receiver according to claim 2. A plurality of multi-level modulation transmitters for outputting a multi-level modulation signal having a carrier frequency of 100 GHz or less; a plurality of frequency up-conversion mixers for up-converting the plurality of multi-level modulation signals to a frequency band exceeding 100 GHz; A plurality of mixer driving signal sources for driving the frequency up-conversion mixer, a frequency multiplexing circuit for multiplexing the output signals of the plurality of frequency up-conversion mixers in a frequency domain, and amplifying the output signal of the frequency multiplexing circuit And a power amplifier that
The multilevel modulation transmitter is configured using a CMOS transistor, the frequency up-conversion mixer and the mixer driving signal source are configured using a CMOS transistor or a compound semiconductor transistor, and the power amplifier is a compound semiconductor. A wireless transmitter comprising a transistor. A low noise amplifier that amplifies a multi-level modulation signal having a carrier frequency exceeding 100 GHz, a frequency division circuit that divides the output signal of the low noise amplifier in a frequency domain, and a frequency band in which the output signal of the frequency division circuit is 100 GHz or less A plurality of frequency down-conversion mixers for down-conversion, a plurality of mixer driving signal sources for driving the frequency down-conversion mixer, and a multilevel modulation having a carrier frequency of 100 GHz or less output from the frequency down-conversion mixer A plurality of multi-level demodulation receivers for demodulating the signal,
The low-noise amplifier is configured using a compound semiconductor transistor, the frequency down-conversion mixer and the mixer driving signal source are configured using a CMOS transistor or a compound semiconductor transistor, and the multilevel demodulation receiver includes: A wireless receiver comprising a CMOS transistor.   A wireless communication system comprising the wireless transmitter according to claim 4 and the wireless receiver according to claim 5.

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