JP2019014176A - Image forming apparatus and image forming method - Google Patents

Abstract

To provide an inexpensive printer which dispenses with mounting of a local memory by preventing a delay of printing data caused by transfer of a parameter for control while executing transfer of the printing data and transfer of the parameter for control with a common interface.SOLUTION: An image forming apparatus has a control module and an image processing module, and has a communication section that transfers a control parameter and printing data between the control module and the image processing module, where the communication part executes a dummy lead from the control module to the image processing module whenever a predetermined amount of the control parameter is written from the control module to the image processing module, which prevents transfer of the control parameter and executes transfer of the printing data.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an image forming apparatus and an image forming method.

  In a printing apparatus such as a printer or an MFP (Multi-Functional Peripheral), it is necessary to output print data in accordance with the paper conveyance speed. Therefore, the controller that processes the print data needs to transmit the print data to the engine side at a certain speed or higher. The controller includes components such as a general-purpose SoC (System On Chip), an image processing ASIC (Application Specific Integrated Circuit), and a memory. In the case of an ASIC designed specifically for a printing apparatus, the bus arbiter in the ASIC is designed to ensure a high priority for print data to be transmitted to the engine and to guarantee a transfer band for transmission to the engine. .

  However, in the general-purpose SoC, there is a case where the design of the interface module used for transmitting the print data is not optimized. When the transmission of the print data and the transmission of the control parameter conflict, the transmission of the control parameter is not performed. Until it is completed, the print data cannot be transmitted, and data transfer that matches the paper conveyance speed cannot be performed, and an abnormal image may occur.

  As a method for avoiding conflict between transfer of print data and control parameters, a method of transferring control parameters using a low-speed interface module different from that for print data transfer is known. Also, a method for executing data transfer between the SoC and the engine via a local memory for print data transfer is known. The larger the local memory capacity, the smaller the guaranteed bandwidth required for the print data transfer module. That is, even if the speed temporarily drops, the amount of speed reduction is compensated for while the data exists in the local memory. Therefore, a certain amount of speed fluctuation can be allowed (for example, Patent Document 1).

  However, the conventional method of mounting a general-purpose CPU, chipset, and local memory that optimizes data transfer between engines can reduce the delay of print data transfer to the engine. The problem of rising costs cannot be solved.

  The present invention has been made in view of the above points, and performs a print data transfer and a control parameter transfer through a common interface, while delaying the print data due to the transfer of the control parameter. By suppressing this, an inexpensive printing apparatus that does not require mounting of a local memory is configured.

  In order to solve the above problems, the image forming apparatus includes a control module and an image processing module, and a communication unit that transfers control parameters and print data between the control module and the image processing module. The communication unit transfers the control parameter by executing a dummy read from the control module to the image processing module each time a predetermined amount of the control parameter is written from the control module to the image processing module. The print data is transferred in a suppressed manner.

  Configures an inexpensive printing device that does not require local memory by controlling print data transfer and control parameter transfer through a common interface and suppressing delays in print data due to control parameter transfer can do.

1 is a diagram illustrating a system configuration example of an image forming apparatus 1000 according to an embodiment of the present invention. It is a figure for demonstrating the data accumulate | stored in transmission FIFO_S211 of the print data transfer IF module in embodiment of this invention. It is a figure for demonstrating the dummy read process in the case of writing the control parameter in embodiment of this invention. It is a figure for demonstrating the wait process in the case of writing the control parameter in embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram illustrating a system configuration example of an image forming apparatus 1000 according to an embodiment of the present invention. The memory 4 shown in FIG. 1 will be described by assuming that the printing source data has already been stored and omitting external data input.

  The controller control unit 1 performs overall control of the image forming apparatus, drawing, communication with the outside, control of the operation unit, and the like. The main control SoC2 includes a CPU 22, and performs overall control of the image forming apparatus, drawing control, communication with the outside, control of the operation unit, and the like. The IF module_S21 is a module for communicating with the image processing ASIC 3, and in the present embodiment, it is assumed that it is a PCI express-ROOT module. PCI express (Peripheral Component Interconnect express) is a high-speed serial communication interface. The transmission FIFO_S 211 accumulates data to be transmitted to the image processing ASIC 3 such as write data from the CPU 22 or read data of the memory 4 via the SoC internal bus 23 and performs data transmission in the accumulated order. The reception FIFO_S 212 receives data transmitted from the image processing ASIC, and transmits the data to the CPU 22 or the memory 4 via the SoC internal bus 23. The SoC internal bus 23 mediates data transfer among the CPU 22, the memory 4, the IF module_S 21, and other SoC modules (not shown), and has an arbitration function such as assigning priorities to each module.

  The memory 4 is used for the CPU work area and image data processing, and can also be accessed from the image processing ASIC 3.

  The image processing ASIC 3 generates image data for printing from image data described in a language with a high degree of abstraction, and includes an IF (interface) with the engine control unit 5. The IF module_AS31 is a module for communicating with the main control SoC2, and in this embodiment, a PCI express-ENDPOINT module is assumed. The reception FIFO_AS 311 receives and accumulates the data transmitted from the IF module_S 21, and transmits the data to the target module via the image processing ASIC internal bus 35. The transmission FIFO_AS 312 accumulates data transmitted via the image processing ASIC internal bus 35, and transmits the data to the IF module_S21. The image processing unit 34 generates image data for printing from image data described in a language with a high level of abstraction. Data before and after the generation process is stored in the memory 4 and can be accessed via the IF module_AS31 and the IF module_S21. The control parameter storage unit _A33 stores parameters used for image processing and the like, and is accessed from the CPU 22 via the IF module_S21, IF module_AS31, and image processing ASIC internal bus 35. In this embodiment, the control parameter storage area is the control parameter storage unit _A33. However, as control parameters, control registers of various IF modules and control registers of modules not shown also correspond to the control parameters and are stored. May be stored in the section. The image processing ASIC internal bus 35 mediates data transfer between various modules in the image processing ASIC 3, and has an arbitration function that preferentially transfers print data. The print data control unit 36 reads the engine transfer print data generated by the image processing unit 34 from the memory 4 via the IF module_AS 31 and the IF module_S 21. The read print data is stored in the line buffer 361, and after one line of data is accumulated, the print data is transmitted to the engine control unit 5 via the selector 37 and the IF module_AE32. By collecting and transmitting data for one line, at least one line of data can be transmitted to the engine within a fixed time. In this embodiment, it is assumed that the line buffer 361 has a storage capacity for four lines. The selector 37 selects which of the print data transmitted from the print data control unit 36 and the control parameter transmitted from the CPU 22 via the IF module_AS 31 and IF module_S 21 is transmitted to the IF module_AE 32. When the control parameter and the print data conflict, the print data is transmitted with priority. Control parameters for the engine control unit 5 are exchanged between the control parameter storage unit _E 52 and the CPU 22 via the image processing ASIC internal bus 35 and the selector 37 without passing through the print data control unit 36. . The IF module_AE 32 transmits and receives data between the selector 37 and the engine control unit 5, and performs communication with the engine control unit 5. In this embodiment, the IF module_AE32 is assumed to be a PCI express-ROOT module. The transmission FIFO_AE 321 accumulates the data transmitted from the selector 37, and transmits the data to the engine control unit 5 in the accumulated order. The reception FIFO_AE 322 accumulates the data transmitted from the engine control unit 5 and transmits the data to the target module via the selector 37 in the accumulated order.

  The engine control unit 5 performs various controls such as image formation, paper conveyance, and fixing in order to form print data on a recording medium such as paper, and also performs processing such as density correction and pixel position correction. The IF module_E51 performs communication with the image processing ASIC 3, and a PCI express-ENDPOINT module is assumed in this embodiment. The reception FIFO_E 511 accumulates the data transmitted from the image processing ASIC 3 and transmits the data to the target module via the engine internal bus 53 in the accumulated order. When the transmission data is a control parameter, it is transmitted to the control parameter storage unit_E52, and when the transmission data is print data, it is transmitted to the subsequent processing module. The transmission FIFO_E 512 stores read data from the control parameter storage unit_E52 or other transmission data from an engine module (not shown), and transmits the data to the image processing ASIC 3 in the stored order.

  In the present embodiment, it is assumed that the appearing transmission FIFO and reception FIFO do not have a function of giving priority to accumulated data and changing the transmission order.

  In this embodiment, assuming that data is written to the control parameter storage unit _A33, the worst value of the write band of the control parameter in the image processing ASIC 3 is 2 MByte / s, and the worst value of the read band is 1 MByte / s. Suppose there is. It is assumed that the performance of 2 MByte / s and 1 MByte / s is a bottleneck of the transfer speed of the control parameter. Further, when the CPU 22 transfers the control parameter, it is assumed that 4 bytes are transferred with one transfer command.

Further, it is assumed that the worst value of the transfer band of print data in the image processing ASIC 3 is 512 MByte / s, and this value is a bottleneck of print data transfer when it does not conflict with the control parameter.
The data amount for one line is assumed to be 4096 bytes.
Further, in order to transfer data following the paper conveyance speed, it is assumed that data transfer for one line needs to be completed within 100 us. That is, the allowable transfer time per line of print data required to follow the recording medium conveyance speed is 100 us.

  Therefore, the control parameter for writing data, the dummy read for reading data, and the transfer time for one line are as follows.

[Transfer time per control parameter] = 4 bytes / time ÷ 2 Mbyte / s = 2 us / time [Required time per dummy read] = 4 bytes / time ÷ 1 Mbyte / s = 4 us / time [for one line Transfer time] = (4096 bytes / line × 4 colors) ÷ 512 Mbyte / s = 32 us / line During dummy reading, since control parameter transfer does not occur, print data can be reliably stored in the transmission FIFO_S 211. In order to transfer data for one line in the dummy read period, eight dummy reads may be performed within one line period as shown in the following equation.

[Number of dummy reads per line] = [Transfer time for one line] / [Required time per dummy read]
= 32us / line ÷ 4us / time = 8 times The required number of dummy reads per line is always given priority when the control data transfer conflicts with the print data in the main control SoC2. Although it is calculated assuming that the actual internal control SoC2 does not have a design that gives priority to the control parameter (write of the CPU 22) every time. Therefore, the number of dummy reads per line includes a margin.

  Here, when the number of continuous writes of the control parameter is N, in order to execute data transfer following the paper conveyance speed, the following inequality must be satisfied.

[One-line transfer time for following the paper speed: 100 us]> [Dummy read-in control parameter transfer time]
100us> {N times × [transfer time per control parameter] + [required time per dummy read]} × [number of dummy reads per line]
100us> (N times × 2us / time + 4us / time) × 8 times + 32us = 16 × N + 32us + 32us
N <(100−32) ÷ 16 = 4.25
Therefore, in the present embodiment, control parameter transfer is performed once for every four consecutive transfers.

  In addition, when the capacity of the line buffer 361 is taken into consideration, it is not necessary to perform dummy reading depending on conditions. The paper conveyance starts after the line buffer 361 becomes full (accumulation of data for 4 lines). Since a delay of 3 lines can be tolerated, between 100 us / line × 3 lines = 300 us Transfer of control parameters can be executed. Since the data amount of the control parameter that can be transferred within this time is 300 us × 2 Mbyte / s = 600 bytes, dummy read is not required when the transfer amount of the control parameter is 600 bytes or less. However, once the control parameter transfer of 600 bytes is executed, it is necessary to wait until the line buffer 361 becomes full again. The time required to become full is [transfer time for one line] × 4 lines = 32 us × 4 = 128 us. For control parameters that are updated only once per page, there is no need to worry about waiting time.

  In addition, when the control parameter transfer is executed at a timing that does not conflict with the print data transfer, such as immediately after the power is turned on, the delay of the print data due to the control parameter does not occur. Therefore, the waiting time for each dummy read or 600 byte transfer Is unnecessary.

  In this embodiment, the case of writing to the control parameter storage unit _A33 has been described. However, even when writing to the control parameter storage unit _E52, the transfer bandwidth inside the engine control unit 5 and the delay of the relay module such as the image processing ASIC3 are also set. Considering this, the dummy read execution interval can be calculated in the same manner as when writing to the control parameter storage unit _A33.

  FIG. 2 is a diagram for explaining data stored in the transmission FIFO_S 211 of the print data transfer IF module according to the embodiment of the present invention. In the present embodiment, a description will be given of a case where a dummy read is performed once every four writing of control parameters.

  The write speed of the CPU 22 is sufficiently faster than the worst value (2 MByte / s) of the speed at which the image processing ASIC 3 takes the control parameter. As shown in FIG. 2, four times of control parameter write commands (1 to 4) and control parameter write data (1 to 4) are accumulated. However, since the dummy read occurs after the control parameter is written four times, the dummy read command is accumulated in the transmission FIFO_S 211, and until the dummy read result can be collected, the write command and write data of the next control parameter are not stored. There is no accumulation. While waiting for the dummy read result collection, the print data write command and write data are accumulated in the transmission FIFO_S211. Therefore, the delay of the print data is the sum of the write time for four control parameters and the time for one dummy read at the maximum.

  FIG. 3 is a diagram for explaining the dummy read process when the control parameter is written in the embodiment of the present invention. As shown in FIG. 3, the main control SoC 2 first executes dummy read (S11), and then writes control parameters of 16 bytes or less, that is, 4 times or less (S12). Until all the writing is completed (YES in S13), the dummy read and four or less writes are repeatedly executed (NO in S13).

  The dummy read address is an address of an arbitrary register in the image processing ASIC 3 or a write scheduled address of the next control parameter in accordance with the operation of the main control SoC2. When the main control SoC2 monitors the address of each module such as the IF module_S21 and determines whether or not the write command can be thrown first, the dummy read target address is set to the address of an arbitrary register in the image processing ASIC3. Since the write command is not thrown first to all the arbitrary registers in the image processing ASIC 3, the effect of the dummy read is ensured. On the other hand, when the main control SoC 2 monitors each access address to determine whether or not the write command can be thrown first, if the write command overtakes the previous read command, the read result is It is necessary that the address to be written by the write command, that is, the address to be written next, be a dummy read target address so that the write command is not thrown after the dummy read issuance. The dummy read may be a normal read that uses the acquired data.

  This flow is executed when the amount of the control parameter is 16 bytes or less (the number of writes is 4 or less). If the number of writes is 3 or less, this flow need not be executed.

  FIG. 4 is a diagram for explaining the wait processing when the control parameter is written in the embodiment of the present invention. In order to store four lines of data in the line buffer 361, a WAIT of 128 us or longer is first executed (S21). Subsequently, writing of control parameters of 600 bytes or less, that is, 150 times or less is executed (S22). Until all the writing is completed (YES in S23), the wait of 128 us or more and the writing of 150 times or less are repeatedly executed (NO in S23).

  As described above, according to the embodiment of the present invention, it is possible to prevent the transfer of print data from being delayed by executing a dummy read when the control parameter write continues. In addition, it is possible to prevent the transfer of the print data from being delayed by inserting waits and storing the print data in the line buffer before the control parameter is written. In other words, the printing data transfer and the control parameter transfer are executed by a common interface, and the delay of the print data due to the transfer of the control parameter is suppressed, so that an inexpensive printing apparatus which does not require a local memory. Can be configured.

  In the embodiment of the present invention, the main control SoC 2 is an example of a control module. The image processing ASIC 3 is an example of an image processing module. The IF module_S21 or IF module_AE32 is an example of a communication unit. The engine control unit 5 is an example of a print engine module.

  As mentioned above, although the Example of this invention was explained in full detail, this invention is not limited to such specific embodiment, In the range of the summary of this invention described in the claim, various deformation | transformation・ Change is possible.

1000 Image forming apparatus 1 Controller control unit 2 Main control SoC
3 Image processing ASIC
4 Memory 5 Engine control unit 21 IF module_S
211 Send FIFO_S
212 Receive FIFO_S
22 CPU
23 SoC internal bus 31 IF module_AS
311 Receive FIFO_AS
312 Send FIFO_AS
32 IF module_AE
321 Send FIFO_AE
322 Receive FIFO_AE
33 Control parameter storage unit_A
34 Image processing unit 35 Image processing ASIC internal bus 36 Print data control unit 361 Line buffer 37 Selector 51 IF module_E
511 Receive FIFO_E
512 Transmission FIFO_E
52 Control parameter storage unit_E
53 Engine internal bus

Japanese Patent No. 3682443

Claims (10)

An image forming apparatus having a control module and an image processing module,
A communication unit that transfers control parameters and print data between the control module and the image processing module;
The communication unit transfers the control parameter by performing a dummy read from the control module to the image processing module each time the control module writes the first amount of the control parameter to the image processing module. An image forming apparatus that executes the transfer of the print data while suppressing the print data. The image forming apparatus further includes a print engine module,
The image processing module has a line buffer for storing a plurality of lines of the print data,
The communication unit continuously transmits a second amount of control parameters from the control module to the image processing module after the line buffer becomes full with the print data transmitted from the control module, and the line The image forming apparatus according to claim 1, wherein the print data stored in the buffer is output to the print engine module. The second quantity is
A capacity of the line buffer;
The image forming apparatus according to claim 2, wherein the image forming apparatus is calculated based on a worst value of the writing speed of the control parameter.   The image forming apparatus according to claim 1, wherein the dummy lead includes a lead that uses the acquired data.   The image forming apparatus according to claim 1, wherein the control parameter of the first amount is written continuously. The first quantity is:
The required time per transfer of the control parameters;
The required time per execution of the dummy read,
The required time per line of the print data transfer;
The image forming apparatus according to claim 1, wherein the image forming apparatus is calculated based on an allowable transfer time per line of print data required to follow the conveyance speed of the recording medium. If the write is not performed on any register inside the image processing module until the dummy read for any register inside the image processing module is complete,
The image forming apparatus according to claim 1, wherein the target for executing the dummy read is an arbitrary register in the image processing module. If the write is not performed on the specific address until the dummy read for the specific address inside the image processing module is completed,
8. The image forming apparatus according to claim 1, wherein the target for executing the dummy read is an address to which a next control parameter is to be written. 9. An image forming method executed by an image forming apparatus having a control module and an image processing module,
Executing a communication procedure for transferring control parameters and print data between the control module and the image processing module;
The communication procedure suppresses transfer of the control parameter by executing a dummy read from the control module to the image processing module each time a predetermined amount of the control parameter is written from the control module to the image processing module. An image forming method including a procedure of transferring the print data. The image forming method includes:
A control procedure for storing a plurality of lines of the print data in a line buffer of the image processing module;
In the communication procedure, after the line buffer becomes full of the print data transmitted from the control module, a predetermined amount of control parameters are continuously transmitted from the control module to the image processing module. The image forming method according to claim 9, further comprising: a step of outputting the print data stored in a print engine module to a print engine module included in the image forming apparatus.

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