JP2018501706A - シンボル遷移クロッキングトランスコーディングのエラー検出定数 - Google Patents
シンボル遷移クロッキングトランスコーディングのエラー検出定数 Download PDFInfo
- Publication number
- JP2018501706A JP2018501706A JP2017527729A JP2017527729A JP2018501706A JP 2018501706 A JP2018501706 A JP 2018501706A JP 2017527729 A JP2017527729 A JP 2017527729A JP 2017527729 A JP2017527729 A JP 2017527729A JP 2018501706 A JP2018501706 A JP 2018501706A
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- JP
- Japan
- Prior art keywords
- symbols
- symbol
- edc
- transition
- sequence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
- H04L1/245—Testing correct operation by using the properties of transmission codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03178—Arrangements involving sequence estimation techniques
- H04L25/03248—Arrangements for operating in conjunction with other apparatus
- H04L25/03286—Arrangements for operating in conjunction with other apparatus with channel-decoding circuitry
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/493—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by transition coding, i.e. the time-position or direction of a transition being encoded before transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Probability & Statistics with Applications (AREA)
- Spectroscopy & Molecular Physics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Quality & Reliability (AREA)
- General Physics & Mathematics (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Dc Digital Transmission (AREA)
- Communication Control (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201462084998P | 2014-11-26 | 2014-11-26 | |
| US62/084,998 | 2014-11-26 | ||
| US201562216692P | 2015-09-10 | 2015-09-10 | |
| US62/216,692 | 2015-09-10 | ||
| US201562236522P | 2015-10-02 | 2015-10-02 | |
| US62/236,522 | 2015-10-02 | ||
| US14/949,435 | 2015-11-23 | ||
| US14/949,435 US10089173B2 (en) | 2014-11-26 | 2015-11-23 | Error detection constants of symbol transition clocking transcoding |
| PCT/US2015/062504 WO2016086038A1 (en) | 2014-11-26 | 2015-11-24 | Error detection constants of symbol transition clocking transcoding |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2018501706A true JP2018501706A (ja) | 2018-01-18 |
| JP2018501706A5 JP2018501706A5 (enExample) | 2018-12-20 |
Family
ID=56010308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017527729A Pending JP2018501706A (ja) | 2014-11-26 | 2015-11-24 | シンボル遷移クロッキングトランスコーディングのエラー検出定数 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US9842020B2 (enExample) |
| EP (2) | EP3224977A1 (enExample) |
| JP (1) | JP2018501706A (enExample) |
| CN (2) | CN107005346A (enExample) |
| WO (2) | WO2016086045A1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3767904A1 (en) | 2013-10-29 | 2021-01-20 | Samsung Electronics Co., Ltd. | A method and system using ternary sequences for simultaneous transmission to coherent and non-coherent recievers |
| US9842020B2 (en) | 2014-11-26 | 2017-12-12 | Qualcomm Incorporated | Multi-wire symbol transition clocking symbol error correction |
| US20180054216A1 (en) * | 2016-08-22 | 2018-02-22 | Qualcomm Incorporated | Flipped bits for error detection and correction for symbol transition clocking transcoding |
| US10884858B2 (en) * | 2018-03-16 | 2021-01-05 | SK Hynix Inc. | LDPC decoding device, memory system including the same and method thereof |
| US11005503B2 (en) | 2018-03-16 | 2021-05-11 | SK Hynix Inc. | Memory system with hybrid decoding scheme and method of operating such memory system |
| CN110275796B (zh) | 2018-03-16 | 2023-08-08 | 爱思开海力士有限公司 | 具有混合解码方案的存储器系统及其操作方法 |
| US11281603B2 (en) | 2018-08-03 | 2022-03-22 | Kioxia Corporation | Serial interface for semiconductor package |
| CN110022187B (zh) * | 2019-03-06 | 2020-08-04 | 华中科技大学 | 通信调制系统中(n,n(n-1),n-1)-PGC代数解码方法及解码器 |
| CN110022278B (zh) * | 2019-03-06 | 2020-08-04 | 华中科技大学 | 通信调制系统中(n,n(n-1),n-1)-PGC的编码方法及编码器 |
| CN112783472B (zh) * | 2019-11-05 | 2023-12-12 | 何群 | 多值逻辑宽位高速加法器 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014150984A1 (en) * | 2013-03-15 | 2014-09-25 | Qualcomm Incorporated | Multi-wire single-ended push-pull link with data symbol transition based clocking |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US5793983A (en) * | 1996-01-22 | 1998-08-11 | International Business Machines Corp. | Input/output channel interface which automatically deallocates failed subchannel and re-segments data block for transmitting over a reassigned subchannel |
| US6192503B1 (en) * | 1997-08-14 | 2001-02-20 | Ericsson Inc. | Communications system and methods employing selective recursive decording |
| US6615387B1 (en) | 1998-09-22 | 2003-09-02 | Seagate Technology Llc | Method and apparatus for error detection |
| US6505321B1 (en) * | 1999-05-20 | 2003-01-07 | Emc Corporation | Fault tolerant parity generation |
| GB2361853A (en) * | 2000-04-28 | 2001-10-31 | Mitel Corp | Turbo encoding for trellis modulation |
| US20030152154A1 (en) | 2002-02-14 | 2003-08-14 | Johnson Ryan C. | Coding and decoding system and method for high-speed data transmission |
| WO2004002094A1 (en) | 2002-06-25 | 2003-12-31 | Lockheed Martin Corporation | Method to increase the hamming distance between frame delimiter symbol and data symbols of a mbnb line code |
| JP2004288283A (ja) * | 2003-03-20 | 2004-10-14 | Hitachi Ltd | 情報記録フォーマット、情報記録再生符号化方法・回路およびこれを用いた磁気ディスク記録再生装置、情報記録再生装置、並びに情報通信装置 |
| US7191385B2 (en) | 2003-04-24 | 2007-03-13 | Locus Location Systems, Llc | Error correction in a locating method and system |
| US7559004B1 (en) | 2003-10-01 | 2009-07-07 | Sandisk Corporation | Dynamic redundant area configuration in a non-volatile memory system |
| US20080028281A1 (en) * | 2005-01-14 | 2008-01-31 | Shunji Miyazaki | Encoding method, decoding method, and devices for same |
| KR100688534B1 (ko) * | 2005-01-26 | 2007-03-02 | 삼성전자주식회사 | 변조 코드의 부호화 및 복호화방법 및 장치 |
| US7502982B2 (en) * | 2005-05-18 | 2009-03-10 | Seagate Technology Llc | Iterative detector with ECC in channel domain |
| KR100984289B1 (ko) * | 2005-12-07 | 2010-09-30 | 포항공과대학교 산학협력단 | 통신 시스템에서 가변 부호화율을 지원하는 신호 송수신장치 및 방법 |
| US8196011B2 (en) | 2006-02-15 | 2012-06-05 | Hitachi Ulsi Systems Co., Ltd. | Error detection and correction circuit and semiconductor memory |
| US7694204B2 (en) | 2006-03-09 | 2010-04-06 | Silicon Image, Inc. | Error detection in physical interfaces for point-to-point communications between integrated circuits |
| US7657821B1 (en) | 2006-05-09 | 2010-02-02 | Cisco Technology, Inc. | Error detecting code for multi-character, multi-lane, multi-level physical transmission |
| US8028216B1 (en) * | 2006-06-02 | 2011-09-27 | Marvell International Ltd. | Embedded parity coding for data storage |
| US7949931B2 (en) | 2007-01-02 | 2011-05-24 | International Business Machines Corporation | Systems and methods for error detection in a memory system |
| US20090132894A1 (en) | 2007-11-19 | 2009-05-21 | Seagate Technology Llc | Soft Output Bit Threshold Error Correction |
| CN101493804B (zh) | 2008-01-24 | 2011-07-20 | 国际商业机器公司 | 数据总线系统及其编解码器和编解码方法 |
| WO2009111175A1 (en) | 2008-03-06 | 2009-09-11 | Rambus Inc. | Error detection and offset cancellation during multi-wire communication |
| US7769048B2 (en) | 2008-06-25 | 2010-08-03 | Intel Corporation | Link and lane level packetization scheme of encoding in serial links |
| US8213229B2 (en) * | 2008-08-22 | 2012-07-03 | HGST Netherlands, B.V. | Error control in a flash memory device |
| US8910009B1 (en) | 2008-09-08 | 2014-12-09 | Marvell International Ltd. | Method and apparatus for enhancing error detection in data transmission |
| US8401120B1 (en) | 2010-05-13 | 2013-03-19 | Qualcomm Incorporated | Symbol error detection for bluetooth enhanced data rate packets |
| US8689089B2 (en) | 2011-01-06 | 2014-04-01 | Broadcom Corporation | Method and system for encoding for 100G-KR networking |
| US8522122B2 (en) | 2011-01-29 | 2013-08-27 | International Business Machines Corporation | Correcting memory device and memory channel failures in the presence of known memory device failures |
| JP5348263B2 (ja) | 2012-02-29 | 2013-11-20 | 富士通株式会社 | データ伝送装置、データ伝送システムおよびデータ伝送方法 |
| EP3055929A1 (en) | 2013-10-09 | 2016-08-17 | Qualcomm Incorporated | ERROR DETECTION CAPABILITY OVER CCIe PROTOCOL |
| US10007628B2 (en) | 2014-06-18 | 2018-06-26 | Qualcomm Incorporated | Dynamically adjustable multi-line bus shared by multi-protocol devices |
| US9842020B2 (en) | 2014-11-26 | 2017-12-12 | Qualcomm Incorporated | Multi-wire symbol transition clocking symbol error correction |
-
2015
- 2015-11-23 US US14/949,290 patent/US9842020B2/en not_active Expired - Fee Related
- 2015-11-23 US US14/949,435 patent/US10089173B2/en not_active Expired - Fee Related
- 2015-11-24 WO PCT/US2015/062511 patent/WO2016086045A1/en not_active Ceased
- 2015-11-24 EP EP15805713.3A patent/EP3224977A1/en not_active Withdrawn
- 2015-11-24 WO PCT/US2015/062504 patent/WO2016086038A1/en not_active Ceased
- 2015-11-24 CN CN201580063826.5A patent/CN107005346A/zh active Pending
- 2015-11-24 EP EP15816567.0A patent/EP3224979A1/en not_active Withdrawn
- 2015-11-24 JP JP2017527729A patent/JP2018501706A/ja active Pending
- 2015-11-24 CN CN201580063814.2A patent/CN107005250A/zh active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014150984A1 (en) * | 2013-03-15 | 2014-09-25 | Qualcomm Incorporated | Multi-wire single-ended push-pull link with data symbol transition based clocking |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2016086045A1 (en) | 2016-06-02 |
| WO2016086038A1 (en) | 2016-06-02 |
| CN107005346A (zh) | 2017-08-01 |
| US20160147596A1 (en) | 2016-05-26 |
| US9842020B2 (en) | 2017-12-12 |
| CN107005250A (zh) | 2017-08-01 |
| US10089173B2 (en) | 2018-10-02 |
| EP3224979A1 (en) | 2017-10-04 |
| EP3224977A1 (en) | 2017-10-04 |
| US20160149729A1 (en) | 2016-05-26 |
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