JP2018205458A - Defect inspection apparatus for euv blank and euv mask, defect inspection method, and manufacturing method for euv mask - Google Patents

Defect inspection apparatus for euv blank and euv mask, defect inspection method, and manufacturing method for euv mask Download PDF

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JP2018205458A
JP2018205458A JP2017109186A JP2017109186A JP2018205458A JP 2018205458 A JP2018205458 A JP 2018205458A JP 2017109186 A JP2017109186 A JP 2017109186A JP 2017109186 A JP2017109186 A JP 2017109186A JP 2018205458 A JP2018205458 A JP 2018205458A
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euv
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multilayer film
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和範 関
Kazunori Seki
和範 関
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Toppan Inc
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Abstract

To provide a defect inspection apparatus for an EUV blank capable of accurately acquiring a state of defects which occurred in a multilayer film leading to the phase defect in the inside of the multilayer film, in particular, position information in the thickness direction, and to provide a defect inspection apparatus for an EUV mask using the defect inspection apparatus for the EUV blank.SOLUTION: There is provided a defect inspection apparatus for an EUV blank comprising: a light source A3 irradiating a multilayer film of the EUV blank with a plurality of light of different wavelengths; a sensor A2 receiving reflected light of irradiated light; an image forming unit for forming images from the received reflected light; and a defect position determining unit for determining a defect position present in the multilayer film in the thickness direction. In addition, the defect inspection apparatus for the EUV blank comprises; a function of retrieving an absorption film pattern data of the EUV mask; and a phase defect pass/fail determination unit for performing an EUV light exposure simulation.SELECTED DRAWING: Figure 4

Description

本発明は、極端紫外線(Extreme Ultra Violet;EUV)を光源とするEUVリソグラフィで使用される反射型のEUVブランク及びEUVマスクの欠陥検査装置、欠陥検査方法、EUVマスクの製造方法に関する。   The present invention relates to a defect inspection apparatus, a defect inspection method, and an EUV mask manufacturing method for a reflective EUV blank and EUV mask used in EUV lithography using extreme ultraviolet (EUV) as a light source.

半導体集積回路の回路パターンは、性能及び生産性を向上させるために微細化、高集積化が進んでおり、パターン形成に使用される露光装置の光源についても短波長化が進められている。次世代のリソグラフィ候補としては、波長13.5ナノメートル(nm)付近の極端紫外線(以下、EUV又はEUV光と記載)を用いたパターン転写プロセスが開発されている。   The circuit pattern of a semiconductor integrated circuit has been miniaturized and highly integrated in order to improve performance and productivity, and the light source of an exposure apparatus used for pattern formation has also been shortened in wavelength. As a next-generation lithography candidate, a pattern transfer process using extreme ultraviolet light (hereinafter referred to as EUV or EUV light) near a wavelength of 13.5 nanometers (nm) has been developed.

EUVを用いるリソグラフィでは従来の193nm等の深紫外光とは異なり、あらゆる物質の屈折率が1に近い値であり、吸収係数も大きいことから、屈折を用いた透過光学系が適用できない。そこで、屈折率差の大きい材料を交互に積層した多層膜ミラーを用いた反射光学系の露光装置が用いられている。それに伴い、フォトマスクも従来の透過型ではなく反射型のマスク(以下、EUVマスクと記載)が用いられる。   In lithography using EUV, unlike conventional deep ultraviolet light such as 193 nm, the refractive index of all materials is a value close to 1, and the absorption coefficient is large, so that a transmission optical system using refraction cannot be applied. Therefore, an exposure apparatus of a reflective optical system using a multilayer mirror in which materials having a large refractive index difference are alternately stacked is used. Accordingly, a reflection type mask (hereinafter referred to as EUV mask) is used instead of a conventional transmission type.

EUVマスクの概略を図7に示す。EUVマスクは基板40の上にEUV光を反射する反射多層膜(多層膜)30c、多層膜30cの保護膜20、回路パターンを形成する吸収膜10があり、また、基板40の裏面には静電チャックを使用するために導電膜50が形成されている。   An outline of the EUV mask is shown in FIG. The EUV mask has a reflective multilayer film (multilayer film) 30c for reflecting EUV light on the substrate 40, a protective film 20 for the multilayer film 30c, and an absorption film 10 for forming a circuit pattern. A conductive film 50 is formed to use an electric chuck.

基板40としては例えば酸化チタンを添加した酸化珪素(SiO)からなる超低熱膨張ガラス(Low Thermal Expansion Material、以下LTEMと略記)が用いられる。多層膜30cは、光の波長が13.5nmの場合、30aと30bと表記したように、珪素(Si)とモリブデン(Mo)をそれぞれ約4.2nm、2.8nmとして交互に40〜50対(図7では見易さのため5対)積層した多層膜が用いられる。多層膜の表面には、多層膜表面を保護するSiやルテニウム(Ru)からなる保護膜(キャッピング膜)20が形成されていることが多い。吸収膜10はEUV光を吸収する膜であり、たとえばタンタルを主成分とする膜が用いられ、パターン欠陥検査の感度を高める等の目的で多層構造となっている場合もある。 As the substrate 40, for example, an ultra-low thermal expansion material (hereinafter, abbreviated as LTEM) made of silicon oxide (SiO 2 ) added with titanium oxide is used. When the wavelength of light is 13.5 nm, the multilayer film 30c has silicon (Si) and molybdenum (Mo) of about 4.2 nm and 2.8 nm, respectively, as indicated by 30a and 30b. A laminated multilayer film is used (five pairs in FIG. 7 for easy viewing). In many cases, a protective film (capping film) 20 made of Si or ruthenium (Ru) for protecting the surface of the multilayer film is formed on the surface of the multilayer film. The absorption film 10 is a film that absorbs EUV light. For example, a film containing tantalum as a main component is used, and it may have a multilayer structure for the purpose of increasing the sensitivity of pattern defect inspection.

一般に、フォトマスクブランク(ブランク)とは、回路パターンが形成される前のフォトマスクの形態を言うが、本願では、多層膜は形成されているが吸収膜を成膜する前の形態、また多層膜を掘り込んで吸収膜パターンの代わりとするために後に吸収膜を成膜しない形態、さらにアライメントマークやアクセサリパターン等が描画された状態のものもEUVブランクと呼ぶ。EUVブランクからEUVマスクを作製する際には、電子線(EB)リソグラフィとエッチング技術により吸収膜10を部分的に除去し、EUV光の吸収部(低反射部)と反射部(高反射部)からなる回路パターンを形成する。このように作製されたEUVマスクによって反射された光像が反射光学系を経て半導体基板(以下ウエハ)に転写される。   In general, a photomask blank (blank) refers to a form of a photomask before a circuit pattern is formed. In the present application, a form in which a multilayer film is formed but before an absorption film is formed, or a multilayer is formed. A form in which an absorption film is not formed later in order to dig a film instead of the absorption film pattern, and a state in which an alignment mark, an accessory pattern, etc. are drawn are also called EUV blanks. When producing an EUV mask from an EUV blank, the absorption film 10 is partially removed by electron beam (EB) lithography and etching technology, and an EUV light absorption part (low reflection part) and reflection part (high reflection part). A circuit pattern is formed. The light image reflected by the EUV mask thus manufactured is transferred to a semiconductor substrate (hereinafter referred to as a wafer) through a reflection optical system.

一般に、ウエハ上の集積回路パターンの製造方法としては、フォトマスク上に前記回路パターンをウエハ上の設計寸法より4倍〜10倍に拡大した寸法で形成し、縮小投影の露光方法によりフォトマスク上の回路パターンを1/4〜1/10に縮小した寸法でウエハ
上に回路パターンを形成する。
In general, as a method of manufacturing an integrated circuit pattern on a wafer, the circuit pattern is formed on a photomask with a size that is 4 to 10 times larger than the design size on the wafer, and the exposure method of reduced projection is used on the photomask. The circuit pattern is formed on the wafer with a size reduced to 1/4 to 1/10.

従って、集積回路の製造において、原版となるフォトマスク上の欠陥判定は重要である。集積回路は前述したようにフォトマスクのパターンを縮小して転写されるため、フォトマスク上の欠陥サイズと、集積回路上の欠陥サイズは一致しない。欠陥の転写されやすさは、周辺回路の密度や寸法、欠陥種類、形成位置、欠陥サイズ等により異なる。そのため欠陥判定を誤ると、フォトマスク上の欠陥が集積回路に転写され、パターンの欠落や寸法異常等の不良となる。   Therefore, in manufacturing an integrated circuit, it is important to determine a defect on a photomask serving as an original. Since the integrated circuit is transferred with the photomask pattern reduced as described above, the defect size on the photomask and the defect size on the integrated circuit do not match. The ease with which defects are transferred varies depending on the density and size of peripheral circuits, the type of defect, the formation position, the defect size, and the like. Therefore, if the defect determination is wrong, the defect on the photomask is transferred to the integrated circuit, resulting in a defect such as a missing pattern or an abnormal dimension.

特にEUVマスクにおいては従来のフォトマスクでは見られない特有の位相欠陥が発生する可能性がある。位相欠陥は多層膜の一部に段差が生じているものであり、位相欠陥があるとその部分の反射率が低下する。位相欠陥は基板上の異物(パーティクル)、基板を研磨する際に生じるピットやスクラッチ状欠陥、あるいは多層膜を堆積中に混入する異物やボイドなどが原因となる。   In particular, in the EUV mask, there is a possibility that a specific phase defect that cannot be seen in the conventional photomask may occur. The phase defect has a step in a part of the multilayer film, and if there is a phase defect, the reflectance of that part is lowered. The phase defect is caused by foreign matter (particles) on the substrate, pits or scratch-like defects generated when the substrate is polished, or foreign matter or voids mixed during the deposition of the multilayer film.

図8にパーティクルが原因となって発生する位相欠陥(60a、60b、60c、60d)を模式的に示す。これらはEUVブランクの製造工程で発生した欠陥であり、60aは基板上に付着したパーティクル、60b、60c、60dは多層膜の成膜途中にパーティクルが付着した事により生じたものである。以下、本願では、位相欠陥の原因をパーティクルとして説明するが、他の原因の位相欠陥に対しても本発明の有効性は同様である。   FIG. 8 schematically shows phase defects (60a, 60b, 60c, 60d) caused by particles. These are defects generated in the manufacturing process of the EUV blank, 60a being particles adhering to the substrate, and 60b, 60c, and 60d being caused by particles adhering during the formation of the multilayer film. Hereinafter, in the present application, the cause of the phase defect will be described as particles, but the effectiveness of the present invention is the same for the phase defect of other causes.

成膜途中でパーティクル付着が起こると、図8に示すように多層膜がパーティクルの上に積層され、周期の乱れが生じる。この周期の乱れは多層膜の上層部まで伝播され、正常部との間に位相差を生じる。このため、欠陥近傍に回路パターンがある場合には転写された回路パターンの欠落や寸法異常等の問題が発生する。このように、多層膜周期の乱れによる位相欠陥はウエハ上の回路パターンの形成に大きな影響を及ぼす。   When particle adhesion occurs during film formation, a multilayer film is stacked on the particles as shown in FIG. This disturbance of the period is propagated to the upper layer part of the multilayer film, and a phase difference is generated between the normal part and the normal part. For this reason, when there is a circuit pattern in the vicinity of the defect, problems such as missing transferred circuit patterns and abnormal dimensions occur. Thus, the phase defect due to the disturbance of the multilayer film period has a great influence on the formation of the circuit pattern on the wafer.

図9に、多層膜内に発生した欠陥の厚さ方向位置の違いによる、欠陥部と正常部のEUV反射光の位相差を計算した例を示す。図9(a)はモデル図であり、Eは入射EUV光、Rmは正常部の反射EUV光、Rdは欠陥部の反射EUVである。尚、当然ながら反射は多層膜内の各界面での反射の重ね合わせとなるが、図9(a)では最表面の矢印で代表させている。多層膜30cはSiとMoからなり全層数はL0=40対とした。ここで、パーティクル欠陥P(高さ2nmのSiとした)の位置(多層膜表面からの層数(Ld:対))を変化させてRmとRdの位相差を計算した結果が図9(b)である。このように僅か2nmの高さの欠陥であっても、Ldが大きくすなわち基板40に近い位置にあるほど大きな位相差を生じることが分かる。計算には表1に示す各材料の光学定数(屈折率、消衰係数)を用いた。基板であるLTEMはSiOの値で代用した。尚、基板の消衰係数は計算式に含まれない。 FIG. 9 shows an example in which the phase difference between the EUV reflected light of the defective portion and the normal portion is calculated due to the difference in the thickness direction position of the defect generated in the multilayer film. FIG. 9A is a model diagram, where E is incident EUV light, Rm is reflected EUV light of a normal part, and Rd is reflected EUV of a defective part. Of course, the reflection is a superposition of the reflections at each interface in the multilayer film, but is represented by the arrow on the outermost surface in FIG. The multilayer film 30c is made of Si and Mo, and the total number of layers is L0 = 40 pairs. Here, the result of calculating the phase difference between Rm and Rd by changing the position (number of layers from the multilayer film surface (Ld: pair)) of the particle defect P (made Si of 2 nm in height) is shown in FIG. ). Thus, it can be seen that even a defect having a height of only 2 nm causes a larger phase difference as Ld is larger, that is, closer to the substrate 40. The optical constants (refractive index and extinction coefficient) of each material shown in Table 1 were used for the calculation. The value of SiO 2 was substituted for LTEM as the substrate. The extinction coefficient of the substrate is not included in the calculation formula.

図10に示すのは多層膜内に発生した欠陥の厚さ方向位置の違いによるウエハ転写への影響を実験して調べた結果である。例として、欠陥幅40nm、高さ2nmのパーティクル欠陥が多層膜の0層目(最表面)から40層目(底面、基板上)の各厚さで発生した場合のウエハ寸法変動量(正常部との差)を測定した。尚、パーティクルの材料としては鉄(Fe)を用いた。欠陥が多層膜(図7−30c)の最上部(図7−保護膜20の直下)で発生した場合を0層、底部(図7−基板40の上部)の位置で発生した場合を40層とする。この結果より、欠陥の厚さ方向位置の違いにより、ウエハ上の寸法が5〜6%変動する事が分かる。   FIG. 10 shows the results of experiments and investigations on the influence on the wafer transfer caused by the difference in the thickness direction position of defects generated in the multilayer film. As an example, the wafer size fluctuation amount (normal part) when a particle defect having a defect width of 40 nm and a height of 2 nm occurs in each thickness from the 0th layer (outermost surface) to the 40th layer (bottom surface, on the substrate) of the multilayer film. Difference). Note that iron (Fe) was used as the material of the particles. When the defect occurs in the uppermost part (FIG. 7-30 directly below the protective film 20) of the multilayer film (FIGS. 7-30c), 0 layer, and when the defect occurs in the position of the bottom part (FIG. 7-above the substrate 40), 40 layers And From this result, it can be seen that the dimension on the wafer varies by 5 to 6% due to the difference in the position of the defect in the thickness direction.

EUVブランクの欠陥検査は、様々な手法が開発されている。例えばEUV光を用いた
暗視野型の欠陥検査方法は、LPP光源(Laser−Produced Plasma光源)から発生するEUV光を用いて、露光用実験装置の縮小光学系を逆に拡大光学系として利用することで、位相欠陥からの散乱光をCCDカメラで撮影するものである。本検査手法は、位相欠陥の原因となるEUVブランク表面の微小な凹凸を外観的に検査できる高感度な方式とされている。
Various methods have been developed for EUV blank defect inspection. For example, a dark-field defect inspection method using EUV light uses EUV light generated from an LPP light source (Laser-Produced Plasma light source) and conversely uses a reduction optical system of an exposure experimental apparatus as an enlargement optical system. Thus, the scattered light from the phase defect is photographed with a CCD camera. This inspection method is a high-sensitivity method that can visually inspect minute irregularities on the EUV blank surface that cause phase defects.

従来のフォトマスクでは、検出された欠陥は修正工程で修正される。しかし、EUVブランクの位相欠陥は、位相欠陥そのものを修正することは困難である。そのため、EUVブランクの修正は行わず、まず、予め基板上に作製したアライメント用マークを基準にして、位相欠陥の平面上の位置と個数を記録しておく。   In the conventional photomask, the detected defect is corrected in a correction process. However, it is difficult to correct the phase defect of the EUV blank. For this reason, the EUV blank is not corrected, and first, the position and number of phase defects on the plane are recorded with reference to the alignment marks prepared on the substrate in advance.

次に、EUVブランクの位相欠陥の位置と回路パターンデータを比較し、位相欠陥が吸収膜の下にある場合にはその位相欠陥はウエハ上への露光転写時に影響を及ぼさないため、その位相欠陥を修正する必要はない。そのため、回路パターンをEUVマスク上に配置する際、位相欠陥の位置情報を活用して、位相欠陥の位置が回路パターンのない領域(遮光領域)又は吸収膜の下に隠れるように、パターンレイアウトを変更する手法が提案されている。   Next, the position of the phase defect of the EUV blank and the circuit pattern data are compared. If the phase defect is under the absorption film, the phase defect does not affect the exposure transfer onto the wafer. There is no need to fix. Therefore, when the circuit pattern is arranged on the EUV mask, the pattern layout is made so that the position of the phase defect is hidden under the area without the circuit pattern (light-shielding area) or under the absorption film by utilizing the position information of the phase defect. A method of changing is proposed.

しかしながら、パターンレイアウトを変更して位相欠陥を遮光領域又は吸収膜の下に隠す前記の手法を用いても、全ての位相欠陥を回避させることは困難であり、どうしても幾つかの位相欠陥は、回路パターンにかかってしまう。この場合の改善方法として、特許文献1には、位相欠陥に隣接する吸収膜パターン部分を削除、またはいったん削除した後付加する等の変成(変更)を行う補償パターンを利用することにより、ウエハ上に転写される回路パターンを改善する方法が記載されている。前記の削除や付加は、FIB(Focused Ion Beam)や電子ビームによる修正装置を利用して実施される。尚、以下適宜、吸収膜に形成した回路パターンを吸収膜パターンと記載する。   However, it is difficult to avoid all the phase defects even by using the above-described method of changing the pattern layout and hiding the phase defects under the light shielding region or the absorption film. It will be applied to the pattern. As an improvement method in this case, Patent Document 1 discloses that a compensation pattern for performing transformation (change) such as deletion or addition after deletion of the absorption film pattern adjacent to the phase defect is used on the wafer. Describes a method for improving the circuit pattern transferred to the computer. The deletion or addition is performed using a FIB (Focused Ion Beam) or a correction device using an electron beam. Hereinafter, a circuit pattern formed on the absorption film will be referred to as an absorption film pattern as appropriate.

特許文献1には、位相欠陥に隣接する吸収膜パターンを修正する方法が具体的に開示されている。すなわち、吸収膜パターンの修正状況によって吸収膜パターンに隣接する位相欠陥の露出状態が変わり、ウエハ転写に与える影響が変化してしまうため、EUV光による転写性評価システムであるAIMS(登録商標、Aerial Image Measurement System=空間像測定システム)を利用し、何度も修正とAIMSによる確認のトライアンドエラーを実施している。   Patent Document 1 specifically discloses a method of correcting an absorption film pattern adjacent to a phase defect. That is, the exposure state of the phase defect adjacent to the absorption film pattern changes depending on the correction state of the absorption film pattern, and the influence on the wafer transfer changes. Therefore, AIMS (registered trademark, Aerial) which is a transferability evaluation system using EUV light is changed. Image Measurement System (aerial image measurement system) is used, and trial and error of correction and confirmation by AIMS are performed many times.

AIMSはフォトマスクの欠陥部位の画像を装置に取り込み、ウエハ上への転写像を形成し、その画像及び画像から計測したパターン寸法により回路パターンへのフォトマスク欠陥の影響度を評価するものである(例えば特許文献2参照)。EUVマスク用としても同装置の開発が進められているが、量産対応へ向けて精度、スループット等の課題が残っており、前記のように修正装置による作業と、AIMSによる確認作業を何度も繰り返し行う必要があることから、EUVマスク作製のTAT(Turn Around Time)が非常に長くなってしまうという問題がある。   AIMS captures an image of a defective portion of a photomask into the apparatus, forms a transfer image on the wafer, and evaluates the degree of influence of the photomask defect on the circuit pattern based on the image and a pattern size measured from the image. (For example, refer to Patent Document 2). Although development of the same device is being promoted for EUV masks, problems such as accuracy and throughput remain for mass production. As described above, the work with the correction device and the confirmation work with the AIMS are repeated many times. Since it needs to be repeated, there is a problem that TAT (Turn Around Time) for EUV mask fabrication becomes very long.

EUVマスクの欠陥転写性評価方法としては、シミュレーションを用いる手法も提案されている(特許文献3参照)。すなわち、吸収膜パターンのレイアウト時や修正前に、位相欠陥の情報とパターンデータをパラメータとする露光シミュレーションを行うことで、吸収膜パターンの最適なレイアウトや修正量を求める方法である。   As a method for evaluating defect transferability of an EUV mask, a method using simulation has also been proposed (see Patent Document 3). That is, this is a method for obtaining an optimal layout and correction amount of the absorption film pattern by performing exposure simulation using phase defect information and pattern data as parameters at the time of layout and before correction of the absorption film pattern.

特開2012−089580号公報JP 2012-089580 A 特開2009−92792号公報JP 2009-92792 A 特開2012−142468号公報JP 2012-142468 A

前記のシミュレーションを用いる方法で位相欠陥のウエハ転写への影響を評価する場合、位相欠陥の高さ、深さや幅といった情報は、前述のEUV光を用いた暗視野型の欠陥検査装置では取得できないため、AFM(Atomic Force Microscope)などの手法を使って測定されている。しかしながら、AFMでは、EUVブランクの最表面の状態しか把握することができず、多層膜のどこが位相欠陥の起点になっているか、位相欠陥の発生源の形状がどのようになっているか、といったことは知ることができない。   When the influence of phase defects on wafer transfer is evaluated by the method using the simulation, information such as the height, depth, and width of the phase defects cannot be obtained by the dark field type defect inspection apparatus using the EUV light described above. Therefore, it is measured using a technique such as AFM (Atomic Force Microscope). However, in AFM, only the state of the outermost surface of the EUV blank can be grasped, and what is the origin of the phase defect in the multilayer film and what is the shape of the source of the phase defect. Can not know.

図10で示したように、欠陥の発生位置によりウエハへの欠陥転写性は大きく異なるため、位相欠陥に隣接する吸収膜パターンを最適にレイアウト及び修正するには、多層膜の位相欠陥の内部における情報を用いて露光シミュレーションを行う必要がある。すなわち、表面の凹凸だけでなく多層膜内部の状態も考慮する必要があり、特に多層膜内に発生した欠陥の多層膜厚さ方向の的確な位置情報(厚さ方向位置情報)が重要である。しかしながら、現状は多層膜内に埋め込まれた欠陥の厚さ方向位置情報を好適に取得する好適な方法は見出されていない。   As shown in FIG. 10, since the defect transferability to the wafer varies greatly depending on the position where the defect occurs, in order to optimally lay out and correct the absorption film pattern adjacent to the phase defect, the phase defect inside the multilayer film must be It is necessary to perform exposure simulation using information. That is, it is necessary to consider not only the surface irregularities but also the state inside the multilayer film, and in particular, accurate position information (thickness direction position information) in the multilayer film thickness direction of defects generated in the multilayer film is important. . However, at present, no suitable method has been found for suitably acquiring position information in the thickness direction of defects embedded in the multilayer film.

本発明は上記の問題に鑑みてなされたもので、その目的とするところは、多層膜の位相欠陥の原因となる多層膜内に発生した欠陥の状態、特に厚さ方向位置情報を的確に取得することができるEUVブランク欠陥検査装置を提供することにある。さらに好ましくは、前記的確に取得した厚さ方向位置情報を用いて精度のよい露光シミュレーションを精度よく実施することができるEUVブランク及びEUVマスクの欠陥検査装置、欠陥検査方法、該欠陥検査方法を用いたEUVマスクの製造方法を提供することにある。   The present invention has been made in view of the above problems, and its object is to accurately acquire the state of defects generated in a multilayer film that causes phase defects of the multilayer film, particularly thickness direction position information. It is an object of the present invention to provide an EUV blank defect inspection apparatus that can be used. More preferably, an EUV blank and EUV mask defect inspection apparatus, a defect inspection method, and the defect inspection method capable of accurately performing an accurate exposure simulation using the thickness direction position information accurately obtained are used. Another object of the present invention is to provide a method for manufacturing an EUV mask.

上記の課題を解決するために、請求項1に記載の発明は、EUVブランクの多層膜に波長の異なる複数の光を照射する光源と、
照射した前記光の反射光を受光するセンサと、
受光した前記反射光から画像を形成する画像形成部と、
形成した前記画像から、前記多層膜中に存在する欠陥の厚さ方向の位置を判定する欠陥位置判定部と、を備えることを特徴とするEUVブランク欠陥検査装置としたものである。
In order to solve the above-described problem, the invention according to claim 1 includes a light source that irradiates a multilayer film of an EUV blank with a plurality of lights having different wavelengths,
A sensor for receiving reflected light of the irradiated light;
An image forming unit that forms an image from the received reflected light;
And a defect position determination unit that determines a position in the thickness direction of a defect present in the multilayer film from the formed image.

請求項2に記載の発明は、前記複数の光の波長が193nm〜532nmから選択される2つ以上の異なる波長であることを特徴とする請求項1に記載のEUVブランク欠陥検査装置としたものである。   The invention according to claim 2 is the EUV blank defect inspection apparatus according to claim 1, wherein the wavelengths of the plurality of lights are two or more different wavelengths selected from 193 nm to 532 nm. It is.

請求項3に記載の発明は、前記多層膜への前記複数の光の照射は、前記多層膜の表(おもて)面又は裏面(基板側)又はその両方から行われることを特徴とする請求項1、2のいずれかに記載のEUVブランク欠陥検査装置としたものである。   The invention according to claim 3 is characterized in that the irradiation of the plurality of lights onto the multilayer film is performed from the front (front) surface, the back surface (substrate side) or both of the multilayer film. The EUV blank defect inspection apparatus according to claim 1.

請求項4に記載の発明は、前記波長の異なる複数の光を前記多層膜に同時に照射し、前記複数の光の反射光による画像を同時に形成することを特徴とする請求項1〜3のいずれか一項に記載のEUVブランク欠陥検査装置としたものである。   According to a fourth aspect of the present invention, the multilayer film is simultaneously irradiated with a plurality of lights having different wavelengths, and an image formed by reflected light of the plurality of lights is simultaneously formed. The EUV blank defect inspection apparatus according to claim 1.

請求項5に記載の発明は、請求項1〜4のいずれか一項に記載のEUVブランク欠陥検査装置が備える機能に加え、
EUVマスクの吸収膜パターンデータを取り込む機能を備え、
EUV露光シミュレーションを行う位相欠陥合否判定部を備える
ことを特徴とするEUVブランク及びEUVマスク欠陥検査装置としたものである。
In addition to the function with which the EUV blank defect inspection apparatus as described in any one of Claims 1-4 is equipped, the invention of Claim 5 is provided,
Equipped with a function to capture EUV mask absorption film pattern data,
The present invention provides an EUV blank and EUV mask defect inspection apparatus including a phase defect acceptance / rejection determination unit that performs EUV exposure simulation.

請求項6に記載の発明は、EUVブランクの多層膜に波長の異なる複数の光を照射し、
照射した前記光の反射光をセンサにより受光し、
受光した前記反射光から画像を形成し、
形成した前記画像から、前記多層膜中に存在する欠陥の厚さ方向の位置を判定することを特徴とするEUVブランク欠陥検査方法としたものである。
The invention according to claim 6 irradiates a multilayer film of EUV blank with a plurality of lights having different wavelengths,
The reflected light of the irradiated light is received by a sensor,
Forming an image from the received reflected light,
The EUV blank defect inspection method is characterized in that a position in the thickness direction of a defect existing in the multilayer film is determined from the formed image.

請求項7に記載の発明は、前記複数の光の波長が193nm〜532nmから選択される2つ以上の異なる波長であることを特徴とする請求項6に記載のEUVブランク欠陥検査方法としたものである。   The invention according to claim 7 is the EUV blank defect inspection method according to claim 6, wherein the wavelengths of the plurality of lights are two or more different wavelengths selected from 193 nm to 532 nm. It is.

請求項8に記載の発明は、前記多層膜への前記複数の光の照射は、前記多層膜の表(おもて)面又は裏面(基板側)又はその両方から行われることを特徴とする請求項6、7のいずれかに記載のEUVブランク欠陥検査方法としたものである。   The invention according to claim 8 is characterized in that the irradiation of the plurality of lights to the multilayer film is performed from the front (front) surface, the back surface (substrate side) or both of the multilayer film. The EUV blank defect inspection method according to claim 6.

請求項9に記載の発明は、請求項6〜7のいずれか一項に記載のEUVブランク欠陥検査方法に加え、EUVマスクの吸収膜パターンデータを用い、
EUV露光シミュレーションを行って位相欠陥合否判定を行うことを特徴とするEUVブランクまたはEUVマスクの製造方法としたものである。
In addition to the EUV blank defect inspection method according to any one of claims 6 to 7, the invention according to claim 9 uses the absorption film pattern data of the EUV mask,
An EUV exposure simulation is performed to determine whether a phase defect is acceptable or not.

本発明を実施することにより、EUVブランクに発生する位相欠陥の原因となる欠陥の厚さ方向位置情報を的確に取得する事が可能となる。従って、そこで得られた位相欠陥情報を基により精度の高い露光シミュレーションを行うことができるので、パターニング前のEUVブランクに対して補償パターンを含む最適な吸収膜パターンレイアウトを行うこと、及びパターニング後のEUVマスクに対して補償パターンを含む最適な吸収膜パターンの修正を行うことができるようになる。従って、従来よりも効率よくウエハ転写への位相欠陥の影響を回避するEUVマスクを製造することが可能となる。   By implementing the present invention, it is possible to accurately acquire position information in the thickness direction of defects that cause phase defects occurring in EUV blanks. Therefore, since an exposure simulation with high accuracy can be performed based on the phase defect information obtained there, an optimum absorption film pattern layout including a compensation pattern can be performed on the EUV blank before patterning, and after patterning. It becomes possible to correct the optimum absorption film pattern including the compensation pattern for the EUV mask. Therefore, it is possible to manufacture an EUV mask that avoids the influence of phase defects on wafer transfer more efficiently than in the past.

(a)光が多層膜へ入射したときの反射率を計算するためのモデル図。(b)多層膜の層数と、オモテ(空気)側から入射した各波長の光の反射率の関係を計算した特性図。(A) Model diagram for calculating reflectance when light is incident on a multilayer film. (B) The characteristic view which calculated the relationship between the number of layers of a multilayer film, and the reflectance of the light of each wavelength which injected from the front (air) side. 多層膜の層数と、ウラ(基板)側から入射した各波長の光に対する反射率の関係を計算した特性図。The characteristic view which calculated the relationship between the number of layers of a multilayer film, and the reflectance with respect to the light of each wavelength which injected from the back (substrate) side. 多層膜への各波長の光の浸透深さを求めた特性図。The characteristic view which calculated | required the penetration depth of the light of each wavelength to a multilayer film. 本発明の実施の形態に係る、EUVブランク欠陥検査装置の基本構成図。1 is a basic configuration diagram of an EUV blank defect inspection apparatus according to an embodiment of the present invention. 本発明の別の実施の形態に係る、EUVブランク欠陥及びEUVマスク欠陥検査装置の基本構成図。The basic block diagram of the EUV blank defect and EUV mask defect inspection apparatus based on another embodiment of this invention. 本発明の実施形態に係る、EUVブランク及びEUVマスクの位相欠陥検査フロー図。The phase defect inspection flow figure of EUV blank and EUV mask based on embodiment of this invention. EUVマスクの模式断面図。The schematic cross section of an EUV mask. 多層膜の成膜工程で発生するパーティクル欠陥の模式断面図。FIG. 3 is a schematic cross-sectional view of a particle defect that occurs in a multilayer film formation step. (a)位相欠陥部と正常部の反射光の位相差を計算するためのモデル図。(b)位相欠陥部と正常部の反射光の位相差を計算した例を示す特性図。(A) Model diagram for calculating phase difference between reflected light of phase defect portion and normal portion. (B) The characteristic view which shows the example which calculated the phase difference of the reflected light of a phase defect part and a normal part. 位相欠陥の発生位置とウエハ上寸法変動量の関係を求める実験結果を例示する特性図。The characteristic view which illustrates the experimental result which calculates | requires the relationship between the generation | occurrence | production position of a phase defect, and the amount variation on a wafer.

以下に、本発明を実施する形態について、図面を用いてさらに詳しく具体的に説明する。同一の構成要素については便宜上の理由がない限り同一の符号を付け、重複する説明は省略する。各図面において、見易さのため構成要素の厚さや比率は誇張されていることがあり、構成要素の数も減らして図示していることがある。また、本発明の趣旨を逸脱しない範囲で、以下の実施形態に限定されるものではない。   Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings. The same components are denoted by the same reference numerals unless there is a reason for the sake of convenience, and redundant description is omitted. In each drawing, the thicknesses and ratios of the constituent elements may be exaggerated for ease of viewing, and the number of constituent elements may be reduced. Moreover, it is not limited to the following embodiment in the range which does not deviate from the meaning of this invention.

本発明の欠陥検査装置では、通常光学的検査に用いられる波長領域の光を用いるので、該波長領域の光がEUVマスクの多層膜に浸透する深さ(浸透深さ)を把握する必要がある。その手がかりとして、はじめに、193、257、365、488nmの各波長の光が異なる層数の多層膜へ入射したときの反射率を計算した。図1(a)はそのモデル図であり、図1(b)は多層膜の層数が変化したときのオモテ(空気)側から入射した各波長の光の反射率の計算結果である。図1(b)によれば、波長=193、257、365、488nmのとき、それぞれ層数が4対、3対、6対、12対ほどになると反射率は飽和しており、それ以上厚い層数へは光が浸透しないことが予想される。尚、波長が長くなるほど多層膜の透明性が増すため、干渉の影響が出て反射率の変化は曲線状になっている。   Since the defect inspection apparatus of the present invention uses light in the wavelength region normally used for optical inspection, it is necessary to grasp the depth (penetration depth) that the light in the wavelength region penetrates into the multilayer film of the EUV mask. . As a clue, first, reflectance was calculated when light of each wavelength of 193, 257, 365, and 488 nm was incident on a multilayer film having a different number of layers. FIG. 1A is a model diagram thereof, and FIG. 1B is a calculation result of the reflectance of light of each wavelength incident from the front (air) side when the number of layers of the multilayer film is changed. According to FIG. 1B, when the wavelengths are 193, 257, 365, and 488 nm, the reflectivity is saturated when the number of layers is about 4, 3, 6, and 12, respectively, and the thickness is thicker. It is expected that light will not penetrate into the number of layers. In addition, since the transparency of the multilayer film increases as the wavelength becomes longer, the influence of interference appears and the change in reflectance is curved.

図2は、図1(b)と同じ計算を、ウラ(基板40)側から入射した各波長の光に対して行った結果である。これによれば、反射率自体はオモテ(空気)側入射よりも5〜10%程度低くなるものの、反射率に飽和傾向が見られる層数(対)はオモテ(空気)側入射とほぼ同じであり、従って光の浸透深さもオモテ(空気)側入射の場合と同等であることが予想される。図1、図2の計算には表2に示す各材料の光学定数(屈折率、消衰係数)を用いた。基板であるLTEMはSiOの値で代用した。尚、基板の消衰係数は計算式に含まれない。 FIG. 2 is a result of performing the same calculation as FIG. 1B on the light of each wavelength incident from the back side (substrate 40) side. According to this, although the reflectance itself is about 5 to 10% lower than the front side (air) side incidence, the number of layers (pairs) in which the reflectance tends to be saturated is almost the same as the front side (air) side incidence. Therefore, it is expected that the penetration depth of light is equivalent to the case of front side (air) side incidence. The optical constants (refractive index and extinction coefficient) of each material shown in Table 2 were used for the calculations in FIGS. The value of SiO 2 was substituted for LTEM as the substrate. The extinction coefficient of the substrate is not included in the calculation formula.

図3に示すのは、波長の異なる複数の光を多層膜表面から照射し、それぞれの波長の光が多層膜のどの厚さまで浸透するかをシミュレーションして求めた結果である。各波長に対する材料の光学特性の違いにより、光の浸透深さは異なり、波長193nmの場合は多層膜の表面から3層、257nmの光は表面から2層、365nmは5層、488nmは12層、532nmは11層まで光が浸透することが分かる。以上のことから、本発明では、波長ごとに多層膜への光の浸透深さが異なる事を利用して、欠陥の厚さ方向位置を判定する。   FIG. 3 shows results obtained by irradiating a plurality of light beams having different wavelengths from the surface of the multilayer film and simulating to which thickness of the multilayer film the light of each wavelength penetrates. The penetration depth of light varies depending on the optical characteristics of the material for each wavelength. When the wavelength is 193 nm, 3 layers from the surface of the multilayer film, 257 nm light from the surface is 2 layers, 365 nm is 5 layers, 488 nm is 12 layers It can be seen that light penetrates up to 11 layers at 532 nm. From the above, in the present invention, the position in the thickness direction of the defect is determined by utilizing the fact that the penetration depth of light into the multilayer film differs for each wavelength.

図4は本発明の実施の形態に係る、EUVブランク欠陥検査装置100の基本構成図である。EUVブランクA4を搭載可能なステージA1、EUVブランクA4に光を照射する光源A3、及び受光センサA2を備える。また、受光センサA2に接続する画像形成部(コンピュータ、表示機器等からなる)で画像を形成し、目的に応じた各種の画像処理を行う。   FIG. 4 is a basic configuration diagram of the EUV blank defect inspection apparatus 100 according to the embodiment of the present invention. A stage A1 on which the EUV blank A4 can be mounted, a light source A3 for irradiating the EUV blank A4 with light, and a light receiving sensor A2 are provided. In addition, an image is formed by an image forming unit (comprising a computer, a display device, etc.) connected to the light receiving sensor A2, and various image processes are performed according to the purpose.

図5は、本発明の別の実施の形態に係る、EUVブランク欠陥及びEUVマスク欠陥検査装置200の基本構成図である。EUVブランク欠陥及びEUVマスク欠陥検査装置200は、図4のEUVブランク欠陥検査装置100に加えて、さらに画像形成部・画像処理部に接続する位相欠陥合否判定部(コンピュータ、表示機器等からなる)を備える。位相欠陥合否判定部では、(後述の図6にて説明するように)EUVブランクの欠陥検査の場合は補償パターンを含む吸収膜パターンのレイアウトデータ、EUVマスクの欠陥検査の場合は補償パターンを含む吸収膜パターンの修正データを取り込み、画像形成部・画像処理部からの情報とともに、EUV露光のシミュレーションを行い、位相欠陥の規格値と比較して、各位相欠陥の合否判定を行う。   FIG. 5 is a basic configuration diagram of an EUV blank defect and EUV mask defect inspection apparatus 200 according to another embodiment of the present invention. In addition to the EUV blank defect inspection apparatus 100 of FIG. 4, the EUV blank defect and EUV mask defect inspection apparatus 200 further includes a phase defect acceptance / rejection determination unit (comprising a computer, a display device, etc.) connected to the image forming unit / image processing unit. Is provided. In the phase defect acceptance / rejection determination unit (as will be described later with reference to FIG. 6), in the case of EUV blank defect inspection, the absorption film pattern layout data including the compensation pattern, and in the case of EUV mask defect inspection, the compensation pattern is included. The correction data of the absorption film pattern is taken in, and the EUV exposure simulation is performed together with information from the image forming unit / image processing unit, and the pass / fail judgment of each phase defect is performed by comparing with the standard value of the phase defect.

光源A3は193nm〜532nmの波長から選択される光を2つ以上照射可能であり、複数の波長の光を分割又は連続的に照射可能となっている。選択した波長の光を複数の光照射は複数の光源を切替えるか、もしくは広帯域光をビーム分岐し波長選択フィルターを通すことによっても得られる。複数の光の受光は、時間分割であってもよく、光路の交差を避けるように複数の受光センサを配置してもよい。   The light source A3 can irradiate two or more lights selected from wavelengths of 193 nm to 532 nm, and can divide or continuously irradiate light having a plurality of wavelengths. A plurality of light irradiations of light of a selected wavelength can be obtained by switching a plurality of light sources or by branching broadband light through a wavelength selection filter. The light reception of the plurality of lights may be time division, and a plurality of light receiving sensors may be arranged so as to avoid crossing of the optical paths.

図6は、本発明の実施形態に関わるEUVブランク及びEUVマスクの位相欠陥検査方法を示すフロー図である。まず、S0の工程で、多層膜に対する光の浸透深さをシミュレーションまたは測定で取得する。照射光は波長193〜532nmの範囲の光が好ましく、この中から2つ以上の光を選び、それらの浸透深さを取得する。多層膜が同一材料・構造であれば、毎回取得する必要はないため、事前に取得しライブラリ化しておくことが望ましい。   FIG. 6 is a flowchart showing a phase defect inspection method for EUV blanks and EUV masks according to an embodiment of the present invention. First, in step S0, the penetration depth of light into the multilayer film is obtained by simulation or measurement. The irradiation light is preferably light having a wavelength in the range of 193 to 532 nm, and two or more lights are selected from these, and the penetration depth thereof is acquired. If the multilayer film is the same material / structure, it is not necessary to obtain it every time, so it is desirable to obtain it in advance and make it into a library.

図6−S1工程は、位相欠陥の平面位置情報を得るための工程であり、EUV光を用いた暗視野型の欠陥検査や紫外線光を用いた一般的なブランク検査装置が使用される。図6−S2の工程は、多層膜内に埋め込まれた欠陥部に波長の異なる複数の光を照射し、照射した光の反射光を受光センサで受光し、受光した反射光から画像を形成する工程である。各波長のセンサ画像形成は複数の装置を用いて、それぞれ別々に撮影しても良い。   The step S1 in FIG. 6 is a step for obtaining the plane position information of the phase defect, and a dark field type defect inspection using EUV light and a general blank inspection apparatus using ultraviolet light are used. In the step of FIG. 6-S2, a plurality of lights having different wavelengths are irradiated to the defect portion embedded in the multilayer film, the reflected light of the irradiated light is received by the light receiving sensor, and an image is formed from the received reflected light. It is a process. The sensor image formation for each wavelength may be performed separately using a plurality of devices.

図6−S3の工程は、S0工程の浸透深さデータと、S2工程で形成した画像により、各位相欠陥(の原因となっている欠陥)の厚さ方向位置を判定するとともに、画像のコントラストから幅、形状を把握し、必要に応じてAFM測定の結果と合わせて、位相欠陥の情報を集積する工程である。尚、画像は、欠陥の断面視プロファイルが斜めになっている部分では光が斜め方向に反射しコントラストが変化するため、幅、形状の情報が得られる。   In the process of FIG. 6-S3, the thickness direction position of each phase defect (defect causing it) is determined from the penetration depth data of the S0 process and the image formed in the S2 process, and the contrast of the image. In this step, the width and shape are ascertained, and phase defect information is accumulated together with the result of AFM measurement as necessary. Note that in the image, information on the width and shape can be obtained because light is reflected in an oblique direction and the contrast changes in a portion where the sectional view profile of the defect is oblique.

図6−S5の工程は、回路パターンへの欠陥の影響度を調べるためEUV露光シミュレーションを行う工程である。S5工程では、本来の回路パターンデータ(D1)と、S3工程で集積した位相欠陥情報と、S4工程での位相欠陥を回避する補償パターンを含む吸収膜パターンのレイアウト結果を使ってEUV露光シミュレーションを行う。この際、S3工程で判定した欠陥の厚さ方向位置情報を利用することで、従来よりも高い精度でシミュレーションすることができる。   The process of FIG. 6-S5 is a process of performing an EUV exposure simulation in order to investigate the degree of influence of defects on the circuit pattern. In step S5, EUV exposure simulation is performed using the original circuit pattern data (D1), the phase defect information accumulated in step S3, and the result of the layout of the absorption film pattern including the compensation pattern to avoid the phase defect in step S4. Do. At this time, by using the defect thickness direction position information determined in step S3, simulation can be performed with higher accuracy than in the past.

図6−S6の工程では、S5工程のシミュレーションを基に、EUVブランクの位相欠陥の合否判定を行う。規格内判定であれば、吸収膜成膜工程を経て、S7工程のEUVマスク作製工程へ進行し、規格外であればS4工程で再度補償パターンを含むパターンレイアウトを行い、その後再度S5のシミュレーション工程以降を行う。   In the process of FIG. 6-S6, the pass / fail determination of the phase defect of the EUV blank is performed based on the simulation of the S5 process. If it is determined to be within the specification, the process proceeds to the EUV mask manufacturing process in step S7 through the absorption film forming process. Do the following.

S7工程でEUVマスクを作製した後は、EUVマスクの位相欠陥検査となる。S8工程は通常の吸収膜パターンの平面形状の欠陥検査と修正である。   After the EUV mask is manufactured in step S7, the phase defect inspection of the EUV mask is performed. Step S8 is a normal defect inspection and correction of the absorption film pattern.

EUVマスクを作製した結果、実際の吸収膜パターン位置は工程S4で設定したパターンレイアウトとはずれている可能性がある。その結果とS8工程での吸収膜パターンの修正に応じて、S9工程で補償パターンを含む吸収膜パターンの修正を行い、S10工程でEUV露光シミュレーションを行う。この際もS3工程で判定した欠陥の厚さ方向位置情報を利用することで、従来よりも高い精度でシミュレーションすることができる。   As a result of producing the EUV mask, the actual absorption film pattern position may be deviated from the pattern layout set in step S4. In accordance with the result and the correction of the absorption film pattern in step S8, the absorption film pattern including the compensation pattern is corrected in step S9, and EUV exposure simulation is performed in step S10. Also at this time, by using the defect thickness direction position information determined in step S3, it is possible to perform simulation with higher accuracy than in the past.

図6−S11の工程では、S10工程のシミュレーションを基に、EUVマスクの位相
欠陥の合否判定を行う。規格内判定であればEUVマスクの位相欠陥検査は終了し、規格外であればS9工程で再度補償パターンを含む吸収膜パターン修正を行い、その後再度S10のシミュレーション工程以降を行う。
In the process of FIG. 6-S11, the pass / fail judgment of the phase defect of the EUV mask is performed based on the simulation of the S10 process. If the determination is within the standard, the phase defect inspection of the EUV mask is completed. If the standard is out of specification, the absorption film pattern correction including the compensation pattern is performed again in step S9, and then the simulation process of S10 is performed again.

S3工程における、厚さ方向位置の判定方法について具体的に説明する。上述のように、光の波長の違いによる多層膜表面への光の浸透深さの差を利用して、EUVブランク位相欠陥の厚さ方向位置を判定する例を表3に示す。表3は、193nm、365nm、488nmの3種類の光を選択し、各波長の光を多層膜の欠陥部のオモテ面(表と表記)またはウラ面(裏と表記)から照射し、各波長での欠陥検出有無を表記した結果である。結果1は選択した3つの波長の中で最も浸透深さが浅い193nmで検出している。波長193nmの光の多層膜への浸透深さは図3に示したように3層である事から、欠陥は193nmの光が浸透する範囲である1〜3層目で発生している。   The determination method of the thickness direction position in S3 process is demonstrated concretely. As described above, Table 3 shows an example in which the position in the thickness direction of the EUV blank phase defect is determined by using the difference in the penetration depth of light into the multilayer film surface due to the difference in the wavelength of light. Table 3 selects three types of light of 193 nm, 365 nm, and 488 nm, and irradiates light of each wavelength from the front surface (denoted as the table) or the back surface (denoted as the back) of the defective portion of the multilayer film. It is the result which described the presence or absence of the defect detection in. Result 1 is detected at 193 nm, which has the shallowest penetration depth among the three selected wavelengths. Since the penetration depth of the light having a wavelength of 193 nm into the multilayer film is three layers as shown in FIG. 3, defects are generated in the first to third layers which are the range in which the light of 193 nm penetrates.

結果2は193nmの波長(浸透深さ3層)で未検出である事から、欠陥の発生位置は4層目より深い場所であり、波長365nmの光(浸透深さ5層)で検出していることから、欠陥発生位置は1〜5層目であると考えられるが、これらの193nmと365nmの結果を組み合わせると、欠陥は4〜5層目で発生しているとわかる。   Result 2 is undetected at a wavelength of 193 nm (penetration depth 3 layers), so the defect occurrence position is deeper than the fourth layer, and is detected with light of wavelength 365 nm (penetration depth 5 layers). Therefore, the defect occurrence position is considered to be in the first to fifth layers, but it can be understood that the defect is generated in the fourth to fifth layers by combining the results of 193 nm and 365 nm.

同様に、結果3は浸透深さ12層の488nmで検出可能である事から欠陥は1〜12層にあると考えられるが、365nm(浸透深さ5層)で未検出であることから、6〜12層の間で発生しているとわかる。   Similarly, since the result 3 is detectable at 488 nm of the penetration depth of 12 layers, the defect is considered to be in the 1 to 12 layers, but is not detected at 365 nm (penetration depth of 5 layers). It can be seen that it occurs between ~ 12 layers.

結果4は、表から照射した193nm、365nm、488nmの何れの光でも未検出であるが、裏から照射した193nmの波長の光で検出可能であることから、裏から1〜3層目、すなわち表層から37〜39層目に欠陥が発生しているとわかる。   Although the result 4 is not detected in any light of 193 nm, 365 nm, and 488 nm irradiated from the table, it can be detected by light with a wavelength of 193 nm irradiated from the back, so the first to third layers from the back, that is, It can be seen that defects have occurred in the 37th to 39th layers from the surface layer.

同様の手法で判定すると結果5は35〜36層目、結果6は28〜34層目に欠陥が発生しているとわかる。結果7は表面及び裏面から当てた何れの光でも検出困難である。表面から12層以内に欠陥があれば488nmの光で検出可能であるため、欠陥の発生位置は13層以降であり、同様に裏面から12層目まで(表から数えると28層目以降)には欠陥が無いため、欠陥は13〜27層目の間で発生しているとわかる。   When judged by the same method, it can be seen that the result 5 has defects in the 35th to 36th layers, and the result 6 has defects in the 28th to 34th layers. As for result 7, it is difficult to detect any light applied from the front surface and the back surface. If there is a defect within 12 layers from the front surface, it can be detected with light of 488 nm. Therefore, the position where the defect occurs is 13th layer or later, and similarly, from the back surface to the 12th layer (28th layer and beyond from the table) Since there is no defect, it can be seen that the defect occurs between the 13th and 27th layers.

このように各波長での検出結果を組み合わせれば、欠陥発生位置の範囲を絞り込む判定が可能である。同様に、他の波長の組み合わせでも判定が可能であり、例えば波長257nm(浸透深さ2nm)と532nm(浸透深さ11nm)の組み合わせでも同様の判定が可能である。本評価においては、欠陥検査機で一般的に使用されている波長の光を例に挙げたが、これらの波長以外の光を用いても同様の判定が可能である。   In this way, by combining detection results at each wavelength, it is possible to narrow down the range of defect occurrence positions. Similarly, the determination can be made with other combinations of wavelengths. For example, the same determination can be made with a combination of wavelengths 257 nm (penetration depth 2 nm) and 532 nm (penetration depth 11 nm). In this evaluation, light having a wavelength generally used in a defect inspection machine is taken as an example, but the same determination can be made by using light other than these wavelengths.

10・・・・吸収膜
20・・・・保護膜
30a・・・珪素(Si)
30b・・・モリブデン(Mo)
30c・・・反射多層膜(多層膜)
40・・・・基板(LTEM)
50・・・・導電膜
60a・・・基板上に発生した異物(パーティクル)欠陥
60b・・・多層膜製造工程にて発生した異物(パーティクル)欠陥
60c・・・多層膜製造工程にて発生した異物(パーティクル)欠陥
60d・・・多層膜製造工程にて発生した異物(パーティクル)欠陥
I・・・・・検査光
、RIb・・反射検査光
E・・・・・入射EUV光
Rm・・・・正常部の反射EUV光
Rd・・・・位相欠陥部の反射EUV光
P・・・・・パーティクル欠陥
A1・・・・EUVブランクを搭載するステージ
A1’・・・EUVブランクまたはEUVマスクを搭載するステージ
A2・・・・反射光を受光するセンサ
A3・・・・複数の波長の光を照射する光源
A4・・・・EUVブランク
A4’・・・・EUVブランクまたはEUVマスク
100・・・EUVブランク欠陥検査装置
200・・・EUVブランク及びEUVマスク欠陥検査装置
10 .... Absorbing film 20 ... Protective film 30a ... Silicon (Si)
30b Molybdenum (Mo)
30c ... reflective multilayer film (multilayer film)
40 .... Substrate (LTEM)
50... Conductive film 60 a... Foreign matter (particle) defect 60 b generated on the substrate... Foreign matter (particle) defect 60 c generated in the multilayer film manufacturing process. foreign matter (particles) defect 60d · · · multilayer film foreign material generated in the production process (particles) defect I · · · · · inspection light R I, R Ib ·· reflected inspection light E · · · · · incident EUV light Rm .... Reflected EUV light Rd at normal part ... Reflected EUV light P at phase defect part ... Particle defect A1 ... Stage A1 'on which EUV blank is mounted EUV blank or EUV Stage A2 on which a mask is mounted .... A sensor A3 that receives reflected light .... A light source A4 that emits light of a plurality of wavelengths .... EUV blank A4 '.... EUV blank or EUV mask. Click 100 · · · EUV blank defect inspection apparatus 200 · · · EUV blanks and EUV mask defect inspection device

Claims (9)

EUVブランクの多層膜に波長の異なる複数の光を照射する光源と、
照射した前記光の反射光を受光するセンサと、
受光した前記反射光から画像を形成する画像形成部と、
形成した前記画像から、前記多層膜中に存在する欠陥の厚さ方向の位置を判定する欠陥位置判定部と、
を備えることを特徴とするEUVブランク欠陥検査装置。
A light source that irradiates a multilayer film of an EUV blank with a plurality of lights having different wavelengths;
A sensor for receiving reflected light of the irradiated light;
An image forming unit that forms an image from the received reflected light;
From the formed image, a defect position determination unit that determines the position in the thickness direction of the defects present in the multilayer film,
An EUV blank defect inspection apparatus comprising:
前記複数の光の波長が193nm〜532nmから選択される2つ以上の異なる波長であることを特徴とする請求項1に記載のEUVブランク欠陥検査装置。   2. The EUV blank defect inspection apparatus according to claim 1, wherein the wavelengths of the plurality of lights are two or more different wavelengths selected from 193 nm to 532 nm. 前記多層膜への前記複数の光の照射は、前記多層膜の表(おもて)面又は裏面(基板側)又はその両方から行われることを特徴とする請求項1、2のいずれかに記載のEUVブランク欠陥検査装置。   The irradiation of the plurality of lights onto the multilayer film is performed from the front (front) surface, the back surface (substrate side), or both of the multilayer film. The EUV blank defect inspection apparatus described. 前記波長の異なる複数の光を前記多層膜に同時に照射し、前記複数の光の反射光による画像を同時に形成することを特徴とする請求項1〜3のいずれか一項に記載のEUVブランク欠陥検査装置。   4. The EUV blank defect according to claim 1, wherein the multilayer film is simultaneously irradiated with a plurality of lights having different wavelengths, and an image is formed simultaneously by reflected light of the plurality of lights. Inspection device. 請求項1〜4のいずれか一項に記載のEUVブランク欠陥検査装置が備える機能に加え、
EUVマスクの吸収膜パターンデータを取り込む機能を備え、
EUV露光シミュレーションを行う位相欠陥合否判定部を備える
ことを特徴とするEUVブランク及びEUVマスク欠陥検査装置。
In addition to the function of the EUV blank defect inspection apparatus according to any one of claims 1 to 4,
Equipped with a function to capture EUV mask absorption film pattern data,
An EUV blank and EUV mask defect inspection apparatus comprising a phase defect acceptance / rejection determination unit that performs EUV exposure simulation.
EUVブランクの多層膜に波長の異なる複数の光を照射し、
照射した前記光の反射光をセンサにより受光し、
受光した前記反射光から画像を形成し、
形成した前記画像から、前記多層膜中に存在する欠陥の厚さ方向の位置を判定することを特徴とするEUVブランク欠陥検査方法。
Irradiate multiple layers of EUV blanks with different wavelengths,
The reflected light of the irradiated light is received by a sensor,
Forming an image from the received reflected light,
An EUV blank defect inspection method, comprising: determining a position in a thickness direction of a defect present in the multilayer film from the formed image.
前記複数の光の波長が193nm〜532nmから選択される2つ以上の異なる波長であることを特徴とする請求項6に記載のEUVブランク欠陥検査方法。   The EUV blank defect inspection method according to claim 6, wherein the wavelengths of the plurality of lights are two or more different wavelengths selected from 193 nm to 532 nm. 前記多層膜への前記複数の光の照射は、前記多層膜の表(おもて)面又は裏面(基板側)又はその両方から行われることを特徴とする請求項6、7のいずれかに記載のEUVブランク欠陥検査方法。   The irradiation of the plurality of lights onto the multilayer film is performed from the front (front) surface, the back surface (substrate side), or both of the multilayer film. The described EUV blank defect inspection method. 請求項6〜7のいずれか一項に記載のEUVブランク欠陥検査方法に加え、
EUVマスクの吸収膜パターンデータを用い、
EUV露光シミュレーションを行って位相欠陥合否判定を行う
ことを特徴とするEUVブランクまたはEUVマスクの製造方法。
In addition to the EUV blank defect inspection method according to any one of claims 6 to 7,
Using EUV mask absorption film pattern data,
A method of manufacturing an EUV blank or EUV mask, wherein an EUV exposure simulation is performed to determine whether or not a phase defect is acceptable.
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