JP2018196190A - Power conversion device - Google Patents

Power conversion device Download PDF

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JP2018196190A
JP2018196190A JP2017096148A JP2017096148A JP2018196190A JP 2018196190 A JP2018196190 A JP 2018196190A JP 2017096148 A JP2017096148 A JP 2017096148A JP 2017096148 A JP2017096148 A JP 2017096148A JP 2018196190 A JP2018196190 A JP 2018196190A
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voltage
inverter
current
value
connection point
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JP6889026B2 (en
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圭孝 竹本
Yoshitaka Takemoto
圭孝 竹本
智道 伊藤
Tomomichi Ito
智道 伊藤
一瀬 雅哉
Masaya Ichinose
雅哉 一瀬
治郎 根本
Jiro Nemoto
治郎 根本
雅弘 谷口
Masahiro Taniguchi
雅弘 谷口
佑亮 阿部
Yusuke Abe
佑亮 阿部
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Hitachi Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

To provide a power conversion device that lessens overcurrent as much as possible by further improving the responsiveness to delayed following of secondary side voltage (output voltage of the power conversion device) caused when a system accident point is generated on the primary side of an interconnection transformer.SOLUTION: The power conversion device comprises an inverter connected to a system via an LC filter, and an inverter control unit that controls the inverter. In control which is performed by the inverter control unit, a transient variation current suppression voltage estimation value which is a voltage deviation at the time of a system accident, is estimated on the basis of inverter output current sampled multiple times during a calculation cycle and an interconnection point voltage at an inverter interconnection point, the transient variation current suppression voltage estimation value is added, as a feedforward, to a signal for controlling current flowing through the inverter, so that a voltage command is created, and the voltage command is used as a PWM voltage command for the inverter.SELECTED DRAWING: Figure 1

Description

本発明は電力変換装置に関する   The present invention relates to a power converter.

系統電圧の電圧変動を検出し過電流を防止することが可能な電力変換装置が知られている。このような電力変換装置の一例として、特許文献1が挙げられる。   2. Description of the Related Art There is known a power conversion device that can detect a voltage fluctuation of a system voltage and prevent an overcurrent. Patent document 1 is mentioned as an example of such a power converter device.

特開2004−153957号公報JP 2004-153957 A

系統電圧変動時にインバータACRの電圧フィードフォワードに用いる連系点電圧の検出値を通常よりも時定数の短いLPFを選択することによって制御応答性を向上させることができるが、あらゆる系統事故に対してゲート停止させずに運転を継続させるようなより高い要求に対しては、更なる制御応答性が要求される。系統事故点が連系トランス一次側で発生した場合、二次側電圧(電力変換装置の出力電圧)の追従遅れが発生するため、応答性を更に向上させ過電流をできるかぎり小さく抑制する必要がある。   Control responsiveness can be improved by selecting an LPF with a shorter time constant than usual for the detection value of the connection point voltage used for voltage feedforward of the inverter ACR when the system voltage fluctuates. For higher requirements such as continuing operation without stopping the gate, further control responsiveness is required. When a system fault occurs on the primary side of the interconnection transformer, a follow-up delay of the secondary side voltage (output voltage of the power converter) occurs, so it is necessary to further improve the response and suppress the overcurrent as much as possible. is there.

系統にLCフィルタを介して接続されるインバータと、インバータを制御するインバータ制御部と、を有し、インバータ制御部が行う制御には、演算周期内に複数回サンプリングをしたインバータ出力電流とインバータ連系点の連系点電圧に基づき、系統事故時の電圧偏差である過渡変動電流抑制用電圧推定値を推定し、インバータに流れる電流を制御する信号に、過渡変動電流抑制用電圧推定値をフィードフォワードとして加算して電圧指令を作成し、電圧指令をインバータのPWM用電圧指令として用いる制御がある電力変換器を提供する。   An inverter connected to the system via an LC filter and an inverter control unit for controlling the inverter. The control performed by the inverter control unit includes an inverter output current sampled a plurality of times within the calculation cycle and an inverter connection. Based on the interconnection voltage of the system point, the estimated voltage value for suppressing the transient fluctuation current, which is the voltage deviation at the time of the system fault, is estimated, and the estimated voltage value for suppressing the transient fluctuation current is fed to the signal that controls the current flowing through the inverter. Provided is a power converter having a control in which a voltage command is created by adding as a forward and the voltage command is used as a PWM voltage command for an inverter.

系統電圧の急変に対し、高速に出力電圧が応答でき、発生する過電流値を小さく抑える電力変換装置を提供することができる。   It is possible to provide a power conversion device that can respond to an output voltage at a high speed in response to a sudden change in system voltage and suppress the generated overcurrent value to be small.

本実施例の電力変換装置を示すブロック図。The block diagram which shows the power converter device of a present Example. 過渡変動電流抑制用電圧推定演算部処理フロー図。FIG. 6 is a process flow diagram of a voltage estimation calculation unit for suppressing transient fluctuation current. 連系点電圧変動検出処理フロー図。The connection point voltage fluctuation detection processing flowchart. 従来方式と本実施例の系統電圧急変時における系統電圧、出力電流の比較図。The comparison figure of the system voltage and output current at the time of the system voltage sudden change of a conventional system and a present Example.

以下本発明の実施例について図面を用いて詳細に説明する。なお、本文中、[]で囲まれた記号はベクトル量を、[]で囲まれていない記号はスカラー量を表し、図中では記号の上に矢印を付すことでベクトル量を表す。また、||は、これにより囲まれたベクトル量の絶対値を示す。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the text, symbols enclosed in [] represent vector quantities, symbols not enclosed in [] represent scalar quantities, and in the drawing, vector quantities are represented by adding arrows on the symbols. Moreover, || indicates the absolute value of the vector quantity enclosed thereby.

図1は本実施例の電力変換装置2の概略を示したものである。この図において、自然エネルギーによって生じる直流電圧を入力1とし、一点長鎖線の大枠内として示される電力変換装置2の出力16が連系トランス17を介して系統18に接続されている。なお、自然エネルギーは、例えば太陽光発電、風力発電等が考えられる。   FIG. 1 shows an outline of a power conversion device 2 of this embodiment. In this figure, a DC voltage generated by natural energy is set as an input 1, and an output 16 of the power conversion device 2 shown as a large frame of a one-dot long chain line is connected to a system 18 via a connection transformer 17. In addition, as for natural energy, solar power generation, wind power generation, etc. can be considered, for example.

自然エネルギーをエネルギー源とした直流電圧の入力1は、連系インバータ6の入力回路5に入力される。連系インバータ6の交流出力回路11は高調波低減を目的としたLCフィルタ14を介して連系トランス17の二次側回路16に接続されている。   A DC voltage input 1 using natural energy as an energy source is input to the input circuit 5 of the interconnection inverter 6. The AC output circuit 11 of the interconnection inverter 6 is connected to the secondary circuit 16 of the interconnection transformer 17 via an LC filter 14 for the purpose of reducing harmonics.

次にインバータ制御部21について説明する。連系インバータ6を制御するインバータ制御部21は電流制御器であるACR3を備える。ACR3は、電力変換装置2の直流電圧指令であるVdcrefと直流電圧検出値Vdcを入力とした直流電圧制御器DC−AVR4の出力である電流指令Irefと、連系点電流検出値[I]および位相検出部19で演算された位相信号[V2ph]を入力する。位相検出部19は、連系点電圧検出値[V2]を入力とし、位相検出部19により計算した連系点電圧[V2]の位相信号[V2ph]を電流調整器(ACR3)に出力し、電流調整器(ACR3)は[V2ph]を入力とし、交流電圧指令値[Vref]を出力するベクトル制御を行う。 Next, the inverter control unit 21 will be described. The inverter control unit 21 that controls the interconnection inverter 6 includes an ACR 3 that is a current controller. The ACR 3 includes a current command I ref that is an output of the DC voltage controller DC- AVR 4 that receives the DC voltage command V dcref and the DC voltage detection value V dc of the power conversion device 2, and an interconnection point current detection value [ I] and the phase signal [V 2ph ] calculated by the phase detector 19 are input. The phase detection unit 19 receives the connection point voltage detection value [V 2 ] as an input, and outputs the phase signal [V 2ph ] of the connection point voltage [V 2 ] calculated by the phase detection unit 19 to the current regulator (ACR 3). The current regulator (ACR3) outputs [V 2ph ] as an input and performs vector control to output an AC voltage command value [V ref ].

次にACR3の交流電圧指令[Vref]に加算する電圧フィードフォワード[VFF]について説明する。電圧フィードフォワード[VFF]は、連系点電圧検出値[V2]から計算される。 Next, voltage feed forward [V FF ] to be added to the AC voltage command [V ref ] of ACR 3 will be described. The voltage feed forward [V FF ] is calculated from the connection point voltage detection value [V 2 ].

連系点電圧検出値[V2]からローパスフィルタ(LPF)13によって高調波を除去したローパスフィルタ通過値[VLPF]をスイッチ10の入力端子9に接続する。また、連系点電圧検出値[V2]と連系点電流検出値[I]を入力とした過渡変動電流抑制用電圧推定演算部12の出力信号[Vest]をスイッチ10の入力端子8に接続する。電圧フィードフォワード[VFF]は、スイッチ10により選択した信号である[VLPF]または[Vest]を用いる。上述のインバータ制御部21は、インバータのパルス周期の1/2で演算を実行する。スイッチ10によって、電圧フィードフォワードにローパスフィルタ通過値[VLPF]が選択されている場合は。従来のインバータ制御と同等である。 A low-pass filter pass value [V LPF ] obtained by removing harmonics from the connection point voltage detection value [V 2 ] by the low-pass filter (LPF) 13 is connected to the input terminal 9 of the switch 10. In addition, the output signal [V est ] of the transient fluctuation current suppression voltage estimation calculation unit 12 having the connection point voltage detection value [V 2 ] and the connection point current detection value [I] as inputs is input to the input terminal 8 of the switch 10. Connect to. The voltage feed forward [V FF ] uses [V LPF ] or [V est ] which is a signal selected by the switch 10. The above-described inverter control unit 21 performs the calculation at 1/2 of the inverter pulse period. When the low pass filter pass value [V LPF ] is selected by the switch 10 for voltage feed forward. Equivalent to conventional inverter control.

次に過渡変動電流抑制用電圧推定演算部12について説明する。過渡変動電流抑制用電圧推定演算部12は、電流センサ15により検出される演算周期内にN回(N≧2)サンプリングで得た連系点電流[I]と連系点電圧[V2]を入力とし電流過渡変動による連系トランス17の一次二次間にかかる電圧変化推定値Δ[V12]を検出電圧[V2]から引いた過渡変動電流抑制用電圧推定値[Vest]をスイッチ10の端子8に出力する機能を持つ。ここで本実施例における演算周期とは、PCSの出力波形制御演算の演算周期に相当する時間とする。 Next, the transient fluctuation current suppression voltage estimation calculation unit 12 will be described. The transient fluctuation current suppression voltage estimation calculation unit 12 includes the connection point current [I] and the connection point voltage [V 2 ] obtained by sampling N times (N ≧ 2) within the calculation cycle detected by the current sensor 15. As an input, and the voltage change estimated value [V est ] for suppressing the transient fluctuation current obtained by subtracting the voltage change estimated value Δ [V 12 ] applied between the primary and secondary of the interconnection transformer 17 due to the current transient fluctuation from the detected voltage [V 2 ]. It has a function of outputting to the terminal 8 of the switch 10. Here, the calculation cycle in this embodiment is a time corresponding to the calculation cycle of the PCS output waveform control calculation.

ここで過渡変動電流抑制用電圧推定値[Vest]の演算方法について数1〜数3を用いて説明し、その演算処理フローについて図2を用いて説明する。 Here, the calculation method of the transient fluctuation current suppression voltage estimated value [V est ] will be described using Equations 1 to 3, and the calculation processing flow will be described with reference to FIG.

数1から数3は、過渡変動電流抑制用電圧推定値[Vest]を求める計算式であり、連系点電圧[V2]と電流過渡変動による連系トランス17のインピーダンスと事故点までの系統インピーダンスにかかる電圧変化推定値Δ[V12]との差から求める。 Equations (1) to (3) are calculation formulas for determining the transient fluctuation current suppression voltage estimated value [V est ], and the impedance of the interconnection transformer 17 due to the interconnection point voltage [V 2 ] and the current transient fluctuation and the fault point. Obtained from the difference from the estimated voltage change Δ [V 12 ] applied to the system impedance.

電圧変化推定値Δ[V12]は、連系トランス17の一次側の電力系統の瞬低時に発生する連系トランスインピーダンスと事故点までの系統インピーダンスに流れる電流による電圧降下であり、事故点の電圧とトランス二次側電圧(連系点電圧[V2](インバータ出力電圧))との偏差電圧に相当する。この偏差電圧が原因で交流過電流が発生するため、これを補償するために数1に示すように連系点電圧[V2](インバータ出力電圧)から偏差電圧である電圧変化推定値Δ[V12]を除いて過渡変動電流抑制用電圧推定値[Vest]を計算し、電圧フィードフォワード[VFF]として使用する。推定演算部12は、インバータ制御の演算周期の1/Nの周期で動作させる。 The voltage change estimated value Δ [V 12 ] is a voltage drop caused by the current flowing through the grid impedance and the system impedance up to the fault point when the power transformer on the primary side of the grid transformer 17 is instantaneously reduced. It corresponds to the deviation voltage between the voltage and the transformer secondary voltage (interconnection point voltage [V 2 ] (inverter output voltage)). Since an AC overcurrent occurs due to this deviation voltage, in order to compensate for this, as shown in Equation 1, a voltage change estimated value Δ [] which is a deviation voltage from the connection point voltage [V 2 ] (inverter output voltage). The voltage estimated value [V est ] for suppressing transient fluctuation current is calculated except for V 12 ] and used as voltage feed forward [V FF ]. The estimation calculation unit 12 is operated at a cycle of 1 / N of the calculation cycle of inverter control.

系統電圧急変時の事故点までの電圧降下分である電圧変化推定値Δ[V12]は、数2によって計算する。数2中の抵抗R成分とインダクタンスL成分は、インバータから無限大母線電圧までのRとLに対応する。インバータの電圧検出点から無限大母線電圧までの線路インピーダンス[Z]=R+jωLは、連系トランス17のインピーダンス([ZTr]=RTr+jωLTr)と、連系トランス17の一次側端子から無限大母線までの系統インピーダンス推定値[Zg] (=Rg+jωLg)の和である全インピーダンス[Z]=RTr+Rg+jω(LTr+Lg)に相当する。実際に系統インピーダンス[Zg]を求めることは困難であるので、短絡容量からの推定値を用いる。ここでR成分はL成分に比べて十分小さいので無視し、数2の右辺を求める。微分項di/dtは、演算周期Tsにおける連系点電流の時間変化Δ[IN-1]の平均値Δ[Iave]とサンプリング周期Δt (=Ts/N)から求める。ここで、Δ[Iave]は数3に示すように、連系点電流を演算周期Ts内にN回(N≧2)サンプリングを行う前提のもと、サンプリング毎に前回サンプリングでの検出値と今回サンプリングでの検出値の差分を算出することで連系点電流の時間変化量Δ[Im-1]/(Ts/N) (=([Im]-[Im-1])/(Ts/N))を算出し、その総和をNで除して算出したものである。なお、連系点電流の時間変化量の平均値Δ[Iave]を算出することにより、連系点電流検出値に混入する瞬間的なノイズに対する影響を抑えることができる。 A voltage change estimated value Δ [V 12 ], which is a voltage drop up to the point of the accident at the time of a system voltage sudden change, is calculated by Equation 2. The resistance R component and inductance L component in Equation 2 correspond to R and L from the inverter to the infinite bus voltage. The line impedance [Z] = R + jωL from the voltage detection point of the inverter to the infinite bus voltage is the impedance of the interconnection transformer 17 ([Z Tr ] = R Tr + jωL Tr ) and the primary side of the interconnection transformer 17 Corresponds to the total impedance [Z] = R Tr + R g + jω (L Tr + L g ), which is the sum of the estimated system impedance [Z g ] (= R g + jωL g) from the terminal to the infinite bus . Since it is difficult to actually determine the system impedance [Z g ], an estimated value from the short-circuit capacity is used. Here, since the R component is sufficiently smaller than the L component, it is ignored and the right side of Equation 2 is obtained. The differential term di / dt is obtained from the average value Δ [I ave ] of the time variation Δ [I N-1 ] of the interconnection point current in the calculation cycle Ts and the sampling cycle Δt (= T s / N). Here, Δ [I ave ] is detected at the previous sampling every sampling based on the premise that the interconnection point current is sampled N times (N ≧ 2) within the calculation cycle T s as shown in Equation 3. Time difference Δ [I m-1 ] / (T s / N) (= ([I m ]-[I m-1 ]) / (T s / N)), and the sum is divided by N. It should be noted that by calculating the average value Δ [I ave ] of the time variation of the connection point current, it is possible to suppress the influence on instantaneous noise mixed in the connection point current detection value.

Figure 2018196190
Figure 2018196190

Figure 2018196190
Figure 2018196190

Figure 2018196190
Figure 2018196190

図2は、過渡変動電流抑制用電圧推定演算部のフロー図である。サンプリング1回目の連系点電流[I1]とサンプリング0回目(前回の演算周期内にサンプリングした最後の値)の連系点電流[I0]を入力とし、連系点電流の時間変化量Δ[I1] (=[I1]-[I0])を算出(処理1)し、次にサンプリング2回目の連系点電流[I2]とサンプリング1回目の連系点電流[I1]を入力とし、連系点電流の時間変化量Δ[I2] (=[I2]-[I1])を算出(処理2)する。これをサンプリングN回目(N≧2)まで繰り返し、各電流変化量をΔ[I1]からΔ[IN]まで求める。これら電流変化量を用いて電流変化量の平均値Δ[Iave]を算出する(処理N)。次に電流変化量の平均値Δ[Iave]と全インピーダンス推定値[Z]を用いて、系統電圧低下時の連系トランス17および系統インピーダンスによる電圧変化推定値Δ[V12]を計算する。これと連系点電圧[V2]の値の差から過渡変動電流抑制用電圧推定値[Vest]を算出する(処理N+2)。以上が過渡変動電流抑制用電圧推定演算部の演算フローである。 FIG. 2 is a flowchart of the voltage estimation calculation unit for suppressing transient fluctuation current. Input the connection point current [I 1 ] of the first sampling and the connection point current [I 0 ] of the 0th sampling (the last value sampled in the previous calculation cycle) as input, and the amount of time change of the connection point current Δ [I 1 ] (= [I 1 ] − [I 0 ]) is calculated (process 1), and then the second connection point current [I 2 ] and the first sampling point current [I 1 ] is input, and the time change Δ [I 2 ] (= [I 2 ] − [I 1 ]) of the interconnection point current is calculated (processing 2). This is repeated until the Nth sampling (N ≧ 2), and each current change amount is obtained from Δ [I 1 ] to Δ [I N ]. The average value Δ [I ave ] of the current change amount is calculated using these current change amounts (processing N). Next, using the average value Δ [I ave ] of the current change amount and the total impedance estimated value [Z], the voltage change estimated value Δ [V 12 ] due to the interconnection transformer 17 and the system impedance when the system voltage drops is calculated. . A transient estimated current suppression voltage estimated value [V est ] is calculated from the difference between this and the value of the interconnection point voltage [V 2 ] (processing N + 2). The above is the calculation flow of the transient estimation current suppression voltage estimation calculation unit.

次に連系点電圧変動検出部7は、スイッチ10の出力を選択する指令SWREFを説明する。図3は連系点電圧変動検出部7の処理フローを示す。変動検出部7は連系点電圧[V2]を入力とし、連系点電圧の振幅|[V2]|を計算する(処理1)。この振幅演算は、数4を用いて連系点電圧[V2]のUVW相をαβ変換し、そのαβ変換後の電圧[Vα]と[Vβ]から数5を用いて振幅を算出する。|[V2]|が所定値|[V0]|よりも小さい場合(処理2)にスイッチ端子8を選択(処理3)し、大きい場合にはスイッチ端子9を選択(処理4)する指令SWREFをスイッチ10へ出力する。 Next, the interconnection point voltage fluctuation detection unit 7 will explain the command SWREF for selecting the output of the switch 10. FIG. 3 shows a processing flow of the interconnection point voltage fluctuation detection unit 7. The fluctuation detecting unit 7 receives the interconnection point voltage [V 2 ] as input, and calculates the amplitude | [V 2 ] | of the interconnection point voltage (processing 1). In this amplitude calculation, the UVW phase of the interconnection point voltage [V 2 ] is αβ converted using Equation 4, and the amplitude is calculated using Equation 5 from the voltage [V α ] and [V β ] after the αβ conversion. To do. A command to select switch terminal 8 (process 3) when | [V 2 ] | is smaller than a predetermined value | [V 0 ] | (process 2), and to select switch terminal 9 (process 4) when larger | SWREF is output to the switch 10.

Figure 2018196190
Figure 2018196190

Figure 2018196190
Figure 2018196190

図4は本実施例が適用された電力変換装置と従来方式を用いている電力変換装置の系統電圧急変時の系統電圧および出力電流のシミュレーション波形である。これらの波形は本実施例、従来方式ともに系統電圧が100%の状態から時刻0秒において0%まで急変した波形であり、時刻0秒における従来方式の出力電流は150%まで跳ね上がっている。図4の従来波形は、電流150%を超えた際PCSの動作を停止しており、PCSが動作を続けた場合、6puまで上昇する。一方、本実施例は時刻0秒において出力電流が140%程度までの跳ね上がりに抑えられ、電流値を小さくでる。   FIG. 4 is a simulation waveform of the system voltage and output current when the system voltage suddenly changes in the power conversion apparatus to which the present embodiment is applied and the power conversion apparatus using the conventional method. These waveforms are waveforms in which the system voltage is suddenly changed from 100% to 0% at time 0 second in both the present embodiment and the conventional system, and the output current of the conventional system at time 0 second jumps up to 150%. The conventional waveform in FIG. 4 stops the operation of the PCS when the current exceeds 150%, and rises to 6 pu when the PCS continues to operate. On the other hand, in this embodiment, the output current is suppressed to jump to about 140% at time 0 second, and the current value can be reduced.

系統電圧が急激に変動した場合において、インバータ電流制御のACR3の電圧フィードフォワード[VFF]をローパスフィルタ出力[VLPF]から過渡変動電流抑制用電圧推定値[Vest]に切り換えて、[Vest]を使用する事により系統電圧急変に対する追従が高速化され、過電流を防止し運転を継続することが可能となる。さらに、電流を複数回サンプリングして、前回値との差分をもとにΔ[Iave]を算出することにより、連系点電流の検出ノイズの影響を抑えることができる。これは、例えば連系点電流が一定のレートをもって変化している場合、0回目のサンプリング時点で瞬間的なノイズが連系点電流に混入して0回目と1回目の差分が大きくなったとしても、1回目と2回目の差分やそれ以降のN−1回目とN回目の差分を使って電流変化の平均値を計算しているので、電流変化検出値に混入するノイズの影響を小さくする抑えることが可能になる。 When the system voltage fluctuates rapidly, the voltage feed forward [V FF ] of ACR3 for inverter current control is switched from the low-pass filter output [V LPF ] to the transient estimated current suppression voltage estimated value [V est ]. By using est ], the follow-up to the system voltage sudden change is accelerated, and it becomes possible to prevent the overcurrent and continue the operation. Furthermore, by sampling the current a plurality of times and calculating Δ [I ave ] based on the difference from the previous value, it is possible to suppress the influence of the detection noise of the connection point current. This is because, for example, when the connection point current is changing at a constant rate, instantaneous noise is mixed into the connection point current at the sampling time of the 0th time, and the difference between the 0th time and the first time becomes large. In addition, since the average value of the current change is calculated using the difference between the first time and the second time and the difference between the (N-1) th time and the Nth time thereafter, the influence of noise mixed in the current change detection value is reduced. It becomes possible to suppress.

本実施例では、交流ベース(フェーザ)の式を用いて例を示したが、DQ変換後の直流ベースに変換した後の検出値を用いても同等の効果がある。   In this embodiment, an example is shown using an AC base (phasor) formula, but the same effect can be obtained by using a detection value after conversion to a DC base after DQ conversion.

1 電力変換装置の入力
2 電力変換装置
3 電流制御器(ACR)
4 直流電圧制御器(DC−AVR)
5 連系インバータ入力
6 連系インバータ
7 連系点電圧変動検出部
8 [Vest]選択用スイッチ端子
9 [VLPF]選択用スイッチ端子
10 スイッチ
11 連系インバータ出力
12 過渡変動電流抑制用電圧推定演算部
13 ローパスフィルタ
14 LCフィルタ
15 電流センサ
16 電力変換装置出力
17 連系トランス
18 系統
19 位相検出部
20 電力変換装置
21 インバータ制御
DESCRIPTION OF SYMBOLS 1 Input of power converter 2 Power converter 3 Current controller (ACR)
4 DC voltage controller (DC-AVR)
5 Linkage inverter input 6 Linkage inverter 7 Linkage point voltage fluctuation detector 8 [V est ] selection switch terminal 9 [V LPF ] selection switch terminal 10 Switch 11 Linkage inverter output 12 Voltage estimation for transient fluctuation current suppression Arithmetic unit 13 Low-pass filter 14 LC filter 15 Current sensor 16 Power converter output 17 Interconnection transformer 18 System 19 Phase detector 20 Power converter 21 Inverter control

Claims (4)

系統にLCフィルタを介して接続されるインバータと、
前記インバータを制御するインバータ制御部と、を有し、
前記インバータ制御部が行う制御には、
演算周期内に複数回サンプリングをしたインバータ出力電流とインバータ連系点の連系点電圧に基づき、系統事故時の電圧偏差である過渡変動電流抑制用電圧推定値を推定し、
前記インバータに流れる電流を制御する信号に、前記過渡変動電流抑制用電圧推定値をフィードフォワードとして加算して電圧指令を作成し、
前記電圧指令を前記インバータのPWM用電圧指令として用いる制御がある、
電力変換装置。
An inverter connected to the system via an LC filter;
An inverter control unit for controlling the inverter;
For the control performed by the inverter control unit,
Based on the inverter output current sampled multiple times within the calculation cycle and the connection point voltage of the inverter connection point, estimate the voltage estimation value for transient fluctuation current suppression which is the voltage deviation at the time of system fault,
A voltage command is created by adding the voltage estimation value for suppressing transient fluctuation current as a feed forward to a signal for controlling a current flowing through the inverter,
There is control using the voltage command as a PWM voltage command for the inverter,
Power conversion device.
前記インバータ制御部は、インバータ連系点電圧値と所定値との大小関係に応じて二つの入力を切換えが可能なスイッチを備え、
前記スイッチへの一つの入力が前記過渡変動電流抑制用電圧推定値、もう一つの入力が前記インバータ連系点電圧のLPF通過値であり、
前記スイッチの出力をインバータ電流制御の出力に加算される電圧フィードフォワードとして用いる請求項1に記載の電力変換装置。
The inverter control unit includes a switch capable of switching two inputs according to the magnitude relationship between the inverter connection point voltage value and a predetermined value,
One input to the switch is the estimated voltage value for suppressing the transient current fluctuation, and the other input is the LPF passing value of the inverter connection point voltage,
The power converter according to claim 1, wherein the output of the switch is used as a voltage feedforward added to an output of inverter current control.
前記インバータ制御部は、前記インバータ連系点電圧値が所定値より小さい場合には、前記過渡変動電流抑制用電圧推定値を電圧フィードフォワードとして用いる請求項2に記載の電力変換装置。   The said inverter control part is a power converter device of Claim 2 which uses the said estimated voltage value for transient fluctuation current suppression as voltage feedforward, when the said inverter connection point voltage value is smaller than predetermined value. 前記演算周期が、インバータのキャリア周波数で決まる周期の1/2の値である請求項1の電力変換装置。   The power conversion device according to claim 1, wherein the calculation cycle is a half value of a cycle determined by a carrier frequency of the inverter.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110401346A (en) * 2019-07-25 2019-11-01 合肥巨一动力系统有限公司 Tandem type multiphase interleaving Boost control method

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* Cited by examiner, † Cited by third party
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CN112311216B (en) * 2020-10-15 2021-09-21 湖南大学 Current transformer overcurrent suppression method and device
CN113985114A (en) * 2021-11-25 2022-01-28 福州大学 Power grid voltage drop detection method in low voltage ride through

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07123726A (en) * 1993-10-19 1995-05-12 Hitachi Ltd Power converter
JP2002238163A (en) * 2001-02-06 2002-08-23 Mitsubishi Electric Corp Power converter
JP2004153957A (en) * 2002-10-31 2004-05-27 Hitachi Ltd Power conversion apparatus
JP2016032426A (en) * 2014-07-30 2016-03-07 株式会社日立産機システム Power conversion controller and solar power generation system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07123726A (en) * 1993-10-19 1995-05-12 Hitachi Ltd Power converter
JP2002238163A (en) * 2001-02-06 2002-08-23 Mitsubishi Electric Corp Power converter
JP2004153957A (en) * 2002-10-31 2004-05-27 Hitachi Ltd Power conversion apparatus
JP2016032426A (en) * 2014-07-30 2016-03-07 株式会社日立産機システム Power conversion controller and solar power generation system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110401346A (en) * 2019-07-25 2019-11-01 合肥巨一动力系统有限公司 Tandem type multiphase interleaving Boost control method
CN110401346B (en) * 2019-07-25 2021-07-30 合肥巨一动力系统有限公司 Control method of cascade multiphase staggered parallel Boost converter

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