JP2018195751A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device which is manufactured without deteriorating productivity and has reduced inductance.SOLUTION: The semiconductor device includes: a semiconductor element having an electrode formation surface on which electrodes are formed; and a conductive plate made of a conductive metal and having a surface on which a contact surface contacting the electrode forming surface is formed so as to be electrically connected to electrodes of the semiconductor element. In the vicinity of a conductive path of a current flowing through the conductive plate toward the electrode on a surface of the conductive plate, or in the vicinity of the conductive path of current flowing from the electrode to the conductive plate, a surface area enlarged portion having an enlarged surface area is provided.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a semiconductor device having a semiconductor element.

  When the inductance in a semiconductor device having a semiconductor element such as a transistor is large, a large surge voltage may be generated. This surge voltage may adversely affect the operation of the semiconductor element. Therefore, the inductance in the semiconductor device should be as small as possible. 2. Description of the Related Art Conventionally, there have been proposed semiconductor devices in which various devices are applied in order to reduce inductance.

  Patent Document 1 discloses a first connection conductor (positive electrode connection terminal) that supplies a high potential to an upper arm on which a power semiconductor element is mounted, and a second connection conductor (negative electrode) that supplies a low potential to a lower arm on which the power semiconductor element is mounted. Disclosed is a semiconductor device (power module) in which a connection terminal is stacked and disposed via an insulating sheet. According to the semiconductor device described in Patent Document 1, since the first connection conductor and the second connection conductor are stacked, the inductance can be reduced. Moreover, since the 1st connection conductor and the 2nd connection conductor are arrange | positioned closely via the insulating sheet, an inductance can be reduced.

JP 2011-15460 A

(Problems to be solved by the invention)
According to Patent Document 1, since a complicated process of laminating and arranging the first connection conductor and the second connection conductor with an insulating sheet interposed therebetween is required, the number of manufacturing steps is increased and the productivity is deteriorated.

  An object of the present invention is to provide a semiconductor device that is manufactured without causing deterioration in productivity and has reduced inductance.

  The semiconductor device according to the present invention includes a semiconductor element (171, 172) having an electrode formation surface (171a, 172b) on which an electrode is formed, and a conductive metal, and is electrically connected to the electrode of the semiconductor element. The conductive plates (14, 15) having the surfaces (141, 151) on which the contact surfaces (S1, S2) contacting the electrode forming surface are formed. Then, the surface area enlargement part (152) whose surface area is enlarged on the surface of the conductive plate, in the vicinity of the conductive path of the current flowing through the conductive plate toward the electrode or the conductive path of the current flowing from the electrode to the conductive plate. ) Is provided.

  According to the present invention, a portion having an enlarged surface area is provided on the surface of the conductive plate and in the vicinity of the conductive path of the current flowing through the conductive plate. When a portion having an enlarged surface area is provided in the vicinity of the conductive path on the surface of the conductive plate, the inductance of the conductive plate is reduced. Therefore, by manufacturing a semiconductor device using a conductive plate provided with a surface area enlarged portion, it does not go through a complicated manufacturing process in which two conductive members are stacked with an insulating sheet interposed therebetween as in Patent Document 1. A semiconductor device with reduced inductance can be manufactured. As described above, according to the present invention, it is possible to provide a semiconductor device manufactured without causing deterioration of productivity and having reduced inductance.

  In the present invention, regarding the surface area enlarged portion, “the surface area has been enlarged” means that the surface area of the surface area enlarged portion is larger than the area of the region where the surface area enlarged portion is provided on the surface of the conductive plate. means. Therefore, it can be said that the surface area enlarged portion is a portion formed such that the surface area is larger than the area of the region provided on the conductive plate. For example, when the concave portion is provided on the surface of the conductive plate, the surface area of the concave portion is larger than the opening area of the concave portion. Since the opening area of the recess is the area of the region where the recess is provided in the surface of the conductive plate, the recess corresponds to the surface area enlargement portion. Moreover, when the surface area expansion part is a convex part, the surface area of a convex part is larger than the installation area of a convex part. Since the installation area of a convex part is an area of the area | region in which the convex part is provided among the surfaces of a conductive plate, a convex part corresponds to a surface area expansion part. In addition to such concave portions and convex portions, the surface area enlarged portion can take various forms. For example, the shape of the surface area enlargement portion may be a wavy shape or an uneven shape.

  In this case, the surface area enlarged portion may be a concave portion. When the surface area enlarged portion is a convex portion, the semiconductor device is increased in size. On the other hand, when the surface area enlarged portion is a recess, the inductance of the conductive plate can be reduced without increasing the size of the semiconductor device.

  Moreover, it is good for the surface of a conductive plate to provide the power supply connection part attachment area | region (14c, 15c) to which the power supply connection part (11, 12) connected to the power supply (V) is attached. In this case, the surface area enlarged portion may be provided in the vicinity of the line segment connecting the power supply connection portion attachment region and the contact surface. When a current flows from the power source to the semiconductor element, the current is linearly applied to the conductive plate from the power source connection part mounting region where the power source connection part is attached to the contact surface contacting the electrode forming surface of the semiconductor element. It is thought to flow. Further, when a current flows from the semiconductor element to the power source, it is considered that the current flows linearly from the contact surface in contact with the electrode forming surface of the semiconductor element toward the power source connection portion mounting region. Therefore, by providing the surface area enlargement portion in the vicinity of the line segment connecting the power connection portion mounting region and the contact surface that contacts the electrode formation surface of the semiconductor element, the surface area enlargement portion is always provided on the surface of the conductive plate. It is provided in the vicinity of the conductive path of the current flowing through. Therefore, the inductance of the conductive plate can be reliably reduced.

  Further, the surface area enlarged portion may be provided in a region adjacent to the contact surface that contacts the electrode formation surface of the semiconductor element. The current flowing through the conductive plate passes through the contact surface that contacts the electrode formation surface of the semiconductor element. Therefore, by providing the surface area enlarged portion in the adjacent region of the contact surface, the surface area enlarged portion is always provided in the vicinity of the conductive path of the current flowing through the conductive plate. Therefore, the inductance of the conductive plate can be reliably reduced.

It is a top view of the semiconductor device concerning this embodiment. It is a top view which shows the arrangement | positioning relationship of the positive electrode plate, the negative electrode plate, and the electrically conductive plate which were embedded and fixed to the bottom face of the case. It is a top view of an arm unit. It is IV-IV sectional drawing of FIG. It is VV sectional drawing of FIG. It is a top view of a division | segmentation bus-bar. It is a side view of a division | segmentation bus-bar. It is a figure which shows a division piece. It is a figure which shows a terminal piece. It is a circuit diagram which shows the inverter circuit comprised by a 1st semiconductor module, a 2nd semiconductor module, and a 3rd semiconductor module. It is a figure which shows the positive electrode electrically conductive board used for calculation of an inductance. It is a figure which shows the negative electrode electrically conductive board used for calculation of an inductance. It is a top view of the positive electrode conductive plate by which the electric current conduction path was shown. It is a top view of the negative electrode electrically conductive board by which the electric conduction path | route was shown.

  Hereinafter, a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings. In the present embodiment, a semiconductor device used as an inverter circuit of a three-phase DC brushless motor will be described. FIG. 1 is a plan view of a semiconductor device 1 according to the present embodiment. As shown in FIG. 1, the semiconductor device 1 includes a first semiconductor module 10A, a second semiconductor module 10B, a third semiconductor module 10C, and a case 40 that accommodates these semiconductor modules.

  The case 40 is made of an insulating material such as a resin. The case 40 includes a bottom wall 41 that is circular in plan view, and a ring-shaped side wall 42 that extends upward from the peripheral end of the bottom wall 41 along the central axis direction of the bottom wall 41. The tip of the side wall 42 is open. A control board or the like can be placed on the opening surface.

  The first semiconductor module 10 </ b> A, the second semiconductor module 10 </ b> B, and the third semiconductor module 10 </ b> C are disposed on the bottom wall 41 of the case 40. As can be seen from FIG. 1, the structures of the first semiconductor module 10A, the second semiconductor module 10B, and the third semiconductor module 10C are the same, and the respective semiconductor modules are arranged at intervals of 120 ° around the center of the bottom wall 41. Is done.

  The first semiconductor module 10A, the second semiconductor module 10B, and the third semiconductor module 10C have a positive terminal 11, a negative terminal 12, an output terminal 13, a positive conductive plate 14, a negative conductive plate 15, and an output conductive, respectively. A plate 16 and an arm unit 17 comprising five arm circuits (17a, 17b, 17c, 17d, 17e) are provided. The positive electrode conductive plate 14 and the negative electrode conductive plate 15 correspond to the conductive plate of the present invention.

  Each positive electrode terminal 11, each negative electrode terminal 12, each output terminal 13, each positive electrode conductive plate 14, each negative electrode conductive plate 15, and each output conductive plate 16 included in each of the semiconductor modules 10A, 10B, and 10C are made of conductive metal. Composed. Examples of the conductive metal include copper, aluminum, molybdenum, and a composite material thereof. In this embodiment, these are formed with copper.

  Each positive electrode terminal 11 provided in each of the semiconductor modules 10A, 10B, and 10C has a cylindrical shape extending in a direction orthogonal to the paper surface of FIG. 1, and one end (upper end) thereof is a power source side of the DC power source. The positive terminal is connected in parallel via the positive line. Moreover, each negative electrode terminal 12 with which each semiconductor module 10A, 10B, 10C is provided is exhibiting the column shape extended in the direction orthogonal to the paper surface of FIG. 1, The one end (upper end) is DC power supply. The power supply side negative terminal is connected in parallel through the negative line. Accordingly, each positive terminal 11 is connected to the positive side of the DC power source, and each negative terminal 12 is connected to the negative side of the DC power source. The positive electrode terminal 11 and the negative electrode terminal 12 correspond to the power supply connecting portion of the present invention. Further, the DC power source is any device as long as it has a power source side positive terminal and a power source side negative terminal and can apply a DC voltage between the power source side positive terminal and the power source side negative terminal. Good. For example, a battery, a battery, etc. can be illustrated as DC power supply. Further, the so-called intermediate DC power obtained by smoothing a smoothing capacitor after full-wave rectification or half-wave rectification of alternating current such as commercial alternating current can also be used as a direct current power source.

  The other end (lower end) of the positive electrode terminal 11 is electrically connected to the positive electrode conductive plate 14, and the other end (lower end) of the negative electrode terminal 12 is electrically connected to the negative electrode conductive plate 15. Therefore, each positive electrode conductive plate 14 included in each of the semiconductor modules 10A, 10B, and 10C is electrically connected to the power source side positive terminal of the DC power supply via each positive electrode terminal 11 and the positive electrode line. Each of the negative electrode conductive plates 15 included in 10B and 10C is electrically connected to the power source side negative terminal of the DC power source via each negative electrode terminal 12 and the negative electrode line.

  Further, each output terminal 13 provided in each of the semiconductor modules 10A, 10B, and 10C has a cylindrical shape extending in a direction orthogonal to the paper surface of FIG. Yes. One end (upper end) of the output terminal 13 provided in the first semiconductor module 10A is electrically connected to the U-phase coil of the three-phase DC brushless motor via the output line, and the output terminal provided in the second semiconductor module 10B. One end (upper end) of 13 is electrically connected to the V-phase coil of the three-phase DC brushless motor via the output line, and one end (upper end) of the output terminal 13 included in the third semiconductor module 10C is the output line. Is electrically connected to the W-phase coil of the three-phase brushless motor. The other end (lower end) of each output terminal 13 provided in each semiconductor module 10A, 10B, 10C is connected to each output conductive plate 16 respectively.

  The respective positive electrode conductive plates 14, the respective negative electrode conductive plates 15, and the respective output conductive plates 16 included in the respective semiconductor modules 10 </ b> A, 10 </ b> B, 10 </ b> C are embedded and fixed in the bottom wall 41 of the case 40. FIG. 2 is a plan view showing the positional relationship between the positive electrode conductive plate 14, the negative electrode conductive plate 15, and the output conductive plate 16 that are embedded and fixed in the bottom wall 41 of the case 40. The positive electrode conductive plate 14 embedded in the bottom wall 41 of the case 40 is exposed from the bottom wall 41 at one end face thereof. Similarly, the negative electrode conductive plate 15 embedded in the bottom wall 41 of the case 40 is exposed from the bottom wall 41 at one end surface thereof, and the output conductive plate 16 embedded in the bottom wall 41 of the case 40 has one end surface thereof. Exposed from the bottom wall 41. The exposed surface of the positive electrode conductive plate 14 constitutes the positive electrode surface 141, and the exposed surface of the negative electrode conductive plate 15 constitutes the negative electrode surface 151. Therefore, FIG. 2 shows the positive electrode surface 141 of the positive electrode conductive plate 14, the negative electrode surface 151 of the negative electrode conductive plate 15, and the exposed surface 161 from the bottom wall 41 of the output conductive plate 16. The positive electrode surface 141 and the negative electrode surface 151 correspond to the “surface” of the conductive plate in the present invention.

  As shown in FIG. 2, the positive electrode surface 141 of the positive electrode conductive plate 14 includes a trapezoidal region 14a and a rectangular region 14b connected to the bottom of the trapezoidal region 14a. In the trapezoidal region 14a, a positive electrode terminal attachment region 14c to which the other end of the positive electrode terminal 11 is connected is formed. Further, the negative electrode surface 151 of the negative electrode conductive plate 15 is also configured by a trapezoidal region 15a and a rectangular region 15b connected to the lower base of the trapezoidal region 15a. A negative electrode terminal attachment region 15c to which the other end of the negative electrode terminal 12 is connected is formed in the trapezoidal region 15a. The positive electrode terminal attachment region 14c and the negative electrode terminal attachment region 15c correspond to the power supply connection portion attachment region of the present invention.

  Further, the positive electrode conductive plate 14 and the negative electrode conductive plate 15 are arranged such that the end side 14d of the rectangular region 14b of the positive electrode surface 141 and the end side 15d of the rectangular region 15b of the negative electrode surface 151 face each other with a certain minute distance α therebetween. Embedded in the bottom wall 41 of the case 40. The minute distance α between the end side 14 d and the end side 15 d corresponds to the distance between the positive electrode conductive plate 14 and the negative electrode conductive plate 15. The smaller distance α is better. For example, the minute distance α can be set to 0.05 mm to 1.0 mm. As described above, the positive electrode conductive plate 14 and the negative electrode conductive plate 15 are adjacently arranged (closely arranged) with a small distance α in a state of being embedded in the bottom wall 41 of the case 40.

  Here, for convenience of explanation, the left-right direction in the plan view of FIG. 2 is defined as the X direction, the right side is defined as the X1 direction, and the left side is defined as the X2 direction. 2 is defined as the Y direction in the vertical direction (that is, the direction orthogonal to the X direction) in plan view of FIG. In addition, a direction orthogonal to the X direction and the Y direction, that is, a vertical vertical direction is defined as a Z direction. When the direction is defined in this way, as can be seen from FIG. 2, the minute distance α represents the distance between the positive electrode conductive plate 14 and the negative electrode conductive plate 15 along the Y direction. Further, the positive electrode conductive plate 14 and the negative electrode conductive plate 15 are arranged adjacent to each other with a minute distance α along the Y direction with the rectangular regions 14b and 15b facing each other.

  Further, the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 are formed in line symmetry with respect to a straight line L passing through the intermediate point of the minute distance α in the Y direction and along the X direction. . Further, the exposed surface 161 of the output conductive plate 16 is formed in a region closer to the X1 direction than the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 and through which the straight line L passes. The

  In addition, a first transistor 171 provided in each of five arm circuits described later is connected to the rectangular region 14b of the positive electrode surface 141 of the positive electrode conductive plate 14, and the rectangular region 15b of the negative electrode surface 151 of the negative electrode conductive plate 15 is Second transistors 172 provided in each of five arm circuits described later are connected. As can be seen from FIG. 2, the first transistors 171 included in each of the five arm circuits are connected to the rectangular region 14b of the positive electrode surface 141 so as to be linearly aligned along the X direction. Similarly, the second transistors 172 included in each of the five arm circuits are also connected to the rectangular region 15b of the negative electrode surface 151 so as to be linearly aligned along the X direction.

  Next, the arm unit 17 will be described. FIG. 3 is a plan view of the arm unit 17. In FIG. 3, the left-right direction is the X direction, the right side is the X1 direction, the left side is the X2 direction, and the up-down direction is the Y direction. As described above, the arm unit 17 includes five arm circuits (first arm circuit 17a, second arm circuit 17b, third arm circuit 17c, fourth arm circuit 17d, and fifth arm circuit 17e). . As can be seen from FIG. 3, the arm circuits are arranged in alignment along the X direction. Specifically, the first arm circuit 17a, the second arm circuit 17b, the third arm circuit 17c, the fourth arm circuit 17d, and the fifth arm circuit 17e are arranged in this order in the X1 direction. . The configuration of each arm circuit is basically the same. Typically, the configuration of the first arm circuit 17a will be described.

  4 is a cross-sectional view taken along the line IV-IV in FIG. 3 and shows a cross section along the Y direction of the first arm circuit 17a. The left-right direction in FIG. 4 is the Y direction, and the up-down direction is the Z direction (vertical direction). Also, the upper direction of the Z direction is defined as the Z1 direction, and the lower direction is defined as the Z2 direction. As shown in FIG. 4, the first arm circuit 17 a includes a first transistor 171, a second transistor 172, and a first divided piece 51 a of a divided bus bar 50 described later. The first transistor 171 and the second transistor 172 correspond to the semiconductor element of the present invention.

  The first transistor 171 and the second transistor 172 are N-channel power MOSFETs in this embodiment. The first transistor 171 has a thin plate shape, and is formed with one surface 171a and the other surface 171b facing the opposite side of the one surface 171a along the thickness direction. A drain electrode D is formed on one surface 171a, and a source electrode S and a gate electrode G are formed on the other surface 171b. Similarly, the second transistor 172 also has a thin plate shape, and is formed along the thickness direction with one surface 172a and the other surface 172b facing away from the one surface 172a. A drain electrode D is formed on one surface 172a, and a source electrode S and a gate electrode G are formed on the other surface 172b.

  The first transistor 171 is disposed on the rectangular region 14b of the positive electrode surface 141 of the positive electrode conductive plate 14 embedded in the bottom wall 41 of the case 40, and is bonded to the positive electrode conductive plate 14 via a bonding material 191 such as solder. Is done. In this case, the first transistor 171 has a positive electrode in a state where one surface 171 a of the first transistor 171, that is, the surface on which the drain electrode D is formed is disposed facing the rectangular region 14 b of the positive electrode surface 141 of the positive electrode conductive plate 14. Bonded to the conductive plate 14. At this time, a portion of the positive electrode surface 141 of the positive electrode conductive plate 14 shown as the region S1 in FIG. 4 is in contact with the one surface 171a of the first transistor 171 through the bonding material 191. One surface 171a of the first transistor 171 corresponds to the electrode formation surface of the present invention, and the drain electrode D formed on the one surface 171a corresponds to the electrode of the present invention. Moreover, area | region S1 is equivalent to the contact surface of this invention among the positive electrode surfaces 141 of the positive electrode conductive plate 14. FIG. Hereinafter, the region S1 may be referred to as a contact surface S1. The drain electrode D of the first transistor 171 is electrically connected to the positive electrode conductive plate 14 at the contact surface S1.

  The second transistor 172 is disposed on the rectangular region 15b of the negative electrode surface 151 of the negative electrode conductive plate 15 embedded in the bottom wall 41 of the case 40, and is bonded to the negative electrode conductive plate 15 via a bonding material 192 such as solder. Is done. In this case, the second surface 172 b of the second transistor 172, that is, the surface on which the source electrode S and the gate electrode G are formed is arranged in a state of facing the rectangular region 15 b of the negative electrode surface 151 of the negative electrode conductive plate 15. Transistor 172 is bonded to negative electrode conductive plate 15. At this time, a portion of the negative electrode surface 151 of the negative electrode conductive plate 15 shown as the region S2 in FIG. 4 is in contact with the other surface 172b of the second transistor 172 through the bonding material 192. The other surface 172b of the second transistor 172 corresponds to the electrode formation surface of the present invention, and the source electrode S formed on the other surface 172b corresponds to the electrode of the present invention. Further, in the negative electrode surface 151 of the negative electrode conductive plate 15, the region S2 corresponds to the contact surface of the present invention. Hereinafter, the region S2 may be referred to as a contact surface S2. The source electrode S of the second transistor 172 is electrically connected to the negative electrode conductive plate 15 at the contact surface S2.

  As shown in FIG. 4, since the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 are both exposed surfaces from the bottom wall 41, they are the same plane as the bottom surface (surface) of the bottom wall 41. Are formed in the same plane, and face the same direction. In FIG. 4, the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 face the Z1 direction (upward direction). One of the two surfaces (141, 151) facing the same direction (for example, the positive electrode surface 141 of the positive electrode conductive plate 14) is a surface on which the drain electrode D of one transistor (for example, the first transistor 171) is formed. One transistor is disposed so as to be disposed, and the source electrode S and the gate electrode G of the other transistor (for example, the second transistor 172) are formed on the other surface (for example, the negative electrode surface 151 of the negative electrode conductive plate 15). The other transistor is arranged so that the other surfaces face each other. That is, the two transistors (171, 172) are arranged on the respective conductive plates (the positive electrode conductive plate 14 and the negative electrode conductive plate 15) so as to be opposite to each other. In other words, both transistors are arranged in a state where the other transistor is inverted with respect to one transistor. Therefore, the direction of the surface (one surface 171a) where the drain electrode D of the first transistor 171 is formed and the direction of the surface (the other surface 172b) where the source electrode S and the gate electrode G of the second transistor 172 are formed are The same direction, that is, downward (Z2 direction). The direction of the surface (the other surface 171b) where the source electrode S and gate electrode G of the first transistor 171 are formed is the same as the direction of the surface (the one surface 172a) where the drain electrode D of the second transistor 172 is formed. Direction, that is, upward (direction Z1).

  As can be seen from FIG. 4, the first transistor 171 and the second transistor 172 are electrically connected via the first segment 51a. As described above, the first divided piece 51a constitutes a part of the divided bus bar 50 that is a lead frame. Here, the divided bus bar 50 will be described.

  FIG. 6 is a plan view of the divided bus bar 50, and FIG. 7 is a side view of the divided bus bar 50. 6 and 7, the left-right direction is the X direction, the right side is the X1 direction, and the left side is the X2 direction. Further, the vertical direction in FIG. 6 is the Y direction. Further, the vertical direction in FIG. 7 is the Z direction, the upper direction is the Z1 direction, and the lower direction is the Z2 direction. As shown in FIGS. 6 and 7, the divided bus bar 50 includes four divided pieces (first divided piece 51a, second divided piece 51b, third divided piece 51c, fourth divided piece 51d) and one piece. It has a terminal piece 52 and is configured by connecting them. The shape of each divided piece is the same. Each divided piece is collectively referred to as a divided piece 51.

  8A and 8B are diagrams illustrating the split piece 51, in which FIG. 8A is a plan view of the split piece 51, and FIG. 8B is a side view of the split piece 51. FIG. FIG. 9 is a diagram illustrating the terminal piece 52, FIG. 9A is a plan view of the terminal piece 52, and FIG. 9B is a side view of the terminal piece 52. The direction of the divided piece 51 shown in FIG. 8A and the direction of the terminal piece 52 shown in FIG. 9A coincide with the directions of the divided piece 51 and the terminal piece 52 shown in FIG. The direction of the divided piece 51 shown and the direction of the terminal piece 52 shown in FIG. 9B coincide with the directions of the divided piece 51 and the terminal piece 52 shown in FIG. That is, in FIG. 8A and FIG. 9A, the horizontal direction is the X direction, the right side is the X1 direction, the left side is the X2 direction, and the vertical direction is the Y direction. 8B and 9B, the horizontal direction is the X direction, the right side is the X1 direction, the left side is the X2 direction, the vertical direction is the Z direction, the upper direction is the Z1 direction, and the lower side is the Z2 direction. is there.

  As shown in FIG. 8A, the split piece 51 has a first joint portion 511, a second joint portion 512, an in-arm connection portion 513, and an inter-arm connection portion 514, and is made of an elastic material such as copper. It is composed of a conductive metal with a high coefficient. 9A, the terminal piece 52 has a first joint portion 521, a second joint portion 522, an in-arm connection portion 523, and a terminal connection portion 524, such as copper. It is composed of a conductive metal having a high elastic modulus.

  FIG. 4 shows a cross section of the first divided piece 51 a as the divided piece 51. The split piece 51 extends in the Y direction when viewed from the cross-sectional direction (X direction) shown in FIG. In addition, a convex portion that is convex upward (convex in the Z1 direction) is formed at the central portion in the Y direction of the split piece 51. The portion extending leftward in the Y direction in FIG. 4 from the lower left end of the convex portion constitutes the first joint 511, and the portion extending rightward in the Y direction in FIG. 4 from the lower right end of the convex portion is the second joint. The portion 512 is configured, and the convex portion configures the in-arm connection portion 513. Therefore, the first joint portion 511, the in-arm connection portion 513, and the second joint portion 512 are formed in this order along the Y direction.

  As can be seen from FIG. 8A, the inter-arm connection portion 514 extends from the intra-arm connection portion 513 in the X1 direction. Further, as can be seen from FIG. 8B, an inclined portion 515 is formed between the intra-arm connection portion 513 and the inter-arm connection portion 514. The inclined portion 515 is configured to be inclined obliquely upward as it goes from the intra-arm connecting portion 513 to the inter-arm connecting portion 514 along the X direction. The upper side portion of the convex in-arm connecting portion 513 is connected to the lower end (left end) of the inclined portion 515, and the inter-arm connecting portion 514 is connected to the upper end (right end) of the inclined portion 515. . Therefore, the vertical position (Z direction position) of the inter-arm connecting portion 514 when the split piece 51 is viewed from the side is higher than the vertical position of the upper side portion of the intra-arm connecting portion 513. Specifically, the vertical position (Z-direction position) of the lower surface 514a of the inter-arm connecting portion 514 is substantially equal to the vertical position of the upper surface 513b of the intra-arm connecting portion 513.

  As shown in FIG. 6, the four divided pieces 51 having the above-described structure are arranged such that each first joint portion 511 is arranged on a straight line along the X direction, and each second joint portion 512 is X Aligned to be arranged on a straight line along the direction. At this time, as shown in FIG. 7, the inter-arm connecting portion 514 of the first divided piece 51a is superimposed directly on the intra-arm connecting portion 513 of the second divided piece 51b, and the inter-arm connecting portion 514 of the second divided piece 51b. Is superimposed directly on the in-arm connection portion 513 of the third divided piece 51c, and the inter-arm connection portion 514 of the third divided piece 51c is superimposed directly on the in-arm connection portion 513 of the fourth divided piece 51d. Four divided pieces 51 are aligned along the X direction. Then, the inter-arm connecting portion 514 of one divided piece 51 and the intra-arm connecting portion 513 of the other divided piece 51 that are overlapped with each other are joined by a bonding material such as solder. In this way, the four divided pieces 51 are connected. Moreover, the terminal piece 52 is connected to the connection part 514 between the arms of the 4th division | segmentation piece 51d among the four division | segmentation pieces 51 connected.

  The shapes of the first joint portion 521, the second joint portion 522, and the intra-arm connection portion 523 of the terminal piece 52 are the first joint portion 511, the second joint portion 512, and the intra-arm connection portion 513 of the split piece 51, respectively. The shape is almost the same. That is, the terminal piece 52 extends in the Y direction when viewed from the X direction, similarly to the divided piece 51 shown in FIG. 4, and a convex convex portion is formed at the center portion thereof. This convex portion constitutes the in-arm connecting portion 523, the first joint 521 extends leftward from the lower left end of the in-arm connecting portion 523, and the second joined portion 522 from the right lower end of the in-arm connecting portion 523. Is extended to the right. Further, the terminal connection portion 524 of the terminal piece 52 extends from the in-arm connection portion 523 in the X1 direction, as shown in FIG. 9A. Further, as can be seen from FIG. 9B, a vertical portion 525 is formed between the in-arm connection portion 523 and the terminal connection portion 524. The vertical portion 525 extends in the up-down direction (Z direction), the upper side portion of the convex in-arm connection portion 523 is connected to the upper end, and the terminal connection portion 524 is connected to the lower end. Therefore, the vertical position (Z-direction position) of the terminal connection portion 524 when the terminal piece 52 is viewed from the side is lower than the vertical position of the upper side portion of the in-arm connection portion 513. The vertical position (Z-direction position) of the lower surface 524a of the terminal connection portion 524 is equal to the vertical position of the lower surface 521a of the first joint portion 521 (and the lower surface of the second joint portion 522).

  The terminal piece 52 is aligned with the four divided pieces 51 connected as shown in FIG. At this time, the terminal piece 52 is arranged on a straight line along the X direction together with the first joint portions 511 of the four divided pieces 51 to which the first joint portions 521 are connected, and the second joint portions 522 are arranged. Along with the second joining portions 512 of the four divided pieces 51 connected, the four divided pieces 51 are arranged so as to be arranged on a straight line along the X direction. Further, as shown in FIG. 7, the in-arm connecting portion 523 of the terminal piece 52 is connected to the four divided pieces 51 connected so as to be superimposed directly below the inter-arm connecting portion 514 of the fourth divided piece 51d. It is arranged with respect to. Then, the intra-arm connecting portion 523 of the terminal piece 52 and the inter-arm connecting portion 514 of the fourth divided piece 51d disposed immediately above the terminal piece 52 are joined via a joining material such as solder. In this way, the in-arm connecting portion 523 of the terminal piece 52 is coupled to the fourth divided piece 51d.

  As shown in FIG. 6, the divided bus bar 50 configured as described above includes a first divided piece 51 a, a second divided piece 51 b, a third divided piece 51 c, a fourth divided piece 51 d, and a terminal piece 52 along the X direction. Configured to align in a row. In the divided bus bar 50, as shown in FIG. 3, the connecting direction of the divided pieces 51 and the terminal pieces 52 (that is, the alignment direction of the divided pieces 51 and the terminal pieces 52) coincides with the X direction, and the X direction Are arranged in the case 40 so as to cross the five arm circuits (17a, 17b, 17c, 17d, 17e). By thus providing the divided bus bars 50 for the five arm circuits, the first divided piece 51a is assigned to the first arm circuit 17a, and the second divided piece 51b is assigned to the second arm circuit 17b. The third divided piece 51c is assigned to the third arm circuit 17c, the fourth divided piece 51d is assigned to the fourth arm circuit 17d, and the terminal piece 52 is assigned to the fifth arm circuit 17e.

  As shown in FIG. 4, the first junction 511 of the divided piece 51 (first divided piece 51a) assigned to the first arm circuit 17a is formed with the source electrode S and the gate electrode G of the first transistor 171. The second junction 512 of the split piece 51 faces the one surface 172a that is the surface on which the drain electrode D of the second transistor 172 is formed. And the 1st junction part 511 of the division piece 51 and the other surface 171b of the 1st transistor 171 which were face-to-face arrangement | positioning are joined via the joining materials 193, such as solder, One surface 172a of the second transistor 172 is bonded via a bonding material 194 such as solder.

  The connection configuration of the divided piece 51 and the terminal piece 52 assigned to the second to fifth arm circuits and the first transistor 171 and the second transistor 172 is the same as described above.

  FIG. 5 is a cross-sectional view taken along the line VV in FIG. 3 and shows a cross section along the Y direction of the divided bus bar 50. As shown in FIG. 5, the inter-arm connecting portion 514 of the first divided piece 51a assigned to the first arm circuit 17a is connected to the intra-arm connecting portion 513 of the second divided piece 51b assigned to the second arm circuit 17b. Connected. Further, the inter-arm connecting portion 514 of the second divided piece 51b assigned to the second arm circuit 17b is connected to the intra-arm connecting portion 513 of the third divided piece 51c assigned to the third arm circuit 17c. Further, the inter-arm connecting portion 514 of the third divided piece 51c assigned to the third arm circuit 17c is connected to the intra-arm connecting portion 513 of the fourth divided piece 51d assigned to the fourth arm circuit 17d. The inter-arm connection portion 514 of the fourth divided piece 51d assigned to the fourth arm circuit 17d is connected to the intra-arm connection portion 523 of the terminal piece 52 assigned to the fifth arm circuit 17e. Further, the terminal connection portion 524 of the terminal piece 52 assigned to the fifth arm circuit 17 e is connected to the exposed surface 161 of the output conductive plate 16 embedded in the bottom wall 41 of the case 40. The output terminal 13 is connected to the output conductive plate 16 as described above. Therefore, the divided bus bar 50 is connected to the output terminal 13 via the output conductive plate 16.

  In addition, as shown in FIG. 4, the first junction portion has a first junction portion in a part of the other surface 171 b of the first transistor 171 where the gate electrode G is formed and a portion where the source electrode S is formed. 511 (521) is not joined. Then, one end of the flexible wiring 61 that is a flexible electric wire is connected to a portion of the other surface 171b of the first transistor 171 where the gate electrode G is formed, and the other surface 171b of the first transistor 171 is One end of the flexible wiring 63 that is a flexible electric wire is connected to the portion where the source electrode S is formed. In addition, one end of the flexible wiring 62 which is a flexible electric wire is connected to a portion of the other surface 172b of the second transistor 172 where the gate electrode G is formed, and the other surface 172b of the second transistor 172 is connected. One end of the flexible wiring 64 that is a flexible electric wire is also connected to the portion of the source electrode S formed therein. Here, the other surface 172 b of the second transistor 172 is a downward surface, and when the entire surface is in contact with the negative electrode surface 151 of the negative electrode conductive plate 15, the flexible wirings 62 and 64 are connected to the second transistor 172. Cannot connect to direction 172b. In this regard, in the present embodiment, the negative electrode surface 151 of the negative electrode conductive plate 15 is adjacent to the contact surface S2 and faces the gate electrode G and the source electrode S formed on the other surface 172b of the second transistor 172. A concave portion 152 communicating with the internal space of the case 40 is formed in the portion, and one end of the flexible wirings 62 and 64 is connected to the other surface 172b (lower surface) of the second transistor 172 via the concave portion 152. The Here, since the flexible wirings 62 and 64 have flexibility, the flexible wirings 62 and 64 are folded back as shown in FIG. The gate electrode G and the source electrode S formed on the other surface 172b of the transistor 172 can be connected. The other ends of the flexible wirings 61, 62, 63, 64 are connected to a control board (not shown). The recess 152 corresponds to the surface area enlarged portion of the present invention.

  FIG. 10 is a circuit diagram showing an inverter circuit including the first semiconductor module 10A, the second semiconductor module 10B, and the third semiconductor module 10C having the above-described configuration. As shown in FIG. 10, the positive terminal 11 of each of the semiconductor modules 10A, 10B, and 10C is connected in parallel to the positive line P connected to the power supply side positive terminal VP of the DC power supply V, and the semiconductor modules 10A, 10A, The negative terminals 12 of 10B and 10C are connected in parallel to the negative line N connected to the power supply side negative terminal VN of the DC power supply V. Therefore, the semiconductor device 1 (inverter circuit) according to the present embodiment includes a positive line P connected to the power source side positive terminal VP of the DC power source V and a negative line N connected to the power source side negative terminal VN of the DC power source V. Is a semiconductor device comprising a plurality of semiconductor modules (first semiconductor module 10A, second semiconductor module 10B, third semiconductor module 10C) connected in parallel.

  Further, the five arm circuits (first arm circuit 17a, second arm circuit 17b, third arm circuit 17c, fourth arm circuit 17d, and fifth arm circuit 17e) included in each of the semiconductor modules 10A, 10B, and 10C are: The positive electrode conductive plate 14 connected to the positive electrode terminal 11 and the negative electrode conductive plate 15 connected to the negative electrode terminal 12 are connected in parallel. Further, the divided pieces 51 and the terminal pieces 52 respectively assigned to the five arm circuits connected in parallel are connected in series to the output conductive plate 16 connected to the output terminal 13. The output terminal 13 of the first semiconductor module 10A is connected to the U-phase coil of the three-phase DC brushless motor M via the first output line 71, and the output terminal 13 of the second semiconductor module 10B is connected to the second output line. 72 is connected to the V-phase coil of the three-phase DC brushless motor M, and the output terminal 13 of the third semiconductor module 10C is connected to the W-phase coil of the three-phase DC brushless motor M via the third output line 73. The

  The five first transistors 171 and the five second transistors 172 provided in each of the semiconductor modules 10A, 10B, and 10C function as switching elements. In this case, when the signal is input from the control board 60 to the gate electrodes G of the transistors 171 and 172 in a predetermined pattern, the transistors 171 and 172 are switched. In the present embodiment, the five first transistors 171 included in each of the semiconductor modules 10A, 10B, and 10C all operate simultaneously. That is, the ON operation and the OFF operation of the five first transistors 171 are all performed at the same timing. Similarly, all the five second transistors 172 included in each of the semiconductor modules 10A, 10B, and 10C operate simultaneously. That is, the ON operation and the OFF operation of the five second transistors 172 are all performed at the same timing.

  In the inverter circuit shown in FIG. 10, for example, when the first transistor 171 of the first semiconductor module 10A and the second transistor 172 of the third semiconductor module 10C are turned on and the other transistors are turned off, The current flows as follows. That is, the current from the positive line P flows in this order through the positive terminal 11, the positive conductive plate 14, the first transistor 171, the divided bus bar 50, the output conductive plate 16, and the output terminal 13 of the first semiconductor module 10A. Then, current is supplied from the output terminal 13 of the first semiconductor module 10 </ b> A to the U-phase coil of the three-phase DC brushless motor M via the first output line 71. Further, the current from the W-phase coil of the three-phase DC brushless motor M flows through the third output line 73 to the output terminal 13 of the third semiconductor module 10C, and further, the output conductive plate 16 of the third semiconductor module 10C. The divided bus bar 50, the second transistor 172, the negative electrode conductive plate 15, and the negative electrode terminal 12 flow in this order. Then, a current flows from the negative terminal 12 of the third semiconductor module 10C to the negative line N.

  Further, for example, when the first transistor 171 of the second semiconductor module 10B and the second transistor 172 of the first semiconductor module 10A are turned on and the other transistors are turned off, the currents in the inverter circuit are as follows: It flows like. That is, the current from the positive line P flows in this order through the positive terminal 11, the positive conductive plate 14, the first transistor 171, the divided bus bar 50, the output conductive plate 16, and the output terminal 13 of the second semiconductor module 10B. Then, current is supplied from the output terminal 13 of the second semiconductor module 10 </ b> B to the V-phase coil of the three-phase DC brushless motor M via the second output line 72. Further, the current from the U-phase coil of the three-phase DC brushless motor M flows to the output terminal 13 of the first semiconductor module 10A via the first output line 71, and further, the output conductive plate 16 of the first semiconductor module 10A. The divided bus bar 50, the second transistor 172, the negative electrode conductive plate 15, and the negative electrode terminal 12 flow in this order. A current flows from the negative terminal 12 of the first semiconductor module 10 </ b> A to the negative line N.

  As in the example described above, when the first transistor 171 of each of the semiconductor modules 10A, 10B, and 10C is turned on, a current flows from the positive electrode conductive plate 14 to the first transistor 171. On the other hand, when the second transistor 172 of each of the semiconductor modules 10A, 10B, and 10C is turned on, a current flows from the second transistor 172 to the negative electrode conductive plate 15. When the flow of these currents is shown in FIG. 4, the direction of the current flowing through the positive electrode conductive plate 14 is upward (Z1 direction) as indicated by the arrow A, and the direction of the current flowing through the negative electrode conductive plate 15 is indicated by the arrow B. As shown, it is downward (Z2 direction). That is, the direction of the current flowing through the positive electrode conductive plate 14 is opposite to the direction of the current flowing through the negative electrode conductive plate 15.

  When the members through which current flows in the opposite direction are arranged close to each other, the mutual inductance increases. For this reason, the inductances cancel each other, and the inductance can be reduced. According to the present embodiment, the positive electrode surface 141 of the positive electrode conductive plate 14 (surface connected to the one surface 171a of the first transistor 171) and the negative electrode surface 151 of the negative electrode conductive plate 15 (connected to the other surface 172b of the second transistor 172). In other words, the positive electrode conductive plate 14 and the negative electrode conductive plate 15 through which current flows in the opposite directions are arranged side by side in parallel. Therefore, the distance (small distance α) between the positive electrode conductive plate 14 and the negative electrode conductive plate 15 arranged adjacent to each other can be made as small as possible. As a result, the inductance of the positive electrode conductive plate 14 and the negative electrode conductive plate 15 can be reduced.

  Further, the positive electrode surface 141 of the positive electrode conductive plate 14 (surface connected to one surface 171a of the first transistor 171) and the negative electrode surface 151 of the negative electrode conductive plate 15 (surface connected to the other surface 172b of the second transistor 172). In the same direction, the direction of the first transistor 171 and the direction of the second transistor 172 are reversed. Thereby, the other surface 171b of the first transistor 171 and the one surface 172a of the second transistor 172 are set in the same direction (upward). For this reason, the other surface 171b of the first transistor 171 and the one surface 172a of the second transistor 172 can be linearly connected. Therefore, the other surface 171b of the first transistor 171 and the one surface 172a of the second transistor 172 It is possible to shorten the length of the connecting portions (intra-arm connecting portions 513 and 523) for connecting the two. As a result, the inductance of the connecting portion can be reduced.

  Further, in the semiconductor device 1 according to the present embodiment, as shown in FIG. 4, the concave portion 152 is formed on the negative electrode surface 151 of the negative electrode conductive plate 15. As described above, the flexible wirings 62 and 64 connected to the other surface 172 b of the second transistor 172 are disposed in the recess 152. The concave portion 152 is provided in a region adjacent to the contact surface S <b> 2 in contact with the other surface 172 b of the second transistor 172 through the bonding material 192 in the negative electrode surface 151 of the negative electrode conductive plate 15.

  Since the recess 152 is provided adjacent to the contact surface S2, the current flowing from the source electrode S formed on the other surface 172b of the second transistor 172 to the negative electrode conductive plate 15 passes near the recess 152. Become. In other words, the recess 152 is provided on the negative electrode surface 151 of the negative electrode conductive plate 15 and in the vicinity of the conductive path of the current flowing from the source electrode S of the second transistor 172 to the negative electrode conductive plate 15.

  In this embodiment, the shape of the space in the recess 152 is a rectangular parallelepiped. Therefore, as shown in FIG. 4, the surface of the concave portion 152 includes a rectangular (or square) bottom surface 152a and four side surfaces 152b erected from four sides of the bottom surface 152a. Therefore, the surface area of the recess 152 is represented by the sum of the areas of the bottom surface 152a and the four side surfaces 152b. The opening area of the recess 152 is equal to the area of the bottom surface 152 a of the recess 152.

  The opening area of the recess 152 is the area of the negative electrode surface 151 of the negative electrode conductive plate 15 where the recess 152 is provided. The surface area of the recess 152 (the sum of the area of the bottom surface 152 a and the area of the four side surfaces 152 b) is larger than the opening area of the recess 152. Therefore, the surface area of the negative electrode conductive plate 15 is increased by providing the recess 152. That is, the concave portion 152 is a surface area enlarged portion.

  When a portion that enlarges the surface area such as a recess is provided in the vicinity of the conductive path of the current flowing through the conductive substrate on the surface of the conductive substrate, the inductance of the conductive substrate may be reduced. It was revealed by recent research. Accordingly, the recess 152 can reduce the inductance of the negative electrode conductive plate 15. Hereinafter, a verification experiment for reducing the inductance due to the presence of the recess will be described.

  A shape model of the first semiconductor module 10A included in the semiconductor device 1 shown in FIG. 1 was produced. Refer to FIG. 2 for the arrangement of the first and second transistors 171.172. Next, in the produced shape model, the positive electrode conductive plate 14 in the case where a current is passed from the positive electrode terminal 11 to the output terminal 13 when the five first transistors 171 are on and the five second transistors 172 are off. The inductance of was calculated by computer simulation. As a result, the inductance of the positive electrode conductive plate 14 was 3.17 nanohenries. The simulation software used for calculating the inductance is Q3D manufactured by Ansys Japan.

  Further, in the shape model of the first semiconductor module 10A described above, when a current flows from the output terminal 13 to the negative terminal 12 when the five first transistors 171 are off and the five second transistors 172 are on. The inductance of the negative electrode conductive plate 15 was calculated using the software described above. As a result, the negative electrode conductive plate 15 had an inductance of 2.53 nanohenries.

  FIG. 11 is a diagram showing the positive electrode conductive plate 14 used for the inductance calculation. Here, FIG. 11A is a front view of the positive electrode conductive plate 14, FIG. 11B is a side view of the positive electrode conductive plate 14, and FIG. 11C is a bottom view of the positive electrode conductive plate 14. FIG. 12 is a diagram showing the negative electrode conductive plate 15 used for calculation of inductance. Here, FIG. 12A is a front view of the negative electrode conductive plate 15, FIG. 12B is a side view of the negative electrode conductive plate 15, and FIG. 12C is a bottom view of the negative electrode conductive plate 15. In addition, the unit of the dimension described in FIG.11 and FIG.12 is millimeter.

  As can be seen by comparing FIG. 11 and FIG. 12, the outer shape of the positive electrode conductive plate 14 and the outer shape of the negative electrode conductive plate 15 are symmetrical. However, the negative electrode surface 151 of the negative electrode conductive plate 15 has a region adjacent to the contact surface S2 with the other surface 172b of the second transistor 172, that is, the current flowing through the negative electrode conductive plate 15, as shown in FIGS. A recess 152 is formed in the vicinity of the conductive path, whereas such a recess is not formed on the positive electrode surface 141 of the positive electrode conductive plate 14. From this, it can be seen that the inductance is reduced by providing the recess 152.

  As described above, the semiconductor device 1 according to this embodiment includes the second transistor 172 (semiconductor element) having the other surface 172b (electrode formation surface) on which the source electrode S (electrode) is formed, and the conductive metal. A negative electrode conductive plate 15 (conductive plate) having a negative electrode surface 151 (front surface) formed with a contact surface S2 in contact with the other surface 172b so as to be electrically connected to the source electrode S of the second transistor 172. Prepare. Then, in the negative electrode surface 151 of the negative electrode conductive plate 15, in the vicinity of the conductive path of the current flowing from the source electrode S of the second transistor 172 to the negative electrode conductive plate 15, the concave portion 152 as a surface area enlarged portion with an enlarged surface area. Is provided.

  According to this embodiment, the presence of the recess 152 reduces the inductance of the negative electrode conductive plate 15. Therefore, by manufacturing the semiconductor device 1 using the negative electrode conductive plate 15 provided with the recess 152, it is possible to provide a semiconductor device that is manufactured without deteriorating productivity and has reduced inductance. .

  The concave portion 152 is provided in a region adjacent to the contact surface S <b> 2 in contact with the other surface 172 b of the second transistor 172 in the negative electrode surface 151 of the negative electrode conductive plate 15. The current flowing through the negative electrode conductive plate 15 passes through the contact surface S2 that is in contact with the other surface 172b of the second transistor 172. Therefore, by providing the recess 152 in the adjacent region of the contact surface S2, the recess 152 is always provided in the vicinity of the conductive path of the current flowing through the negative electrode conductive plate 15. Therefore, the inductance of the negative electrode conductive plate 15 can be reliably reduced.

  As mentioned above, although embodiment of this invention was described, this invention should not be limited to the said embodiment. For example, in the above-described embodiment, the example in which the concave portion 152 is provided as the surface area enlargement portion on the negative electrode surface 151 of the negative electrode conductive plate 15 is shown, but the surface area enlargement portion may be provided on the positive electrode surface 141 of the positive electrode conductive plate 14. . In this case, a concave portion or the like is formed on the positive electrode surface 141 of the positive electrode conductive plate 14 and in the vicinity of the conductive path of the current flowing through the positive electrode conductive plate 14 toward the drain electrode D formed on the one surface 171a of the first transistor 171. It is preferable to provide an enlarged surface area. Moreover, although the recessed part 152 was illustrated as a surface area expansion part in the said embodiment, if it is a shape where a surface area is expanded, it may not be a recessed part. For example, as the surface area enlargement portion, a convex portion, a concavo-convex portion, or a portion formed like a corrugated shape is used as the surface (positive electrode surface 141 or negative electrode surface 151) of the conductive plate (positive electrode conductive plate 14 or negative electrode conductive plate 15). ) May be provided.

  Moreover, although the recessed part 152 showed the example provided adjacent to the contact surface S2 of the negative electrode electrically conductive plate 15 in the said embodiment, surface area expansion, such as a recessed part, adjoined to the contact surface S1 of the positive electrode electrically conductive plate 14 was shown. May be provided, or may be provided adjacent to both contact surfaces S1 and S2. Further, if the positive electrode surface 141 of the positive electrode conductive plate 14 and the negative electrode surface 151 of the negative electrode conductive plate 15 are regions that are considered to be regions in the vicinity of the conductive path of the current flowing through each conductive plate, the contact surfaces S1 and S2 You may form surface area expansion parts, such as a recessed part, in areas other than an adjacent area | region.

  For example, the positive electrode surface 141 of the positive electrode conductive plate 14 is provided with a positive electrode terminal attachment region 14c (power supply connection portion attachment region) to which the positive electrode terminal 11 (power supply connection portion) connected to the power supply side positive terminal VP of the power source V is attached. It is done. For this reason, the current from the power supply V to the positive electrode terminal attachment region 14c via the positive electrode terminal 11 flows linearly from the positive electrode terminal attachment region 14c toward the contact surface S1 with the one surface 171a of the first transistor 171. it is conceivable that. Such a current conduction path L1 in the positive electrode conductive plate 14 is shown in FIG. Therefore, as shown in FIG. 13, the conductive path L1 is represented by a line segment connecting the center of the positive electrode terminal attachment region 14c and the center of the contact surface S1. Therefore, the surface area enlarged portion P can be provided in an arbitrary region in the vicinity of the line segment (L1) connecting the positive electrode terminal attachment region 14c and the contact surface S1. Even when the surface area enlarged portion P is provided in this way, the inductance of the positive electrode conductive plate 14 can be reduced.

  Further, the negative electrode surface 151 of the negative electrode conductive plate 15 is provided with a negative electrode terminal attachment region 15c (power supply connection portion attachment region) to which the negative electrode terminal 12 (power supply connection portion) connected to the power source negative electrode terminal VN of the power source V is attached. It is done. For this reason, it is considered that the current from the second transistor 172 to the contact surface S2 with the other surface 172b of the second transistor 172 flows linearly from the contact surface S2 toward the negative electrode terminal attachment region 15c. Such a conductive path L2 of the current in the negative electrode conductive plate 15 is shown in FIG. Therefore, as shown in FIG. 14, the conductive path L2 is represented by a line segment connecting the center of the contact surface S2 and the center of the negative electrode terminal attachment region 15c. Therefore, the surface area enlarged portion P can be provided in any region in the vicinity of the line segment (L2) connecting the contact surface S2 and the negative electrode terminal attachment region 15c. Even when the surface area enlarged portion P is provided in this manner, the inductance of the negative electrode conductive plate 15 can be reduced.

  Moreover, in the said embodiment, although the transistor was illustrated as a semiconductor element, this invention is applicable also to the semiconductor device which has another semiconductor element. However, when the semiconductor element is a transistor having a switching function, the effect of reducing inductance when the semiconductor element performs switching operation in a high frequency region is large. Therefore, the present invention exhibits a great effect when the transistor having a switching function is a semiconductor element. Thus, the present invention can be modified without departing from the gist thereof.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 10A, 10B, 10C ... Semiconductor module, 11 ... Positive electrode terminal (power supply connection part), 12 ... Negative electrode terminal (power supply connection part), 13 ... Output terminal, 14 ... Positive electrode conductive plate (conductive plate), 14c ... positive electrode terminal mounting area (power supply connection part mounting area), 141 ... positive electrode surface (front surface), 15 ... negative electrode conductive plate (conductive plate), 15c ... negative electrode terminal mounting area (power supply connection part mounting area), 151 ... negative electrode surface ( Front surface), 152 ... Concave portion (surface area enlarged portion), 152a ... Bottom surface, 152b ... Side surface, 16 ... Output conductive plate, 17 ... Arm unit, 171 ... First transistor (semiconductor element), 171a ... One side (electrode formation surface) 171b ... the other side, 172 ... the second transistor (semiconductor element), 172a ... the one side, 172b ... the other side (electrode formation side), 40 ... the case, 50 ... the divided bus bar, 60 ... the control board, DESCRIPTION OF SYMBOLS 1,62,63,64 ... Flexible wiring, D ... Drain electrode (electrode), S ... Source electrode (electrode), L1, L2 ... Conductive path, P ... Surface area expansion part, S1, S2 ... Contact surface, V ... DC Power supply (power supply)

Claims (4)

A semiconductor element having an electrode formation surface on which an electrode is formed;
A conductive plate having a surface formed of a conductive metal and having a contact surface in contact with the electrode forming surface so as to be electrically connected to the electrode of the semiconductor element;
With
The surface area of the surface of the conductive plate is expanded to a region near a conductive path of current flowing through the conductive plate toward the electrode or a region near a conductive path of current flowing from the electrode to the conductive plate. An increased surface area is provided,
Semiconductor device. The semiconductor device according to claim 1,
The surface area enlarged portion is a recess;
Semiconductor device. The semiconductor device according to claim 1 or 2,
On the surface of the conductive plate, there is provided a power connection part mounting region to which a power connection part connected to a power source is attached,
The surface area enlargement portion is provided in a region near a line segment connecting the power supply connection portion attachment region and the contact surface.
Semiconductor device. The semiconductor device according to any one of claims 1 to 3,
The semiconductor device in which the surface area enlarged portion is provided in a region adjacent to the contact surface.

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