JP2018190866A - Semiconductor module, and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor module and a method of manufacturing the same capable of protecting a bonding wire.SOLUTION: A method of manufacturing a semiconductor module according to one embodiment is a method of manufacturing a semiconductor module 1 that comprises: a base 3; and a housing 2 arranged on the base 3 and that has a side wall defining an element mounting region between the base 3 and itself. The method includes the following steps of: mounting an element in the element mounting region; wire-bonding the element; filling the element mounting region with a solidification resin R having a viscosity equal to or more than 1 mPa S and equal to or less than 100 mPa S; and forming the solidification resin R immediately under a bonding wire W and between the base 3 and the bonding wire W.SELECTED DRAWING: Figure 8

Description

  The present invention relates to a semiconductor module and a method for manufacturing a semiconductor module.

  Patent Document 1 describes an electronic device and a manufacturing method thereof. The electronic device includes an electronic component, a mating member that is mechanically connected to the electronic component, and a metal conductor that is interposed between the electronic component and the mating member and connects the electronic component and the mating member to each other. The metal conductor is made of a noble metal such as Ag. The metal conductor has holes, and the holes are impregnated with a reinforcing resin such as polyimide that reinforces the metal conductor. The reinforcing resin fills the holes, thereby reinforcing the metal conductor.

  Patent Document 2 describes that a connection layer of a die bonding portion is formed by an adhesive layer made of Cu powder having a maximum particle size of 15 μm or more and 200 μm or less and Ag. The connection layer has a structure in which fine pores are uniformly dispersed. This structure achieves lead-free use, improves reflow resistance, and ensures temperature cycle reliability.

  2. Description of the Related Art A semiconductor module having a package, a metal base, and a semiconductor die that is a high-frequency high-power semiconductor is known. For mounting the semiconductor die, a eutectic solder material such as AuSn, AuGe and AuSi is used. The eutectic solder material has good adhesion reliability, but has a problem of high cost because it contains Au. An element other than a semiconductor die, such as a matching circuit or a capacitor, generally has a front electrode and a back electrode, and these components are also mounted on the base by a eutectic solder material.

  On the other hand, a metal paste may be used for mounting a semiconductor die. As the metal paste, a conductive paste made of a metal powder such as silver, copper or nickel is used. In recent years, wide band gap semiconductors such as SiC, GaN, GaO and ZnO have been developed. Wide bandgap semiconductors are capable of high voltage operation because of their high breakdown voltage. A wide band gap semiconductor has high electron mobility due to a high electric field, and therefore has high performance in a high frequency region.

  However, when a wide band gap semiconductor is mounted on the base with a metal paste, ion migration occurs. Ion migration is a phenomenon in which metal ions move and cause a short circuit in a high humidity or high electric field environment. In a device operating at a high voltage, such as a wide gap semiconductor, since the operating voltage is high and the operating current is large, the ion migration reaction tends to accelerate.

JP 2012-109636 A JP 2009-94341 A

  As described above, after an element such as a semiconductor die is mounted on the base, wire bonding is performed between the elements. Many dozens of bonding wires may be connected between the elements. Here, physical isolation between bonding wires is important. It is required to protect the bonding wires by making the bonding wires independent of each other.

  An object of this invention is to provide the semiconductor module which can protect a bonding wire, and the manufacturing method of a semiconductor module.

  A semiconductor module according to an embodiment of the present invention includes a semiconductor chip, a bonding wire connected to an electrode of the semiconductor chip, and a solidified resin that contacts the bonding wire immediately below the bonding wire.

  A method for manufacturing a semiconductor module according to an aspect of the present invention is a method for manufacturing a semiconductor module, comprising: a base; and a housing having a side wall disposed on the base and defining a device mounting region between the base and the base. A step of mounting an element in the element mounting region, a step of wire bonding to the element, a step of filling the element mounting region with a solidified resin having a viscosity of 1 mPa · s to 100 mPa · s, and wire bonding. And a step of forming a solidified resin directly under the obtained bonding wire and between the base and the bonding wire.

  According to the present invention, the bonding wire can be protected.

FIG. 1 is a plan view showing a semiconductor module according to the embodiment. FIG. 2 is a diagram illustrating the surface of a semiconductor die. FIG. 3 is a diagram showing the back surface of the semiconductor die of FIG. 4 is a plan view showing the semiconductor die and the conductive paste of FIG. Fig.5 (a)-FIG.5 (f) are figures which show the procedure of application | coating of an electrically conductive paste. FIG. 6A to FIG. 6D are diagrams showing a modified example of the procedure of applying the conductive paste. FIG. 7 is a diagram showing the conductive paste and organic material between the base and the semiconductor die. FIG. 8 is a cross-sectional view showing the bonding wire and the solidified resin. FIG. 9 is a diagram showing a procedure for forming the solidified resin of FIG. FIG. 10 is a diagram showing a procedure for forming the solidified resin of FIG. FIG. 11 is a diagram showing a procedure for forming the solidified resin of FIG. FIG. 12 is a diagram showing a procedure for forming the solidified resin of FIG. FIG. 13 is a cross-sectional view showing the bonding wire of FIG. 8 and the solidified resin.

  Hereinafter, embodiments of a semiconductor module and a method for manufacturing a semiconductor module according to the present invention will be described with reference to the accompanying drawings. In the description of the drawings, the same or corresponding elements are denoted by the same reference numerals, and repeated description is omitted as appropriate.

  FIG. 1 is a plan view showing an internal structure of a semiconductor module 1 according to the embodiment. In FIG. 1, the state which removed the cover part of the semiconductor module 1 is shown. The semiconductor module 1 includes two units U1 and U2, and the two units U1 and U2 have the same configuration. The semiconductor module 1 includes a housing 2 on which two units U1 and U2 are mounted.

  In the internal space of the housing 2, a metal base 3 and a pair of ceramic side walls 2 c disposed on the base 3 are provided. The pair of side walls 2c and the base 3 define an element mounting area A in which elements such as the input matching circuit 6, the semiconductor die 7 (semiconductor chip), the output matching circuit 8, and the output capacitor 9 are mounted. The semiconductor module 1 can be used by covering the side wall 2c with a lid and applying a hermetic seal in a state where the internal space of the housing 2 is replaced with nitrogen.

  Each of the two units U1 and U2 includes an input lead 4 fixed to the upper surface of the front wall 2a of the housing 2 and an output lead 5 fixed to the upper surface of the rear wall 2b of the housing 2. Each of the two units U1 and U2 includes an input matching circuit 6, a semiconductor die 7, an output matching circuit 8, and an output capacitor 9 in the element mounting area A surrounded by the side wall 2c. The input matching circuit 6, the semiconductor die 7, the output matching circuit 8, and the output capacitor 9 are provided in this order from the front wall 2a. The semiconductor die 7 includes, for example, a substrate such as Si, SiC, GaN, GaAs, or diamond, and metal plating is applied to the back surface of the substrate.

  The input matching circuit 6, the semiconductor die 7 and the output matching circuit 8 are fixed on the base 3 with a conductive paste. The input matching circuit 6 is mounted on the input side of the semiconductor die 7, and the output matching circuit 8 is mounted on the output side of the semiconductor die 7. Between input lead 4 and input matching circuit 6, between input matching circuit 6 and semiconductor die 7, between semiconductor die 7 and output matching circuit 8, between output matching circuit 8 and output capacitor 9, and output capacitor 9 and output. Each of the leads 5 is electrically connected by a plurality of bonding wires.

  The base 3 is made of, for example, a laminated material of copper, an alloy of copper and molybdenum, an alloy of copper and tungsten, or a copper plate, a molybdenum plate, a tungsten plate, an alloy plate of copper and molybdenum, and an alloy plate of copper and tungsten. The surface of the base 3 is plated with nickel chrome (nichrome) -gold, nickel-gold, nickel-palladium-gold, silver or nickel, or nickel-palladium. Gold, silver, and palladium are plating materials, and NiCr, Ni, and the like are seed materials. Adhesion can be improved when the plating material and the seed material are included rather than when only the plating material is used.

  The thickness of the base 3 is, for example, 0.5 to 1.5 mm, and the thickness of the side wall 2c is 0.5 to 1.0 mm. Further, a metal pattern is formed on a part of the upper surface of the front wall 2a and the rear wall 2b, and the input lead 4 and the output lead 5 are brazed to the metal pattern, respectively. The input matching circuit 6 and the output matching circuit 8 are, for example, parallel plate capacitors in which electrodes are provided on the upper surface and the lower surface of the ceramic substrate.

  FIG. 2 is a view showing the surface of the semiconductor die 7. FIG. 3 is a view showing the back surface of the semiconductor die 7. As shown in FIGS. 2 and 3, the semiconductor die 7 has an elongated rectangular shape. The semiconductor die 7 has a planar shape defined by a pair of short sides 7a and a pair of long sides 7b.

  The aspect ratio of the short side 7a and the long side 7b of the semiconductor die 7 is, for example, 1 or more and 10 or less. As an example, the length of the short side 7a of the semiconductor die 7 is not less than 0.5 mm and not more than 2.0 mm, the length of the long side 7b is not less than 1.0 mm and not more than 7.0 mm, and the thickness of the semiconductor die 7 is The thickness is 50 μm or more and 200 μm or less.

  The semiconductor die 7 includes a substrate 7c and a source electrode 7d provided on the back surface of the substrate 7c. The semiconductor die 7 includes a plurality of gate electrodes 7e, source vias 7f, active regions 7g, and drain electrodes 7h arranged along the long side 7b on the surface of the substrate 7c. The source electrode 7d is, for example, plated with gold, and the thickness of the source electrode 7d is not less than 5 μm and not more than 20 μm.

  The gate electrode 7e is provided on the opposite side of the drain electrode 7h when viewed from the active region 7g. The active region 7g includes drain and source fingers. The source finger and the back surface source electrode 7 d are electrically connected by a source via 7 f penetrating the semiconductor die 7. Since the maximum current value that can flow from the drain to the source is proportional to the gate width, in a high-power transistor, many drain / source fingers are provided in parallel to increase the gate width. As a result, the semiconductor die 7 has a shape extending elongated along the long side 7b.

  The input matching circuit 6 performs impedance matching between the input lead 4 and the semiconductor die 7. The output matching circuit 8 performs impedance matching between the semiconductor die 7 and the output lead 5. The output matching circuit 8 performs matching so that desired output, efficiency, and frequency characteristics can be obtained.

  FIG. 4 is a plan view showing the semiconductor die 7 and the conductive paste 10. The conductive paste 10 includes, for example, a fine metal powder, and the metal powder is sintered and cured while being connected to each other. The conductive paste 10 contains silver, copper, nickel, aluminum, palladium, zinc or tin powder (diameter 1 nm or more and 200 nm or less) or an alloy thereof in a solvent.

  That is, the conductive paste 10 is composed of, for example, a liquid containing the above metal powder and a solvent such as a resin. The solvent or the like of the conductive paste 10 volatilizes in a relatively low temperature environment such as 150 ° C. or higher and 350 ° C. or lower, thereby solidifying the metal powder of the conductive paste 10. At this time, since the powders are bonded to each other, the sintered body of the conductive paste 10 has many holes.

  The semiconductor die 7 is fixed on the base 3 by interposing the conductive paste 10 with the base 3. The base 3 has a first region 3a corresponding to the short side 7a of the semiconductor die 7 and a second region 3b corresponding to a region including the center of the pair of long sides 7b. The conductive paste 10 protrudes from the first region 3a in the width direction of the semiconductor die 7 (direction parallel to the short side 7a), and the conductive paste 10 protrudes from the first region 3a (short side 7a). The amount L2 is 10% or more and 50% or less of the length L1 of the short side 7a.

  Conventionally, unlike the shape of the conductive paste 10 of the present embodiment, the conductive paste is applied linearly so as to extend to the long side 7 b of the semiconductor die 7. When the semiconductor die 7 is placed on the conductive paste applied by this method, and the semiconductor die 7 is pressed against the conductive paste until the conductive paste reaches a specified thickness, the conductive paste becomes the semiconductor die 7 and the base 3. It is crushed between and expanded.

  At this time, since the conductive paste is linear along the long side 7b, the conductive paste is more likely to spread in the longitudinal direction of the semiconductor die 7 than in the width direction of the semiconductor die 7. Therefore, although the longitudinal direction easily spreads over the entire longitudinal direction, the short side direction is limited by the spreading length, and therefore, the side surface of the short side 7a is scooped up by surface tension to form a fillet. .

  As described above, since the thickness of the semiconductor die 7 is as thin as 50 μm or more and 200 μm or less, the conductive paste scoops up the semiconductor die 7, and when the amount of the conductive paste is large, the surface of the semiconductor die 7 becomes conductive. The paste may spread. The conductive paste climbing up the semiconductor die 7 is set to the GND potential, while a high voltage is applied to the drain electrode 7h, so that a high electric field is formed between the drain electrode 7h and the conductive paste. Migration can occur.

  On the other hand, when the application amount of the conductive paste is reduced, the conductive paste does not spread uniformly on the back surface of the semiconductor die 7, and a gap is formed between the semiconductor die 7 and the base 3. If this gap is formed directly under the drain or source finger of the semiconductor die 7, the heat dissipation characteristics of the finger portion are hindered. Therefore, the amount of the conductive paste applied is generally sufficient so that the gap is not formed.

  When the conductive paste is applied in conformity with the planar shape of the semiconductor die 7, the conductive paste scoops up the side surface of the semiconductor die 7 from the short side 7a as described above. On the other hand, when the conductive paste is applied wider than the width of the semiconductor die 7, the creeping can be suppressed. However, there is a concern that the enlargement of the housing 2 may be caused if the conductive paste application area is widened.

  Therefore, in the application of the conductive paste 10 of the present embodiment, the conductive paste 10 applied to the first region 3a including the short side 7a of the semiconductor die 7 is made longer in the width direction of the semiconductor die 7 than the short side 7a. ing. Thus, when the semiconductor die 7 is mounted, the conductive paste 10 in the vicinity of the short side 7a can easily flow along the short side 7a in parallel with the short side 7a. It is possible to suppress crawling. Therefore, since the conductive paste 10 is not close to the electrode on the semiconductor die 7, ion migration can be prevented.

  Next, a procedure for applying the conductive paste 10 on the base 3 will be described. First, a case where the conductive paste 10 is applied from an air dispenser or a screw dispenser will be described as means for applying the conductive paste 10.

  The temperature of the conductive paste 10, the temperature of the base 3, and the temperature of the semiconductor die 7 when applied are, for example, 25 ± 5 ° C. (room temperature). When a screw dispenser is used for applying the conductive paste 10, the conductive paste 10 having a viscosity of 20 Pa · s to 30 Pa · s is applied at a pressure of 10 kPa to 100 kPa.

  The inner diameter of the nozzle of the dispenser and the width of the coating line of the conductive paste 10 are, for example, not less than 0.5 mm and not more than 2.0 mm. The coating amount of the conductive paste 10 is adjusted to an amount that provides a thickness of 10 μm or more and 50 μm or less after the semiconductor die 7 is mounted on the conductive paste 10 and the conductive paste 10 is cured.

  As shown in FIG. 5A, a conductive paste 10 is applied to one first region 3a of the base 3 along one short side 7a of the semiconductor die 7 (the first region is conductive). Step of applying paste, step of applying sintered conductive paste). At this time, application is performed at a stretch from one end 3c to the other end 3d of the first region 3a (step of applying from one end to the other end of the first region). In addition, the coating length of the conductive paste 10 is made longer than that of the first region 3a, and the conductive paste 10 protrudes from both ends of the first region 3a in the range of 10% to 50%.

  As shown in FIG. 5B, after applying the conductive paste 10 to one first region 3a, the application of the conductive paste 10 is stopped and the tip of the dispenser nozzle is moved to the first first region 3a. It moves to the central part C1 of the region 3a. Then, as shown in FIG. 5C, the conductive paste 10 is applied from the central portion C1 along the second region 3b (step of applying the conductive paste to the second region). The width B of this application is narrower than the width of the semiconductor die 7.

  As shown in FIGS. 5C and 5D, application is stopped halfway before reaching the other first region 3a (step of stopping). That is, the uncoated area Z of the conductive paste 10 is formed in the second area 3b. After stopping the application, the tip of the dispenser nozzle is moved to the other first region 3a, and the conductive paste 10 is applied to the other first region 3a.

  At this time, as described above, coating is performed at a stretch from one end 3e to the other end 3f of the region 3a (step of coating from one end to the other end). Further, the coating length of the conductive paste 10 is set longer than that of the first region 3a, and the conductive paste 10 protrudes from both ends of the first region 3a in a range of 10% to 50%.

  As shown in FIG. 5E, after applying the conductive paste 10 to the other first region 3a, the application of the conductive paste 10 is stopped, and the tip of the dispenser nozzle is moved to the other first region 3a. Move to the center C2. And as shown in FIG.5 (f), the electrically conductive paste 10 is apply | coated to the unapplied area | region Z of the 2nd area | region 3b from the center part C2 (application | coating process to the stop position).

  After the application of the conductive paste 10 to the unapplied region Z is completed, the application is stopped and the excess paste is cut. Then, the semiconductor die 7 is mounted on the conductive paste 10 with the short side 7a aligned with the first region 3a and the long side 7b aligned with the second region 3b (step of mounting the semiconductor die).

  By applying the conductive paste 10 as described above, the portion where the conductive paste 10 is applied, that is, the portion where the conductive paste 10 is applied twice can be reduced. Therefore, the shape of the applied conductive paste 10 can be stabilized. In addition, the shape of the conductive paste 10 applied to the base 3 is bilaterally symmetric, which can suppress the inclination of the semiconductor die 7 when the semiconductor die 7 is mounted. That is, each of the short side central portions C1 and C2 is a central portion where the conductive paste 10 is applied all at once, and is applied when the conductive paste 10 is applied toward the opposite central portions C2 and C1. This is the starting point. Therefore, the application state of the conductive paste 10 in the central portions C1 and C2 can be made the same.

  Next, a method for applying the conductive paste 10 according to the modification will be described with reference to FIGS. 6 (a) to 6 (d). FIGS. 6A to 6D show a method of applying the conductive paste 10 in a granular manner using a jet dispenser. When the conductive paste 10 is applied by a jet dispenser, the planar shape of the applied conductive paste 10 is a continuous shape of the circular conductive paste 10.

  First, as shown in FIG. 6A, the conductive paste 10 is sequentially applied to one first region 3 a of the base 3. Then, the application of the conductive paste 10 is stopped, and the tip of the nozzle is moved to the central portion C1 of the region 3a. As shown in FIG. 6 (b), the conductive property is transferred from the central portion C1 along the second region 3b. The paste 10 is applied.

  After the conductive paste 10 is applied along the second region 3b and reaches the other first region 3a, the application of the conductive paste 10 is stopped and the nozzle tip is moved to the other first region 3a. Move to the end of the. Then, as shown in FIG. 6C, the conductive paste 10 is applied to the other first region 3a. As shown in FIG. 6D, after the application of the conductive paste 10, the circular conductive paste 10 gradually spreads and becomes integrated with the adjacent conductive paste 10. Then, the applied conductive paste 10 has a wave shape at the outer edge.

  As described above, when the conductive paste 10 is applied by the jet dispenser, the granular conductive paste 10 is dropped and the conductive paste 10 is applied, so that the order of application can be eliminated. That is, when a jet dispenser is used, the order of application of the conductive paste 10 is not limited to the order shown in FIGS. 6A to 6D and can be changed as appropriate.

  As described above, even when the conductive paste 10 is applied by the jet dispenser, the conductive paste 10 applied to the first region 3a can be made longer in the width direction of the semiconductor die 7 than the short side 7a. it can. Therefore, it is possible to prevent the conductive paste 10 from scooping up the side surface of the semiconductor die 7, and thus ion migration can be prevented.

  After the conductive paste 10 is applied and the semiconductor die 7 is mounted, the conductive die 10 is heat-treated at 150 ° C. or higher and 350 ° C. or lower (specifically 250 ° C.) for about 1 hour in the air or nitrogen atmosphere. The paste 10 is solidified. The solidified conductive paste 10 becomes a porous metal having a large number of pores. The size of the holes is, for example, not less than 1 μm and not more than 10 μm, and is approximately the same as the diameter of the metal powder contained in the conductive paste 10 before sintering.

  As shown in FIG. 7, in this embodiment, the liquid metal material 11 is impregnated in the pores of the porous metal of the conductive paste 10 (step of impregnating the organic material). The organic material 11 covers the porous metal exposed from the base 3 and the semiconductor die 7. The organic material 11 is, for example, a solvent volatilization type curable resin.

  For example, when the organic material 11 is exposed to an environment at a temperature of 80 ° C. or higher and 120 ° C. or lower for about 1 hour, the solvent contained therein is volatilized and cured. Such solvent volatilization type curable resins are, for example, nitrile rubber adhesives or cyclic polyolefin resins. When the organic material 11 is a solvent volatilization type curable resin, the surface portion 11a of the organic material 11 is cured because the solvent is volatilized, but the inside 11b of the organic material 11 is maintained in a liquid state because it is not volatilized.

  By maintaining the inside 11b of the organic material 11 impregnated in the pores of the porous metal material in a liquid state, the liquid part absorbs the stress caused by the difference in thermal expansion coefficient between the base 3 and the semiconductor die 7. Is possible. Therefore, it is possible to avoid a situation in which the joining interface or the like is broken by the thermal cycle. Further, the thermal conductivity can be increased by the presence of the organic material 11. Furthermore, since the surface portion 11a of the organic material 11 is cured, the bonding strength by the conductive paste 10 can be increased.

  The organic material 11 may be a moisture curable resin. The moisture curable resin is a resin that is cured by being exposed to the atmosphere in a liquid state and reacting with moisture in the atmosphere. The moisture curable resin is, for example, a cyanoacrylate resin or a silicone rubber resin. The moisture curable resin existing on the surface side of the porous metal material is cured by reacting with moisture in the atmosphere, but the moisture curable resin existing on the inner side is kept in a liquid state because it does not react with moisture.

  Even if the organic material 11 is a moisture curable resin, the internal portion 11b of the organic material 11 is maintained in a liquid state, so that the liquid portion generates a stress caused by a difference in thermal conductivity between the base 3 and the semiconductor die 7. Absorb. Even if the organic material 11 is a moisture-type curable resin, the same effect as described above can be obtained.

  The organic material 11 may be an ultraviolet curable resin. The ultraviolet curable resin is a resin that cures when irradiated with ultraviolet rays. The ultraviolet curable resin is, for example, an acrylic resin or an epoxy resin. After the porous organic material 11 is impregnated with the liquid organic material 11, the organic material 11 is irradiated with ultraviolet rays.

  By this ultraviolet irradiation, the surface portion 11a of the organic material 11 is exposed to ultraviolet rays and hardens, but since the ultraviolet rays do not reach the inside 11b of the organic material 11, the resin in the portion not exposed to the ultraviolet rays is not cured. Maintained in liquid form. Therefore, even if the organic material 11 is an ultraviolet curable resin, the same effect as described above can be obtained.

  The procedure for die-bonding the semiconductor die 7 on the base 3 has been described above. The die-bonding is performed for all elements mounted inside the housing 2, such as the input matching circuit 6, the output matching circuit 8, and the output capacitor 9. To do. Then, wire bonding between the elements, the input lead 4 and the output lead 5 is performed.

  FIG. 8 shows the electrical connection between the bonding wire W and the element obtained by wire bonding. In the semiconductor module 1 of the present embodiment, about 70 bonding wires W are connected between the input lead 4 and the input matching circuit 6, and about 16 bonding wires W are connected between the input matching circuit 6 and the semiconductor die 7. About 100 bonding wires W are connected between the semiconductor die 7 and the output matching circuit 8, and about 30 bonding wires W are connected between the output matching circuit 8 and the output capacitor 9. And about 30 bonding wires W are connected between the output leads 5. In FIG. 8 to FIG. 12, each element is omitted as appropriate in order to simplify the illustration.

  In the semiconductor module for high frequency, the physical shape of the wire W is important. The end position, height, length, and bending shape of the wire W are closely related to impedance matching, and when the wire W is deformed by vibration or impact, the deviation from the design impedance value becomes large, and the desired value Characteristics cannot be obtained. The semiconductor module 1 of the present embodiment has a configuration capable of suppressing the deformation of the wire W.

  In the semiconductor module 1, the lower part of each bonding wire W is protected by the solidified resin R. Since the solidified resin R mechanically protects the bonding wire W and the connection portion between the bonding wire W and each element, the connection reliability can be improved. Furthermore, when the solidified resin R has moisture resistance, corrosion of the bonding wire W can be suppressed.

  The solidified resin R is, for example, a solvent volatile resin or a thermosetting resin. The solidified resin R contains 60% or more of a volatile component (organic solvent) and 10% or more and 40% or less of a curing component. The viscosity of the solidified resin R is 1 mPa · s or more and 100 mPa · s or less. Generally, oil (lubricant) has a viscosity of about 60 mPa · S, ethanol has a viscosity of about 1 mPa · S, and water has a viscosity of about 0.9 mPa · S. And it is in a sufficiently smooth state.

  The bonding wire W includes a first bonding wire W1 that connects the first electrode of the semiconductor die 7 and the input matching circuit 6, and a second bonding wire that connects the second electrode of the semiconductor die 7 and the output matching circuit 8. Includes W2. The solidified resin R includes a first solidified resin R1 that contacts the first bonding wire W1 and a second solidified resin R2 that contacts the second bonding wire W2.

  The solidified resin R exists only under the bonding wires W and does not straddle the bonding wires W. By this solidified resin R, each bonding wire W is physically protected, and deformation of the wire W due to vibration or impact can be suppressed.

  Since the solidified resin R exists only under the bonding wire W, the influence on the high frequency performance can be reduced. That is, when the resin exists in the entire cavity S that is the space surrounded by the base 3 and the side wall 2c, the resin exists in the entire periphery of the plurality of bonding wires W. The influence on the transmission characteristics of the signal is increased. On the other hand, in this embodiment, since the solidified resin R exists only directly under each bonding wire W, the influence on the transmission characteristics is extremely limited.

  Next, a method for forming the solidified resin R immediately below the bonding wire W will be described. First, as shown in FIG. 9, each element such as the input matching circuit 6, the semiconductor die 7, and the output matching circuit 8 is mounted in the element mounting region A in the cavity S (step of mounting elements), and then each element. Are connected by bonding wires W (step of performing wire bonding). Then, as shown in FIG. 10, the liquid solidified resin R is filled into the cavity S surrounded by the side wall 2 c and the base 3 of the housing 2.

  By filling the cavity S with the solidified resin R, the solidified resin R is concentrated on the bonding wires W by capillary action, and reaches the corners and gaps of the cavity S. And as shown in FIG. 11, the volatile component of the solidification resin R is volatilized. When the solidified resin R is a solvent volatilization type resin, for example, it is left at room temperature to vaporize volatile components.

  When the solidified resin R is a thermosetting resin, heat treatment is performed to promote volatilization. As the volatilization proceeds, the viscosity of the solidified resin R increases, and as a result, as shown in FIG. 12, the solidified resin R remains only directly below each bonding wire W, resulting in a solidified resin R solidified resin film (solidified resin Forming step).

  FIG. 13 shows a cross section of the bonding wire W and the solidified resin R immediately below the bonding wire W. As shown in FIG. 13, the solidified resin R covers the bonding wire W thinly and extends from the lower part of the bonding wire W toward the base 3. The thickness t of the solidified resin R extending from the bonding wire W is smaller than the diameter D of the bonding wire W. As described above, since the thickness t of the solidified resin R is thin, it is possible to reduce the influence on the transmission characteristics while holding the bonding wire W with the solidified resin R.

  As mentioned above, although embodiment of the manufacturing method of a semiconductor module and a semiconductor module was described, this invention is not limited to embodiment mentioned above. That is, it is easily recognized by those skilled in the art that various modifications and changes can be made within the scope of the present invention described in the claims. For example, in the above-described embodiment, the organic material 11 and the solidified resin R have been described. However, the material of the organic material 11 and the material of the solidified resin R may be the same or different from each other.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor module, 2 ... Housing, 2a ... Front wall, 2b ... Rear wall, 2c ... Side wall, 3 ... Base, 3a ... 1st area | region, 3b ... 2nd area | region, 3c, 3e ... One end, 3d, 3f ... the other end, 4 ... input lead, 5 ... output lead, 6 ... input matching circuit, 7 ... semiconductor die, 7a ... short side, 7b ... long side, 7c ... substrate, 7d ... source electrode, 7e ... gate electrode, 7f ... Source via, 7g ... active region, 7h ... drain electrode, 8 ... output matching circuit, 9 ... output capacitor, 10 ... conductive paste, 11 ... organic material, A ... element mounting region, B ... width, C1, C2 ... center Part, D ... diameter, R ... solidified resin, R1 ... first solidified resin, R2 ... second solidified resin, S ... cavity, U1, U2 ... unit, W ... bonding wire, W1 ... first bonding wire, W2: Second bonding wire.

Claims (6)

A semiconductor chip;
A bonding wire connected to the electrode of the semiconductor chip;
Solidified resin that comes into contact with the bonding wire directly under the bonding wire;
A semiconductor module comprising: The thickness of the solidified resin extending from the bonding wire is smaller than the diameter of the bonding wire,
The semiconductor module according to claim 1. Furthermore, at least one of an input matching circuit mounted on the input side of the semiconductor chip and an output matching circuit mounted on the output side of the semiconductor chip,
The bonding wire includes a first bonding wire that connects the first electrode of the semiconductor chip and the input matching circuit, and a second bonding wire that connects the second electrode of the semiconductor chip and the output matching circuit. Including,
The solidified resin includes a first solidified resin that contacts the first bonding wire, and a second solidified resin that contacts the second bonding wire.
The semiconductor module according to claim 1 or 2. A base on which the semiconductor chip is mounted;
The solidified resin is interposed between the bonding wire and the base;
The semiconductor module as described in any one of Claims 1-3. A method of manufacturing a semiconductor module, comprising: a base; and a housing having a side wall disposed on the base and defining an element mounting region between the base and the base.
Mounting an element in the element mounting area;
Applying wire bonding to the element;
Filling the element mounting region with a solidified resin having a viscosity of 1 mPa · s to 100 mPa · s;
Forming a solidified resin directly below the bonding wire obtained by the wire bonding and between the base and the bonding wire;
A method for manufacturing a semiconductor module comprising: The solidified resin contains 60% or more of volatile components and 10% or more and 40% or less of curing components,
In the step of forming the solidified resin, the solidified resin is formed by vaporizing the volatile component in an environment of a temperature of 80 ° C. or higher and 120 ° C. or lower.
The manufacturing method of the semiconductor module as described in any one of Claims 1-5.

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