JP2018190612A - DC blocking device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To block a DC current even when the system voltage is high, in a DC blocking device.SOLUTION: A mechanical circuit breaker CB is connected between the + terminal of a first DC system 1 and the + terminal of a second DC system 2. A capacitor Ca is connected between the common connection point of the + terminal of the first DC system 1 and the mechanical circuit breaker CB, and the - terminal of the first DC system 1. One end of a buffer reactor Lz is connected to the common connection point of the mechanical circuit breaker CB and the second DC system 2. One or more than one chopper cells C are connected between the other end of the buffer reactor Lz and the common connection point of the - terminal of the first DC system 1 and the - terminal of the second DC system 2.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a DC circuit breaker using a modular multilevel cascade converter (MMCC).

  2. Description of the Related Art Conventionally, a DC interrupting device that interrupts a DC current is known. Since the direct current does not generate a zero point unlike the alternating current, there is a problem that the arc generated when the mechanical circuit breaker is opened cannot be extinguished. Therefore, a method of creating a zero point of the current by diverting the current when the mechanical circuit breaker is opened to the auxiliary circuit and extinguishing the arc can be considered.

  However, in the method in which the current at the time of opening the mechanical circuit breaker is bypassed to the auxiliary circuit, a voltage equal to or higher than the system voltage is applied to the elements of the auxiliary circuit when a large current is interrupted, such as when a short circuit accident occurs. The

  When the system voltage is as high as 10 kV or higher, it is necessary to use a high withstand voltage capacitor or diode or to increase the withstand voltage by connecting a plurality of capacitors in series, which increases the number of parts and cost. When a series connection is selected, an additional circuit that equalizes the voltage sharing of each element is required.

  Further, if the impedance of the auxiliary circuit increases due to the series connection of the elements, the effect of diverting the current is reduced, and as a result, the possibility of failing to interrupt the current without generating a current zero point in the mechanical circuit breaker increases.

  There is a modular multilevel cascade converter (MMCC) as a power conversion circuit that can be directly connected to a high voltage system without using a transformer. The feature of this circuit is that an arm is formed by modules in which chopper cells C and bridge cells B shown in FIGS. 2 (a) and 2 (b) are connected in cascade, and a higher voltage can be handled by increasing the number of connected cells. it can. Patent Document 1 is disclosed as an example in which MMCC is applied to a DC interrupter.

Japanese Patent Application Laid-Open No. 2006-149213 JP 2011-182517 A

  In the configuration of Patent Document 1, since the primary winding of the single-phase transformer is in the current path, there is a problem that current continues to flow through the primary winding even during normal operation, and copper loss of the single-phase transformer occurs. Further, when the current is not constant, the iron loss of the single-phase transformer also occurs according to the time change of the current. For this reason, the steady loss of the DC interrupter does not become zero.

  Further, the primary winding has an effect of limiting the current increase rate. However, since a large current flows when a short circuit occurs, it is necessary to increase the cross-sectional area of the iron core in order to prevent magnetic saturation of the transformer, and there is a problem that the weight increases.

  As described above, in the DC interrupting device, it becomes a problem to interrupt the DC current even when the system voltage is high.

  The present invention has been devised in view of the conventional problems, and one aspect thereof is a mechanical circuit breaker connected between the + terminal of the first DC system and the + terminal of the second DC system, A capacitor connected between a common terminal of the first DC system and the mechanical circuit breaker, and a negative terminal of the first DC system; a mechanical terminal and the second terminal of the second DC system And a chopper cell connected in series between the common connection point of the first DC system and the common connection point of the second terminal of the second DC system, or a plurality of series connected chopper cells, and in series with the chopper cell. A buffer reactor, and the chopper cell includes a first switching device having one end connected to one connection terminal, and a second switching connected between the one connection terminal and the other connection terminal. A device and the first switch Characterized in that and a first cell capacitor connected between the other end of the quenching device and the other connection terminal.

  As another aspect, a mechanical circuit breaker connected between the-terminal of the first DC system and the-terminal of the second DC system, and a common connection of the-terminal of the first DC system and the mechanical circuit breaker A capacitor connected between a point and a positive terminal of the first DC system, a common connection point of the mechanical circuit breaker and a negative terminal of the second DC system, a positive terminal of the first DC system, and the One chopper cell connected between the common connection points of the + terminals of the second DC system, or a plurality of chopper cells connected in series, and a buffer reactor connected in series to the chopper cell, the chopper cell, A first switching device having one end connected to a connection terminal; a second switching device connected between the one connection terminal and the other connection terminal; and the other end of the first switching device and the other connection. Terminal Characterized in that and a first cell capacitor connected between the.

  Further, as one aspect thereof, the chopper cell includes one or a plurality of bridge cells connected in series, and the bridge cell includes a third switching device having one end connected to one connection terminal; A fourth switching device connected in series to the three switching devices, a fifth switching device connected between the other end of the third switching device and the other connection terminal, and a connection between the fourth switching device and the other A second cell capacitor connected between a common connection point of the sixth switching device connected between the terminal and the third and fifth switching devices and a common connection point of the fourth and sixth switching devices And a non-linear resistance connected in parallel to the second cell capacitor.

  As another aspect, a mechanical circuit breaker connected between the + terminal of the first DC system and the + terminal of the second DC system, and a common connection of the + terminal of the first DC system and the mechanical circuit breaker A capacitor connected between a point and a negative terminal of the first DC system, a common connection point of the mechanical circuit breaker and the positive terminal of the second DC system, a negative terminal of the first DC system, and the A bridge cell connected to a common connection point of the-terminal of the second DC system, or a plurality of bridge cells connected in series; and a buffer reactor connected in series to the bridge cell, the bridge cell comprising: A third switching device having one end connected to one connection terminal, a fourth switching device connected in series to the third switching device, and the other end of the third switching device and the other connection terminal. Close to The fifth switching device, the sixth switching device connected between the fourth switching device and the other connection terminal, the common connection point of the third and fifth switching devices, and the fourth and sixth A second cell capacitor connected between a common connection point of the switching devices, and a non-linear resistance connected in parallel to the second cell capacitor.

  As another aspect, a mechanical circuit breaker connected between the-terminal of the first DC system and the-terminal of the second DC system, and a common connection of the-terminal of the first DC system and the mechanical circuit breaker A capacitor connected between a point and a positive terminal of the first DC system, a common connection point of the mechanical circuit breaker and a negative terminal of the second DC system, a positive terminal of the first DC system, and the A bridge cell connected to a common connection point of the + terminals of the second DC system, or a plurality of bridge cells connected in series; and a buffer reactor connected in series to the bridge cell, the bridge cell comprising: A third switching device having one end connected to one connection terminal, a fourth switching device connected in series to the third switching device, and the other end of the third switching device and the other connection terminal. Close to The fifth switching device, the sixth switching device connected between the fourth switching device and the other connection terminal, the common connection point of the third and fifth switching devices, and the fourth and sixth A second cell capacitor connected between a common connection point of the switching devices, and a non-linear resistance connected in parallel to the second cell capacitor.

  Further, as one aspect thereof, the current control is performed so that the detected value of the cell module current becomes equal to the cell module current command value.

  Further, as one aspect thereof, when a current flows from the first DC system to the second DC system and an accident occurs in the second DC system, the first switching device of the chopper cell is turned ON, When the second switching device is turned off and the mechanical circuit breaker passage current becomes lower than a predetermined value, the mechanical circuit breaker is opened, and current flows from the second DC system to the first DC system, When an accident occurs in the first DC system, the first switching device of the chopper cell is turned OFF, the second switching device is turned ON, and the mechanical circuit breaker passing current becomes lower than a predetermined value. The circuit breaker is opened.

  As another aspect, when a current flows from the first DC system to the second DC system and an accident occurs in the second DC system, the first switching device of the chopper cell is turned ON, When the second switching device is turned off, the third and sixth switching devices of the bridge cell are turned on, the fourth and fifth switching devices are turned off, and the current passing through the mechanical circuit breaker becomes lower than a predetermined value. When the mechanical circuit breaker is opened and a current flows from the second DC system to the first DC system, and an accident occurs in the first DC system, the first switching device of the chopper cell is turned off. The second switching device is turned on, the third and sixth switching devices of the bridge cell are turned off, the fourth and fifth switches ON the Gudebaisu, mechanical breaker pass current, characterized in that opening the mechanical breaker when it becomes lower than a predetermined value.

  As another aspect, when a current flows from the first DC system to the second DC system, and an accident occurs in the second DC system, the third and sixth switching devices of the bridge cell. Is turned on, the fourth and fifth switching devices are turned off, and the mechanical circuit breaker is opened when the current passing through the mechanical circuit breaker becomes lower than a predetermined value. From the second DC system to the first DC system If a fault occurs in the first DC system, the third and sixth switching devices of the bridge cell are turned off, the fourth and fifth switching devices are turned on, and a mechanical circuit breaker is turned on. The mechanical circuit breaker is opened when the passing current becomes lower than a predetermined value.

  According to the present invention, in a DC interruption device, it is possible to interrupt a DC current even when the system voltage is high.

FIG. 2 is a circuit diagram showing a DC interrupter in Embodiment 1. The circuit diagram which shows a chopper cell and a bridge cell. FIG. 3 is a diagram illustrating a charging operation of the cell capacitor in the first embodiment. FIG. 3 is a diagram showing a decrease in charging current of the cell capacitor in the first embodiment. The figure which shows the interruption | blocking operation | movement at the time of the 2nd DC system short circuit in Embodiment 1. FIG. The figure which shows the interruption | blocking operation | movement at the time of the 1st DC system short circuit in Embodiment 1. FIG. FIG. 5 is a circuit diagram showing a DC interrupter in Embodiment 2. The figure which shows the interruption | blocking operation | movement at the time of the 2nd DC system short circuit in Embodiment 2. FIG. The figure which shows the interruption | blocking operation | movement at the time of the 1st DC system short circuit in Embodiment 2. The figure which shows the simulation conditions at the time of the 2nd DC system short circuit in Embodiment 2. FIG. The figure which shows the simulation result in Embodiment 2. FIG. The figure which shows the simulation conditions at the time of the 1st DC system short circuit in Embodiment 2. FIG. The figure which shows the simulation result in Embodiment 2. FIG. FIG. 5 is a circuit diagram showing a DC interrupter in Embodiment 3. The block diagram which shows the control part of the DC circuit breaker in Embodiment 3. FIG. The figure which shows a carrier triangular wave and starting signal in the case of four cells.

  Hereinafter, Embodiments 1 to 3 of the DC circuit breaker according to the present invention will be described in detail with reference to FIGS.

[Embodiment 1]
FIG. 1 shows a main circuit configuration of the DC interrupter 3 in the first embodiment. As shown in FIG. 1, the DC breaker 3 in Embodiment 1 includes a mechanical breaker CB, a capacitor Ca, a buffer reactor Lz, n chopper cells C, and a current detector 4.

  A mechanical circuit breaker CB is connected between the + terminal of the first DC system 1 and the + terminal of the second DC system 2. A capacitor Ca is connected between the + terminal of the first DC system 1 and the common connection point of the mechanical circuit breaker CB and the-terminal of the first DC system 1.

  One end of the buffer reactor Lz is connected to a common connection point between the mechanical circuit breaker CB and the + terminal of the second DC system 2. Between the other end of the buffer reactor Lz and the common connection point of the negative terminal of the first DC system 1 and the negative terminal of the second DC system 2, one or a plurality of chopper cells C shown in FIG. Cascade connection. Here, the number of chopper cells C is n. The number n of chopper cells C is determined based on the breakdown voltage of the components in the cell and the first system voltage Vdc.

  The first system voltage Vdc is applied to the first DC system 1. In FIG. 1, a DC voltage source 5 and a reactor 6 are shown. The second DC voltage 2 is applied to the second DC system 2. In FIG. 1, a DC voltage source 7 and a reactor 8 are shown, but a load may be used. Further, a current detector 4 for detecting a current Il flowing in the second DC system 2 is provided.

  As shown in FIG. 2A, the chopper cell C includes a first switching device S1 having one end connected to one connection terminal, and a second switching connected between the one connection terminal and the other connection terminal. A device S2; and a cell capacitor Cc connected between the other end of the first switching device S1 and the other connection terminal.

  Each chopper cell C is connected to a voltage detector that detects a capacitor voltage. Let the kth cell capacitor voltage be Vck.

  Hereinafter, the operation of the DC interrupter in Embodiment 1 will be described. First, when normal, the mechanical circuit breaker CB is closed, and the cell capacitor Cc is charged and waits. It is necessary to charge so that the sum of the cell capacitor voltages exceeds the first system voltage Vdc. Now, the cell capacitor voltage average value is set as Vcavg, and Vck≈Vcavg is assumed.

  When (k + 1) Vcavg> Vdc> kVcavg is satisfied, the second switching devices S2 of the n−k chopper cells C are turned ON from the higher cell capacitor voltage. As a result, a voltage of Vdc−kVcavg is applied to the buffer reactor Lz, and the cell module current Iz starts to flow downward (from the positive terminal side to the negative terminal side) in FIG. 1 with a slope represented by the following equation (1). .

  The cell module current Iz charges the cell capacitors Cc of k chopper cells C from the cell capacitor voltage having the lowest value. After a predetermined time has elapsed, the first and second switching devices S1, S2 of all the chopper cells C are turned off. As a result, a voltage of Vdc−nVcavg is applied to the buffer reactor Lz, and the cell module current Iz decreases with a slope expressed by the following equation (2) and becomes zero.

  The current at this time charges the cell capacitors Cc of all the chopper cells C. The above operation is repeated to charge the cell capacitor voltage Vc to a predetermined value.

  By this series of operations, the cell capacitor Cc is charged, and the amount of charge of a cell having a low cell capacitor voltage is increased, so that the cell capacitor voltage Vc of each cell can be equalized.

  3 and 4 show an example where n = 4, that is, four chopper cells. In this example, considering that the cell capacitor voltages Vc1 to Vc4 are charged to Vdc / 3, the current cell capacitor voltage is set to Vc4> Vc3> Vc2> Vc1. At this time, as shown in FIG. 3, the second switching device S2 of the uppermost chopper cell C is turned on. Then, the cell module output voltage becomes Vc1 + Vc2 + Vc3, and the cell module current Iz increases downward (from the positive terminal side to the negative terminal side) with a slope expressed by the following equation (3).

  The cell capacitors Cc1, Cc2, and Cc3 are charged by the cell module current Iz. After a predetermined time has elapsed, the first and second switching devices S1, S2 of all the chopper cells C are turned off. The cell module output voltage becomes Vc1 + Vc2 + Vc3 + Vc4, and the cell module current Iz that has flowed downward decreases with a slope expressed by the following equation (4) and becomes zero.

  The current at this time charges the cell capacitors Cc1 to Cc4 of all the chopper cells. The above operation is repeated to charge the cell capacitor voltages Vc1 to Vc4 to Vdc / 3. When charging is completed, the cell module output voltage becomes the first system voltage Vdc and the buffer reactor Lz applied voltage becomes zero even if the second switching device S2 of any one chopper cell C1 is turned on. Not flowing. Therefore, even if charging is completed, the ON state of the switching device may be kept. In this case, it is not necessary to detect the first system voltage Vdc because it is not necessary to determine the completion of charging. Of course, the first system voltage Vdc may be detected to determine completion of charging, and the switching device may be turned off.

  Next, the operation for interrupting the short-circuit current will be described. A short circuit is detected from the amplitude of the current Il flowing through the second DC system 2 detected by the current detector 4, and the short circuit is detected from the sign of the current Il flowing through the second DC system 2 with the first DC system 1. 2 It detects which of the DC system 2 has occurred.

  When a short circuit occurs in the second DC system 2 and a short circuit current flows from the left (first DC system 1) to the right (second DC system 2), the first switching devices S1 of all the chopper cells C are turned ON. Thereby, a voltage of nVcavg is output from the cell module, a voltage of Vdc−nVcavg is applied to the buffer reactor Lz, and a current flows upward (from the cell module side to the + terminal side).

  A part of this current flows as a charging current to the capacitor Ca connected to the first DC system 1, cancels the short-circuit current passing through the mechanical circuit breaker CB, and creates a zero point of the mechanical circuit breaker passing current Icb. The mechanical circuit breaker CB is opened when the mechanical circuit breaker passage current Icb becomes less than a predetermined value. At this stage, the cell module bears all the short-circuit current of the second DC system 2.

  As a result, the cell capacitor Cc is discharged, and after discharging, the current passes through the antiparallel diode of the second switching device S2. Thereafter, the short-circuit current attenuates and becomes zero due to the system impedance and the diode voltage drop.

  When a short circuit occurs in the first DC system 1 and a short circuit current flows from the right (second DC system 2) to the left (first DC system 1), the second switching devices S2 of all the chopper cells C are turned ON. . As a result, the cell module output voltage becomes zero, the voltage of the second system voltage Vl is applied to the buffer reactor Lz, and a current flows downward (from the + terminal side to the cell module side).

  At this time, a discharge current flows from the capacitor Ca connected to the first DC system 1 through the mechanical circuit breaker CB → the buffer reactor Lz → the cell module. With this discharge current, the short circuit current passing through the mechanical circuit breaker CB is canceled out to make a zero point of the current. The mechanical circuit breaker CB is opened when the mechanical circuit breaker passage current Icb becomes less than a predetermined value.

  At this stage, all the short-circuit current of the first DC system 1 is commutated to the cell module and supplied from the second DC system 2. Thereafter, when the first and second switching devices S1, S2 of all the chopper cells C are turned OFF, the current passes through the antiparallel diode and the cell capacitor Cc of the first switching device S1, and the cell capacitor Cc is charged. When the capacitor voltage is charged to Vdc / n, the current from the second DC system 2 becomes zero.

  It should be noted that there is a time delay from when the mechanical circuit breaker CB receives the opening command until it is actually opened. In this specification, when it is described that the circuit is interrupted or opened, the time when the circuit is actually opened is indicated.

  5 and 6 show an example in the case of four chopper cells C. FIG. Assume that the cell capacitor voltages Vc1 to Vc4 are charged to Vdc / 3. FIG. 5 shows a case where a short-circuit current flows from the left (first DC system 1) to the right (second DC system 2).

  When the first switching devices S1 of all the chopper cells C are turned on, a voltage of 4Vdc / 3 is output from the cell module, and a charging current flows through the capacitor Ca connected to the first DC system 1. With this charging current, the short circuit current passing through the mechanical circuit breaker CB is canceled to create a zero point of the current, and the mechanical circuit breaker CB is opened.

  FIG. 6 shows a case where a short-circuit current flows from the right (second DC system 2) to the left (first DC system 1), and the second switching devices S2 of all the chopper cells C are turned ON. As a result, the cell module output voltage becomes zero, and a discharge current flows from the capacitor Ca connected to the first DC system 1. With this discharge current, the short circuit current passing through the mechanical circuit breaker CB is canceled to create a zero point of the current, and the mechanical circuit breaker CB is opened.

  The position of the buffer reactor Lz does not have to be between the common connection point between the mechanical circuit breaker CB shown in FIG. 1 and the + terminal of the second DC system 2 and the uppermost chopper cell. It may be located between the common connection point between the capacitor Ca and the negative terminal of the second DC system 2 and the lowermost chopper cell, or may be an intermediate position between the chopper cells.

  In addition, the mechanical circuit breaker CB is common to the common connection point of the capacitor Ca and the first terminal of the first DC system 1, the lowermost chopper cell, and the first terminal of the first DC system 1, instead of the position of FIG. You may insert between connection points. In this case, the + terminal of the first DC system 1 and the + terminal of the second DC system 2 are connected.

  As described above, according to the DC interrupting device 3 in the first embodiment, bidirectional current can be interrupted. Compared with Patent Document 1, since only a mechanical circuit breaker CB is connected to a current path in a steady state without connecting a transformer or a reactor, power loss is small.

  In addition, the chopper cell C requires the buffer reactor Lz, but the inductance may be small (the response speed is necessary, and thus it must be small). In addition, since the gate operation of the cell module at the time of current interruption is performed by feedforward, high-speed interruption is possible.

  Further, according to the first embodiment, even when the system voltage is high, it can be coped with by increasing the number of cells. Further, if the number of cells is increased, the withstand voltage of components used in the cells can be lowered.

  Further, since the cell capacitor voltage Vc operates so as to be equal, no additional voltage balance circuit is required. Further, a detector for detecting the cell module current Iz and a detector for detecting the system voltage are unnecessary.

[Embodiment 2]
FIG. 7 shows a main circuit configuration of the DC interrupter 3 in the second embodiment. The second embodiment has a configuration in which one of the chopper cells C of the first embodiment is changed to a bridge cell B.

  In the bridge cell B, as shown in FIG. 2B, one end of the third switching device S3 is connected to one connection terminal. A fourth switching device S4 is connected in series with the third switching device S3. The fifth switching device S5 is connected between the other end of the third switching device S3 and the other connection terminal. The sixth switching device S6 is connected between the fourth switching device S4 and the other connection terminal.

  A cell capacitor Cc is connected between the common connection point of the third and fifth switching devices S3 and S5 and the common connection point of the fourth and sixth switching devices S4 and S6. A non-linear resistance R is connected in parallel to the cell capacitor Cc.

  In the first embodiment, when a short circuit occurs in the first DC system 1, the second switching devices S2 of all the chopper cells C are turned on to set the cell module output voltage to zero. However, in actuality, a voltage drop occurs in the buffer reactor Lz and the first and second switching devices S1 and S2, so that the cell module output voltage does not become zero. In particular, when the short-circuited part is in the immediate vicinity of the mechanical circuit breaker CB, the cell module output voltage becomes larger than the first system voltage Vdc after the short circuit, and the discharge current does not flow from the capacitor Ca, so that the current flows to the mechanical circuit breaker CB There is a risk that the current cannot be cut off without creating a zero.

  In the second embodiment, one of the chopper cells C is replaced with a bridge cell B in order to cope with the above problem. The bridge cell B can output a negative voltage.

  Therefore, when a short circuit occurs in the first DC system 1, the chopper cell C can turn on the second switching device S <b> 2 and output a negative voltage at the bridge cell B to make the cell module output voltage negative. With this cell module output voltage, the capacitor Ca connected to the first DC system 1 is charged in the reverse direction, the short-circuit current passing through the mechanical circuit breaker CB is canceled by the charging current, and the zero point of the current is created. CB can be opened.

  The cell capacitor charging operation and the operation when the second DC system 2 is short-circuited are the same as those in the first embodiment.

  8 and 9 show a short-circuit current interrupting operation according to the second embodiment. FIG. 8 shows a case where a short-circuit current flows from the left (first DC system 1) to the right (second DC system 2).

  When the first switching device S1 of all the chopper cells C is turned on and the third and sixth switching devices S3 and S6 of the bridge cell B are turned on, a voltage of 4 Vdc / 3 is output from the cell module and connected to the first DC system 1 A charging current flows through the capacitor Ca. With this charging current, the short circuit current passing through the mechanical circuit breaker CB is canceled to create a zero point of the current, and the mechanical circuit breaker CB is opened.

  FIG. 9 shows a case where a short-circuit current flows from the right (second DC system 2) to the left (first DC system 1). The second switching devices S2 of all the chopper cells C are turned ON, and the fourth and fourth bridge cells B are turned ON. The fifth switching devices S4 and S5 are turned on. As a result, the cell module output voltage becomes −Vc1 (DC voltage of the bridge cell B), and a discharge current flows from the capacitor Ca connected to the first DC system 1. With this discharge current, the short circuit current passing through the mechanical circuit breaker CB is canceled to create a zero point of the current, and the mechanical circuit breaker CB is opened.

  The simulation which interrupts | blocks a short circuit current with the DC interruption | blocking apparatus 3 of this Embodiment 2 was implemented. FIG. 10 shows simulation conditions when the second DC system 2 is short-circuited.

  The capacitor capacity of each chopper cell C and bridge cell B was 500 uF, and the charging voltage was 500V. When both ends of the load 3Ω resistor are short-circuited at time 0 sec and it is detected that the mechanical circuit breaker passing current Icb exceeds 750 A, an opening command is input to the mechanical circuit breaker CB after a delay of 1.5 ms. However, in order to simulate an arc, the mechanical circuit breaker CB is not opened unless the mechanical circuit breaker passing current Icb becomes zero after the opening command is input.

  A predetermined gate signal (ON / OFF command signal) is input to the cell module at the same timing as the opening command. If the mechanical circuit breaker passage current Icb was zero for 0.1 ms, it was determined that the interruption was completed and only the bridge cell B was turned off.

  FIG. 11 shows the simulation result. Near the time 1.6 ms, the cell module current Iz increases, and the mechanical circuit breaker passing current Icb decreases. When the mechanical circuit breaker passage current Icb reaches zero, the mechanical circuit breaker CB is opened, and the interruption is completed.

  At this time, the cell capacitor voltages Vc1 to Vc4 are discharged by the cell module current Iz and become zero. Thereafter, by turning off the gate signal of the switching device of the bridge cell B, only the cell capacitor Cc1 of the bridge cell B is charged, and the cell module current Iz and the current Il flowing through the second DC system 2 are rapidly attenuated. The capacitor voltage Vc1 of the cell capacitor Cc1 of the bridge cell B does not increase at 1500V because the nonlinear resistor R is turned on. As the non-linear resistance R, a resistance having a predetermined resistance value when the applied voltage is less than 1500 V and having a resistance value substantially zero when the applied voltage is 1500 V or more is selected. The short circuit current is interrupted by the above operation.

  When turning off the gate signal of the bridge cell B, the switching device of the bridge cell B must cut off the current near 3 kA. However, since the cell capacitor voltage Vc1 is zero, zero voltage switching is established, and the switching loss can be kept small. As for the chopper cell C, since the current passes through the antiparallel diode of the second switching device S2, the operation waveform does not change regardless of ON / OFF of the gate signal.

  FIG. 12 shows simulation conditions when the first DC system 1 is short-circuited. The condition is only that the positions of the DC power supply and the load are changed as compared with FIG.

  FIG. 13 shows the simulation result. The flow until the opening of the mechanical circuit breaker CB up to around 1.6 ms is the same as in FIG. 11, and the mechanical circuit breaker passing current Icb can be cut off. However, the sign of the current differs due to the difference in the short-circuit location.

  After time 1.6 ms, only the cell capacitor voltage Vc1 of the bridge cell B is discharged. When the gate signal of the bridge cell B is turned off, zero voltage switching is established. After the gate signal of the bridge cell B is turned off, the cell capacitor Cc1 is charged, and the cell module current Iz and the current Il flowing through the second DC system 2 are attenuated. Charging of the cell capacitor voltage Vc1 of the bridge cell B is stopped at about 1500 V by the non-linear resistance R connected in parallel.

  When the first DC system 1 is short-circuited, the capacitor voltages Vc2 to Vc4 of the chopper cell C are not discharged and maintain 500V. Here, when the gate signal is turned off, a current near 4 kA is cut off at 500 V, so that a large switching loss occurs and the switching device may be thermally damaged. Therefore, it is necessary to turn off the gate signal after the current is attenuated to a level at which it can be safely interrupted.

  In the first embodiment, since there is only the chopper cell C, a large current must be cut off at the capacitor voltage. However, in the second embodiment, since the bridge cell B can cut off a large current at zero voltage, the switching loss of the cell can be reduced.

  According to the second embodiment, the same effects as those of the first embodiment are obtained. In addition, it is possible to more reliably interrupt the short circuit current flowing from the second DC system 2 to the first DC system 1.

  Further, two switching devices may be added to the first embodiment. Further, the load current when the second DC system 2 is short-circuited can be attenuated quickly.

  Further, when the switching device of each cell is turned off when the first DC system 1 is short-circuited, the cell switching loss can be reduced by turning off the bridge cell B first.

  In the second embodiment, one chopper cell C in the first embodiment is replaced with the bridge cell B. However, even if two or more chopper cells C are replaced with the bridge cell B, all the chopper cells C are replaced with the bridge cells B. Also good.

[Embodiment 3]
FIG. 14 shows the main circuit configuration of the third embodiment. In the third embodiment, a current detector 9 and a voltage detector 10 for detecting the cell module current Iz are added to the first embodiment. In FIG. 14, the voltage detector 10 is connected to the first DC system 1 to detect the first system voltage Vdc. However, the voltage detector 10 may be connected to the second DC system 2 to detect the second system voltage Vl. .

  FIG. 15 shows a current control block configuration of the third embodiment. The control block of Embodiment 3 includes a cell module output current command value calculation unit 11, a cell module current control unit 12, an output voltage command value correction unit 13, and a cell capacitor voltage control unit 14.

  The cell module output current command value calculation unit 11 obtains a deviation between the cell capacitor voltage average value Vcavg and the cell capacitor average voltage command value Vc * of each phase in the subtractor 15. The filter 16 removes a sudden change from the deviation and extracts low-frequency pulsations. The amplifier 17 multiplies the output of the filter 16 by a gain Gc, and outputs a current command value for charging the cell capacitor Cc.

  The switch SW1 receives the current command value Ia and the detected value of the current Il flowing through the second DC system 2, and flows into the second DC system 2 when the current command value Ia is normal and when the current is interrupted such as when a short circuit occurs. The detection value of the current Il is output. The current command value Ia is input from the outside, and in addition to being fixed to zero, a value according to the purpose such as system resonance suppression, load leveling, overload assist, etc. may be calculated and input externally.

  The adder 18 adds the output of the switch SW1 to the output of the amplifier 17 and outputs it as a cell module current command value I *.

  In the differentiator 19, the cell module current control unit 12 outputs the difference between the current value of the cell module current command value I * and the value before time Δt. The differentiator 19 inputs a signal to be described later and operates only at the valley portion of the maximum value of the carrier triangular wave for n cells (point A in FIG. 16, that is, the point where the activation signal pulse is present). Δt is the 1 / n period of the carrier triangular wave. FIG. 16 shows an example of a configuration of four cells. Therefore, there are four types of carrier triangular waves.

  The amplifier 20 multiplies the output of the differentiator 19 by a gain G1. The amplifier 21 multiplies the cell module current command value I * by a gain Gr. The adder 22 adds the output of the amplifier 20 and the output of the amplifier 21. The output result of the adder 22 becomes a feedforward term of the voltage command value.

The subtractor 23 calculates a deviation between the cell module current command value I * and the detected value of the cell module current Iz. The amplifier 24 multiplies the output (deviation) of the subtractor 23 by a gain G and outputs a voltage command value. The adder 25 adds the output of the adder 22, the output of the amplifier 24, and 1. The output of the adder 25 becomes the output voltage command value V * of the cell module. The output voltage command value correction unit 13 multiplies the cell capacitor voltage average value Vcavg by the number of cells in the divider 26, and is the reciprocal of the result. 1 / nVcavg is output. The multiplier 27 calculates the product of the output of the divider 26 and the first system voltage Vdc. The output Vdc / nVcavg of the multiplier 27 becomes an amplitude correction coefficient, and the multiplier 28 calculates a product of the output voltage command value V * of the cell capacitor.

  The cell capacitor voltage control unit 14 calculates the deviation between the detected value of the cell capacitor voltage Vc and the cell capacitor voltage average value Vcavg in the subtractor 29. The detected value of the cell capacitor voltage Vc is a signal for n cells (Vc1 to Vcn).

  The amplifier 30 multiplies the deviation between the detected value of the cell capacitor voltage Vc and the average cell capacitor voltage value Vcavg by a gain Gci, and outputs a voltage command value. The code extractor 31 outputs 1 if Iz> 0, −1 if Iz <0, and 0 if Iz = 0.

  The multiplier 32 calculates the product of the output of the amplifier 30 and the code extraction result having the same phase as the control target cell. The output of the multiplier 32 is a correction value for the output voltage command necessary for capacitor voltage control of each cell. In the adder 33, the output of the multiplier 28 and the output of the multiplier 32 are added and output to the PWM modulator 34.

  The carrier triangular wave used in the PWM modulator 34 is generated by PS (phase shift) as follows.

  The carrier triangular wave output from the carrier triangular wave generator 35 delays the phase of the triangular wave by (k−1) π / n with respect to the kth cell by the delay unit 36. The delay unit 36 generates n carrier triangular waves with phases shifted by π / n. In the PWM modulator 34, the kth triangular wave carrier is compared with the kth cell voltage command value, and the obtained gate signal is sent to the kth cell.

  From the carrier triangular wave, the activation signal of the differentiator 19 of the cell module current control unit 12 is generated using the following blocks.

  The maximum value selection unit max selects and outputs the largest value among the n carrier triangular waves output from the delay unit 36. The differentiator 37 differentiates the output of the maximum value selection unit max.

The comparator 38 outputs 1 if the output of the differentiator 37 is positive. The buffer Z ^-1 delays the output of the differentiator 37 by one calculation time. The comparator 39 outputs 1 if the output of the buffer Z ^-1 is negative.

  The AND element 40 outputs 1 if the outputs of the comparators 38 and 39 are both 1. The AND element 40 outputs 1 for one calculation time immediately after the gradient of the maximum value of the carrier triangular wave changes from minus to plus. The output of the AND element 40 is output to the differentiator 19 in the cell module current control unit 12. The differentiator 19 operates only at the valley portion (point A in FIG. 16) of the maximum value of the carrier triangular wave.

  Hereinafter, the operation of the circuit of the third embodiment will be described. When the current is cut off, the extinguished arc may occur again and the interruption may fail. In order to prevent this, in Patent Document 1, current control using a PI amplifier is performed to maintain a zero current of the mechanical circuit breaker for a certain period.

  However, there is a problem that the PI amplifier has a slow response and takes time until the current of the mechanical circuit breaker becomes zero. In the third embodiment, the current control is applied to the first embodiment to prevent the failure of interruption, and the current control amplifier having a quick response is applied to reduce the time required for the interruption.

  First, the deviation between the cell capacitor voltage average value Vcavg and the cell capacitor average voltage command value Vc * is calculated and multiplied by the gain Gc to obtain the cell module current command value I *.

  The gain Gc may be appropriately set to a small value because the standby time is the charge / discharge time as it is and has a sufficient margin.

  As for the filter 16, during the breaking operation, priority is given to zeroing the current of the mechanical breaker CB over charging and discharging the capacitor voltage. For this reason, the filter 16 is used to remove sudden fluctuations in the capacitor voltage during the shut-off operation, and charge / discharge is stopped. Alternatively, if a short circuit occurs without using the filter 16, the gain Gc = 0 may be set.

  During standby, the cell capacitor charging current is output to maintain the capacitor voltage. If necessary, the current command value Ia according to the purpose such as system resonance suppression, load leveling, and overload assist can be input from the outside, and another operation can be performed during standby.

  The cell module current control unit 12 will be described. The cell module current control unit 12 includes a general current control unit and a feedforward term.

  The general current control unit amplifies the deviation between the detected value of the cell module current Iz and the cell module current command value I * with a gain G.

  The feedforward term will be described. In order to make the mechanical circuit breaker passage current Icb zero when a short circuit occurs, high-speed current control is required. Therefore, the voltage required for the desired current output is calculated from the relationship between the voltage and current of the buffer reactor Lz, and the speed is increased by outputting it in feed forward. When the buffer reactor is denoted by Lz and its parasitic resistance is denoted by Rz, the necessary cell module output voltage v and gains Gl and Gr can be obtained by the following equation (5).

  Here, vLz indicates an applied voltage of the buffer reactor Lz. Let v obtained by the above equation (5) be the output voltage command value V * of the cell module.

The cell module current command value I * before a certain time Δt is held by the buffer Z ⁻¹ , and ΔI * is obtained by calculating the difference from the current value. Here, Δt is the minimum unit of the voltage pulse that can be output from the cell module, that is, the 1 / n period of the carrier triangular wave.

  The obtained ΔI * is multiplied by the gain Gl and output as a voltage command value. With the above feedforward compensation, even if the cell module current command value I * changes, the detection value of the cell module current Iz can be made substantially equal to the cell module current command value I * after 1 / n period of the carrier triangular wave. .

  The gain G of the amplifier 24 may be small because the purpose is to correct the deviation between the detected value of the cell module current Iz and the cell module current command value I *. However, this alone attenuates the cell module current Iz due to the buffer reactor Lz and the parasitic resistance of the switching device. Therefore, the gain Gr is applied to the cell module current command value I * to estimate the voltage drop of the parasitic resistance, and the result is added to the output voltage command value V * of the cell module to compensate for the voltage drop of the parasitic resistance and to attenuate the current. Can be prevented.

  The adder 25 adds 1 as a feedforward term. This is equivalent to Vdc in equation (5) by multiplying the subsequent correction coefficient Vdc / nVcavg. When the cell module current command value I * is zero, the cell module output voltage command value V * = 1. At this time, a voltage equal to the first system voltage Vdc is output from the cell module, and the detection value of the cell module current Iz is set to zero. Is to do.

  After the correction coefficient is applied, the cell-specific capacitor voltage control command value is added to the voltage command value. For the cell individual capacitor voltage control, the one disclosed in Patent Document 2 can be applied as it is. The deviation between the detected values of the cell-specific capacitor voltages Vc1 to Vcn and the cell capacitor voltage average value Vcavg is amplified by the gain Gci of the amplifier 30.

  Next, the amplifier output is corrected by the sign of the detection value of the cell module current Iz. For example, if the cell capacitor voltage to be controlled is excessive, the amplifier output is positive, and the detection value of the cell module current Iz is also positive, increasing the target cell output voltage may increase the output active power and discharge the cell capacitor. it can.

  Since the cell output voltage needs to be increased, the cell individual voltage control command value to be added is positive. If the detected value of the cell module current Iz is negative under the same conditions, the effective power input can be reduced and the cell capacitor charge amount can be reduced if the target cell output voltage is reduced. In order to decrease the cell output voltage, the cell individual voltage control command value to be added is negative.

  The k-th cell output voltage command value is expressed by the following equation (6).

  Finally, the corrected voltage command value (output of the adder 33) is compared with the carrier triangular wave to generate a gate command for each cell. Here, the carrier triangular wave is a phase shift system, and the phase is shifted by (k−1) π / n.

  At this time, the maximum value is extracted from all the carrier triangular waves, an activation signal is generated at the valley portion (point A in FIG. 16), and output to the differentiator 19 inside the cell module current control unit 12. Thereby, the differentiator 19 can calculate and output the difference between the cell module current command value I * before Δt and the current cell module current command value I *.

  With the above configuration, when the current command value Ia = 0 at normal times, the cell capacitor can be charged and discharged to stand by, or resonance can be suppressed by inputting an appropriate current command value Ia. When the current is interrupted, such as when a short circuit occurs, the switch SW1 is switched down and the detected value of the cell module current Iz matches the detected value of the current Il flowing through the second DC system 2, so that the current of the mechanical circuit breaker CB is zero The current can be cut off.

  As a difference from Patent Document 1, Patent Document 1 performs current control according to Equation (7), but the differential term used for feedforward is the detected value of the cell module current Iz. Therefore, the differential term does not operate until a current is actually output, causing a delay.

  On the other hand, in the third embodiment, since the command value is used for the differential term, the differential term operates before the current starts to flow, and the cell module can output the necessary voltage, thereby increasing the response speed.

  In the third embodiment, the chopper cell C can be changed to the bridge cell B as in the second embodiment.

  As described above, according to the third embodiment, the same operational effects as those of the first and second embodiments can be obtained.

  In addition, the third embodiment has a faster current control response than Patent Document 1, and the current of the mechanical circuit breaker CB can be made zero in the 1 / n cycle of the carrier triangular wave, thereby enabling high-speed interruption.

  Further, the period during which the current of the mechanical circuit breaker CB becomes zero becomes longer, and the current can be more reliably interrupted. Furthermore, by inputting the current command value Ia separately during normal operation, other functions such as resonance suppression, load leveling, and temporary overload assistance can be provided.

  Although the present invention has been described in detail only for the specific examples described above, it is obvious to those skilled in the art that various changes and modifications are possible within the scope of the technical idea of the present invention. Such variations and modifications are naturally within the scope of the claims.

DESCRIPTION OF SYMBOLS 1 ... 1st DC system 2 ... 2nd DC system 3 ... DC circuit breaker 4 ... Current detector Lz ... Buffer reactor C ... Chopper cell B ... Bridge cell CB ... Mechanical circuit breaker Ca ... Capacitor

Claims (9)

A mechanical circuit breaker connected between the + terminal of the first DC system and the + terminal of the second DC system;
A capacitor connected between a positive terminal of the first DC system and a common connection point of the mechanical circuit breaker, and a negative terminal of the first DC system;
One is connected between a common connection point of the mechanical circuit breaker and the + terminal of the second DC system and a common connection point of the-terminal of the first DC system and the-terminal of the second DC system; or A plurality of chopper cells connected in series;
A buffer reactor connected in series to the chopper cell,
The chopper cell is
A first switching device having one end connected to one connection terminal;
A second switching device connected between the one connection terminal and the other connection terminal;
A first cell capacitor connected between the other end of the first switching device and the other connection terminal;
A direct current circuit breaker comprising: A mechanical circuit breaker connected between the-terminal of the first DC system and the-terminal of the second DC system;
A capacitor connected between a-terminal of the first DC system and a common connection point of the mechanical circuit breaker and a + terminal of the first DC system;
One is connected between the common connection point of the mechanical circuit breaker and the negative terminal of the second DC system, and the common connection point of the positive terminal of the first DC system and the positive terminal of the second DC system, or A plurality of chopper cells connected in series;
A buffer reactor connected in series to the chopper cell,
The chopper cell is
A first switching device having one end connected to one connection terminal;
A second switching device connected between the one connection terminal and the other connection terminal;
A first cell capacitor connected between the other end of the first switching device and the other connection terminal;
A direct current circuit breaker comprising: The chopper cell includes one or a plurality of bridge cells connected in series,
The bridge cell is
A third switching device having one end connected to one connection terminal;
A fourth switching device connected in series to the third switching device;
A fifth switching device connected between the other end of the third switching device and the other connection terminal;
A sixth switching device connected between the fourth switching device and the other connection terminal;
A second cell capacitor connected between a common connection point of the third and fifth switching devices and a common connection point of the fourth and sixth switching devices;
A non-linear resistor connected in parallel to the second cell capacitor;
The direct current circuit breaker according to claim 1 or 2, further comprising: A mechanical circuit breaker connected between the + terminal of the first DC system and the + terminal of the second DC system;
A capacitor connected between a positive terminal of the first DC system and a common connection point of the mechanical circuit breaker, and a negative terminal of the first DC system;
One is connected between a common connection point of the mechanical circuit breaker and the + terminal of the second DC system and a common connection point of the-terminal of the first DC system and the-terminal of the second DC system; or A plurality of bridge cells connected in series;
A buffer reactor connected in series to the bridge cell,
The bridge cell is
A third switching device having one end connected to one connection terminal;
A fourth switching device connected in series to the third switching device;
A fifth switching device connected between the other end of the third switching device and the other connection terminal;
A sixth switching device connected between the fourth switching device and the other connection terminal;
A second cell capacitor connected between a common connection point of the third and fifth switching devices and a common connection point of the fourth and sixth switching devices;
A non-linear resistor connected in parallel to the second cell capacitor;
A direct current circuit breaker comprising: A mechanical circuit breaker connected between the-terminal of the first DC system and the-terminal of the second DC system;
A capacitor connected between a-terminal of the first DC system and a common connection point of the mechanical circuit breaker and a + terminal of the first DC system;
One is connected between the common connection point of the mechanical circuit breaker and the negative terminal of the second DC system, and the common connection point of the positive terminal of the first DC system and the positive terminal of the second DC system, or A plurality of bridge cells connected in series;
A buffer reactor connected in series to the bridge cell,
The bridge cell is
A third switching device having one end connected to one connection terminal;
A fourth switching device connected in series to the third switching device;
A fifth switching device connected between the other end of the third switching device and the other connection terminal;
A sixth switching device connected between the fourth switching device and the other connection terminal;
A second cell capacitor connected between a common connection point of the third and fifth switching devices and a common connection point of the fourth and sixth switching devices;
A non-linear resistor connected in parallel to the second cell capacitor;
A direct current circuit breaker comprising:   6. The DC interrupter according to claim 1, wherein current control is performed so that a detected value of the cell module current is equal to a cell module current command value. When a current flows from the first DC system to the second DC system and an accident occurs in the second DC system, the first switching device of the chopper cell is turned ON and the second switching device is turned OFF. Opening the mechanical circuit breaker when the mechanical circuit breaker passing current is lower than a predetermined value,
When a current flows from the second DC system to the first DC system and an accident occurs in the first DC system, the first switching device of the chopper cell is turned OFF and the second switching device is turned ON. 3. The DC circuit breaker according to claim 1, wherein the mechanical circuit breaker is opened when the mechanical circuit breaker passing current becomes lower than a predetermined value. When a current flows from the first DC system to the second DC system and an accident occurs in the second DC system, the first switching device of the chopper cell is turned ON and the second switching device is turned OFF. The third and sixth switching devices of the bridge cell are turned ON, the fourth and fifth switching devices are turned OFF, and the mechanical circuit breaker is opened when the mechanical circuit breaker passing current becomes lower than a predetermined value. And
When a current flows from the second DC system to the first DC system and an accident occurs in the first DC system, the first switching device of the chopper cell is turned OFF and the second switching device is turned ON. The third and sixth switching devices of the bridge cell are turned OFF, the fourth and fifth switching devices are turned ON, and the mechanical circuit breaker is opened when the mechanical circuit breaker passing current becomes lower than a predetermined value. The direct current circuit breaker according to claim 3, wherein: When a current flows from the first DC system to the second DC system and an accident occurs in the second DC system, the third and sixth switching devices of the bridge cell are turned ON, the fourth, Turn off the fifth switching device, and open the mechanical circuit breaker when the mechanical circuit breaker passing current becomes lower than a predetermined value,
When a current flows from the second DC system to the first DC system and an accident occurs in the first DC system, the third and sixth switching devices of the bridge cell are turned OFF, 6. The DC circuit breaker according to claim 4, wherein the mechanical circuit breaker is opened when the fifth switching device is turned on and the mechanical circuit breaker passing current becomes lower than a predetermined value.

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