JP6480290B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device, and more particularly to a power conversion device including a high power factor converter that converts AC power supplied from an AC power source into DC power.

  A power conversion apparatus having a configuration in which a three-phase bridge type conversion circuit is connected to a three-phase AC power source via a reactor is known as a current following type high power factor converter. For example, Japanese Patent Laid-Open No. 7-59354 (Patent Document 1) discloses a reactor connected in series to an AC power supply line, and a bridge type conversion circuit connected between the reactor output terminal and a pair of DC output terminals. A power conversion device including a capacitor connected between a pair of DC output terminals is disclosed. The bridge type conversion circuit is configured by bridge-connecting six switching elements and connecting a diode in antiparallel to each switching element.

  In the above power converter, on / off of each switching element of the bridge type conversion circuit is controlled so that the DC output voltage output between the pair of DC output terminals matches the DC voltage command value indicating the desired output voltage. To do. At this time, the power factor can be made substantially 1 by controlling the current flowing through the AC power supply line to be approximately sinusoidal and in phase with the voltage of the AC power supply line.

JP-A-7-59354

  In the power converter, a booster circuit is configured by the reactor and the bridge converter circuit. Therefore, the bridge type conversion circuit outputs a DC voltage that is equal to or greater than the amplitude value of the AC input voltage supplied from the AC power supply line. Therefore, in order to obtain a high power factor, it is necessary to set the DC voltage command value to a voltage equal to or higher than the AC input voltage.

  On the other hand, if the DC output voltage is increased by setting the DC voltage command value high, the switching element is turned on / off under a high DC voltage in the bridge type conversion circuit, which increases power loss. Resulting in. As a result, power conversion efficiency is reduced.

  Thus, in order to suppress a decrease in power conversion efficiency while realizing a high power factor, how to set the DC voltage command value is important. However, Patent Document 1 does not mention how to set the DC voltage command value.

  Therefore, a main object of the present invention is to provide a power conversion device capable of realizing a high power factor and high power conversion efficiency.

  According to one aspect of the present invention, a power converter includes a converter that converts AC power supplied from an AC power source into DC power, and DC power supplied from the converter via a DC positive bus and a DC negative bus. An inverter that converts the current into a load and supplies the load to the load, a capacitor connected between the DC positive bus and the DC negative bus, and a control device that controls the converter and the inverter. Based on the amplitude value of the AC input voltage supplied from the AC power supply to the converter and the amplitude value of the AC output voltage supplied from the inverter to the load, the control device outputs between the DC positive bus and the DC negative bus. The reference value generation circuit that generates the reference value of the DC voltage to be generated and the converter so that the voltage at both ends of the capacitor matches the reference value and the current in phase with the phase voltage of the AC power source flows to the input side of the converter. And a converter control unit for controlling.

  According to this invention, the power converter device which has a high power factor and high power conversion efficiency is realizable.

1 is a schematic block diagram showing a main circuit configuration of a power conversion device according to a first embodiment. FIG. 2 is a circuit diagram illustrating in detail the configuration of a converter, an inverter, and a DC voltage converter shown in FIG. 1. It is a block diagram explaining the control part of a converter contained in a control apparatus. FIG. 4 is a functional block diagram of the voltage command generation circuit shown in FIG. 3. It is a figure which shows the structural example of a reference value generation circuit. It is a figure which shows the other structural example of a reference value generation circuit. It is a functional block diagram of a voltage command generation circuit included in the converter control unit of the control device. FIG. 8 is a diagram illustrating a configuration example of a reference value generation circuit illustrated in FIG. 7. FIG. 6 is a circuit diagram illustrating another configuration example of the reference value generation circuit illustrated in FIG. 5. It is the figure which showed typically an example of the time change of the reference value output from the reference value generation circuit shown in FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

[Embodiment 1]
FIG. 1 is a schematic block diagram illustrating a main circuit configuration of the power conversion device 100 according to the first embodiment. The power conversion device 100 is typically applied to an uninterruptible power supply.

  Referring to FIG. 1, power converter 100 includes an input filter 2, a converter 3, an inverter 4, an output filter 5, a DC voltage converter (shown as “DC / DC” in the figure) 7, a control Device 10, DC positive bus 13, DC negative bus 14, capacitor 15, voltage sensors 31, 34, 35, 37, current sensors 32, 36, power failure detection circuit 33, R-phase line RL, An S-phase line SL, a T-phase line TL, a U-phase line UL, a V-phase line VL, and a W-phase line WL are provided.

  The input filter 2 prevents harmonics from flowing out to the commercial AC power source 1. The commercial AC power source 1 is a three-phase AC power source. The input filter 2 is a three-phase LC filter circuit composed of a capacitor 11 (capacitors 11R, 11S, 11T) and a reactor 12 (reactors 12R, 12S, 12T).

  Converter 3 converts three-phase AC power supplied from commercial AC power supply 1 via input filter 2 into DC power. Converter 3 supplies the DC power to inverter 4 via DC positive bus 13 and DC negative bus 14.

  Capacitor 15 is connected between DC positive bus 13 and DC negative bus 14 to smooth the voltage between DC positive bus 13 and DC negative bus 14.

  Inverter 4 converts the DC power supplied from converter 3 into three-phase AC power. AC power from the inverter 4 is supplied to the load 6 through the output filter 5. The output filter 5 removes harmonics generated by the operation of the inverter 4. The output filter 5 is a three-phase LC filter circuit including a reactor 16 (reactors 16U, 16V, 16W) and a capacitor 17 (capacitors 17U, 17V, 17W).

  The DC voltage converter 7 converts the voltage of the storage battery 8 into a DC voltage between the DC positive bus 13 and the DC negative bus 14. The DC voltage converter 7 may be configured to mutually convert the DC voltage between the DC positive bus 13 and the DC negative bus 14 and the voltage of the storage battery 8. The DC voltage converter 7 only needs to be connected to a chargeable / dischargeable power storage device. For example, an electric double layer capacitor may be connected to the DC voltage converter 7. Furthermore, in this Embodiment, although the storage battery 8 is installed in the exterior of the power converter device 100 (uninterruptible power supply device), the storage battery 8 may be incorporated in the power converter device 100.

  The voltage sensor 31 detects the voltage VR of the R-phase line RL, the voltage VS of the S-phase line SL, and the voltage VT of the T-phase line, and detects a three-phase voltage signal indicating the voltages VR, VS, and VT, and the power failure detection. Output to the circuit 33.

  The current sensor 32 detects the current IR of the R-phase line RL, the current IS of the S-phase line SL, and the current IT of the T-phase line TL, and outputs a three-phase current signal indicating the currents IR, IS, and IT to the control device 10. To do. The voltage sensor 37 detects the voltage VU of the U-phase line UL, the voltage VV of the V-phase line VL, and the voltage VW of the W-phase line, and outputs a three-phase voltage signal indicating the voltages VU, VV, and VW to the control device 10. .

  The power failure detection circuit 33 detects a power failure of the commercial AC power supply 1 based on the three-phase voltage signal from the voltage sensor 31. The power failure detection circuit 33 outputs a power failure signal indicating a power failure of the commercial AC power supply 1 to the control device 10.

  The voltage sensor 34 detects the voltage Vdc across the capacitor 15 and outputs a signal indicating the voltage Vdc to the control device 10. The voltage sensor 35 detects the voltage VB between the positive and negative electrodes of the storage battery 8 and outputs a signal indicating the voltage VB to the control device 10. Current sensor 36 detects current IB output from storage battery 8 and outputs a signal indicating current IB to control device 10.

  Control device 10 controls operations of converter 3, inverter 4, and DC voltage converter 7. Specifically, the control device 10 detects whether or not a power failure has occurred in the commercial AC power supply 1 based on a power failure signal from the power failure detection circuit 33, and synchronizes with the phases of the voltages VR, VS, and VT. The converter 3 and the inverter 4 are controlled.

  As will be described in detail later, converter 3, inverter 4 and DC voltage converter 7 are constituted by semiconductor switches including semiconductor switching elements. In the present embodiment, an IGBT (Insulated Gate Bipolar Transistor) is used as the semiconductor switching element.

  Control device 10 turns on and off the semiconductor switches that constitute converter 3 so that voltage Vdc becomes reference value Vdc *, and voltages VU, VV, and VW become sinusoidal AC voltages without waveform distortion. The semiconductor switching elements constituting the inverter 4 are turned on / off. The amplitudes of the voltages VU, VV, and VW are set to values smaller than the voltage Vdc / 2. Furthermore, control device 10 turns on / off the semiconductor switching element of inverter 4 so that the phases of voltages VU, VV, and VW coincide with the phases of voltages VR, VS, and VT.

  In the present embodiment, PWM (Pulse Width Modulation) control can be applied as a control method of the semiconductor switching element. The control device 10 includes a three-phase voltage signal from the voltage sensor 31, a three-phase current signal from the current sensor 32, a three-phase voltage signal from the voltage sensor 37, a signal indicating the voltage Vdc detected by the voltage sensor 34, and a power failure detection circuit. The PWM control is executed in response to a power failure signal from 33, a signal indicating the voltage VB detected by the voltage sensor 35, a signal indicating the current IB detected by the current sensor 36, and the like.

Next, the operation | movement of the power converter device 100 which concerns on this Embodiment is demonstrated.
When commercial AC power supply 1 can normally supply AC power, converter 3 converts AC power from commercial AC power supply 1 into DC power, and inverter 4 converts the DC power into AC power and supplies load 6. Supply. On the other hand, when commercial AC power supply 1 fails, control device 10 stops converter 3 based on the power failure signal from power failure detection circuit 33. Furthermore, the control device 10 operates the DC voltage converter 7 so that DC power is supplied from the storage battery 8 to the inverter 4 and continues supply of AC power by the inverter 4. In this case, the DC voltage converter 7 converts the voltage of the storage battery 8 into a suitable voltage as the input voltage of the inverter 4. Thereby, AC power can be stably supplied to the load 6.

  FIG. 2 is a circuit diagram illustrating in detail the configuration of converter 3, inverter 4 and DC voltage converter 7 shown in FIG. Referring to FIG. 2, converter 3 includes an R-phase arm 3R, an S-phase arm 3S, and a T-phase arm 3T. Inverter 4 includes a U-phase arm 4U, a V-phase arm 4V, and a W-phase arm 4W.

  Each phase arm (3R, 3S, 3T) of converter 3 and each phase arm (4U, 4V, 4W) of inverter 4 are each configured as a two-level circuit, and include two IGBT elements and two diodes. Specifically, R-phase arm 3R includes IGBT elements Q1R, Q2R and diodes D1R, D2R. S-phase arm 3S includes IGBT elements Q1S, Q2S and diodes D1S, D2S. T-phase arm 3T includes IGBT elements Q1T and Q2T and diodes D1T and D2T. U-phase arm 4U includes IGBT elements Q1U and Q2U and diodes D1U and D2U. V-phase arm 4V includes IGBT elements Q1V and Q2V and diodes D1V and D2V. W-phase arm 4W includes IGBT elements Q1W and Q2W and diodes D1W and D2W.

  In the following, the symbols R, S, T, U, V, and W are collectively denoted as “x” in order to generally describe each phase arm of the converter 3 and each phase arm of the inverter 4. IGBT elements Q1x and Q2x are connected in series between DC positive bus 13 and DC negative bus 14. Diodes D1x and D2x are connected in antiparallel to IGBT elements Q1x and Q2x, respectively.

  In each phase arm (3R, 3S, 3T) of converter 3, the connection point of IGBT elements Q1x, Q2x corresponds to the AC input terminal. The AC input terminal of each phase arm (3R, 3S, 3T) of converter 3 is connected to a corresponding line (R phase line RL, S phase line SL, T phase line TL). On the other hand, in each phase arm (4U, 4V, 4W) of inverter 4, the connection point of IGBT elements Q1x, Q2x corresponds to the AC output terminal. The AC output terminal of each phase arm (4U, 4V, 4W) of inverter 4 is connected to a corresponding line (U phase line UL, V phase line VL, W phase line WL).

  DC voltage converter 7 includes a reactor L1, IGBT elements Q1D and Q2D, and diodes D1D and D2D. IGBT elements Q1D and Q2D are connected in series between DC positive bus 13 and DC negative bus 14. Diodes D1D and D2D are connected in antiparallel to IGBT elements Q1D and Q2D, respectively. One end of reactor L1 is connected to a connection point between IGBT elements Q1D and Q2D. The other end of reactor L 1 is connected to the positive electrode of storage battery 8.

  FIG. 3 is a block diagram illustrating a control unit of converter 3 included in control device 10. Referring to FIG. 3, converter control unit 60 includes a voltage command generation circuit 62 and a PWM circuit 64.

  The voltage command generation circuit 62 includes voltages VR, VS, VT detected by the voltage sensor 31, currents IR, IS, IT detected by the current sensor 32, a voltage Vdc detected by the voltage sensor 32, and a voltage detected by the voltage sensor 37. In response to VU, VV, and VW, voltage command values VR *, VS *, and VT * respectively corresponding to the R phase, the S phase, and the T phase are generated.

  The PWM circuit 64 is used to make the voltages VR, VS, and VT detected by the voltage sensor 31 based on the voltage command values VR *, VS *, and VT * equal to the voltage command values VR *, VS *, and VT *, respectively. Generate a signal. This signal is a signal for driving the IGBT element included in each phase arm of converter 3.

  FIG. 4 is a functional block diagram of voltage command generation circuit 62 shown in FIG. Referring to FIG. 4, voltage command generation circuit 62 includes reference value generation circuit 70, subtracters 71, 75A to 75C, DC voltage control circuit 72, sine wave generation circuit 73, and multipliers 74A to 74C. Current control circuit 76 and adders 77A to 77C.

  The reference value generation circuit 70 receives the voltages VR, VS, VT detected by the voltage sensor 31 and the voltages VU, VV, VW detected by the voltage sensor 37, and generates a reference value Vdc * which is a target value of the voltage Vdc. . The configuration of the reference value generation circuit 70 will be described in detail later.

  The subtractor 71 calculates a difference between the reference value Vdc * and the voltage Vdc detected by the voltage sensor 34. DC voltage control circuit 72 calculates current command value I * for controlling the current flowing to the input side of converter 3 such that the difference between reference value Vdc * and voltage Vdc is zero. DC voltage control circuit 72 calculates voltage command value I * by, for example, performing a proportional operation or a proportional integration operation on the difference between reference value Vdc * and voltage Vdc.

  The sine wave generation circuit 73 has a sine wave signal in phase with the R phase voltage of the commercial AC power supply 1, a sine wave signal in phase with the S phase voltage of the commercial AC power supply 1, and a T phase voltage of the commercial AC power supply 1. A sine wave signal is output. The three sine wave signals are respectively input to the multipliers 74A to 74C and multiplied by the current command value I *. Thereby, current command values IR *, IS *, IT * having the same phase as the phase voltage of the commercial AC power supply 1 are generated.

  The subtractor 75A calculates the difference between the current command value IR * and the R-phase current IR detected by the current sensor 32. The subtractor 75B calculates the difference between the current command value IS * and the S-phase current IS detected by the current sensor 32. The subtractor 75C calculates the difference between the current command value IT * and the T-phase current IT detected by the current sensor 32.

  Current control circuit 76 determines which of the difference between current command value IR * and R phase current IR, the difference between current command value IS * and S phase current IS, and the difference between current command value IT * and T phase current IT. Also, voltage command values VRa *, VSa *, and VTa * are generated as voltages to be applied to the reactor 12 so as to be zero. The current control circuit 76 generates voltage command values VRa *, VSa *, and VTa * by, for example, amplifying the difference between the current command value and the current value detected by the current sensor 32 according to proportional control or proportional-integral control. To do.

  Adder 77A adds voltage command value VRa * and R-phase voltage VR detected by voltage sensor 31 to generate voltage command value VR *. Adder 77B adds voltage command value VSa * and S-phase voltage VS detected by voltage sensor 31 to generate voltage command value VS *. Adder 77C adds voltage command value VTa * and T-phase voltage VT detected by voltage sensor 31 to generate voltage command value VT *.

  The voltage command values VR *, VS *, and VT * are sinusoidal voltages that are equal in amplitude and have a phase difference of 2π / 3. The PWM circuit 64 (FIG. 3) uses voltage command values VR *, VS *, and VT * as signal waves, and uses a common triangular wave signal as a carrier wave. The PWM circuit 64 controls on / off of the IGBT element included in each phase arm of the converter 3 according to the voltage comparison between the signal wave and the carrier wave.

  Since the converter 3 is controlled by the converter control unit 60 having the above-described configuration, the currents IR, IS, and IT become in-phase and sinusoidal currents with the commercial AC power supply 1, so that the power factor can be set to approximately 1. it can. In other words, in order to make the power factor approximately 1, it is preferable to control the currents IR, IS, and IT to a sinusoidal alternating current without waveform distortion.

  As described above, the current command values IR *, IS *, and IT * that are the target values of the currents IR, IS, and IT are sine wave signals in phase with the phase voltage of the commercial AC power supply 1 with respect to the current command value I *. Generated by multiplication. The current command value I * is calculated based on the difference between the reference value Vdc * and the voltage Vdc detected by the voltage sensor 34. Therefore, how to set the reference value Vdc * is important in controlling the currents IR, IS, and IT.

  Here, since the converter 3 is connected to the commercial AC power supply 1 via the reactor 12 of the input filter 2, the converter 3 and the reactor 12 constitute a boost type circuit. Therefore, converter 3 outputs a DC voltage equal to or greater than the amplitude value of the AC input voltage supplied from commercial AC power supply 1 to reactor 12. In the present embodiment, since the commercial AC power supply 1 is a three-phase AC power supply, the AC input voltage supplied from the commercial AC power supply 1 is a line voltage (for example, a difference between two phase voltages of the commercial AC power supply 1). VRS = VR-VS). Therefore, converter 3 outputs a DC voltage equal to or greater than the amplitude value of the input line voltage (VRS, VST, VTR). According to this, it is necessary to set the reference value Vdc *, which is the target value of the output voltage Vdc of the converter 3, to a voltage equal to or higher than the amplitude value of the input line voltage.

  The output voltage Vdc of the capacitor 15 is further converted into an AC voltage having a commercial frequency by the inverter 4. A control unit (not shown) of the inverter 4 included in the control device 10 controls the inverter 4 so that the output voltage of the inverter 4 changes in a sine wave shape. Specifically, the control unit of the inverter 4 determines that the phase of the three-phase voltage (voltages VU, VV, VW) supplied to the load 6 is the three-phase voltage (voltages VR, VS, The inverter 4 is controlled so as to coincide with the phase of (VT).

  For the control of the inverter 4, sine wave PWM control is applied as general PWM control. In the sine wave PWM control, the amplitude of the carrier wave corresponds to 1/2 (= Vdc / 2) of the voltage Vdc across the capacitor 15. The ratio of the amplitude of the fundamental component of the voltage command value to the amplitude of the carrier wave is referred to as “modulation rate”. The modulation rate in inverter 4 is the ratio of the amplitude of voltage command values VU *, VV *, VW * to voltage Vdc / 2.

  By making the amplitude of the carrier wave larger than the amplitudes of the voltage command values VU *, VV *, and VW * corresponding to the U phase, V phase, and W phase, the IGBT element is always turned on / off for each cycle of the carrier wave. As a result, the amplitude of the fundamental component of the phase voltage can be made proportional to the amplitude of the corresponding voltage command value. Thereby, the fundamental wave component of the line voltage (for example, VUV = VU−VV) which is the difference between the two phase voltages also becomes a sine wave. In the sine wave PWM control, the maximum value of the fundamental wave amplitude of the phase voltage that can be output by the inverter 4 is Vdc / 2. Therefore, when converted into the fundamental wave amplitude of the output line voltage, √3 Vdc / 2≈0. 87Vdc.

  Furthermore, the fundamental wave amplitude of the output line voltage is made equal to the voltage Vdc by adopting a method of creating the voltage command values VU *, VV *, and VW * by superimposing the fundamental wave and its third harmonic. It is also possible.

  Thus, the inverter 4 outputs an AC voltage having an amplitude value equal to or less than the input DC voltage Vdc. In the present embodiment, since inverter 4 is a three-phase inverter, the AC output voltage supplied from inverter 4 to load 6 corresponds to the output line voltage (VUV, VVW, VWU) of inverter 4. Therefore, the inverter 4 outputs an output line voltage having an amplitude value equal to or less than the input DC voltage Vdc. According to this, by setting the reference value Vdc * to a voltage equal to or higher than the amplitude value of the output line voltage, the AC output voltage can be changed to a sine wave shape without waveform distortion.

  On the other hand, when the voltage Vdc is increased, the semiconductor switch (IGBT element) is turned on / off under a high DC voltage in each of the converter 3 and the inverter 4, so that the switching loss increases. . Further, by increasing voltage Vdc, the modulation rate in converter 3 and inverter 4 is decreased. When the modulation rate is lowered, harmonic components included in the input current of converter 3 and the output current of inverter 4 increase. Higher-order harmonic components can be almost absorbed by the capacitor 11 of the input filter 2 or the capacitor 17 of the output filter 5, but lower-order harmonic components cannot be sufficiently absorbed if the capacitor capacity is small, and the commercial AC power supply 1 is disturbed. And can increase the loss in the load 6.

  On the other hand, if the voltage Vdc is set low, the modulation rate increases. As a result, the PWM chopper operation under a high DC voltage is avoided, and the harmonic component contained in the PWM control current is reduced, so that the increase in loss described above can be suppressed.

  As described above, the voltage Vdc is required to be not less than the amplitude value of the AC input voltage supplied from the commercial AC power supply 1 and not less than the amplitude value of the AC output voltage supplied to the load 6. However, in order to suppress an increase in loss of the entire power conversion device 100, it is preferable to set the voltage Vdc to a value as low as possible.

  On the other hand, the AC input voltage supplied from the commercial AC power supply 1 and the AC output voltage supplied to the load 6 may fluctuate (increase / decrease) even during normal times. When the AC input voltage supplied from the commercial AC power supply 1 increases and the amplitude value of the AC input voltage becomes higher than the voltage Vdc, the input currents IR, IS, IT of the converter 3 can be controlled in a sine wave shape. As a result, it may be difficult to set the power factor to 1.

  Similarly, when the AC output voltage supplied to the load 6 increases and the amplitude value of the AC output voltage becomes higher than the voltage Vdc, the modulation factor exceeds 1, so that the output voltage of the inverter 4 is sinusoidal. May be difficult to control.

  In order to stably control the converter 3 and the inverter 4 without being affected by fluctuations in the voltage supplied from the commercial AC power supply 1 and the voltage supplied to the load 6, the voltage Vdc is supplied from the commercial AC power supply 1. It can be set to a value obtained by adding a margin corresponding to the fluctuation to the amplitude value of the AC input voltage to be supplied and the AC output voltage supplied to the load 6. However, by setting the voltage Vdc high, the control stability of the converter 3 and the inverter 4 is improved, but the loss of the entire power conversion device 100 is increased as described above.

  Therefore, in power conversion device 100 according to the present embodiment, reference value Vdc *, which is the target value of voltage Vdc, is not fixed, but is detected value of AC input voltage supplied from commercial AC power supply 1 and load 6. It is dynamically set based on the detected value of the supplied AC output voltage. Thereby, it is possible to suppress an increase in the loss of the entire power conversion device 100 while improving the stability of control of the converter 3 and the inverter 4.

  The generation of the reference value Vdc * is executed by the reference value generation circuit 70 (FIG. 3) in the voltage command generation circuit 62. Hereinafter, generation of the reference value Vdc * will be described.

  FIG. 5 is a diagram illustrating a configuration example of the reference value generation circuit 70. Referring to FIG. 5, reference value generation circuit 70 includes three-phase full-wave rectification circuits 80 and 81 and a maximum value selection circuit 84.

  Three-phase full-wave rectifier circuit 80 (first rectifier circuit) receives three-phase voltages VR, VS, and VT detected by voltage sensor 31. For the three-phase full-wave rectifier circuit 80, for example, a bridge rectifier in which six antiparallel diodes are bridge-connected is used. The three-phase full-wave rectifier circuit 80 rectifies the three-phase voltages VR, VS, and VT and converts them into a DC voltage Vdc1. The DC voltage Vdc1 includes an absolute value | VRS | of the line voltage VRS (difference between the voltage VR and the voltage VS), an absolute value | VST | of the line voltage VST (difference between the voltage VS and the voltage VT), and the line It becomes equal to the maximum value of absolute values | VSR | of voltage VSR (difference between voltage VS and voltage VR). The DC voltage Vdc1 includes an amplitude value of an AC input voltage (input line voltages VRS, VST, VTR) supplied from the commercial AC power supply 1. That is, the three-phase full-wave rectifier circuit 80 constitutes detection means for detecting the amplitude value of the AC input voltage.

  Three-phase full-wave rectifier circuit 81 (second rectifier circuit) receives voltages VU, VV, and VW detected by voltage sensor 37. As the three-phase full-wave rectifier circuit 81, for example, a bridge rectifier is used for the three-phase full-wave rectifier circuit 81. The three-phase full-wave rectifier circuit 81 rectifies the three-phase voltages VU, VV, VW and converts them into a DC voltage Vdc2. The DC voltage Vdc2 includes an absolute value | VUV | of the line voltage VUV (difference between the voltage VU and the voltage VV), an absolute value | VVW | of the line voltage VVW (difference between the voltage VV and the voltage VW), and the line It becomes equal to the maximum value of absolute values | VWU | of voltage VWU (difference between voltage VW and voltage VU). The DC voltage Vdc2 includes the peak value of the AC output voltage (output line voltages VUV, VVW, VWU) supplied to the load 6. That is, the three-phase full-wave rectifier circuit 81 constitutes detection means for detecting the amplitude value of the AC output voltage.

  Maximum value selection circuit 84 (selection circuit) selects the larger one of DC voltage Vdc1 converted by three-phase full-wave rectification circuit 80 and DC voltage Vdc2 converted by three-phase full-wave rectification circuit 81. Maximum value selection circuit 84 outputs the selected DC voltage to adder 71 (FIG. 4) as reference value Vdc *.

  The DC voltage Vdc1 output from the three-phase full-wave rectifier circuit 80 is a value reflecting fluctuations in the AC input voltage (input line voltages VRS, VST, VTR) supplied from the commercial AC power supply 1. The DC voltage Vdc2 output from the three-phase full-wave rectifier circuit 81 is a value reflecting fluctuations in the AC output voltage (output line voltages VUV, VVW, VWU) supplied to the load 6. The maximum value selection circuit 84 selects the larger one of the DC voltages Vdc1 and Vdc2 to generate the reference value Vdc *, so that the generated reference value Vdc * varies between the AC input voltage and the AC output voltage. Changes following the amplitude value of the voltage at which becomes the largest.

  With this configuration, for example, when the AC input voltage supplied from the commercial AC power supply 1 fluctuates and the amplitude value increases, the increase in the amplitude value is reflected and the reference value Vdc * is set high. Is done. The voltage Vdc is increased by controlling the input current of the converter 3 so that the difference between the reference value Vdc * and the voltage Vdc becomes zero. As a result, the currents IR, IS, and IT can be controlled to sinusoidal alternating currents, so that the power factor of the converter 3 can be made substantially 1.

  When the AC output voltage supplied to the load 6 fluctuates and the amplitude value increases, the increase in the amplitude value is reflected and the reference value Vdc * is set high. Also in such a case, the voltage Vdc increases by controlling the input current of the converter 3 so that the difference between the reference value Vdc * and the voltage Vdc becomes zero. As a result, it is possible to prevent the modulation factor from exceeding 1 in the sine wave PWM control of the inverter 4. Therefore, it is possible to control the output voltage of the inverter 4 so that it is sinusoidal and in phase with the input voltage of the converter 3.

  As described above, according to the first embodiment, even when the AC input voltage supplied from the commercial AC power supply 1 or the AC output voltage supplied to the load 6 fluctuates, the AC input voltage and the AC output are changed. The reference value Vdc * is dynamically set so as to follow the fluctuation of the voltage amplitude value. Therefore, the voltage Vdc also varies so as to follow the variation of the amplitude values of the AC input voltage and AC output voltage. Thereby, converter 3 and inverter 4 can be controlled stably without being affected by fluctuations in the AC input voltage and AC output voltage. Therefore, as compared with the reference value Vdc * that is fixedly set to a value that has a margin corresponding to the variation of the AC voltage, the loss of the entire power conversion device 100 without deteriorating the stability of the control. Can be reduced. As a result, a power conversion device having a high power factor and high power conversion efficiency can be realized.

[Embodiment 2]
FIG. 6 is a schematic block diagram showing a main circuit configuration of power conversion apparatus 100A according to the second embodiment. Referring to FIG. 6, power conversion device 100A is applied to an uninterruptible power supply. The power converter 100A has the same basic configuration as that of the power converter 100 shown in FIG. 1, except that electromagnetic contactors 18, 21, 22, semiconductor switch 20, and voltage sensor 38 are added. .

  The magnetic contactor 22 has one terminal connected to the AC input terminal T <b> 1 and the other terminal connected to the input node of the input filter 2. The magnetic contactor 22 is controlled by the control device 10A and is turned on when the uninterruptible power supply is used, and is turned off, for example, when the uninterruptible power supply is maintained and inspected. Voltages VR, VS, and VT appearing at a node N1 between the electromagnetic contactor 22 and the input filter 2 are detected by a voltage sensor 31.

  The electromagnetic circuit breaker 18 has one terminal connected to the output node of the output filter 5 and the other terminal connected to the AC output terminal T2. As shown in FIG. 7, the magnetic contactor 18 includes an electromagnetic contactor 18U connected to the U-phase line UL, an electromagnetic contactor 18V connected to the V-phase line VL, and an electromagnetic contactor connected to the W-phase line 19. It is composed of 18W.

  The magnetic contactor 18 is controlled by the control device 10A. The magnetic contactor 18 is turned on in the inverter power supply mode in which the AC power generated by the inverter 4 is supplied to the load 6, and AC power from the commercial AC power source 1 is transferred between the AC input terminal T1 and the AC output terminal T2. It is turned off in the bypass power supply mode in which the load 6 is supplied via the arranged three-phase line 19. Voltages VU, VV, and VW appearing at a node N2 between the output filter 5 and the electromagnetic contactor 18 are detected by a voltage sensor 37.

  The semiconductor switch 20 is connected between the AC input terminal T1 and the AC output terminal T2. The semiconductor switch 20 includes a thyristor and is controlled by the control device 10A. The semiconductor switch 20 is normally turned off, and is turned on for a predetermined time when shifting from the inverter power feeding mode to the bypass power feeding mode.

  The magnetic contactor 21 is connected in parallel to the semiconductor switch 20 and is controlled by the control device 10A. As shown in FIG. 7, the magnetic contactor 21 is connected to an electromagnetic contactor 21U connected to the U-phase line of the three-phase line 19, an electromagnetic contactor 21V connected to the V-phase line, and a W-phase line. It is comprised by the magnetic contactor 21W. The magnetic contactor 21 is turned off in the inverter power supply mode and turned on in the bypass power supply mode. In the following description, the parallel circuit of the semiconductor switch 20 and the electromagnetic contactor 21 is also referred to as a bypass circuit.

  Voltages VU1, VV1, and VW1 appearing at a node N3 between the AC input terminal T1 and the semiconductor switch 20 are detected by a voltage sensor 38. Voltage sensor 38 outputs a three-phase voltage signal indicating voltages VU1, VV1, and VW1 to control device 10A.

  In the example of FIG. 6, the bypass AC power supply used in the bypass power supply mode is the same as the commercial AC power supply 1, but a bypass AC power supply may be provided separately from the commercial AC power supply 1.

  Control device 10 </ b> A controls operations of converter 3, inverter 4, and DC voltage converter 7. Specifically, the control device 10A indicates the three-phase voltage signal from the voltage sensor 31, the three-phase current signal from the current sensor 32, the three-phase voltage signal from the voltage sensor 37, and the voltage Vdc detected by the voltage sensor 34. PWM that receives a signal, a power failure signal from the power failure detection circuit 33, a signal indicating the voltage VB detected by the voltage sensor 35, a signal indicating the current IB detected by the current sensor 36, a three-phase voltage signal from the voltage sensor 38, etc. Execute control.

  Control device 10A includes a converter control unit. The converter control unit has the same basic configuration as the converter control unit 60 shown in FIG. 3, but is different in that it includes a voltage command generation circuit 62 </ b> A instead of the voltage command generation circuit 62. The voltage command generation circuit 62A includes voltages VR, VS, VT detected by the voltage sensor 31, currents IR, IS, IT detected by the current sensor 32, a voltage Vdc detected by the voltage sensor 34, and a voltage VU detected by the voltage sensor 37. , VV, VW and voltages VU1, VV1, VW1 detected by voltage sensor 38, and generates voltage command values VR *, VS *, VT * corresponding to the R phase, S phase, and T phase, respectively.

  Hereinafter, the configuration of the voltage command generation circuit 62A will be described. FIG. 7 is a functional block diagram of the voltage command generation circuit 62A included in the converter control unit of the control device 10A. The basic configuration of the voltage command generation circuit 62A is the same as that of the voltage command generation circuit 62 shown in FIG. 4, except that a reference value generation circuit 70A is included instead of the reference value generation circuit 70.

  The reference value generation circuit 70A receives the voltages VR, VS, VT detected by the voltage sensor 31, the voltages VU, VV, VW detected by the voltage sensor 37, and the voltages VU1, VV1, VW1 detected by the voltage sensor 38, A reference value Vdc * that is a target value of Vdc is generated.

  FIG. 8 is a diagram illustrating a configuration example of the reference value generation circuit 70A. Referring to FIG. 8, reference value generation circuit 70 </ b> A includes three-phase full-wave rectification circuits 80, 81, and 82 and a maximum value selection circuit 84. The reference value generation circuit 70A is obtained by adding a three-phase full-wave rectification circuit 82 to the reference value generation circuit 70 shown in FIG.

  Similarly to the three-phase full-wave rectifier circuits 80 and 81 (first and second rectifier circuits), six anti-parallel diodes are bridge-connected to the three-phase full-wave rectifier circuit 82 (third rectifier circuit). A bridge rectifier is used. The three-phase full-wave rectifier circuit 82 rectifies the three-phase voltages VU1, VV1, and VW1 of the three-phase line 19 and converts them into a DC voltage Vdc3. The DC voltage Vdc3 includes an absolute value | VUV1 | of the line voltage VUV1 (difference between the voltage VU1 and the voltage VV1), an absolute value | VVW1 | of the line voltage VVW1 (difference between the voltage VV1 and the voltage VW1), and the line The absolute value | VWU1 | of the voltage VWU1 (difference between the voltage VW1 and the voltage VU1) is equal to the maximum value. The DC voltage Vdc3 includes the peak value of the AC output voltage (output line voltages VUV1, VVW1, VWU1) supplied to the load 6 via the bypass circuit.

  The maximum value selection circuit 84 includes a DC voltage Vdc1 converted by the three-phase full-wave rectifier circuit 80, a DC voltage Vdc2 converted by the three-phase full-wave rectifier circuit 81, and a DC voltage converted by the three-phase full-wave rectifier circuit 82. The largest voltage Vdc3 is selected. The maximum value selection circuit 84 outputs the selected DC voltage as the reference value Vdc * to the adder 71 (FIG. 7).

  The DC voltage Vdc1 output from the three-phase full-wave rectifier circuit 80 is a value reflecting fluctuations in the AC input voltage (input line voltages VRS, VST, VTR) supplied from the commercial AC power supply 1. The DC voltage Vdc2 output from the three-phase full-wave rectifier circuit 81 is a value reflecting fluctuations in the AC output voltage (output line voltages VUV, VVW, VWU) supplied to the load 6. The DC voltage Vdc3 output from the three-phase full-wave rectifier circuit 82 is a value reflecting fluctuations in the AC output voltage (output line voltages VUV1, VVW1, VWU1) supplied to the load 6 via the bypass circuit. . The maximum value selection circuit 84 selects the largest one of the DC voltages Vdc1, Vdc2, and Vdc3 to generate the reference value Vdc *, so that the generated reference value Vdc * is the AC input voltage and AC output. The voltage changes following the peak value of the voltage at which the fluctuation is greatest.

  In the uninterruptible power supply shown in FIG. 6, when the uninterruptible power supply is maintained and inspected, or when the inverter 4 fails, the inverter power supply mode is shifted to the bypass power supply mode. At this time, the semiconductor switch 20 is turned on instantaneously, and then the magnetic contactor 21 is turned on. Thereafter, when the magnetic contactor 18 is turned off, the inverter power supply state can be switched to the bypass power supply state without instantaneous interruption.

  However, the AC output voltage (output line voltages VUV1, VVW1, VWU1) supplied to the load 6 via the bypass circuit fluctuates, and the AC output voltage (output line voltage VUV) supplied from the inverter 4 to the load 6 varies. , VVW, VWU) between the time when the bypass circuit is turned on and the time when the magnetic contactor 18 is turned off, that is, while the bypass circuit and the magnetic contactor 18 are both turned on. A current flows from T2 toward the inverter 4 side. This current is called cross current. In order to suppress the occurrence of this cross current, the AC output voltage output from the inverter 4 is preferably equal to or higher than the AC output voltage supplied via the bypass circuit. In this way, the AC output voltages VUV1, VVW1, and VWU1 supplied via the bypass circuit can affect the control of the inverter 4.

  According to the reference value generation circuit 70A, the AC output voltages VUV1, VVW1, VWU1 supplied via the bypass circuit fluctuate, and the peak values are higher than those of the AC output voltages VUV, VVW, VWU supplied from the inverter 4. In the case of increase, the reference value Vdc * is set higher reflecting the increase of the peak value. The voltage Vdc is increased by controlling the input current of the converter 3 so that the difference between the reference value Vdc * and the voltage Vdc becomes zero. As a result, it is possible to prevent the modulation factor from exceeding 1 in the sine wave PWM control of the inverter 4. Therefore, it is possible to control the AC output voltage of the inverter 4 to be equal to or higher than the AC output voltage that is sinusoidal and supplied via the bypass circuit.

  As described above, according to the second embodiment, even when the AC output voltage supplied from the inverter 4 or the bypass circuit fluctuates when shifting from the inverter power supply mode to the bypass power supply mode, the AC output is performed. The reference value Vdc * is dynamically set so as to follow the voltage fluctuation, whereby the voltage Vdc also fluctuates. Thereby, it is possible to shift from the inverter power supply mode to the bypass power supply mode without being affected by fluctuations in the AC output voltage. Therefore, the reference value Vdc * is compared with a value that is fixedly set to a value having a margin corresponding to the fluctuation amount of the AC output voltage, and the stability of the entire power conversion device 100 is not deteriorated. Loss can be reduced.

[Embodiment 3]
FIG. 9 is a circuit diagram showing another configuration example of the reference value generation circuit 70 shown in FIG. Referring to FIG. 9, reference value generation circuit 70B has the same basic configuration as reference value generation circuit 70 shown in FIG. 5, but maximum value hold circuit 85, gain circuits 88 and 86, comparator 87 and The difference is that a switching circuit 89 is added.

  Maximum value selection circuit 84 selects the larger one of DC voltage Vdc1 converted by three-phase full-wave rectifier circuit 80 and DC voltage Vdc2 converted by three-phase full-wave rectifier circuit 81, and selects the selected DC voltage. The data is output to the maximum value hold circuit 85 and also output to the comparator 87.

  The maximum value hold circuit 85 samples and holds the DC voltage sent from the maximum value selection circuit 84 at a predetermined sampling frequency.

  The gain circuit 86 multiplies the DC voltage held in the maximum value hold circuit 85 by the gain G1, and outputs the multiplication result as the threshold value Vth. The gain G1 is a fixed value set to be larger than 0 and smaller than 1. For example, the gain G1 is set to a value of about 0.8 to 0.9.

  In the comparator 87, the threshold value Vth output from the gain circuit 86 is input to the non-inverting input terminal (+ terminal), and the DC voltage selected by the maximum value selection circuit 84 is input to the inverting input terminal (−terminal). . The comparator 87 compares the threshold value Vth with the DC voltage and outputs a comparison result. The comparator 87 outputs an H (logic high) level signal when the DC voltage from the maximum value selection circuit 84 is greater than the threshold value Vth, and when the DC voltage from the maximum value selection circuit 84 is less than or equal to the threshold value Vth. A signal of L (logic low) level is output.

  The gain circuit 88 multiplies the DC voltage held in the maximum value hold circuit 85 by the control gain G2. The control gain G2 is used to increase or decrease the reference value Vdc * at a preset change rate. When the reference value Vdc * is increased, the control gain G2 increases at the above change rate toward “1” with the value “0” as an initial value. On the other hand, when the reference value Vdc * is decreased, the control gain G2 decreases at the above change rate toward “0” with the value “1” as an initial value. The change speed of the control gain G2 is set according to the response speed of the control device 10 so that the control device 10 can cause the voltage Vdc to follow the change of the reference value Vdc *.

  The switching circuit 89 uses the reference value Vdc * output from the reference value generation circuit 70B according to the output signal of the comparator 87 as the output of the gain circuit 88 (I side) and the output of the maximum value hold circuit 85 (II). Switch to the side). Specifically, when the output signal of the comparator 87 is at the H level, the switching circuit 89 selects the output (II side) of the maximum value hold circuit 85 as the reference value Vdc *. That is, when the DC voltage from the maximum value selection circuit 84 is larger than the threshold value Vth, the DC voltage held in the maximum value hold circuit 85 is output from the reference value generation circuit 70B as the reference value Vdc *.

  On the other hand, when the output signal of the comparator 87 is L level, the switching circuit 89 selects the output (I side) of the gain circuit 88 as the reference value Vdc *. That is, when the DC voltage from the maximum value selection circuit 84 is equal to or lower than the threshold value Vth, a voltage obtained by multiplying the DC voltage held in the maximum value hold circuit 85 by the control gain G2 is used as the reference value Vdc * as the reference value generation circuit 70B. Is output from. While the DC voltage from the maximum value selection circuit 84 is equal to or lower than the threshold value Vth, the reference value Vdc * output from the gain circuit 88 via the switching circuit 89 gradually decreases at a predetermined change rate.

  FIG. 10 is a diagram schematically illustrating an example of a temporal change in the reference value Vdc * output from the reference value generation circuit 70B illustrated in FIG. The solid line in FIG. 10 indicates the DC voltage output from the maximum value selection circuit 84, that is, the larger one of the DC voltages Vdc1 and Vdc2. In the following description, the output voltage of the maximum value selection circuit 84 is expressed as Vmax (Vdc1, Vdc2). In FIG. 10, the broken line indicates the reference value Vdc * output from the switching circuit 89.

  In FIG. 10, the AC input voltages VRS, VST, VTR supplied from the commercial AC power supply 1 or the AC output voltages VUV, VVW, VWU supplied to the load 6 are reduced, so that the voltages Vmax (Vdc1, Vdc2 ) Is shown.

  Within the reference value generation circuit 70B, the threshold value Vth is calculated by multiplying the voltage Vmax (Vdc1, Vdc2) held in the maximum value hold circuit 85 by the gain G1. The threshold value Vth is updated at a period corresponding to the sampling frequency of the maximum value hold circuit 85.

  Prior to time t1 in FIG. 10, voltage Vmax (Vdc1, Vdc2) is greater than threshold value Vth. Therefore, based on the H level output signal from the comparator 87, the switching circuit 89 selects the output (II side) of the maximum value hold circuit 85 as the reference value Vdc *.

  When voltage Vmax (Vdc1, Vdc2) decreases and becomes equal to or lower than threshold value Vth at time t1, the output signal of comparator 87 switches from H level to L level. Thereby, in switching circuit 89, instead of the output (I side) of maximum value hold circuit 85, the output (I side) of gain circuit 88 is selected as reference value Vdc *. In the gain circuit 88, the control gain G2 decreases at a preset change speed with the value “1” as an initial value. Thereby, the reference value Vdc * gradually decreases from the voltage value at time t1. The change rate of the reference value Vdc * after time t1 is slower than the change rate of the voltage Vmax (Vdc1, Vdc2). Therefore, control device 10 can cause voltage Vdc to follow reference value Vdc *.

  When the voltage Vmax (Vdc1, Vdc2) is changed from decrease to increase, and the voltage Vmax (Vdc1, Vdc2) becomes larger than the threshold value Vth again at time t2 after time t1, the output signal of the comparator 87 becomes L Switch from level to H level. Therefore, in switching circuit 89, instead of the output of gain circuit 88 (II side), the output of maximum value hold circuit 85 (I side) is selected as reference value Vdc *.

  By adopting such a configuration, the reference value Vdc * has a fluctuation range suppressed to be smaller than the voltage Vmax (Vdc1, Vdc2). When voltage Vmax (Vdc1, Vdc2) is used as it is as reference value Vdc *, when voltage Vmax (Vdc1, Vdc2) suddenly fluctuates, control of converter 3 and inverter 4 is controlled with respect to fluctuation of reference value Vdc *. It may be difficult to follow. On the other hand, in the present embodiment, even if voltage Vmax (Vdc1, Vdc2) fluctuates rapidly, reference value Vdc * is a controllable change rate of converter 3 and inverter 4, and voltage Vmax It changes so as to follow (Vdc1, Vc2). Thereby, stability of control of converter 3 and inverter 4 can be maintained.

  In the power conversion apparatus according to the present embodiment, converter 3, inverter 4 and DC voltage converter 7 are configured by a two-level circuit, but converter 3, inverter 4 and DC voltage converter 7 may be configured by a three-level circuit. Good.

  In the present embodiment, a three-phase AC power source is shown as the commercial AC power source 1, but the commercial AC power source 1 may be a single-phase AC power source.

  In this embodiment, the application example to the uninterruptible power supply device has been described. However, the present invention can be applied to a power conversion device that outputs DC power from AC power.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  1 Commercial AC power supply, 2 input filter, 3 converter, 3R R phase arm, 3S S phase arm, 3T T phase arm, 4 inverter, 4U U phase arm, 4V V phase arm, 4W W phase arm, 5 output filter, 6 Load, 7 DC voltage converter, 8 storage battery, 10, 10A control device, 11, 17 capacitor, 12, 16 reactor, 13 DC positive bus, 14 DC negative bus, 15 capacitor, 18, 21, 22 Electromagnetic contactor, 19 Three-phase line, 20 Semiconductor switch, 31, 34, 35, 37, 38 Voltage sensor, 32, 36 Current sensor, 33 Power failure detection circuit, 60 Converter control unit, 62 Voltage command generation circuit, 64 PWM circuit, 70, 70A, 70B Reference value generation circuit, 72 DC voltage control circuit, 73 Sine wave generation circuit, 74A, 74B, 74 C multiplier, 76 current control circuit, 77A, 77B, 77C adder, 71, 75A, 75B, 75C subtractor, 80, 81, 82 three-phase full-wave rectifier circuit, 84 maximum value selection circuit, 87 comparator, 89 Switching circuit, 100, 100A power converter, Q1R, Q1S, Q1T, Q2R, Q2S, Q2T, Q1U, Q1V, Q1W, Q2U, Q2V, Q2W, Q1D, Q2D IGBT elements, D1R, D1S, D1T, D2R, D2S, D2T, D1U, D1V, D1W, D2U, D2V, D2W, D1D, D2D Diode, RL R phase line, SLS phase line, TL T phase line, UL U phase line, VL V phase line, WL W phase line.

Claims (4)

A converter that converts AC power supplied from an AC power source into DC power;
An inverter that converts the DC power supplied from the converter through a DC positive bus and a DC negative bus into AC power and supplies the AC power to a load;
A capacitor connected between the DC positive bus and the DC negative bus;
A controller for controlling the converter and the inverter;
The control device includes:
A reference value generating circuit that generates a reference value of a DC voltage output between the DC positive bus and the DC negative bus from the converter ;
A converter control unit that controls the converter so that a voltage across the capacitor matches the reference value and a current in phase with the phase voltage of the AC power supply flows to the input side of the converter;
The reference value generation circuit includes:
A selection circuit that selects the larger one of the amplitude value of the AC input voltage supplied from the AC power source to the converter and the amplitude value of the AC output voltage supplied from the inverter to the load ;
A hold circuit (85) for holding the output of the selection circuit at a predetermined sampling frequency;
A comparator that compares a threshold value obtained by multiplying the output of the hold circuit by a first gain greater than 0 and less than 1 with the output of the selection circuit;
A gain circuit that multiplies the output of the hold circuit by a second gain that decreases at a predetermined rate of change toward 0 with an initial value of 1;
When the output of the selection circuit is higher than the threshold value, the output of the hold circuit is output as the reference value. On the other hand, when the output of the selection circuit falls below the threshold value, the output of the gain circuit is output as the reference value. And a switching circuit configured to do . The reference value generation circuit includes:
A first rectifier circuit for full-wave rectification of the AC input voltage;
A second rectifier circuit for full-wave rectifying the AC output voltage,
The power converter according to claim 1, wherein the selection circuit selects a larger one of the output of the first rectifier circuit and the output of the second rectifier circuit . A converter that converts AC power supplied from an AC power source into DC power;
An inverter that converts the DC power supplied from the converter through a DC positive bus and a DC negative bus into AC power and supplies the AC power to a load;
A capacitor connected between the DC positive bus and the DC negative bus;
A first electromagnetic contactor connected between the AC power source and the converter;
A second electromagnetic contactor connected between the inverter and the load;
A bypass circuit for supplying an AC power from the AC power source to the load, including a third electromagnetic contactor connected between the AC power source and the load;
A controller for controlling the converter and the inverter, and for controlling on / off of the first to third electromagnetic contactors;
A first voltage sensor for detecting an alternating voltage appearing at a node between the first electromagnetic contactor and the converter;
A second voltage sensor for detecting an alternating voltage appearing at a node between the inverter and the second electromagnetic contactor;
A third voltage sensor for detecting an AC voltage appearing at a node between the AC power source and the third electromagnetic contactor;
The control device turns on the first and second electromagnetic contactors, turns off the third electromagnetic contactor, and supplies inverter power supply mode from the inverter to the load. A bypass power supply mode in which the electromagnetic contactor is turned off, the third electromagnetic contactor is turned on, and AC power is supplied from the bypass circuit to the load, and the third electromagnetic contactor is turned on. It is configured to switch from the inverter power supply mode to the bypass power supply mode by turning off the second electromagnetic contactor later,
The control device includes:
The maximum value among the amplitude value of the voltage signal from the first voltage sensor, the amplitude value of the voltage signal from the second voltage sensor, and the amplitude value of the voltage signal from the third voltage sensor, A reference value generation circuit that outputs a reference value of a DC voltage output between the DC positive bus and the DC negative bus from a converter;
And a converter control unit that controls the converter so that a voltage across the capacitor matches the reference value and a current in phase with the phase voltage of the AC power supply flows to the input side of the converter. apparatus. The reference value generation circuit includes:
A first rectifier circuit for full-wave rectification of a voltage signal from the first voltage sensor ;
A second rectifier circuit for full-wave rectification of the voltage signal from the second voltage sensor ;
A third rectifier circuit for full-wave rectification of the voltage signal from the third voltage sensor ;
The output of the first rectifier circuit, the maximum value of the output of the output and the third rectifying circuit of the second rectifier circuit, and a selection circuit for selecting as the reference value, according to claim 3 Power converter.

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