JP2018163923A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress deterioration of a semiconductor device.SOLUTION: A method of manufacturing a semiconductor device includes the following steps of: forming an ohmic electrode 20 on a nitride semiconductor layer 18; forming a metal film 22 so as to cover an upper surface and a lateral face of the ohmic electrode; forming a first insulating film 24 that covers a surface of the metal film, on the nitride semiconductor layer; performing heat treatment of the ohmic electrode in a state where the first insulating film is formed; performing wet etching of the first insulating film using an etchant so as to expose the surface of the metal film; and forming a second insulating film 26 so as to cover the surface of the metal film, on the nitride semiconductor layer after the step of performing wet etching of the first insulating film.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a method for manufacturing a semiconductor device, for example, a method for manufacturing a semiconductor device having a nitride semiconductor layer.

  When forming an ohmic electrode in a nitride semiconductor layer, it is known to perform a heat treatment for making an ohmic contact between the nitride semiconductor layer and the ohmic electrode after forming the ohmic electrode in the nitride semiconductor layer (for example, a patent) Reference 1).

JP 2010-171133 A

  When heat treatment for ohmic contact is performed in a state where the nitride semiconductor layer is exposed, the surface of the nitride semiconductor layer is deteriorated. When the ohmic electrode is covered with an insulating film and heat treatment is performed, the insulating film deteriorates. If the ohmic electrode is covered with an insulating film and subjected to heat treatment, and then the insulating film is removed, the ohmic electrode is deteriorated due to the removal of the insulating film.

  The manufacturing method of this semiconductor device aims at suppressing deterioration of a semiconductor device.

  One embodiment of the present invention includes a step of forming an ohmic electrode on the nitride semiconductor layer, a step of forming a metal film so as to cover an upper surface and a side surface of the ohmic electrode, and the metal on the nitride semiconductor layer. Forming a first insulating film covering the surface of the film; heat-treating the ohmic electrode in a state in which the first insulating film is formed; and the first film so that the surface of the metal film is exposed. A step of forming a second insulating film on the nitride semiconductor layer so as to cover a surface of the metal film after the step of performing wet etching on the insulating film using an etchant and the step of performing wet etching on the first insulating film; And a method for manufacturing a semiconductor device.

  According to the method for manufacturing a semiconductor device, the deterioration of the semiconductor device can be suppressed.

FIG. 1A to FIG. 1E are cross-sectional views illustrating a method for manufacturing a semiconductor device according to Comparative Example 1. 2A to 2C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to Comparative Example 2. FIG. 3A to FIG. 3D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to Comparative Example 3. 4A to 4E are cross-sectional views (part 1) illustrating the method for manufacturing the semiconductor device according to the first embodiment. FIG. 5 is a diagram illustrating a cross section of the ohmic electrode and the metal film in the first embodiment. 6A to 6D are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor device according to the first embodiment. FIG. 7A to FIG. 7D are cross-sectional views (part 3) illustrating the method for manufacturing the semiconductor device according to the first embodiment. 8A to 8D are cross-sectional views (part 1) illustrating the method for manufacturing the semiconductor device according to the second embodiment. FIG. 9A to FIG. 9C are cross-sectional views (part 2) illustrating the method for manufacturing the semiconductor device according to the second embodiment. FIG. 10 is a diagram illustrating a cross section of the ohmic electrode and the metal film in the second embodiment. FIG. 11A to FIG. 11C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the third embodiment. FIG. 12A to FIG. 12C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the fourth embodiment.

[Description of Embodiment of Present Invention]
First, the contents of the embodiments of the present invention will be listed and described.

[Details of the embodiment of the present invention]
First, the contents of the embodiments of the present invention will be listed and described.
(1) One embodiment of the present invention includes a step of forming an ohmic electrode on a nitride semiconductor layer, a step of forming a metal film so as to cover an upper surface and a side surface of the ohmic electrode, and on the nitride semiconductor layer Forming a first insulating film covering the surface of the metal film, heat-treating the ohmic electrode with the first insulating film formed, and exposing the surface of the metal film. After the wet etching of the first insulating film using an etchant and the wet etching of the first insulating film, a second insulating film is formed on the nitride semiconductor layer so as to cover the surface of the metal film. Forming the semiconductor device.
Thereby, deterioration of the semiconductor device such as nitrogen escape from the surface of the nitride semiconductor layer, alteration of the insulating film and / or corrosion of the ohmic electrode can be suppressed.
(2) The heat treatment step preferably includes a heat treatment step at 500 ° C. or higher. Thereby, degradation of the semiconductor device can be suppressed even if heat treatment is performed at 500 ° C. or higher because of ohmic contact.
(3) The ohmic electrode preferably includes a titanium film or a tantalum film formed on the nitride semiconductor layer, and an aluminum film formed on the titanium film or tantalum film. Thereby, even if aluminum is used for the ohmic contact between the ohmic electrode and the nitride semiconductor layer, corrosion of the ohmic electrode can be suppressed.
(4) In the step of removing the first insulating film, it is preferable to remove the first insulating film using an etchant containing hydrofluoric acid. Thereby, even if hydrofluoric acid is used as an etching solution, corrosion of the ohmic electrode can be suppressed.
(5) The metal film is preferably a gold film or a gold germanium film. Thereby, it can suppress that an ohmic electrode corrodes by wet etching.

  Specific examples of the semiconductor device according to the embodiment of the present invention will be described below with reference to the drawings. In addition, this invention is not limited to these illustrations, is shown by the claim, and intends that all the changes within the meaning and range equivalent to a claim are included.

[Comparative Example 1]
FIG. 1A to FIG. 1E are cross-sectional views illustrating a method for manufacturing a semiconductor device according to Comparative Example 1. As shown in FIG. 1A, an electron transit layer 12, an electron supply layer 14, and a cap layer 16 are stacked as a nitride semiconductor layer 18 on a substrate 10. As shown in FIG. 1B, the ohmic electrode 20 is formed on the nitride semiconductor layer 18.

  As shown in FIG. 1C, heat treatment is performed with the surface of the nitride semiconductor layer 18 exposed. Thereby, the ohmic electrode 20 and the nitride semiconductor layer 18 are in ohmic contact. As shown in FIG. 1D, an insulating film 26 is formed on the nitride semiconductor layer 18 so as to cover the ohmic electrode 20. As shown in FIG. 1E, an opening is formed in the insulating film 26, and a gate electrode 30 in contact with the nitride semiconductor layer 18 is formed in the opening.

  In Comparative Example 1, heat treatment is performed with the nitride semiconductor layer 18 exposed in FIG. For this reason, the nitride semiconductor layer 18 is deteriorated. For example, the heat treatment temperature is 500 ° C. to 900 ° C. Nitrogen is released from the surface of the nitride semiconductor layer 18 by such high-temperature heat treatment. As a result, an interface state caused by gallium dangling bonds or the like is formed on the surface of the nitride semiconductor layer 18. Such interface states deteriorate the electrical characteristics when the semiconductor device is operated. For example, a collapse phenomenon of drain current occurs.

[Comparative Example 2]
2A to 2C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to Comparative Example 2. As shown in FIG. 2A, after FIG. 1B of Comparative Example 1, an insulating film 24 is formed on the nitride semiconductor layer 18 so as to cover the ohmic electrode 20. As shown in FIG. 2B, heat treatment for ohmic contact is performed. As a result, the insulating film 24 is transformed into the insulating film 24a. As shown in FIG. 2C, the gate electrode 30 is formed in the same manner as in the first comparative example.

In Comparative Example 2, as shown in FIG. 2B, the nitride semiconductor layer 18 is not exposed during the heat treatment for ohmic contact, and deterioration of the nitride semiconductor layer is suppressed. However, the insulating film 24a deteriorates through heat treatment. For example, in the case where the insulating film 24 is a silicon nitride film, hydrogen in the film is lost due to the heat treatment and becomes a defect. Further, nitrogen extraction of the cap layer 16 due to dangling bonds of silicon or the like occurs, and an interface state is formed on the surface of the cap layer 16. If the altered insulating film 24a remains, the characteristics of the semiconductor device deteriorate (for example, a drain current collapse phenomenon occurs). For example, when the insulating film 24 is an aluminum oxide (Al ₂ O ₃ ) film, the aluminum oxide film is crystallized by the heat treatment. If the crystallized insulating film 24a remains, processing with high dimensional accuracy becomes difficult in the subsequent manufacturing process.

[Comparative Example 3]
FIG. 3A to FIG. 3D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to Comparative Example 3. As shown in FIG. 3A, an insulating film 24a is formed so as to cover the ohmic electrode 20 after the heat treatment in FIG. As shown in FIG. 3B, the insulating film 24a is removed. As shown in FIG. 3C, an insulating film 26 is formed on the nitride semiconductor layer 18 so as to cover the ohmic electrode 20. As shown in FIG. 3D, the gate electrode 30 is formed in the same manner as in the first comparative example.

  In Comparative Example 3, the nitride semiconductor layer 18 is not exposed during the heat treatment, and deterioration of the nitride semiconductor layer is suppressed. Further, the insulating film 24 that has been altered by the heat treatment is removed, and a new insulating film 26 is formed. Thereby, it can suppress that the insulating film 24a which deteriorated remains.

  However, in FIG. 3B, the ohmic electrode 20 deteriorates when the insulating film 24a is removed. For example, when the insulating film 24a is removed using a dry etching method, damage is introduced into the surface of the nitride semiconductor layer 18 and the ohmic electrode 20. Further, when the insulating film 24a is removed using a wet etching method, the ohmic electrode 20 is corroded. For example, when the ohmic electrode 20 includes titanium, nickel, tantalum, and aluminum, and the insulating film 24a is a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or an aluminum oxide film, the insulating film 24a is made of hydrofluoric acid. When etching is performed with the solution containing the ohmic electrode 20, the resistance is increased.

  When heat treatment for ohmic contact is performed as in Comparative Examples 1 to 3, at least one of the nitride semiconductor layer 18, the insulating film 24, and the ohmic electrode 20 is deteriorated. Hereinafter, examples for solving the above-described problems will be described.

  In Example 1, FIGS. 4A to 4E and FIGS. 6A to 7D are cross-sectional views illustrating a method of manufacturing a semiconductor device according to Example 1. FIG. As shown in FIG. 4A, a nitride semiconductor layer 18 is formed on the substrate 10. The substrate 10 is, for example, a SiC substrate, a sapphire substrate, or a Si substrate. When the substrate 10 is transparent like a SiC substrate, a metal film may be formed on the lower surface of the substrate 10. The nitride semiconductor layer 18 includes an electron transit layer 12, an electron supply layer 14, and a cap layer 16. The electron transit layer 12, the electron supply layer 14, and the cap layer 16 are, for example, a GaN layer, an AlGaN layer, and a GaN layer, respectively. A two-dimensional electron gas is formed near the interface of the electron supply layer 14 of the electron transit layer 12. The electron transit layer 12 between the two-dimensional electron gas and the substrate 10 functions as a buffer layer. The electron supply layer 14 may be, for example, an InAlN layer. The nitride semiconductor layer 18 is formed using, for example, a MOCVD (Metal Organic Chemical Vapor Deposition) method.

  By forming a groove (not shown) reaching the electron transit layer 12 in the element isolation region, the transistors are isolated (element isolation). At this time, alignment marks for subsequent pattern formation may be formed simultaneously.

  As shown in FIG. 4B, a mask layer 50 having an opening 51 is formed on the nitride semiconductor layer 18. The mask layer 50 is, for example, a photoresist. As shown in FIG. 4C, the ohmic electrode 20 and the metal film 21 are formed on the upper surface of the nitride semiconductor layer 18 exposed from the opening 51 and the upper surface of the mask layer 50 by vapor deposition. The ohmic electrode 20 is a source electrode and a drain electrode. The metal film 21 is the same metal film as the ohmic electrode 20, but the metal film on the mask layer 50 is illustrated as the metal film 21. When forming the ohmic electrode 20 and the metal film 21, the atoms are allowed to fly almost from the normal direction of the nitride semiconductor layer 18 as indicated by an arrow 60. The ohmic electrode 20 may be formed in a recess formed in the cap layer 16 and the electron supply layer 14 (for example, the bottom surface of the recess is in the electron supply layer 14).

  As shown in FIG. 4D, metal films 22 and 23 are formed on the ohmic electrode 20 and the metal film 21 by vapor deposition. For example, the metal film 22 is in contact with the surface of the metal film 21. Although the metal film 23 is the same metal film as the metal film 22, the metal film on the mask layer 50 is illustrated as being distinguished from the metal film 22 in the opening 51 as the metal film 23. The atoms of the metal films 22 and 23 are caused to fly from a direction inclined by an angle θ from the normal direction 64 of the nitride semiconductor layer 18 as indicated by an arrow 62. For example, by tilting the substrate 10 from the flying direction of the atoms and rotating the substrate 10, the atoms fly from an oblique direction as indicated by an arrow 62. As shown in FIG. 4E, the metal layers 21 and 23 formed on the mask layer 50 are lifted off by removing the mask layer 50.

  FIG. 5 is a diagram illustrating a cross section of the ohmic electrode 20 and the metal film 22 in the first embodiment. As shown in FIG. 5, the ohmic electrode 20 includes stacked metal films 20 a to 20 d. The metal films 20a to 20d are, for example, a titanium film having a thickness of 20 nm, an aluminum film having a thickness of 100 nm, a titanium film (or nickel film) having a thickness of 20 nm, and a gold film having a thickness of 50 nm. The metal films 20a and 20c may be tantalum films. The metal film 22 is a gold film having a thickness of 50 nm, for example.

  When the ohmic electrode 20 is formed as shown in FIG. 4C, the metal film 20d may cover the side surface of the metal film 20c, but the side surface of the metal film 20c is not completely covered or the film thickness is insufficient. It is. As shown in FIG. 4D, the metal film 22 is deposited such that atoms come from an oblique direction as compared with FIG. 4C, so that the thick metal film 22 is formed on the side surface of the ohmic electrode 20. Since the metal film 22 protects the side surface of the ohmic electrode 20, the thickness of the metal film 22 formed on the side surface of the ohmic electrode 20 is, for example, 20 nm or more.

  As shown in FIG. 6A, an insulating film 24 is formed on the nitride semiconductor layer 18 so as to cover the metal film 22. The insulating film 24 is a silicon nitride film having a thickness of 40 nm, for example, and is formed using a CVD method. The insulating film 24 is an aluminum oxide film and may be formed using an ALD (Atomic Layer deposition) method. The insulating film 24 may be a silicon oxide film or a silicon nitride oxide film. The film thickness of the insulating film 24 is, for example, 20 nm to 50 nm. The film thickness of the insulating film 24 functions as a protective film for heat treatment and is determined in consideration of distortion due to thermal stress and / or damage during film formation.

  As shown in FIG. 6B, the ohmic electrode 20 is heat-treated. Thereby, the ohmic electrode 20 and the cap layer 16 of the nitride semiconductor layer 18 are in ohmic contact. The insulating film 24 changes to 24a. The heat treatment is performed at 850 ° C. for 30 seconds using, for example, an RTA (Rapid Thermal Anneal) method. The heat treatment temperature and the heat treatment time are, for example, 500 ° C. to 900 ° C. and 30 seconds to 60 seconds. For the ohmic contact, when the metal film 20a is a titanium film, the heat treatment temperature is preferably 700 ° C. to 900 ° C. When the metal film 20a is a tantalum film, the heat treatment temperature is preferably 500 ° C to 700 ° C. The heat treatment time is, for example, 30 seconds to 1 minute.

  The titanium film or tantalum film of the metal film 20a reacts with nitrogen in the cap layer 16 together with a gettering effect to reduce the oxide layer on the surface of the cap layer 16, thereby forming low resistance TiN on the cap layer 16 side. . Thereby, low resistance TiN is formed even in the vicinity of the two-dimensional electron gas. Therefore, the aluminum film of the second metal film 20b and the two-dimensional electron gas are easily contacted by the tunnel effect. The titanium film, nickel film or tantalum film of the metal film 20c is a barrier layer of the metal films 20b and 20d. The gold film of the metal film 20d suppresses the oxidation of the metal films 20a to 20c. The gold film of the metal film 20d is a film for reducing the contact resistance with the upper layer.

  As shown in FIG. 6C, the insulating film 24a is wet-etched using an etchant that does not corrode the metal film 22. When the insulating film 24a is, for example, a silicon nitride film, an aluminum oxide film, a silicon oxide film, or a silicon nitride oxide film, the insulating film 24a is removed by wet etching using, for example, buffered hydrofluoric acid (buffered hydrofluoric acid). Gold is not easily corroded by acids or alkalis such as buffered hydrofluoric acid. Since the metal film 22, which is a gold film, protects the ohmic electrode 20, corrosion of the ohmic electrode 20 is suppressed.

  As shown in FIG. 6D, an insulating film 26 is formed on the nitride semiconductor layer 18 so as to cover the metal film 22. The insulating film 26 is a silicon nitride film having a thickness of 40 nm, for example, and is formed using a CVD method. The insulating film 26 is an aluminum oxide film and may be formed using an ALD (Atomic Layer deposition) method. The insulating film 26 may be a silicon oxide film or a silicon nitride oxide film.

  As shown in FIG. 7A, a mask layer 52 having an opening 53 is formed on the insulating film 26. The mask layer 52 is, for example, a photoresist. The insulating film 26 is removed using the mask layer 52 as a mask. As shown in FIG. 7B, after removing the mask layer 52, the gate electrode 30 is formed so as to cover the opening of the insulating film 26. The gate electrode 30 is, for example, a nickel film having a thickness of 80 nm and a gold film having a thickness of 300 nm from the nitride semiconductor layer 18 side, and is formed using a vapor deposition method and a lift-off method.

  As shown in FIG. 7C, an interlayer film 32 is formed on the insulating film 26 and the gate electrode 30. The interlayer film 32 is an insulating film such as a silicon nitride film, and is formed using a CVD method. The interlayer film 32 may be a silicon oxide film or a silicon nitride oxide film.

  As shown in FIG. 7D, an opening is provided in the interlayer film 32. A wiring layer 34 is formed in contact with the metal film 22 through the opening. The wiring layer 34 is a gold film, for example, and is formed using a plating method.

  According to Example 1, the ohmic electrode 20 is formed on the nitride semiconductor layer 18 as shown in FIG. As shown in FIGS. 4D and 5, a metal film 22 (a film containing gold) is formed so as to cover the upper surface and side surfaces of the ohmic electrode 20. As shown in FIG. 6A, an insulating film 24 (first insulating film) that covers the surface of the metal film 22 is formed on the nitride semiconductor layer 18. As shown in FIG. 6B, heat treatment is performed so that the ohmic electrode 20 and the nitride semiconductor layer 18 are in ohmic contact with the insulating film 24 formed. As shown in FIG. 6C, the insulating film 24a is wet etched using an etchant that does not corrode the metal film 22 so that the surface of the metal film 22 is exposed. As shown in FIG. 6D, an insulating film 26 (second insulating film) is formed on the nitride semiconductor layer 18 so as to cover the surface of the metal film 22.

  As shown in FIG. 6B, the surface of the nitride semiconductor layer 18 as in Comparative Example 1 is covered with the insulating film 24 when the heat treatment for ohmic contact is performed. Degradation due to nitrogen depletion or the like can be suppressed. As shown in FIG. 6C, the insulating film 24a altered by the heat treatment is removed, and the insulating film 26 is formed as shown in FIG. 6D. For this reason, deterioration of the characteristics of the semiconductor device due to the altered insulating film 24a as in Comparative Example 2 can be suppressed. As shown in FIG. 6C, the surface of the ohmic electrode 20 is protected by the metal film 22 when the insulating film 24a is wet-etched. Thereby, deterioration by the corrosion etc. of the ohmic electrode 20 like the comparative example 3 can be suppressed. As described above, deterioration of the semiconductor device such as nitrogen desorption from the surface of the nitride semiconductor layer 18, alteration of the insulating film 24 and / or corrosion of the ohmic electrode 20 can be suppressed.

  In Comparative Example 1, when the heat treatment for ohmic contact is performed at 500 ° C. or higher, the nitride semiconductor layer deteriorates like nitrogen depletion from the surface of the nitride semiconductor layer 18. In Comparative Example 2, the altered insulating film 24a remains. The nitride semiconductor layer 18 and the insulating film 24 are further deteriorated at 600 ° C. or higher, and further deteriorated at 700 ° C. or higher. According to Example 1, even if heat treatment is performed at 500 ° C. or higher, 600 ° C. or higher, or 700 ° C. or higher in FIG. It can suppress remaining.

  As shown in FIG. 5, the ohmic electrode 20 includes a titanium film or tantalum film formed on the nitride semiconductor layer 18 and an aluminum film formed on the titanium film or tantalum film. Thereby, ohmic contact between the nitride semiconductor layer 18 and the ohmic electrode 20 can be obtained. The ohmic electrode 20 includes a titanium film, a nickel film, or a tantalum film formed on the aluminum film. Thereby, ohmic contact between the nitride semiconductor layer 18 and the ohmic electrode 20 can be obtained.

  These metals are easily corroded by the etching solution for the insulating film 24. Therefore, the corrosion of the ohmic electrode 20 can be suppressed by providing the metal film 22 as in the first embodiment.

  These metals are particularly corroded by an etchant containing hydrofluoric acid. Therefore, as shown in FIG. 6C, when the insulating film 24a is removed using an etchant containing hydrofluoric acid, it is preferable to provide the metal film 22.

  The film made of gold is not corroded by acids such as hydrofluoric acid and alkali solutions. Therefore, the metal film 22 is preferably a gold film or a gold germanium film.

  The insulating film 24 is, for example, a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or an aluminum oxide film. These insulating films are suitable as a protective film for heat treatment. However, these insulating films are easily altered by heat treatment. In order to remove these insulating films, an etching solution containing hydrofluoric acid is used. Therefore, it is preferable to provide the metal film 22 to suppress the corrosion of the ohmic electrode 20.

  The insulating film 26 is, for example, a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or an aluminum oxide film. When the metal film 22 is a gold film, the insulating film 26 is preferably formed using an ALD method. The ALD method is a method of forming a film using a surface reaction, and the film thickness and / or film quality formed by the base metal may change. The exposed portion of the ohmic electrode 20 is entirely covered with a gold film. For this reason, the film thickness and / or film quality of the metal film 22 can be made uniform. Thereby, peeling of the ohmic electrode 20 can be suppressed.

  When the ohmic electrode 20 is formed, a mask layer 50 having an opening 51 is formed on the nitride semiconductor layer 18 as shown in FIG. As shown in FIG. 4C, the ohmic electrode 20 is formed on the nitride semiconductor layer 18 using the mask layer 50 as a mask, using a vapor deposition method. When the metal film 22 is formed, the metal film 22 is formed using the mask layer 50 as a mask as shown in FIG. At this time, a vapor deposition method is used such that the incident angle θ of atoms with respect to the normal direction 64 on the upper surface of the nitride semiconductor layer 18 is larger than the incident angle in the step of forming the ohmic electrode 20 in FIG. Thereby, as shown in FIG. 5, the metal film 22 is formed so as to cover the side surface of the ohmic electrode 20.

  Further, since the ohmic electrode 20 and the metal film 22 are formed using the same mask layer 50, the manufacturing process can be simplified.

  Example 2 is an example in which the ohmic electrode 20 and the metal film 22 are formed using different mask layers. FIG. 8A to FIG. 9C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to the second embodiment. As shown in FIG. 8A, a mask layer 50 having an opening 51 with an opening width W1 is formed on the nitride semiconductor layer 18 as in FIG. 4B of the first embodiment. As shown in FIG. 8B, the ohmic electrode 20 and the metal film 21 are formed using the mask layer 50 as a mask, as in FIG. 4C of the first embodiment.

  As shown in FIG. 8C, the metal film 21 is lifted off by removing the mask layer 50. As shown in FIG. 8D, a mask layer 54 having an opening 55 with an opening width W2 is formed on the nitride semiconductor layer 18. The mask layer 54 is, for example, a photoresist. The opening 55 is provided so as to overlap the ohmic electrode 20.

  As shown in FIG. 9A, the metal film 22 and the metal film 23 are formed on the ohmic electrode 20 and the mask layer 54. As shown in FIG. 9B, the metal film 23 is lifted off by removing the mask layer 54. As shown in FIG. 9C, the same steps as those in FIGS. 6A to 7D of the first embodiment are performed.

  FIG. 10 is a diagram illustrating a cross section of the ohmic electrode 20 and the metal film 22 according to the second embodiment. As shown in FIG. 10, the width of the ohmic electrode 20 and the metal film 22 is substantially the opening widths W1 and W2. If the opening width W2 is sufficiently larger than the opening width W1, the side surface of the ohmic electrode 20 is completely covered with the metal film 22. Other manufacturing steps are the same as those in the first embodiment, and a description thereof will be omitted.

  According to the second embodiment, when the ohmic electrode 20 is formed as shown in FIG. 8A, the mask layer 50 (first mask) having the opening 51 (first opening) is formed on the nitride semiconductor layer 18. To do. As shown in FIG. 8B, the ohmic electrode 20 is formed on the nitride semiconductor layer 18 using the mask layer 50 as a mask. When the metal film 22 is formed, after removing the mask layer 50 as shown in FIG. 8C, the ohmic electrode 20 is included on the nitride semiconductor layer 18 and wider than the opening 51 as shown in FIG. 8D. A mask layer 54 (second mask layer) having an opening 55 (second opening) is formed. As shown in FIG. 9A, the metal film 22 is formed on the nitride semiconductor layer 18 using the mask layer 54 as a mask. Thereby, as shown in FIG. 10, the metal film 22 is formed to cover the side surface of the ohmic electrode 20.

  The incident angle of the atoms forming the ohmic electrode 20 in FIG. 8B and the incident angle of the atoms forming the metal film 22 in FIG. 8D may be the same or different. For example, the device for forming the ohmic electrode 20 and the device for forming the metal film 22 may be the same. Thereby, the film forming apparatus can be reduced as compared with the first embodiment. The ohmic electrode 20 and the metal film 22 may be formed by a vapor deposition method or a sputtering method.

  Example 3 is an example in which the gate electrode 30 is formed before the insulating film 26 is formed. FIG. 11A to FIG. 11C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the third embodiment. As shown in FIG. 11A, after FIG. 6C of the first embodiment or FIG. 9A of the second embodiment, the nitride semiconductor layer 18 is formed as in FIG. 7B of the first embodiment. Then, the gate electrode 30 is formed. As shown in FIG. 11B, an insulating film 26 is formed on the nitride semiconductor layer 18 so as to cover the metal film 22 and the gate electrode 30. The insulating film 26 is formed using a CVD method or an ALD method. In particular, by forming the insulating film 26 using the ALD method, the insulating film 26 can be uniformly formed up to the bottom of the gate electrode 30.

  As shown in FIG. 11C, the same steps as those in FIGS. 7B to 7D of the first embodiment are performed. Other manufacturing steps are the same as those in the first and second embodiments, and the description thereof is omitted.

  As in the first and second embodiments, the gate electrode 30 may be formed after the insulating film 26 is formed. As in Embodiment 3, the insulating film 26 may be formed after the gate electrode 30 is formed.

  Example 4 is an example in which the ohmic electrode 20 is formed on the electron supply layer 14 by removing the cap layer 16. FIG. 12A to FIG. 12C are cross-sectional views illustrating the method for manufacturing the semiconductor device according to the fourth embodiment. As shown in FIG. 12A, a mask layer 50 having an opening 51 is formed on the nitride semiconductor layer 18. The cap layer 16 is removed using the mask layer 50 as a mask.

  As shown in FIG. 12B, on the electron supply layer 14 as in FIGS. 4C to 4E of the first embodiment or FIGS. 8B to 9B of the second embodiment. The ohmic electrode 20 in contact with is formed. A metal film 22 covering the ohmic electrode 20 is formed. At this time, both the ohmic electrode 20 and the metal film 22 may be embedded in the cap layer 16, or only the ohmic electrode 20 may be embedded in the cap layer 16 and the metal film 22 may not be embedded in the cap layer 16. Good.

  As shown in FIG. 12C, the same steps as in FIGS. 6A to 7D of the first embodiment, or the same steps as FIGS. 11A to 11C of the third embodiment. I do. Other manufacturing steps are the same as those in the first to third embodiments, and a description thereof will be omitted.

  As in Examples 1 and 3, the ohmic electrode 20 may be formed so as to be in contact with the cap layer 16. As in Example 4, the ohmic electrode 20 may be formed so as to be in contact with the electron supply layer 14. The gate electrode 30 may be formed after the formation of the insulating film 26, or the insulating film 26 may be formed after the formation of the gate electrode 30 as in the third embodiment.

  In Examples 1 to 4, as a semiconductor device, a HEMT (High Electron Mobility Transistor) having a gate electrode 30 provided between ohmic electrodes 20 and having an electron transit layer 12 and an electron supply layer 14 formed on the electron transit layer 12 is used. Was described as an example. The methods of Embodiments 1 to 4 may be applied to an ohmic device of a semiconductor device other than the HEMT. A nitride semiconductor is a semiconductor containing nitrogen (N), for example, gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), indium nitride (InN), and aluminum indium gallium nitride (AlInGaN). ) Etc.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the meanings described above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

(Appendix 1)
Forming an ohmic electrode on the nitride semiconductor layer;
Forming a metal film so as to cover an upper surface and a side surface of the ohmic electrode;
Forming a first insulating film covering the surface of the metal film on the nitride semiconductor layer;
Heat-treating the ohmic electrode with the first insulating film formed;
Wet etching the first insulating film with an etchant so that the surface of the metal film is exposed;
After the step of wet etching the first insulating film, forming a second insulating film on the nitride semiconductor layer so as to cover the surface of the metal film;
A method of manufacturing a semiconductor device including:
(Appendix 2)
The semiconductor device manufacturing method according to appendix 1, wherein the heat treatment step includes a heat treatment step at 500 ° C. or higher.
(Appendix 3)
The semiconductor device manufacturing method according to appendix 1, wherein the ohmic electrode includes a titanium film or a tantalum film formed on the nitride semiconductor layer and an aluminum film formed on the titanium film or tantalum film.
(Appendix 4)
4. The method of manufacturing a semiconductor device according to appendix 3, wherein, in the step of removing the first insulating film, the first insulating film is removed using an etchant containing hydrofluoric acid.
(Appendix 5)
The method for manufacturing a semiconductor device according to appendix 1, wherein the metal film is a gold film or a gold germanium film.
(Appendix 6)
The method for manufacturing a semiconductor device according to claim 1, wherein the first insulating film and the second insulating film are a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or an aluminum oxide film.
(Appendix 7)
Forming a gate electrode between the ohmic electrodes on the nitride semiconductor layer,
The semiconductor device manufacturing method according to appendix 1, wherein the nitride semiconductor layer includes an electron transit layer and an electron supply layer formed on the electron transit layer.
(Appendix 8)
The step of forming the ohmic electrode includes:
Forming a mask layer having an opening on the nitride semiconductor layer;
Forming the ohmic electrode using a vapor deposition method on the nitride semiconductor layer using the mask layer as a mask, and
The step of forming the metal film includes
Using the mask layer as a mask, the metal film is formed using a vapor deposition method in which an incident angle of atoms with respect to a normal direction of the upper surface of the nitride semiconductor layer is larger than an incident angle of atoms in the step of forming the ohmic electrode The manufacturing method of the semiconductor device of Claim 1 including the process to carry out.
(Appendix 9)
The step of forming the ohmic electrode includes:
Forming a first mask layer having a first opening on the nitride semiconductor layer;
Forming the ohmic electrode on the nitride semiconductor layer using the first mask layer as a mask, and
The step of forming the metal film includes
Forming a second mask layer including the ohmic electrode and having a second opening wider than the first opening on the nitride semiconductor layer after removing the first mask layer;
The method for manufacturing a semiconductor device according to claim 1, further comprising: forming the metal film on the nitride semiconductor layer using the second mask layer as a mask.
(Appendix 10)
The method for manufacturing a semiconductor device according to appendix 1, wherein the heat treatment step includes a heat treatment step at 700 ° C. or higher.
(Appendix 11)
The semiconductor device manufacturing method according to appendix 3, wherein the ohmic electrode includes a titanium film, a nickel film, or a tantalum film formed on the aluminum film.

DESCRIPTION OF SYMBOLS 10 Substrate 12 Electron transit layer 14 Electron supply layer 16 Cap layer 18 Nitride semiconductor layer 20 Ohmic electrode 20a-20d, 21, 22, 23 Metal film 24, 24a, 26 Insulating film 30 Gate electrode 32 Interlayer film 34 Wiring layer 50, 52, 54 Mask layer 51, 53, 55 Opening 60, 62 Arrow 64 Normal direction

Claims (5)

Forming an ohmic electrode on the nitride semiconductor layer;
Forming a metal film so as to cover an upper surface and a side surface of the ohmic electrode;
Forming a first insulating film covering the surface of the metal film on the nitride semiconductor layer;
Heat-treating the ohmic electrode with the first insulating film formed;
Wet etching the first insulating film with an etchant so that the surface of the metal film is exposed;
After the step of wet etching the first insulating film, forming a second insulating film on the nitride semiconductor layer so as to cover the surface of the metal film;
A method of manufacturing a semiconductor device including:   The method of manufacturing a semiconductor device according to claim 1, wherein the heat treatment includes a heat treatment at 500 ° C. or higher.   The semiconductor device according to claim 1, wherein the ohmic electrode includes a titanium film or a tantalum film formed on the nitride semiconductor layer and an aluminum film formed on the titanium film or tantalum film. Method.   4. The method of manufacturing a semiconductor device according to claim 3, wherein in the step of removing the first insulating film, the first insulating film is removed using an etchant containing hydrofluoric acid. The method of manufacturing a semiconductor device according to claim 1, wherein the metal film is a gold film or a gold germanium film.

Images