JP2018137892A - Switching power supply - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress reverse current of an astable converter which is synchronously rectified, and enable high efficiency by precisely controlling a dead time of a switching element and a synchronous rectification element.SOLUTION: When starting up a switching power supply, a pair of switching elements TR31 and TR34 and a pair of switching elements TR32 and TR33 are complementarily turned on/off with an on-duty of approximately 50% while having a predetermined dead time. In synchronization with it, synchronous rectification elements TR51 and TR52 are complementarily turned on/off with a narrower on-duty. After that, control to increase the on-duty is performed so as to slowly increase an on period of the synchronous rectification elements TR51 and TR52. Thus, start control is performed for transition to a constant operation while maintaining a state with small current flowing to an input side from an output side even when a voltage is being applied to the output side of an astable converter 14.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a switching power supply device for converting a DC voltage into a desired voltage and supplying it to an electronic device.

  Conventionally, as a means for improving the efficiency of a switching power supply device, for example, there is a method of configuring a switching power supply device by combining a stable converter and an unstable converter shown in Patent Document 1.

  The unstable converter uses a full-bridge converter, a half-bridge converter, or the like, and operates the on-duty of the switching element with a fixed duty of about 50%. As a result, the conductivity of the transformer can be almost 100%, and high efficiency is realized by increasing the utilization factor of the transformer. Since the switching element has an on-duty that operates at a fixed duty of about 50%, there is only a slight off-period on the secondary side of the transformer, so the smoothing circuit on the output side is a smoothing choke coil. Since the choke coil having a very small inductance may be used, the efficiency can be improved by reducing the conduction resistance of the smoothing circuit.

  An unstable converter is a converter that converts the input voltage to the output voltage by the turns ratio of the primary side winding and the secondary side winding of the transformer, and does not have a function to control the output voltage by itself. When used as a power supply device, it is generally used in combination with a stable converter. Then, in order to stabilize the output voltage of the switching power supply device, feedback control is performed on the stable converter.

  FIG. 5 is a circuit block diagram showing an example of a switching power supply device combining a stable converter and an unstable converter. Patent Document 1 discloses a switching power supply device that combines a step-up chopper as a stable converter and a full-wave rectifier circuit using a diode as a half-bridge converter as an instable converter. FIG. 5 shows a switching power supply device having a modified circuit.

  The switching power supply device shown in FIG. 5 is a switching power supply device that combines a step-down chopper as the stable converter 12 and a full tap converter 14a as the non-stable converter 14 and a center tap rectifier circuit 14b using diodes D51 and D52. In addition, a circuit for performing feedback control on the stable converter 12 is provided, and a soft start for eliminating problems such as an output voltage suddenly rising and overshooting when the switching power supply device is started. A circuit 22 is mounted.

(Circuit configuration)
As shown in FIG. 5, the step-down chopper provided in the stable converter 12 includes a switching element TR11, a diode D11, an inductor L11, and a capacitor C11. The switching element TR11 includes an output voltage detection circuit 16 and a feedback control circuit 18. The stabilized converter switching element control circuit 20 outputs a stabilized predetermined voltage V1.

  The stable converter switching element control circuit 20 includes a PWM comparator 30 and a triangular wave generation circuit 28. The PWM comparator 30 includes a triangular wave voltage Vtri output from the triangular wave generation circuit 28 and a feedback signal voltage output from the feedback control circuit 18. VFB is input.

  The PWM comparator 30 performs control to turn on the switching element TR11 when the triangular wave voltage Vtri is smaller than the feedback signal voltage VFB, and to turn off the switching element TR11 when the triangular wave voltage Vtri is larger than the feedback signal voltage VFB. Thereby, when the feedback signal voltage VFB is large, the duty of the switching element TR11 is widened, and when the feedback signal voltage VFB is small, the duty of the switching element TR11 is narrowed.

  The voltage Vin supplied from the input power supply 10 is converted into an intermittent voltage by the switching element TR11. The intermittent voltage is rectified and smoothed by the inductor L11 and the capacitor C11 to be converted into the voltage V1.

  The feedback control circuit 18 includes an error amplifier 24 and a reference voltage source 26. The reference voltage Vref and the output proportional voltage Vo1 of the output voltage detection circuit 16 are input to the error amplifier 24. The error amplifier 24 controls the feedback signal voltage VFB to be small when the output proportional voltage Vo1 is larger than the reference voltage Vref, and so that the feedback signal voltage VFB is large when the output proportional voltage Vo1 is smaller than the reference voltage Vref. By controlling, the output voltage Vo of the switching power supply device is controlled to a predetermined voltage.

  The soft start circuit 22 is a circuit that clamps the feedback signal voltage VFB by “the voltage of the capacitor C21 + the base-emitter voltage of the transistor TR21”. When starting the switching power supply device, the transistor TR22 is turned off, and the capacitor C21 is charged with the current supplied from the resistor R21, whereby the voltage of the capacitor C21 gradually rises. Therefore, the clamped feedback signal The voltage VFB gradually increases.

  By this operation, it is possible to perform an operation of gradually increasing the duty of the switching element TR11, and a soft start operation can be performed. Further, by turning on the transistor TR22, the capacitor C21 is discharged, and the feedback signal voltage VFB can be lowered to stop the operation of the switching element TR11.

  The astable converter 14 is a full-tap converter 14a having switching elements TR31 to TR34, a transformer T51 having a primary side winding N1 and a secondary side winding N2, and a center tap having diodes D51 and D52. It comprises a rectifier circuit 14b and a smoothing capacitor Co.

  The switching element drive unit 32 that controls the switching elements TR31 to TR34 of the astable converter 14 includes an astable converter switching element drive pulse generation circuit 36, a distribution circuit 38, and switching element drive circuits 40 and 42.

  A switching element drive pulse Vsw having a dead time is generated by the astable converter switching element drive pulse generation circuit 36. The switching element drive pulse Vsw is distributed by the distribution circuit 38 to the switching element drive circuit 40 and the switching element drive circuit 42 for each pulse. By driving the switching elements TR31 to TR34 with this signal, the combination of the switching element TR31 and the switching element TR34 of the non-stable converter 14 and the combination of the switching element TR32 and the switching element TR33 are complementarily turned on and off with a duty of about 50%. can do.

  The dead time is provided in the astable converter switching element drive pulse generation circuit 36 at the moment when the on / off of the combination of the switching element TR31 and the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 is switched. This is to prevent the combination of the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 from being turned on at the same time. If there is a state in which they are turned on at the same time, the output of the stable converter 12 is short-circuited, causing a failure of the switching power supply device.

  In addition, in the unstable converter 14, when the dead time at the moment when the combination of the switching element TR 31 and the switching element TR 34 and the combination of the switching element TR 32 and the switching element TR 33 is switched on and off is optimized, the transformer T 51 is changed during the dead time period. The operation of extracting the charge stored in the parasitic capacitance between the drain and source of the switching element can be realized by utilizing the resonance phenomenon of the exciting inductance of the switching element and the parasitic capacitance between the drain and source of the switching element. By turning on the switching element after extracting the charge of the parasitic capacitance, a zero volt switching operation can be performed, and loss when the switching element is turned on can be reduced.

  Further, the switching element driving pulse Vsw from the unstable converter switching element driving pulse generation circuit 36 is driven by the signal distributed by the distribution circuit 38 because the on-time of the combination of the switching elements TR31 to TR34 is symmetrical. This is to prevent a problem that the transformer T51 is demagnetized.

  The unstable converter 14 converts the voltage V1 input from the stable converter 12 into an intermittent voltage. Voltage conversion is performed by inputting an intermittent voltage to the transformer T51. The voltage V1 output from the stable converter 12 is converted by the turn ratio (N1: N2) of the winding of the transformer T51, rectified by the diode D51 and the diode D52, smoothed by the capacitor Co, and output from the switching power supply device. Vo.

The center tap rectifier circuit 14b includes a diode D51 and a diode D52, and rectifies the voltage output from the transformer T51, and outputs the output voltage Vo of the switching power supply device. The output voltage Vo and the input voltage V1 have the relationship of the formula (1).
Vo = N2 / N1 · V1 (1)

  Next, the operation of the switching power supply device shown in FIG. 5 will be described. FIG. 6 is a time chart showing operation waveforms of respective parts in the switching power supply device of FIG. 6A shows the base-emitter voltage VBE of the transistor TR22 provided in the soft start circuit 22, FIG. 6B shows the output voltage V1 of the stable converter 12, and FIG. Indicates a feedback signal voltage VFB and a triangular wave voltage Vtri input to the PWM comparator 30, FIG. 6D shows a gate-source voltage VGS by a drive signal of the switching element TR11, and FIG. 6E shows a switching element drive pulse. FIG. 6F shows the gate-source voltage VGS based on the drive signals of the switching elements TR31 and TR34, and FIG. 6G shows the gate-source voltage VGS based on the drive signals of the switching elements TR32 and TR33. Yes.

(Before starting period A)
The period A is a state before the switching power supply device is activated, the transistor TR22 of the soft start circuit 22 is turned on, the capacitor C21 is discharged by the transistor TR22, and the feedback signal voltage VFB is clamped by the transistor TR21. Thus, VFB <Vtri and the operation of the switching element TR11 is stopped.

  At this time, since the output proportional voltage Vo1 of the switching power supply device is smaller than the reference voltage Vref, the feedback control circuit 18 tries to control the feedback signal voltage VFB to be higher. However, the feedback signal voltage VFB is clamped by “the voltage of the capacitor C21 + the base-emitter voltage of the transistor TR21”. Hereinafter, for the sake of easy understanding, if it is assumed that the base-emitter voltage of the transistor TR21 is zero, the capacitor C21 is discharged by the transistor TR22 and becomes zero, so that the feedback signal voltage VFB is also clamped to zero. ing.

(Soft start operation during period B)
In order to start the switching power supply device of FIG. 5, the transistor TR22 of the soft start circuit 22 is turned off at the beginning of the period B. At the same time, the switching elements TR31 to TR34 of the non-stable converter 14 start an on / off operation. The unstable converter 14 is repeatedly turned on and off complementarily with a combination of the switching element TR31 and the switching element TR34 and a combination of the switching element TR32 and the switching element TR33 with a duty of about 50%.

  The capacitor C21 is charged via the resistor R21, and the voltage of the capacitor C21 gradually increases. The feedback signal voltage VFB clamped as the voltage of the capacitor C21 rises gradually.

  The PWM comparator 30 performs an operation of turning on the switching element TR11 when the feedback signal voltage VFB is higher than the triangular wave voltage Vtri. Since the feedback signal voltage VFB gradually increases, the on-pulse width of the switching element TR11 gradually increases. When the ON pulse of the switching element TR11 becomes wider, the output voltage V1 of the stable converter 12 that becomes the input voltage V1 of the unstable converter 14 increases.

  The unstable converter 14 has a combination of the switching element TR31 and the switching element TR34 and a combination of the switching element TR32 and the switching element TR33 that are repeatedly turned on and off in a complementary manner with a duty of about 50%. V1 and the output voltage Vo have a relationship proportional to the number of turns of the primary side winding N1 and the secondary side winding N2 of the transformer T51. Therefore, the output voltage Vo of the switching power supply has a relationship proportional to the number of turns of the primary side winding N1 and the secondary side winding N2 of the transformer T51 with respect to the input voltage V1 from the stable converter 12. Become.

(Steady operation during period C)
When the output voltage Vo of the switching power supply reaches a voltage determined by the feedback control circuit 18, the feedback control circuit 18 controls the feedback signal voltage VFB so that the output voltage Vo becomes constant.

  Although the voltage of the capacitor C21 of the soft start circuit 22 further increases, the transistor TR21 is used as an emitter follower. Therefore, the transistor TR21 is turned off with reverse bias, so that the feedback signal voltage VFB is reduced by the soft start circuit 22. The switching power supply device is in a state of steady operation because it is not clamped.

(Synchronous rectification of stable converter + unstable converter)
In order to further increase the efficiency of the switching power supply device of FIG. 5, it is conceivable to perform synchronous rectification by replacing the diode D51 and the diode D52 of the rectifier circuit 14b of the unstable converter 14 with MOS-FETs.

  FIG. 7 is a circuit block diagram showing an example of a switching power supply device in which the astable converter of FIG. 5 is synchronously rectified. The diodes D51 and D52 of the unstable converter 14 in the switching power supply device of FIG. The synchronous rectifier circuit 14c is changed to TR51 and the synchronous rectifier element TR52, and a synchronous rectifier element drive unit 34 for controlling the synchronous rectifier elements TR51 and TR52 is added.

  The synchronous rectifying element driving unit 34 includes an astable converter synchronous rectifying element driving pulse generation circuit 44, a distribution circuit 46, a synchronous rectifying element driving circuit 48, and a synchronous rectifying element driving circuit 50.

  The synchronous rectifying element driving unit 34 turns on the synchronous rectifying element TR51 in synchronization with the ON state of the combination of the switching element TR31 and the switching element TR34, and synchronizes with the ON state of the combination of the switching element TR32 and the switching element TR33. Control is performed to turn on.

  FIG. 8 is a time chart showing operation waveforms of respective parts in the switching power supply device of FIG. 8A shows the base-emitter voltage VBE of the transistor TR22 provided in the soft start circuit 22, FIG. 8B shows the output voltage V1 of the stable converter 12, and FIG. Indicates a feedback signal voltage VFB and a triangular wave voltage Vtri input to the PWM comparator 30, FIG. 8D shows a gate-source voltage VGS by a drive signal of the switching element TR11, and FIG. 8E shows a switching element TR31, FIG. 8F shows the gate-source voltage VGS by the drive signals of the switching elements TR32 and TR33, and FIG. 8G shows the drive of the synchronous rectifier element TR51. The gate-source voltage VGS by the signal is shown, and FIG. 8 (H) shows the drive signal of the synchronous rectifier element TR52. It shows the gate-to-source voltage VGS that.

  At this time, the switching loss of the synchronous rectifying element TR51 can be eliminated by performing control so that the ON of the synchronous rectifying element TR51 is slightly delayed with respect to the ON of the combination of the switching element TR31 and the switching element TR34. This is to create a period in which current flows from the source to the drain while the synchronous rectifier element TR51 is off, so that the charge stored in the parasitic capacitance between the drain and source of the synchronous rectifier element TR51 is released and then synchronous rectification is performed. The element TR51 can be turned on, and the loss that occurs when the charge of the parasitic capacitance is short-circuited when the synchronous rectifier element TR51 is turned on can be eliminated.

  Further, the loss due to the through current can be eliminated by performing control so that the synchronous rectifier element TR51 is slightly turned off with respect to the combination of the switching element TR31 and the switching element TR34 being turned off. This is because the non-stable converter switching element drive pulse generation circuit 36 provides a dead time so that the combination of the switching element TR31 and the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 are switched on and off (the polarity of the transformer is changed). It is possible to prevent the output side of the transformer from being short-circuited by surely turning off the synchronous rectifying element TR51 by the moment of inversion. The synchronous rectifier element TR52 also performs similar control by the synchronous rectifier element drive unit 34.

  Control is performed so that the synchronous rectification element TR51 is turned on in synchronization with the combination of the switching element TR31 and the switching element TR34 being turned on, and the synchronous rectification element TR52 is turned on in synchronization with the combination of the switching element TR32 and the switching element TR33 being turned on. However, it is possible to improve the efficiency, but a highly efficient switching power supply device can be obtained by highly controlling the synchronous rectifier elements TR51 and TR52 as described above.

JP 2014-220862 A

(Problem 1 when using an asynchronous converter with synchronous rectification)
By the way, if a soft start operation is performed with a voltage applied to the output side of the switching power supply device shown in FIG. 7, a large current flows from the output side of the switching power supply device to the inside, and the switching power supply device breaks down. It has a problem that it ends up. The reason will be described below.

  A period A in FIG. 8 is a state before the switching power supply device in FIG. 7 is activated. The transistor TR22 of the soft start circuit 22 is turned on, and the capacitor C21 is discharged by the transistor TR22. The feedback signal voltage VFB is clamped and VFB <Vtri, and the operation of the switching element TR11 is stopped.

  In this state, the capacitor C11 of the stable converter 12 is completely discharged, and the output voltage V1 of the stable converter 12 is zero.

  In order to start the switching power supply device of FIG. 7, the transistor TR22 of the soft start circuit 22 is turned off at the beginning of the period B. At the same time, the switching elements TR31 to TR34 and the synchronous rectification elements TR51 and TR52 of the unstable converter 14 start an on / off operation. The unstable converter 14 is repeatedly turned on and off complementarily with a combination of the switching element TR31 and the switching element TR34 and a combination of the switching element TR32 and the switching element TR33 with a duty of about 50%. Further, the synchronous rectification element TR51 is turned on in synchronization with the combination of the switching element TR31 and the switching element TR34 being turned on, and the synchronous rectification element TR52 is turned on in synchronization with the combination of the switching element TR32 and the switching element TR33 being turned on. Is called.

  When the switching power supply device starts the soft start operation, the output voltage V1 of the stable converter 12 increases slowly. Simultaneously with the start of the soft start operation, the switching elements TR31 to TR34 and the synchronous rectification elements TR51 and TR52 of the unstable converter 14 are repeatedly turned on and off complementarily with a duty of about 50%.

  By turning on the MOS-FETs that are the synchronous rectifier elements TR51 and TR52, not only the current from the source to the drain but also the current from the drain to the source can flow. When a voltage is applied, current flows from the output side of the non-stable converter 14 to the input side until the input voltage V1 rises so that the input voltage V1 and the output voltage Vo are in the relationship of the above equation (1). .

  Since the input voltage V1 is the output voltage of the stable converter 12 and the voltage of the capacitor C11, the current flowing from the output side of the non-stable converter 14 to the input side becomes the charging current of the capacitor C11. When the capacitor C11 is charged to increase the voltage and satisfy the relationship of the expression (1), the current stops.

  The current path flowing from the output side to the input side of the unstable converter 14 includes synchronous rectifier elements TR51 and TR52, the secondary side winding N2 and the primary side winding N1 of the transformer T51, and the switching elements TR31 to TR34. Wiring for connecting each element, and in a normal switching power supply device, these resistance values are designed to be reduced in order to reduce loss, so that the output side of the non-stable converter 14 is changed to the input side. Since the current flowing into the circuit has a very large value, a large stress is applied to the synchronous rectifying elements TR51 and TR52 and the switching elements TR31 to TR34, and in the worst case, the switching power supply device is destroyed.

(Problem 2 when using an asynchronous converter with synchronous rectification 2)
In the synchronous rectification unstable converter 14, the synchronous rectifier TR51 is turned on in synchronization with the combination of the switching element TR31 and the switching element TR34, and the synchronous rectification is synchronized with the combination of the switching element TR32 and the switching element TR33 being turned on. Even if the control is performed so that the element TR52 is turned on, the efficiency can be improved. However, the efficiency can be improved by performing the advanced control as described above.

  However, the delay time in the control in which the on of the synchronous rectifying element TR51 is slightly delayed with respect to the on of the combination of the switching element TR31 and the switching element TR34 is the amount of charge stored in the parasitic capacitance between the drain and source of the synchronous rectifying element TR51. If the synchronous rectifier element TR51 is not turned on immediately after the charge stored in the parasitic capacitance is released, a current flows through the parasitic diode of the synchronous rectifier element TR51, resulting in loss. To do.

  Further, in the control performed so that the synchronous rectifying element TR51 is turned off slightly faster than the combination of the switching element TR31 and the switching element TR34 is turned off, if the synchronous rectifying element TR51 is turned off too quickly, the parasitic of the synchronous rectifying element TR51 is parasitic. A current flows through the diode, causing loss. The same applies to the synchronous rectifier element TR52.

  Furthermore, when the dead time at the moment when the on / off of the combination of the switching element TR31 and the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 is small, the charge stored in the parasitic capacitance between the drain and source of the switching element is reduced. Since the switching element is turned on before being pulled out, loss due to the inability to perform zero-volt switching occurs, and in the case of large loss, the parasitic capacitance charge pulled out once causes the excitation inductance of the transformer T51 and the drain of the switching element.・ Returns due to the resonance phenomenon of the parasitic capacitance between the sources, and the switching element turns on with the charge stored in the parasitic capacitance. To.

  In order to improve the efficiency of the asynchronous rectified non-stable converter, the switching elements TR31 to TR34 and the synchronous rectifier elements TR51 and TR52 need to be highly controlled, but a circuit that accurately controls the delay time and the like is designed. There is a problem that is difficult to do.

  It is an object of the present invention to provide a switching power supply device that achieves high efficiency by suppressing the backflow current of an asynchronous converter that has been synchronously rectified and by accurately controlling the dead time of the switching element and the synchronous rectifier element. Objective.

(Switching power supply)
In the present invention, two sets of switching elements are connected to the primary side of the transformer, two sets of synchronous rectifying elements are connected to the secondary side of the transformer, and the two sets of switching elements are complementarily turned on and off, and two sets of It consists of an unstable converter that converts the input voltage at a predetermined ratio determined by the transformer to generate the output voltage by complementarily turning on and off the two sets of synchronous rectifier elements in synchronization with the on / off of the switching elements. When the switching power supply device is started, the two sets of switching elements are complementarily turned on and off with an on-duty of about 50% with a predetermined dead time, and the two sets of synchronous rectifying elements are narrow. The on-duty is complementarily turned on and off, and then the on-duty of the two sets of synchronous rectifier elements is gradually increased during a predetermined time. Wherein the switching elements and two pairs of synchronous rectifier together about 50% on-duty in driving pulse generating circuit for control so as to complementarily turn on and off is provided.

(Drive pulse generation circuit and its control)
The drive pulse generation circuit includes a setting unit, a clock unit, a counter, a first comparison unit, a second comparison unit, a third comparison unit, a fourth comparison unit, a first output unit, and a second output unit.
The setting unit outputs a predetermined first setting value (R1), second setting value (R2), third setting value (R3), and fourth setting value (R4) as a first comparison unit, a second comparison unit, Output to each of the third comparison unit and the fourth comparison unit,
The clock unit outputs a clock signal having a predetermined period to the counter,
The counter generates a count value by counting the clock signal and outputs the count value to the first to fourth comparison units, and resets the count value by inputting a signal output from the first comparison unit.
When the count value reaches a value determined by the first set value (R1), the first comparison unit outputs a signal to one input of the first output unit and the counter,
The second comparison unit outputs a signal to the other input of the first output unit when the count value reaches a value determined by the second set value (R2),
The third comparison unit outputs a signal to one input of the second output unit when the count value reaches a value determined by the third set value (R3),
The fourth comparison unit outputs a signal to the other input of the second output unit when the count value reaches a value determined by the fourth set value (R4),
The first output unit holds the output at a non-inverted level when the signal from the first comparison unit is input to one input, and inverts the output when the signal from the second comparison unit is input to the other input. It has a function of maintaining the level, and by using the output of the first output unit as a switching element drive pulse, two sets of switching elements are complementarily turned on and off,
The second output unit holds the output at a non-inverted level when the signal from the third comparison unit is input to one input, and inverts the output when the signal from the fourth comparison unit is input to the other input. It has a function of maintaining the level, and the two sets of synchronous rectifying elements are complementarily turned on and off by using the output of the second output unit as a synchronous rectifying element driving pulse.

(Synchronous rectification soft-start operation)
The setting unit further increases the on-duty of the two sets of synchronous rectifier elements during a predetermined time by increasing the fourth set value (R4) with the passage of time when the switching power supply device is started. Control to spread.

(Function of first to fourth set values)
The first set value (R1) sets the switching element driving pulse period of the two sets of switching elements,
The second set value (R2) determines a first dead time for preventing a through current due to simultaneous ON when two sets of switching elements are complementarily turned ON / OFF,
The second set time (R3) determines the second dead time from when the two sets of switching elements are complementarily turned on until the two sets of synchronous rectifier elements are complementarily turned on,
The fourth set value (R4) determines a third dead time for making the two sets of synchronous rectification elements complementary OFF faster than the two sets of switching elements complementary OFF.

(Driver for switching element and synchronous rectification element)
In addition,
The two switching elements are operated to be complementarily turned on and off by a signal obtained by distributing the switching element driving pulses output from the driving pulse generation circuit,
The two synchronous rectifier elements are operated to be complementarily turned on and off by a signal obtained by distributing the synchronous rectifier element drive pulses output from the drive pulse generation circuit.

(Combination of unstable converter and stable converter)
Connect a stable converter with a function to stabilize the output voltage to a predetermined voltage before the unstable converter, and use the output of the stable converter as the input of the unstable converter. The output of the switching power supply.

(Basic effect)
In the present invention, two sets of switching elements are connected to the primary side of the transformer, two sets of synchronous rectifying elements are connected to the secondary side of the transformer, and the two sets of switching elements are complementarily turned on and off, and two sets of It consists of an unstable converter that converts the input voltage at a predetermined ratio determined by the transformer to generate the output voltage by complementarily turning on and off the two sets of synchronous rectifier elements in synchronization with the on / off of the switching elements. When the switching power supply device is started, the two sets of switching elements are complementarily turned on and off with an on-duty of about 50% with a predetermined dead time, and the two sets of synchronous rectifying elements are narrow. The on-duty is complementarily turned on and off, and then the on-duty of the two sets of synchronous rectifier elements is gradually increased during a predetermined time. Since the drive pulse generation circuit for controlling the switching element and the two sets of synchronous rectification elements to be turned on and off in a complementary manner with an on-duty of about 50% is provided, the output side of the conventional unstable converter with synchronous rectification When a non-stable converter is started with a voltage applied to the non-stable converter, a large backflow current flows and the non-stable converter breaks down. By performing the control to increase slowly, the reverse current is suppressed by the leakage inductance of the transformer, and the unstable converter can be started safely.

(Effects of drive pulse generation circuit and its control)
The drive pulse generation circuit includes a setting unit, a clock unit, a counter, a first comparison unit, a second comparison unit, a third comparison unit, a fourth comparison unit, a first output unit, and a second output unit. The setting unit outputs a predetermined first setting value (R1), second setting value (R2), third setting value (R3), and fourth setting value (R4) as a first comparison unit, a second comparison unit, Output to each of the third comparison unit and the fourth comparison unit, the clock unit outputs a clock signal having a predetermined cycle to the counter, and the counter generates a count value by counting the clock signal to generate the first value Thru | or a 4th comparison part and the signal which a 1st comparison part outputs is input, a count value is reset, and a 1st comparison part is a value by which a count value is determined by 1st setting value (R1). Is reached, a signal is output to one input of the first output unit and the counter, and the second comparison unit When the count value reaches a value determined by the second set value (R2), a signal is output to the other input of the first output unit, and the third comparison unit determines the count value by the third set value (R3). If the count value reaches the value determined by the fourth set value (R4), the fourth comparison unit outputs a signal to one input of the second output unit. When the signal from the first comparison unit is input to one input, the first output unit holds the output at a non-inversion level, and the signal from the second comparison unit is input to the other input. Is provided, the output is held at an inversion level, and the output of the first output unit is used as a switching element drive pulse, so that the two switching elements are complementarily turned on and off. When the signal from the third comparison unit is input to one input, the output is non-inverted. And when the signal from the fourth comparison unit is input to the other input, the output is maintained at an inversion level. The output of the second output unit is output as a synchronous rectifier driving pulse. The set synchronous rectifier elements are complementarily turned on and off, and the setting unit further increases the fourth set value (R4) with the passage of time during the predetermined time when the switching power supply device is activated. Control is performed to gradually increase the on-duty of the two sets of synchronous rectifier elements, and the switching element drive pulse period of the two sets of switching elements is set by the first set value (R1), and the second set value ( R2) determines a first dead time for performing a zero-volt switching operation while preventing a through current due to simultaneous on when two sets of switching elements are turned on and off in a complementary manner. The second set value (R3) is used to create a second discharge period of the parasitic capacitance until the two sets of synchronous rectifier elements are complementarily turned on after the two sets of switching elements are turned on complementarily. The dead time is determined, and the fourth set value (R4) determines the third dead time for making the two sets of synchronous rectifying elements complementary OFF faster than the two sets of switching elements complementary OFF. As a result, the on-period of the synchronous rectifying device is slowly increased when the unstable converter is started up. In addition to the effect of suppressing the reverse current due to the leakage inductance of the transformer, the switching device and the synchronous rectification The dead time of the element can be accurately controlled, and it becomes possible to further increase the efficiency of the non-stable converter provided with the synchronous rectification.

(Effects of switching element and synchronous rectifier element drive unit)
In addition, a signal obtained by distributing the synchronous rectifying element driving pulse output from the driving pulse generating circuit by operating the two switching elements in a complementary manner by a signal obtained by distributing the switching element driving pulse output from the driving pulse generating circuit. Since the two sets of synchronous rectifying elements are operated so as to be complementarily turned on and off, the transformers are prevented from being demagnetized by making the complementary ON times of the two sets of switching elements and synchronous rectifying elements symmetrical. be able to.

(Effects of combination of unstable converter and stable converter)
In addition, a stable converter having a function of stabilizing the output voltage to a predetermined voltage is connected to the preceding stage of the non-stable converter, and the output of the stable converter is used as the input of the non-stable converter. Since the output is the output of the switching power supply, the switching power supply that stabilizes the output voltage can be realized by performing feedback control in combination with the stable converter in the unstable converter.

The circuit block diagram which showed embodiment of the non-stable type | mold converter which comprises the switching power supply device of this invention FIG. 1 is a time chart showing operation waveforms of respective parts in the drive pulse generation circuit of FIG. FIG. 1 is a time chart showing operation waveforms of each part when no voltage is applied to the output side in the embodiment of the unstable converter of FIG. FIG. 1 is a time chart showing operation waveforms of respective parts when a voltage is applied to the output side in the embodiment of the unstable converter of FIG. A circuit block diagram showing an example of a switching power supply device combining a stable converter and an unstable converter The time chart which showed the operation waveform of each part in the switching power supply device of FIG. The circuit block diagram which showed the example of the switching power supply device which used the unstable converter of FIG. 5 as synchronous rectification FIG. 7 is a time chart showing operation waveforms of respective parts in the switching power supply device of FIG.

  FIG. 1 is a circuit block diagram showing an embodiment of an astable converter constituting the switching power supply device of the present invention.

(Circuit configuration)
As shown in FIG. 1, the unstable converter 14 includes a full-bridge converter 14 a, a synchronous rectifier circuit 14 c, a switching element drive unit 32, a synchronous rectifier element drive unit 34, and a drive pulse generation circuit 52. In the following description, the full bridge converter 14a is described as an example, but the present invention can be replaced with a converter that performs the same operation, such as a half bridge converter or a push-pull converter.

  The full bridge converter 14a converts the input voltage Vin into an intermittent voltage by complementarily turning on and off the combination of the switching element TR31 and the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 with a duty of about 50%. Voltage conversion is performed by inputting an intermittent voltage to the transformer T51. The input voltage Vin is converted into a voltage converted at the turn ratio (N1: N2) of the winding of the transformer T51.

The synchronous rectifier circuit 14c rectifies the voltage output from the transformer T51 and outputs an output voltage Vo. Here, the output voltage Vo and the input voltage Vin are
Vo = N2 / N1 · Vin
Have a relationship.

  The synchronous rectifier circuit 14c is synchronized with the on / off of the combination of the switching element TR31 and switching element TR34 of the unstable converter 14 and the combination of the switching element TR32 and switching element TR33, and the synchronous rectifier element TR51 and the synchronous rectifier element TR52 are complementary. Performs an on / off operation. When the combination of the switching element TR31 and the switching element TR34 is turned on, the synchronous rectification element TR51 is turned on. When the combination of the switching element TR32 and the switching element TR33 is turned on, the synchronous rectification element TR52 is turned on.

  The drive pulse generation circuit 52 includes a setting unit 60, a clock unit 54, a counter 56, comparison units 62, 64, 66, and 68 and output units 70 and 72. The drive pulse generation circuit 52 generates a switching element drive pulse Vsw and a synchronous rectification element drive pulse Vsr. Generate.

  The setting unit 60 is a digital processor having a CPU, an output port, and the like, and outputs setting values R1, R2, R3, and R4 to the comparison units 62, 64, 66, and 68. Here, the setting value R1 corresponds to the first setting value, the setting value R2 corresponds to the second setting value, the setting value R3 corresponds to the third setting value, and the setting value R4 corresponds to the fourth setting value.

  The setting unit 60 outputs the setting values R1 to R3 as predetermined fixed values. The setting value R4 output to the comparing unit 68 is set to a predetermined fixed value from a predetermined minimum value when an activation instruction is given. As a result, the ON period of the synchronous rectifying elements TR51 and TR52 is slowly increased when the unstable converter 14 is started.

The clock unit 54 outputs a clock signal CK having a predetermined cycle Tck to the counter.
The counter 56 counts the clock signal CK and outputs the count value NCT to the comparison units 62, 64, 66 and 68. The counter 56 resets the count value NCT to 0 when the signal output from the comparison unit 62 is input.

  The comparison unit 62 receives the count value NCT and the set value R1, and outputs a signal to the S terminal of the output unit 70 and the counter 56 when the count value NCT matches the set value R1.

  The comparison unit 64 receives the count value NCT and the set value R2, and outputs a signal to the R terminal of the output unit 70 when the count value NCT matches the set value R2.

  The comparator 66 receives the count value NCT and the set value R3, and outputs a signal to the S terminal of the output unit 72 when the count value NCT matches the set value R3. The comparison unit 68 receives the count value NCT and the set value R4, and outputs a signal to the R terminal of the output unit 72 when the count value NCT matches the set value R4.

  The output unit 70 is an RS flip-flop, and when a signal is input to the S terminal, the output level of the Q terminal, which is the output terminal, is set to a non-inverted level. If the signal is input to the R terminal while the level is maintained, the output level of the Q terminal is set to the inversion level, and the output level is maintained even if the signal input to the R terminal is lost. The output of the Q terminal of the output unit 70 is output to the switching element driving unit 32 as a switching element driving pulse Vsw.

  The output unit 72 is also an RS flip-flop. Similarly, when a signal is input to the S terminal, the output level of the Q terminal, which is the output terminal, is set to a non-inverted level, and even if no signal is input to the S terminal. This output level is maintained, and when a signal is input to the R terminal, the output level of the Q terminal is set to an inverted level, and the operation of maintaining this output level is performed even when the input of the signal of the R terminal is lost. The output of the Q terminal of the output unit 72 is output to the synchronous rectifier driving unit 34 as a synchronous rectifier driving pulse Vsr.

  The switching element driving unit 32 receives the switching element driving pulse Vsw and drives the switching elements TR31 to TR34. In the present embodiment, by providing the distribution circuit 38 in the switching element drive unit 32, the switching element drive pulse Vsw is distributed to the switching element drive circuits 40 and 42 as the switching element drive signals VswA and VswB. 38 may be provided in the drive pulse generation circuit 52.

  The synchronous rectifying element driving unit 34 receives the synchronous rectifying element driving pulse Vsr and drives the synchronous rectifying element TR51 and the synchronous rectifying element TR52. In the present embodiment, by providing the distribution circuit 46 in the synchronous rectifying element driving unit 34, the synchronous rectifying element driving pulse Vsr is distributed to the synchronous rectifying element driving circuits 48 and 50 to the synchronous rectifying element driving signals VsrA and VsrB. However, the distribution circuit 46 may be provided in the drive pulse generation circuit 52.

(Operation of drive pulse generation circuit)
FIG. 2 is a time chart showing operation waveforms of respective parts in the drive pulse generation circuit of FIG. 2A shows the clock signal CK, FIG. 2B shows the count value NCT, FIG. 2C shows the switching element drive pulse Vsw, and FIG. 2D shows the synchronous rectifier element. 2E shows the driving pulse Vsr, FIG. 2E shows the switching element driving signal VswA, FIG. 2F shows the switching element driving signal VswB, FIG. 2G shows the synchronous rectifying element driving signal VsrA, 2 (H) indicates the synchronous rectifier drive signal VsrB.

  The operation of the drive pulse generation circuit will be described below with reference to FIG. A clock signal CK having a clock cycle Tck is output from the clock unit 54 to the counter 56. The counter 56 counts the clock signal CK and outputs the count value NCT to the comparison units 62, 64, 66 and 68. The counter 56 resets the count value NCT to 0 when the next clock signal CK is input after the signal output from the comparator 62 is input.

  The comparison unit 62 receives the count value NCT and the set value R1, and outputs a signal to the S terminal of the output unit 70 and the counter 56 when the count value NCT matches the set value R1. The set value R1 determines the switching element drive pulse period Tp. The count value NCT starts from 0 and increases every time the clock signal CK is input, and the count value NCT increases by 1. When the count value NCT reaches the set value R1, the comparator 62 outputs a signal.

When the comparison unit 62 outputs a signal, the output level of the Q terminal of the output unit 70 is set to a non-inversion level. At the same time, the count value NCT of the counter 56 is reset and the count value NCT becomes zero. Since the cycle in which the count value NCT is reset becomes the switching element drive pulse cycle Tp,
Tp = (clock cycle Tck) × (set value R1)
It becomes.

  The comparison unit 64 receives the count value NCT and the set value R2, and outputs a signal to the R terminal of the output unit 70 when the count value NCT matches the set value R2. When the comparison unit 64 outputs a signal, the output level of the Q terminal of the output unit 70 is set to the inverted level. Therefore, the timing at which the output level of the switching element drive pulse Vsw changes from the non-inversion level to the inversion level can be set by the set value R2.

  As a result, the switching element driving pulse period Tp is determined by the clock period Tck and the setting value R1, and the dead time (first dead) of the switching element driving pulse Vsw is determined by the difference (R1−R2) between the setting value R1 and the setting value R2. Time) tdsw (period during which the output level is the inversion level) can be created.

  The comparator 66 receives the count value NCT and the set value R3, and outputs a signal to the S terminal of the output unit 72 when the count value NCT matches the set value R3. When the comparison unit 66 outputs a signal, the output level of the Q terminal of the output unit 72 is set to a non-inversion level. Therefore, the dead time (second dead time) tdsr1 in a state where the output level of the switching element driving pulse Vsw and the synchronous rectifying element driving pulse Vsr changes from the inversion level to the non-inversion level can be set by the set value R3.

  The comparison unit 68 receives the count value NCT and the set value R4, and outputs a signal to the R terminal of the output unit 72 when the count value NCT matches the set value R4. When the comparison unit 68 outputs a signal, the output level of the Q terminal of the output unit 72 is set to the inverted level. Therefore, the dead time (third time) when the output level of the switching element driving pulse Vsw and the synchronous rectifying element driving pulse Vsr changes from the non-inversion level to the inversion level due to the difference (R2−R4) between the setting value R2 and the setting value R4. Dead time) tdsr2 can be set.

  As described above, the switching element drive pulse period Tp can be determined by the set value R1. By the set value R2, it is possible to determine the dead time tdsw for realizing the prevention of the through current and the zero volt switching operation due to the simultaneous ON when the switching elements TR31 to TR34 are turned on and off.

  Further, according to the set value R3, a dead time tdsr1 for creating a charge discharge period of parasitic capacitance from when the combination of the switching element TR31 and the switching element TR34 is turned on to when the synchronous rectifier element TR51 is turned on, and the switching element TR32, It is possible to determine the dead time tdsr1 for creating the charge discharge period of the parasitic capacitance from when the combination of the switching element TR33 is turned on to when the synchronous rectifier element TR52 is turned on.

  Further, the setting value R4 prevents the synchronous rectifier element TR51 from short-circuiting the output side of the transformer T51 by making the synchronous rectifier element TR51 off faster than the combination of the switching element TR31 and the switching element TR34. In order to prevent the synchronous rectification element TR52 from short-circuiting the output side of the transformer T51 by making the dead time tdsr2 and the synchronous rectification element TR52 off faster than the combination of the switching element TR32 and the switching element TR33 off. The dead time tdsr2 can be set.

  For example, as shown in FIG. 2, assuming that the clock cycle Tck = 100 nsec, the set value R1 = 100, R2 = 99, the set value R3 = 1, and the set value R4 = 97, the switching element drive pulse cycle Tp = 100 nsec × 100 clocks = A switching element drive pulse Vsw having a dead time tdsw = (R1-R2) × Tck = 100 nsec and a duty of almost 100% with respect to 10 μsec can be generated.

Since the switching element driving pulse Vsw is distributed to the switching element driving signals VswA and VswB by the switching element driving circuits 40 and 42 and output to the switching elements TR31 to TR34, the switching period Tsw as the switching power supply device is the switching element driving pulse. Twice the period Tp,
Tsw = Tp × 2 = 200 μsec
It becomes.

  Since the switching element driving signal VswA and the switching element driving signal VswB are generated by distributing the switching element driving pulse Vsw to the switching element driving circuits 40 and 42, each becomes a pulse signal having a duty of approximately 50%, and the switching element driving signal VswA The time from the fall to the inversion level to the non-inversion level of the switching element drive signal VswB is the combination of the switching element TR31 and the switching element TR34, and the dead time tdsw when the combination of the switching element TR32 and the switching element TR33 is turned on / off. Become.

The synchronous rectifier element TR51 is turned on with respect to the combination of the switching element TR31 and the switching element TR34 being tdsr1 = R3 × Tck = 100 nsec.
The synchronous rectifying element TR51 is turned off with respect to the combination of the switching element TR31 and the switching element TR34 being tdsr2 = (R2-R4) × Tck = 200 nsec.
Only set to be faster.

The same applies to the synchronous rectifier element TR52, and the synchronous rectifier element TR52 is turned on with respect to the combination of the switching element TR32 and the switching element TR33 being tdsr1 = R3 × Tck = 100 nsec.
The synchronous rectifying element TR52 is turned off by tdsr2 = (R2-R4) × Tck = 200 nsec with respect to the off state of the combination of the switching element TR32 and the switching element TR33.
Only set to be faster.

  Since the set values R1 to R4 are values set by an instruction from the setting unit 60, switching element drive signals VswA and VswB having an arbitrary switching element drive pulse period Tp and a dead time tdsw by changing these are set. Synchronous rectifier drive signals VsrA and VsrB having dead times tdsr1 and tdsr2 can be generated.

(Operation when no voltage is applied to the output side of the unstable converter)
FIG. 3 is a time chart showing operation waveforms of the respective parts when no voltage is applied to the output side in the embodiment of the unstable converter of FIG. 3A shows the output voltage Vo, FIG. 3B shows the input voltage Vin, and FIG. 3C shows the gate-source voltage VGS as a drive signal for the switching elements TR31 and TR34. 3D shows a gate-source voltage VGS that becomes a drive signal for the switching elements TR32 and TR33, and FIG. 3E shows a gate-source voltage VGS that becomes a drive signal for the synchronous rectifier element TR51. FIG. 3F shows a gate-source voltage VGS which is a drive signal for the synchronous rectifier element TR52.

  The operation when the voltage on the input side slowly rises in a state where no voltage is applied to the output side of the switching power supply device of FIG. 1 will be described with reference to FIG.

  It is assumed that the stable converter (not shown) shown in the conventional example of FIG. 5 is connected to the input side of the unstable converter 14 which is the switching power supply device of this embodiment. Since the stable converter performs the soft start operation, the voltage Vin on the input side of the unstable converter 14 of the present embodiment slowly increases.

  Period A is a state where both the stable converter on the input side and the unstable converter 14 of the present embodiment are stopped.

  At the beginning of period B, the input-side stable converter starts a soft start operation, and the input voltage Vin of the unstable converter 14 of the present embodiment slowly rises. At the same time that the stable converter on the input side starts the soft start operation, the non-stable converter according to the present embodiment also starts the operation when a start instruction is given to the drive pulse generation circuit 52.

  In the unstable converter 14 of the present embodiment, the setting values R1 and R2 are given fixed values by the setting unit 60 of the drive pulse generation circuit 52. For example, as shown in FIG. 2, R1 = 100 and R2 = 99 are given, and when the operation of the non-stable converter 14 is started, the switching element driving is performed by the switching element driving pulse Vsw generated by the driving pulse generation circuit 52. The unit 32 performs control to complementarily turn on / off the combination of the switching element TR31 and the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 with a duty of about 50%. The operation of the switching elements TR31 to TR34 is the same as that of the conventional unstable converter 14 shown in FIG.

  The setting value R3 is also given a fixed value by the setting unit 60 of the drive pulse generation circuit 52. For example, R3 = 1 is given as shown in FIG.

  The setting unit 60 of the drive pulse generation circuit 52 is given a small value that is equal to or greater than R3 immediately after the start of the operation of the non-stable converter 14, and then slowly increases to a value equal to or less than R2. Control is performed as follows. For example, R4 = 2 is given immediately after the start of the operation of the non-stable converter 14, and thereafter, it is slowly increased and the final value is controlled so that R4 = 97 as shown in FIG.

  As a result, immediately after the start of the operation of the unstable converter 14 of the present embodiment, the on periods of the synchronous rectifier elements TR51 and TR52 are short and the on period slowly increases, and finally the switching elements TR31 and TR34 The synchronous rectification element TR51 is turned on slightly later than the combination is turned on. Similarly, the synchronous rectification element TR52 is turned on slightly later than the turn-on of the combination of the switching element TR32 and the switching element TR33, and the switching element TR31 and the switching element TR34 are turned on. The synchronous rectification element TR51 is turned off slightly faster than turning off the combination, and similarly, the synchronous rectification element TR52 is turned off slightly faster than turning off the combination of the switching element TR32 and the switching element TR33.

  As described above, it is a feature of the present invention that the operations of the synchronous rectifying elements TR51 and TR52 when the operation of the unstable converter 14 is started are different from those of the conventional unstable converter.

  In period B, the input voltage Vin of the unstable converter 14 rises due to the soft start operation of the stable converter on the input side. As the switching elements TR31 to TR34 of the unstable converter 14 are turned on / off, a voltage of (N2 / N1) · Vin is generated in the secondary winding N2 of the transformer T51. Since no voltage is applied to the output side of the non-stable converter 14, a current flows from the input side to the output side of the non-stable converter 14, so that the synchronous rectifier element TR 51 or the synchronous rectifier element TR 52. Even when is turned off, a current flows through the synchronous rectifier element TR51 or the parasitic diode of the synchronous rectifier element TR52, and the on-period of the synchronous rectifier elements TR51 and TR52 is controlled to increase slowly. Even if the ON period is controlled to be short, the unstable converter 14 can output a current. At the end of period B, the soft start operation of stable converter 14 is completed.

  In the period C, the input voltage Vin of the unstable converter 14 becomes constant, but the operation in which the ON periods of the synchronous rectifier elements TR51 and TR52 slowly increase continues. Since the current flows through the parasitic diode while the synchronous rectifier elements TR51 and TR52 are off, the output voltage drops by the forward voltage drop of the parasitic diode.

  Therefore, the output voltage Vo of the non-stable converter 14 is in a state where the voltage is reduced by the forward voltage drop of the parasitic diode with respect to the voltage generated in the secondary winding N2 of the transformer T51. In the period C, the ON period of the synchronous rectifier elements TR51 and TR52 gradually increases, so that the influence of the voltage drop due to the parasitic diode gradually decreases, so that the output voltage Vo of the unstable converter 14 gradually increases. To do. By performing an operation in which the ON periods of the synchronous rectifier elements TR51 and TR52 increase slowly, the occurrence of overshoot of the output voltage Vo of the unstable converter 14 is prevented.

  At the end of the period C, the increase of the set value R4 stops, the on-duty of the synchronous rectifying elements TR51 and TR52 of the unstable converter 14 reaches approximately 50%, and the increase of the output voltage Vo stops.

  During the period D, the unstable converter 14 is in a steady state, and the switching elements TR31 to TR34 and the synchronous rectifier elements TR51 and TR52 are both operating with an on-duty of approximately 50%.

(Operation when voltage is applied to the output side of the unstable converter)
FIG. 4 is a time chart showing operation waveforms of respective parts when a voltage is applied to the output side in the embodiment of the unstable converter of FIG. 4A shows the output voltage Vo, FIG. 4B shows the input voltage Vin, and FIG. 4C shows the gate-source voltage VGS as a drive signal for the switching elements TR31 and TR34. 4D shows a gate-source voltage VGS that is a drive signal for the switching elements TR32 and TR33, and FIG. 4E shows a gate-source voltage VGS that is a drive signal for the synchronous rectifier element TR51. FIG. 4F shows a gate-source voltage VGS which is a drive signal for the synchronous rectifier element TR52.

  The operation when the voltage on the input side rises slowly in the state where the voltage is applied to the output side of the switching power supply device of FIG. 1 will be described as follows with reference to FIG.

  The following description will be made assuming that nothing is connected to the input side of the astable converter 14 which is the switching power supply device of the present embodiment.

  Period A is a state where the unstable converter 14 of the present embodiment is stopped.

  At the beginning of period B, the stable converter on the input side starts a soft start operation, the input voltage Vin of the unstable converter 14 of this embodiment rises slowly, and the unstable converter 14 of this embodiment also operates. Start.

  As described above, the setting values R1 and R2 are given fixed values by the setting unit 60 of the drive pulse generation circuit 52. For example, as shown in FIG. 2, R1 = 100 and R2 = 99 are given, and when the operation is started, the switching element driving unit 32 is switched by the switching element driving pulse Vsw generated by the driving pulse generating circuit 52 by the switching element driving unit 32. And the combination of the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 are controlled to be complementarily turned on and off with a duty of about 50%.

  As described above, the setting value R3 is also given a fixed value by the setting unit 60 of the drive pulse generation circuit 52. For example, R3 = 1 is given as shown in FIG.

  Further, as described above, the setting unit 60 of the drive pulse generation circuit 52 gives a small value that is equal to or greater than R3 as the set value R4 immediately after the start of the operation of the unstable converter 14. Thereafter, control is performed so as to increase slowly to a value of R2 or less. For example, immediately after the start of the operation of the unstable converter 14, R4 = 2 is given, and then slowly increases, and the final value is controlled so that R4 = 97 as shown in FIG.

  Thus, immediately after the start of the operation of the unstable converter 14 of the present embodiment, the on-periods of the synchronous rectifier elements TR51 and TR52 are short and the on-period slowly increases, and finally, the switching element TR31 and the switching element TR34. The synchronous rectifier element TR51 is turned on slightly later than the ON state of the combination, and similarly, the synchronous rectifier element TR52 is turned on slightly later than the ON state of the combination of the switching element TR32 and the switching element TR33. The synchronous rectification element TR51 is turned off slightly faster than the combination of the switching element TR34 is turned off, and similarly, the synchronous rectification element TR52 is turned off slightly faster than the combination of the switching element TR32 and the switching element TR33 is turned off.

  When the synchronous rectifier elements TR51 and TR52 are complementarily turned on when the voltage is applied to the output side of the unstable converter 14 and there is no voltage on the input side, the output side of the unstable converter 14 is input to the input side. A current flows toward. When the synchronous rectifying elements TR51 and TR52 are complementarily turned on, current is increased by being limited by the leakage inductance of the transformer T51 and the wiring. When the current flowing from the output side to the input side of the non-stable converter 14 is viewed from the primary side of the transformer T51, the increase in current is expressed by Expression (2).

ΔI: transformer primary side current rise L: transformer leakage inductance N1: transformer primary winding N2: transformer secondary winding Vo: voltage applied to output side of non-stable converter (secondary transformer Voltage applied to the side)
Vin: Voltage generated on the input side of the non-stable converter (Voltage of capacitor C11)
t: On-time of synchronous rectifier

  Since the unstable converter 14 of the present embodiment is controlled so that the ON period of the synchronous rectifier elements TR51 and TR52 is shortened immediately after the operation is started, the output from the output side of the unstable converter 14 is shifted to the input side. The synchronous rectification elements TR51 and TR52 are turned off before the flowing current increases, and this is repeated at the switching element drive pulse period Tp.

Here, in order to make it easy to see FIG. 4, the period B is described as the switching element drive pulse period Tp being 6 periods (3 periods as the switching period Tsw). , TR52 are operated so as to be a short pulse of several tens of cycles or more. By this operation, the capacitor C11 on the input side of the unstable converter 14 is charged with the current limited. The voltage V (C11) of the capacitor C11 is
V (C11) = (N1 / N2) · Vo
It rises until it becomes. When this voltage is reached, the current flowing from the output side to the input side of the unstable converter 14 stops.

  In the period C, the current flowing from the output side to the input side of the non-stable converter 14 is stopped. However, since the set value R4 continues to increase slowly, the ON period of the synchronous rectifier elements TR51 and TR52 is reduced. Slowly increase until the on-duty is almost 50%.

  During the period D, the unstable converter 14 is in a steady state, and the switching elements TR31 to TR34 and the synchronous rectifier elements TR51 and TR52 are both operating with an on-duty of approximately 50%.

  The operation in the state where nothing is connected to the input of the unstable converter 14 of the present embodiment has been described above. However, the stable converter 12 that performs the soft start operation as in the conventional example shown in FIG. Is connected, the capacitor C11 is charged by the current flowing from the output side to the input side of the unstable converter 14 and the current from the stable converter 12, and the voltage rise rate of the capacitor C11 is fast. Become. However, the operation of charging the capacitor C11 in a state where the current flowing from the output side to the input side of the unstable converter 14 is small does not change.

  Further, when the voltage applied to the output side of the unstable converter 14 is small, when the voltage of the stable converter 12 increases due to the soft start operation, the voltage is applied from the input side of the unstable converter 14 in period B. The operation is the same as that shown in FIG. 3 in which a normal operation in which current flows toward the output side is performed.

(Resolution of problem 1 of the conventional example according to this embodiment)
At the start of the operation of the unstable converter 14 according to the present embodiment, the voltage is applied to the output side of the unstable converter 14 by performing control so that the ON periods of the synchronous rectifier elements TR51 and TR52 are slowly increased. In this case, the voltage of the capacitor C11 is increased by charging the capacitor C11 on the input side of the non-stable converter 14 while maintaining a small current flowing from the output side to the input side. Current flowing from the output side to the input side can be stopped. Thereby, even when a voltage is applied to the output side of the non-stable converter 14, the starting operation can be performed without destroying the semiconductor element or the like.

  In addition, when the operation of the unstable converter 14 is started, the voltage that is applied to the output side of the unstable converter 14 is controlled so as to slowly increase the ON period of the synchronous rectifying elements TR51 and TR52 of the unstable converter 14. There is no effect on the start-up operation even in the absence of a state. At this time, the combination of the switching element TR31 and the switching element TR34 and the combination of the switching element TR32 and the switching element TR33 are switched on and off even during the period in which the on-period of the synchronous rectifying elements TR51 and TR52 is slowly increased. Since the instantaneous dead time is set so that the zero volt switching operation can be performed, an operation in which the loss of the switching elements TR31 to TR34 is reduced can be realized.

  Therefore, the same control can be performed regardless of the presence or absence of voltage application on the output side of the non-stable converter 14, so that the configuration of the control circuit can be simplified and the circuit cost can be reduced.

(Resolution of problem 2 of the conventional example according to this embodiment)
In the unstable converter 14 of the present embodiment, the drive pulse generation circuit 52 includes a setting unit 60, a clock unit 54, a counter 56, comparison units 62, 64, 66, and 68, and output units 70 and 72, and switching elements. Since the drive pulse Vsw and the synchronous rectifier driving pulse Vsr are generated, the timing of the switching elements TR31 to TR34 and the synchronous rectifiers TR51 and TR52 can be accurately controlled. The efficiency is improved by the zero-volt switching operation of the switching element, and the current flows through the parasitic diodes of the synchronous rectifying elements TR51 and TR52 using the MOS-FET when the unstable converter is synchronously rectified. The problem of reduced efficiency can be solved.

  In addition, in the conventional unstable converter, the charge stored in the parasitic capacitance of the switching element and the synchronous rectifying element changes with the individual difference of the switching element and the synchronous rectifying element, the change of the input voltage, the output voltage, the temperature, and the like. Therefore, the optimum values of the dead times of the switching elements TR31 to TR34 and the synchronous rectifier elements TR51 and TR52 also vary depending on the input voltage, output voltage, temperature, etc. However, the unstable converter 14 of this embodiment has a setting unit Since the dead time can be easily changed by changing the set values R1 to R4 from 60, the dead time can be changed by changing the set values R1 to R4 in response to changes in the input voltage, output voltage, temperature, etc. Can be optimized, and a highly efficient switching power supply device can be made.

[Modification of the present invention]
In the above embodiment, the drive pulse generation circuit 52 includes the setting unit 60, the clock unit 54, the counter 56, the comparison units 62, 64, 66, and 68, and the output units 70 and 72, but is not limited thereto. Instead, it may be realized as a control function by executing a program by the CPU of the digital processor.

  The above embodiment has been described in the case where the operation start timings of the switching elements TR31 to TR34 and the synchronous rectifier elements TR51 and TR52 of the astable converter 14 are the same when the operation of the astable converter 14 is started. If the control is performed so that the ON periods of the synchronous rectifier elements TR51 and TR52 are slowly increased, the operation start timings of the synchronous rectifier elements TR51 and TR52 may be delayed with respect to the operation start timings of the switching elements TR31 to TR34. Absent.

  In the above embodiment, the set value R4 is given a small value that is equal to or greater than the set value R3 immediately after the start of the operation of the unstable converter 14, and then slowly increases to a value that is equal to or less than the set value R2. However, if the timings of turning off the synchronous rectifying element and the switching element are not reversed in consideration of the delay times of the switching element driving unit and the synchronous rectifying element driving unit, the set value R4 is It may be a value greater than or equal to the set value R2.

  The present invention includes appropriate modifications without impairing the object and advantages thereof, and is not limited by the numerical values shown in the above embodiments.

12: Stable converter 14: Unstable converter 14a: Full bridge converter 14b: Center tap rectifier circuit 14c: Synchronous rectifier circuit 32: Switching element driver 34: Synchronous rectifier element driver 38, 46: Distribution circuits 40, 42 : Switching element drive circuit 48, 50: synchronous rectification element drive circuit 52: drive pulse generation circuit 54: clock unit 56: counter 60: setting unit 62, 64, 66, 68: comparison unit 70, 72: output unit

Claims (6)

Two sets of switching elements are connected to the primary side of the transformer, two sets of synchronous rectifying elements are connected to the secondary side of the transformer, and the two sets of switching elements are complementarily turned on and off, and the two sets of switching A non-stable converter that generates an output voltage by converting the input voltage at a predetermined ratio determined by the transformer by complementarily turning on and off the two sets of synchronous rectifying elements in synchronization with the on / off of the elements. Switching power supply device,
When starting the switching power supply, the two sets of switching elements are complementarily turned on and off with an on-duty of about 50% having a predetermined dead time, and the two sets of synchronous rectifier elements are complementarily complemented with a narrow on-duty. After that, the on-duty of the two sets of synchronous rectifier elements is gradually increased during a predetermined time, and during the steady operation, the two sets of switching elements and the two sets of synchronous rectifier elements are both about 50%. A switching power supply device provided with a drive pulse generation circuit that is controlled to be turned on and off in a complementary manner with an on-duty
In the switching power supply device according to claim 1,
The drive pulse generation circuit includes a setting unit, a clock unit, a counter, a first comparison unit, a second comparison unit, a third comparison unit, a fourth comparison unit, a first output unit, and a second output unit,
The setting unit outputs a predetermined first setting value, second setting value, third setting value, and fourth setting value to the first comparison unit, the second comparison unit, the third comparison unit, and the first setting value. Output to each of the 4 comparison units,
The clock unit outputs a clock signal having a predetermined period to the counter,
The counter generates a count value by counting the clock signal and outputs the count value to the first to fourth comparison units, and resets the count value by receiving a signal output from the first comparison unit. And
The first comparison unit outputs a signal to one input of the first output unit and the counter when the count value reaches a value determined by the first set value,
The second comparison unit outputs a signal to the other input of the first output unit when the count value reaches a value determined by the second set value.
The third comparison unit outputs a signal to one input of the second output unit when the count value reaches a value determined by the third set value,
The fourth comparison unit outputs a signal to the other input of the second output unit when the count value reaches a value determined by the fourth set value.
The first output unit holds the output at a non-inverted level when a signal from the first comparison unit is input to the one input, and a signal from the second comparison unit is input to the other input. Then, it has a function of holding the output at an inversion level, and by using the output of the first output unit as a switching element driving pulse, the two sets of switching elements are complementarily turned on and off,
The second output unit holds the output at a non-inversion level when the signal from the third comparison unit is input to the one input, and the signal from the fourth comparison unit is input to the other input. Then, it has a function of holding the output at an inversion level, and the output of the second output unit is used as a synchronous rectifier driving pulse to turn on and off the two sets of synchronous rectifiers in a complementary manner. Switching power supply.
3. The switching power supply device according to claim 2, wherein the setting unit further gradually increases the fourth set value with the passage of time during a predetermined time when the switching power supply device is activated. A switching power supply device that performs control to increase the on-duty of the two sets of synchronous rectifying elements.
In the switching power supply device according to claim 2,
According to the first set value, a switching element driving pulse period of the two sets of switching elements is set,
The second set value determines a first dead time when the two sets of switching elements are complementarily turned on and off,
The third set value determines a second dead time from when the two sets of switching elements are complementarily turned on to when the two sets of synchronous rectifier elements are complementarily turned on,
The fourth set value determines a third dead time for making the two sets of synchronous rectifying elements complementary off faster than the two sets of switching elements complementary off. Switching power supply.
The switching power supply device according to claim 2, further comprising:
The two switching elements are operated to be complementarily turned on and off by a signal obtained by distributing the switching element driving pulse output from the driving pulse generation circuit,
The two sets of synchronous rectifier elements are operated to be complementarily turned on and off by a signal obtained by distributing the synchronous rectifier element drive pulses output by the drive pulse generation circuit.
The switching power supply device characterized by the above-mentioned.
In the switching power supply device according to claim 1,
A stable converter having a function of stabilizing an output voltage to a predetermined voltage is connected to a preceding stage of the non-stable converter, and an output of the stable converter is used as an input of the non-stable converter. A switching power supply characterized in that the output of the converter is the output of a switching power supply.

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