JP2018125500A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of suppressing current collapse, reducing leak current, and suppressing a decrease in reliability, and a method for manufacturing the same.SOLUTION: A semiconductor device 10 comprises: a nitride-based semiconductor layer 17, a first electrode 21 in contact with the nitride-based semiconductor layer 17, a second electrode 20 in contact with the nitride-based semiconductor layer 17, and an auxiliary film 23 electrically connected to the first electrode 21, separated from the second electrode 20, and composed of a p-type metal oxide semiconductor in contact with the nitride-based semiconductor layer 17.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

Group III-V nitride compound semiconductors represented by gallium nitride (GaN), so-called nitride semiconductors, are attracting attention. A nitride semiconductor has a general formula of In _x Ga _y Al _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, x + y ≦ 1), which is a group III element such as aluminum (Al), gallium It is a compound semiconductor composed of (Ga) and indium (In) and nitrogen (N) which is a group V element. Nitride semiconductors can form various mixed crystals and can easily form heterojunction interfaces. A nitride semiconductor heterojunction is characterized in that a high-concentration two-dimensional electron gas layer is generated at the junction interface due to spontaneous polarization or piezopolarization even without doping. A field effect transistor (FET) using this high-concentration two-dimensional electron gas layer as a carrier is attracting attention as a device for high frequency and high power.

  However, a phenomenon called current collapse is likely to occur in an FET using a nitride semiconductor. Current collapse is a phenomenon that makes it difficult for a current to flow for a certain period of time when a device is once turned off and then turned on again. If the current collapse characteristic is poor, high-speed switching becomes difficult, and a very serious problem occurs in the operation of the device.

  In Patent Document 1, a p-type nitride semiconductor layer (for example, a p-type GaN layer) is provided in the vicinity of the drain of the FET, the p-type nitride semiconductor layer and the drain are electrically connected, and the p-type nitride semiconductor layer is By injecting holes, electrons trapped in the semiconductor layer causing current collapse are neutralized, and current collapse is suppressed.

Japanese Patent No. 5618571

  However, in the FET of Patent Document 1, since the p-type nitride semiconductor layer is partially formed on the barrier layer (electron supply layer), dry etching (to remove the p-type nitride semiconductor layer other than the desired region) is performed. And other processes such as epitaxial regrowth (epitaxial growth for forming a p-type nitride semiconductor layer) are required. For this reason, there has been a problem that an increase in leakage current due to damage to the barrier layer in the dry etching process, deterioration of current collapse, and reduction in reliability may occur.

  The present invention has been made in view of the above problems, and provides a semiconductor device capable of suppressing current collapse, reducing leakage current, and suppressing deterioration in reliability, and a method for manufacturing the same. The purpose is to do.

  To achieve the above object, the present invention provides a nitride-based semiconductor layer, a first electrode in contact with the nitride-based semiconductor layer, a second electrode in contact with the nitride-based semiconductor layer, and the first And an auxiliary film made of a p-type metal oxide semiconductor in contact with the nitride-based semiconductor layer. Providing equipment.

  In this way, by electrically connecting the auxiliary film of the p-type metal oxide semiconductor to the drain electrode, a hole-injection is performed from the p-type metal oxide semiconductor to the nitride-based semiconductor layer that causes current collapse. The trapped electrons can be neutralized, current collapse can be suppressed, and leakage current can be reduced. Further, as described above, the auxiliary film can be formed at a relatively low temperature by sputtering or the like by using a p-type metal oxide semiconductor instead of the p-type nitride semiconductor as the auxiliary film. The auxiliary film can be partially formed in a desired region by a lift-off method using a film or the like, and the dry etching process can be eliminated. As a result, the fabrication of the semiconductor device is facilitated, and the process for reducing damage to the nitride-based semiconductor layer is reduced, and the generation of crystal defects can be suppressed. For this reason, the leakage current can be reduced, the current collapse phenomenon can be more effectively suppressed, and the reduction in reliability can be improved.

  To achieve the above object, the present invention also provides a nitride-based semiconductor layer, a first electrode in contact with the nitride-based semiconductor layer, a second electrode in contact with the nitride-based semiconductor layer, and the first And an auxiliary film made of p-type nickel oxide or p-type copper oxide that is electrically connected to the first electrode, spaced apart from the second electrode, and in contact with the nitride-based semiconductor layer A semiconductor device is provided.

  In this way, by electrically connecting the auxiliary film of p-type nickel oxide or p-type copper oxide to the drain electrode, holes are injected from the p-type metal oxide semiconductor to cause current collapse. Electrons trapped in the nitride-based semiconductor layer can be neutralized, current collapse can be suppressed, and leakage current can be reduced. Further, as described above, by using p-type nickel oxide or p-type copper oxide instead of the p-type nitride semiconductor as the auxiliary film, the auxiliary film is formed at a relatively low temperature by sputtering or the like. Therefore, the auxiliary film can be partially formed in a desired region by a lift-off method using a photoresist film or the like, and the dry etching process can be eliminated. As a result, the fabrication of the semiconductor device is facilitated, and the process for reducing damage to the nitride-based semiconductor layer is reduced, and the generation of crystal defects can be suppressed. For this reason, leakage current can be reduced, current collapse can be more effectively suppressed, and reliability can be improved.

  In order to achieve the above object, the manufacturing method of the present invention includes a step of forming a first electrode and a second electrode in contact with a nitride-based semiconductor layer, an electrical connection with the first electrode, Forming an auxiliary film made of p-type nickel oxide or p-type copper oxide spaced apart from the second electrode and in contact with the nitride-based semiconductor layer. Provide a method.

  According to the method of manufacturing a semiconductor device of the present invention, hole injection from a p-type metal oxide semiconductor is performed by electrically connecting an auxiliary film of p-type nickel oxide or p-type copper oxide to a drain electrode. As a result, electrons trapped in the nitride-based semiconductor layer causing current collapse can be neutralized, current collapse can be suppressed, and leakage current can be reduced. Further, as described above, by using p-type nickel oxide or p-type copper oxide instead of the p-type nitride semiconductor as the auxiliary film, the auxiliary film is formed at a relatively low temperature by sputtering or the like. Therefore, the auxiliary film can be partially formed in a desired region by a lift-off method using a photoresist film or the like, and the dry etching process can be eliminated. As a result, the fabrication of the semiconductor device is facilitated, and the process for reducing damage to the nitride-based semiconductor layer is reduced, and the generation of crystal defects can be suppressed. For this reason, leakage current can be reduced, current collapse can be more effectively suppressed, and reliability can be improved.

  As described above, according to the semiconductor device and the manufacturing method thereof of the present invention, holes are injected from the p-type metal oxide semiconductor by electrically connecting the auxiliary film of the p-type metal oxide semiconductor to the drain electrode. Thus, electrons trapped in the nitride-based semiconductor layer that causes current collapse can be neutralized, current collapse can be suppressed, and leakage current can be reduced. Further, according to the semiconductor device and the manufacturing method thereof of the present invention, the auxiliary film can be formed at a relatively low temperature by sputtering or the like by using a p-type metal oxide semiconductor as the auxiliary film. The auxiliary film can be partially formed in a desired region by the lift-off method using the above, and the dry etching process can be eliminated. As a result, the fabrication of the semiconductor device is facilitated, and the process for reducing damage to the nitride-based semiconductor layer is reduced, and the generation of crystal defects can be suppressed. For this reason, the leakage current can be reduced, the current collapse phenomenon can be more effectively suppressed, and the reliability can be improved.

1 is a schematic cross-sectional view showing a semiconductor device according to a first embodiment of the present invention. It is a process flow which shows the manufacturing method of the semiconductor device of 1st Embodiment of this invention. It is a schematic sectional drawing which shows the semiconductor device of 2nd Embodiment of this invention. It is the schematic sectional drawing and top view which show the semiconductor device of 3rd Embodiment of this invention. It is a schematic sectional drawing which shows the semiconductor device of 4th Embodiment of this invention. It is a process flow which shows the manufacturing method of the semiconductor device of 3rd Embodiment of this invention. It is the schematic sectional drawing and top view which show the semiconductor device of 5th Embodiment of this invention. It is a schematic sectional drawing which shows the 1st modification of the semiconductor device of 5th Embodiment of this invention. It is a top view which shows the 2nd modification of the semiconductor device of 5th Embodiment of this invention. It is a top view which shows the 3rd modification of the semiconductor device of 5th Embodiment of this invention. It is a top view which shows the 4th modification of the semiconductor device of 5th Embodiment of this invention. It is the schematic sectional drawing and top view which show the semiconductor device of 6th Embodiment of this invention.

As described above, in the prior art, a p-type nitride semiconductor layer is provided near the drain of the FET, the p-type nitride semiconductor layer and the drain are electrically connected, and holes are injected from the p-type nitride semiconductor layer. Thus, the electrons in the semiconductor layer were neutralized and current collapse was suppressed.
However, in the conventional FET, the p-type nitride semiconductor layer needs to be separated from the gate electrode and the source electrode on the barrier layer, and the p-type nitride semiconductor layer is partially formed on the barrier layer. Since a process such as epitaxial regrowth is required, there is a problem that leakage current may increase due to damage to the barrier layer in the dry etching process, current collapse may deteriorate, and reliability may decrease.

  Therefore, the inventor has intensively studied a semiconductor device and a manufacturing method thereof that can suppress current collapse, reduce leakage current, and suppress deterioration in reliability.

  As a result, the present inventor can form the auxiliary film at a relatively low temperature by sputtering or the like by using a p-type metal oxide semiconductor instead of the p-type nitride semiconductor as the auxiliary film. An auxiliary film can be partially formed in a desired region by a lift-off method using a photoresist film or the like, and a dry etching process can be eliminated. This makes it easier to fabricate a semiconductor device and a nitride-based semiconductor. The damage given to the layer can be reduced and the occurrence of crystal defects can be suppressed. For this reason, the inventors have found that the leakage current can be reduced, the current collapse can be more effectively suppressed, and the decrease in reliability can be suppressed, and the present invention has been completed.

  Hereinafter, the present invention will be described in detail as an example of an embodiment with reference to the drawings, but the present invention is not limited thereto.

  First, the semiconductor device according to the first embodiment of the present invention will be described with reference to FIG.

  FIG. 1 is a schematic sectional view showing a semiconductor device according to a first embodiment of the present invention. 1 includes a barrier layer 17 made of a nitride-based semiconductor, a drain electrode (first electrode) 21 in contact with the barrier layer 17, and a source electrode (second electrode) 20 in contact with the barrier layer 17. And an auxiliary film 23 made of a p-type metal oxide semiconductor that is electrically connected to the drain electrode (first electrode) 21, separated from the source electrode (second electrode) 20, and in contact with the barrier layer 17. ing. The auxiliary film 23 can be, for example, p-type nickel oxide or p-type copper oxide.

  Here, the semiconductor device 10 further includes a substrate 14, a buffer layer 15 made of a nitride semiconductor provided on the substrate 14, and a channel layer 16 made of a nitride semiconductor provided on the buffer layer 15. The barrier layer 17 can be provided on the channel layer 16. In the channel layer 16, a two-dimensional electron gas layer 18 is planar in the vicinity of the interface between the barrier layer (second nitride semiconductor layer) 17 and the channel layer (first nitride semiconductor layer) 16. It is formed to spread. Since the two-dimensional electron gas layer 18 is formed in the channel layer 16, the on-resistance of the FET can be reduced.

  The substrate 14 can be, for example, a silicon substrate or a SiC substrate, the channel layer 16 can be, for example, a GaN layer, and the barrier layer 17 can be, for example, an AlGaN layer. Moreover, the buffer layer 15 can be made into the laminated structure of the nitride-type semiconductor layer from which a composition differs, for example.

In the semiconductor device 10 according to the first embodiment of the present invention, the drain electrode 21 and the auxiliary film 23 are electrically connected using the wiring 25. The wiring 25 may be the same material as the drain electrode 21, the same material as the auxiliary film 23, or a material different from these.
A higher potential than the source electrode (second electrode) 20 is applied to the drain electrode (first electrode) 21.

  A gate electrode (control electrode) 22 for controlling a main current flowing between the drain electrode (first electrode) 21 and the source electrode (second electrode) 20 is further provided, and the auxiliary film 23 includes the drain electrode (first electrode). The electrode is preferably formed between the gate electrode (control electrode) 22 and spaced apart from the gate electrode (control electrode) 22. As the auxiliary film 23 is separated from the gate electrode (control electrode) 22 in this way, the leakage current between the auxiliary film 23 and the gate electrode (control control power) 22 can be reduced.

  The resistance value of the auxiliary film 23 is preferably larger than the resistance values of the drain electrode (first electrode) 21 and the source electrode (second electrode) 20. Note that, specifically, the resistance value referred to here can be, for example, a resistivity. If the resistance value of the auxiliary film 23 is larger than the resistance values of the drain electrode (first electrode) 21 and the source electrode (second electrode) 20, the distance between the drain electrode 21 and the source electrode 20 is larger. Even if the distance between the auxiliary electrode 23 and the source electrode 20 is shortened, an increase in leakage current can be suppressed. Thereby, the auxiliary film can be provided while ensuring the area of the drain electrode 20 and the reduction of the chip size. In other words, it is possible to secure the area of the drain electrode with a small size while suppressing the current collapse phenomenon by widening the auxiliary film. In addition, fluctuations in the characteristics of the FET caused by the current path through the auxiliary film 23 can be suppressed.

  In the semiconductor device 10 according to the first embodiment of the present invention, the two-dimensional electron gas layer 18 in the region near the drain electrode 21 where the auxiliary film 23 is formed is reduced by forming the barrier layer 17 thicker than usual. Can be suppressed, and an increase in on-resistance of the FET can be suppressed.

According to the semiconductor device of the first embodiment of the present invention described above, the nitride-based semiconductor layer (barrier layer) that causes current collapse is generated by injecting holes in the auxiliary film of the p-type metal oxide semiconductor. Electrons trapped on the surface or the like can be neutralized and current collapse can be suppressed. In addition, by using a p-type metal oxide semiconductor instead of a p-type nitride semiconductor as the auxiliary film, the auxiliary film can be formed at a relatively low temperature by sputtering or the like. The auxiliary film can be partially formed in a desired region by the lift-off method, and the dry etching process can be eliminated. This facilitates the fabrication of the semiconductor device, reduces the damage to the barrier layer and the like during the formation of the auxiliary film, and suppresses an increase in crystal defects in the barrier layer due to the provision of the auxiliary film. For this reason, the leakage current can be reduced, the current collapse phenomenon can be more effectively suppressed, and the reliability can be improved.

Here, a process flow showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention will be described.
First, as shown in FIG. 2A, a barrier layer 17 is formed on the channel layer 16 by a known method (for example, metal organic vapor phase epitaxy). Then, a drain electrode (drain ohmic electrode) 21 and a source electrode (source ohmic electrode) 20 are formed on the barrier layer 17. In FIG. 2, the substrate 14 and the buffer layer 15 below the channel layer 16 are omitted. Thereafter, as shown in FIG. 2B, a photoresist film 24 is formed in a region other than the auxiliary film formation region 29 and the gate formation region 30 by a known method (for example, photolithography method).
Next, as shown in FIG. 2C, a p-type metal oxide semiconductor film 27 is formed by sputtering. The p-type metal oxide semiconductor film 27 is, for example, a p-type nickel oxide (for example, a NiO _x film such as a NiO film) or a p-type copper oxide (for example, a CuO _x film such as a CuO film). Can do. Here, unlike the p-type nitride semiconductor film formed by epitaxial growth, the p-type metal oxide semiconductor film 27 can be formed at a relatively low temperature by a sputtering method or the like. At the time of forming 27, the photoresist film 24 can sufficiently withstand.
Next, as shown in FIG. 2D, the p-type metal oxide semiconductor film 27 in a region other than the auxiliary film formation region 29 and the gate formation region 30 is removed by a lift-off method. Specifically, the p-type metal oxide semiconductor film 27 formed on the photoresist film 24 is removed by removing the photoresist film 24 by a known method. Thereby, an auxiliary film 23 made of a p-type metal oxide semiconductor and a gate electrode 22 made of a p-type metal oxide semiconductor are formed.
As described above, the semiconductor device 10 according to the first embodiment of the present invention shown in FIG. 1 can be manufactured.
As described above with reference to FIG. 2, in the semiconductor device of the present invention, the auxiliary film 23 is made of a p-type metal oxide semiconductor and can be formed at a relatively low temperature by a sputtering method or the like. The auxiliary film can be partially formed in a desired region by a lift-off method using a resist film or the like, and a dry etching process that has been conventionally required can be eliminated. As a result, the fabrication of the semiconductor device becomes easy and the process becomes a damage-less process, and the generation of crystal defects can be suppressed. For this reason, the leakage current can be reduced, the current collapse phenomenon can be more effectively suppressed, and the reliability can be improved.

  Next, a semiconductor device according to a second embodiment of the present invention will be described with reference to FIG.

  FIG. 3 is a schematic sectional view showing a semiconductor device according to the second embodiment of the present invention. The semiconductor device 11 of FIG. 3 has substantially the same configuration as the semiconductor device of the first embodiment of the present invention shown in FIG. 1 except that the auxiliary film 23 is in contact with the drain electrode 21 and the drain electrode 21 A part penetrates the barrier layer (second nitride semiconductor layer) 17 and reaches the channel layer (first nitride semiconductor layer) 16, and at least a part of the drain electrode 21 is the two-dimensional electron gas layer 18. Is different from the semiconductor device according to the first embodiment of the present invention. As shown in FIG. 3, it is preferable that a part of the source electrode 20 also penetrates the barrier layer 17 and reaches the channel layer 16 in the same manner as the drain electrode 21. Also in the semiconductor device of the second embodiment of the present invention, the same effects as those of the semiconductor device of the first embodiment of the present invention and the manufacturing method thereof can be obtained.

  In the semiconductor device according to the second embodiment of the present invention, since the auxiliary film 23 is in contact with the drain electrode 21, the nitride semiconductor in the vicinity of the drain electrode (first electrode) 21 in which electrons are relatively easily trapped. In the region of the layer, trapped electrons can be neutralized, and the current collapse phenomenon can be more effectively suppressed.

  In the semiconductor device according to the second embodiment of the present invention, the drain electrode 21 is provided so as to extend through the barrier layer 17 and into the channel layer 16. The channel layer 16 can be contacted without going through 17, thereby reducing the on-resistance of the FET.

  Next, a semiconductor device according to a third embodiment of the present invention will be described with reference to FIG.

  FIG. 4A is a schematic cross-sectional view showing a semiconductor device according to a third embodiment of the present invention, and FIG. 4B is a top view of FIG. The semiconductor device 12 of FIG. 4 has substantially the same configuration as the semiconductor device of the second embodiment of the present invention shown in FIG. 3 except that an auxiliary film 23 is provided so as to surround the drain electrode 21. This is different from the semiconductor device according to the second embodiment of the present invention. Also in the semiconductor device of the third embodiment of the present invention, the same effect as that of the semiconductor device of the second embodiment of the present invention can be obtained. Here, the case where the auxiliary electrode (auxiliary film) 23 surrounds the surroundings is not limited to the case of completely surrounding the auxiliary electrodes (auxiliary film) 23, but also includes cases where the auxiliary electrodes (auxiliary films) 23 are arranged so as to surround them at intervals. 4B, the source electrode 20 is provided outside the drain electrode 21, but the drain electrode 21 may be provided outside the source electrode 20. In this case, it goes without saying that the auxiliary film 23 is provided so as to surround the drain electrode 21 in a ring shape.

  In the semiconductor device according to the third embodiment of the present invention, since the auxiliary film 23 is provided so as to surround the drain electrode 21, a larger area of the auxiliary film 23 is provided in a region adjacent to the drain electrode 21. As a result, the current collapse phenomenon can be more efficiently suppressed.

  Next, a semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIG.

  FIG. 5 is a schematic sectional view showing a semiconductor device according to the fourth embodiment of the present invention. The semiconductor device 13 of FIG. 5 has substantially the same configuration as the semiconductor device of the third embodiment of the present invention shown in FIG. 4 except that a part of the drain electrode 21 is provided on the upper surface of the auxiliary film 23. Thus, it is different from the semiconductor device of the third embodiment of the present invention. Also in the semiconductor device of the fourth embodiment of the present invention, the same effect as that of the semiconductor device of the third embodiment of the present invention can be obtained.

  In the semiconductor device according to the fourth embodiment of the present invention, since part of the drain electrode 21 is provided on the upper surface of the auxiliary film 23 with a length shorter than that of the auxiliary film 23 on the source electrode 20 side, The area of the upper surface of the electrode 21 can be increased.

  Next, a method for manufacturing a semiconductor device according to the third embodiment of the present invention will be described with reference to FIG.

  FIG. 6 is a process flow showing the method for manufacturing a semiconductor device according to the third embodiment of the present invention. In FIG. 6, the substrate 14 and the buffer layer 15 below the channel layer 16 are omitted. In FIG. 6, the cap layer 19 is provided on the barrier layer 17, but the cap layer 19 may not be provided.

  First, as shown in FIG. 6A, a barrier layer 17 is formed on the channel layer 16 and a cap layer 19 is formed on the barrier layer 17 by a known method (for example, metal organic vapor phase epitaxy). The epitaxial substrate 28 is produced. Then, a groove reaching the channel layer 16 is dug in the manufactured epitaxial substrate 28, and a drain electrode (drain ohmic electrode) 21 and a source electrode (source ohmic electrode) 20 are formed in the groove. Thereafter, a trench 26 for forming a gate electrode is formed. Here, the channel layer 16 can be, for example, a GaN layer, the barrier layer 17 can be, for example, an AlGaN layer, and the cap layer 19 can be, for example, a GaN layer.

  Next, as shown in FIG. 6B, a photoresist film 24 is formed in a region other than the auxiliary film formation region 29 and the gate formation region 30 by a known method (for example, a photolithography method).

Next, as shown in FIG. 6C, a p-type metal oxide semiconductor film 27 is formed by sputtering. The p-type metal oxide semiconductor film 27 is, for example, a p-type nickel oxide (for example, a NiO _x film such as a NiO film) or a p-type copper oxide (for example, a CuO _x film such as a CuO film). Can do. Here, unlike the p-type nitride semiconductor film formed by epitaxial growth, the p-type metal oxide semiconductor film 27 can be formed at a relatively low temperature by a sputtering method or the like. At the time of forming 27, the photoresist film 24 can sufficiently withstand.

  Next, as shown in FIG. 6D, the p-type metal oxide semiconductor film 27 in a region other than the auxiliary film formation region 29 and the gate formation region 30 is removed by a lift-off method. Specifically, the p-type metal oxide semiconductor film 27 formed on the photoresist film 24 is removed by removing the photoresist film 24 by a known method. Thereby, an auxiliary film 23 made of a p-type metal oxide semiconductor and a gate electrode 22 made of a p-type metal oxide semiconductor are formed.

As described above, the semiconductor device 12 according to the third embodiment of the present invention shown in FIG. 4 can be manufactured.
As described above with reference to FIG. 6, in the semiconductor device of the present invention, the auxiliary film 23 is made of a p-type metal oxide semiconductor and can be formed at a relatively low temperature by sputtering or the like. The auxiliary film can be partially formed in a desired region by a lift-off method using a resist film or the like, and a dry etching process that has been conventionally required can be eliminated. As a result, the fabrication of the semiconductor device becomes easy and the process becomes a damage-less process, and the generation of crystal defects can be suppressed. For this reason, the leakage current can be reduced, the current collapse phenomenon can be more effectively suppressed, and the reliability can be improved.

  Next, a semiconductor device according to a fifth embodiment of the present invention will be described with reference to FIGS.

FIG. 7A is a schematic cross-sectional view showing a semiconductor device according to a fifth embodiment of the present invention, and FIG. 7B is a top view of FIG. 7A. FIG. 7B shows an upper surface of a region in the vicinity of the drain electrode 21, and an insulating film 32 described later and a part of the drain electrode 21 provided on the insulating film 32 are omitted. .
7 has substantially the same configuration as that of the semiconductor device according to the second embodiment of the present invention shown in FIG. 3, but a part of the gate electrode 22 is provided in a groove provided in the barrier layer 17. The insulating film 32 is provided on the auxiliary film 23 and the drain electrode 21, and a part of the drain electrode 21 is also provided on the insulating film 32, and a part of the auxiliary film 23 is a barrier. The semiconductor device according to the second embodiment of the present invention is different from the semiconductor device according to the second embodiment in that it is provided in the groove 31 that penetrates the layer 17 and reaches the channel layer 16. Here, the insulating film 32 can be, for example, a SiO 2 film or a SiN film. In the semiconductor device 40 of FIG. 7, the shape seen from above the groove 31 provided with a part of the auxiliary film 23 is circular, and the groove 31 provided with a part of the auxiliary film 23 is In the region between the drain electrode 21 and the gate electrode 22, the drain electrode 21 is periodically provided at intervals in the direction extending on the nitride semiconductor layer (see FIG. 7B). Also in the semiconductor device of the fifth embodiment of the present invention, the same effect as that of the semiconductor device of the second embodiment of the present invention can be obtained.

In the semiconductor device according to the fifth embodiment of the present invention, since a part of the auxiliary film 23 is provided in the groove 31 that penetrates the barrier layer 17 and reaches the channel layer 16, the ON resistance of the FET is increased. The hole injection efficiency can be improved while suppressing the above. That is, when the auxiliary film 23 is provided on the barrier layer 17, the hole injection efficiency is poor. If the barrier layer 17 is thinned to increase the injection efficiency, the concentration of the two-dimensional electrogas layer 18 decreases and the on-resistance of the FET increases. Therefore, by providing a part of the auxiliary film 23 in at least the groove 31 provided in the barrier layer 17, the hole injection efficiency can be increased in the region of the groove 31, and the barrier in the region other than the groove 31. Since the thickness of the layer 17 is not reduced, the concentration of the two-dimensional electrogas layer 18 does not decrease, and an increase in the on-resistance of the FET can be suppressed.
That is, since the grooves 31 in which a part of the auxiliary film 23 is provided are periodically provided at intervals, a current can be satisfactorily passed through the portion where the grooves 31 are not provided. Therefore, a decrease in the current flowing between the drain and the source when the semiconductor device is on can be reduced.

  FIG. 8 is a schematic sectional view showing a first modification of the semiconductor device according to the fifth embodiment of the present invention. In the semiconductor device 40 ′ of FIG. 8, the groove 31 in which a part of the auxiliary film 23 is provided does not penetrate the barrier layer 17 and reaches the channel layer 16, but like the semiconductor device 40 of FIG. In the region of the groove 31, the hole injection efficiency can be increased by making the barrier layer 17 thin, and in the region other than the groove 31, the thickness of the barrier layer 17 does not become thin, so the concentration of the two-dimensional electron gas layer 18 is increased. The increase in the on-resistance of the FET can be suppressed without lowering.

FIG. 9 is a top view showing a second modification of the semiconductor device according to the fifth embodiment of the present invention. FIG. 9 shows the upper surface of the region in the vicinity of the drain electrode 21 as in FIG. 7B, and the insulating film 32 and a part of the drain electrode 21 provided on the insulating film 32 are omitted. In the semiconductor device of FIG. 9, the shape seen from above the groove 31 provided with a part of the auxiliary film 23 is a rectangle, and the groove 31 provided with a part of the auxiliary film 23 is a drain electrode. Is in contact with 21.
In addition, the shape seen from the groove | channel 31 can also be made into various shapes, such as a hexagon, for example.
In the semiconductor device of FIG. 9, since the groove 31 provided with a part of the auxiliary film 23 is in contact with the drain electrode 21, even in the nitride-based semiconductor layer near the drain electrode 21 where electrons are easily trapped, Hole injection can be performed more effectively, and current collapse can be reduced.

FIG. 10 is a top view showing a third modification of the semiconductor device according to the fifth embodiment of the present invention. FIG. 10 also shows the top surface of the region in the vicinity of the drain electrode 21 as in FIG. 7B, and the insulating film 32 and a part of the drain electrode 21 provided on the insulating film 32 are omitted. The semiconductor device of FIG. 10 has substantially the same configuration as the semiconductor device of FIG. 9, but differs in that the auxiliary film 23 is periodically provided at intervals.
In the semiconductor device of FIG. 10, in the region between the drain electrode 21 and the gate electrode 22, the groove 31 and the auxiliary film 23 are periodically provided at intervals in the direction in which the drain electrode 21 extends on the nitride semiconductor layer. Therefore, the current can be satisfactorily passed through the portion where the groove 31 is not provided. Therefore, a decrease in the current flowing between the drain and the source when the semiconductor device is on can be reduced.

FIG. 11 is a top view showing a fourth modification of the semiconductor device according to the fifth embodiment of the present invention. FIG. 11 also shows the top surface of the region in the vicinity of the drain electrode 21 as in FIG. 7B, and the insulating film 32 and a part of the drain electrode 21 provided on the insulating film 32 are omitted. In the semiconductor device of FIG. 11, the shape seen from above the groove 31 provided with a part of the auxiliary film 23 is a rectangle, and the groove 31 provided with a part of the auxiliary film 23 is a drain electrode. The shape seen from above the auxiliary film 23 is a comb shape.
Also in the semiconductor device of FIG. 11, the same effect as the semiconductor device of the second embodiment of the present invention can be obtained.

  Next, a semiconductor device according to a sixth embodiment of the present invention will be described with reference to FIG.

  FIG. 12A is a schematic cross-sectional view showing a semiconductor device according to a sixth embodiment of the present invention, and FIG. 12B is a top view of FIG. FIG. 12B shows the upper surface of the region near the drain electrode 21, and the insulating film 32 and the wiring 25 on the insulating film 32 are omitted. The semiconductor device 41 of FIG. 12 has substantially the same configuration as the semiconductor device of the fifth embodiment of the present invention shown in FIG. 7, except that the shape seen from above the trench 31 is rectangular, and the auxiliary film 23 is spaced apart. In the present invention, the auxiliary film 23 is spaced apart from the drain electrode 21, and the auxiliary film 23 and the drain electrode 21 are electrically connected by the wiring 25. This is different from the semiconductor device of the fifth embodiment. Here, the auxiliary film 23 and the drain electrode 21 are connected to the wiring 25 through an opening provided in the insulating film 32 (see FIG. 12A). In the semiconductor device 41 of FIG. 12, the groove 31 in which a part of the auxiliary film 23 is provided does not penetrate the barrier layer 17 and does not reach the channel layer 16. The groove 31 provided with a part may penetrate the barrier layer 17 and reach the channel layer 16. Also in the semiconductor device of the sixth embodiment of the present invention, the same effect as that of the semiconductor device of the fifth embodiment of the present invention can be obtained.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

10, 11, 12, 13, 40, 40 ', 41 ... semiconductor device, 14 ... substrate,
15 ... buffer layer, 16 ... channel layer (first nitride semiconductor layer),
17 ... Barrier layer (second nitride semiconductor layer), 18 ... Two-dimensional electron gas layer,
19 ... cap layer, 20 ... source electrode (second electrode),
21 ... Drain electrode (first electrode), 22 ... Gate electrode (control electrode),
23 ... Auxiliary film (auxiliary electrode), 24 ... Photoresist film, 25 ... Wiring, 26 ... Groove,
27 ... p-type metal oxide semiconductor film, 28 ... epitaxial substrate,
29 ... auxiliary electrode formation region, 30 ... gate formation region, 31 ... groove, 32 ... insulating film.

Claims (11)

A nitride-based semiconductor layer;
A first electrode in contact with the nitride-based semiconductor layer;
A second electrode in contact with the nitride-based semiconductor layer;
An auxiliary film made of a p-type metal oxide semiconductor that is electrically connected to the first electrode, spaced apart from the second electrode, and in contact with the nitride-based semiconductor layer is provided. A semiconductor device. A nitride-based semiconductor layer;
A first electrode in contact with the nitride-based semiconductor layer;
A second electrode in contact with the nitride-based semiconductor layer;
An auxiliary film made of p-type nickel oxide or p-type copper oxide electrically connected to the first electrode, spaced apart from the second electrode, and in contact with the nitride-based semiconductor layer A semiconductor device characterized by that. The nitride semiconductor layer includes: a first nitride semiconductor layer; a second nitride semiconductor layer on the first nitride semiconductor layer; the first nitride semiconductor layer; A two-dimensional electron gas layer provided in the vicinity of the interface of the second nitride-based semiconductor layer,
The semiconductor device according to claim 1, wherein the first electrode is an electrode having a higher potential than the second electrode.   4. The semiconductor device according to claim 3, wherein a part of the first electrode penetrates the second nitride-based semiconductor layer and reaches the first nitride-based semiconductor layer. 5. A control electrode for controlling a main current flowing between the first electrode and the second electrode;
5. The semiconductor according to claim 1, wherein the auxiliary film is formed between the first electrode and the control electrode, and is separated from the control electrode. 6. apparatus.   The semiconductor device according to claim 1, wherein the auxiliary film is in contact with the first electrode.   The semiconductor device according to claim 1, wherein the auxiliary film is provided so as to surround the first electrode.   8. The semiconductor device according to claim 1, wherein a resistance value of the auxiliary film is larger than a resistance value of the first electrode and the second electrode. 9. .   9. The semiconductor device according to claim 1, wherein at least part of the auxiliary film is provided on a groove provided in the nitride-based semiconductor layer. 10. .   10. The semiconductor device according to claim 9, wherein at least a part of the auxiliary film is provided on a groove periodically provided in the nitride-based semiconductor layer at intervals. Forming a first electrode and a second electrode in contact with the nitride-based semiconductor layer;
An auxiliary film made of p-type nickel oxide or p-type copper oxide is formed that is electrically connected to the first electrode, spaced apart from the second electrode, and in contact with the nitride-based semiconductor layer. A method of manufacturing a semiconductor device.

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